119 lines
3.4 KiB
C++
119 lines
3.4 KiB
C++
/**
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* @file osc_detector.cpp
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* @brief This logic automatically detects the speed of the
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* oscillator or crystal connected to HSE.
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* @date 12 July 2021
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*
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* It works by first using the reasonably-precise HSI oscillator (16MHz) to measure LSI (nominally 32khz, but wide tolerance).
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* Then, it switches the system clock source to HSE, and repeats the same measurement. The inaccurate LSI will not drift
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* significantly in the short period of time between these two measurements, so use it as a transfer standard to compare the speed
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* of HSI and HSE. The ratio between the measured speed of LSI when running on HSE vs. HSI will give the ratio of speeds of HSE
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* and HSI themselves. Since we know the value of HSI (16mhz), we can compute the speed of HSE.
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*
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* Lastly, the PLL is reconfigured to use the correct input divider such that the input frequency is 1MHz
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* (PLLM is set to N for an N-MHz HSE crystal).
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*/
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#include "hal.h"
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#include "efilib.h"
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#ifdef ENABLE_AUTO_DETECT_HSE
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float hseFrequencyMhz;
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uint8_t autoDetectedRoundedMhz;
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static uint32_t getOneCapture() {
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// wait for input capture
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while ((TIM11->SR & TIM_SR_CC1IF) == 0);
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// Return captured count
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return TIM11->CCR1;
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}
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static uint32_t getTimerCounts(size_t count) {
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// Burn one count
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getOneCapture();
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uint32_t firstCapture = getOneCapture();
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uint32_t lastCapture;
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for (size_t i = 0; i < count; i++)
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{
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lastCapture = getOneCapture();
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}
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return lastCapture - firstCapture;
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}
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// This only works if you're using the PLL as the configured clock source!
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static_assert(STM32_SW == RCC_CFGR_SW_PLL);
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// These clocks must all be enabled for this to work
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static_assert(STM32_HSI_ENABLED);
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static_assert(STM32_HSE_ENABLED);
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static void reprogramPll(uint8_t roundedMhz) {
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// Switch back to HSI to configure PLL
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// clear SW to use HSI
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RCC->CFGR &= ~RCC_CFGR_SW;
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// Stop the PLL
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RCC->CR &= ~RCC_CR_PLLON;
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// Mask out the old PLLM and PLLSRC
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RCC->PLLCFGR &= ~(RCC_PLLCFGR_PLLM_Msk | RCC_PLLCFGR_PLLSRC_Msk);
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// Stick in the new PLLM value
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RCC->PLLCFGR |= (roundedMhz << RCC_PLLCFGR_PLLM_Pos) & RCC_PLLCFGR_PLLM_Msk;
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// Set PLLSRC to HSE
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RCC->PLLCFGR |= RCC_PLLCFGR_PLLSRC_HSE;
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// Reenable PLL, wait for lock
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RCC->CR |= RCC_CR_PLLON;
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while (!(RCC->CR & RCC_CR_PLLRDY));
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// Switch clock source back to PLL
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RCC->CFGR &= ~RCC_CFGR_SW;
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RCC->CFGR |= RCC_CFGR_SW_PLL;
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while ((RCC->CFGR & RCC_CFGR_SWS) != (STM32_SW << 2));
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}
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// __late_init runs after bss/zero initialziation, but before static constructors and main
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extern "C" void __late_init() {
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// Set RTCPRE to /31 - just set all the bits
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RCC->CFGR |= RCC_CFGR_RTCPRE_Msk;
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// Turn on timer 11
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RCC->APB2ENR |= RCC_APB2ENR_TIM11EN;
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// Remap to connect HSERTC to TIM11 CH1
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#ifdef STM32F4XX
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TIM11->OR = TIM_OR_TI1_RMP_1;
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#else
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// the definition has a different name on F7 for whatever reason
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TIM11->OR = TIM11_OR_TI1_RMP_1;
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#endif
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// Enable capture on channel 1
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TIM11->CCMR1 = TIM_CCMR1_CC1S_0;
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TIM11->CCER = TIM_CCER_CC1E;
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// Start TIM11
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TIM11->CR1 |= TIM_CR1_CEN;
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// Measure HSE against SYSCLK
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auto hseCounts = getTimerCounts(10);
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// Turn off timer 11 now that we're done with it
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RCC->APB2ENR &= ~RCC_APB2ENR_TIM11EN;
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float hseFrequencyHz = 10 * 31.0f * STM32_SYSCLK / hseCounts;
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hseFrequencyMhz = hseFrequencyHz / 1e6;
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autoDetectedRoundedMhz = efiRound(hseFrequencyMhz, 1);
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reprogramPll(autoDetectedRoundedMhz);
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}
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#endif // defined ENABLE_AUTO_DETECT_HSE
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