rusefi/firmware/hw_layer/ports
Andrey Gusakov d264f002cd RTC fixup for STM32F7
Switch RTC to LSE clock if it is detected on start.

It is not allowed to change source clock of RTC module on STM32.
Source clock can be selected only once after reset of BKP module.
If at first start LSE is failed FW will fallback to inaccurate
LSI (internal RC). If Vbat is present RTC/BKP is not reset between
restarts and RTC is never switched to more accurate LSE event if it
is present.
Implement fixup that will check for the LSE and switch RTC to LSE
through BKP (RTC) module reset and new clock source selection.
2025-01-08 11:24:35 -05:00
..
at32 flash: renames only 2024-08-09 18:25:31 -04:00
cypress GPIO_NULL 2024-12-29 08:02:27 -05:00
kinetis GPIO_NULL 2024-12-29 08:02:27 -05:00
stm32 RTC fixup for STM32F7 2025-01-08 11:24:35 -05:00
arm_common.cpp
chconf_common.h only:fancy! 2024-05-24 12:26:42 -04:00
mpu_util.h mpu_utils: implement adcMuxedGetParent() 2024-09-04 08:41:46 -04:00
mpu_watchdog.h Move X_CALLBACK_PERIOD_MS to engine_controller.h 2023-11-29 09:59:15 -05:00
rusefi_halconf.h halconf: no need to have such a big TX USB buffers 2024-11-04 08:39:30 -05:00