260 lines
6.6 KiB
C++
260 lines
6.6 KiB
C++
/**
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* @file stm32_common_can.cpp
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* @brief Low level common STM32 code
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*
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* @date Mar 28, 2019
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* @author Andrey Belomutskiy, (c) 2012-2020
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*/
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#include "pch.h"
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#if EFI_CAN_SUPPORT
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// Values below calculated with http://www.bittiming.can-wiki.info/
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// Pick ST micro bxCAN
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// Clock rate of 42mhz for f4, 54mhz for f7, 80mhz for h7
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#ifdef STM32F4XX
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// These have an 85.7% sample point
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#define CAN_BTR_50 (CAN_BTR_SJW(0) | CAN_BTR_BRP(59) | CAN_BTR_TS1(10) | CAN_BTR_TS2(1))
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#define CAN_BTR_83 (CAN_BTR_SJW(0) | CAN_BTR_BRP(35) | CAN_BTR_TS1(10) | CAN_BTR_TS2(1))
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#define CAN_BTR_100 (CAN_BTR_SJW(0) | CAN_BTR_BRP(29) | CAN_BTR_TS1(10) | CAN_BTR_TS2(1))
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#define CAN_BTR_125 (CAN_BTR_SJW(0) | CAN_BTR_BRP(23) | CAN_BTR_TS1(10) | CAN_BTR_TS2(1))
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#define CAN_BTR_250 (CAN_BTR_SJW(0) | CAN_BTR_BRP(11) | CAN_BTR_TS1(10) | CAN_BTR_TS2(1))
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#define CAN_BTR_500 (CAN_BTR_SJW(0) | CAN_BTR_BRP(5) | CAN_BTR_TS1(10) | CAN_BTR_TS2(1))
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#define CAN_BTR_1k0 (CAN_BTR_SJW(0) | CAN_BTR_BRP(2) | CAN_BTR_TS1(10) | CAN_BTR_TS2(1))
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#elif defined(STM32F7XX)
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// These have an 88.9% sample point
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#define CAN_BTR_50 (CAN_BTR_SJW(0) | CAN_BTR_BRP(59) | CAN_BTR_TS1(14) | CAN_BTR_TS2(1))
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#define CAN_BTR_83 (CAN_BTR_SJW(0) | CAN_BTR_BRP(35) | CAN_BTR_TS1(14) | CAN_BTR_TS2(1))
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#define CAN_BTR_100 (CAN_BTR_SJW(0) | CAN_BTR_BRP(29) | CAN_BTR_TS1(14) | CAN_BTR_TS2(1))
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#define CAN_BTR_125 (CAN_BTR_SJW(0) | CAN_BTR_BRP(23) | CAN_BTR_TS1(14) | CAN_BTR_TS2(1))
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#define CAN_BTR_250 (CAN_BTR_SJW(0) | CAN_BTR_BRP(11) | CAN_BTR_TS1(14) | CAN_BTR_TS2(1))
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#define CAN_BTR_500 (CAN_BTR_SJW(0) | CAN_BTR_BRP(5) | CAN_BTR_TS1(14) | CAN_BTR_TS2(1))
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#define CAN_BTR_1k0 (CAN_BTR_SJW(0) | CAN_BTR_BRP(2) | CAN_BTR_TS1(14) | CAN_BTR_TS2(1))
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#elif defined(STM32H7XX)
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// FDCAN driver has different bit timing registers (yes, different format)
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// for the arbitration and data phases
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// 66% sample point, not ideal but best we can do without changing CAN clock
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#define CAN_NBTP_50 0x061F1F10
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#define CAN_DBTP_50 0x001F2003
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// 86.7% sample point
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#define CAN_NBTP_83 0x061F1803
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#define CAN_DBTP_83 0x001F1833
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// 88.0% sample point
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#define CAN_NBTP_100 0x061F1402
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#define CAN_DBTP_100 0x001F1423
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// 85.0% sample point
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#define CAN_NBTP_125 0x061F0F02
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#define CAN_DBTP_125 0x001F0F23
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// These have an 87.5% sample point
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#define CAN_NBTP_250 0x06130C01
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#define CAN_DBTP_250 0x00130C13
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#define CAN_NBTP_500 0x06090C01
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#define CAN_DBTP_500 0x00090C13
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#define CAN_NBTP_1k0 0x06040C01
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#define CAN_DBTP_1k0 0x00040C13
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#else
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#error Please define CAN BTR settings for your MCU!
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#endif
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/*
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* 500KBaud
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* automatic wakeup
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* automatic recover from abort mode
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* See section 22.7.7 on the STM32 reference manual.
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*
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* 29 bit would be CAN_TI0R_EXID (?) but we do not mention it here
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* CAN_TI0R_STID "Standard Identifier or Extended Identifier"? not mentioned as well
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*/
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#if defined(STM32F4XX) || defined(STM32F7XX)
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#define STM32FxMCR (CAN_MCR_ABOM | CAN_MCR_AWUM | CAN_MCR_TXFP)
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static const CANConfig canConfig50 = {
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.mcr = STM32FxMCR,
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.btr = CAN_BTR_50
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};
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static const CANConfig canConfig83 = {
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.mcr = STM32FxMCR,
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.btr = CAN_BTR_83
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};
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static const CANConfig canConfig100 = {
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.mcr = STM32FxMCR,
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.btr = CAN_BTR_100
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};
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static const CANConfig canConfig125 = {
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.mcr = STM32FxMCR,
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.btr = CAN_BTR_125
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};
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static const CANConfig canConfig250 = {
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.mcr = STM32FxMCR,
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.btr = CAN_BTR_250
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};
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static const CANConfig canConfig500 = {
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.mcr = STM32FxMCR,
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.btr = CAN_BTR_500
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};
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static const CANConfig canConfig1000 = {
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.mcr = STM32FxMCR,
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.btr = CAN_BTR_1k0
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};
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#elif defined(STM32H7XX)
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static const CANConfig canConfig50 = {
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.NBTP = CAN_NBTP_50,
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.DBTP = CAN_DBTP_50,
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.CCCR = 0,
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.TEST = 0,
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.RXGFC = 0,
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};
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static const CANConfig canConfig83 = {
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.NBTP = CAN_NBTP_83,
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.DBTP = CAN_DBTP_83,
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.CCCR = 0,
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.TEST = 0,
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.RXGFC = 0,
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};
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static const CANConfig canConfig100 = {
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.NBTP = CAN_NBTP_100,
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.DBTP = CAN_DBTP_100,
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.CCCR = 0,
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.TEST = 0,
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.RXGFC = 0,
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};
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static const CANConfig canConfig125 = {
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.NBTP = CAN_NBTP_125,
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.DBTP = CAN_DBTP_125,
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.CCCR = 0,
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.TEST = 0,
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.RXGFC = 0,
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};
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static const CANConfig canConfig250 = {
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.NBTP = CAN_NBTP_250,
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.DBTP = CAN_DBTP_250,
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.CCCR = 0,
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.TEST = 0,
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.RXGFC = 0,
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};
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static const CANConfig canConfig500 = {
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.NBTP = CAN_NBTP_500,
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.DBTP = CAN_DBTP_500,
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.CCCR = 0,
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.TEST = 0,
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.RXGFC = 0,
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};
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static const CANConfig canConfig1000 = {
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.NBTP = CAN_NBTP_1k0,
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.DBTP = CAN_DBTP_1k0,
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.CCCR = 0,
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.TEST = 0,
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.RXGFC = 0,
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};
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#endif
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static bool isValidCan1RxPin(brain_pin_e pin) {
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return pin == Gpio::A11 || pin == Gpio::B8 || pin == Gpio::D0;
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}
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static bool isValidCan1TxPin(brain_pin_e pin) {
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return pin == Gpio::A12 || pin == Gpio::B9 || pin == Gpio::D1;
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}
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static bool isValidCan2RxPin(brain_pin_e pin) {
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return pin == Gpio::B5 || pin == Gpio::B12;
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}
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static bool isValidCan2TxPin(brain_pin_e pin) {
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return pin == Gpio::B6 || pin == Gpio::B13;
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}
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bool isValidCanTxPin(brain_pin_e pin) {
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return isValidCan1TxPin(pin) || isValidCan2TxPin(pin);
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}
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bool isValidCanRxPin(brain_pin_e pin) {
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return isValidCan1RxPin(pin) || isValidCan2RxPin(pin);
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}
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CANDriver* detectCanDevice(brain_pin_e pinRx, brain_pin_e pinTx) {
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if (pinRx == Gpio::Unassigned || pinTx == Gpio::Unassigned) {
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return nullptr;
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}
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#if STM32_CAN_USE_CAN1 || STM32_CAN_USE_FDCAN1
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if (isValidCan1RxPin(pinRx) && isValidCan1TxPin(pinTx))
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return &CAND1;
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#endif
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#if STM32_CAN_USE_CAN2 || STM32_CAN_USE_FDCAN2
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if (isValidCan2RxPin(pinRx) && isValidCan2TxPin(pinTx))
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return &CAND2;
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#endif
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criticalError("invalid CAN pins tx %s and rx %s", hwPortname(pinTx), hwPortname(pinRx));
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return nullptr;
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}
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const CANConfig * findCanConfig(can_baudrate_e rate) {
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switch (rate) {
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case B50KBPS:
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return &canConfig50;
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case B83KBPS:
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return &canConfig83;
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case B100KBPS:
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return &canConfig100;
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case B125KBPS:
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return &canConfig125;
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case B250KBPS:
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return &canConfig250;
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case B1MBPS:
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return &canConfig1000;
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case B500KBPS:
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default:
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return &canConfig500;
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}
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}
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void canHwInfo(CANDriver* cand)
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{
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if (cand == NULL)
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return;
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if (cand->state != CAN_READY) {
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efiPrintf("Interface is not ready");
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return;
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}
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#if STM32_CAN_USE_CAN1 || STM32_CAN_USE_CAN2
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if (cand->can == NULL) {
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efiPrintf("No device assigned!");
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}
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uint32_t esr = cand->can->ESR;
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efiPrintf("Receive error counter %d", (esr >> 24) & 0xff);
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efiPrintf("Transmit error counter %d", (esr >> 16) & 0xff);
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efiPrintf("Last error %d", (esr >> 4) & 0x7);
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efiPrintf("Flags: %s %s %s",
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(esr & 0x4) ? "BOFF" : "",
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(esr & 0x2) ? "EPVF" : "",
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(esr & 0x1) ? "EWGF" : "");
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#endif
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}
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#endif /* EFI_CAN_SUPPORT */ |