493 lines
20 KiB
C
493 lines
20 KiB
C
/**
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* @file boards/subaru_eg33/board_io.c
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*
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* @date Feb 06, 2021
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* @author Andrey Gusakov, 2021
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*/
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#define BOARD_NAME "BB_V3"
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#ifndef BOARD_IO_H
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#define BOARD_IO_H
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#define EFI_USB_AF 10U
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#define EFI_USB_SERIAL_DM Gpio::A11
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#define EFI_USB_SERIAL_DP Gpio::A12
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#define EFI_USE_OSC TRUE
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#define EFI_CAN_SUPPORT TRUE
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#define CAN_USE_SLEEP_MODE FALSE
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#undef EFI_FILE_LOGGING
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#define EFI_FILE_LOGGING TRUE
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#undef EFI_SDC_DEVICE
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#define EFI_SDC_DEVICE SDCD1
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#undef EFI_ICU_INPUTS
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#define EFI_ICU_INPUTS FALSE
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#undef HAL_TRIGGER_USE_PAL
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#define HAL_TRIGGER_USE_PAL TRUE
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#undef EFI_LOGIC_ANALYZER
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#define EFI_LOGIC_ANALYZER FALSE
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#undef HAL_VSS_USE_PAL
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#define HAL_VSS_USE_PAL TRUE
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#ifndef LED_CRITICAL_ERROR_BRAIN_PIN
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#define LED_CRITICAL_ERROR_BRAIN_PIN Gpio::Unassigned
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#endif
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// Ignore USB VBUS pin (we're never a host, only a device)
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#define BOARD_OTG_NOVBUSSENS TRUE
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/*
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* Board oscillators-related settings.
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* NOTE: LSE not fitted.
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*/
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#if !defined(STM32_LSECLK)
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#define STM32_LSECLK 32768U
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#endif
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#define STM32_LSEDRV (3U << 3U)
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/*
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* Board voltages.
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* Required for performance limits calculation.
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*/
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#define STM32_VDD 300U
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#define EFI_PIN_MODE_DEFAULT PIN_MODE_INPUT
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#ifndef EFI_DR_DEFAULT
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#define EFI_DR_DEFAULT PIN_PUPDR_PULLDOWN
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#endif
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// See https://github.com/rusefi/rusefi/issues/397
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#define DEFAULT_GPIO_SPEED PIN_OSPEED_HIGH
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/*
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* I/O ports initial setup, this configuration is established soon after reset
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* in the initialization code.
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* Please refer to the STM32 Reference Manual for details.
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*/
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#define PIN_MODE_INPUT(n) (0U << ((n) * 2U))
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#define PIN_MODE_OUTPUT(n) (1U << ((n) * 2U))
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#define PIN_MODE_ALTERNATE(n) (2U << ((n) * 2U))
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#define PIN_MODE_ANALOG(n) (3U << ((n) * 2U))
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#define PIN_ODR_LOW(n) (0U << (n))
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#define PIN_ODR_HIGH(n) (1U << (n))
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#define PIN_OTYPE_PUSHPULL(n) (0U << (n))
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#define PIN_OTYPE_OPENDRAIN(n) (1U << (n))
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#define PIN_OSPEED_VERYLOW(n) (0U << ((n) * 2U))
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#define PIN_OSPEED_LOW(n) (1U << ((n) * 2U))
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#define PIN_OSPEED_MEDIUM(n) (2U << ((n) * 2U))
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#define PIN_OSPEED_HIGH(n) (3U << ((n) * 2U))
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#define PIN_PUPDR_FLOATING(n) (0U << ((n) * 2U))
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#define PIN_PUPDR_PULLUP(n) (1U << ((n) * 2U))
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#define PIN_PUPDR_PULLDOWN(n) (2U << ((n) * 2U))
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#define PIN_AFIO_AF(n, v) ((v) << (((n) % 8U) * 4U))
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#define VAL_GPIO_MODER_ALL_DEFAULT (EFI_PIN_MODE_DEFAULT(0) | \
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EFI_PIN_MODE_DEFAULT(1) | \
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EFI_PIN_MODE_DEFAULT(2) | \
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EFI_PIN_MODE_DEFAULT(3) | \
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EFI_PIN_MODE_DEFAULT(4) | \
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EFI_PIN_MODE_DEFAULT(5) | \
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EFI_PIN_MODE_DEFAULT(6) | \
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EFI_PIN_MODE_DEFAULT(7) | \
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EFI_PIN_MODE_DEFAULT(8) | \
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EFI_PIN_MODE_DEFAULT(9) | \
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EFI_PIN_MODE_DEFAULT(10) | \
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EFI_PIN_MODE_DEFAULT(11) | \
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EFI_PIN_MODE_DEFAULT(12) | \
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EFI_PIN_MODE_DEFAULT(13) | \
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EFI_PIN_MODE_DEFAULT(14) | \
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EFI_PIN_MODE_DEFAULT(15))
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#define VAL_GPIO_OTYPER_ALL_DEFAULT (PIN_OTYPE_PUSHPULL(0) | \
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PIN_OTYPE_PUSHPULL(1) | \
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PIN_OTYPE_PUSHPULL(2) | \
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PIN_OTYPE_PUSHPULL(3) | \
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PIN_OTYPE_PUSHPULL(4) | \
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PIN_OTYPE_PUSHPULL(5) | \
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PIN_OTYPE_PUSHPULL(6) | \
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PIN_OTYPE_PUSHPULL(7) | \
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PIN_OTYPE_PUSHPULL(8) | \
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PIN_OTYPE_PUSHPULL(9) | \
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PIN_OTYPE_PUSHPULL(10) | \
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PIN_OTYPE_PUSHPULL(11) | \
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PIN_OTYPE_PUSHPULL(12) | \
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PIN_OTYPE_PUSHPULL(13) | \
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PIN_OTYPE_PUSHPULL(14) | \
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PIN_OTYPE_PUSHPULL(15))
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#define VAL_GPIO_OSPEEDR_ALL_DEFAULT (DEFAULT_GPIO_SPEED(0) | \
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DEFAULT_GPIO_SPEED(1) | \
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DEFAULT_GPIO_SPEED(2) | \
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DEFAULT_GPIO_SPEED(3) | \
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DEFAULT_GPIO_SPEED(4) | \
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DEFAULT_GPIO_SPEED(5) | \
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DEFAULT_GPIO_SPEED(6) | \
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DEFAULT_GPIO_SPEED(7) | \
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DEFAULT_GPIO_SPEED(8) | \
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DEFAULT_GPIO_SPEED(9) | \
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DEFAULT_GPIO_SPEED(10) | \
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DEFAULT_GPIO_SPEED(11) | \
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DEFAULT_GPIO_SPEED(12) | \
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DEFAULT_GPIO_SPEED(13) | \
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DEFAULT_GPIO_SPEED(14) | \
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DEFAULT_GPIO_SPEED(15))
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#define VAL_GPIO_ODR_ALL_DEFAULT 0
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#define VAL_GPIO_PUPDR_ALL_DEFAULT (EFI_DR_DEFAULT(0) | \
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EFI_DR_DEFAULT(1) | \
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EFI_DR_DEFAULT(2) | \
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EFI_DR_DEFAULT(3) | \
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EFI_DR_DEFAULT(4) | \
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EFI_DR_DEFAULT(5) | \
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EFI_DR_DEFAULT(6) | \
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EFI_DR_DEFAULT(7) | \
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EFI_DR_DEFAULT(8) | \
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EFI_DR_DEFAULT(9) | \
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EFI_DR_DEFAULT(10) | \
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EFI_DR_DEFAULT(11) | \
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EFI_DR_DEFAULT(12) | \
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EFI_DR_DEFAULT(13) | \
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EFI_DR_DEFAULT(14) | \
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EFI_DR_DEFAULT(15))
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#define VAL_GPIO_AF_ALL_DEFAULT (PIN_AFIO_AF(0, 0U) | \
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PIN_AFIO_AF(1, 0U) | \
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PIN_AFIO_AF(2, 0U) | \
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PIN_AFIO_AF(3, 0U) | \
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PIN_AFIO_AF(4, 0U) | \
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PIN_AFIO_AF(5, 0U) | \
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PIN_AFIO_AF(6, 0U) | \
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PIN_AFIO_AF(7, 0U))
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#define VAL_GPIOA_MODER (EFI_PIN_MODE_DEFAULT(0) | \
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EFI_PIN_MODE_DEFAULT(1) | \
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EFI_PIN_MODE_DEFAULT(2) | \
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EFI_PIN_MODE_DEFAULT(3) | \
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EFI_PIN_MODE_DEFAULT(4) | \
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EFI_PIN_MODE_DEFAULT(5) | \
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EFI_PIN_MODE_DEFAULT(6) | \
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EFI_PIN_MODE_DEFAULT(7) | \
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EFI_PIN_MODE_DEFAULT(8) | \
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EFI_PIN_MODE_DEFAULT(9) | \
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EFI_PIN_MODE_DEFAULT(10) | \
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EFI_PIN_MODE_DEFAULT(11) | \
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EFI_PIN_MODE_DEFAULT(12) | \
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PIN_MODE_ALTERNATE(13) | \
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PIN_MODE_ALTERNATE(14) | \
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EFI_PIN_MODE_DEFAULT(15))
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#define VAL_GPIOA_OTYPER VAL_GPIO_OTYPER_ALL_DEFAULT
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#define VAL_GPIOA_OSPEEDR VAL_GPIO_OSPEEDR_ALL_DEFAULT
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#define VAL_GPIOA_PUPDR VAL_GPIO_PUPDR_ALL_DEFAULT
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#define VAL_GPIOA_ODR VAL_GPIO_ODR_ALL_DEFAULT
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#define VAL_GPIOA_AFRL (PIN_AFIO_AF(0, 0U) | \
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PIN_AFIO_AF(1, 0U) | \
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PIN_AFIO_AF(2, 0U) | \
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PIN_AFIO_AF(3, 0U) | \
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PIN_AFIO_AF(4, 6U) | \
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PIN_AFIO_AF(5, 5U) | \
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PIN_AFIO_AF(6, 5U) | \
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PIN_AFIO_AF(7, 5U))
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#define VAL_GPIOA_AFRH VAL_GPIO_AF_ALL_DEFAULT
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/*
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* GPIOB setup:
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*/
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#define VAL_GPIOB_MODER (EFI_PIN_MODE_DEFAULT(0) | \
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EFI_PIN_MODE_DEFAULT(1) | \
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EFI_PIN_MODE_DEFAULT(2) | \
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EFI_PIN_MODE_DEFAULT(3) | \
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EFI_PIN_MODE_DEFAULT(4) | \
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EFI_PIN_MODE_DEFAULT(5) | \
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EFI_PIN_MODE_DEFAULT(6) | \
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EFI_PIN_MODE_DEFAULT(7) | \
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EFI_PIN_MODE_DEFAULT(8) | \
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EFI_PIN_MODE_DEFAULT(9) | \
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EFI_PIN_MODE_DEFAULT(10) | \
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EFI_PIN_MODE_DEFAULT(11) | \
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EFI_PIN_MODE_DEFAULT(12) | \
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EFI_PIN_MODE_DEFAULT(13) | \
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EFI_PIN_MODE_DEFAULT(14) | \
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EFI_PIN_MODE_DEFAULT(15))
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#define VAL_GPIOB_OTYPER VAL_GPIO_OTYPER_ALL_DEFAULT
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#define VAL_GPIOB_OSPEEDR VAL_GPIO_OSPEEDR_ALL_DEFAULT
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#define VAL_GPIOB_PUPDR VAL_GPIO_PUPDR_ALL_DEFAULT
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#define VAL_GPIOB_ODR VAL_GPIO_ODR_ALL_DEFAULT
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#define VAL_GPIOB_AFRL VAL_GPIO_AF_ALL_DEFAULT
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#define VAL_GPIOB_AFRH VAL_GPIO_AF_ALL_DEFAULT
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/*
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* GPIOC setup:
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* 8 BIT MODE
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* PC8 - MMC D0
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* PC9 - MMC D1
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* PC10 - MMC D2
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* PC11 - MMC D3
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* PC12 - CLK
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* 1 BIT MODE
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* PC8 - MMC D0
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* PC12 - CLK
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* NOW IS SETUP FOR 1 BIT SDIO
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*/
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#define VAL_GPIOC_MODER (EFI_PIN_MODE_DEFAULT(0) | \
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EFI_PIN_MODE_DEFAULT(1) | \
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EFI_PIN_MODE_DEFAULT(2) | \
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EFI_PIN_MODE_DEFAULT(3) | \
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EFI_PIN_MODE_DEFAULT(4) | \
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EFI_PIN_MODE_DEFAULT(5) | \
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EFI_PIN_MODE_DEFAULT(6) | \
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EFI_PIN_MODE_DEFAULT(7) | \
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PIN_MODE_ALTERNATE(8) | \
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EFI_PIN_MODE_DEFAULT(9) | \
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EFI_PIN_MODE_DEFAULT(10) | \
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EFI_PIN_MODE_DEFAULT(11) | \
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PIN_MODE_ALTERNATE(12) | \
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EFI_PIN_MODE_DEFAULT(13) | \
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EFI_PIN_MODE_DEFAULT(14) | \
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EFI_PIN_MODE_DEFAULT(15))
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#define VAL_GPIOC_OTYPER (PIN_OTYPE_PUSHPULL( 0) | \
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PIN_OTYPE_PUSHPULL( 1) | \
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PIN_OTYPE_PUSHPULL( 2) | \
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PIN_OTYPE_PUSHPULL( 3) | \
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PIN_OTYPE_PUSHPULL( 4) | \
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PIN_OTYPE_PUSHPULL( 5) | \
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PIN_OTYPE_PUSHPULL( 6)| \
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PIN_OTYPE_PUSHPULL( 7)| \
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PIN_OTYPE_PUSHPULL( 8)| \
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PIN_OTYPE_PUSHPULL( 9) | \
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PIN_OTYPE_PUSHPULL(10) | \
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PIN_OTYPE_PUSHPULL(11) | \
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PIN_OTYPE_PUSHPULL(12) | \
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PIN_OTYPE_PUSHPULL(13) | \
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PIN_OTYPE_PUSHPULL(14)| \
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PIN_OTYPE_PUSHPULL(15))
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#define VAL_GPIOC_OSPEEDR (PIN_OSPEED_HIGH( 0) | \
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PIN_OSPEED_HIGH( 1) | \
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PIN_OSPEED_HIGH( 2) | \
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PIN_OSPEED_HIGH( 3) | \
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PIN_OSPEED_HIGH( 4) | \
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PIN_OSPEED_HIGH( 5) | \
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PIN_OSPEED_HIGH( 6) | \
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PIN_OSPEED_HIGH( 7) | \
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DEFAULT_GPIO_SPEED( 8) | \
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PIN_OSPEED_HIGH( 9) | \
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DEFAULT_GPIO_SPEED(10) | \
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DEFAULT_GPIO_SPEED(11) | \
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DEFAULT_GPIO_SPEED(12) | \
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PIN_OSPEED_HIGH(13) | \
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PIN_OSPEED_HIGH(14) | \
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PIN_OSPEED_HIGH(15))
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#define VAL_GPIOC_PUPDR (PIN_PUPDR_PULLDOWN( 0) | \
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PIN_PUPDR_PULLDOWN( 1) | \
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PIN_PUPDR_PULLDOWN( 2) | \
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PIN_PUPDR_PULLDOWN( 3) | \
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PIN_PUPDR_PULLDOWN( 4) | \
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PIN_PUPDR_PULLDOWN( 5) | \
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PIN_PUPDR_PULLDOWN( 6) | \
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PIN_PUPDR_PULLDOWN( 7) | \
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PIN_PUPDR_FLOATING( 8) | \
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PIN_PUPDR_PULLDOWN( 9) | \
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PIN_PUPDR_FLOATING(10) | \
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PIN_PUPDR_FLOATING(11) | \
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PIN_PUPDR_FLOATING(12) | \
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PIN_PUPDR_PULLDOWN(13) | \
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PIN_PUPDR_PULLDOWN(14) | \
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PIN_PUPDR_PULLDOWN(15))
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#define VAL_GPIOC_ODR (PIN_ODR_LOW(0) | \
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PIN_ODR_LOW(2) | \
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PIN_ODR_LOW(3) | \
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PIN_ODR_LOW(6) | \
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PIN_ODR_LOW(7) | \
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PIN_ODR_LOW(8) | \
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PIN_ODR_LOW(9) | \
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PIN_ODR_LOW(10) | \
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PIN_ODR_LOW(11) | \
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PIN_ODR_LOW(12) | \
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PIN_ODR_LOW(14))
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#define VAL_GPIOC_AFRL (PIN_AFIO_AF( 0, 0U) | \
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PIN_AFIO_AF( 1, 0U) | \
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PIN_AFIO_AF( 2, 0U) | \
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PIN_AFIO_AF( 3, 0U) | \
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PIN_AFIO_AF( 4, 0U) | \
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PIN_AFIO_AF( 5, 0U) | \
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PIN_AFIO_AF( 6, 0U) | \
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PIN_AFIO_AF( 7, 0U))
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#define VAL_GPIOC_AFRH (PIN_AFIO_AF( 8, 12U) | \
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PIN_AFIO_AF( 9, 0U) | \
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PIN_AFIO_AF(10, 0U) | \
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PIN_AFIO_AF(11, 0U) | \
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PIN_AFIO_AF(12, 12U) | \
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PIN_AFIO_AF(13, 0U) | \
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PIN_AFIO_AF(14, 0U) | \
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PIN_AFIO_AF(15, 0U))
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/*
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* GPIOD setup:
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* PD2 - CMD
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*/
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#define VAL_GPIOD_MODER (EFI_PIN_MODE_DEFAULT(0) | \
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EFI_PIN_MODE_DEFAULT(1) | \
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PIN_MODE_ALTERNATE(2) | \
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EFI_PIN_MODE_DEFAULT(3) | \
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EFI_PIN_MODE_DEFAULT(4) | \
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EFI_PIN_MODE_DEFAULT(5) | \
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EFI_PIN_MODE_DEFAULT(6) | \
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EFI_PIN_MODE_DEFAULT(7) | \
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EFI_PIN_MODE_DEFAULT(8) | \
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EFI_PIN_MODE_DEFAULT(9) | \
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EFI_PIN_MODE_DEFAULT(10) | \
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EFI_PIN_MODE_DEFAULT(11) | \
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EFI_PIN_MODE_DEFAULT(12) | \
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EFI_PIN_MODE_DEFAULT(13) | \
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EFI_PIN_MODE_DEFAULT(14) | \
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EFI_PIN_MODE_DEFAULT(15))
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#define VAL_GPIOD_OTYPER (PIN_OTYPE_PUSHPULL( 0) | \
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PIN_OTYPE_PUSHPULL( 1) | \
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PIN_OTYPE_PUSHPULL( 2) | \
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PIN_OTYPE_PUSHPULL( 3) | \
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PIN_OTYPE_PUSHPULL( 4) | \
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PIN_OTYPE_PUSHPULL( 5) | \
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PIN_OTYPE_PUSHPULL( 6)| \
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PIN_OTYPE_PUSHPULL( 7)| \
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PIN_OTYPE_PUSHPULL( 8)| \
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PIN_OTYPE_PUSHPULL( 9) | \
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PIN_OTYPE_PUSHPULL(10) | \
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PIN_OTYPE_PUSHPULL(11) | \
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PIN_OTYPE_PUSHPULL(12) | \
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PIN_OTYPE_PUSHPULL(13) | \
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PIN_OTYPE_PUSHPULL(14)| \
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PIN_OTYPE_PUSHPULL(15))
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#define VAL_GPIOD_OSPEEDR (PIN_OSPEED_HIGH( 0) | \
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PIN_OSPEED_HIGH( 1) | \
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PIN_OSPEED_HIGH( 2) | \
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PIN_OSPEED_HIGH( 3) | \
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PIN_OSPEED_HIGH( 4) | \
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PIN_OSPEED_HIGH( 5) | \
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PIN_OSPEED_HIGH( 6) | \
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PIN_OSPEED_HIGH( 7) | \
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PIN_OSPEED_HIGH( 8) | \
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PIN_OSPEED_HIGH( 9) | \
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PIN_OSPEED_HIGH(10) | \
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PIN_OSPEED_HIGH(11) | \
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PIN_OSPEED_HIGH(12) | \
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PIN_OSPEED_HIGH(13) | \
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PIN_OSPEED_HIGH(14) | \
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PIN_OSPEED_HIGH(15))
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#define VAL_GPIOD_PUPDR (PIN_PUPDR_PULLDOWN( 0) | \
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PIN_PUPDR_PULLDOWN( 1) | \
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PIN_PUPDR_FLOATING( 2) | \
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PIN_PUPDR_PULLDOWN( 3) | \
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PIN_PUPDR_PULLDOWN( 4) | \
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PIN_PUPDR_PULLDOWN( 5) | \
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PIN_PUPDR_PULLDOWN( 6) | \
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PIN_PUPDR_PULLDOWN( 7) | \
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PIN_PUPDR_PULLDOWN( 8) | \
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PIN_PUPDR_PULLDOWN( 9) | \
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PIN_PUPDR_PULLDOWN(10) | \
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PIN_PUPDR_PULLDOWN(11) | \
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PIN_PUPDR_PULLDOWN(12) | \
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PIN_PUPDR_PULLDOWN(13) | \
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PIN_PUPDR_PULLDOWN(14) | \
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PIN_PUPDR_PULLDOWN(15))
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#define VAL_GPIOD_ODR (PIN_ODR_LOW(0) | \
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PIN_ODR_LOW(2) | \
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PIN_ODR_LOW(3) | \
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PIN_ODR_LOW(6) | \
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PIN_ODR_LOW(7) | \
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PIN_ODR_LOW(8) | \
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PIN_ODR_LOW(9) | \
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PIN_ODR_LOW(10) | \
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PIN_ODR_LOW(11) | \
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PIN_ODR_LOW(12) | \
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PIN_ODR_LOW(14))
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#define VAL_GPIOD_AFRL (PIN_AFIO_AF( 0, 0U) | \
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PIN_AFIO_AF( 1, 0U) | \
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PIN_AFIO_AF( 2, 12U) | \
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PIN_AFIO_AF( 3, 0U) | \
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PIN_AFIO_AF( 4, 0U) | \
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PIN_AFIO_AF( 5, 0U) | \
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PIN_AFIO_AF( 6, 0U) | \
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PIN_AFIO_AF( 7, 0U))
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#define VAL_GPIOD_AFRH (PIN_AFIO_AF( 8, 12U) | \
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PIN_AFIO_AF( 9, 12U) | \
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PIN_AFIO_AF(10, 12U) | \
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PIN_AFIO_AF(11, 12U) | \
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PIN_AFIO_AF(12, 12U) | \
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PIN_AFIO_AF(13, 0U) | \
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PIN_AFIO_AF(14, 0U) | \
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PIN_AFIO_AF(15, 0U))
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/*
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* GPIOE setup:
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*/
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#define VAL_GPIOE_MODER VAL_GPIO_MODER_ALL_DEFAULT
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#define VAL_GPIOE_OTYPER VAL_GPIO_OTYPER_ALL_DEFAULT
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#define VAL_GPIOE_OSPEEDR VAL_GPIO_OSPEEDR_ALL_DEFAULT
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#define VAL_GPIOE_PUPDR VAL_GPIO_PUPDR_ALL_DEFAULT
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#define VAL_GPIOE_ODR VAL_GPIO_ODR_ALL_DEFAULT
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#define VAL_GPIOE_AFRL VAL_GPIO_AF_ALL_DEFAULT
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#define VAL_GPIOE_AFRH VAL_GPIO_AF_ALL_DEFAULT
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/*
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* GPIOF setup:
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*/
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#define VAL_GPIOF_MODER VAL_GPIO_MODER_ALL_DEFAULT
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#define VAL_GPIOF_OTYPER VAL_GPIO_OTYPER_ALL_DEFAULT
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#define VAL_GPIOF_OSPEEDR VAL_GPIO_OSPEEDR_ALL_DEFAULT
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#define VAL_GPIOF_PUPDR VAL_GPIO_PUPDR_ALL_DEFAULT
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#define VAL_GPIOF_ODR VAL_GPIO_ODR_ALL_DEFAULT
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#define VAL_GPIOF_AFRL VAL_GPIO_AF_ALL_DEFAULT
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#define VAL_GPIOF_AFRH VAL_GPIO_AF_ALL_DEFAULT
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/*
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|
* GPIOG setup:
|
|
*/
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#define VAL_GPIOG_MODER VAL_GPIO_MODER_ALL_DEFAULT
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#define VAL_GPIOG_OTYPER VAL_GPIO_OTYPER_ALL_DEFAULT
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#define VAL_GPIOG_OSPEEDR VAL_GPIO_OSPEEDR_ALL_DEFAULT
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#define VAL_GPIOG_PUPDR VAL_GPIO_PUPDR_ALL_DEFAULT
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#define VAL_GPIOG_ODR VAL_GPIO_ODR_ALL_DEFAULT
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#define VAL_GPIOG_AFRL VAL_GPIO_AF_ALL_DEFAULT
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#define VAL_GPIOG_AFRH VAL_GPIO_AF_ALL_DEFAULT
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|
|
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/*
|
|
* GPIOH setup:
|
|
*/
|
|
#define VAL_GPIOH_MODER VAL_GPIO_MODER_ALL_DEFAULT
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#define VAL_GPIOH_OTYPER VAL_GPIO_OTYPER_ALL_DEFAULT
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#define VAL_GPIOH_OSPEEDR VAL_GPIO_OSPEEDR_ALL_DEFAULT
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#define VAL_GPIOH_PUPDR VAL_GPIO_PUPDR_ALL_DEFAULT
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|
#define VAL_GPIOH_ODR VAL_GPIO_ODR_ALL_DEFAULT
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|
#define VAL_GPIOH_AFRL VAL_GPIO_AF_ALL_DEFAULT
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#define VAL_GPIOH_AFRH VAL_GPIO_AF_ALL_DEFAULT
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|
|
|
/*
|
|
* GPIOI setup:
|
|
*/
|
|
#define VAL_GPIOI_MODER VAL_GPIO_MODER_ALL_DEFAULT
|
|
#define VAL_GPIOI_OTYPER VAL_GPIO_OTYPER_ALL_DEFAULT
|
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#define VAL_GPIOI_OSPEEDR VAL_GPIO_OSPEEDR_ALL_DEFAULT
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|
#define VAL_GPIOI_PUPDR VAL_GPIO_PUPDR_ALL_DEFAULT
|
|
#define VAL_GPIOI_ODR VAL_GPIO_ODR_ALL_DEFAULT
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|
#define VAL_GPIOI_AFRL VAL_GPIO_AF_ALL_DEFAULT
|
|
#define VAL_GPIOI_AFRH VAL_GPIO_AF_ALL_DEFAULT
|
|
|
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#endif /* BOARD_IO_H */
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