From 77179d78d0bdd13574305346ff2b99319a068851 Mon Sep 17 00:00:00 2001 From: Sandeep Mistry Date: Thu, 1 Oct 2015 15:53:15 -0400 Subject: [PATCH] Add support for repeated starts in slave mode From the data sheet TXCOMP is only set after a stop or repeated start and address change, but EOSACC is set for a stop or repeated start when the address remains the same. This change removes the check for TXCOMP when not idle, to support repeated starts for both RX and TX. --- hardware/arduino/sam/libraries/Wire/Wire.cpp | 36 +++++++++----------- 1 file changed, 17 insertions(+), 19 deletions(-) diff --git a/hardware/arduino/sam/libraries/Wire/Wire.cpp b/hardware/arduino/sam/libraries/Wire/Wire.cpp index 696a1ecaa..e69cd2d1b 100644 --- a/hardware/arduino/sam/libraries/Wire/Wire.cpp +++ b/hardware/arduino/sam/libraries/Wire/Wire.cpp @@ -321,27 +321,25 @@ void TwoWire::onService(void) { } } - if (status != SLAVE_IDLE) { - if (TWI_STATUS_TXCOMP(sr) && TWI_STATUS_EOSACC(sr)) { - if (status == SLAVE_RECV && onReceiveCallback) { - // Copy data into rxBuffer - // (allows to receive another packet while the - // user program reads actual data) - for (uint8_t i = 0; i < srvBufferLength; ++i) - rxBuffer[i] = srvBuffer[i]; - rxBufferIndex = 0; - rxBufferLength = srvBufferLength; + if (status != SLAVE_IDLE && TWI_STATUS_EOSACC(sr)) { + if (status == SLAVE_RECV && onReceiveCallback) { + // Copy data into rxBuffer + // (allows to receive another packet while the + // user program reads actual data) + for (uint8_t i = 0; i < srvBufferLength; ++i) + rxBuffer[i] = srvBuffer[i]; + rxBufferIndex = 0; + rxBufferLength = srvBufferLength; - // Alert calling program - onReceiveCallback( rxBufferLength); - } - - // Transfer completed - TWI_EnableIt(twi, TWI_SR_SVACC); - TWI_DisableIt(twi, TWI_IDR_RXRDY | TWI_IDR_GACC | TWI_IDR_NACK - | TWI_IDR_EOSACC | TWI_IDR_SCL_WS | TWI_IER_TXCOMP); - status = SLAVE_IDLE; + // Alert calling program + onReceiveCallback( rxBufferLength); } + + // Transfer completed + TWI_EnableIt(twi, TWI_SR_SVACC); + TWI_DisableIt(twi, TWI_IDR_RXRDY | TWI_IDR_GACC | TWI_IDR_NACK + | TWI_IDR_EOSACC | TWI_IDR_SCL_WS | TWI_IER_TXCOMP); + status = SLAVE_IDLE; } if (status == SLAVE_RECV) {