mirror of https://github.com/noisymime/Arduino.git
Fix issue on SPI RDRF
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ca9415ba25
commit
bdc4d0ab22
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@ -110,6 +110,7 @@ typedef struct sStatSpi
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int txErr;
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int rxErr;
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int wrongFrame;
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int frameDisalign;
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int lastCmd;
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int lastError;
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unsigned long status;
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@ -127,6 +128,7 @@ void initStatSpi()
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statSpi.timeoutErr= 0;
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statSpi.timeoutIntErr= 0;
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statSpi.wrongFrame = 0;
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statSpi.frameDisalign = 0;
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}
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void printStatSpi()
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@ -139,6 +141,7 @@ void printStatSpi()
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printk("spiTmoErr\t: 0x%x\n", statSpi.timeoutErr);
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printk("spiTmoIntErr\t: 0x%x\n", statSpi.timeoutIntErr);
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printk("wrongFrame\t: 0x%x\n", statSpi.wrongFrame);
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printk("disalFrame\t: 0x%x\n", statSpi.frameDisalign);
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}
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cmd_state_t
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@ -259,30 +262,6 @@ void showTTCPstatus()
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tcp_debug_print_pcbs();
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}
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inline spi_status_t myspi_read(volatile avr32_spi_t *spi, unsigned short *data)
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{
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if (spi->sr & AVR32_SPI_SR_RDRF_MASK)
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*data = spi->rdr >> AVR32_SPI_RDR_RD_OFFSET;
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return SPI_OK;
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}
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inline spi_status_t myspi_write(volatile avr32_spi_t *spi, unsigned short data)
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{
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unsigned int timeout = SPI_TIMEOUT;
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while (!(spi->sr & AVR32_SPI_SR_TDRE_MASK)) {
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if (!timeout--) {
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return SPI_ERROR_TIMEOUT;
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}
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}
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spi->tdr = data << AVR32_SPI_TDR_TD_OFFSET;
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return SPI_OK;
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}
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int write_stream(volatile avr32_spi_t *spi, const char *stream, uint16_t len)
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{
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uint16_t _len = 0;
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@ -307,44 +286,19 @@ int write_stream(volatile avr32_spi_t *spi, const char *stream, uint16_t len)
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else
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{
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stream++;
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unsigned long data = ARD_SPI->rdr;
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data = data;
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spi_read(spi,&dummy);
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}
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//SIGN1_UP();
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// if (myspi_read(spi, &dummy) == SPI_ERROR_TIMEOUT)
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// {
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// statSpi.timeoutErr++;
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// statSpi.rxErr++;
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// statSpi.lastError = SPI_ERROR_TIMEOUT;
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// statSpi.status = spi_getStatus(spi);
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// return SPI_ERROR_TIMEOUT;
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// }
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}while ((!streamExit)&&(_len++ <= len));
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end_write=true;
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//while (spi_readRegisterFullCheck(spi));
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spi_read(spi,&dummy);
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if ((ARD_SPI->sr & AVR32_SPI_SR_RDRF_MASK) != 0)
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{
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int a = 0;
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if ((ARD_SPI->sr & AVR32_SPI_SR_RDRF_MASK) != 0)
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a = rand();
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a=a+5;
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}
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if (!streamExit)
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{
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if (!streamExit)
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{
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#ifdef _SPI_STATS_
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statSpi.wrongFrame++;
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statSpi.lastError = SPI_ERROR_ARGUMENT;
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statSpi.wrongFrame++;
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statSpi.lastError = SPI_ERROR_ARGUMENT;
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#endif
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return SPI_ERROR_ARGUMENT;
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}
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if ((ARD_SPI->sr & AVR32_SPI_SR_RDRF_MASK) != 0)
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{
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//SIGN1_DN();
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}
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return SPI_ERROR_ARGUMENT;
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}
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return SPI_OK;
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}
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@ -357,21 +311,23 @@ void sendError()
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while(!spi_writeRegisterEmptyCheck(&AVR32_SPI));
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}
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BUSY_FOR_SPI();
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WARN("Send SPI error!");
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WARN("Send SPI error!\n");
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}
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#define ENABLE_SPI_INT() do { \
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#define ENABLE_SPI_INT() do { \
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volatile avr32_spi_t *spi = ARD_SPI; \
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Bool global_interrupt_enabled = Is_global_interrupt_enabled(); \
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if (global_interrupt_enabled) Disable_global_interrupt(); \
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ARD_SPI->IER.rdrf = 1; \
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ARD_SPI->IER.rxbuff = 1; ARD_SPI->IER.endrx = 1; \
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spi->IER.rdrf = 1; \
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spi->IER.rxbuff = 1; spi->IER.endrx = 1; \
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if (global_interrupt_enabled) Enable_global_interrupt(); \
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}while(0);
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#define DISABLE_SPI_INT() do { \
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volatile avr32_spi_t *spi = ARD_SPI; \
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Bool global_interrupt_enabled = Is_global_interrupt_enabled(); \
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if (global_interrupt_enabled) Disable_global_interrupt(); \
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ARD_SPI->IDR.rdrf = 1; ARD_SPI->IDR.rxbuff = 1; ARD_SPI->IDR.endrx = 1; \
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spi->IDR.rdrf = 1; spi->IDR.rxbuff = 1; spi->IDR.endrx = 1; \
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if (global_interrupt_enabled) Enable_global_interrupt(); \
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}while(0);
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@ -1494,6 +1450,8 @@ bool checkMsgFormat(uint8_t* _recv, int len, int* offset)
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if ((enableDebug & INFO_WARN_FLAG)&&(len < 20)) //TODO stamp only short messages wrong
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dump((char*)_recv, len);
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STATSPI_DISALIGN_ERROR();
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if (recv == NULL)
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return false;
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}
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@ -1552,15 +1510,6 @@ void spi_poll(struct netif* netif) {
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receivedChars = 0;
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count = 0;
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state = SPI_CMD_IDLE;
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if ((ARD_SPI->sr & AVR32_SPI_SR_RDRF_MASK) != 0)
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{
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unsigned long data = ARD_SPI->rdr;
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data = data;
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if ((ARD_SPI->sr & AVR32_SPI_SR_RDRF_MASK) != 0)
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{
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//SIGN1_DN();
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}
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}
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}
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else
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{
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@ -1577,9 +1526,18 @@ void spi_poll(struct netif* netif) {
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//Available for receiving a new spi data
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AVAIL_FOR_SPI();
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}
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#ifdef _SPI_STATS_
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if (statSpi.lastError != 0)
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{
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WARN("[E(0x%x) spiStatus:0x%x]\n", statSpi.lastError, statSpi.status);
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statSpi.lastError = 0;
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}
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#endif
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}
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inline int spi_slaveReceiveInt(volatile avr32_spi_t *spi, bool startRecvd)
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// ****TEMPORARY
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/*inline*/ int spi_slaveReceiveInt(volatile avr32_spi_t *spi, bool startRecvd)
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{
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receivedChars=0;
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int index = 0;
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@ -1595,20 +1553,15 @@ inline int spi_slaveReceiveInt(volatile avr32_spi_t *spi, bool startRecvd)
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}
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do {
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err = SPI_OK;
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//SIGN1_DN();
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//spi->tdr = DUMMY_DATA << AVR32_SPI_TDR_TD_OFFSET;
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while ((spi->sr & (AVR32_SPI_SR_RDRF_MASK | AVR32_SPI_SR_TXEMPTY_MASK)) !=
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(AVR32_SPI_SR_RDRF_MASK | AVR32_SPI_SR_TXEMPTY_MASK)) {
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if (!timeout--) {
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if ((timeout--)==0) {
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err=SPI_ERROR_TIMEOUT;
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break;
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}
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}
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_receiveBuffer[index] = (spi->rdr >> AVR32_SPI_RDR_RD_OFFSET) & 0x00ff;
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if (_receiveBuffer[index] == START_CMD){
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TOGGLE_SIG0();
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//SIGN1_UP();
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}
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if (err == SPI_OK) {
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++index;
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++receivedChars;
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@ -1629,10 +1582,6 @@ inline int spi_slaveReceiveInt(volatile avr32_spi_t *spi, bool startRecvd)
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return err;
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}
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uint32_t data = 0;
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uint32_t status_register = 0;
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#if defined (__GNUC__)
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__attribute__((__interrupt__))
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#elif defined (__ICCAVR32__)
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@ -1640,40 +1589,28 @@ __interrupt
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#endif
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static void spi_int_handler(void)
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{
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//SIGN2_DN();
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volatile avr32_spi_t *spi = ARD_SPI;
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//DEB_PIN_DN();
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//eic_clear_interrupt_line(&AVR32_EIC, AVR32_SPI0_IRQ);
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AVAIL_FOR_SPI();
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DISABLE_SPI_INT();
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//TODO verify why after the reply write the RDRF is set
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unsigned short dummy = 0;
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if ((end_write)&&((ARD_SPI->sr & AVR32_SPI_SR_RDRF_MASK) != 0)) {
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end_write=false;
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//SIGN1_UP();
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spi_read(ARD_SPI, &dummy);
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}
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if (((ARD_SPI->sr & AVR32_SPI_SR_RDRF_MASK) != 0)||(dummy==START_CMD))
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if (((spi->sr & AVR32_SPI_SR_RDRF_MASK) != 0)||(dummy==START_CMD))
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{
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int err = spi_slaveReceiveInt(ARD_SPI, dummy==START_CMD);
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if (err != SPI_OK)
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if (err == SPI_OK)
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{
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#ifdef _SPI_STATS_
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//TODO verify why at the end of cmd cycle RDF bit is high without any data recv.
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if (statSpi.lastError != SPI_ERROR_TIMEOUT)
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INFO_SPI("[E(0x%x):%d spiStatus:%d]\n", statSpi.lastError, err, statSpi.status);
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#endif
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}else{
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BUSY_FOR_SPI();
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startReply=true;
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//maintain disable interrupt to send the reply command
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//SIGN2_UP();
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//DEB_PIN_UP();
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return;
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}
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}
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ENABLE_SPI_INT();
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//SIGN2_UP();
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//DEB_PIN_UP();
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}
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inline spi_status_t spi_read8(volatile avr32_spi_t *spi, unsigned char *data)
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@ -37,9 +37,9 @@ typedef enum {
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CMD_IMM_SET_FLAG = 0x04,
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}cmd_flags;
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#define TIMEOUT_SPI 200
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//#define TIMEOUT_SENT_REPLY 1000
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#define DUMMY_DATA 0xFF
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#define TIMEOUT_SPI 200
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#define SPI_ALIGN_ERROR 0xF0
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#define DUMMY_DATA 0xFF
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typedef int (*cmd_spi_cb_t)(int numParam, char* buf, void* ctx);
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typedef cmd_spi_state_t (*cmd_spi_rcb_t)(char* recv, char* reply, void* ctx, uint16_t* _count);
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@ -197,17 +197,29 @@
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GET_PARAM_##TYPE(PARAM, DATA) \
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NEXT_PARAM(PARAM)
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#ifdef _SPI_STATS_
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#define STATSPI_TIMEOUT_ERROR() \
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statSpi.timeoutIntErr++; \
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statSpi.rxErr++; \
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statSpi.lastError = err; \
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statSpi.status = spi_getStatus(ARD_SPI);
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#define STATSPI_DISALIGN_ERROR() \
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statSpi.frameDisalign++; \
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statSpi.rxErr++; \
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statSpi.lastError = SPI_ALIGN_ERROR; \
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statSpi.status = spi_getStatus(ARD_SPI);
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#define STATSPI_TX_TIMEOUT_ERROR() \
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statSpi.timeoutErr++; \
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statSpi.txErr++; \
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statSpi.lastError = SPI_ERROR_TIMEOUT; \
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statSpi.status = spi_getStatus(ARD_SPI);
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#else
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#define STATSPI_TIMEOUT_ERROR()
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#define STATSPI_TX_TIMEOUT_ERROR()
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#define STATSPI_DISALIGN_ERROR()
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#endif
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#define DUMP_TCP_STATE(TTCP) \
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INFO_TCP("ttcp:%p tpcb:%p state:%d lpcb:%p state:%d\n", \
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@ -89,8 +89,14 @@ bool scanNetCompleted = false;
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static bool initSpiComplete = false;
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// variable used as enable flag for debug prints
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#ifdef _DEBUG_
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uint16_t enableDebug = DEFAULT_INFO_FLAG | INFO_WARN_FLAG;// | INFO_SPI_FLAG;
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uint16_t verboseDebug = 0;
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#else
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uint16_t enableDebug = DEFAULT_INFO_FLAG;
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uint16_t verboseDebug = 0;
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#endif
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/**
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*
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@ -294,7 +300,7 @@ void initShell()
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console_add_cmd("wpass", cmd_setpass, NULL);
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console_add_cmd("dpass", cmd_delpass, NULL);
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#endif
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#ifdef STAT_SPI
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#ifdef _SPI_STATS_
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console_add_cmd("spiStat", cmd_statSpi, NULL);
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console_add_cmd("resetSpiStat", cmd_resetStatSpi, NULL);
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#endif
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