diff --git a/binary/wifiHD.elf b/binary/wifiHD.elf
index 9217d48ae..bf0efe335 100644
Binary files a/binary/wifiHD.elf and b/binary/wifiHD.elf differ
diff --git a/binary/wifi_dnld.elf b/binary/wifi_dnld.elf
index 7ccbf4d3d..57cdfdfc2 100644
Binary files a/binary/wifi_dnld.elf and b/binary/wifi_dnld.elf differ
diff --git a/wifiHD/.cproject b/wifiHD/.cproject
index e104cc5f8..fa7fcdd69 100644
--- a/wifiHD/.cproject
+++ b/wifiHD/.cproject
@@ -1120,12 +1120,12 @@
diff --git a/wifiHD/.project b/wifiHD/.project
index c284bab1b..af5155341 100644
--- a/wifiHD/.project
+++ b/wifiHD/.project
@@ -27,7 +27,7 @@
org.eclipse.cdt.make.core.buildLocation
- ${workspace_loc:/wifiHD/Debug}
+ ${workspace_loc:/wifiHD/Release}
org.eclipse.cdt.make.core.contents
diff --git a/wifiHD/Release/wifiHD.elf b/wifiHD/Release/wifiHD.elf
index 9217d48ae..bf0efe335 100644
Binary files a/wifiHD/Release/wifiHD.elf and b/wifiHD/Release/wifiHD.elf differ
diff --git a/wifiHD/src/ard_spi.c b/wifiHD/src/ard_spi.c
index 3a60f7e0e..dddfc470c 100644
--- a/wifiHD/src/ard_spi.c
+++ b/wifiHD/src/ard_spi.c
@@ -169,7 +169,7 @@ static struct wl_network_list_t network_list = { 0 };
struct ip_addr _hostIpAddr;
-static hostIpAddrFound = false;
+static bool hostIpAddrFound = false;
void* getTTCP(uint8_t sock)
{
diff --git a/wifiHD/src/board_init.c b/wifiHD/src/board_init.c
new file mode 100644
index 000000000..5e5d7e98b
--- /dev/null
+++ b/wifiHD/src/board_init.c
@@ -0,0 +1,297 @@
+/*! \page License
+ * Copyright (C) 2009, H&D Wireless AB All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. The name of H&D Wireless AB may not be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY H&D WIRELESS AB ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
+ * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include
+#include
+#include
+#include
+#include
+#ifdef WITH_SDRAM
+ #include
+#endif
+#include
+#include
+
+#ifndef NO_SERIAL /* The bootloader does not want serial port
+ * code */
+#include
+
+int board_putchar(char c)
+{
+ int timeout = USART_DEFAULT_TIMEOUT;
+ if (c == '\n') {
+ do {
+ if (!timeout--)
+ return USART_FAILURE;
+ } while (usart_write_char(&CONFIG_CONSOLE_PORT, '\r') !=
+ USART_SUCCESS);
+
+ timeout = USART_DEFAULT_TIMEOUT;
+ }
+
+ do {
+ if (!timeout--)
+ return USART_FAILURE;
+ } while (usart_write_char(&CONFIG_CONSOLE_PORT, c) != USART_SUCCESS);
+
+ return USART_SUCCESS;
+}
+#endif /* NO_SERIAL */
+/**
+ * Initializes the MCU system clocks.
+ */
+static void
+init_sys_clocks(void)
+{
+
+ /* if we don't run on OSC0 don't switch to it since we don't know
+ * what kind of oscillator we have here
+ */
+
+#if OSC == 0
+ /* switch to OSC0 to speed up the booting */
+ pm_switch_to_osc0(&AVR32_PM, FOSC0, OSC0_STARTUP);
+#endif
+
+
+#ifndef USE_PLL
+ return;
+#endif
+
+ /* For audio, ee have to use OSC1 on to generate the correct clockrate
+ * for the SSC
+ */
+#if OSC == 1
+ /* start oscillator1 */
+ pm_enable_osc1_crystal(&AVR32_PM, FOSC1);
+ pm_enable_clk1(&AVR32_PM, OSC1_STARTUP);
+#endif
+
+ /* configure pll multipliers */
+ pm_pll_setup(&AVR32_PM,
+ 0, /* pll */
+ PLL_MUL, /* mul */
+ 1, /* div */
+ OSC, /* osc */
+ 16); /* lockcount */
+
+ /* set PLL operating range and divider (fpll = fvco/2)
+ * this gives PLL output = 66 MHz (62.0928 MHz for EVK1105/OSC1)
+ */
+ pm_pll_set_option(&AVR32_PM,
+ 0, /* pll */
+ 1, /* pll_freq */
+ 1, /* pll_div2 */
+ 0); /* pll_wbwdisable. */
+
+
+ /* start PLL0 and wait for the lock */
+ pm_pll_enable(&AVR32_PM, 0);
+ pm_wait_for_pll0_locked(&AVR32_PM);
+
+ /* Set all peripheral clocks torun at master clock rate */
+ pm_cksel(&AVR32_PM,
+ 0, /* pbadiv */
+ 0, /* pbasel */
+ 0, /* pbbdiv */
+ 0, /* pbbsel */
+ 0, /* hsbdiv */
+ 0); /* hsbsel */
+
+ /* Set one waitstate for the flash */
+ flashc_set_wait_state(1);
+
+ /* Switch to PLL0 as the master clock */
+ pm_switch_to_clock(&AVR32_PM, AVR32_PM_MCCTRL_MCSEL_PLL0);
+}
+
+static void init_exceptions(void)
+{
+ extern void _evba;
+ Set_system_register(AVR32_EVBA, (int)&_evba);
+ Enable_global_exception();
+}
+
+static void init_hmatrix(void)
+{
+ union {
+ unsigned long scfg;
+ avr32_hmatrix_scfg_t SCFG;
+ } u_avr32_hmatrix_scfg = {
+ AVR32_HMATRIX.scfg[AVR32_HMATRIX_SLAVE_FLASH]
+ };
+ u_avr32_hmatrix_scfg.SCFG.defmstr_type =
+ AVR32_HMATRIX_DEFMSTR_TYPE_LAST_DEFAULT;
+ AVR32_HMATRIX.scfg[AVR32_HMATRIX_SLAVE_FLASH] =
+ u_avr32_hmatrix_scfg.scfg;
+}
+
+static void init_interrupts(void)
+{
+ INTC_init_interrupts();
+ Enable_global_interrupt();
+}
+
+static void init_spi(void)
+{
+#if defined(WL_SPI)
+ int i;
+#endif
+
+
+#if defined(AT45DBX_SPI)
+ static const gpio_map_t AT45DBX_SPI_GPIO_MAP = {
+ { AT45DBX_SPI_SCK_PIN, AT45DBX_SPI_SCK_FUNCTION },
+ { AT45DBX_SPI_MISO_PIN, AT45DBX_SPI_MISO_FUNCTION },
+ { AT45DBX_SPI_MOSI_PIN, AT45DBX_SPI_MOSI_FUNCTION },
+ { AT45DBX_SPI_NPCS2_PIN, AT45DBX_SPI_NPCS2_FUNCTION },
+ };
+#endif
+
+
+#if defined(WL_SPI)
+ const gpio_map_t WL_SPI_GPIO_MAP = {
+#if defined(WL_SPI_NPCS0)
+ WL_SPI_NPCS0,
+#endif
+ WL_SPI_NPCS, WL_SPI_MISO, WL_SPI_MOSI, WL_SPI_SCK
+ };
+#endif
+
+#if defined(WL_SPI) || defined(AT45DBX_SPI)
+ spi_options_t spiOptions = {
+ .modfdis = 1 /* only param used by spi_initMaster() */
+ };
+#endif
+
+#if defined(AT45DBX_SPI)
+ gpio_enable_module(AT45DBX_SPI_GPIO_MAP,
+ sizeof(AT45DBX_SPI_GPIO_MAP) /
+ sizeof(AT45DBX_SPI_GPIO_MAP[0]));
+ spi_initMaster(AT45DBX_SPI, &spiOptions);
+ spi_selectionMode(AT45DBX_SPI, 0, 0, 0);
+#endif
+
+#if defined(WL_SPI)
+ /* same pins might be initialized twice here */
+ gpio_enable_module(WL_SPI_GPIO_MAP,
+ sizeof(WL_SPI_GPIO_MAP) /
+ sizeof(WL_SPI_GPIO_MAP[0]));
+ for (i = 0; i < sizeof(WL_SPI_GPIO_MAP)/sizeof(WL_SPI_GPIO_MAP[0]); i++)
+ gpio_enable_pin_pull_up(WL_SPI_GPIO_MAP[i].pin);
+
+ /* same SPI controller might be initialized again */
+ spi_initMaster(&WL_SPI, &spiOptions);
+ spi_selectionMode(&WL_SPI, 0, 0, 0);
+#endif
+
+#if defined(AT45DBX_SPI)
+ spi_enable(AT45DBX_SPI);
+
+ /* put up flash reset pin */
+ gpio_set_gpio_pin(AT45DBX_CHIP_RESET);
+#endif
+
+#if defined(WL_SPI)
+ spi_enable(&WL_SPI);
+#endif
+}
+
+
+static void init_rs232(void)
+{
+#ifndef NO_SERIAL
+#if defined(BOARD_RS232_0)
+ const gpio_map_t BOARD_RS232_0_GPIO_MAP = {
+ BOARD_RS232_0_TX,
+ BOARD_RS232_0_RX,
+#if defined(BOARD_RS232_0_RTS) && defined (BOARD_RS232_0_CTS)
+ BOARD_RS232_0_RTS,
+ BOARD_RS232_0_CTS
+#endif
+
+ };
+#endif
+
+#if defined(BOARD_RS232_1)
+ const gpio_map_t BOARD_RS232_1_GPIO_MAP = {
+ BOARD_RS232_1_TX,
+ BOARD_RS232_1_RX
+#if defined(BOARD_RS232_1_RTS) && defined (BOARD_RS232_1_CTS)
+ BOARD_RS232_1_RTS,
+ BOARD_RS232_1_CTS
+#endif
+ };
+#endif
+
+#if defined(BOARD_RS232_0)
+ gpio_enable_module(BOARD_RS232_0_GPIO_MAP,
+ sizeof(BOARD_RS232_0_GPIO_MAP) /
+ sizeof(BOARD_RS232_0_GPIO_MAP[0]));
+#endif
+
+#if defined(BOARD_RS232_1)
+ gpio_enable_module(BOARD_RS232_1_GPIO_MAP,
+ sizeof(BOARD_RS232_1_GPIO_MAP) /
+ sizeof(BOARD_RS232_1_GPIO_MAP[0]));
+#endif
+#endif /* NO_SERIAL */
+}
+
+static void init_printk(void)
+{
+#ifndef NO_SERIAL
+#if defined(CONFIG_CONSOLE_PORT)
+ const usart_options_t usart_options = {
+ .baudrate = 57600,
+ .charlength = 8,
+ .paritytype = USART_NO_PARITY,
+ .stopbits = USART_1_STOPBIT,
+ .channelmode = USART_NORMAL_CHMODE
+ };
+ usart_init_rs232(&CONFIG_CONSOLE_PORT, &usart_options, FPBA_HZ);
+#endif
+#endif /* NO_SERIAL */
+}
+
+void board_init(void)
+{
+
+ init_exceptions();
+ init_hmatrix();
+ init_sys_clocks();
+ init_interrupts();
+
+ init_rs232();
+ init_printk();
+
+#ifdef WITH_SDRAM
+ sdramc_init(FHSB_HZ);
+#endif
+ init_spi();
+}
diff --git a/wifiHD/src/board_init.h b/wifiHD/src/board_init.h
new file mode 100644
index 000000000..05a660998
--- /dev/null
+++ b/wifiHD/src/board_init.h
@@ -0,0 +1,313 @@
+/*! \page License
+ * Copyright (C) 2009, H&D Wireless AB All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. The name of H&D Wireless AB may not be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY H&D WIRELESS AB ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
+ * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#ifndef STARTUP_H
+#define STARTUP_H
+
+#include
+#include /* defines SPB104, SPB105 */
+
+void board_init(void);
+
+
+
+/*
+ *
+ * EVK1100
+ * ---------------------------------------------------------------------------
+ *
+ */
+#if BOARD == EVK1100
+
+/* USART0 physical assignment */
+#define BOARD_RS232_0 AVR32_USART1
+#define BOARD_RS232_0_TX \
+ { AVR32_USART1_TXD_0_0_PIN, AVR32_USART1_TXD_0_0_FUNCTION }
+#define BOARD_RS232_0_RX \
+ { AVR32_USART1_RXD_0_0_PIN, AVR32_USART1_RXD_0_0_FUNCTION }
+
+/* USART1 physical assignment */
+#define BOARD_RS232_1 AVR32_USART0
+#define BOARD_RS232_1_TX \
+ { AVR32_USART0_TXD_0_0_PIN, AVR32_USART0_TXD_0_0_FUNCTION }
+#define BOARD_RS232_1_RX \
+ { AVR32_USART0_RXD_0_0_PIN, AVR32_USART0_RXD_0_0_FUNCTION },
+
+/* Clocks */
+#define USE_PLL
+#define OSC 0
+#define PLL_MUL 10
+
+/* Wifi (SPB104 only) */
+#if defined(EXT_BOARD)
+#if EXT_BOARD == SPB104
+#define WL_SPI AVR32_SPI1 /* Pin 8 NC, so no irq support if using SD-slot */
+#define WL_SPI_CLOCK_DIVIDER 3 /* due to adapter */
+#define WL_PDCA_PID_TX AVR32_PDCA_PID_SPI1_TX
+#define WL_PDCA_PID_RX AVR32_PDCA_PID_SPI1_RX
+#define WL_SPI_CS 1
+#define WL_SPI_NPCS0 { AVR32_SPI1_NPCS_0_0_PIN, AVR32_SPI1_NPCS_0_0_FUNCTION }
+#define WL_SPI_NPCS { AVR32_SPI1_NPCS_1_0_PIN, AVR32_SPI1_NPCS_1_0_FUNCTION }
+#define WL_SPI_MISO { AVR32_SPI1_MISO_0_0_PIN, AVR32_SPI1_MISO_0_0_FUNCTION }
+#define WL_SPI_MOSI { AVR32_SPI1_MOSI_0_0_PIN, AVR32_SPI1_MOSI_0_0_FUNCTION }
+#define WL_SPI_SCK { AVR32_SPI1_SCK_0_0_PIN, AVR32_SPI1_SCK_0_0_FUNCTION }
+#endif
+#endif /* EXT_BOARD */
+
+
+
+
+
+
+/*
+ *
+ * EVK1101
+ * ---------------------------------------------------------------------------
+ *
+ */
+#elif BOARD == EVK1101
+
+/* USART0 physical assignment */
+#define BOARD_RS232_0 AVR32_USART1
+#define BOARD_RS232_0_TX \
+ { AVR32_USART1_TXD_0_0_PIN, AVR32_USART1_TXD_0_0_FUNCTION }
+#define BOARD_RS232_0_RX \
+ { AVR32_USART1_RXD_0_0_PIN, AVR32_USART1_RXD_0_0_FUNCTION }
+
+/* Clocks */
+#define USE_PLL
+#define OSC 0
+#define PLL_MUL 9
+
+/* Wifi (SPB104 only) */
+#if defined(EXT_BOARD)
+#if EXT_BOARD == SPB104 /* Pin 8 NC, so no irq support if using SD-slot */
+#define WL_SPI AVR32_SPI
+#define WL_SPI_CLOCK_DIVIDER 3 /* due to adapter */
+#define WL_PDCA_PID_TX AVR32_PDCA_PID_SPI_TX
+#define WL_PDCA_PID_RX AVR32_PDCA_PID_SPI_RX
+#define WL_SPI_CS 1
+#if EXT_BOARD == SPB105
+ #define WL_SHUTDOWN_PIN AVR32_PIN_PA06
+ #define WL_POWER_PIN AVR32_PIN_PA30
+#endif
+#define WL_SPI_NPCS0 { AVR32_SPI_NPCS_0_0_PIN, AVR32_SPI_NPCS_0_0_FUNCTION }
+#define WL_SPI_NPCS { AVR32_SPI_NPCS_1_0_PIN, AVR32_SPI_NPCS_1_0_FUNCTION }
+#define WL_SPI_MISO { AVR32_SPI_MISO_0_0_PIN, AVR32_SPI_MISO_0_0_FUNCTION }
+#define WL_SPI_MOSI { AVR32_SPI_MOSI_0_0_PIN, AVR32_SPI_MOSI_0_0_FUNCTION }
+#define WL_SPI_SCK { AVR32_SPI_SCK_0_0_PIN, AVR32_SPI_SCK_0_0_FUNCTION }
+#endif
+#endif /* EXT_BOARD */
+
+
+
+
+
+
+
+/*
+ *
+ * EVK1104
+ * ---------------------------------------------------------------------------
+ *
+ */
+#elif BOARD == EVK1104 /* EVK1104 */
+
+/* USART0 physical assignment */
+#define BOARD_RS232_0 AVR32_USART1
+#define BOARD_RS232_0_TX \
+ { AVR32_USART1_TXD_0_0_PIN, AVR32_USART1_TXD_0_0_FUNCTION }
+#define BOARD_RS232_0_RX \
+ { AVR32_USART1_RXD_0_0_PIN, AVR32_USART1_RXD_0_0_FUNCTION }
+
+/* Clocks */
+#define USE_PLL
+#define OSC 0
+#define PLL_MUL 9 /* for some reason we cant use 66 MHz */
+
+/* Wifi (SDIO: SPB104 only; SPI: SPB105 only) */
+#if defined(EXT_BOARD)
+#if EXT_BOARD == SPB105
+ #define WL_SPI AVR32_SPI0
+ #define WL_PDCA_PID_TX AVR32_PDCA_PID_SPI0_TX
+ #define WL_PDCA_PID_RX AVR32_PDCA_PID_SPI0_RX
+ #define WL_SPI_CLOCK_DIVIDER 3 /* due to adapter */
+ #define WL_SHUTDOWN_PIN AVR32_PIN_PA17 /* Pin 8 on RF-head -> Pin 4 on wifi */
+ #define WL_IRQ_PIN AVR32_PIN_PA18 /* Pin 6 on RF-head -> Pin 3 on wifi */
+ #define WL_IRQ AVR32_GPIO_IRQ_2
+ #define WL_SPI_CS 3
+ #define WL_SPI_NPCS { AVR32_SPI0_NPCS_3_1_PIN, AVR32_SPI0_NPCS_3_1_FUNCTION }
+ #define WL_SPI_MISO { AVR32_SPI0_MISO_0_0_PIN, AVR32_SPI0_MISO_0_0_FUNCTION }
+ #define WL_SPI_MOSI { AVR32_SPI0_MOSI_0_0_PIN, AVR32_SPI0_MOSI_0_0_FUNCTION }
+ #define WL_SPI_SCK { AVR32_SPI0_SCK_0_0_PIN, AVR32_SPI0_SCK_0_0_FUNCTION }
+#elif EXT_BOARD == SPB104
+ #ifdef SDIO_SLOT_A
+ #define WL_SDIO_CLK { AVR32_MCI_CLK_0_PIN, AVR32_MCI_CLK_0_FUNCTION }
+ #define WL_SDIO_CMD { AVR32_MCI_CMD_0_PIN, AVR32_MCI_CMD_0_FUNCTION }
+ #define WL_SDIO_DAT0 { AVR32_MCI_DATA_0_PIN, AVR32_MCI_DATA_0_FUNCTION }
+ #define WL_SDIO_DAT1 { AVR32_MCI_DATA_1_PIN, AVR32_MCI_DATA_1_FUNCTION }
+ #define WL_SDIO_DAT2 { AVR32_MCI_DATA_2_PIN, AVR32_MCI_DATA_2_FUNCTION }
+ #define WL_SDIO_DAT3 { AVR32_MCI_DATA_3_PIN, AVR32_MCI_DATA_3_FUNCTION }
+ #else
+ #define WL_SDIO_CLK { AVR32_MCI_CLK_0_PIN, AVR32_MCI_CLK_0_FUNCTION }
+ #define WL_SDIO_CMD { AVR32_MCI_CMD_1_0_PIN, AVR32_MCI_CMD_1_0_FUNCTION }
+ #define WL_SDIO_DAT0 { AVR32_MCI_DATA_8_0_PIN, AVR32_MCI_DATA_8_0_FUNCTION }
+ #define WL_SDIO_DAT1 { AVR32_MCI_DATA_9_0_PIN, AVR32_MCI_DATA_9_0_FUNCTION }
+ #define WL_SDIO_DAT2 { AVR32_MCI_DATA_10_0_PIN, AVR32_MCI_DATA_10_0_FUNCTION }
+ #define WL_SDIO_DAT3 { AVR32_MCI_DATA_11_0_PIN, AVR32_MCI_DATA_11_0_FUNCTION }
+ #endif
+#endif
+#endif /* EXT_BOARD */
+
+
+
+
+
+
+
+/*
+ *
+ * EVK1105
+ * ---------------------------------------------------------------------------
+ *
+ */
+#elif BOARD == EVK1105 /* EVK1105 */
+
+
+/* USART0 physical assignment */
+#define BOARD_RS232_0 AVR32_USART0
+#define BOARD_RS232_0_TX \
+ { AVR32_USART0_TXD_0_0_PIN, AVR32_USART0_TXD_0_0_FUNCTION }
+#define BOARD_RS232_0_RX \
+ { AVR32_USART0_RXD_0_0_PIN, AVR32_USART0_RXD_0_0_FUNCTION }
+
+/* Clocks */
+#define USE_PLL
+#define OSC 1
+#define PLL_MUL 10
+
+/* Wifi SPB104/SPB105 */
+#if defined(EXT_BOARD)
+ #define WL_SPI AVR32_SPI0
+ #define WL_PDCA_PID_TX AVR32_PDCA_PID_SPI0_TX
+ #define WL_PDCA_PID_RX AVR32_PDCA_PID_SPI0_RX
+ #if EXT_BOARD == SPB105
+ #define WL_SPI_CLOCK_DIVIDER 3 /* due to adapter */
+ #define WL_SHUTDOWN_PIN AVR32_PIN_PB31 /* Pin 8 on RF-head -> Pin 4 on wifi */
+ #define WL_IRQ_PIN AVR32_PIN_PB30 /* Pin 6 on RF-head -> Pin 3 on wifi */
+ #define WL_IRQ AVR32_GPIO_IRQ_7
+ #define WL_SPI_CS 2
+ #elif EXT_BOARD == SPB104
+ #define WL_SPI_CLOCK_DIVIDER 3 /* due to adapter */
+ #define WL_SPI_CS 1
+ #endif
+ #define WL_SPI_NPCS0 { AVR32_SPI0_NPCS_0_0_PIN, AVR32_SPI0_NPCS_0_0_FUNCTION }
+ #if WL_SPI_CS == 1
+ #define WL_SPI_NPCS { AVR32_SPI0_NPCS_1_0_PIN, AVR32_SPI0_NPCS_1_0_FUNCTION }
+ #elif WL_SPI_CS == 2
+ #define WL_SPI_NPCS { AVR32_SPI0_NPCS_2_0_PIN, AVR32_SPI0_NPCS_2_0_FUNCTION }
+ #endif
+ #define WL_SPI_MISO { AVR32_SPI0_MISO_0_0_PIN, AVR32_SPI0_MISO_0_0_FUNCTION }
+ #define WL_SPI_MOSI { AVR32_SPI0_MOSI_0_0_PIN, AVR32_SPI0_MOSI_0_0_FUNCTION }
+ #define WL_SPI_SCK { AVR32_SPI0_SCK_0_0_PIN, AVR32_SPI0_SCK_0_0_FUNCTION }
+#endif /* EXT_BOARD */
+
+/*
+ *
+ * ARDUINO
+ * ---------------------------------------------------------------------------
+ *
+ */
+#elif BOARD == ARDUINO /* ARDUINO */
+
+
+/* USART0 physical assignment */
+#define BOARD_RS232_1 AVR32_USART1
+#define BOARD_RS232_1_TX \
+ { AVR32_USART1_TXD_0_0_PIN, AVR32_USART1_TXD_0_0_FUNCTION }
+#define BOARD_RS232_1_RX \
+ { AVR32_USART1_RXD_0_0_PIN, AVR32_USART1_RXD_0_0_FUNCTION }
+
+/* Clocks */
+#define USE_PLL
+#define OSC 0
+#define PLL_MUL 8
+
+#define WL_SPI AVR32_SPI1
+#define WL_PDCA_PID_TX AVR32_PDCA_PID_SPI1_TX
+#define WL_PDCA_PID_RX AVR32_PDCA_PID_SPI1_RX
+
+#define WL_SHUTDOWN_PIN AVR32_PIN_PA09
+#define WL_IRQ_PIN AVR32_PIN_PA03
+/*
+* WL_IRQ_# = (WL_IRQ_PIN / 32) * 4 + (WL_IRQ_PIN / 8) % 4
+ * 3 => 0 * 4 + 0 = 0
+*/
+#define WL_IRQ AVR32_GPIO_IRQ_0
+#define WL_SPI_CS 0
+#define WL_RESET_PIN AVR32_PIN_PA07
+#define WL_EXTERNAL_RESET 1
+
+
+#define WL_SPI_NPCS { AVR32_SPI1_NPCS_0_0_PIN, AVR32_SPI1_NPCS_0_0_FUNCTION }
+#define WL_SPI_MISO { AVR32_SPI1_MISO_0_0_PIN, AVR32_SPI1_MISO_0_0_FUNCTION }
+#define WL_SPI_MOSI { AVR32_SPI1_MOSI_0_0_PIN, AVR32_SPI1_MOSI_0_0_FUNCTION }
+#define WL_SPI_SCK { AVR32_SPI1_SCK_0_0_PIN, AVR32_SPI1_SCK_0_0_FUNCTION }
+
+#endif /* EVKxxxx */
+
+
+
+
+
+
+
+
+
+#if OSC == 0
+# define FOSC FOSC0 /* 12 MHz */
+#else
+# define FOSC FOSC1 /* 11.2896 MHz */
+#endif
+
+#ifdef USE_PLL
+# define FMCK_HZ ((FOSC * (PLL_MUL + 1)) / 2)
+#else
+# define FMCK_HZ FOSC
+#endif
+
+#define FCPU_HZ FMCK_HZ
+#define FHSB_HZ FCPU_HZ
+#define FPBB_HZ FMCK_HZ
+#define FPBA_HZ FMCK_HZ
+
+
+#ifndef CONFIG_CONSOLE_PORT
+#define CONFIG_CONSOLE_PORT BOARD_RS232_1
+#endif
+
+#endif
diff --git a/wifiHD/src/main.c b/wifiHD/src/main.c
index 60280ebb2..f7759d8d3 100644
--- a/wifiHD/src/main.c
+++ b/wifiHD/src/main.c
@@ -23,13 +23,11 @@
#include "netif/wlif.h"
#include "board_init.h"
-#include "startup.h"
#include "trace.h"
#include "timer.h"
#include "util.h"
#include "cmd_wl.h"
-#include "httpd.h"
#include "ping.h"
#include "ard_tcp.h"
#include "spi.h"
diff --git a/wifi_dnld/Release/wifi_dnld.elf b/wifi_dnld/Release/wifi_dnld.elf
new file mode 100644
index 000000000..57cdfdfc2
Binary files /dev/null and b/wifi_dnld/Release/wifi_dnld.elf differ