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Add a version number to the optiboot source and binary. 

http://code.google.com/p/arduino/issues/detail?id=554

end of flash memory where they can be read (at least in theory) by
device programmers, hex-file examination, or application programs.
This is done by putting the version number in a separate section
(".version"), and using linker/objcopy magic to locate that section as
appropriate for the target chip.  (See
http://lists.gnu.org/archive/html/avr-gcc-list/2011-02/msg00016.html
for some discussion on the details.)

Start the version at 4.1 (the last "packaged" version of optiboot was
called version 3, so the "top of source" would be 4.0, and adding the
version number makes 4.1)

Refactor LDSECTION in the Makefile to LDSECTIONS so that multiple
section start addresses can be defined.

Change the _isp makefile definitions to make the bootloader section
readable (but not writable) by the application section.  (This would
need to be done elsewhere as well to handle all bootloader programming
techniques.  Notably Arduino's boards.txt

Note that this change does not change the "code" portion of optiboot
at all.  The only diffs in the .hex files are the added version word
at the end of flash memory.
This commit is contained in:
WestfW 2011-06-10 17:47:47 -07:00
parent 64be388f3e
commit 2a83ee55b3
20 changed files with 783 additions and 728 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

26
bootloaders/optiboot/Makefile
View File

@ -36,7 +36,7 @@ ISPPORT = usb
ISPSPEED = -b 115200 ISPSPEED = -b 115200
MCU_TARGET = atmega168 MCU_TARGET = atmega168
LDSECTION = --section-start=.text=0x3e00 LDSECTIONS = -Wl,--section-start=.text=0x3e00 -Wl,--section-start=.version=0x3ffe
# Build environments # Build environments
# Start of some ugly makefile-isms to allow optiboot to be built # Start of some ugly makefile-isms to allow optiboot to be built
@ -88,7 +88,7 @@ endif
# http://tinker.it/now/2007/02/24/the-tale-of-avrdude-atmega168-and-extended-bits-fuses/ # http://tinker.it/now/2007/02/24/the-tale-of-avrdude-atmega168-and-extended-bits-fuses/
# #
# similarly, the lock bits should be 0xff instead of 0x3f (to # similarly, the lock bits should be 0xff instead of 0x3f (to
# unlock the bootloader section) and 0xcf instead of 0x0f (to # unlock the bootloader section) and 0xcf instead of 0x2f (to
# lock it), but since the high two bits of the lock byte are # lock it), but since the high two bits of the lock byte are
# unused, avrdude would get confused. # unused, avrdude would get confused.
@ -98,7 +98,7 @@ ISPFUSES = $(GCCROOT)avrdude $(AVRDUDE_CONF) -c $(ISPTOOL) \
-U hfuse:w:0x$(HFUSE):m -U lfuse:w:0x$(LFUSE):m -U hfuse:w:0x$(HFUSE):m -U lfuse:w:0x$(LFUSE):m
ISPFLASH = $(GCCROOT)avrdude $(AVRDUDE_CONF) -c $(ISPTOOL) \ ISPFLASH = $(GCCROOT)avrdude $(AVRDUDE_CONF) -c $(ISPTOOL) \
-p $(MCU_TARGET) -P $(ISPPORT) $(ISPSPEED) \ -p $(MCU_TARGET) -P $(ISPPORT) $(ISPSPEED) \
-U flash:w:$(PROGRAM)_$(TARGET).hex -U lock:w:0x0f:m -U flash:w:$(PROGRAM)_$(TARGET).hex -U lock:w:0x2f:m
STK500 = "C:\Program Files\Atmel\AVR Tools\STK500\Stk500.exe" STK500 = "C:\Program Files\Atmel\AVR Tools\STK500\Stk500.exe"
STK500-1 = $(STK500) -e -d$(MCU_TARGET) -pf -vf -if$(PROGRAM)_$(TARGET).hex \ STK500-1 = $(STK500) -e -d$(MCU_TARGET) -pf -vf -if$(PROGRAM)_$(TARGET).hex \
@ -116,7 +116,7 @@ CC = $(GCCROOT)avr-gcc
# Override is only needed by avr-lib build system. # Override is only needed by avr-lib build system.
override CFLAGS = -g -Wall $(OPTIMIZE) -mmcu=$(MCU_TARGET) -DF_CPU=$(AVR_FREQ) $(DEFS) override CFLAGS = -g -Wall $(OPTIMIZE) -mmcu=$(MCU_TARGET) -DF_CPU=$(AVR_FREQ) $(DEFS)
override LDFLAGS = -Wl,$(LDSECTION) -Wl,--relax -Wl,--gc-sections -nostartfiles -nostdlib override LDFLAGS = $(LDSECTIONS) -Wl,--relax -Wl,--gc-sections -nostartfiles -nostdlib
OBJCOPY = $(GCCROOT)avr-objcopy OBJCOPY = $(GCCROOT)avr-objcopy
OBJDUMP = $(call fixpath,$(GCCROOT)avr-objdump) OBJDUMP = $(call fixpath,$(GCCROOT)avr-objdump)
@ -129,7 +129,7 @@ virboot328: TARGET = atmega328
virboot328: MCU_TARGET = atmega328p virboot328: MCU_TARGET = atmega328p
virboot328: CFLAGS += '-DLED_START_FLASHES=3' '-DBAUD_RATE=115200' '-DVIRTUAL_BOOT' virboot328: CFLAGS += '-DLED_START_FLASHES=3' '-DBAUD_RATE=115200' '-DVIRTUAL_BOOT'
virboot328: AVR_FREQ = 16000000L virboot328: AVR_FREQ = 16000000L
virboot328: LDSECTION = --section-start=.text=0x7e00 virboot328: LDSECTIONS = --section-start=.text=0x7e00 -Wl,--section-start=.version=0x7ffe
virboot328: $(PROGRAM)_atmega328.hex virboot328: $(PROGRAM)_atmega328.hex
virboot328: $(PROGRAM)_atmega328.lst virboot328: $(PROGRAM)_atmega328.lst
@ -200,7 +200,7 @@ atmega328: TARGET = atmega328
atmega328: MCU_TARGET = atmega328p atmega328: MCU_TARGET = atmega328p
atmega328: CFLAGS += '-DLED_START_FLASHES=3' '-DBAUD_RATE=115200' atmega328: CFLAGS += '-DLED_START_FLASHES=3' '-DBAUD_RATE=115200'
atmega328: AVR_FREQ = 16000000L atmega328: AVR_FREQ = 16000000L
atmega328: LDSECTION = --section-start=.text=0x7e00 atmega328: LDSECTIONS = -Wl,--section-start=.text=0x7e00 -Wl,--section-start=.version=0x7ffe
atmega328: $(PROGRAM)_atmega328.hex atmega328: $(PROGRAM)_atmega328.hex
atmega328: $(PROGRAM)_atmega328.lst atmega328: $(PROGRAM)_atmega328.lst
@ -262,7 +262,7 @@ atmega8: TARGET = atmega8
atmega8: MCU_TARGET = atmega8 atmega8: MCU_TARGET = atmega8
atmega8: CFLAGS += '-DLED_START_FLASHES=3' '-DBAUD_RATE=115200' atmega8: CFLAGS += '-DLED_START_FLASHES=3' '-DBAUD_RATE=115200'
atmega8: AVR_FREQ = 16000000L atmega8: AVR_FREQ = 16000000L
atmega8: LDSECTION = --section-start=.text=0x1e00 atmega8: LDSECTIONS = --section-start=.text=0x1e00 -Wl,--section-start=.version=0x1ffe
atmega8: $(PROGRAM)_atmega8.hex atmega8: $(PROGRAM)_atmega8.hex
atmega8: $(PROGRAM)_atmega8.lst atmega8: $(PROGRAM)_atmega8.lst
@ -281,7 +281,7 @@ atmega88: TARGET = atmega88
atmega88: MCU_TARGET = atmega88 atmega88: MCU_TARGET = atmega88
atmega88: CFLAGS += '-DLED_START_FLASHES=3' '-DBAUD_RATE=115200' atmega88: CFLAGS += '-DLED_START_FLASHES=3' '-DBAUD_RATE=115200'
atmega88: AVR_FREQ = 16000000L atmega88: AVR_FREQ = 16000000L
atmega88: LDSECTION = --section-start=.text=0x1e00 atmega88: LDSECTIONS = --section-start=.text=0x1e00 -Wl,--section-start=.version=0x1ffe
atmega88: $(PROGRAM)_atmega88.hex atmega88: $(PROGRAM)_atmega88.hex
atmega88: $(PROGRAM)_atmega88.lst atmega88: $(PROGRAM)_atmega88.lst
@ -357,7 +357,7 @@ atmega328_pro8: TARGET = atmega328_pro_8MHz
atmega328_pro8: MCU_TARGET = atmega328p atmega328_pro8: MCU_TARGET = atmega328p
atmega328_pro8: CFLAGS += '-DLED_START_FLASHES=3' '-DBAUD_RATE=115200' atmega328_pro8: CFLAGS += '-DLED_START_FLASHES=3' '-DBAUD_RATE=115200'
atmega328_pro8: AVR_FREQ = 8000000L atmega328_pro8: AVR_FREQ = 8000000L
atmega328_pro8: LDSECTION = --section-start=.text=0x7e00 atmega328_pro8: LDSECTIONS = --section-start=.text=0x7e00 -Wl,--section-start=.version=0x7ffe
atmega328_pro8: $(PROGRAM)_atmega328_pro_8MHz.hex atmega328_pro8: $(PROGRAM)_atmega328_pro_8MHz.hex
atmega328_pro8: $(PROGRAM)_atmega328_pro_8MHz.lst atmega328_pro8: $(PROGRAM)_atmega328_pro_8MHz.lst
@ -382,7 +382,7 @@ luminet: MCU_TARGET = attiny84
luminet: CFLAGS += '-DLED_START_FLASHES=3' '-DSOFT_UART' '-DBAUD_RATE=9600' luminet: CFLAGS += '-DLED_START_FLASHES=3' '-DSOFT_UART' '-DBAUD_RATE=9600'
luminet: CFLAGS += '-DVIRTUAL_BOOT_PARTITION' luminet: CFLAGS += '-DVIRTUAL_BOOT_PARTITION'
luminet: AVR_FREQ = 1000000L luminet: AVR_FREQ = 1000000L
luminet: LDSECTION = --section-start=.text=0x1d00 luminet: LDSECTIONS = --section-start=.text=0x1d00 -Wl,--section-start=.version=0x1efe
luminet: $(PROGRAM)_luminet.hex luminet: $(PROGRAM)_luminet.hex
luminet: $(PROGRAM)_luminet.lst luminet: $(PROGRAM)_luminet.lst
@ -421,10 +421,10 @@ clean:
$(OBJDUMP) -h -S $< > $@ $(OBJDUMP) -h -S $< > $@
%.hex: %.elf %.hex: %.elf
$(OBJCOPY) -j .text -j .data -O ihex $< $@ $(OBJCOPY) -j .text -j .data -j .version --set-section-flags .version=alloc,load -O ihex $< $@
%.srec: %.elf %.srec: %.elf
$(OBJCOPY) -j .text -j .data -O srec $< $@ $(OBJCOPY) -j .text -j .data -j .version --set-section-flags .version=alloc,load -O srec $< $@
%.bin: %.elf %.bin: %.elf
$(OBJCOPY) -j .text -j .data -O binary $< $@ $(OBJCOPY) -j .text -j .data -j .version --set-section-flags .version=alloc,load -O binary $< $@

30
bootloaders/optiboot/optiboot.c
View File

@ -114,7 +114,37 @@
/* 500,1000,2000,4000,8000 supported. */ /* 500,1000,2000,4000,8000 supported. */
/* */ /* */
/**********************************************************/ /**********************************************************/
/**********************************************************/
/* Version Numbers! */
/* */
/* Arduino Optiboot now includes this Version number in */
/* the source and object code. */
/* */
/* Version 3 was released as zip from the optiboot */
/* repository and was distributed with Arduino 0022. */
/* Version 4 starts with the arduino repository commit */
/* that brought the arduino repository up-to-date with */
/* the optiboot source tree changes since v3. */
/* */
/**********************************************************/
/**********************************************************/
/* Edit History: */
/* */
/* 4.1 WestfW: put version number in binary. */
/**********************************************************/
#define OPTIBOOT_MAJVER 4
#define OPTIBOOT_MINVER 1
#define MAKESTR(a) #a
#define MAKEVER(a, b) MAKESTR(a*256+b)
asm(" .section .version\n"
"optiboot_version: .word " MAKEVER(OPTIBOOT_MAJVER, OPTIBOOT_MINVER) "\n"
" .section .text\n");
#include <inttypes.h> #include <inttypes.h>
#include <avr/io.h> #include <avr/io.h>
#include <avr/pgmspace.h> #include <avr/pgmspace.h>

1
bootloaders/optiboot/optiboot_atmega328.hex
View File

@ -30,5 +30,6 @@
:107FD00090838083089580E0F8DFEE27FF270994DF :107FD00090838083089580E0F8DFEE27FF270994DF
:107FE000E7DF803209F0F7DF84E1DACF1F93182F43 :107FE000E7DF803209F0F7DF84E1DACF1F93182F43
:0C7FF000DFDF1150E9F7F4DF1F91089566 :0C7FF000DFDF1150E9F7F4DF1F91089566
:027FFE0001047C
:0400000300007E007B :0400000300007E007B
:00000001FF :00000001FF

20
bootloaders/optiboot/optiboot_atmega328.lst
View File

@ -5,23 +5,25 @@ Sections:
Idx Name Size VMA LMA File off Algn Idx Name Size VMA LMA File off Algn
0 .text 000001fc 00007e00 00007e00 00000054 2**1 0 .text 000001fc 00007e00 00007e00 00000054 2**1
CONTENTS, ALLOC, LOAD, READONLY, CODE CONTENTS, ALLOC, LOAD, READONLY, CODE
1 .debug_aranges 00000028 00000000 00000000 00000250 2**0 1 .version 00000002 00007ffe 00007ffe 00000250 2**0
CONTENTS, READONLY
2 .debug_aranges 00000028 00000000 00000000 00000252 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
2 .debug_pubnames 0000006a 00000000 00000000 00000278 2**0 3 .debug_pubnames 0000006a 00000000 00000000 0000027a 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
3 .debug_info 00000284 00000000 00000000 000002e2 2**0 4 .debug_info 00000285 00000000 00000000 000002e4 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
4 .debug_abbrev 000001ae 00000000 00000000 00000566 2**0 5 .debug_abbrev 0000019f 00000000 00000000 00000569 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
5 .debug_line 00000450 00000000 00000000 00000714 2**0 6 .debug_line 00000453 00000000 00000000 00000708 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
6 .debug_frame 00000090 00000000 00000000 00000b64 2**2 7 .debug_frame 00000090 00000000 00000000 00000b5c 2**2
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
7 .debug_str 00000141 00000000 00000000 00000bf4 2**0 8 .debug_str 00000141 00000000 00000000 00000bec 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
8 .debug_loc 000001e1 00000000 00000000 00000d35 2**0 9 .debug_loc 000001e1 00000000 00000000 00000d2d 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
9 .debug_ranges 00000068 00000000 00000000 00000f16 2**0 10 .debug_ranges 00000068 00000000 00000000 00000f0e 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
Disassembly of section .text: Disassembly of section .text:

66
bootloaders/optiboot/optiboot_atmega328_pro_8MHz.hex
View File

@ -1,34 +1,34 @@
:107E0000112484B714BE81FFE6D085E08093810001 :10000000112484B714BE81FFE6D085E0809381007F
:107E100082E08093C00088E18093C10086E0809377 :1000100082E08093C00088E18093C10086E08093F5
:107E2000C20088E08093C4008EE0CFD0259A86E01F :10002000C20088E08093C4008EE0CFD0259A86E09D
:107E300028E13EEF91E0309385002093840096BBCB :1000300028E13EEF91E0309385002093840096BB49
:107E4000B09BFECF1D9AA8958150A9F7DD24D3944D :10004000B09BFECF1D9AA8958150A9F7DD24D394CB
:107E5000A5E0EA2EF1E1FF2EABD0813421F481E0E0 :10005000A5E0EA2EF1E1FF2EABD0813421F481E05E
:107E6000C5D083E020C0823411F484E103C085349E :10006000C5D083E020C0823411F484E103C085341C
:107E700019F485E0BBD091C0853581F499D0082FE5 :1000700019F485E0BBD091C0853581F499D0082F63
:107E800010E096D090E0982F8827802B912B880FB8 :1000800010E096D090E0982F8827802B912B880F36
:107E9000991F90930102809300027EC0863529F4D9 :10009000991F90930102809300027EC0863529F457
:107EA00084E0A4D080E07CD078C0843609F04EC055 :1000A00084E0A4D080E07CD078C0843609F04EC0D3
:107EB00087D0E0910002F091010280E7E030F807FE :1000B00087D0E0910002F091010280E7E030F8077C
:107EC00018F483E087BFE895C0E0D1E071D08993D2 :1000C00018F483E087BFE895C0E0D1E071D0899350
:107ED000809102028150809302028823B9F7E091D9 :1000D000809102028150809302028823B9F7E09157
:107EE0000002F091010280E7E030F80718F083E02B :1000E0000002F091010280E7E030F80718F083E0A9
:107EF00087BFE89575D007B600FCFDCF4091000222 :1000F00087BFE89575D007B600FCFDCF40910002A0
:107F000050910102A0E0B1E02C9130E011968C91EB :1001000050910102A0E0B1E02C9130E011968C9169
:107F1000119790E0982F8827822B932B1296FA01C5 :10011000119790E0982F8827822B932B1296FA0143
:107F20000C01D7BEE89511244E5F5F4FF1E0A038F9 :100120000C01D7BEE89511244E5F5F4FF1E0A03877
:107F3000BF0751F7E0910002F0910102E7BEE8951A :10013000BF0751F7E0910002F0910102E7BEE89598
:107F400007B600FCFDCFF7BEE89527C08437B9F42B :1001400007B600FCFDCFF7BEE89527C08437B9F4A9
:107F500037D046D0E0910002F09101023196F093C3 :1001500037D046D0E0910002F09101023196F09341
:107F60000102E09300023197E4918E2F19D08091A5 :100160000102E09300023197E4918E2F19D0809123
:107F70000202815080930202882361F70EC0853788 :100170000202815080930202882361F70EC0853706
:107F800039F42ED08EE10CD085E90AD08FE08BCF6A :1001800039F42ED08EE10CD085E90AD08FE08BCFE8
:107F9000813511F488E019D023D080E101D05CCF85 :10019000813511F488E019D023D080E101D05CCF03
:107FA000982F8091C00085FFFCCF9093C600089564 :1001A000982F8091C00085FFFCCF9093C6000895E2
:107FB000A8958091C00087FFFCCF8091C6000895EE :1001B000A8958091C00087FFFCCF8091C60008956C
:107FC000F7DFF6DF80930202F3CFE0E6F0E098E11E :1001C000F7DFF6DF80930202F3CFE0E6F0E098E19C
:107FD00090838083089580E0F8DFEE27FF270994DF :1001D00090838083089580E0F8DFEE27FF2709945D
:107FE000E7DF803209F0F7DF84E1DACF1F93182F43 :1001E000E7DF803209F0F7DF84E1DACF1F93182FC1
:0C7FF000DFDF1150E9F7F4DF1F91089566 :0C01F000DFDF1150E9F7F4DF1F910895E4
:0400000300007E007B :027FFE0001047C
:00000001FF :00000001FF

486
bootloaders/optiboot/optiboot_atmega328_pro_8MHz.lst
View File

@ -3,552 +3,554 @@ optiboot_atmega328_pro_8MHz.elf: file format elf32-avr
Sections: Sections:
Idx Name Size VMA LMA File off Algn Idx Name Size VMA LMA File off Algn
0 .text 000001fc 00007e00 00007e00 00000054 2**1 0 .text 000001fc 00000000 00000000 00000054 2**1
CONTENTS, ALLOC, LOAD, READONLY, CODE CONTENTS, ALLOC, LOAD, READONLY, CODE
1 .debug_aranges 00000028 00000000 00000000 00000250 2**0 1 .version 00000002 00007ffe 00007ffe 00000250 2**0
CONTENTS, READONLY
2 .debug_aranges 00000028 00000000 00000000 00000252 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
2 .debug_pubnames 0000006a 00000000 00000000 00000278 2**0 3 .debug_pubnames 0000006a 00000000 00000000 0000027a 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
3 .debug_info 00000284 00000000 00000000 000002e2 2**0 4 .debug_info 00000285 00000000 00000000 000002e4 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
4 .debug_abbrev 000001ae 00000000 00000000 00000566 2**0 5 .debug_abbrev 0000019f 00000000 00000000 00000569 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
5 .debug_line 00000450 00000000 00000000 00000714 2**0 6 .debug_line 00000453 00000000 00000000 00000708 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
6 .debug_frame 00000090 00000000 00000000 00000b64 2**2 7 .debug_frame 00000090 00000000 00000000 00000b5c 2**2
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
7 .debug_str 00000141 00000000 00000000 00000bf4 2**0 8 .debug_str 00000141 00000000 00000000 00000bec 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
8 .debug_loc 000001e1 00000000 00000000 00000d35 2**0 9 .debug_loc 000001e1 00000000 00000000 00000d2d 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
9 .debug_ranges 00000068 00000000 00000000 00000f16 2**0 10 .debug_ranges 00000068 00000000 00000000 00000f0e 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
Disassembly of section .text: Disassembly of section .text:
00007e00 <main>: 00000000 <main>:
#define rstVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+4)) #define rstVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+4))
#define wdtVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+6)) #define wdtVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+6))
#endif #endif
/* main program starts here */ /* main program starts here */
int main(void) { int main(void) {
7e00: 11 24 eor r1, r1 0: 11 24 eor r1, r1
#ifdef __AVR_ATmega8__ #ifdef __AVR_ATmega8__
SP=RAMEND; // This is done by hardware reset SP=RAMEND; // This is done by hardware reset
#endif #endif
// Adaboot no-wait mod // Adaboot no-wait mod
ch = MCUSR; ch = MCUSR;
7e02: 84 b7 in r24, 0x34 ; 52 2: 84 b7 in r24, 0x34 ; 52
MCUSR = 0; MCUSR = 0;
7e04: 14 be out 0x34, r1 ; 52 4: 14 be out 0x34, r1 ; 52
if (!(ch & _BV(EXTRF))) appStart(); if (!(ch & _BV(EXTRF))) appStart();
7e06: 81 ff sbrs r24, 1 6: 81 ff sbrs r24, 1
7e08: e6 d0 rcall .+460 ; 0x7fd6 <appStart> 8: e6 d0 rcall .+460 ; 0x1d6 <appStart>
#if LED_START_FLASHES > 0 #if LED_START_FLASHES > 0
// Set up Timer 1 for timeout counter // Set up Timer 1 for timeout counter
TCCR1B = _BV(CS12) | _BV(CS10); // div 1024 TCCR1B = _BV(CS12) | _BV(CS10); // div 1024
7e0a: 85 e0 ldi r24, 0x05 ; 5 a: 85 e0 ldi r24, 0x05 ; 5
7e0c: 80 93 81 00 sts 0x0081, r24 c: 80 93 81 00 sts 0x0081, r24
UCSRA = _BV(U2X); //Double speed mode USART UCSRA = _BV(U2X); //Double speed mode USART
UCSRB = _BV(RXEN) | _BV(TXEN); // enable Rx & Tx UCSRB = _BV(RXEN) | _BV(TXEN); // enable Rx & Tx
UCSRC = _BV(URSEL) | _BV(UCSZ1) | _BV(UCSZ0); // config USART; 8N1 UCSRC = _BV(URSEL) | _BV(UCSZ1) | _BV(UCSZ0); // config USART; 8N1
UBRRL = (uint8_t)( (F_CPU + BAUD_RATE * 4L) / (BAUD_RATE * 8L) - 1 ); UBRRL = (uint8_t)( (F_CPU + BAUD_RATE * 4L) / (BAUD_RATE * 8L) - 1 );
#else #else
UCSR0A = _BV(U2X0); //Double speed mode USART0 UCSR0A = _BV(U2X0); //Double speed mode USART0
7e10: 82 e0 ldi r24, 0x02 ; 2 10: 82 e0 ldi r24, 0x02 ; 2
7e12: 80 93 c0 00 sts 0x00C0, r24 12: 80 93 c0 00 sts 0x00C0, r24
UCSR0B = _BV(RXEN0) | _BV(TXEN0); UCSR0B = _BV(RXEN0) | _BV(TXEN0);
7e16: 88 e1 ldi r24, 0x18 ; 24 16: 88 e1 ldi r24, 0x18 ; 24
7e18: 80 93 c1 00 sts 0x00C1, r24 18: 80 93 c1 00 sts 0x00C1, r24
UCSR0C = _BV(UCSZ00) | _BV(UCSZ01); UCSR0C = _BV(UCSZ00) | _BV(UCSZ01);
7e1c: 86 e0 ldi r24, 0x06 ; 6 1c: 86 e0 ldi r24, 0x06 ; 6
7e1e: 80 93 c2 00 sts 0x00C2, r24 1e: 80 93 c2 00 sts 0x00C2, r24
UBRR0L = (uint8_t)( (F_CPU + BAUD_RATE * 4L) / (BAUD_RATE * 8L) - 1 ); UBRR0L = (uint8_t)( (F_CPU + BAUD_RATE * 4L) / (BAUD_RATE * 8L) - 1 );
7e22: 88 e0 ldi r24, 0x08 ; 8 22: 88 e0 ldi r24, 0x08 ; 8
7e24: 80 93 c4 00 sts 0x00C4, r24 24: 80 93 c4 00 sts 0x00C4, r24
#endif #endif
#endif #endif
// Set up watchdog to trigger after 500ms // Set up watchdog to trigger after 500ms
watchdogConfig(WATCHDOG_1S); watchdogConfig(WATCHDOG_1S);
7e28: 8e e0 ldi r24, 0x0E ; 14 28: 8e e0 ldi r24, 0x0E ; 14
7e2a: cf d0 rcall .+414 ; 0x7fca <watchdogConfig> 2a: cf d0 rcall .+414 ; 0x1ca <watchdogConfig>
/* Set LED pin as output */ /* Set LED pin as output */
LED_DDR |= _BV(LED); LED_DDR |= _BV(LED);
7e2c: 25 9a sbi 0x04, 5 ; 4 2c: 25 9a sbi 0x04, 5 ; 4
7e2e: 86 e0 ldi r24, 0x06 ; 6 2e: 86 e0 ldi r24, 0x06 ; 6
} }
#if LED_START_FLASHES > 0 #if LED_START_FLASHES > 0
void flash_led(uint8_t count) { void flash_led(uint8_t count) {
do { do {
TCNT1 = -(F_CPU/(1024*16)); TCNT1 = -(F_CPU/(1024*16));
7e30: 28 e1 ldi r18, 0x18 ; 24 30: 28 e1 ldi r18, 0x18 ; 24
7e32: 3e ef ldi r19, 0xFE ; 254 32: 3e ef ldi r19, 0xFE ; 254
TIFR1 = _BV(TOV1); TIFR1 = _BV(TOV1);
7e34: 91 e0 ldi r25, 0x01 ; 1 34: 91 e0 ldi r25, 0x01 ; 1
} }
#if LED_START_FLASHES > 0 #if LED_START_FLASHES > 0
void flash_led(uint8_t count) { void flash_led(uint8_t count) {
do { do {
TCNT1 = -(F_CPU/(1024*16)); TCNT1 = -(F_CPU/(1024*16));
7e36: 30 93 85 00 sts 0x0085, r19 36: 30 93 85 00 sts 0x0085, r19
7e3a: 20 93 84 00 sts 0x0084, r18 3a: 20 93 84 00 sts 0x0084, r18
TIFR1 = _BV(TOV1); TIFR1 = _BV(TOV1);
7e3e: 96 bb out 0x16, r25 ; 22 3e: 96 bb out 0x16, r25 ; 22
while(!(TIFR1 & _BV(TOV1))); while(!(TIFR1 & _BV(TOV1)));
7e40: b0 9b sbis 0x16, 0 ; 22 40: b0 9b sbis 0x16, 0 ; 22
7e42: fe cf rjmp .-4 ; 0x7e40 <main+0x40> 42: fe cf rjmp .-4 ; 0x40 <__SREG__+0x1>
#ifdef __AVR_ATmega8__ #ifdef __AVR_ATmega8__
LED_PORT ^= _BV(LED); LED_PORT ^= _BV(LED);
#else #else
LED_PIN |= _BV(LED); LED_PIN |= _BV(LED);
7e44: 1d 9a sbi 0x03, 5 ; 3 44: 1d 9a sbi 0x03, 5 ; 3
return getch(); return getch();
} }
// Watchdog functions. These are only safe with interrupts turned off. // Watchdog functions. These are only safe with interrupts turned off.
void watchdogReset() { void watchdogReset() {
__asm__ __volatile__ ( __asm__ __volatile__ (
7e46: a8 95 wdr 46: a8 95 wdr
LED_PORT ^= _BV(LED); LED_PORT ^= _BV(LED);
#else #else
LED_PIN |= _BV(LED); LED_PIN |= _BV(LED);
#endif #endif
watchdogReset(); watchdogReset();
} while (--count); } while (--count);
7e48: 81 50 subi r24, 0x01 ; 1 48: 81 50 subi r24, 0x01 ; 1
7e4a: a9 f7 brne .-22 ; 0x7e36 <main+0x36> 4a: a9 f7 brne .-22 ; 0x36 <__CCP__+0x2>
/* get character from UART */ /* get character from UART */
ch = getch(); ch = getch();
if(ch == STK_GET_PARAMETER) { if(ch == STK_GET_PARAMETER) {
// GET PARAMETER returns a generic 0x03 reply - enough to keep Avrdude happy // GET PARAMETER returns a generic 0x03 reply - enough to keep Avrdude happy
getNch(1); getNch(1);
7e4c: dd 24 eor r13, r13 4c: dd 24 eor r13, r13
7e4e: d3 94 inc r13 4e: d3 94 inc r13
__boot_page_fill_short((uint16_t)(void*)addrPtr,a); __boot_page_fill_short((uint16_t)(void*)addrPtr,a);
addrPtr += 2; addrPtr += 2;
} while (--ch); } while (--ch);
// Write from programming buffer // Write from programming buffer
__boot_page_write_short((uint16_t)(void*)address); __boot_page_write_short((uint16_t)(void*)address);
7e50: a5 e0 ldi r26, 0x05 ; 5 50: a5 e0 ldi r26, 0x05 ; 5
7e52: ea 2e mov r14, r26 52: ea 2e mov r14, r26
boot_spm_busy_wait(); boot_spm_busy_wait();
#if defined(RWWSRE) #if defined(RWWSRE)
// Reenable read access to flash // Reenable read access to flash
boot_rww_enable(); boot_rww_enable();
7e54: f1 e1 ldi r31, 0x11 ; 17 54: f1 e1 ldi r31, 0x11 ; 17
7e56: ff 2e mov r15, r31 56: ff 2e mov r15, r31
#endif #endif
/* Forever loop */ /* Forever loop */
for (;;) { for (;;) {
/* get character from UART */ /* get character from UART */
ch = getch(); ch = getch();
7e58: ab d0 rcall .+342 ; 0x7fb0 <getch> 58: ab d0 rcall .+342 ; 0x1b0 <getch>
if(ch == STK_GET_PARAMETER) { if(ch == STK_GET_PARAMETER) {
7e5a: 81 34 cpi r24, 0x41 ; 65 5a: 81 34 cpi r24, 0x41 ; 65
7e5c: 21 f4 brne .+8 ; 0x7e66 <main+0x66> 5c: 21 f4 brne .+8 ; 0x66 <__SREG__+0x27>
// GET PARAMETER returns a generic 0x03 reply - enough to keep Avrdude happy // GET PARAMETER returns a generic 0x03 reply - enough to keep Avrdude happy
getNch(1); getNch(1);
7e5e: 81 e0 ldi r24, 0x01 ; 1 5e: 81 e0 ldi r24, 0x01 ; 1
7e60: c5 d0 rcall .+394 ; 0x7fec <getNch> 60: c5 d0 rcall .+394 ; 0x1ec <getNch>
putch(0x03); putch(0x03);
7e62: 83 e0 ldi r24, 0x03 ; 3 62: 83 e0 ldi r24, 0x03 ; 3
7e64: 20 c0 rjmp .+64 ; 0x7ea6 <main+0xa6> 64: 20 c0 rjmp .+64 ; 0xa6 <__SREG__+0x67>
} }
else if(ch == STK_SET_DEVICE) { else if(ch == STK_SET_DEVICE) {
7e66: 82 34 cpi r24, 0x42 ; 66 66: 82 34 cpi r24, 0x42 ; 66
7e68: 11 f4 brne .+4 ; 0x7e6e <main+0x6e> 68: 11 f4 brne .+4 ; 0x6e <__SREG__+0x2f>
// SET DEVICE is ignored // SET DEVICE is ignored
getNch(20); getNch(20);
7e6a: 84 e1 ldi r24, 0x14 ; 20 6a: 84 e1 ldi r24, 0x14 ; 20
7e6c: 03 c0 rjmp .+6 ; 0x7e74 <main+0x74> 6c: 03 c0 rjmp .+6 ; 0x74 <__SREG__+0x35>
} }
else if(ch == STK_SET_DEVICE_EXT) { else if(ch == STK_SET_DEVICE_EXT) {
7e6e: 85 34 cpi r24, 0x45 ; 69 6e: 85 34 cpi r24, 0x45 ; 69
7e70: 19 f4 brne .+6 ; 0x7e78 <main+0x78> 70: 19 f4 brne .+6 ; 0x78 <__SREG__+0x39>
// SET DEVICE EXT is ignored // SET DEVICE EXT is ignored
getNch(5); getNch(5);
7e72: 85 e0 ldi r24, 0x05 ; 5 72: 85 e0 ldi r24, 0x05 ; 5
7e74: bb d0 rcall .+374 ; 0x7fec <getNch> 74: bb d0 rcall .+374 ; 0x1ec <getNch>
7e76: 91 c0 rjmp .+290 ; 0x7f9a <main+0x19a> 76: 91 c0 rjmp .+290 ; 0x19a <__SREG__+0x15b>
} }
else if(ch == STK_LOAD_ADDRESS) { else if(ch == STK_LOAD_ADDRESS) {
7e78: 85 35 cpi r24, 0x55 ; 85 78: 85 35 cpi r24, 0x55 ; 85
7e7a: 81 f4 brne .+32 ; 0x7e9c <main+0x9c> 7a: 81 f4 brne .+32 ; 0x9c <__SREG__+0x5d>
// LOAD ADDRESS // LOAD ADDRESS
uint16_t newAddress; uint16_t newAddress;
newAddress = getch(); newAddress = getch();
7e7c: 99 d0 rcall .+306 ; 0x7fb0 <getch> 7c: 99 d0 rcall .+306 ; 0x1b0 <getch>
newAddress = (newAddress & 0xff) | (getch() << 8); newAddress = (newAddress & 0xff) | (getch() << 8);
7e7e: 08 2f mov r16, r24 7e: 08 2f mov r16, r24
7e80: 10 e0 ldi r17, 0x00 ; 0 80: 10 e0 ldi r17, 0x00 ; 0
7e82: 96 d0 rcall .+300 ; 0x7fb0 <getch> 82: 96 d0 rcall .+300 ; 0x1b0 <getch>
7e84: 90 e0 ldi r25, 0x00 ; 0 84: 90 e0 ldi r25, 0x00 ; 0
7e86: 98 2f mov r25, r24 86: 98 2f mov r25, r24
7e88: 88 27 eor r24, r24 88: 88 27 eor r24, r24
7e8a: 80 2b or r24, r16 8a: 80 2b or r24, r16
7e8c: 91 2b or r25, r17 8c: 91 2b or r25, r17
#ifdef RAMPZ #ifdef RAMPZ
// Transfer top bit to RAMPZ // Transfer top bit to RAMPZ
RAMPZ = (newAddress & 0x8000) ? 1 : 0; RAMPZ = (newAddress & 0x8000) ? 1 : 0;
#endif #endif
newAddress += newAddress; // Convert from word address to byte address newAddress += newAddress; // Convert from word address to byte address
7e8e: 88 0f add r24, r24 8e: 88 0f add r24, r24
7e90: 99 1f adc r25, r25 90: 99 1f adc r25, r25
address = newAddress; address = newAddress;
7e92: 90 93 01 02 sts 0x0201, r25 92: 90 93 01 02 sts 0x0201, r25
7e96: 80 93 00 02 sts 0x0200, r24 96: 80 93 00 02 sts 0x0200, r24
7e9a: 7e c0 rjmp .+252 ; 0x7f98 <main+0x198> 9a: 7e c0 rjmp .+252 ; 0x198 <__SREG__+0x159>
verifySpace(); verifySpace();
} }
else if(ch == STK_UNIVERSAL) { else if(ch == STK_UNIVERSAL) {
7e9c: 86 35 cpi r24, 0x56 ; 86 9c: 86 35 cpi r24, 0x56 ; 86
7e9e: 29 f4 brne .+10 ; 0x7eaa <main+0xaa> 9e: 29 f4 brne .+10 ; 0xaa <__SREG__+0x6b>
// UNIVERSAL command is ignored // UNIVERSAL command is ignored
getNch(4); getNch(4);
7ea0: 84 e0 ldi r24, 0x04 ; 4 a0: 84 e0 ldi r24, 0x04 ; 4
7ea2: a4 d0 rcall .+328 ; 0x7fec <getNch> a2: a4 d0 rcall .+328 ; 0x1ec <getNch>
putch(0x00); putch(0x00);
7ea4: 80 e0 ldi r24, 0x00 ; 0 a4: 80 e0 ldi r24, 0x00 ; 0
7ea6: 7c d0 rcall .+248 ; 0x7fa0 <putch> a6: 7c d0 rcall .+248 ; 0x1a0 <putch>
7ea8: 78 c0 rjmp .+240 ; 0x7f9a <main+0x19a> a8: 78 c0 rjmp .+240 ; 0x19a <__SREG__+0x15b>
} }
/* Write memory, length is big endian and is in bytes */ /* Write memory, length is big endian and is in bytes */
else if(ch == STK_PROG_PAGE) { else if(ch == STK_PROG_PAGE) {
7eaa: 84 36 cpi r24, 0x64 ; 100 aa: 84 36 cpi r24, 0x64 ; 100
7eac: 09 f0 breq .+2 ; 0x7eb0 <main+0xb0> ac: 09 f0 breq .+2 ; 0xb0 <__SREG__+0x71>
7eae: 4e c0 rjmp .+156 ; 0x7f4c <main+0x14c> ae: 4e c0 rjmp .+156 ; 0x14c <__SREG__+0x10d>
// PROGRAM PAGE - we support flash programming only, not EEPROM // PROGRAM PAGE - we support flash programming only, not EEPROM
uint8_t *bufPtr; uint8_t *bufPtr;
uint16_t addrPtr; uint16_t addrPtr;
getLen(); getLen();
7eb0: 87 d0 rcall .+270 ; 0x7fc0 <getLen> b0: 87 d0 rcall .+270 ; 0x1c0 <getLen>
// If we are in RWW section, immediately start page erase // If we are in RWW section, immediately start page erase
if (address < NRWWSTART) __boot_page_erase_short((uint16_t)(void*)address); if (address < NRWWSTART) __boot_page_erase_short((uint16_t)(void*)address);
7eb2: e0 91 00 02 lds r30, 0x0200 b2: e0 91 00 02 lds r30, 0x0200
7eb6: f0 91 01 02 lds r31, 0x0201 b6: f0 91 01 02 lds r31, 0x0201
7eba: 80 e7 ldi r24, 0x70 ; 112 ba: 80 e7 ldi r24, 0x70 ; 112
7ebc: e0 30 cpi r30, 0x00 ; 0 bc: e0 30 cpi r30, 0x00 ; 0
7ebe: f8 07 cpc r31, r24 be: f8 07 cpc r31, r24
7ec0: 18 f4 brcc .+6 ; 0x7ec8 <main+0xc8> c0: 18 f4 brcc .+6 ; 0xc8 <__SREG__+0x89>
7ec2: 83 e0 ldi r24, 0x03 ; 3 c2: 83 e0 ldi r24, 0x03 ; 3
7ec4: 87 bf out 0x37, r24 ; 55 c4: 87 bf out 0x37, r24 ; 55
7ec6: e8 95 spm c6: e8 95 spm
7ec8: c0 e0 ldi r28, 0x00 ; 0 c8: c0 e0 ldi r28, 0x00 ; 0
7eca: d1 e0 ldi r29, 0x01 ; 1 ca: d1 e0 ldi r29, 0x01 ; 1
// While that is going on, read in page contents // While that is going on, read in page contents
bufPtr = buff; bufPtr = buff;
do *bufPtr++ = getch(); do *bufPtr++ = getch();
7ecc: 71 d0 rcall .+226 ; 0x7fb0 <getch> cc: 71 d0 rcall .+226 ; 0x1b0 <getch>
7ece: 89 93 st Y+, r24 ce: 89 93 st Y+, r24
while (--length); while (--length);
7ed0: 80 91 02 02 lds r24, 0x0202 d0: 80 91 02 02 lds r24, 0x0202
7ed4: 81 50 subi r24, 0x01 ; 1 d4: 81 50 subi r24, 0x01 ; 1
7ed6: 80 93 02 02 sts 0x0202, r24 d6: 80 93 02 02 sts 0x0202, r24
7eda: 88 23 and r24, r24 da: 88 23 and r24, r24
7edc: b9 f7 brne .-18 ; 0x7ecc <main+0xcc> dc: b9 f7 brne .-18 ; 0xcc <__SREG__+0x8d>
// If we are in NRWW section, page erase has to be delayed until now. // If we are in NRWW section, page erase has to be delayed until now.
// Todo: Take RAMPZ into account // Todo: Take RAMPZ into account
if (address >= NRWWSTART) __boot_page_erase_short((uint16_t)(void*)address); if (address >= NRWWSTART) __boot_page_erase_short((uint16_t)(void*)address);
7ede: e0 91 00 02 lds r30, 0x0200 de: e0 91 00 02 lds r30, 0x0200
7ee2: f0 91 01 02 lds r31, 0x0201 e2: f0 91 01 02 lds r31, 0x0201
7ee6: 80 e7 ldi r24, 0x70 ; 112 e6: 80 e7 ldi r24, 0x70 ; 112
7ee8: e0 30 cpi r30, 0x00 ; 0 e8: e0 30 cpi r30, 0x00 ; 0
7eea: f8 07 cpc r31, r24 ea: f8 07 cpc r31, r24
7eec: 18 f0 brcs .+6 ; 0x7ef4 <main+0xf4> ec: 18 f0 brcs .+6 ; 0xf4 <__SREG__+0xb5>
7eee: 83 e0 ldi r24, 0x03 ; 3 ee: 83 e0 ldi r24, 0x03 ; 3
7ef0: 87 bf out 0x37, r24 ; 55 f0: 87 bf out 0x37, r24 ; 55
7ef2: e8 95 spm f2: e8 95 spm
// Read command terminator, start reply // Read command terminator, start reply
verifySpace(); verifySpace();
7ef4: 75 d0 rcall .+234 ; 0x7fe0 <verifySpace> f4: 75 d0 rcall .+234 ; 0x1e0 <verifySpace>
// If only a partial page is to be programmed, the erase might not be complete. // If only a partial page is to be programmed, the erase might not be complete.
// So check that here // So check that here
boot_spm_busy_wait(); boot_spm_busy_wait();
7ef6: 07 b6 in r0, 0x37 ; 55 f6: 07 b6 in r0, 0x37 ; 55
7ef8: 00 fc sbrc r0, 0 f8: 00 fc sbrc r0, 0
7efa: fd cf rjmp .-6 ; 0x7ef6 <main+0xf6> fa: fd cf rjmp .-6 ; 0xf6 <__SREG__+0xb7>
} }
#endif #endif
// Copy buffer into programming buffer // Copy buffer into programming buffer
bufPtr = buff; bufPtr = buff;
addrPtr = (uint16_t)(void*)address; addrPtr = (uint16_t)(void*)address;
7efc: 40 91 00 02 lds r20, 0x0200 fc: 40 91 00 02 lds r20, 0x0200
7f00: 50 91 01 02 lds r21, 0x0201 100: 50 91 01 02 lds r21, 0x0201
7f04: a0 e0 ldi r26, 0x00 ; 0 104: a0 e0 ldi r26, 0x00 ; 0
7f06: b1 e0 ldi r27, 0x01 ; 1 106: b1 e0 ldi r27, 0x01 ; 1
ch = SPM_PAGESIZE / 2; ch = SPM_PAGESIZE / 2;
do { do {
uint16_t a; uint16_t a;
a = *bufPtr++; a = *bufPtr++;
7f08: 2c 91 ld r18, X 108: 2c 91 ld r18, X
7f0a: 30 e0 ldi r19, 0x00 ; 0 10a: 30 e0 ldi r19, 0x00 ; 0
a |= (*bufPtr++) << 8; a |= (*bufPtr++) << 8;
7f0c: 11 96 adiw r26, 0x01 ; 1 10c: 11 96 adiw r26, 0x01 ; 1
7f0e: 8c 91 ld r24, X 10e: 8c 91 ld r24, X
7f10: 11 97 sbiw r26, 0x01 ; 1 110: 11 97 sbiw r26, 0x01 ; 1
7f12: 90 e0 ldi r25, 0x00 ; 0 112: 90 e0 ldi r25, 0x00 ; 0
7f14: 98 2f mov r25, r24 114: 98 2f mov r25, r24
7f16: 88 27 eor r24, r24 116: 88 27 eor r24, r24
7f18: 82 2b or r24, r18 118: 82 2b or r24, r18
7f1a: 93 2b or r25, r19 11a: 93 2b or r25, r19
#define rstVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+4)) #define rstVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+4))
#define wdtVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+6)) #define wdtVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+6))
#endif #endif
/* main program starts here */ /* main program starts here */
int main(void) { int main(void) {
7f1c: 12 96 adiw r26, 0x02 ; 2 11c: 12 96 adiw r26, 0x02 ; 2
ch = SPM_PAGESIZE / 2; ch = SPM_PAGESIZE / 2;
do { do {
uint16_t a; uint16_t a;
a = *bufPtr++; a = *bufPtr++;
a |= (*bufPtr++) << 8; a |= (*bufPtr++) << 8;
__boot_page_fill_short((uint16_t)(void*)addrPtr,a); __boot_page_fill_short((uint16_t)(void*)addrPtr,a);
7f1e: fa 01 movw r30, r20 11e: fa 01 movw r30, r20
7f20: 0c 01 movw r0, r24 120: 0c 01 movw r0, r24
7f22: d7 be out 0x37, r13 ; 55 122: d7 be out 0x37, r13 ; 55
7f24: e8 95 spm 124: e8 95 spm
7f26: 11 24 eor r1, r1 126: 11 24 eor r1, r1
addrPtr += 2; addrPtr += 2;
7f28: 4e 5f subi r20, 0xFE ; 254 128: 4e 5f subi r20, 0xFE ; 254
7f2a: 5f 4f sbci r21, 0xFF ; 255 12a: 5f 4f sbci r21, 0xFF ; 255
} while (--ch); } while (--ch);
7f2c: f1 e0 ldi r31, 0x01 ; 1 12c: f1 e0 ldi r31, 0x01 ; 1
7f2e: a0 38 cpi r26, 0x80 ; 128 12e: a0 38 cpi r26, 0x80 ; 128
7f30: bf 07 cpc r27, r31 130: bf 07 cpc r27, r31
7f32: 51 f7 brne .-44 ; 0x7f08 <main+0x108> 132: 51 f7 brne .-44 ; 0x108 <__SREG__+0xc9>
// Write from programming buffer // Write from programming buffer
__boot_page_write_short((uint16_t)(void*)address); __boot_page_write_short((uint16_t)(void*)address);
7f34: e0 91 00 02 lds r30, 0x0200 134: e0 91 00 02 lds r30, 0x0200
7f38: f0 91 01 02 lds r31, 0x0201 138: f0 91 01 02 lds r31, 0x0201
7f3c: e7 be out 0x37, r14 ; 55 13c: e7 be out 0x37, r14 ; 55
7f3e: e8 95 spm 13e: e8 95 spm
boot_spm_busy_wait(); boot_spm_busy_wait();
7f40: 07 b6 in r0, 0x37 ; 55 140: 07 b6 in r0, 0x37 ; 55
7f42: 00 fc sbrc r0, 0 142: 00 fc sbrc r0, 0
7f44: fd cf rjmp .-6 ; 0x7f40 <main+0x140> 144: fd cf rjmp .-6 ; 0x140 <__SREG__+0x101>
#if defined(RWWSRE) #if defined(RWWSRE)
// Reenable read access to flash // Reenable read access to flash
boot_rww_enable(); boot_rww_enable();
7f46: f7 be out 0x37, r15 ; 55 146: f7 be out 0x37, r15 ; 55
7f48: e8 95 spm 148: e8 95 spm
7f4a: 27 c0 rjmp .+78 ; 0x7f9a <main+0x19a> 14a: 27 c0 rjmp .+78 ; 0x19a <__SREG__+0x15b>
#endif #endif
} }
/* Read memory block mode, length is big endian. */ /* Read memory block mode, length is big endian. */
else if(ch == STK_READ_PAGE) { else if(ch == STK_READ_PAGE) {
7f4c: 84 37 cpi r24, 0x74 ; 116 14c: 84 37 cpi r24, 0x74 ; 116
7f4e: b9 f4 brne .+46 ; 0x7f7e <main+0x17e> 14e: b9 f4 brne .+46 ; 0x17e <__SREG__+0x13f>
// READ PAGE - we only read flash // READ PAGE - we only read flash
getLen(); getLen();
7f50: 37 d0 rcall .+110 ; 0x7fc0 <getLen> 150: 37 d0 rcall .+110 ; 0x1c0 <getLen>
verifySpace(); verifySpace();
7f52: 46 d0 rcall .+140 ; 0x7fe0 <verifySpace> 152: 46 d0 rcall .+140 ; 0x1e0 <verifySpace>
putch(result); putch(result);
address++; address++;
} }
while (--length); while (--length);
#else #else
do putch(pgm_read_byte_near(address++)); do putch(pgm_read_byte_near(address++));
7f54: e0 91 00 02 lds r30, 0x0200 154: e0 91 00 02 lds r30, 0x0200
7f58: f0 91 01 02 lds r31, 0x0201 158: f0 91 01 02 lds r31, 0x0201
7f5c: 31 96 adiw r30, 0x01 ; 1 15c: 31 96 adiw r30, 0x01 ; 1
7f5e: f0 93 01 02 sts 0x0201, r31 15e: f0 93 01 02 sts 0x0201, r31
7f62: e0 93 00 02 sts 0x0200, r30 162: e0 93 00 02 sts 0x0200, r30
7f66: 31 97 sbiw r30, 0x01 ; 1 166: 31 97 sbiw r30, 0x01 ; 1
7f68: e4 91 lpm r30, Z+ 168: e4 91 lpm r30, Z+
7f6a: 8e 2f mov r24, r30 16a: 8e 2f mov r24, r30
7f6c: 19 d0 rcall .+50 ; 0x7fa0 <putch> 16c: 19 d0 rcall .+50 ; 0x1a0 <putch>
while (--length); while (--length);
7f6e: 80 91 02 02 lds r24, 0x0202 16e: 80 91 02 02 lds r24, 0x0202
7f72: 81 50 subi r24, 0x01 ; 1 172: 81 50 subi r24, 0x01 ; 1
7f74: 80 93 02 02 sts 0x0202, r24 174: 80 93 02 02 sts 0x0202, r24
7f78: 88 23 and r24, r24 178: 88 23 and r24, r24
7f7a: 61 f7 brne .-40 ; 0x7f54 <main+0x154> 17a: 61 f7 brne .-40 ; 0x154 <__SREG__+0x115>
7f7c: 0e c0 rjmp .+28 ; 0x7f9a <main+0x19a> 17c: 0e c0 rjmp .+28 ; 0x19a <__SREG__+0x15b>
#endif #endif
#endif #endif
} }
/* Get device signature bytes */ /* Get device signature bytes */
else if(ch == STK_READ_SIGN) { else if(ch == STK_READ_SIGN) {
7f7e: 85 37 cpi r24, 0x75 ; 117 17e: 85 37 cpi r24, 0x75 ; 117
7f80: 39 f4 brne .+14 ; 0x7f90 <main+0x190> 180: 39 f4 brne .+14 ; 0x190 <__SREG__+0x151>
// READ SIGN - return what Avrdude wants to hear // READ SIGN - return what Avrdude wants to hear
verifySpace(); verifySpace();
7f82: 2e d0 rcall .+92 ; 0x7fe0 <verifySpace> 182: 2e d0 rcall .+92 ; 0x1e0 <verifySpace>
putch(SIGNATURE_0); putch(SIGNATURE_0);
7f84: 8e e1 ldi r24, 0x1E ; 30 184: 8e e1 ldi r24, 0x1E ; 30
7f86: 0c d0 rcall .+24 ; 0x7fa0 <putch> 186: 0c d0 rcall .+24 ; 0x1a0 <putch>
putch(SIGNATURE_1); putch(SIGNATURE_1);
7f88: 85 e9 ldi r24, 0x95 ; 149 188: 85 e9 ldi r24, 0x95 ; 149
7f8a: 0a d0 rcall .+20 ; 0x7fa0 <putch> 18a: 0a d0 rcall .+20 ; 0x1a0 <putch>
putch(SIGNATURE_2); putch(SIGNATURE_2);
7f8c: 8f e0 ldi r24, 0x0F ; 15 18c: 8f e0 ldi r24, 0x0F ; 15
7f8e: 8b cf rjmp .-234 ; 0x7ea6 <main+0xa6> 18e: 8b cf rjmp .-234 ; 0xa6 <__SREG__+0x67>
} }
else if (ch == 'Q') { else if (ch == 'Q') {
7f90: 81 35 cpi r24, 0x51 ; 81 190: 81 35 cpi r24, 0x51 ; 81
7f92: 11 f4 brne .+4 ; 0x7f98 <main+0x198> 192: 11 f4 brne .+4 ; 0x198 <__SREG__+0x159>
// Adaboot no-wait mod // Adaboot no-wait mod
watchdogConfig(WATCHDOG_16MS); watchdogConfig(WATCHDOG_16MS);
7f94: 88 e0 ldi r24, 0x08 ; 8 194: 88 e0 ldi r24, 0x08 ; 8
7f96: 19 d0 rcall .+50 ; 0x7fca <watchdogConfig> 196: 19 d0 rcall .+50 ; 0x1ca <watchdogConfig>
verifySpace(); verifySpace();
} }
else { else {
// This covers the response to commands like STK_ENTER_PROGMODE // This covers the response to commands like STK_ENTER_PROGMODE
verifySpace(); verifySpace();
7f98: 23 d0 rcall .+70 ; 0x7fe0 <verifySpace> 198: 23 d0 rcall .+70 ; 0x1e0 <verifySpace>
} }
putch(STK_OK); putch(STK_OK);
7f9a: 80 e1 ldi r24, 0x10 ; 16 19a: 80 e1 ldi r24, 0x10 ; 16
7f9c: 01 d0 rcall .+2 ; 0x7fa0 <putch> 19c: 01 d0 rcall .+2 ; 0x1a0 <putch>
7f9e: 5c cf rjmp .-328 ; 0x7e58 <main+0x58> 19e: 5c cf rjmp .-328 ; 0x58 <__SREG__+0x19>
00007fa0 <putch>: 000001a0 <putch>:
} }
} }
void putch(char ch) { void putch(char ch) {
7fa0: 98 2f mov r25, r24 1a0: 98 2f mov r25, r24
#ifndef SOFT_UART #ifndef SOFT_UART
while (!(UCSR0A & _BV(UDRE0))); while (!(UCSR0A & _BV(UDRE0)));
7fa2: 80 91 c0 00 lds r24, 0x00C0 1a2: 80 91 c0 00 lds r24, 0x00C0
7fa6: 85 ff sbrs r24, 5 1a6: 85 ff sbrs r24, 5
7fa8: fc cf rjmp .-8 ; 0x7fa2 <putch+0x2> 1a8: fc cf rjmp .-8 ; 0x1a2 <putch+0x2>
UDR0 = ch; UDR0 = ch;
7faa: 90 93 c6 00 sts 0x00C6, r25 1aa: 90 93 c6 00 sts 0x00C6, r25
[uartBit] "I" (UART_TX_BIT) [uartBit] "I" (UART_TX_BIT)
: :
"r25" "r25"
); );
#endif #endif
} }
7fae: 08 95 ret 1ae: 08 95 ret
00007fb0 <getch>: 000001b0 <getch>:
return getch(); return getch();
} }
// Watchdog functions. These are only safe with interrupts turned off. // Watchdog functions. These are only safe with interrupts turned off.
void watchdogReset() { void watchdogReset() {
__asm__ __volatile__ ( __asm__ __volatile__ (
7fb0: a8 95 wdr 1b0: a8 95 wdr
[uartBit] "I" (UART_RX_BIT) [uartBit] "I" (UART_RX_BIT)
: :
"r25" "r25"
); );
#else #else
while(!(UCSR0A & _BV(RXC0))); while(!(UCSR0A & _BV(RXC0)));
7fb2: 80 91 c0 00 lds r24, 0x00C0 1b2: 80 91 c0 00 lds r24, 0x00C0
7fb6: 87 ff sbrs r24, 7 1b6: 87 ff sbrs r24, 7
7fb8: fc cf rjmp .-8 ; 0x7fb2 <getch+0x2> 1b8: fc cf rjmp .-8 ; 0x1b2 <getch+0x2>
ch = UDR0; ch = UDR0;
7fba: 80 91 c6 00 lds r24, 0x00C6 1ba: 80 91 c6 00 lds r24, 0x00C6
LED_PIN |= _BV(LED); LED_PIN |= _BV(LED);
#endif #endif
#endif #endif
return ch; return ch;
} }
7fbe: 08 95 ret 1be: 08 95 ret
00007fc0 <getLen>: 000001c0 <getLen>:
} while (--count); } while (--count);
} }
#endif #endif
uint8_t getLen() { uint8_t getLen() {
getch(); getch();
7fc0: f7 df rcall .-18 ; 0x7fb0 <getch> 1c0: f7 df rcall .-18 ; 0x1b0 <getch>
length = getch(); length = getch();
7fc2: f6 df rcall .-20 ; 0x7fb0 <getch> 1c2: f6 df rcall .-20 ; 0x1b0 <getch>
7fc4: 80 93 02 02 sts 0x0202, r24 1c4: 80 93 02 02 sts 0x0202, r24
return getch(); return getch();
} }
7fc8: f3 cf rjmp .-26 ; 0x7fb0 <getch> 1c8: f3 cf rjmp .-26 ; 0x1b0 <getch>
00007fca <watchdogConfig>: 000001ca <watchdogConfig>:
"wdr\n" "wdr\n"
); );
} }
void watchdogConfig(uint8_t x) { void watchdogConfig(uint8_t x) {
WDTCSR = _BV(WDCE) | _BV(WDE); WDTCSR = _BV(WDCE) | _BV(WDE);
7fca: e0 e6 ldi r30, 0x60 ; 96 1ca: e0 e6 ldi r30, 0x60 ; 96
7fcc: f0 e0 ldi r31, 0x00 ; 0 1cc: f0 e0 ldi r31, 0x00 ; 0
7fce: 98 e1 ldi r25, 0x18 ; 24 1ce: 98 e1 ldi r25, 0x18 ; 24
7fd0: 90 83 st Z, r25 1d0: 90 83 st Z, r25
WDTCSR = x; WDTCSR = x;
7fd2: 80 83 st Z, r24 1d2: 80 83 st Z, r24
} }
7fd4: 08 95 ret 1d4: 08 95 ret
00007fd6 <appStart>: 000001d6 <appStart>:
void appStart() { void appStart() {
watchdogConfig(WATCHDOG_OFF); watchdogConfig(WATCHDOG_OFF);
7fd6: 80 e0 ldi r24, 0x00 ; 0 1d6: 80 e0 ldi r24, 0x00 ; 0
7fd8: f8 df rcall .-16 ; 0x7fca <watchdogConfig> 1d8: f8 df rcall .-16 ; 0x1ca <watchdogConfig>
__asm__ __volatile__ ( __asm__ __volatile__ (
7fda: ee 27 eor r30, r30 1da: ee 27 eor r30, r30
7fdc: ff 27 eor r31, r31 1dc: ff 27 eor r31, r31
7fde: 09 94 ijmp 1de: 09 94 ijmp
00007fe0 <verifySpace>: 000001e0 <verifySpace>:
do getch(); while (--count); do getch(); while (--count);
verifySpace(); verifySpace();
} }
void verifySpace() { void verifySpace() {
if (getch() != CRC_EOP) appStart(); if (getch() != CRC_EOP) appStart();
7fe0: e7 df rcall .-50 ; 0x7fb0 <getch> 1e0: e7 df rcall .-50 ; 0x1b0 <getch>
7fe2: 80 32 cpi r24, 0x20 ; 32 1e2: 80 32 cpi r24, 0x20 ; 32
7fe4: 09 f0 breq .+2 ; 0x7fe8 <verifySpace+0x8> 1e4: 09 f0 breq .+2 ; 0x1e8 <verifySpace+0x8>
7fe6: f7 df rcall .-18 ; 0x7fd6 <appStart> 1e6: f7 df rcall .-18 ; 0x1d6 <appStart>
putch(STK_INSYNC); putch(STK_INSYNC);
7fe8: 84 e1 ldi r24, 0x14 ; 20 1e8: 84 e1 ldi r24, 0x14 ; 20
} }
7fea: da cf rjmp .-76 ; 0x7fa0 <putch> 1ea: da cf rjmp .-76 ; 0x1a0 <putch>
00007fec <getNch>: 000001ec <getNch>:
::[count] "M" (UART_B_VALUE) ::[count] "M" (UART_B_VALUE)
); );
} }
#endif #endif
void getNch(uint8_t count) { void getNch(uint8_t count) {
7fec: 1f 93 push r17 1ec: 1f 93 push r17
7fee: 18 2f mov r17, r24 1ee: 18 2f mov r17, r24
do getch(); while (--count); do getch(); while (--count);
7ff0: df df rcall .-66 ; 0x7fb0 <getch> 1f0: df df rcall .-66 ; 0x1b0 <getch>
7ff2: 11 50 subi r17, 0x01 ; 1 1f2: 11 50 subi r17, 0x01 ; 1
7ff4: e9 f7 brne .-6 ; 0x7ff0 <getNch+0x4> 1f4: e9 f7 brne .-6 ; 0x1f0 <getNch+0x4>
verifySpace(); verifySpace();
7ff6: f4 df rcall .-24 ; 0x7fe0 <verifySpace> 1f6: f4 df rcall .-24 ; 0x1e0 <verifySpace>
} }
7ff8: 1f 91 pop r17 1f8: 1f 91 pop r17
7ffa: 08 95 ret 1fa: 08 95 ret

1
bootloaders/optiboot/optiboot_diecimila.hex
View File

@ -30,5 +30,6 @@
:103FD00090838083089580E0F8DFEE27FF2709941F :103FD00090838083089580E0F8DFEE27FF2709941F
:103FE000E7DF803209F0F7DF84E1DACF1F93182F83 :103FE000E7DF803209F0F7DF84E1DACF1F93182F83
:0C3FF000DFDF1150E9F7F4DF1F910895A6 :0C3FF000DFDF1150E9F7F4DF1F910895A6
:023FFE000104BC
:0400000300003E00BB :0400000300003E00BB
:00000001FF :00000001FF

20
bootloaders/optiboot/optiboot_diecimila.lst
View File

@ -5,23 +5,25 @@ Sections:
Idx Name Size VMA LMA File off Algn Idx Name Size VMA LMA File off Algn
0 .text 000001fc 00003e00 00003e00 00000054 2**1 0 .text 000001fc 00003e00 00003e00 00000054 2**1
CONTENTS, ALLOC, LOAD, READONLY, CODE CONTENTS, ALLOC, LOAD, READONLY, CODE
1 .debug_aranges 00000028 00000000 00000000 00000250 2**0 1 .version 00000002 00003ffe 00003ffe 00000250 2**0
CONTENTS, READONLY
2 .debug_aranges 00000028 00000000 00000000 00000252 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
2 .debug_pubnames 0000006a 00000000 00000000 00000278 2**0 3 .debug_pubnames 0000006a 00000000 00000000 0000027a 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
3 .debug_info 00000284 00000000 00000000 000002e2 2**0 4 .debug_info 00000285 00000000 00000000 000002e4 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
4 .debug_abbrev 000001ae 00000000 00000000 00000566 2**0 5 .debug_abbrev 0000019f 00000000 00000000 00000569 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
5 .debug_line 00000450 00000000 00000000 00000714 2**0 6 .debug_line 00000453 00000000 00000000 00000708 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
6 .debug_frame 00000090 00000000 00000000 00000b64 2**2 7 .debug_frame 00000090 00000000 00000000 00000b5c 2**2
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
7 .debug_str 00000141 00000000 00000000 00000bf4 2**0 8 .debug_str 00000141 00000000 00000000 00000bec 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
8 .debug_loc 000001e1 00000000 00000000 00000d35 2**0 9 .debug_loc 000001e1 00000000 00000000 00000d2d 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
9 .debug_ranges 00000068 00000000 00000000 00000f16 2**0 10 .debug_ranges 00000068 00000000 00000000 00000f0e 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
Disassembly of section .text: Disassembly of section .text:

1
bootloaders/optiboot/optiboot_lilypad.hex
View File

@ -30,5 +30,6 @@
:103FD00090838083089580E0F8DFEE27FF2709941F :103FD00090838083089580E0F8DFEE27FF2709941F
:103FE000E7DF803209F0F7DF84E1DACF1F93182F83 :103FE000E7DF803209F0F7DF84E1DACF1F93182F83
:0C3FF000DFDF1150E9F7F4DF1F910895A6 :0C3FF000DFDF1150E9F7F4DF1F910895A6
:023FFE000104BC
:0400000300003E00BB :0400000300003E00BB
:00000001FF :00000001FF

20
bootloaders/optiboot/optiboot_lilypad.lst
View File

@ -5,23 +5,25 @@ Sections:
Idx Name Size VMA LMA File off Algn Idx Name Size VMA LMA File off Algn
0 .text 000001fc 00003e00 00003e00 00000054 2**1 0 .text 000001fc 00003e00 00003e00 00000054 2**1
CONTENTS, ALLOC, LOAD, READONLY, CODE CONTENTS, ALLOC, LOAD, READONLY, CODE
1 .debug_aranges 00000028 00000000 00000000 00000250 2**0 1 .version 00000002 00003ffe 00003ffe 00000250 2**0
CONTENTS, READONLY
2 .debug_aranges 00000028 00000000 00000000 00000252 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
2 .debug_pubnames 0000006a 00000000 00000000 00000278 2**0 3 .debug_pubnames 0000006a 00000000 00000000 0000027a 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
3 .debug_info 00000284 00000000 00000000 000002e2 2**0 4 .debug_info 00000285 00000000 00000000 000002e4 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
4 .debug_abbrev 000001ae 00000000 00000000 00000566 2**0 5 .debug_abbrev 0000019f 00000000 00000000 00000569 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
5 .debug_line 00000450 00000000 00000000 00000714 2**0 6 .debug_line 00000453 00000000 00000000 00000708 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
6 .debug_frame 00000090 00000000 00000000 00000b64 2**2 7 .debug_frame 00000090 00000000 00000000 00000b5c 2**2
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
7 .debug_str 00000141 00000000 00000000 00000bf4 2**0 8 .debug_str 00000141 00000000 00000000 00000bec 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
8 .debug_loc 000001e1 00000000 00000000 00000d35 2**0 9 .debug_loc 000001e1 00000000 00000000 00000d2d 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
9 .debug_ranges 00000068 00000000 00000000 00000f16 2**0 10 .debug_ranges 00000068 00000000 00000000 00000f0e 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
Disassembly of section .text: Disassembly of section .text:

1
bootloaders/optiboot/optiboot_lilypad_resonator.hex
View File

@ -30,5 +30,6 @@
:103FD00090838083089580E0F8DFEE27FF2709941F :103FD00090838083089580E0F8DFEE27FF2709941F
:103FE000E7DF803209F0F7DF84E1DACF1F93182F83 :103FE000E7DF803209F0F7DF84E1DACF1F93182F83
:0C3FF000DFDF1150E9F7F4DF1F910895A6 :0C3FF000DFDF1150E9F7F4DF1F910895A6
:023FFE000104BC
:0400000300003E00BB :0400000300003E00BB
:00000001FF :00000001FF

20
bootloaders/optiboot/optiboot_lilypad_resonator.lst
View File

@ -5,23 +5,25 @@ Sections:
Idx Name Size VMA LMA File off Algn Idx Name Size VMA LMA File off Algn
0 .text 000001fc 00003e00 00003e00 00000054 2**1 0 .text 000001fc 00003e00 00003e00 00000054 2**1
CONTENTS, ALLOC, LOAD, READONLY, CODE CONTENTS, ALLOC, LOAD, READONLY, CODE
1 .debug_aranges 00000028 00000000 00000000 00000250 2**0 1 .version 00000002 00003ffe 00003ffe 00000250 2**0
CONTENTS, READONLY
2 .debug_aranges 00000028 00000000 00000000 00000252 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
2 .debug_pubnames 0000006a 00000000 00000000 00000278 2**0 3 .debug_pubnames 0000006a 00000000 00000000 0000027a 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
3 .debug_info 00000284 00000000 00000000 000002e2 2**0 4 .debug_info 00000285 00000000 00000000 000002e4 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
4 .debug_abbrev 000001ae 00000000 00000000 00000566 2**0 5 .debug_abbrev 0000019f 00000000 00000000 00000569 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
5 .debug_line 00000450 00000000 00000000 00000714 2**0 6 .debug_line 00000453 00000000 00000000 00000708 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
6 .debug_frame 00000090 00000000 00000000 00000b64 2**2 7 .debug_frame 00000090 00000000 00000000 00000b5c 2**2
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
7 .debug_str 00000141 00000000 00000000 00000bf4 2**0 8 .debug_str 00000141 00000000 00000000 00000bec 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
8 .debug_loc 000001e1 00000000 00000000 00000d35 2**0 9 .debug_loc 000001e1 00000000 00000000 00000d2d 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
9 .debug_ranges 00000068 00000000 00000000 00000f16 2**0 10 .debug_ranges 00000068 00000000 00000000 00000f0e 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
Disassembly of section .text: Disassembly of section .text:

82
bootloaders/optiboot/optiboot_luminet.hex
View File

@ -1,42 +1,42 @@
:101D0000112484B714BE81FF22D185E08EBD8EE000 :10000000112484B714BE81FF22D185E08EBD8EE01D
:101D10001AD1D49AD29A86E023EC3FEF91E03DBDF0 :100010001AD1D49AD29A86E023EC3FEF91E03DBD0D
:101D20002CBD9BB9589BFECFCC9AA8958150B9F792 :100020002CBD9BB9589BFECFCC9AA8958150B9F7AF
:101D3000DD24D39485E0C82E0FE7F02E1EECE12EB3 :10003000DD24D39485E0C82E0FE7F02E1EECE12ED0
:101D4000E9D0813421F481E00DD183E020C08234D8 :10004000E9D0813421F481E00DD183E020C08234F5
:101D500011F484E103C0853419F485E003D1C8C0CF :1000500011F484E103C0853419F485E003D1C8C0EC
:101D6000853581F4D7D0082F10E0D4D090E0982F9B :10006000853581F4D7D0082F10E0D4D090E0982FB8
:101D70008827802B912B880F991F90938101809346 :100070008827802B912B880F991F90938101809363
:101D80008001B5C0863529F484E0ECD080E0B3D082 :100080008001B5C0863529F484E0ECD080E0B3D09F
:101D9000AFC0843609F06BC0D1D0C0E0D1E0BAD07A :10009000AFC0843609F06BC0D1D0C0E0D1E0BAD097
:101DA0008993809182018150809382018823B9F7C1 :1000A0008993809182018150809382018823B9F7DE
:101DB000E0918001F091810183E087BFE895CCD06C :1000B000E0918001F091810183E087BFE895CCD089
:101DC00007B600FCFDCF8091800190918101892BA5 :1000C00007B600FCFDCF8091800190918101892BC2
:101DD00041F5809100012091010130E0322F22274E :1000D00041F5809100012091010130E0322F22276B
:101DE00090E0282B392B309385012093840140917A :1000E00090E0282B392B3093850120938401409197
:101DF00008018091090190E0982F882750E0842BFA :1000F00008018091090190E0982F882750E0842B17
:101E0000952B909387018093860124503040209336 :10010000952B909387018093860124503040209353
:101E10000801232F332720930901F0920001E0925B :100110000801232F332720930901F0920001E09278
:101E200001014091800150918101A0E0B1E02C912D :1001200001014091800150918101A0E0B1E02C914A
:101E300030E011968C91119790E0982F8827822B93 :1001300030E011968C91119790E0982F8827822BB0
:101E4000932B1296FA010C01D7BEE89511244E5F30 :10014000932B1296FA010C01D7BEE89511244E5F4D
:101E50005F4FF1E0A034BF0751F7E0918001F091AE :100150005F4FF1E0A034BF0751F7E0918001F091CB
:101E60008101C7BEE89507B600FCFDCF41C08437AD :100160008101C7BEE89507B600FCFDCF41C08437CA
:101E700089F564D071D0E0918001F09181013097B3 :1001700089F564D071D0E0918001F09181013097D0
:101E800019F42091840113C0E130F10519F4209177 :1001800019F42091840113C0E130F10519F4209194
:101E900085010DC0E830F10519F42091860107C0D5 :1001900085010DC0E830F10519F42091860107C0F2
:101EA000E930F10519F42091870101C02491809156 :1001A000E930F10519F42091870101C02491809173
:101EB000800190918101019690938101809380012E :1001B000800190918101019690938101809380014B
:101EC000822F19D0809182018150809382018823D2 :1001C000822F19D0809182018150809382018823EF
:101ED00091F60EC0853739F43FD08EE10CD083E9FE :1001D00091F60EC0853739F43FD08EE10CD083E91B
:101EE0000AD08CE054CF813511F488E02CD034D066 :1001E0000AD08CE054CF813511F488E02CD034D083
:101EF00080E101D025CF2AE030E08095089410F4ED :1001F00080E101D025CF2AE030E08095089410F40A
:101F0000DA9802C0DA9A000015D014D086952A9586 :10020000DA9802C0DA9A000015D014D086952A95A3
:101F1000B1F70895A89529E030E0CB99FECF0AD01B :10021000B1F70895A89529E030E0CB99FECF0AD038
:101F200009D008D08894CB9908942A9511F0879508 :1002200009D008D08894CB9908942A9511F0879525
:101F3000F7CF08959EE09A95F1F70895EBDFEADF79 :10023000F7CF08959EE09A95F1F70895EBDFEADF96
:101F400080938201E7CF98E191BD81BD089580E043 :1002400080938201E7CF98E191BD81BD089580E060
:101F5000FADFE4E0FF270994DDDF803209F0F7DFE4 :10025000FADFE4E0FF270994DDDF803209F0F7DF01
:101F600084E1C9CF1F93182FD5DF1150E9F7F4DFB3 :1002600084E1C9CF1F93182FD5DF1150E9F7F4DFD0
:041F70001F91089520 :040270001F9108953D
:0400000300001D00DC :021EFE000104DD
:00000001FF :00000001FF

594
bootloaders/optiboot/optiboot_luminet.lst
View File

@ -3,620 +3,622 @@ optiboot_luminet.elf: file format elf32-avr
Sections: Sections:
Idx Name Size VMA LMA File off Algn Idx Name Size VMA LMA File off Algn
0 .text 00000274 00001d00 00001d00 00000054 2**1 0 .version 00000002 00001efe 00001efe 000002c8 2**0
CONTENTS, READONLY
1 .text 00000274 00000000 00000000 00000054 2**1
CONTENTS, ALLOC, LOAD, READONLY, CODE CONTENTS, ALLOC, LOAD, READONLY, CODE
1 .debug_aranges 00000028 00000000 00000000 000002c8 2**0 2 .debug_aranges 00000028 00000000 00000000 000002ca 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
2 .debug_pubnames 00000078 00000000 00000000 000002f0 2**0 3 .debug_pubnames 00000078 00000000 00000000 000002f2 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
3 .debug_info 000002a4 00000000 00000000 00000368 2**0 4 .debug_info 000002a5 00000000 00000000 0000036a 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
4 .debug_abbrev 000001ac 00000000 00000000 0000060c 2**0 5 .debug_abbrev 0000019d 00000000 00000000 0000060f 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
5 .debug_line 000004a9 00000000 00000000 000007b8 2**0 6 .debug_line 000004ac 00000000 00000000 000007ac 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
6 .debug_frame 000000a0 00000000 00000000 00000c64 2**2 7 .debug_frame 000000a0 00000000 00000000 00000c58 2**2
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
7 .debug_str 00000150 00000000 00000000 00000d04 2**0 8 .debug_str 00000150 00000000 00000000 00000cf8 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
8 .debug_loc 00000194 00000000 00000000 00000e54 2**0 9 .debug_loc 00000194 00000000 00000000 00000e48 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
9 .debug_ranges 00000088 00000000 00000000 00000fe8 2**0 10 .debug_ranges 00000088 00000000 00000000 00000fdc 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
Disassembly of section .text: Disassembly of section .text:
00001d00 <main>: 00000000 <main>:
#define rstVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+4)) #define rstVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+4))
#define wdtVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+6)) #define wdtVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+6))
#endif #endif
/* main program starts here */ /* main program starts here */
int main(void) { int main(void) {
1d00: 11 24 eor r1, r1 0: 11 24 eor r1, r1
#ifdef __AVR_ATmega8__ #ifdef __AVR_ATmega8__
SP=RAMEND; // This is done by hardware reset SP=RAMEND; // This is done by hardware reset
#endif #endif
// Adaboot no-wait mod // Adaboot no-wait mod
ch = MCUSR; ch = MCUSR;
1d02: 84 b7 in r24, 0x34 ; 52 2: 84 b7 in r24, 0x34 ; 52
MCUSR = 0; MCUSR = 0;
1d04: 14 be out 0x34, r1 ; 52 4: 14 be out 0x34, r1 ; 52
if (!(ch & _BV(EXTRF))) appStart(); if (!(ch & _BV(EXTRF))) appStart();
1d06: 81 ff sbrs r24, 1 6: 81 ff sbrs r24, 1
1d08: 22 d1 rcall .+580 ; 0x1f4e <appStart> 8: 22 d1 rcall .+580 ; 0x24e <appStart>
#if LED_START_FLASHES > 0 #if LED_START_FLASHES > 0
// Set up Timer 1 for timeout counter // Set up Timer 1 for timeout counter
TCCR1B = _BV(CS12) | _BV(CS10); // div 1024 TCCR1B = _BV(CS12) | _BV(CS10); // div 1024
1d0a: 85 e0 ldi r24, 0x05 ; 5 a: 85 e0 ldi r24, 0x05 ; 5
1d0c: 8e bd out 0x2e, r24 ; 46 c: 8e bd out 0x2e, r24 ; 46
UBRR0L = (uint8_t)( (F_CPU + BAUD_RATE * 4L) / (BAUD_RATE * 8L) - 1 ); UBRR0L = (uint8_t)( (F_CPU + BAUD_RATE * 4L) / (BAUD_RATE * 8L) - 1 );
#endif #endif
#endif #endif
// Set up watchdog to trigger after 500ms // Set up watchdog to trigger after 500ms
watchdogConfig(WATCHDOG_1S); watchdogConfig(WATCHDOG_1S);
1d0e: 8e e0 ldi r24, 0x0E ; 14 e: 8e e0 ldi r24, 0x0E ; 14
1d10: 1a d1 rcall .+564 ; 0x1f46 <watchdogConfig> 10: 1a d1 rcall .+564 ; 0x246 <watchdogConfig>
/* Set LED pin as output */ /* Set LED pin as output */
LED_DDR |= _BV(LED); LED_DDR |= _BV(LED);
1d12: d4 9a sbi 0x1a, 4 ; 26 12: d4 9a sbi 0x1a, 4 ; 26
#ifdef SOFT_UART #ifdef SOFT_UART
/* Set TX pin as output */ /* Set TX pin as output */
UART_DDR |= _BV(UART_TX_BIT); UART_DDR |= _BV(UART_TX_BIT);
1d14: d2 9a sbi 0x1a, 2 ; 26 14: d2 9a sbi 0x1a, 2 ; 26
1d16: 86 e0 ldi r24, 0x06 ; 6 16: 86 e0 ldi r24, 0x06 ; 6
} }
#if LED_START_FLASHES > 0 #if LED_START_FLASHES > 0
void flash_led(uint8_t count) { void flash_led(uint8_t count) {
do { do {
TCNT1 = -(F_CPU/(1024*16)); TCNT1 = -(F_CPU/(1024*16));
1d18: 23 ec ldi r18, 0xC3 ; 195 18: 23 ec ldi r18, 0xC3 ; 195
1d1a: 3f ef ldi r19, 0xFF ; 255 1a: 3f ef ldi r19, 0xFF ; 255
TIFR1 = _BV(TOV1); TIFR1 = _BV(TOV1);
1d1c: 91 e0 ldi r25, 0x01 ; 1 1c: 91 e0 ldi r25, 0x01 ; 1
} }
#if LED_START_FLASHES > 0 #if LED_START_FLASHES > 0
void flash_led(uint8_t count) { void flash_led(uint8_t count) {
do { do {
TCNT1 = -(F_CPU/(1024*16)); TCNT1 = -(F_CPU/(1024*16));
1d1e: 3d bd out 0x2d, r19 ; 45 1e: 3d bd out 0x2d, r19 ; 45
1d20: 2c bd out 0x2c, r18 ; 44 20: 2c bd out 0x2c, r18 ; 44
TIFR1 = _BV(TOV1); TIFR1 = _BV(TOV1);
1d22: 9b b9 out 0x0b, r25 ; 11 22: 9b b9 out 0x0b, r25 ; 11
while(!(TIFR1 & _BV(TOV1))); while(!(TIFR1 & _BV(TOV1)));
1d24: 58 9b sbis 0x0b, 0 ; 11 24: 58 9b sbis 0x0b, 0 ; 11
1d26: fe cf rjmp .-4 ; 0x1d24 <main+0x24> 26: fe cf rjmp .-4 ; 0x24 <__zero_reg__+0x23>
#ifdef __AVR_ATmega8__ #ifdef __AVR_ATmega8__
LED_PORT ^= _BV(LED); LED_PORT ^= _BV(LED);
#else #else
LED_PIN |= _BV(LED); LED_PIN |= _BV(LED);
1d28: cc 9a sbi 0x19, 4 ; 25 28: cc 9a sbi 0x19, 4 ; 25
return getch(); return getch();
} }
// Watchdog functions. These are only safe with interrupts turned off. // Watchdog functions. These are only safe with interrupts turned off.
void watchdogReset() { void watchdogReset() {
__asm__ __volatile__ ( __asm__ __volatile__ (
1d2a: a8 95 wdr 2a: a8 95 wdr
LED_PORT ^= _BV(LED); LED_PORT ^= _BV(LED);
#else #else
LED_PIN |= _BV(LED); LED_PIN |= _BV(LED);
#endif #endif
watchdogReset(); watchdogReset();
} while (--count); } while (--count);
1d2c: 81 50 subi r24, 0x01 ; 1 2c: 81 50 subi r24, 0x01 ; 1
1d2e: b9 f7 brne .-18 ; 0x1d1e <main+0x1e> 2e: b9 f7 brne .-18 ; 0x1e <__zero_reg__+0x1d>
/* get character from UART */ /* get character from UART */
ch = getch(); ch = getch();
if(ch == STK_GET_PARAMETER) { if(ch == STK_GET_PARAMETER) {
// GET PARAMETER returns a generic 0x03 reply - enough to keep Avrdude happy // GET PARAMETER returns a generic 0x03 reply - enough to keep Avrdude happy
getNch(1); getNch(1);
1d30: dd 24 eor r13, r13 30: dd 24 eor r13, r13
1d32: d3 94 inc r13 32: d3 94 inc r13
__boot_page_fill_short((uint16_t)(void*)addrPtr,a); __boot_page_fill_short((uint16_t)(void*)addrPtr,a);
addrPtr += 2; addrPtr += 2;
} while (--ch); } while (--ch);
// Write from programming buffer // Write from programming buffer
__boot_page_write_short((uint16_t)(void*)address); __boot_page_write_short((uint16_t)(void*)address);
1d34: 85 e0 ldi r24, 0x05 ; 5 34: 85 e0 ldi r24, 0x05 ; 5
1d36: c8 2e mov r12, r24 36: c8 2e mov r12, r24
vect -= 4; // Instruction is a relative jump (rjmp), so recalculate. vect -= 4; // Instruction is a relative jump (rjmp), so recalculate.
buff[8] = vect & 0xff; buff[8] = vect & 0xff;
buff[9] = vect >> 8; buff[9] = vect >> 8;
// Add jump to bootloader at RESET vector // Add jump to bootloader at RESET vector
buff[0] = 0x7f; buff[0] = 0x7f;
1d38: 0f e7 ldi r16, 0x7F ; 127 38: 0f e7 ldi r16, 0x7F ; 127
1d3a: f0 2e mov r15, r16 3a: f0 2e mov r15, r16
buff[1] = 0xce; // rjmp 0x1d00 instruction buff[1] = 0xce; // rjmp 0x1d00 instruction
1d3c: 1e ec ldi r17, 0xCE ; 206 3c: 1e ec ldi r17, 0xCE ; 206
1d3e: e1 2e mov r14, r17 3e: e1 2e mov r14, r17
#endif #endif
/* Forever loop */ /* Forever loop */
for (;;) { for (;;) {
/* get character from UART */ /* get character from UART */
ch = getch(); ch = getch();
1d40: e9 d0 rcall .+466 ; 0x1f14 <getch> 40: e9 d0 rcall .+466 ; 0x214 <getch>
if(ch == STK_GET_PARAMETER) { if(ch == STK_GET_PARAMETER) {
1d42: 81 34 cpi r24, 0x41 ; 65 42: 81 34 cpi r24, 0x41 ; 65
1d44: 21 f4 brne .+8 ; 0x1d4e <main+0x4e> 44: 21 f4 brne .+8 ; 0x4e <__SREG__+0xf>
// GET PARAMETER returns a generic 0x03 reply - enough to keep Avrdude happy // GET PARAMETER returns a generic 0x03 reply - enough to keep Avrdude happy
getNch(1); getNch(1);
1d46: 81 e0 ldi r24, 0x01 ; 1 46: 81 e0 ldi r24, 0x01 ; 1
1d48: 0d d1 rcall .+538 ; 0x1f64 <getNch> 48: 0d d1 rcall .+538 ; 0x264 <getNch>
putch(0x03); putch(0x03);
1d4a: 83 e0 ldi r24, 0x03 ; 3 4a: 83 e0 ldi r24, 0x03 ; 3
1d4c: 20 c0 rjmp .+64 ; 0x1d8e <main+0x8e> 4c: 20 c0 rjmp .+64 ; 0x8e <__SREG__+0x4f>
} }
else if(ch == STK_SET_DEVICE) { else if(ch == STK_SET_DEVICE) {
1d4e: 82 34 cpi r24, 0x42 ; 66 4e: 82 34 cpi r24, 0x42 ; 66
1d50: 11 f4 brne .+4 ; 0x1d56 <main+0x56> 50: 11 f4 brne .+4 ; 0x56 <__SREG__+0x17>
// SET DEVICE is ignored // SET DEVICE is ignored
getNch(20); getNch(20);
1d52: 84 e1 ldi r24, 0x14 ; 20 52: 84 e1 ldi r24, 0x14 ; 20
1d54: 03 c0 rjmp .+6 ; 0x1d5c <main+0x5c> 54: 03 c0 rjmp .+6 ; 0x5c <__SREG__+0x1d>
} }
else if(ch == STK_SET_DEVICE_EXT) { else if(ch == STK_SET_DEVICE_EXT) {
1d56: 85 34 cpi r24, 0x45 ; 69 56: 85 34 cpi r24, 0x45 ; 69
1d58: 19 f4 brne .+6 ; 0x1d60 <main+0x60> 58: 19 f4 brne .+6 ; 0x60 <__SREG__+0x21>
// SET DEVICE EXT is ignored // SET DEVICE EXT is ignored
getNch(5); getNch(5);
1d5a: 85 e0 ldi r24, 0x05 ; 5 5a: 85 e0 ldi r24, 0x05 ; 5
1d5c: 03 d1 rcall .+518 ; 0x1f64 <getNch> 5c: 03 d1 rcall .+518 ; 0x264 <getNch>
1d5e: c8 c0 rjmp .+400 ; 0x1ef0 <main+0x1f0> 5e: c8 c0 rjmp .+400 ; 0x1f0 <__SREG__+0x1b1>
} }
else if(ch == STK_LOAD_ADDRESS) { else if(ch == STK_LOAD_ADDRESS) {
1d60: 85 35 cpi r24, 0x55 ; 85 60: 85 35 cpi r24, 0x55 ; 85
1d62: 81 f4 brne .+32 ; 0x1d84 <main+0x84> 62: 81 f4 brne .+32 ; 0x84 <__SREG__+0x45>
// LOAD ADDRESS // LOAD ADDRESS
uint16_t newAddress; uint16_t newAddress;
newAddress = getch(); newAddress = getch();
1d64: d7 d0 rcall .+430 ; 0x1f14 <getch> 64: d7 d0 rcall .+430 ; 0x214 <getch>
newAddress = (newAddress & 0xff) | (getch() << 8); newAddress = (newAddress & 0xff) | (getch() << 8);
1d66: 08 2f mov r16, r24 66: 08 2f mov r16, r24
1d68: 10 e0 ldi r17, 0x00 ; 0 68: 10 e0 ldi r17, 0x00 ; 0
1d6a: d4 d0 rcall .+424 ; 0x1f14 <getch> 6a: d4 d0 rcall .+424 ; 0x214 <getch>
1d6c: 90 e0 ldi r25, 0x00 ; 0 6c: 90 e0 ldi r25, 0x00 ; 0
1d6e: 98 2f mov r25, r24 6e: 98 2f mov r25, r24
1d70: 88 27 eor r24, r24 70: 88 27 eor r24, r24
1d72: 80 2b or r24, r16 72: 80 2b or r24, r16
1d74: 91 2b or r25, r17 74: 91 2b or r25, r17
#ifdef RAMPZ #ifdef RAMPZ
// Transfer top bit to RAMPZ // Transfer top bit to RAMPZ
RAMPZ = (newAddress & 0x8000) ? 1 : 0; RAMPZ = (newAddress & 0x8000) ? 1 : 0;
#endif #endif
newAddress += newAddress; // Convert from word address to byte address newAddress += newAddress; // Convert from word address to byte address
1d76: 88 0f add r24, r24 76: 88 0f add r24, r24
1d78: 99 1f adc r25, r25 78: 99 1f adc r25, r25
address = newAddress; address = newAddress;
1d7a: 90 93 81 01 sts 0x0181, r25 7a: 90 93 81 01 sts 0x0181, r25
1d7e: 80 93 80 01 sts 0x0180, r24 7e: 80 93 80 01 sts 0x0180, r24
1d82: b5 c0 rjmp .+362 ; 0x1eee <main+0x1ee> 82: b5 c0 rjmp .+362 ; 0x1ee <__SREG__+0x1af>
verifySpace(); verifySpace();
} }
else if(ch == STK_UNIVERSAL) { else if(ch == STK_UNIVERSAL) {
1d84: 86 35 cpi r24, 0x56 ; 86 84: 86 35 cpi r24, 0x56 ; 86
1d86: 29 f4 brne .+10 ; 0x1d92 <main+0x92> 86: 29 f4 brne .+10 ; 0x92 <__SREG__+0x53>
// UNIVERSAL command is ignored // UNIVERSAL command is ignored
getNch(4); getNch(4);
1d88: 84 e0 ldi r24, 0x04 ; 4 88: 84 e0 ldi r24, 0x04 ; 4
1d8a: ec d0 rcall .+472 ; 0x1f64 <getNch> 8a: ec d0 rcall .+472 ; 0x264 <getNch>
putch(0x00); putch(0x00);
1d8c: 80 e0 ldi r24, 0x00 ; 0 8c: 80 e0 ldi r24, 0x00 ; 0
1d8e: b3 d0 rcall .+358 ; 0x1ef6 <putch> 8e: b3 d0 rcall .+358 ; 0x1f6 <putch>
1d90: af c0 rjmp .+350 ; 0x1ef0 <main+0x1f0> 90: af c0 rjmp .+350 ; 0x1f0 <__SREG__+0x1b1>
} }
/* Write memory, length is big endian and is in bytes */ /* Write memory, length is big endian and is in bytes */
else if(ch == STK_PROG_PAGE) { else if(ch == STK_PROG_PAGE) {
1d92: 84 36 cpi r24, 0x64 ; 100 92: 84 36 cpi r24, 0x64 ; 100
1d94: 09 f0 breq .+2 ; 0x1d98 <main+0x98> 94: 09 f0 breq .+2 ; 0x98 <__SREG__+0x59>
1d96: 6b c0 rjmp .+214 ; 0x1e6e <main+0x16e> 96: 6b c0 rjmp .+214 ; 0x16e <__SREG__+0x12f>
// PROGRAM PAGE - we support flash programming only, not EEPROM // PROGRAM PAGE - we support flash programming only, not EEPROM
uint8_t *bufPtr; uint8_t *bufPtr;
uint16_t addrPtr; uint16_t addrPtr;
getLen(); getLen();
1d98: d1 d0 rcall .+418 ; 0x1f3c <getLen> 98: d1 d0 rcall .+418 ; 0x23c <getLen>
1d9a: c0 e0 ldi r28, 0x00 ; 0 9a: c0 e0 ldi r28, 0x00 ; 0
1d9c: d1 e0 ldi r29, 0x01 ; 1 9c: d1 e0 ldi r29, 0x01 ; 1
// If we are in RWW section, immediately start page erase // If we are in RWW section, immediately start page erase
if (address < NRWWSTART) __boot_page_erase_short((uint16_t)(void*)address); if (address < NRWWSTART) __boot_page_erase_short((uint16_t)(void*)address);
// While that is going on, read in page contents // While that is going on, read in page contents
bufPtr = buff; bufPtr = buff;
do *bufPtr++ = getch(); do *bufPtr++ = getch();
1d9e: ba d0 rcall .+372 ; 0x1f14 <getch> 9e: ba d0 rcall .+372 ; 0x214 <getch>
1da0: 89 93 st Y+, r24 a0: 89 93 st Y+, r24
while (--length); while (--length);
1da2: 80 91 82 01 lds r24, 0x0182 a2: 80 91 82 01 lds r24, 0x0182
1da6: 81 50 subi r24, 0x01 ; 1 a6: 81 50 subi r24, 0x01 ; 1
1da8: 80 93 82 01 sts 0x0182, r24 a8: 80 93 82 01 sts 0x0182, r24
1dac: 88 23 and r24, r24 ac: 88 23 and r24, r24
1dae: b9 f7 brne .-18 ; 0x1d9e <main+0x9e> ae: b9 f7 brne .-18 ; 0x9e <__SREG__+0x5f>
// If we are in NRWW section, page erase has to be delayed until now. // If we are in NRWW section, page erase has to be delayed until now.
// Todo: Take RAMPZ into account // Todo: Take RAMPZ into account
if (address >= NRWWSTART) __boot_page_erase_short((uint16_t)(void*)address); if (address >= NRWWSTART) __boot_page_erase_short((uint16_t)(void*)address);
1db0: e0 91 80 01 lds r30, 0x0180 b0: e0 91 80 01 lds r30, 0x0180
1db4: f0 91 81 01 lds r31, 0x0181 b4: f0 91 81 01 lds r31, 0x0181
1db8: 83 e0 ldi r24, 0x03 ; 3 b8: 83 e0 ldi r24, 0x03 ; 3
1dba: 87 bf out 0x37, r24 ; 55 ba: 87 bf out 0x37, r24 ; 55
1dbc: e8 95 spm bc: e8 95 spm
// Read command terminator, start reply // Read command terminator, start reply
verifySpace(); verifySpace();
1dbe: cc d0 rcall .+408 ; 0x1f58 <verifySpace> be: cc d0 rcall .+408 ; 0x258 <verifySpace>
// If only a partial page is to be programmed, the erase might not be complete. // If only a partial page is to be programmed, the erase might not be complete.
// So check that here // So check that here
boot_spm_busy_wait(); boot_spm_busy_wait();
1dc0: 07 b6 in r0, 0x37 ; 55 c0: 07 b6 in r0, 0x37 ; 55
1dc2: 00 fc sbrc r0, 0 c2: 00 fc sbrc r0, 0
1dc4: fd cf rjmp .-6 ; 0x1dc0 <main+0xc0> c4: fd cf rjmp .-6 ; 0xc0 <__SREG__+0x81>
#ifdef VIRTUAL_BOOT_PARTITION #ifdef VIRTUAL_BOOT_PARTITION
if ((uint16_t)(void*)address == 0) { if ((uint16_t)(void*)address == 0) {
1dc6: 80 91 80 01 lds r24, 0x0180 c6: 80 91 80 01 lds r24, 0x0180
1dca: 90 91 81 01 lds r25, 0x0181 ca: 90 91 81 01 lds r25, 0x0181
1dce: 89 2b or r24, r25 ce: 89 2b or r24, r25
1dd0: 41 f5 brne .+80 ; 0x1e22 <main+0x122> d0: 41 f5 brne .+80 ; 0x122 <__SREG__+0xe3>
// This is the reset vector page. We need to live-patch the code so the // This is the reset vector page. We need to live-patch the code so the
// bootloader runs. // bootloader runs.
// //
// Move RESET vector to WDT vector // Move RESET vector to WDT vector
uint16_t vect = buff[0] | (buff[1]<<8); uint16_t vect = buff[0] | (buff[1]<<8);
1dd2: 80 91 00 01 lds r24, 0x0100 d2: 80 91 00 01 lds r24, 0x0100
1dd6: 20 91 01 01 lds r18, 0x0101 d6: 20 91 01 01 lds r18, 0x0101
1dda: 30 e0 ldi r19, 0x00 ; 0 da: 30 e0 ldi r19, 0x00 ; 0
1ddc: 32 2f mov r19, r18 dc: 32 2f mov r19, r18
1dde: 22 27 eor r18, r18 de: 22 27 eor r18, r18
1de0: 90 e0 ldi r25, 0x00 ; 0 e0: 90 e0 ldi r25, 0x00 ; 0
1de2: 28 2b or r18, r24 e2: 28 2b or r18, r24
1de4: 39 2b or r19, r25 e4: 39 2b or r19, r25
rstVect = vect; rstVect = vect;
1de6: 30 93 85 01 sts 0x0185, r19 e6: 30 93 85 01 sts 0x0185, r19
1dea: 20 93 84 01 sts 0x0184, r18 ea: 20 93 84 01 sts 0x0184, r18
wdtVect = buff[8] | (buff[9]<<8); wdtVect = buff[8] | (buff[9]<<8);
1dee: 40 91 08 01 lds r20, 0x0108 ee: 40 91 08 01 lds r20, 0x0108
1df2: 80 91 09 01 lds r24, 0x0109 f2: 80 91 09 01 lds r24, 0x0109
1df6: 90 e0 ldi r25, 0x00 ; 0 f6: 90 e0 ldi r25, 0x00 ; 0
1df8: 98 2f mov r25, r24 f8: 98 2f mov r25, r24
1dfa: 88 27 eor r24, r24 fa: 88 27 eor r24, r24
1dfc: 50 e0 ldi r21, 0x00 ; 0 fc: 50 e0 ldi r21, 0x00 ; 0
1dfe: 84 2b or r24, r20 fe: 84 2b or r24, r20
1e00: 95 2b or r25, r21 100: 95 2b or r25, r21
1e02: 90 93 87 01 sts 0x0187, r25 102: 90 93 87 01 sts 0x0187, r25
1e06: 80 93 86 01 sts 0x0186, r24 106: 80 93 86 01 sts 0x0186, r24
vect -= 4; // Instruction is a relative jump (rjmp), so recalculate. vect -= 4; // Instruction is a relative jump (rjmp), so recalculate.
1e0a: 24 50 subi r18, 0x04 ; 4 10a: 24 50 subi r18, 0x04 ; 4
1e0c: 30 40 sbci r19, 0x00 ; 0 10c: 30 40 sbci r19, 0x00 ; 0
buff[8] = vect & 0xff; buff[8] = vect & 0xff;
1e0e: 20 93 08 01 sts 0x0108, r18 10e: 20 93 08 01 sts 0x0108, r18
buff[9] = vect >> 8; buff[9] = vect >> 8;
1e12: 23 2f mov r18, r19 112: 23 2f mov r18, r19
1e14: 33 27 eor r19, r19 114: 33 27 eor r19, r19
1e16: 20 93 09 01 sts 0x0109, r18 116: 20 93 09 01 sts 0x0109, r18
// Add jump to bootloader at RESET vector // Add jump to bootloader at RESET vector
buff[0] = 0x7f; buff[0] = 0x7f;
1e1a: f0 92 00 01 sts 0x0100, r15 11a: f0 92 00 01 sts 0x0100, r15
buff[1] = 0xce; // rjmp 0x1d00 instruction buff[1] = 0xce; // rjmp 0x1d00 instruction
1e1e: e0 92 01 01 sts 0x0101, r14 11e: e0 92 01 01 sts 0x0101, r14
} }
#endif #endif
// Copy buffer into programming buffer // Copy buffer into programming buffer
bufPtr = buff; bufPtr = buff;
addrPtr = (uint16_t)(void*)address; addrPtr = (uint16_t)(void*)address;
1e22: 40 91 80 01 lds r20, 0x0180 122: 40 91 80 01 lds r20, 0x0180
1e26: 50 91 81 01 lds r21, 0x0181 126: 50 91 81 01 lds r21, 0x0181
1e2a: a0 e0 ldi r26, 0x00 ; 0 12a: a0 e0 ldi r26, 0x00 ; 0
1e2c: b1 e0 ldi r27, 0x01 ; 1 12c: b1 e0 ldi r27, 0x01 ; 1
ch = SPM_PAGESIZE / 2; ch = SPM_PAGESIZE / 2;
do { do {
uint16_t a; uint16_t a;
a = *bufPtr++; a = *bufPtr++;
1e2e: 2c 91 ld r18, X 12e: 2c 91 ld r18, X
1e30: 30 e0 ldi r19, 0x00 ; 0 130: 30 e0 ldi r19, 0x00 ; 0
a |= (*bufPtr++) << 8; a |= (*bufPtr++) << 8;
1e32: 11 96 adiw r26, 0x01 ; 1 132: 11 96 adiw r26, 0x01 ; 1
1e34: 8c 91 ld r24, X 134: 8c 91 ld r24, X
1e36: 11 97 sbiw r26, 0x01 ; 1 136: 11 97 sbiw r26, 0x01 ; 1
1e38: 90 e0 ldi r25, 0x00 ; 0 138: 90 e0 ldi r25, 0x00 ; 0
1e3a: 98 2f mov r25, r24 13a: 98 2f mov r25, r24
1e3c: 88 27 eor r24, r24 13c: 88 27 eor r24, r24
1e3e: 82 2b or r24, r18 13e: 82 2b or r24, r18
1e40: 93 2b or r25, r19 140: 93 2b or r25, r19
#define rstVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+4)) #define rstVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+4))
#define wdtVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+6)) #define wdtVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+6))
#endif #endif
/* main program starts here */ /* main program starts here */
int main(void) { int main(void) {
1e42: 12 96 adiw r26, 0x02 ; 2 142: 12 96 adiw r26, 0x02 ; 2
ch = SPM_PAGESIZE / 2; ch = SPM_PAGESIZE / 2;
do { do {
uint16_t a; uint16_t a;
a = *bufPtr++; a = *bufPtr++;
a |= (*bufPtr++) << 8; a |= (*bufPtr++) << 8;
__boot_page_fill_short((uint16_t)(void*)addrPtr,a); __boot_page_fill_short((uint16_t)(void*)addrPtr,a);
1e44: fa 01 movw r30, r20 144: fa 01 movw r30, r20
1e46: 0c 01 movw r0, r24 146: 0c 01 movw r0, r24
1e48: d7 be out 0x37, r13 ; 55 148: d7 be out 0x37, r13 ; 55
1e4a: e8 95 spm 14a: e8 95 spm
1e4c: 11 24 eor r1, r1 14c: 11 24 eor r1, r1
addrPtr += 2; addrPtr += 2;
1e4e: 4e 5f subi r20, 0xFE ; 254 14e: 4e 5f subi r20, 0xFE ; 254
1e50: 5f 4f sbci r21, 0xFF ; 255 150: 5f 4f sbci r21, 0xFF ; 255
} while (--ch); } while (--ch);
1e52: f1 e0 ldi r31, 0x01 ; 1 152: f1 e0 ldi r31, 0x01 ; 1
1e54: a0 34 cpi r26, 0x40 ; 64 154: a0 34 cpi r26, 0x40 ; 64
1e56: bf 07 cpc r27, r31 156: bf 07 cpc r27, r31
1e58: 51 f7 brne .-44 ; 0x1e2e <main+0x12e> 158: 51 f7 brne .-44 ; 0x12e <__SREG__+0xef>
// Write from programming buffer // Write from programming buffer
__boot_page_write_short((uint16_t)(void*)address); __boot_page_write_short((uint16_t)(void*)address);
1e5a: e0 91 80 01 lds r30, 0x0180 15a: e0 91 80 01 lds r30, 0x0180
1e5e: f0 91 81 01 lds r31, 0x0181 15e: f0 91 81 01 lds r31, 0x0181
1e62: c7 be out 0x37, r12 ; 55 162: c7 be out 0x37, r12 ; 55
1e64: e8 95 spm 164: e8 95 spm
boot_spm_busy_wait(); boot_spm_busy_wait();
1e66: 07 b6 in r0, 0x37 ; 55 166: 07 b6 in r0, 0x37 ; 55
1e68: 00 fc sbrc r0, 0 168: 00 fc sbrc r0, 0
1e6a: fd cf rjmp .-6 ; 0x1e66 <main+0x166> 16a: fd cf rjmp .-6 ; 0x166 <__SREG__+0x127>
1e6c: 41 c0 rjmp .+130 ; 0x1ef0 <main+0x1f0> 16c: 41 c0 rjmp .+130 ; 0x1f0 <__SREG__+0x1b1>
boot_rww_enable(); boot_rww_enable();
#endif #endif
} }
/* Read memory block mode, length is big endian. */ /* Read memory block mode, length is big endian. */
else if(ch == STK_READ_PAGE) { else if(ch == STK_READ_PAGE) {
1e6e: 84 37 cpi r24, 0x74 ; 116 16e: 84 37 cpi r24, 0x74 ; 116
1e70: 89 f5 brne .+98 ; 0x1ed4 <main+0x1d4> 170: 89 f5 brne .+98 ; 0x1d4 <__SREG__+0x195>
// READ PAGE - we only read flash // READ PAGE - we only read flash
getLen(); getLen();
1e72: 64 d0 rcall .+200 ; 0x1f3c <getLen> 172: 64 d0 rcall .+200 ; 0x23c <getLen>
verifySpace(); verifySpace();
1e74: 71 d0 rcall .+226 ; 0x1f58 <verifySpace> 174: 71 d0 rcall .+226 ; 0x258 <verifySpace>
#ifdef VIRTUAL_BOOT_PARTITION #ifdef VIRTUAL_BOOT_PARTITION
do { do {
// Undo vector patch in bottom page so verify passes // Undo vector patch in bottom page so verify passes
if (address == 0) ch=rstVect & 0xff; if (address == 0) ch=rstVect & 0xff;
1e76: e0 91 80 01 lds r30, 0x0180 176: e0 91 80 01 lds r30, 0x0180
1e7a: f0 91 81 01 lds r31, 0x0181 17a: f0 91 81 01 lds r31, 0x0181
1e7e: 30 97 sbiw r30, 0x00 ; 0 17e: 30 97 sbiw r30, 0x00 ; 0
1e80: 19 f4 brne .+6 ; 0x1e88 <main+0x188> 180: 19 f4 brne .+6 ; 0x188 <__SREG__+0x149>
1e82: 20 91 84 01 lds r18, 0x0184 182: 20 91 84 01 lds r18, 0x0184
1e86: 13 c0 rjmp .+38 ; 0x1eae <main+0x1ae> 186: 13 c0 rjmp .+38 ; 0x1ae <__SREG__+0x16f>
else if (address == 1) ch=rstVect >> 8; else if (address == 1) ch=rstVect >> 8;
1e88: e1 30 cpi r30, 0x01 ; 1 188: e1 30 cpi r30, 0x01 ; 1
1e8a: f1 05 cpc r31, r1 18a: f1 05 cpc r31, r1
1e8c: 19 f4 brne .+6 ; 0x1e94 <main+0x194> 18c: 19 f4 brne .+6 ; 0x194 <__SREG__+0x155>
1e8e: 20 91 85 01 lds r18, 0x0185 18e: 20 91 85 01 lds r18, 0x0185
1e92: 0d c0 rjmp .+26 ; 0x1eae <main+0x1ae> 192: 0d c0 rjmp .+26 ; 0x1ae <__SREG__+0x16f>
else if (address == 8) ch=wdtVect & 0xff; else if (address == 8) ch=wdtVect & 0xff;
1e94: e8 30 cpi r30, 0x08 ; 8 194: e8 30 cpi r30, 0x08 ; 8
1e96: f1 05 cpc r31, r1 196: f1 05 cpc r31, r1
1e98: 19 f4 brne .+6 ; 0x1ea0 <main+0x1a0> 198: 19 f4 brne .+6 ; 0x1a0 <__SREG__+0x161>
1e9a: 20 91 86 01 lds r18, 0x0186 19a: 20 91 86 01 lds r18, 0x0186
1e9e: 07 c0 rjmp .+14 ; 0x1eae <main+0x1ae> 19e: 07 c0 rjmp .+14 ; 0x1ae <__SREG__+0x16f>
else if (address == 9) ch=wdtVect >> 8; else if (address == 9) ch=wdtVect >> 8;
1ea0: e9 30 cpi r30, 0x09 ; 9 1a0: e9 30 cpi r30, 0x09 ; 9
1ea2: f1 05 cpc r31, r1 1a2: f1 05 cpc r31, r1
1ea4: 19 f4 brne .+6 ; 0x1eac <main+0x1ac> 1a4: 19 f4 brne .+6 ; 0x1ac <__SREG__+0x16d>
1ea6: 20 91 87 01 lds r18, 0x0187 1a6: 20 91 87 01 lds r18, 0x0187
1eaa: 01 c0 rjmp .+2 ; 0x1eae <main+0x1ae> 1aa: 01 c0 rjmp .+2 ; 0x1ae <__SREG__+0x16f>
else ch = pgm_read_byte_near(address); else ch = pgm_read_byte_near(address);
1eac: 24 91 lpm r18, Z+ 1ac: 24 91 lpm r18, Z+
address++; address++;
1eae: 80 91 80 01 lds r24, 0x0180 1ae: 80 91 80 01 lds r24, 0x0180
1eb2: 90 91 81 01 lds r25, 0x0181 1b2: 90 91 81 01 lds r25, 0x0181
1eb6: 01 96 adiw r24, 0x01 ; 1 1b6: 01 96 adiw r24, 0x01 ; 1
1eb8: 90 93 81 01 sts 0x0181, r25 1b8: 90 93 81 01 sts 0x0181, r25
1ebc: 80 93 80 01 sts 0x0180, r24 1bc: 80 93 80 01 sts 0x0180, r24
putch(ch); putch(ch);
1ec0: 82 2f mov r24, r18 1c0: 82 2f mov r24, r18
1ec2: 19 d0 rcall .+50 ; 0x1ef6 <putch> 1c2: 19 d0 rcall .+50 ; 0x1f6 <putch>
} while (--length); } while (--length);
1ec4: 80 91 82 01 lds r24, 0x0182 1c4: 80 91 82 01 lds r24, 0x0182
1ec8: 81 50 subi r24, 0x01 ; 1 1c8: 81 50 subi r24, 0x01 ; 1
1eca: 80 93 82 01 sts 0x0182, r24 1ca: 80 93 82 01 sts 0x0182, r24
1ece: 88 23 and r24, r24 1ce: 88 23 and r24, r24
1ed0: 91 f6 brne .-92 ; 0x1e76 <main+0x176> 1d0: 91 f6 brne .-92 ; 0x176 <__SREG__+0x137>
1ed2: 0e c0 rjmp .+28 ; 0x1ef0 <main+0x1f0> 1d2: 0e c0 rjmp .+28 ; 0x1f0 <__SREG__+0x1b1>
#endif #endif
#endif #endif
} }
/* Get device signature bytes */ /* Get device signature bytes */
else if(ch == STK_READ_SIGN) { else if(ch == STK_READ_SIGN) {
1ed4: 85 37 cpi r24, 0x75 ; 117 1d4: 85 37 cpi r24, 0x75 ; 117
1ed6: 39 f4 brne .+14 ; 0x1ee6 <main+0x1e6> 1d6: 39 f4 brne .+14 ; 0x1e6 <__SREG__+0x1a7>
// READ SIGN - return what Avrdude wants to hear // READ SIGN - return what Avrdude wants to hear
verifySpace(); verifySpace();
1ed8: 3f d0 rcall .+126 ; 0x1f58 <verifySpace> 1d8: 3f d0 rcall .+126 ; 0x258 <verifySpace>
putch(SIGNATURE_0); putch(SIGNATURE_0);
1eda: 8e e1 ldi r24, 0x1E ; 30 1da: 8e e1 ldi r24, 0x1E ; 30
1edc: 0c d0 rcall .+24 ; 0x1ef6 <putch> 1dc: 0c d0 rcall .+24 ; 0x1f6 <putch>
putch(SIGNATURE_1); putch(SIGNATURE_1);
1ede: 83 e9 ldi r24, 0x93 ; 147 1de: 83 e9 ldi r24, 0x93 ; 147
1ee0: 0a d0 rcall .+20 ; 0x1ef6 <putch> 1e0: 0a d0 rcall .+20 ; 0x1f6 <putch>
putch(SIGNATURE_2); putch(SIGNATURE_2);
1ee2: 8c e0 ldi r24, 0x0C ; 12 1e2: 8c e0 ldi r24, 0x0C ; 12
1ee4: 54 cf rjmp .-344 ; 0x1d8e <main+0x8e> 1e4: 54 cf rjmp .-344 ; 0x8e <__SREG__+0x4f>
} }
else if (ch == 'Q') { else if (ch == 'Q') {
1ee6: 81 35 cpi r24, 0x51 ; 81 1e6: 81 35 cpi r24, 0x51 ; 81
1ee8: 11 f4 brne .+4 ; 0x1eee <main+0x1ee> 1e8: 11 f4 brne .+4 ; 0x1ee <__SREG__+0x1af>
// Adaboot no-wait mod // Adaboot no-wait mod
watchdogConfig(WATCHDOG_16MS); watchdogConfig(WATCHDOG_16MS);
1eea: 88 e0 ldi r24, 0x08 ; 8 1ea: 88 e0 ldi r24, 0x08 ; 8
1eec: 2c d0 rcall .+88 ; 0x1f46 <watchdogConfig> 1ec: 2c d0 rcall .+88 ; 0x246 <watchdogConfig>
verifySpace(); verifySpace();
} }
else { else {
// This covers the response to commands like STK_ENTER_PROGMODE // This covers the response to commands like STK_ENTER_PROGMODE
verifySpace(); verifySpace();
1eee: 34 d0 rcall .+104 ; 0x1f58 <verifySpace> 1ee: 34 d0 rcall .+104 ; 0x258 <verifySpace>
} }
putch(STK_OK); putch(STK_OK);
1ef0: 80 e1 ldi r24, 0x10 ; 16 1f0: 80 e1 ldi r24, 0x10 ; 16
1ef2: 01 d0 rcall .+2 ; 0x1ef6 <putch> 1f2: 01 d0 rcall .+2 ; 0x1f6 <putch>
1ef4: 25 cf rjmp .-438 ; 0x1d40 <main+0x40> 1f4: 25 cf rjmp .-438 ; 0x40 <__SREG__+0x1>
00001ef6 <putch>: 000001f6 <putch>:
void putch(char ch) { void putch(char ch) {
#ifndef SOFT_UART #ifndef SOFT_UART
while (!(UCSR0A & _BV(UDRE0))); while (!(UCSR0A & _BV(UDRE0)));
UDR0 = ch; UDR0 = ch;
#else #else
__asm__ __volatile__ ( __asm__ __volatile__ (
1ef6: 2a e0 ldi r18, 0x0A ; 10 1f6: 2a e0 ldi r18, 0x0A ; 10
1ef8: 30 e0 ldi r19, 0x00 ; 0 1f8: 30 e0 ldi r19, 0x00 ; 0
1efa: 80 95 com r24 1fa: 80 95 com r24
1efc: 08 94 sec 1fc: 08 94 sec
1efe: 10 f4 brcc .+4 ; 0x1f04 <putch+0xe> 1fe: 10 f4 brcc .+4 ; 0x204 <putch+0xe>
1f00: da 98 cbi 0x1b, 2 ; 27 200: da 98 cbi 0x1b, 2 ; 27
1f02: 02 c0 rjmp .+4 ; 0x1f08 <putch+0x12> 202: 02 c0 rjmp .+4 ; 0x208 <putch+0x12>
1f04: da 9a sbi 0x1b, 2 ; 27 204: da 9a sbi 0x1b, 2 ; 27
1f06: 00 00 nop 206: 00 00 nop
1f08: 15 d0 rcall .+42 ; 0x1f34 <uartDelay> 208: 15 d0 rcall .+42 ; 0x234 <uartDelay>
1f0a: 14 d0 rcall .+40 ; 0x1f34 <uartDelay> 20a: 14 d0 rcall .+40 ; 0x234 <uartDelay>
1f0c: 86 95 lsr r24 20c: 86 95 lsr r24
1f0e: 2a 95 dec r18 20e: 2a 95 dec r18
1f10: b1 f7 brne .-20 ; 0x1efe <putch+0x8> 210: b1 f7 brne .-20 ; 0x1fe <putch+0x8>
[uartBit] "I" (UART_TX_BIT) [uartBit] "I" (UART_TX_BIT)
: :
"r25" "r25"
); );
#endif #endif
} }
1f12: 08 95 ret 212: 08 95 ret
00001f14 <getch>: 00000214 <getch>:
return getch(); return getch();
} }
// Watchdog functions. These are only safe with interrupts turned off. // Watchdog functions. These are only safe with interrupts turned off.
void watchdogReset() { void watchdogReset() {
__asm__ __volatile__ ( __asm__ __volatile__ (
1f14: a8 95 wdr 214: a8 95 wdr
LED_PIN |= _BV(LED); LED_PIN |= _BV(LED);
#endif #endif
#endif #endif
return ch; return ch;
} }
1f16: 29 e0 ldi r18, 0x09 ; 9 216: 29 e0 ldi r18, 0x09 ; 9
1f18: 30 e0 ldi r19, 0x00 ; 0 218: 30 e0 ldi r19, 0x00 ; 0
1f1a: cb 99 sbic 0x19, 3 ; 25 21a: cb 99 sbic 0x19, 3 ; 25
1f1c: fe cf rjmp .-4 ; 0x1f1a <getch+0x6> 21c: fe cf rjmp .-4 ; 0x21a <getch+0x6>
1f1e: 0a d0 rcall .+20 ; 0x1f34 <uartDelay> 21e: 0a d0 rcall .+20 ; 0x234 <uartDelay>
1f20: 09 d0 rcall .+18 ; 0x1f34 <uartDelay> 220: 09 d0 rcall .+18 ; 0x234 <uartDelay>
1f22: 08 d0 rcall .+16 ; 0x1f34 <uartDelay> 222: 08 d0 rcall .+16 ; 0x234 <uartDelay>
1f24: 88 94 clc 224: 88 94 clc
1f26: cb 99 sbic 0x19, 3 ; 25 226: cb 99 sbic 0x19, 3 ; 25
1f28: 08 94 sec 228: 08 94 sec
1f2a: 2a 95 dec r18 22a: 2a 95 dec r18
1f2c: 11 f0 breq .+4 ; 0x1f32 <getch+0x1e> 22c: 11 f0 breq .+4 ; 0x232 <getch+0x1e>
1f2e: 87 95 ror r24 22e: 87 95 ror r24
1f30: f7 cf rjmp .-18 ; 0x1f20 <getch+0xc> 230: f7 cf rjmp .-18 ; 0x220 <getch+0xc>
1f32: 08 95 ret 232: 08 95 ret
00001f34 <uartDelay>: 00000234 <uartDelay>:
#if UART_B_VALUE > 255 #if UART_B_VALUE > 255
#error Baud rate too slow for soft UART #error Baud rate too slow for soft UART
#endif #endif
void uartDelay() { void uartDelay() {
__asm__ __volatile__ ( __asm__ __volatile__ (
1f34: 9e e0 ldi r25, 0x0E ; 14 234: 9e e0 ldi r25, 0x0E ; 14
1f36: 9a 95 dec r25 236: 9a 95 dec r25
1f38: f1 f7 brne .-4 ; 0x1f36 <uartDelay+0x2> 238: f1 f7 brne .-4 ; 0x236 <uartDelay+0x2>
1f3a: 08 95 ret 23a: 08 95 ret
00001f3c <getLen>: 0000023c <getLen>:
} while (--count); } while (--count);
} }
#endif #endif
uint8_t getLen() { uint8_t getLen() {
getch(); getch();
1f3c: eb df rcall .-42 ; 0x1f14 <getch> 23c: eb df rcall .-42 ; 0x214 <getch>
length = getch(); length = getch();
1f3e: ea df rcall .-44 ; 0x1f14 <getch> 23e: ea df rcall .-44 ; 0x214 <getch>
1f40: 80 93 82 01 sts 0x0182, r24 240: 80 93 82 01 sts 0x0182, r24
return getch(); return getch();
} }
1f44: e7 cf rjmp .-50 ; 0x1f14 <getch> 244: e7 cf rjmp .-50 ; 0x214 <getch>
00001f46 <watchdogConfig>: 00000246 <watchdogConfig>:
"wdr\n" "wdr\n"
); );
} }
void watchdogConfig(uint8_t x) { void watchdogConfig(uint8_t x) {
WDTCSR = _BV(WDCE) | _BV(WDE); WDTCSR = _BV(WDCE) | _BV(WDE);
1f46: 98 e1 ldi r25, 0x18 ; 24 246: 98 e1 ldi r25, 0x18 ; 24
1f48: 91 bd out 0x21, r25 ; 33 248: 91 bd out 0x21, r25 ; 33
WDTCSR = x; WDTCSR = x;
1f4a: 81 bd out 0x21, r24 ; 33 24a: 81 bd out 0x21, r24 ; 33
} }
1f4c: 08 95 ret 24c: 08 95 ret
00001f4e <appStart>: 0000024e <appStart>:
void appStart() { void appStart() {
watchdogConfig(WATCHDOG_OFF); watchdogConfig(WATCHDOG_OFF);
1f4e: 80 e0 ldi r24, 0x00 ; 0 24e: 80 e0 ldi r24, 0x00 ; 0
1f50: fa df rcall .-12 ; 0x1f46 <watchdogConfig> 250: fa df rcall .-12 ; 0x246 <watchdogConfig>
__asm__ __volatile__ ( __asm__ __volatile__ (
1f52: e4 e0 ldi r30, 0x04 ; 4 252: e4 e0 ldi r30, 0x04 ; 4
1f54: ff 27 eor r31, r31 254: ff 27 eor r31, r31
1f56: 09 94 ijmp 256: 09 94 ijmp
00001f58 <verifySpace>: 00000258 <verifySpace>:
do getch(); while (--count); do getch(); while (--count);
verifySpace(); verifySpace();
} }
void verifySpace() { void verifySpace() {
if (getch() != CRC_EOP) appStart(); if (getch() != CRC_EOP) appStart();
1f58: dd df rcall .-70 ; 0x1f14 <getch> 258: dd df rcall .-70 ; 0x214 <getch>
1f5a: 80 32 cpi r24, 0x20 ; 32 25a: 80 32 cpi r24, 0x20 ; 32
1f5c: 09 f0 breq .+2 ; 0x1f60 <verifySpace+0x8> 25c: 09 f0 breq .+2 ; 0x260 <verifySpace+0x8>
1f5e: f7 df rcall .-18 ; 0x1f4e <appStart> 25e: f7 df rcall .-18 ; 0x24e <appStart>
putch(STK_INSYNC); putch(STK_INSYNC);
1f60: 84 e1 ldi r24, 0x14 ; 20 260: 84 e1 ldi r24, 0x14 ; 20
} }
1f62: c9 cf rjmp .-110 ; 0x1ef6 <putch> 262: c9 cf rjmp .-110 ; 0x1f6 <putch>
00001f64 <getNch>: 00000264 <getNch>:
::[count] "M" (UART_B_VALUE) ::[count] "M" (UART_B_VALUE)
); );
} }
#endif #endif
void getNch(uint8_t count) { void getNch(uint8_t count) {
1f64: 1f 93 push r17 264: 1f 93 push r17
1f66: 18 2f mov r17, r24 266: 18 2f mov r17, r24
do getch(); while (--count); do getch(); while (--count);
1f68: d5 df rcall .-86 ; 0x1f14 <getch> 268: d5 df rcall .-86 ; 0x214 <getch>
1f6a: 11 50 subi r17, 0x01 ; 1 26a: 11 50 subi r17, 0x01 ; 1
1f6c: e9 f7 brne .-6 ; 0x1f68 <getNch+0x4> 26c: e9 f7 brne .-6 ; 0x268 <getNch+0x4>
verifySpace(); verifySpace();
1f6e: f4 df rcall .-24 ; 0x1f58 <verifySpace> 26e: f4 df rcall .-24 ; 0x258 <verifySpace>
} }
1f70: 1f 91 pop r17 270: 1f 91 pop r17
1f72: 08 95 ret 272: 08 95 ret

1
bootloaders/optiboot/optiboot_pro_16MHz.hex
View File

@ -30,5 +30,6 @@
:103FD00090838083089580E0F8DFEE27FF2709941F :103FD00090838083089580E0F8DFEE27FF2709941F
:103FE000E7DF803209F0F7DF84E1DACF1F93182F83 :103FE000E7DF803209F0F7DF84E1DACF1F93182F83
:0C3FF000DFDF1150E9F7F4DF1F910895A6 :0C3FF000DFDF1150E9F7F4DF1F910895A6
:023FFE000104BC
:0400000300003E00BB :0400000300003E00BB
:00000001FF :00000001FF

20
bootloaders/optiboot/optiboot_pro_16MHz.lst
View File

@ -5,23 +5,25 @@ Sections:
Idx Name Size VMA LMA File off Algn Idx Name Size VMA LMA File off Algn
0 .text 000001fc 00003e00 00003e00 00000054 2**1 0 .text 000001fc 00003e00 00003e00 00000054 2**1
CONTENTS, ALLOC, LOAD, READONLY, CODE CONTENTS, ALLOC, LOAD, READONLY, CODE
1 .debug_aranges 00000028 00000000 00000000 00000250 2**0 1 .version 00000002 00003ffe 00003ffe 00000250 2**0
CONTENTS, READONLY
2 .debug_aranges 00000028 00000000 00000000 00000252 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
2 .debug_pubnames 0000006a 00000000 00000000 00000278 2**0 3 .debug_pubnames 0000006a 00000000 00000000 0000027a 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
3 .debug_info 00000284 00000000 00000000 000002e2 2**0 4 .debug_info 00000285 00000000 00000000 000002e4 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
4 .debug_abbrev 000001ae 00000000 00000000 00000566 2**0 5 .debug_abbrev 0000019f 00000000 00000000 00000569 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
5 .debug_line 00000450 00000000 00000000 00000714 2**0 6 .debug_line 00000453 00000000 00000000 00000708 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
6 .debug_frame 00000090 00000000 00000000 00000b64 2**2 7 .debug_frame 00000090 00000000 00000000 00000b5c 2**2
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
7 .debug_str 00000141 00000000 00000000 00000bf4 2**0 8 .debug_str 00000141 00000000 00000000 00000bec 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
8 .debug_loc 000001e1 00000000 00000000 00000d35 2**0 9 .debug_loc 000001e1 00000000 00000000 00000d2d 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
9 .debug_ranges 00000068 00000000 00000000 00000f16 2**0 10 .debug_ranges 00000068 00000000 00000000 00000f0e 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
Disassembly of section .text: Disassembly of section .text:

1
bootloaders/optiboot/optiboot_pro_20mhz.hex
View File

@ -30,5 +30,6 @@
:103FD00090838083089580E0F8DFEE27FF2709941F :103FD00090838083089580E0F8DFEE27FF2709941F
:103FE000E7DF803209F0F7DF84E1DACF1F93182F83 :103FE000E7DF803209F0F7DF84E1DACF1F93182F83
:0C3FF000DFDF1150E9F7F4DF1F910895A6 :0C3FF000DFDF1150E9F7F4DF1F910895A6
:023FFE000104BC
:0400000300003E00BB :0400000300003E00BB
:00000001FF :00000001FF

20
bootloaders/optiboot/optiboot_pro_20mhz.lst
View File

@ -5,23 +5,25 @@ Sections:
Idx Name Size VMA LMA File off Algn Idx Name Size VMA LMA File off Algn
0 .text 000001fc 00003e00 00003e00 00000054 2**1 0 .text 000001fc 00003e00 00003e00 00000054 2**1
CONTENTS, ALLOC, LOAD, READONLY, CODE CONTENTS, ALLOC, LOAD, READONLY, CODE
1 .debug_aranges 00000028 00000000 00000000 00000250 2**0 1 .version 00000002 00003ffe 00003ffe 00000250 2**0
CONTENTS, READONLY
2 .debug_aranges 00000028 00000000 00000000 00000252 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
2 .debug_pubnames 0000006a 00000000 00000000 00000278 2**0 3 .debug_pubnames 0000006a 00000000 00000000 0000027a 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
3 .debug_info 00000284 00000000 00000000 000002e2 2**0 4 .debug_info 00000285 00000000 00000000 000002e4 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
4 .debug_abbrev 000001ae 00000000 00000000 00000566 2**0 5 .debug_abbrev 0000019f 00000000 00000000 00000569 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
5 .debug_line 00000450 00000000 00000000 00000714 2**0 6 .debug_line 00000453 00000000 00000000 00000708 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
6 .debug_frame 00000090 00000000 00000000 00000b64 2**2 7 .debug_frame 00000090 00000000 00000000 00000b5c 2**2
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
7 .debug_str 00000141 00000000 00000000 00000bf4 2**0 8 .debug_str 00000141 00000000 00000000 00000bec 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
8 .debug_loc 000001e1 00000000 00000000 00000d35 2**0 9 .debug_loc 000001e1 00000000 00000000 00000d2d 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
9 .debug_ranges 00000068 00000000 00000000 00000f16 2**0 10 .debug_ranges 00000068 00000000 00000000 00000f0e 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
Disassembly of section .text: Disassembly of section .text:

1
bootloaders/optiboot/optiboot_pro_8MHz.hex
View File

@ -30,5 +30,6 @@
:103FD00090838083089580E0F8DFEE27FF2709941F :103FD00090838083089580E0F8DFEE27FF2709941F
:103FE000E7DF803209F0F7DF84E1DACF1F93182F83 :103FE000E7DF803209F0F7DF84E1DACF1F93182F83
:0C3FF000DFDF1150E9F7F4DF1F910895A6 :0C3FF000DFDF1150E9F7F4DF1F910895A6
:023FFE000104BC
:0400000300003E00BB :0400000300003E00BB
:00000001FF :00000001FF

20
bootloaders/optiboot/optiboot_pro_8MHz.lst
View File

@ -5,23 +5,25 @@ Sections:
Idx Name Size VMA LMA File off Algn Idx Name Size VMA LMA File off Algn
0 .text 000001fc 00003e00 00003e00 00000054 2**1 0 .text 000001fc 00003e00 00003e00 00000054 2**1
CONTENTS, ALLOC, LOAD, READONLY, CODE CONTENTS, ALLOC, LOAD, READONLY, CODE
1 .debug_aranges 00000028 00000000 00000000 00000250 2**0 1 .version 00000002 00003ffe 00003ffe 00000250 2**0
CONTENTS, READONLY
2 .debug_aranges 00000028 00000000 00000000 00000252 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
2 .debug_pubnames 0000006a 00000000 00000000 00000278 2**0 3 .debug_pubnames 0000006a 00000000 00000000 0000027a 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
3 .debug_info 00000284 00000000 00000000 000002e2 2**0 4 .debug_info 00000285 00000000 00000000 000002e4 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
4 .debug_abbrev 000001ae 00000000 00000000 00000566 2**0 5 .debug_abbrev 0000019f 00000000 00000000 00000569 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
5 .debug_line 00000450 00000000 00000000 00000714 2**0 6 .debug_line 00000453 00000000 00000000 00000708 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
6 .debug_frame 00000090 00000000 00000000 00000b64 2**2 7 .debug_frame 00000090 00000000 00000000 00000b5c 2**2
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
7 .debug_str 00000141 00000000 00000000 00000bf4 2**0 8 .debug_str 00000141 00000000 00000000 00000bec 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
8 .debug_loc 000001e1 00000000 00000000 00000d35 2**0 9 .debug_loc 000001e1 00000000 00000000 00000d2d 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
9 .debug_ranges 00000068 00000000 00000000 00000f16 2**0 10 .debug_ranges 00000068 00000000 00000000 00000f0e 2**0
CONTENTS, READONLY, DEBUGGING CONTENTS, READONLY, DEBUGGING
Disassembly of section .text: Disassembly of section .text: