Indent fix.
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04d34da55f
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@ -92,7 +92,6 @@ unsigned long micros() {
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#error TIMER 0 not defined
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#endif
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#ifdef TIFR0
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if ((TIFR0 & _BV(TOV0)) && (t < 255))
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m++;
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@ -122,8 +121,8 @@ void delay(unsigned long ms)
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/* Delay for the given number of microseconds. Assumes a 1, 8, 12, 16, 20 or 24 MHz clock. */
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void delayMicroseconds(unsigned int us)
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{
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// call = 4 cycles + 2 to 4 cycles to init us(2 for constant delay, 4 for variable)
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// call = 4 cycles + 2 to 4 cycles to init us(2 for constant delay, 4 for variable)
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// calling avrlib's delay_us() function with low values (e.g. 1 or
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// 2 microseconds) gives delays longer than desired.
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//delay_us(us);
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@ -131,7 +130,7 @@ void delayMicroseconds(unsigned int us)
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// for the 24 MHz clock for the aventurous ones, trying to overclock
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// zero delay fix
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if (!us) return; // = 3 cycles, (4 when true)
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if (!us) return; // = 3 cycles, (4 when true)
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// the following loop takes a 1/6 of a microsecond (4 cycles)
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// per iteration, so execute it six times for each microsecond of
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@ -140,7 +139,7 @@ void delayMicroseconds(unsigned int us)
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// account for the time taken in the preceeding commands.
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// we just burned 22 (24) cycles above, remove 5, (5*4=20)
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// us is at least 6 so we can substract 5
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// us is at least 6 so we can substract 5
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us -= 5; //=2 cycles
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#elif F_CPU >= 20000000L
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@ -153,7 +152,7 @@ void delayMicroseconds(unsigned int us)
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"nop" "\n\t"
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"nop" "\n\t"
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"nop"); //just waiting 4 cycles
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if (us <= 1) return; // = 3 cycles, (4 when true)
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if (us <= 1) return; // = 3 cycles, (4 when true)
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// the following loop takes a 1/5 of a microsecond (4 cycles)
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// per iteration, so execute it five times for each microsecond of
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@ -162,7 +161,7 @@ void delayMicroseconds(unsigned int us)
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// account for the time taken in the preceeding commands.
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// we just burned 26 (28) cycles above, remove 7, (7*4=28)
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// us is at least 10 so we can substract 7
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// us is at least 10 so we can substract 7
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us -= 7; // 2 cycles
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#elif F_CPU >= 16000000L
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@ -179,8 +178,8 @@ void delayMicroseconds(unsigned int us)
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// account for the time taken in the preceeding commands.
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// we just burned 19 (21) cycles above, remove 5, (5*4=20)
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// us is at least 8 so we can substract 5
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us -= 5; // = 2 cycles,
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// us is at least 8 so we can substract 5
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us -= 5; // = 2 cycles,
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#elif F_CPU >= 12000000L
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// for the 12 MHz clock if somebody is working with USB
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@ -196,7 +195,7 @@ void delayMicroseconds(unsigned int us)
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// account for the time taken in the preceeding commands.
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// we just burned 20 (22) cycles above, remove 5, (5*4=20)
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// us is at least 6 so we can substract 5
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// us is at least 6 so we can substract 5
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us -= 5; //2 cycles
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#elif F_CPU >= 8000000L
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@ -213,7 +212,7 @@ void delayMicroseconds(unsigned int us)
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// account for the time taken in the preceeding commands.
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// we just burned 17 (19) cycles above, remove 4, (4*4=16)
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// us is at least 6 so we can substract 4
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// us is at least 6 so we can substract 4
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us -= 4; // = 2 cycles
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#else
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@ -227,7 +226,7 @@ void delayMicroseconds(unsigned int us)
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us -= 22; // = 2 cycles
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// the following loop takes 4 microseconds (4 cycles)
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// per iteration, so execute it us/4 times
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// us is at least 4, divided by 4 gives us 1 (no zero delay bug)
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// us is at least 4, divided by 4 gives us 1 (no zero delay bug)
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us >>= 2; // us div 4, = 4 cycles
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@ -253,7 +252,7 @@ void init()
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#if defined(TCCR0A) && defined(WGM01)
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sbi(TCCR0A, WGM01);
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sbi(TCCR0A, WGM00);
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#endif
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#endif
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// set timer 0 prescale factor to 64
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#if defined(__AVR_ATmega128__)
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@ -357,31 +356,31 @@ void init()
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#if defined(ADCSRA)
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// set a2d prescaler so we are inside the desired 50-200 KHz range.
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#if F_CPU >= 16000000 // 16 MHz / 128 = 125 KHz
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sbi(ADCSRA, ADPS2);
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sbi(ADCSRA, ADPS1);
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sbi(ADCSRA, ADPS0);
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#elif F_CPU >= 8000000 // 8 MHz / 64 = 125 KHz
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sbi(ADCSRA, ADPS2);
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sbi(ADCSRA, ADPS1);
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cbi(ADCSRA, ADPS0);
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#elif F_CPU >= 4000000 // 4 MHz / 32 = 125 KHz
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sbi(ADCSRA, ADPS2);
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cbi(ADCSRA, ADPS1);
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sbi(ADCSRA, ADPS0);
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#elif F_CPU >= 2000000 // 2 MHz / 16 = 125 KHz
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sbi(ADCSRA, ADPS2);
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cbi(ADCSRA, ADPS1);
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cbi(ADCSRA, ADPS0);
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#elif F_CPU >= 1000000 // 1 MHz / 8 = 125 KHz
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cbi(ADCSRA, ADPS2);
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sbi(ADCSRA, ADPS1);
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sbi(ADCSRA, ADPS0);
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#else // 128 kHz / 2 = 64 KHz -> This is the closest you can get, the prescaler is 2
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cbi(ADCSRA, ADPS2);
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cbi(ADCSRA, ADPS1);
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sbi(ADCSRA, ADPS0);
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#endif
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#if F_CPU >= 16000000 // 16 MHz / 128 = 125 KHz
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sbi(ADCSRA, ADPS2);
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sbi(ADCSRA, ADPS1);
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sbi(ADCSRA, ADPS0);
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#elif F_CPU >= 8000000 // 8 MHz / 64 = 125 KHz
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sbi(ADCSRA, ADPS2);
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sbi(ADCSRA, ADPS1);
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cbi(ADCSRA, ADPS0);
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#elif F_CPU >= 4000000 // 4 MHz / 32 = 125 KHz
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sbi(ADCSRA, ADPS2);
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cbi(ADCSRA, ADPS1);
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sbi(ADCSRA, ADPS0);
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#elif F_CPU >= 2000000 // 2 MHz / 16 = 125 KHz
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sbi(ADCSRA, ADPS2);
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cbi(ADCSRA, ADPS1);
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cbi(ADCSRA, ADPS0);
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#elif F_CPU >= 1000000 // 1 MHz / 8 = 125 KHz
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cbi(ADCSRA, ADPS2);
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sbi(ADCSRA, ADPS1);
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sbi(ADCSRA, ADPS0);
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#else // 128 kHz / 2 = 64 KHz -> This is the closest you can get, the prescaler is 2
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cbi(ADCSRA, ADPS2);
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cbi(ADCSRA, ADPS1);
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sbi(ADCSRA, ADPS0);
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#endif
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// enable a2d conversions
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sbi(ADCSRA, ADEN);
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#endif
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