Improve HardwareSerial::flush()
The flush() method blocks until all characters in the serial buffer have been written to the uart _and_ transmitted. This is checked by waiting until the "TXC" (TX Complete) bit is set by the UART, signalling completion. This bit is cleared by write() when adding a new byte to the buffer and set by the hardware after tranmission ends, so it is always guaranteed to be zero from the moment the first byte in a sequence is queued until the moment the last byte is transmitted, and it is one from the moment the last byte in the buffer is transmitted until the first byte in the next sequence is queued. However, the TXC bit is also zero from initialization to the moment the first byte ever is queued (and then continues to be zero until the first sequence of bytes completes transmission). Unfortunately we cannot manually set the TXC bit during initialization, we can only clear it. To make sure that flush() would not (indefinitely) block when it is called _before_ anything was written to the serial device, the "transmitting" variable was introduced. This variable suggests that it is only true when something is transmitting, which isn't currently the case (it remains true after transmission is complete until flush() is called, for example). Furthermore, there is no need to keep the status of transmission, the only thing needed is to remember if anything has ever been written, so the corner case described above can be detected. This commit improves the code by: - Renaming the "transmitting" variable to _written (making it more clear and following the leading underscore naming convention). - Not resetting the value of _written at the end of flush(), there is no point to this. - Only checking the "_written" value once in flush(), since it can never be toggled off anyway. - Initializing the value of _written in both versions of _begin (though it probably gets initialized to 0 by default anyway, better to be explicit).
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@ -276,6 +276,8 @@ void HardwareSerial::begin(unsigned long baud, byte config)
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*_ubrrh = baud_setting >> 8;
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*_ubrrl = baud_setting;
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_written = false;
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//set the data bits, parity, and stop bits
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#if defined(__AVR_ATmega8__)
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config |= 0x80; // select UCSRC register (shared with UBRRH)
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@ -331,9 +333,15 @@ int HardwareSerial::read(void)
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void HardwareSerial::flush()
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{
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// UDR is kept full while the buffer is not empty, so TXC triggers when EMPTY && SENT
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while (transmitting && bit_is_clear(*_ucsra, TXC0));
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transmitting = false;
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// If we have never written a byte, no need to flush. This special
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// case is needed since there is no way to force the TXC (transmit
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// complete) bit to 1 during initialization
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if (!_written)
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return;
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// UDR is kept full while the buffer is not empty, so TXC triggers
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// when EMPTY && SENT
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while (bit_is_clear(*_ucsra, TXC0));
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}
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size_t HardwareSerial::write(uint8_t c)
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@ -350,8 +358,10 @@ size_t HardwareSerial::write(uint8_t c)
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_tx_buffer_head = i;
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sbi(*_ucsrb, UDRIE0);
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// clear the TXC bit -- "can be cleared by writing a one to its bit location"
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transmitting = true;
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_written = true;
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// clear the TXC bit -- "can be cleared by writing a one to its bit
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// location". This makes sure flush() won't return until the bytes
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// actually got written
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sbi(*_ucsra, TXC0);
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return 1;
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@ -72,7 +72,8 @@ class HardwareSerial : public Stream
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volatile uint8_t *_ucsrb;
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volatile uint8_t *_ucsrc;
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volatile uint8_t *_udr;
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bool transmitting;
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// Has any byte been written to the UART since begin()
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bool _written;
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volatile uint8_t _rx_buffer_head;
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volatile uint8_t _rx_buffer_tail;
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