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(make sure .hex and .lst are updated as well.) 

(cherry picked from commit ece29c380556878ba8efebce8801a7f076c61ada)
This commit is contained in:
WestfW 2011-06-11 03:17:38 -07:00 committed by David A. Mellis
parent a8f7e73ce8
commit e74e76ce14
14 changed files with 644 additions and 642 deletions
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63
bootloaders/optiboot/optiboot_atmega328_pro_8MHz.hex
View File

@ -1,32 +1,33 @@
:10000000112484B714BE81FFE3D085E08093810082
:1000100082E08093C00088E18093C10086E08093F5
:10002000C20088E08093C4008EE0BCD0259A86E0B0
:1000300028E13EEF91E0309385002093840096BB49
:10004000B09BFECF1D9AA8958150A9F7992493944F
:10005000A5E0AA2EF1E1BF2E9DD0813421F481E0EC
:10006000AFD083E01FC0823411F484E103C0853433
:1000700019F485E0A5D083C0853579F48BD0E82EBE
:10008000FF2488D0082F10E0102F00270E291F29E9
:10009000000F111F8DD0680172C0863529F484E0ED
:1000A0008FD080E06FD06BC0843609F042C072D030
:1000B00071D0082F6FD080E0C81680E7D80620F4F2
:1000C00083E0F60187BFE895C0E0D1E063D0899373
:1000D0000C17E1F7F0E0CF16F0E7DF0620F083E041
:1000E000F60187BFE89564D007B600FCFDCFA601F6
:1000F000A0E0B1E02C9130E011968C91119790E046
:10010000982F8827822B932B1296FA010C0197BE09
:10011000E89511244E5F5F4FF1E0A038BF0751F71B
:10012000F601A7BEE89507B600FCFDCFB7BEE8957F
:1001300026C08437B1F42ED02DD0F82E2BD038D055
:10014000F601EF2C8F010F5F1F4F84911BD0EA94B3
:10015000F801C1F70894C11CD11CFA94CF0CD11C32
:100160000EC0853739F424D08EE10CD085E90AD051
:100170008FE098CF813511F488E014D019D080E158
:1001800001D06ACF982F8091C00085FFFCCF90935B
:10019000C6000895A8958091C00087FFFCCF80918C
:1001A000C6000895E0E6F0E098E19083808308952A
:1001B000F1DF803219F088E0F5DFFFCF84E1E2CF94
:1001C0001F93182FE7DF1150E9F7F2DF1F91089511
:0A01D00080E0E8DFEE27FF27099426
:027FFE0001047C
:107E0000112484B714BE81FFE3D085E08093810004
:107E100082E08093C00088E18093C10086E0809377
:107E2000C20088E08093C4008EE0BCD0259A86E032
:107E300028E13EEF91E0309385002093840096BBCB
:107E4000B09BFECF1D9AA8958150A9F799249394D1
:107E5000A5E0AA2EF1E1BF2E9DD0813421F481E06E
:107E6000AFD083E01FC0823411F484E103C08534B5
:107E700019F485E0A5D083C0853579F48BD0E82E40
:107E8000FF2488D0082F10E0102F00270E291F296B
:107E9000000F111F8DD0680172C0863529F484E06F
:107EA0008FD080E06FD06BC0843609F042C072D0B2
:107EB00071D0082F6FD080E0C81680E7D80620F474
:107EC00083E0F60187BFE895C0E0D1E063D08993F5
:107ED0000C17E1F7F0E0CF16F0E7DF0620F083E0C3
:107EE000F60187BFE89564D007B600FCFDCFA60178
:107EF000A0E0B1E02C9130E011968C91119790E0C8
:107F0000982F8827822B932B1296FA010C0197BE8B
:107F1000E89511244E5F5F4FF1E0A038BF0751F79D
:107F2000F601A7BEE89507B600FCFDCFB7BEE89501
:107F300026C08437B1F42ED02DD0F82E2BD038D0D7
:107F4000F601EF2C8F010F5F1F4F84911BD0EA9435
:107F5000F801C1F70894C11CD11CFA94CF0CD11CB4
:107F60000EC0853739F424D08EE10CD085E90AD0D3
:107F70008FE098CF813511F488E014D019D080E1DA
:107F800001D06ACF982F8091C00085FFFCCF9093DD
:107F9000C6000895A8958091C00087FFFCCF80910E
:107FA000C6000895E0E6F0E098E1908380830895AC
:107FB000F1DF803219F088E0F5DFFFCF84E1E2CF16
:107FC0001F93182FE7DF1150E9F7F2DF1F91089593
:0A7FD00080E0E8DFEE27FF270994A8
:027FFE0002047B
:0400000300007E007B
:00000001FF

482
bootloaders/optiboot/optiboot_atmega328_pro_8MHz.lst
View File

@ -3,7 +3,7 @@ optiboot_atmega328_pro_8MHz.elf: file format elf32-avr
Sections:
Idx Name Size VMA LMA File off Algn
0 .text 000001da 00000000 00000000 00000054 2**1
0 .text 000001da 00007e00 00007e00 00000054 2**1
CONTENTS, ALLOC, LOAD, READONLY, CODE
1 .version 00000002 00007ffe 00007ffe 0000022e 2**0
CONTENTS, READONLY
@ -11,551 +11,551 @@ Idx Name Size VMA LMA File off Algn
CONTENTS, READONLY, DEBUGGING
3 .debug_pubnames 0000005f 00000000 00000000 00000258 2**0
CONTENTS, READONLY, DEBUGGING
4 .debug_info 0000028c 00000000 00000000 000002b7 2**0
4 .debug_info 0000028d 00000000 00000000 000002b7 2**0
CONTENTS, READONLY, DEBUGGING
5 .debug_abbrev 00000199 00000000 00000000 00000543 2**0
5 .debug_abbrev 0000018a 00000000 00000000 00000544 2**0
CONTENTS, READONLY, DEBUGGING
6 .debug_line 00000456 00000000 00000000 000006dc 2**0
6 .debug_line 00000456 00000000 00000000 000006ce 2**0
CONTENTS, READONLY, DEBUGGING
7 .debug_frame 00000080 00000000 00000000 00000b34 2**2
7 .debug_frame 00000080 00000000 00000000 00000b24 2**2
CONTENTS, READONLY, DEBUGGING
8 .debug_str 00000149 00000000 00000000 00000bb4 2**0
8 .debug_str 00000149 00000000 00000000 00000ba4 2**0
CONTENTS, READONLY, DEBUGGING
9 .debug_loc 0000027e 00000000 00000000 00000cfd 2**0
9 .debug_loc 0000027e 00000000 00000000 00000ced 2**0
CONTENTS, READONLY, DEBUGGING
10 .debug_ranges 00000060 00000000 00000000 00000f7b 2**0
10 .debug_ranges 00000060 00000000 00000000 00000f6b 2**0
CONTENTS, READONLY, DEBUGGING
Disassembly of section .text:
00000000 <main>:
00007e00 <main>:
#define rstVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+4))
#define wdtVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+6))
#endif
/* main program starts here */
int main(void) {
0: 11 24 eor r1, r1
7e00: 11 24 eor r1, r1
#ifdef __AVR_ATmega8__
SP=RAMEND; // This is done by hardware reset
#endif
// Adaboot no-wait mod
ch = MCUSR;
2: 84 b7 in r24, 0x34 ; 52
7e02: 84 b7 in r24, 0x34 ; 52
MCUSR = 0;
4: 14 be out 0x34, r1 ; 52
7e04: 14 be out 0x34, r1 ; 52
if (!(ch & _BV(EXTRF))) appStart();
6: 81 ff sbrs r24, 1
8: e3 d0 rcall .+454 ; 0x1d0 <appStart>
7e06: 81 ff sbrs r24, 1
7e08: e3 d0 rcall .+454 ; 0x7fd0 <appStart>
#if LED_START_FLASHES > 0
// Set up Timer 1 for timeout counter
TCCR1B = _BV(CS12) | _BV(CS10); // div 1024
a: 85 e0 ldi r24, 0x05 ; 5
c: 80 93 81 00 sts 0x0081, r24
7e0a: 85 e0 ldi r24, 0x05 ; 5
7e0c: 80 93 81 00 sts 0x0081, r24
UCSRA = _BV(U2X); //Double speed mode USART
UCSRB = _BV(RXEN) | _BV(TXEN); // enable Rx & Tx
UCSRC = _BV(URSEL) | _BV(UCSZ1) | _BV(UCSZ0); // config USART; 8N1
UBRRL = (uint8_t)( (F_CPU + BAUD_RATE * 4L) / (BAUD_RATE * 8L) - 1 );
#else
UCSR0A = _BV(U2X0); //Double speed mode USART0
10: 82 e0 ldi r24, 0x02 ; 2
12: 80 93 c0 00 sts 0x00C0, r24
7e10: 82 e0 ldi r24, 0x02 ; 2
7e12: 80 93 c0 00 sts 0x00C0, r24
UCSR0B = _BV(RXEN0) | _BV(TXEN0);
16: 88 e1 ldi r24, 0x18 ; 24
18: 80 93 c1 00 sts 0x00C1, r24
7e16: 88 e1 ldi r24, 0x18 ; 24
7e18: 80 93 c1 00 sts 0x00C1, r24
UCSR0C = _BV(UCSZ00) | _BV(UCSZ01);
1c: 86 e0 ldi r24, 0x06 ; 6
1e: 80 93 c2 00 sts 0x00C2, r24
7e1c: 86 e0 ldi r24, 0x06 ; 6
7e1e: 80 93 c2 00 sts 0x00C2, r24
UBRR0L = (uint8_t)( (F_CPU + BAUD_RATE * 4L) / (BAUD_RATE * 8L) - 1 );
22: 88 e0 ldi r24, 0x08 ; 8
24: 80 93 c4 00 sts 0x00C4, r24
7e22: 88 e0 ldi r24, 0x08 ; 8
7e24: 80 93 c4 00 sts 0x00C4, r24
#endif
#endif
// Set up watchdog to trigger after 500ms
watchdogConfig(WATCHDOG_1S);
28: 8e e0 ldi r24, 0x0E ; 14
2a: bc d0 rcall .+376 ; 0x1a4 <watchdogConfig>
7e28: 8e e0 ldi r24, 0x0E ; 14
7e2a: bc d0 rcall .+376 ; 0x7fa4 <watchdogConfig>
/* Set LED pin as output */
LED_DDR |= _BV(LED);
2c: 25 9a sbi 0x04, 5 ; 4
2e: 86 e0 ldi r24, 0x06 ; 6
7e2c: 25 9a sbi 0x04, 5 ; 4
7e2e: 86 e0 ldi r24, 0x06 ; 6
}
#if LED_START_FLASHES > 0
void flash_led(uint8_t count) {
do {
TCNT1 = -(F_CPU/(1024*16));
30: 28 e1 ldi r18, 0x18 ; 24
32: 3e ef ldi r19, 0xFE ; 254
7e30: 28 e1 ldi r18, 0x18 ; 24
7e32: 3e ef ldi r19, 0xFE ; 254
TIFR1 = _BV(TOV1);
34: 91 e0 ldi r25, 0x01 ; 1
7e34: 91 e0 ldi r25, 0x01 ; 1
}
#if LED_START_FLASHES > 0
void flash_led(uint8_t count) {
do {
TCNT1 = -(F_CPU/(1024*16));
36: 30 93 85 00 sts 0x0085, r19
3a: 20 93 84 00 sts 0x0084, r18
7e36: 30 93 85 00 sts 0x0085, r19
7e3a: 20 93 84 00 sts 0x0084, r18
TIFR1 = _BV(TOV1);
3e: 96 bb out 0x16, r25 ; 22
7e3e: 96 bb out 0x16, r25 ; 22
while(!(TIFR1 & _BV(TOV1)));
40: b0 9b sbis 0x16, 0 ; 22
42: fe cf rjmp .-4 ; 0x40 <__SREG__+0x1>
7e40: b0 9b sbis 0x16, 0 ; 22
7e42: fe cf rjmp .-4 ; 0x7e40 <main+0x40>
#ifdef __AVR_ATmega8__
LED_PORT ^= _BV(LED);
#else
LED_PIN |= _BV(LED);
44: 1d 9a sbi 0x03, 5 ; 3
7e44: 1d 9a sbi 0x03, 5 ; 3
}
#endif
// Watchdog functions. These are only safe with interrupts turned off.
void watchdogReset() {
__asm__ __volatile__ (
46: a8 95 wdr
7e46: a8 95 wdr
LED_PORT ^= _BV(LED);
#else
LED_PIN |= _BV(LED);
#endif
watchdogReset();
} while (--count);
48: 81 50 subi r24, 0x01 ; 1
4a: a9 f7 brne .-22 ; 0x36 <__CCP__+0x2>
7e48: 81 50 subi r24, 0x01 ; 1
7e4a: a9 f7 brne .-22 ; 0x7e36 <main+0x36>
/* get character from UART */
ch = getch();
if(ch == STK_GET_PARAMETER) {
// GET PARAMETER returns a generic 0x03 reply - enough to keep Avrdude happy
getNch(1);
4c: 99 24 eor r9, r9
4e: 93 94 inc r9
7e4c: 99 24 eor r9, r9
7e4e: 93 94 inc r9
__boot_page_fill_short((uint16_t)(void*)addrPtr,a);
addrPtr += 2;
} while (--ch);
// Write from programming buffer
__boot_page_write_short((uint16_t)(void*)address);
50: a5 e0 ldi r26, 0x05 ; 5
52: aa 2e mov r10, r26
7e50: a5 e0 ldi r26, 0x05 ; 5
7e52: aa 2e mov r10, r26
boot_spm_busy_wait();
#if defined(RWWSRE)
// Reenable read access to flash
boot_rww_enable();
54: f1 e1 ldi r31, 0x11 ; 17
56: bf 2e mov r11, r31
7e54: f1 e1 ldi r31, 0x11 ; 17
7e56: bf 2e mov r11, r31
#endif
/* Forever loop */
for (;;) {
/* get character from UART */
ch = getch();
58: 9d d0 rcall .+314 ; 0x194 <getch>
7e58: 9d d0 rcall .+314 ; 0x7f94 <getch>
if(ch == STK_GET_PARAMETER) {
5a: 81 34 cpi r24, 0x41 ; 65
5c: 21 f4 brne .+8 ; 0x66 <__SREG__+0x27>
7e5a: 81 34 cpi r24, 0x41 ; 65
7e5c: 21 f4 brne .+8 ; 0x7e66 <main+0x66>
// GET PARAMETER returns a generic 0x03 reply - enough to keep Avrdude happy
getNch(1);
5e: 81 e0 ldi r24, 0x01 ; 1
60: af d0 rcall .+350 ; 0x1c0 <getNch>
7e5e: 81 e0 ldi r24, 0x01 ; 1
7e60: af d0 rcall .+350 ; 0x7fc0 <getNch>
putch(0x03);
62: 83 e0 ldi r24, 0x03 ; 3
64: 1f c0 rjmp .+62 ; 0xa4 <__SREG__+0x65>
7e62: 83 e0 ldi r24, 0x03 ; 3
7e64: 1f c0 rjmp .+62 ; 0x7ea4 <main+0xa4>
}
else if(ch == STK_SET_DEVICE) {
66: 82 34 cpi r24, 0x42 ; 66
68: 11 f4 brne .+4 ; 0x6e <__SREG__+0x2f>
7e66: 82 34 cpi r24, 0x42 ; 66
7e68: 11 f4 brne .+4 ; 0x7e6e <main+0x6e>
// SET DEVICE is ignored
getNch(20);
6a: 84 e1 ldi r24, 0x14 ; 20
6c: 03 c0 rjmp .+6 ; 0x74 <__SREG__+0x35>
7e6a: 84 e1 ldi r24, 0x14 ; 20
7e6c: 03 c0 rjmp .+6 ; 0x7e74 <main+0x74>
}
else if(ch == STK_SET_DEVICE_EXT) {
6e: 85 34 cpi r24, 0x45 ; 69
70: 19 f4 brne .+6 ; 0x78 <__SREG__+0x39>
7e6e: 85 34 cpi r24, 0x45 ; 69
7e70: 19 f4 brne .+6 ; 0x7e78 <main+0x78>
// SET DEVICE EXT is ignored
getNch(5);
72: 85 e0 ldi r24, 0x05 ; 5
74: a5 d0 rcall .+330 ; 0x1c0 <getNch>
76: 83 c0 rjmp .+262 ; 0x17e <__SREG__+0x13f>
7e72: 85 e0 ldi r24, 0x05 ; 5
7e74: a5 d0 rcall .+330 ; 0x7fc0 <getNch>
7e76: 83 c0 rjmp .+262 ; 0x7f7e <main+0x17e>
}
else if(ch == STK_LOAD_ADDRESS) {
78: 85 35 cpi r24, 0x55 ; 85
7a: 79 f4 brne .+30 ; 0x9a <__SREG__+0x5b>
7e78: 85 35 cpi r24, 0x55 ; 85
7e7a: 79 f4 brne .+30 ; 0x7e9a <main+0x9a>
// LOAD ADDRESS
uint16_t newAddress;
newAddress = getch();
7c: 8b d0 rcall .+278 ; 0x194 <getch>
7e7c: 8b d0 rcall .+278 ; 0x7f94 <getch>
newAddress = (newAddress & 0xff) | (getch() << 8);
7e: e8 2e mov r14, r24
80: ff 24 eor r15, r15
82: 88 d0 rcall .+272 ; 0x194 <getch>
84: 08 2f mov r16, r24
86: 10 e0 ldi r17, 0x00 ; 0
88: 10 2f mov r17, r16
8a: 00 27 eor r16, r16
8c: 0e 29 or r16, r14
8e: 1f 29 or r17, r15
7e7e: e8 2e mov r14, r24
7e80: ff 24 eor r15, r15
7e82: 88 d0 rcall .+272 ; 0x7f94 <getch>
7e84: 08 2f mov r16, r24
7e86: 10 e0 ldi r17, 0x00 ; 0
7e88: 10 2f mov r17, r16
7e8a: 00 27 eor r16, r16
7e8c: 0e 29 or r16, r14
7e8e: 1f 29 or r17, r15
#ifdef RAMPZ
// Transfer top bit to RAMPZ
RAMPZ = (newAddress & 0x8000) ? 1 : 0;
#endif
newAddress += newAddress; // Convert from word address to byte address
90: 00 0f add r16, r16
92: 11 1f adc r17, r17
7e90: 00 0f add r16, r16
7e92: 11 1f adc r17, r17
address = newAddress;
verifySpace();
94: 8d d0 rcall .+282 ; 0x1b0 <verifySpace>
96: 68 01 movw r12, r16
98: 72 c0 rjmp .+228 ; 0x17e <__SREG__+0x13f>
7e94: 8d d0 rcall .+282 ; 0x7fb0 <verifySpace>
7e96: 68 01 movw r12, r16
7e98: 72 c0 rjmp .+228 ; 0x7f7e <main+0x17e>
}
else if(ch == STK_UNIVERSAL) {
9a: 86 35 cpi r24, 0x56 ; 86
9c: 29 f4 brne .+10 ; 0xa8 <__SREG__+0x69>
7e9a: 86 35 cpi r24, 0x56 ; 86
7e9c: 29 f4 brne .+10 ; 0x7ea8 <main+0xa8>
// UNIVERSAL command is ignored
getNch(4);
9e: 84 e0 ldi r24, 0x04 ; 4
a0: 8f d0 rcall .+286 ; 0x1c0 <getNch>
7e9e: 84 e0 ldi r24, 0x04 ; 4
7ea0: 8f d0 rcall .+286 ; 0x7fc0 <getNch>
putch(0x00);
a2: 80 e0 ldi r24, 0x00 ; 0
a4: 6f d0 rcall .+222 ; 0x184 <putch>
a6: 6b c0 rjmp .+214 ; 0x17e <__SREG__+0x13f>
7ea2: 80 e0 ldi r24, 0x00 ; 0
7ea4: 6f d0 rcall .+222 ; 0x7f84 <putch>
7ea6: 6b c0 rjmp .+214 ; 0x7f7e <main+0x17e>
}
/* Write memory, length is big endian and is in bytes */
else if(ch == STK_PROG_PAGE) {
a8: 84 36 cpi r24, 0x64 ; 100
aa: 09 f0 breq .+2 ; 0xae <__SREG__+0x6f>
ac: 42 c0 rjmp .+132 ; 0x132 <__SREG__+0xf3>
7ea8: 84 36 cpi r24, 0x64 ; 100
7eaa: 09 f0 breq .+2 ; 0x7eae <main+0xae>
7eac: 42 c0 rjmp .+132 ; 0x7f32 <main+0x132>
// PROGRAM PAGE - we support flash programming only, not EEPROM
uint8_t *bufPtr;
uint16_t addrPtr;
getch(); /* getlen() */
ae: 72 d0 rcall .+228 ; 0x194 <getch>
7eae: 72 d0 rcall .+228 ; 0x7f94 <getch>
length = getch();
b0: 71 d0 rcall .+226 ; 0x194 <getch>
b2: 08 2f mov r16, r24
7eb0: 71 d0 rcall .+226 ; 0x7f94 <getch>
7eb2: 08 2f mov r16, r24
getch();
b4: 6f d0 rcall .+222 ; 0x194 <getch>
7eb4: 6f d0 rcall .+222 ; 0x7f94 <getch>
// If we are in RWW section, immediately start page erase
if (address < NRWWSTART) __boot_page_erase_short((uint16_t)(void*)address);
b6: 80 e0 ldi r24, 0x00 ; 0
b8: c8 16 cp r12, r24
ba: 80 e7 ldi r24, 0x70 ; 112
bc: d8 06 cpc r13, r24
be: 20 f4 brcc .+8 ; 0xc8 <__SREG__+0x89>
c0: 83 e0 ldi r24, 0x03 ; 3
c2: f6 01 movw r30, r12
c4: 87 bf out 0x37, r24 ; 55
c6: e8 95 spm
c8: c0 e0 ldi r28, 0x00 ; 0
ca: d1 e0 ldi r29, 0x01 ; 1
7eb6: 80 e0 ldi r24, 0x00 ; 0
7eb8: c8 16 cp r12, r24
7eba: 80 e7 ldi r24, 0x70 ; 112
7ebc: d8 06 cpc r13, r24
7ebe: 20 f4 brcc .+8 ; 0x7ec8 <main+0xc8>
7ec0: 83 e0 ldi r24, 0x03 ; 3
7ec2: f6 01 movw r30, r12
7ec4: 87 bf out 0x37, r24 ; 55
7ec6: e8 95 spm
7ec8: c0 e0 ldi r28, 0x00 ; 0
7eca: d1 e0 ldi r29, 0x01 ; 1
// While that is going on, read in page contents
bufPtr = buff;
do *bufPtr++ = getch();
cc: 63 d0 rcall .+198 ; 0x194 <getch>
ce: 89 93 st Y+, r24
7ecc: 63 d0 rcall .+198 ; 0x7f94 <getch>
7ece: 89 93 st Y+, r24
while (--length);
d0: 0c 17 cp r16, r28
d2: e1 f7 brne .-8 ; 0xcc <__SREG__+0x8d>
7ed0: 0c 17 cp r16, r28
7ed2: e1 f7 brne .-8 ; 0x7ecc <main+0xcc>
// If we are in NRWW section, page erase has to be delayed until now.
// Todo: Take RAMPZ into account
if (address >= NRWWSTART) __boot_page_erase_short((uint16_t)(void*)address);
d4: f0 e0 ldi r31, 0x00 ; 0
d6: cf 16 cp r12, r31
d8: f0 e7 ldi r31, 0x70 ; 112
da: df 06 cpc r13, r31
dc: 20 f0 brcs .+8 ; 0xe6 <__SREG__+0xa7>
de: 83 e0 ldi r24, 0x03 ; 3
e0: f6 01 movw r30, r12
e2: 87 bf out 0x37, r24 ; 55
e4: e8 95 spm
7ed4: f0 e0 ldi r31, 0x00 ; 0
7ed6: cf 16 cp r12, r31
7ed8: f0 e7 ldi r31, 0x70 ; 112
7eda: df 06 cpc r13, r31
7edc: 20 f0 brcs .+8 ; 0x7ee6 <main+0xe6>
7ede: 83 e0 ldi r24, 0x03 ; 3
7ee0: f6 01 movw r30, r12
7ee2: 87 bf out 0x37, r24 ; 55
7ee4: e8 95 spm
// Read command terminator, start reply
verifySpace();
e6: 64 d0 rcall .+200 ; 0x1b0 <verifySpace>
7ee6: 64 d0 rcall .+200 ; 0x7fb0 <verifySpace>
// If only a partial page is to be programmed, the erase might not be complete.
// So check that here
boot_spm_busy_wait();
e8: 07 b6 in r0, 0x37 ; 55
ea: 00 fc sbrc r0, 0
ec: fd cf rjmp .-6 ; 0xe8 <__SREG__+0xa9>
ee: a6 01 movw r20, r12
f0: a0 e0 ldi r26, 0x00 ; 0
f2: b1 e0 ldi r27, 0x01 ; 1
7ee8: 07 b6 in r0, 0x37 ; 55
7eea: 00 fc sbrc r0, 0
7eec: fd cf rjmp .-6 ; 0x7ee8 <main+0xe8>
7eee: a6 01 movw r20, r12
7ef0: a0 e0 ldi r26, 0x00 ; 0
7ef2: b1 e0 ldi r27, 0x01 ; 1
bufPtr = buff;
addrPtr = (uint16_t)(void*)address;
ch = SPM_PAGESIZE / 2;
do {
uint16_t a;
a = *bufPtr++;
f4: 2c 91 ld r18, X
f6: 30 e0 ldi r19, 0x00 ; 0
7ef4: 2c 91 ld r18, X
7ef6: 30 e0 ldi r19, 0x00 ; 0
a |= (*bufPtr++) << 8;
f8: 11 96 adiw r26, 0x01 ; 1
fa: 8c 91 ld r24, X
fc: 11 97 sbiw r26, 0x01 ; 1
fe: 90 e0 ldi r25, 0x00 ; 0
100: 98 2f mov r25, r24
102: 88 27 eor r24, r24
104: 82 2b or r24, r18
106: 93 2b or r25, r19
7ef8: 11 96 adiw r26, 0x01 ; 1
7efa: 8c 91 ld r24, X
7efc: 11 97 sbiw r26, 0x01 ; 1
7efe: 90 e0 ldi r25, 0x00 ; 0
7f00: 98 2f mov r25, r24
7f02: 88 27 eor r24, r24
7f04: 82 2b or r24, r18
7f06: 93 2b or r25, r19
#define rstVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+4))
#define wdtVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+6))
#endif
/* main program starts here */
int main(void) {
108: 12 96 adiw r26, 0x02 ; 2
7f08: 12 96 adiw r26, 0x02 ; 2
ch = SPM_PAGESIZE / 2;
do {
uint16_t a;
a = *bufPtr++;
a |= (*bufPtr++) << 8;
__boot_page_fill_short((uint16_t)(void*)addrPtr,a);
10a: fa 01 movw r30, r20
10c: 0c 01 movw r0, r24
10e: 97 be out 0x37, r9 ; 55
110: e8 95 spm
112: 11 24 eor r1, r1
7f0a: fa 01 movw r30, r20
7f0c: 0c 01 movw r0, r24
7f0e: 97 be out 0x37, r9 ; 55
7f10: e8 95 spm
7f12: 11 24 eor r1, r1
addrPtr += 2;
114: 4e 5f subi r20, 0xFE ; 254
116: 5f 4f sbci r21, 0xFF ; 255
7f14: 4e 5f subi r20, 0xFE ; 254
7f16: 5f 4f sbci r21, 0xFF ; 255
} while (--ch);
118: f1 e0 ldi r31, 0x01 ; 1
11a: a0 38 cpi r26, 0x80 ; 128
11c: bf 07 cpc r27, r31
11e: 51 f7 brne .-44 ; 0xf4 <__SREG__+0xb5>
7f18: f1 e0 ldi r31, 0x01 ; 1
7f1a: a0 38 cpi r26, 0x80 ; 128
7f1c: bf 07 cpc r27, r31
7f1e: 51 f7 brne .-44 ; 0x7ef4 <main+0xf4>
// Write from programming buffer
__boot_page_write_short((uint16_t)(void*)address);
120: f6 01 movw r30, r12
122: a7 be out 0x37, r10 ; 55
124: e8 95 spm
7f20: f6 01 movw r30, r12
7f22: a7 be out 0x37, r10 ; 55
7f24: e8 95 spm
boot_spm_busy_wait();
126: 07 b6 in r0, 0x37 ; 55
128: 00 fc sbrc r0, 0
12a: fd cf rjmp .-6 ; 0x126 <__SREG__+0xe7>
7f26: 07 b6 in r0, 0x37 ; 55
7f28: 00 fc sbrc r0, 0
7f2a: fd cf rjmp .-6 ; 0x7f26 <main+0x126>
#if defined(RWWSRE)
// Reenable read access to flash
boot_rww_enable();
12c: b7 be out 0x37, r11 ; 55
12e: e8 95 spm
130: 26 c0 rjmp .+76 ; 0x17e <__SREG__+0x13f>
7f2c: b7 be out 0x37, r11 ; 55
7f2e: e8 95 spm
7f30: 26 c0 rjmp .+76 ; 0x7f7e <main+0x17e>
#endif
}
/* Read memory block mode, length is big endian. */
else if(ch == STK_READ_PAGE) {
132: 84 37 cpi r24, 0x74 ; 116
134: b1 f4 brne .+44 ; 0x162 <__SREG__+0x123>
7f32: 84 37 cpi r24, 0x74 ; 116
7f34: b1 f4 brne .+44 ; 0x7f62 <main+0x162>
// READ PAGE - we only read flash
getch(); /* getlen() */
136: 2e d0 rcall .+92 ; 0x194 <getch>
7f36: 2e d0 rcall .+92 ; 0x7f94 <getch>
length = getch();
138: 2d d0 rcall .+90 ; 0x194 <getch>
13a: f8 2e mov r15, r24
7f38: 2d d0 rcall .+90 ; 0x7f94 <getch>
7f3a: f8 2e mov r15, r24
getch();
13c: 2b d0 rcall .+86 ; 0x194 <getch>
7f3c: 2b d0 rcall .+86 ; 0x7f94 <getch>
verifySpace();
13e: 38 d0 rcall .+112 ; 0x1b0 <verifySpace>
140: f6 01 movw r30, r12
142: ef 2c mov r14, r15
7f3e: 38 d0 rcall .+112 ; 0x7fb0 <verifySpace>
7f40: f6 01 movw r30, r12
7f42: ef 2c mov r14, r15
putch(result);
address++;
}
while (--length);
#else
do putch(pgm_read_byte_near(address++));
144: 8f 01 movw r16, r30
146: 0f 5f subi r16, 0xFF ; 255
148: 1f 4f sbci r17, 0xFF ; 255
14a: 84 91 lpm r24, Z+
14c: 1b d0 rcall .+54 ; 0x184 <putch>
7f44: 8f 01 movw r16, r30
7f46: 0f 5f subi r16, 0xFF ; 255
7f48: 1f 4f sbci r17, 0xFF ; 255
7f4a: 84 91 lpm r24, Z+
7f4c: 1b d0 rcall .+54 ; 0x7f84 <putch>
while (--length);
14e: ea 94 dec r14
150: f8 01 movw r30, r16
152: c1 f7 brne .-16 ; 0x144 <__SREG__+0x105>
7f4e: ea 94 dec r14
7f50: f8 01 movw r30, r16
7f52: c1 f7 brne .-16 ; 0x7f44 <main+0x144>
#define rstVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+4))
#define wdtVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+6))
#endif
/* main program starts here */
int main(void) {
154: 08 94 sec
156: c1 1c adc r12, r1
158: d1 1c adc r13, r1
15a: fa 94 dec r15
15c: cf 0c add r12, r15
15e: d1 1c adc r13, r1
160: 0e c0 rjmp .+28 ; 0x17e <__SREG__+0x13f>
7f54: 08 94 sec
7f56: c1 1c adc r12, r1
7f58: d1 1c adc r13, r1
7f5a: fa 94 dec r15
7f5c: cf 0c add r12, r15
7f5e: d1 1c adc r13, r1
7f60: 0e c0 rjmp .+28 ; 0x7f7e <main+0x17e>
#endif
#endif
}
/* Get device signature bytes */
else if(ch == STK_READ_SIGN) {
162: 85 37 cpi r24, 0x75 ; 117
164: 39 f4 brne .+14 ; 0x174 <__SREG__+0x135>
7f62: 85 37 cpi r24, 0x75 ; 117
7f64: 39 f4 brne .+14 ; 0x7f74 <main+0x174>
// READ SIGN - return what Avrdude wants to hear
verifySpace();
166: 24 d0 rcall .+72 ; 0x1b0 <verifySpace>
7f66: 24 d0 rcall .+72 ; 0x7fb0 <verifySpace>
putch(SIGNATURE_0);
168: 8e e1 ldi r24, 0x1E ; 30
16a: 0c d0 rcall .+24 ; 0x184 <putch>
7f68: 8e e1 ldi r24, 0x1E ; 30
7f6a: 0c d0 rcall .+24 ; 0x7f84 <putch>
putch(SIGNATURE_1);
16c: 85 e9 ldi r24, 0x95 ; 149
16e: 0a d0 rcall .+20 ; 0x184 <putch>
7f6c: 85 e9 ldi r24, 0x95 ; 149
7f6e: 0a d0 rcall .+20 ; 0x7f84 <putch>
putch(SIGNATURE_2);
170: 8f e0 ldi r24, 0x0F ; 15
172: 98 cf rjmp .-208 ; 0xa4 <__SREG__+0x65>
7f70: 8f e0 ldi r24, 0x0F ; 15
7f72: 98 cf rjmp .-208 ; 0x7ea4 <main+0xa4>
}
else if (ch == 'Q') {
174: 81 35 cpi r24, 0x51 ; 81
176: 11 f4 brne .+4 ; 0x17c <__SREG__+0x13d>
7f74: 81 35 cpi r24, 0x51 ; 81
7f76: 11 f4 brne .+4 ; 0x7f7c <main+0x17c>
// Adaboot no-wait mod
watchdogConfig(WATCHDOG_16MS);
178: 88 e0 ldi r24, 0x08 ; 8
17a: 14 d0 rcall .+40 ; 0x1a4 <watchdogConfig>
7f78: 88 e0 ldi r24, 0x08 ; 8
7f7a: 14 d0 rcall .+40 ; 0x7fa4 <watchdogConfig>
verifySpace();
}
else {
// This covers the response to commands like STK_ENTER_PROGMODE
verifySpace();
17c: 19 d0 rcall .+50 ; 0x1b0 <verifySpace>
7f7c: 19 d0 rcall .+50 ; 0x7fb0 <verifySpace>
}
putch(STK_OK);
17e: 80 e1 ldi r24, 0x10 ; 16
180: 01 d0 rcall .+2 ; 0x184 <putch>
182: 6a cf rjmp .-300 ; 0x58 <__SREG__+0x19>
7f7e: 80 e1 ldi r24, 0x10 ; 16
7f80: 01 d0 rcall .+2 ; 0x7f84 <putch>
7f82: 6a cf rjmp .-300 ; 0x7e58 <main+0x58>
00000184 <putch>:
00007f84 <putch>:
}
}
void putch(char ch) {
184: 98 2f mov r25, r24
7f84: 98 2f mov r25, r24
#ifndef SOFT_UART
while (!(UCSR0A & _BV(UDRE0)));
186: 80 91 c0 00 lds r24, 0x00C0
18a: 85 ff sbrs r24, 5
18c: fc cf rjmp .-8 ; 0x186 <putch+0x2>
7f86: 80 91 c0 00 lds r24, 0x00C0
7f8a: 85 ff sbrs r24, 5
7f8c: fc cf rjmp .-8 ; 0x7f86 <putch+0x2>
UDR0 = ch;
18e: 90 93 c6 00 sts 0x00C6, r25
7f8e: 90 93 c6 00 sts 0x00C6, r25
[uartBit] "I" (UART_TX_BIT)
:
"r25"
);
#endif
}
192: 08 95 ret
7f92: 08 95 ret
00000194 <getch>:
00007f94 <getch>:
}
#endif
// Watchdog functions. These are only safe with interrupts turned off.
void watchdogReset() {
__asm__ __volatile__ (
194: a8 95 wdr
7f94: a8 95 wdr
[uartBit] "I" (UART_RX_BIT)
:
"r25"
);
#else
while(!(UCSR0A & _BV(RXC0)));
196: 80 91 c0 00 lds r24, 0x00C0
19a: 87 ff sbrs r24, 7
19c: fc cf rjmp .-8 ; 0x196 <getch+0x2>
7f96: 80 91 c0 00 lds r24, 0x00C0
7f9a: 87 ff sbrs r24, 7
7f9c: fc cf rjmp .-8 ; 0x7f96 <getch+0x2>
ch = UDR0;
19e: 80 91 c6 00 lds r24, 0x00C6
7f9e: 80 91 c6 00 lds r24, 0x00C6
LED_PIN |= _BV(LED);
#endif
#endif
return ch;
}
1a2: 08 95 ret
7fa2: 08 95 ret
000001a4 <watchdogConfig>:
00007fa4 <watchdogConfig>:
"wdr\n"
);
}
void watchdogConfig(uint8_t x) {
WDTCSR = _BV(WDCE) | _BV(WDE);
1a4: e0 e6 ldi r30, 0x60 ; 96
1a6: f0 e0 ldi r31, 0x00 ; 0
1a8: 98 e1 ldi r25, 0x18 ; 24
1aa: 90 83 st Z, r25
7fa4: e0 e6 ldi r30, 0x60 ; 96
7fa6: f0 e0 ldi r31, 0x00 ; 0
7fa8: 98 e1 ldi r25, 0x18 ; 24
7faa: 90 83 st Z, r25
WDTCSR = x;
1ac: 80 83 st Z, r24
7fac: 80 83 st Z, r24
}
1ae: 08 95 ret
7fae: 08 95 ret
000001b0 <verifySpace>:
00007fb0 <verifySpace>:
do getch(); while (--count);
verifySpace();
}
void verifySpace() {
if (getch() != CRC_EOP) {
1b0: f1 df rcall .-30 ; 0x194 <getch>
1b2: 80 32 cpi r24, 0x20 ; 32
1b4: 19 f0 breq .+6 ; 0x1bc <verifySpace+0xc>
7fb0: f1 df rcall .-30 ; 0x7f94 <getch>
7fb2: 80 32 cpi r24, 0x20 ; 32
7fb4: 19 f0 breq .+6 ; 0x7fbc <verifySpace+0xc>
watchdogConfig(WATCHDOG_16MS); // shorten WD timeout
1b6: 88 e0 ldi r24, 0x08 ; 8
1b8: f5 df rcall .-22 ; 0x1a4 <watchdogConfig>
1ba: ff cf rjmp .-2 ; 0x1ba <verifySpace+0xa>
7fb6: 88 e0 ldi r24, 0x08 ; 8
7fb8: f5 df rcall .-22 ; 0x7fa4 <watchdogConfig>
7fba: ff cf rjmp .-2 ; 0x7fba <verifySpace+0xa>
while (1) // and busy-loop so that WD causes
; // a reset and app start.
}
putch(STK_INSYNC);
1bc: 84 e1 ldi r24, 0x14 ; 20
7fbc: 84 e1 ldi r24, 0x14 ; 20
}
1be: e2 cf rjmp .-60 ; 0x184 <putch>
7fbe: e2 cf rjmp .-60 ; 0x7f84 <putch>
000001c0 <getNch>:
00007fc0 <getNch>:
::[count] "M" (UART_B_VALUE)
);
}
#endif
void getNch(uint8_t count) {
1c0: 1f 93 push r17
1c2: 18 2f mov r17, r24
7fc0: 1f 93 push r17
7fc2: 18 2f mov r17, r24
do getch(); while (--count);
1c4: e7 df rcall .-50 ; 0x194 <getch>
1c6: 11 50 subi r17, 0x01 ; 1
1c8: e9 f7 brne .-6 ; 0x1c4 <getNch+0x4>
7fc4: e7 df rcall .-50 ; 0x7f94 <getch>
7fc6: 11 50 subi r17, 0x01 ; 1
7fc8: e9 f7 brne .-6 ; 0x7fc4 <getNch+0x4>
verifySpace();
1ca: f2 df rcall .-28 ; 0x1b0 <verifySpace>
7fca: f2 df rcall .-28 ; 0x7fb0 <verifySpace>
}
1cc: 1f 91 pop r17
1ce: 08 95 ret
7fcc: 1f 91 pop r17
7fce: 08 95 ret
000001d0 <appStart>:
00007fd0 <appStart>:
WDTCSR = _BV(WDCE) | _BV(WDE);
WDTCSR = x;
}
void appStart() {
watchdogConfig(WATCHDOG_OFF);
1d0: 80 e0 ldi r24, 0x00 ; 0
1d2: e8 df rcall .-48 ; 0x1a4 <watchdogConfig>
7fd0: 80 e0 ldi r24, 0x00 ; 0
7fd2: e8 df rcall .-48 ; 0x7fa4 <watchdogConfig>
__asm__ __volatile__ (
1d4: ee 27 eor r30, r30
1d6: ff 27 eor r31, r31
1d8: 09 94 ijmp
7fd4: ee 27 eor r30, r30
7fd6: ff 27 eor r31, r31
7fd8: 09 94 ijmp

2
bootloaders/optiboot/optiboot_lilypad.hex
View File

@ -28,6 +28,6 @@
:103FB000F1DF803219F088E0F5DFFFCF84E1E2CF56
:103FC0001F93182FE7DF1150E9F7F2DF1F910895D3
:0A3FD00080E0E8DFEE27FF270994E8
:023FFE000104BC
:023FFE000204BB
:0400000300003E00BB
:00000001FF

14
bootloaders/optiboot/optiboot_lilypad.lst
View File

@ -11,19 +11,19 @@ Idx Name Size VMA LMA File off Algn
CONTENTS, READONLY, DEBUGGING
3 .debug_pubnames 0000005f 00000000 00000000 00000258 2**0
CONTENTS, READONLY, DEBUGGING
4 .debug_info 0000028c 00000000 00000000 000002b7 2**0
4 .debug_info 0000028d 00000000 00000000 000002b7 2**0
CONTENTS, READONLY, DEBUGGING
5 .debug_abbrev 00000199 00000000 00000000 00000543 2**0
5 .debug_abbrev 0000018a 00000000 00000000 00000544 2**0
CONTENTS, READONLY, DEBUGGING
6 .debug_line 00000456 00000000 00000000 000006dc 2**0
6 .debug_line 00000456 00000000 00000000 000006ce 2**0
CONTENTS, READONLY, DEBUGGING
7 .debug_frame 00000080 00000000 00000000 00000b34 2**2
7 .debug_frame 00000080 00000000 00000000 00000b24 2**2
CONTENTS, READONLY, DEBUGGING
8 .debug_str 00000149 00000000 00000000 00000bb4 2**0
8 .debug_str 00000149 00000000 00000000 00000ba4 2**0
CONTENTS, READONLY, DEBUGGING
9 .debug_loc 0000027e 00000000 00000000 00000cfd 2**0
9 .debug_loc 0000027e 00000000 00000000 00000ced 2**0
CONTENTS, READONLY, DEBUGGING
10 .debug_ranges 00000060 00000000 00000000 00000f7b 2**0
10 .debug_ranges 00000060 00000000 00000000 00000f6b 2**0
CONTENTS, READONLY, DEBUGGING
Disassembly of section .text:

2
bootloaders/optiboot/optiboot_lilypad_resonator.hex
View File

@ -28,6 +28,6 @@
:103FB000F1DF803219F088E0F5DFFFCF84E1E2CF56
:103FC0001F93182FE7DF1150E9F7F2DF1F910895D3
:0A3FD00080E0E8DFEE27FF270994E8
:023FFE000104BC
:023FFE000204BB
:0400000300003E00BB
:00000001FF

14
bootloaders/optiboot/optiboot_lilypad_resonator.lst
View File

@ -11,19 +11,19 @@ Idx Name Size VMA LMA File off Algn
CONTENTS, READONLY, DEBUGGING
3 .debug_pubnames 0000005f 00000000 00000000 00000258 2**0
CONTENTS, READONLY, DEBUGGING
4 .debug_info 0000028c 00000000 00000000 000002b7 2**0
4 .debug_info 0000028d 00000000 00000000 000002b7 2**0
CONTENTS, READONLY, DEBUGGING
5 .debug_abbrev 00000199 00000000 00000000 00000543 2**0
5 .debug_abbrev 0000018a 00000000 00000000 00000544 2**0
CONTENTS, READONLY, DEBUGGING
6 .debug_line 00000456 00000000 00000000 000006dc 2**0
6 .debug_line 00000456 00000000 00000000 000006ce 2**0
CONTENTS, READONLY, DEBUGGING
7 .debug_frame 00000080 00000000 00000000 00000b34 2**2
7 .debug_frame 00000080 00000000 00000000 00000b24 2**2
CONTENTS, READONLY, DEBUGGING
8 .debug_str 00000149 00000000 00000000 00000bb4 2**0
8 .debug_str 00000149 00000000 00000000 00000ba4 2**0
CONTENTS, READONLY, DEBUGGING
9 .debug_loc 0000027e 00000000 00000000 00000cfd 2**0
9 .debug_loc 0000027e 00000000 00000000 00000ced 2**0
CONTENTS, READONLY, DEBUGGING
10 .debug_ranges 00000060 00000000 00000000 00000f7b 2**0
10 .debug_ranges 00000060 00000000 00000000 00000f6b 2**0
CONTENTS, READONLY, DEBUGGING
Disassembly of section .text:

77
bootloaders/optiboot/optiboot_luminet.hex
View File

@ -1,39 +1,40 @@
:10000000112484B714BE81FF18D185E08EBD8EE027
:1000100000D1D49AD29A86E023EC3FEF91E03DBD27
:100020002CBD9BB9589BFECFCC9AA8958150B9F7AF
:10003000BB24B39425E0A22E9FE7D92E8EECC82EC8
:10004000D4D0813421F481E0F0D083E0B5C0823493
:1000500011F484E103C0853419F485E0E6D0B3C01F
:10006000853569F4C2D0E82EFF24BFD0082F10E0F8
:10007000102F00270E291F29000F111FA3C086353E
:1000800021F484E0D2D080E097C0843609F060C0CB
:10009000ACD0ABD0F82EA9D0C0E0D1E0A6D08993E7
:1000A000FC16E1F783E0F80187BFE895B6D007B604
:1000B00000FCFDCF0115110511F0A8012AC08091A7
:1000C00000012091010130E0322F222790E0282BFF
:1000D000392B309385012093840140910801809150
:1000E000090190E0982F882750E0842B952B90935E
:1000F0008701809386012450304020930801232FEC
:10010000332720930901D0920001C092010140E001
:1001100050E0A0E0B1E02C9130E011968C91119765
:1001200090E0982F8827822B932B1296FA010C01CE
:10013000B7BEE89511244E5F5F4FF1E0A034BF07D2
:1001400051F7F801A7BEE89507B600FCFDCF3BC00C
:10015000843751F54AD049D0F82E47D05ED0E80117
:10016000EF2C209719F48091840114C0C130D1057F
:1001700019F4809185010EC0C830D10519F4809121
:10018000860108C0C930D10519F48091870102C0E9
:10019000FE01849121961AD0EA9419F70F5F1F4F40
:1001A000FA940F0D111D0FC0853741F436D08EE142
:1001B0000DD083E90BD08CE009D005C0813511F456
:1001C00088E027D02AD080E101D03ACF2AE030E081
:1001D0008095089410F4DA9802C0DA9A000015D0DD
:1001E00014D086952A95B1F70895A89529E030E0B6
:1001F000CB99FECF0AD009D008D08894CB99089427
:100200002A9511F08795F7CF08959EE09A95F1F71A
:10021000089598E191BD81BD0895E7DF803219F01E
:1002200088E0F7DFFFCF84E1D1CF1F93182FDDDF08
:100230001150E9F7F2DF1F91089580E0EADFE4E072
:04024000FF270994F7
:021EFE000104DD
:101D0000112484B714BE81FF18D185E08EBD8EE00A
:101D100000D1D49AD29A86E023EC3FEF91E03DBD0A
:101D20002CBD9BB9589BFECFCC9AA8958150B9F792
:101D3000BB24B39425E0A22E9FE7D92E8EECC82EAB
:101D4000D4D0813421F481E0F0D083E0B5C0823476
:101D500011F484E103C0853419F485E0E6D0B3C002
:101D6000853569F4C2D0E82EFF24BFD0082F10E0DB
:101D7000102F00270E291F29000F111FA3C0863521
:101D800021F484E0D2D080E097C0843609F060C0AE
:101D9000ACD0ABD0F82EA9D0C0E0D1E0A6D08993CA
:101DA000FC16E1F783E0F80187BFE895B6D007B6E7
:101DB00000FCFDCF0115110511F0A8012AC080918A
:101DC00000012091010130E0322F222790E0282BE2
:101DD000392B309385012093840140910801809133
:101DE000090190E0982F882750E0842B952B909341
:101DF0008701809386012450304020930801232FCF
:101E0000332720930901D0920001C092010140E0E4
:101E100050E0A0E0B1E02C9130E011968C91119748
:101E200090E0982F8827822B932B1296FA010C01B1
:101E3000B7BEE89511244E5F5F4FF1E0A034BF07B5
:101E400051F7F801A7BEE89507B600FCFDCF3BC0EF
:101E5000843751F54AD049D0F82E47D05ED0E801FA
:101E6000EF2C209719F48091840114C0C130D10562
:101E700019F4809185010EC0C830D10519F4809104
:101E8000860108C0C930D10519F48091870102C0CC
:101E9000FE01849121961AD0EA9419F70F5F1F4F23
:101EA000FA940F0D111D0FC0853741F436D08EE125
:101EB0000DD083E90BD08CE009D005C0813511F439
:101EC00088E027D02AD080E101D03ACF2AE030E064
:101ED0008095089410F4DA9802C0DA9A000015D0C0
:101EE00014D086952A95B1F70895A89529E030E099
:101EF000CB99FECF0AD009D008D08894CB9908940A
:101F00002A9511F08795F7CF08959EE09A95F1F7FD
:101F1000089598E191BD81BD0895E7DF803219F001
:101F200088E0F7DFFFCF84E1D1CF1F93182FDDDFEB
:101F30001150E9F7F2DF1F91089580E0EADFE4E055
:041F4000FF270994DA
:021EFE000204DC
:0400000300001D00DC
:00000001FF

584
bootloaders/optiboot/optiboot_luminet.lst
View File

@ -3,622 +3,622 @@ optiboot_luminet.elf: file format elf32-avr
Sections:
Idx Name Size VMA LMA File off Algn
0 .version 00000002 00001efe 00001efe 00000298 2**0
CONTENTS, READONLY
1 .text 00000244 00000000 00000000 00000054 2**1
0 .text 00000244 00001d00 00001d00 00000054 2**1
CONTENTS, ALLOC, LOAD, READONLY, CODE
1 .version 00000002 00001efe 00001efe 00000298 2**0
CONTENTS, READONLY
2 .debug_aranges 00000028 00000000 00000000 0000029a 2**0
CONTENTS, READONLY, DEBUGGING
3 .debug_pubnames 0000006d 00000000 00000000 000002c2 2**0
CONTENTS, READONLY, DEBUGGING
4 .debug_info 000002b0 00000000 00000000 0000032f 2**0
4 .debug_info 000002b1 00000000 00000000 0000032f 2**0
CONTENTS, READONLY, DEBUGGING
5 .debug_abbrev 00000197 00000000 00000000 000005df 2**0
5 .debug_abbrev 00000188 00000000 00000000 000005e0 2**0
CONTENTS, READONLY, DEBUGGING
6 .debug_line 000004a7 00000000 00000000 00000776 2**0
6 .debug_line 000004a7 00000000 00000000 00000768 2**0
CONTENTS, READONLY, DEBUGGING
7 .debug_frame 00000090 00000000 00000000 00000c20 2**2
7 .debug_frame 00000090 00000000 00000000 00000c10 2**2
CONTENTS, READONLY, DEBUGGING
8 .debug_str 00000158 00000000 00000000 00000cb0 2**0
8 .debug_str 00000158 00000000 00000000 00000ca0 2**0
CONTENTS, READONLY, DEBUGGING
9 .debug_loc 00000268 00000000 00000000 00000e08 2**0
9 .debug_loc 00000268 00000000 00000000 00000df8 2**0
CONTENTS, READONLY, DEBUGGING
10 .debug_ranges 00000080 00000000 00000000 00001070 2**0
10 .debug_ranges 00000080 00000000 00000000 00001060 2**0
CONTENTS, READONLY, DEBUGGING
Disassembly of section .text:
00000000 <main>:
00001d00 <main>:
#define rstVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+4))
#define wdtVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+6))
#endif
/* main program starts here */
int main(void) {
0: 11 24 eor r1, r1
1d00: 11 24 eor r1, r1
#ifdef __AVR_ATmega8__
SP=RAMEND; // This is done by hardware reset
#endif
// Adaboot no-wait mod
ch = MCUSR;
2: 84 b7 in r24, 0x34 ; 52
1d02: 84 b7 in r24, 0x34 ; 52
MCUSR = 0;
4: 14 be out 0x34, r1 ; 52
1d04: 14 be out 0x34, r1 ; 52
if (!(ch & _BV(EXTRF))) appStart();
6: 81 ff sbrs r24, 1
8: 18 d1 rcall .+560 ; 0x23a <appStart>
1d06: 81 ff sbrs r24, 1
1d08: 18 d1 rcall .+560 ; 0x1f3a <appStart>
#if LED_START_FLASHES > 0
// Set up Timer 1 for timeout counter
TCCR1B = _BV(CS12) | _BV(CS10); // div 1024
a: 85 e0 ldi r24, 0x05 ; 5
c: 8e bd out 0x2e, r24 ; 46
1d0a: 85 e0 ldi r24, 0x05 ; 5
1d0c: 8e bd out 0x2e, r24 ; 46
UBRR0L = (uint8_t)( (F_CPU + BAUD_RATE * 4L) / (BAUD_RATE * 8L) - 1 );
#endif
#endif
// Set up watchdog to trigger after 500ms
watchdogConfig(WATCHDOG_1S);
e: 8e e0 ldi r24, 0x0E ; 14
10: 00 d1 rcall .+512 ; 0x212 <watchdogConfig>
1d0e: 8e e0 ldi r24, 0x0E ; 14
1d10: 00 d1 rcall .+512 ; 0x1f12 <watchdogConfig>
/* Set LED pin as output */
LED_DDR |= _BV(LED);
12: d4 9a sbi 0x1a, 4 ; 26
1d12: d4 9a sbi 0x1a, 4 ; 26
#ifdef SOFT_UART
/* Set TX pin as output */
UART_DDR |= _BV(UART_TX_BIT);
14: d2 9a sbi 0x1a, 2 ; 26
16: 86 e0 ldi r24, 0x06 ; 6
1d14: d2 9a sbi 0x1a, 2 ; 26
1d16: 86 e0 ldi r24, 0x06 ; 6
}
#if LED_START_FLASHES > 0
void flash_led(uint8_t count) {
do {
TCNT1 = -(F_CPU/(1024*16));
18: 23 ec ldi r18, 0xC3 ; 195
1a: 3f ef ldi r19, 0xFF ; 255
1d18: 23 ec ldi r18, 0xC3 ; 195
1d1a: 3f ef ldi r19, 0xFF ; 255
TIFR1 = _BV(TOV1);
1c: 91 e0 ldi r25, 0x01 ; 1
1d1c: 91 e0 ldi r25, 0x01 ; 1
}
#if LED_START_FLASHES > 0
void flash_led(uint8_t count) {
do {
TCNT1 = -(F_CPU/(1024*16));
1e: 3d bd out 0x2d, r19 ; 45
20: 2c bd out 0x2c, r18 ; 44
1d1e: 3d bd out 0x2d, r19 ; 45
1d20: 2c bd out 0x2c, r18 ; 44
TIFR1 = _BV(TOV1);
22: 9b b9 out 0x0b, r25 ; 11
1d22: 9b b9 out 0x0b, r25 ; 11
while(!(TIFR1 & _BV(TOV1)));
24: 58 9b sbis 0x0b, 0 ; 11
26: fe cf rjmp .-4 ; 0x24 <__zero_reg__+0x23>
1d24: 58 9b sbis 0x0b, 0 ; 11
1d26: fe cf rjmp .-4 ; 0x1d24 <main+0x24>
#ifdef __AVR_ATmega8__
LED_PORT ^= _BV(LED);
#else
LED_PIN |= _BV(LED);
28: cc 9a sbi 0x19, 4 ; 25
1d28: cc 9a sbi 0x19, 4 ; 25
}
#endif
// Watchdog functions. These are only safe with interrupts turned off.
void watchdogReset() {
__asm__ __volatile__ (
2a: a8 95 wdr
1d2a: a8 95 wdr
LED_PORT ^= _BV(LED);
#else
LED_PIN |= _BV(LED);
#endif
watchdogReset();
} while (--count);
2c: 81 50 subi r24, 0x01 ; 1
2e: b9 f7 brne .-18 ; 0x1e <__zero_reg__+0x1d>
1d2c: 81 50 subi r24, 0x01 ; 1
1d2e: b9 f7 brne .-18 ; 0x1d1e <main+0x1e>
/* get character from UART */
ch = getch();
if(ch == STK_GET_PARAMETER) {
// GET PARAMETER returns a generic 0x03 reply - enough to keep Avrdude happy
getNch(1);
30: bb 24 eor r11, r11
32: b3 94 inc r11
1d30: bb 24 eor r11, r11
1d32: b3 94 inc r11
__boot_page_fill_short((uint16_t)(void*)addrPtr,a);
addrPtr += 2;
} while (--ch);
// Write from programming buffer
__boot_page_write_short((uint16_t)(void*)address);
34: 25 e0 ldi r18, 0x05 ; 5
36: a2 2e mov r10, r18
1d34: 25 e0 ldi r18, 0x05 ; 5
1d36: a2 2e mov r10, r18
vect -= 4; // Instruction is a relative jump (rjmp), so recalculate.
buff[8] = vect & 0xff;
buff[9] = vect >> 8;
// Add jump to bootloader at RESET vector
buff[0] = 0x7f;
38: 9f e7 ldi r25, 0x7F ; 127
3a: d9 2e mov r13, r25
1d38: 9f e7 ldi r25, 0x7F ; 127
1d3a: d9 2e mov r13, r25
buff[1] = 0xce; // rjmp 0x1d00 instruction
3c: 8e ec ldi r24, 0xCE ; 206
3e: c8 2e mov r12, r24
1d3c: 8e ec ldi r24, 0xCE ; 206
1d3e: c8 2e mov r12, r24
#endif
/* Forever loop */
for (;;) {
/* get character from UART */
ch = getch();
40: d4 d0 rcall .+424 ; 0x1ea <getch>
1d40: d4 d0 rcall .+424 ; 0x1eea <getch>
if(ch == STK_GET_PARAMETER) {
42: 81 34 cpi r24, 0x41 ; 65
44: 21 f4 brne .+8 ; 0x4e <__SREG__+0xf>
1d42: 81 34 cpi r24, 0x41 ; 65
1d44: 21 f4 brne .+8 ; 0x1d4e <main+0x4e>
// GET PARAMETER returns a generic 0x03 reply - enough to keep Avrdude happy
getNch(1);
46: 81 e0 ldi r24, 0x01 ; 1
48: f0 d0 rcall .+480 ; 0x22a <getNch>
1d46: 81 e0 ldi r24, 0x01 ; 1
1d48: f0 d0 rcall .+480 ; 0x1f2a <getNch>
putch(0x03);
4a: 83 e0 ldi r24, 0x03 ; 3
4c: b5 c0 rjmp .+362 ; 0x1b8 <__SREG__+0x179>
1d4a: 83 e0 ldi r24, 0x03 ; 3
1d4c: b5 c0 rjmp .+362 ; 0x1eb8 <main+0x1b8>
}
else if(ch == STK_SET_DEVICE) {
4e: 82 34 cpi r24, 0x42 ; 66
50: 11 f4 brne .+4 ; 0x56 <__SREG__+0x17>
1d4e: 82 34 cpi r24, 0x42 ; 66
1d50: 11 f4 brne .+4 ; 0x1d56 <main+0x56>
// SET DEVICE is ignored
getNch(20);
52: 84 e1 ldi r24, 0x14 ; 20
54: 03 c0 rjmp .+6 ; 0x5c <__SREG__+0x1d>
1d52: 84 e1 ldi r24, 0x14 ; 20
1d54: 03 c0 rjmp .+6 ; 0x1d5c <main+0x5c>
}
else if(ch == STK_SET_DEVICE_EXT) {
56: 85 34 cpi r24, 0x45 ; 69
58: 19 f4 brne .+6 ; 0x60 <__SREG__+0x21>
1d56: 85 34 cpi r24, 0x45 ; 69
1d58: 19 f4 brne .+6 ; 0x1d60 <main+0x60>
// SET DEVICE EXT is ignored
getNch(5);
5a: 85 e0 ldi r24, 0x05 ; 5
5c: e6 d0 rcall .+460 ; 0x22a <getNch>
5e: b3 c0 rjmp .+358 ; 0x1c6 <__SREG__+0x187>
1d5a: 85 e0 ldi r24, 0x05 ; 5
1d5c: e6 d0 rcall .+460 ; 0x1f2a <getNch>
1d5e: b3 c0 rjmp .+358 ; 0x1ec6 <main+0x1c6>
}
else if(ch == STK_LOAD_ADDRESS) {
60: 85 35 cpi r24, 0x55 ; 85
62: 69 f4 brne .+26 ; 0x7e <__SREG__+0x3f>
1d60: 85 35 cpi r24, 0x55 ; 85
1d62: 69 f4 brne .+26 ; 0x1d7e <main+0x7e>
// LOAD ADDRESS
uint16_t newAddress;
newAddress = getch();
64: c2 d0 rcall .+388 ; 0x1ea <getch>
1d64: c2 d0 rcall .+388 ; 0x1eea <getch>
newAddress = (newAddress & 0xff) | (getch() << 8);
66: e8 2e mov r14, r24
68: ff 24 eor r15, r15
6a: bf d0 rcall .+382 ; 0x1ea <getch>
6c: 08 2f mov r16, r24
6e: 10 e0 ldi r17, 0x00 ; 0
70: 10 2f mov r17, r16
72: 00 27 eor r16, r16
74: 0e 29 or r16, r14
76: 1f 29 or r17, r15
1d66: e8 2e mov r14, r24
1d68: ff 24 eor r15, r15
1d6a: bf d0 rcall .+382 ; 0x1eea <getch>
1d6c: 08 2f mov r16, r24
1d6e: 10 e0 ldi r17, 0x00 ; 0
1d70: 10 2f mov r17, r16
1d72: 00 27 eor r16, r16
1d74: 0e 29 or r16, r14
1d76: 1f 29 or r17, r15
#ifdef RAMPZ
// Transfer top bit to RAMPZ
RAMPZ = (newAddress & 0x8000) ? 1 : 0;
#endif
newAddress += newAddress; // Convert from word address to byte address
78: 00 0f add r16, r16
7a: 11 1f adc r17, r17
7c: a3 c0 rjmp .+326 ; 0x1c4 <__SREG__+0x185>
1d78: 00 0f add r16, r16
1d7a: 11 1f adc r17, r17
1d7c: a3 c0 rjmp .+326 ; 0x1ec4 <main+0x1c4>
address = newAddress;
verifySpace();
}
else if(ch == STK_UNIVERSAL) {
7e: 86 35 cpi r24, 0x56 ; 86
80: 21 f4 brne .+8 ; 0x8a <__SREG__+0x4b>
1d7e: 86 35 cpi r24, 0x56 ; 86
1d80: 21 f4 brne .+8 ; 0x1d8a <main+0x8a>
// UNIVERSAL command is ignored
getNch(4);
82: 84 e0 ldi r24, 0x04 ; 4
84: d2 d0 rcall .+420 ; 0x22a <getNch>
1d82: 84 e0 ldi r24, 0x04 ; 4
1d84: d2 d0 rcall .+420 ; 0x1f2a <getNch>
putch(0x00);
86: 80 e0 ldi r24, 0x00 ; 0
88: 97 c0 rjmp .+302 ; 0x1b8 <__SREG__+0x179>
1d86: 80 e0 ldi r24, 0x00 ; 0
1d88: 97 c0 rjmp .+302 ; 0x1eb8 <main+0x1b8>
}
/* Write memory, length is big endian and is in bytes */
else if(ch == STK_PROG_PAGE) {
8a: 84 36 cpi r24, 0x64 ; 100
8c: 09 f0 breq .+2 ; 0x90 <__SREG__+0x51>
8e: 60 c0 rjmp .+192 ; 0x150 <__SREG__+0x111>
1d8a: 84 36 cpi r24, 0x64 ; 100
1d8c: 09 f0 breq .+2 ; 0x1d90 <main+0x90>
1d8e: 60 c0 rjmp .+192 ; 0x1e50 <main+0x150>
// PROGRAM PAGE - we support flash programming only, not EEPROM
uint8_t *bufPtr;
uint16_t addrPtr;
getch(); /* getlen() */
90: ac d0 rcall .+344 ; 0x1ea <getch>
1d90: ac d0 rcall .+344 ; 0x1eea <getch>
length = getch();
92: ab d0 rcall .+342 ; 0x1ea <getch>
94: f8 2e mov r15, r24
1d92: ab d0 rcall .+342 ; 0x1eea <getch>
1d94: f8 2e mov r15, r24
getch();
96: a9 d0 rcall .+338 ; 0x1ea <getch>
98: c0 e0 ldi r28, 0x00 ; 0
9a: d1 e0 ldi r29, 0x01 ; 1
1d96: a9 d0 rcall .+338 ; 0x1eea <getch>
1d98: c0 e0 ldi r28, 0x00 ; 0
1d9a: d1 e0 ldi r29, 0x01 ; 1
// If we are in RWW section, immediately start page erase
if (address < NRWWSTART) __boot_page_erase_short((uint16_t)(void*)address);
// While that is going on, read in page contents
bufPtr = buff;
do *bufPtr++ = getch();
9c: a6 d0 rcall .+332 ; 0x1ea <getch>
9e: 89 93 st Y+, r24
1d9c: a6 d0 rcall .+332 ; 0x1eea <getch>
1d9e: 89 93 st Y+, r24
while (--length);
a0: fc 16 cp r15, r28
a2: e1 f7 brne .-8 ; 0x9c <__SREG__+0x5d>
1da0: fc 16 cp r15, r28
1da2: e1 f7 brne .-8 ; 0x1d9c <main+0x9c>
// If we are in NRWW section, page erase has to be delayed until now.
// Todo: Take RAMPZ into account
if (address >= NRWWSTART) __boot_page_erase_short((uint16_t)(void*)address);
a4: 83 e0 ldi r24, 0x03 ; 3
a6: f8 01 movw r30, r16
a8: 87 bf out 0x37, r24 ; 55
aa: e8 95 spm
1da4: 83 e0 ldi r24, 0x03 ; 3
1da6: f8 01 movw r30, r16
1da8: 87 bf out 0x37, r24 ; 55
1daa: e8 95 spm
// Read command terminator, start reply
verifySpace();
ac: b6 d0 rcall .+364 ; 0x21a <verifySpace>
1dac: b6 d0 rcall .+364 ; 0x1f1a <verifySpace>
// If only a partial page is to be programmed, the erase might not be complete.
// So check that here
boot_spm_busy_wait();
ae: 07 b6 in r0, 0x37 ; 55
b0: 00 fc sbrc r0, 0
b2: fd cf rjmp .-6 ; 0xae <__SREG__+0x6f>
1dae: 07 b6 in r0, 0x37 ; 55
1db0: 00 fc sbrc r0, 0
1db2: fd cf rjmp .-6 ; 0x1dae <main+0xae>
#ifdef VIRTUAL_BOOT_PARTITION
if ((uint16_t)(void*)address == 0) {
b4: 01 15 cp r16, r1
b6: 11 05 cpc r17, r1
b8: 11 f0 breq .+4 ; 0xbe <__SREG__+0x7f>
ba: a8 01 movw r20, r16
bc: 2a c0 rjmp .+84 ; 0x112 <__SREG__+0xd3>
1db4: 01 15 cp r16, r1
1db6: 11 05 cpc r17, r1
1db8: 11 f0 breq .+4 ; 0x1dbe <main+0xbe>
1dba: a8 01 movw r20, r16
1dbc: 2a c0 rjmp .+84 ; 0x1e12 <main+0x112>
// This is the reset vector page. We need to live-patch the code so the
// bootloader runs.
//
// Move RESET vector to WDT vector
uint16_t vect = buff[0] | (buff[1]<<8);
be: 80 91 00 01 lds r24, 0x0100
c2: 20 91 01 01 lds r18, 0x0101
c6: 30 e0 ldi r19, 0x00 ; 0
c8: 32 2f mov r19, r18
ca: 22 27 eor r18, r18
cc: 90 e0 ldi r25, 0x00 ; 0
ce: 28 2b or r18, r24
d0: 39 2b or r19, r25
1dbe: 80 91 00 01 lds r24, 0x0100
1dc2: 20 91 01 01 lds r18, 0x0101
1dc6: 30 e0 ldi r19, 0x00 ; 0
1dc8: 32 2f mov r19, r18
1dca: 22 27 eor r18, r18
1dcc: 90 e0 ldi r25, 0x00 ; 0
1dce: 28 2b or r18, r24
1dd0: 39 2b or r19, r25
rstVect = vect;
d2: 30 93 85 01 sts 0x0185, r19
d6: 20 93 84 01 sts 0x0184, r18
1dd2: 30 93 85 01 sts 0x0185, r19
1dd6: 20 93 84 01 sts 0x0184, r18
wdtVect = buff[8] | (buff[9]<<8);
da: 40 91 08 01 lds r20, 0x0108
de: 80 91 09 01 lds r24, 0x0109
e2: 90 e0 ldi r25, 0x00 ; 0
e4: 98 2f mov r25, r24
e6: 88 27 eor r24, r24
e8: 50 e0 ldi r21, 0x00 ; 0
ea: 84 2b or r24, r20
ec: 95 2b or r25, r21
ee: 90 93 87 01 sts 0x0187, r25
f2: 80 93 86 01 sts 0x0186, r24
1dda: 40 91 08 01 lds r20, 0x0108
1dde: 80 91 09 01 lds r24, 0x0109
1de2: 90 e0 ldi r25, 0x00 ; 0
1de4: 98 2f mov r25, r24
1de6: 88 27 eor r24, r24
1de8: 50 e0 ldi r21, 0x00 ; 0
1dea: 84 2b or r24, r20
1dec: 95 2b or r25, r21
1dee: 90 93 87 01 sts 0x0187, r25
1df2: 80 93 86 01 sts 0x0186, r24
vect -= 4; // Instruction is a relative jump (rjmp), so recalculate.
f6: 24 50 subi r18, 0x04 ; 4
f8: 30 40 sbci r19, 0x00 ; 0
1df6: 24 50 subi r18, 0x04 ; 4
1df8: 30 40 sbci r19, 0x00 ; 0
buff[8] = vect & 0xff;
fa: 20 93 08 01 sts 0x0108, r18
1dfa: 20 93 08 01 sts 0x0108, r18
buff[9] = vect >> 8;
fe: 23 2f mov r18, r19
100: 33 27 eor r19, r19
102: 20 93 09 01 sts 0x0109, r18
1dfe: 23 2f mov r18, r19
1e00: 33 27 eor r19, r19
1e02: 20 93 09 01 sts 0x0109, r18
// Add jump to bootloader at RESET vector
buff[0] = 0x7f;
106: d0 92 00 01 sts 0x0100, r13
1e06: d0 92 00 01 sts 0x0100, r13
buff[1] = 0xce; // rjmp 0x1d00 instruction
10a: c0 92 01 01 sts 0x0101, r12
10e: 40 e0 ldi r20, 0x00 ; 0
110: 50 e0 ldi r21, 0x00 ; 0
112: a0 e0 ldi r26, 0x00 ; 0
114: b1 e0 ldi r27, 0x01 ; 1
1e0a: c0 92 01 01 sts 0x0101, r12
1e0e: 40 e0 ldi r20, 0x00 ; 0
1e10: 50 e0 ldi r21, 0x00 ; 0
1e12: a0 e0 ldi r26, 0x00 ; 0
1e14: b1 e0 ldi r27, 0x01 ; 1
bufPtr = buff;
addrPtr = (uint16_t)(void*)address;
ch = SPM_PAGESIZE / 2;
do {
uint16_t a;
a = *bufPtr++;
116: 2c 91 ld r18, X
118: 30 e0 ldi r19, 0x00 ; 0
1e16: 2c 91 ld r18, X
1e18: 30 e0 ldi r19, 0x00 ; 0
a |= (*bufPtr++) << 8;
11a: 11 96 adiw r26, 0x01 ; 1
11c: 8c 91 ld r24, X
11e: 11 97 sbiw r26, 0x01 ; 1
120: 90 e0 ldi r25, 0x00 ; 0
122: 98 2f mov r25, r24
124: 88 27 eor r24, r24
126: 82 2b or r24, r18
128: 93 2b or r25, r19
1e1a: 11 96 adiw r26, 0x01 ; 1
1e1c: 8c 91 ld r24, X
1e1e: 11 97 sbiw r26, 0x01 ; 1
1e20: 90 e0 ldi r25, 0x00 ; 0
1e22: 98 2f mov r25, r24
1e24: 88 27 eor r24, r24
1e26: 82 2b or r24, r18
1e28: 93 2b or r25, r19
#define rstVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+4))
#define wdtVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+6))
#endif
/* main program starts here */
int main(void) {
12a: 12 96 adiw r26, 0x02 ; 2
1e2a: 12 96 adiw r26, 0x02 ; 2
ch = SPM_PAGESIZE / 2;
do {
uint16_t a;
a = *bufPtr++;
a |= (*bufPtr++) << 8;
__boot_page_fill_short((uint16_t)(void*)addrPtr,a);
12c: fa 01 movw r30, r20
12e: 0c 01 movw r0, r24
130: b7 be out 0x37, r11 ; 55
132: e8 95 spm
134: 11 24 eor r1, r1
1e2c: fa 01 movw r30, r20
1e2e: 0c 01 movw r0, r24
1e30: b7 be out 0x37, r11 ; 55
1e32: e8 95 spm
1e34: 11 24 eor r1, r1
addrPtr += 2;
136: 4e 5f subi r20, 0xFE ; 254
138: 5f 4f sbci r21, 0xFF ; 255
1e36: 4e 5f subi r20, 0xFE ; 254
1e38: 5f 4f sbci r21, 0xFF ; 255
} while (--ch);
13a: f1 e0 ldi r31, 0x01 ; 1
13c: a0 34 cpi r26, 0x40 ; 64
13e: bf 07 cpc r27, r31
140: 51 f7 brne .-44 ; 0x116 <__SREG__+0xd7>
1e3a: f1 e0 ldi r31, 0x01 ; 1
1e3c: a0 34 cpi r26, 0x40 ; 64
1e3e: bf 07 cpc r27, r31
1e40: 51 f7 brne .-44 ; 0x1e16 <main+0x116>
// Write from programming buffer
__boot_page_write_short((uint16_t)(void*)address);
142: f8 01 movw r30, r16
144: a7 be out 0x37, r10 ; 55
146: e8 95 spm
1e42: f8 01 movw r30, r16
1e44: a7 be out 0x37, r10 ; 55
1e46: e8 95 spm
boot_spm_busy_wait();
148: 07 b6 in r0, 0x37 ; 55
14a: 00 fc sbrc r0, 0
14c: fd cf rjmp .-6 ; 0x148 <__SREG__+0x109>
14e: 3b c0 rjmp .+118 ; 0x1c6 <__SREG__+0x187>
1e48: 07 b6 in r0, 0x37 ; 55
1e4a: 00 fc sbrc r0, 0
1e4c: fd cf rjmp .-6 ; 0x1e48 <main+0x148>
1e4e: 3b c0 rjmp .+118 ; 0x1ec6 <main+0x1c6>
boot_rww_enable();
#endif
}
/* Read memory block mode, length is big endian. */
else if(ch == STK_READ_PAGE) {
150: 84 37 cpi r24, 0x74 ; 116
152: 51 f5 brne .+84 ; 0x1a8 <__SREG__+0x169>
1e50: 84 37 cpi r24, 0x74 ; 116
1e52: 51 f5 brne .+84 ; 0x1ea8 <main+0x1a8>
// READ PAGE - we only read flash
getch(); /* getlen() */
154: 4a d0 rcall .+148 ; 0x1ea <getch>
1e54: 4a d0 rcall .+148 ; 0x1eea <getch>
length = getch();
156: 49 d0 rcall .+146 ; 0x1ea <getch>
158: f8 2e mov r15, r24
1e56: 49 d0 rcall .+146 ; 0x1eea <getch>
1e58: f8 2e mov r15, r24
getch();
15a: 47 d0 rcall .+142 ; 0x1ea <getch>
1e5a: 47 d0 rcall .+142 ; 0x1eea <getch>
verifySpace();
15c: 5e d0 rcall .+188 ; 0x21a <verifySpace>
15e: e8 01 movw r28, r16
160: ef 2c mov r14, r15
1e5c: 5e d0 rcall .+188 ; 0x1f1a <verifySpace>
1e5e: e8 01 movw r28, r16
1e60: ef 2c mov r14, r15
#ifdef VIRTUAL_BOOT_PARTITION
do {
// Undo vector patch in bottom page so verify passes
if (address == 0) ch=rstVect & 0xff;
162: 20 97 sbiw r28, 0x00 ; 0
164: 19 f4 brne .+6 ; 0x16c <__SREG__+0x12d>
166: 80 91 84 01 lds r24, 0x0184
16a: 14 c0 rjmp .+40 ; 0x194 <__SREG__+0x155>
1e62: 20 97 sbiw r28, 0x00 ; 0
1e64: 19 f4 brne .+6 ; 0x1e6c <main+0x16c>
1e66: 80 91 84 01 lds r24, 0x0184
1e6a: 14 c0 rjmp .+40 ; 0x1e94 <main+0x194>
else if (address == 1) ch=rstVect >> 8;
16c: c1 30 cpi r28, 0x01 ; 1
16e: d1 05 cpc r29, r1
170: 19 f4 brne .+6 ; 0x178 <__SREG__+0x139>
172: 80 91 85 01 lds r24, 0x0185
176: 0e c0 rjmp .+28 ; 0x194 <__SREG__+0x155>
1e6c: c1 30 cpi r28, 0x01 ; 1
1e6e: d1 05 cpc r29, r1
1e70: 19 f4 brne .+6 ; 0x1e78 <main+0x178>
1e72: 80 91 85 01 lds r24, 0x0185
1e76: 0e c0 rjmp .+28 ; 0x1e94 <main+0x194>
else if (address == 8) ch=wdtVect & 0xff;
178: c8 30 cpi r28, 0x08 ; 8
17a: d1 05 cpc r29, r1
17c: 19 f4 brne .+6 ; 0x184 <__SREG__+0x145>
17e: 80 91 86 01 lds r24, 0x0186
182: 08 c0 rjmp .+16 ; 0x194 <__SREG__+0x155>
1e78: c8 30 cpi r28, 0x08 ; 8
1e7a: d1 05 cpc r29, r1
1e7c: 19 f4 brne .+6 ; 0x1e84 <main+0x184>
1e7e: 80 91 86 01 lds r24, 0x0186
1e82: 08 c0 rjmp .+16 ; 0x1e94 <main+0x194>
else if (address == 9) ch=wdtVect >> 8;
184: c9 30 cpi r28, 0x09 ; 9
186: d1 05 cpc r29, r1
188: 19 f4 brne .+6 ; 0x190 <__SREG__+0x151>
18a: 80 91 87 01 lds r24, 0x0187
18e: 02 c0 rjmp .+4 ; 0x194 <__SREG__+0x155>
1e84: c9 30 cpi r28, 0x09 ; 9
1e86: d1 05 cpc r29, r1
1e88: 19 f4 brne .+6 ; 0x1e90 <main+0x190>
1e8a: 80 91 87 01 lds r24, 0x0187
1e8e: 02 c0 rjmp .+4 ; 0x1e94 <main+0x194>
else ch = pgm_read_byte_near(address);
190: fe 01 movw r30, r28
192: 84 91 lpm r24, Z+
1e90: fe 01 movw r30, r28
1e92: 84 91 lpm r24, Z+
address++;
194: 21 96 adiw r28, 0x01 ; 1
1e94: 21 96 adiw r28, 0x01 ; 1
putch(ch);
196: 1a d0 rcall .+52 ; 0x1cc <putch>
1e96: 1a d0 rcall .+52 ; 0x1ecc <putch>
} while (--length);
198: ea 94 dec r14
19a: 19 f7 brne .-58 ; 0x162 <__SREG__+0x123>
1e98: ea 94 dec r14
1e9a: 19 f7 brne .-58 ; 0x1e62 <main+0x162>
#define rstVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+4))
#define wdtVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+6))
#endif
/* main program starts here */
int main(void) {
19c: 0f 5f subi r16, 0xFF ; 255
19e: 1f 4f sbci r17, 0xFF ; 255
1a0: fa 94 dec r15
1a2: 0f 0d add r16, r15
1a4: 11 1d adc r17, r1
1a6: 0f c0 rjmp .+30 ; 0x1c6 <__SREG__+0x187>
1e9c: 0f 5f subi r16, 0xFF ; 255
1e9e: 1f 4f sbci r17, 0xFF ; 255
1ea0: fa 94 dec r15
1ea2: 0f 0d add r16, r15
1ea4: 11 1d adc r17, r1
1ea6: 0f c0 rjmp .+30 ; 0x1ec6 <main+0x1c6>
#endif
#endif
}
/* Get device signature bytes */
else if(ch == STK_READ_SIGN) {
1a8: 85 37 cpi r24, 0x75 ; 117
1aa: 41 f4 brne .+16 ; 0x1bc <__SREG__+0x17d>
1ea8: 85 37 cpi r24, 0x75 ; 117
1eaa: 41 f4 brne .+16 ; 0x1ebc <main+0x1bc>
// READ SIGN - return what Avrdude wants to hear
verifySpace();
1ac: 36 d0 rcall .+108 ; 0x21a <verifySpace>
1eac: 36 d0 rcall .+108 ; 0x1f1a <verifySpace>
putch(SIGNATURE_0);
1ae: 8e e1 ldi r24, 0x1E ; 30
1b0: 0d d0 rcall .+26 ; 0x1cc <putch>
1eae: 8e e1 ldi r24, 0x1E ; 30
1eb0: 0d d0 rcall .+26 ; 0x1ecc <putch>
putch(SIGNATURE_1);
1b2: 83 e9 ldi r24, 0x93 ; 147
1b4: 0b d0 rcall .+22 ; 0x1cc <putch>
1eb2: 83 e9 ldi r24, 0x93 ; 147
1eb4: 0b d0 rcall .+22 ; 0x1ecc <putch>
putch(SIGNATURE_2);
1b6: 8c e0 ldi r24, 0x0C ; 12
1b8: 09 d0 rcall .+18 ; 0x1cc <putch>
1ba: 05 c0 rjmp .+10 ; 0x1c6 <__SREG__+0x187>
1eb6: 8c e0 ldi r24, 0x0C ; 12
1eb8: 09 d0 rcall .+18 ; 0x1ecc <putch>
1eba: 05 c0 rjmp .+10 ; 0x1ec6 <main+0x1c6>
}
else if (ch == 'Q') {
1bc: 81 35 cpi r24, 0x51 ; 81
1be: 11 f4 brne .+4 ; 0x1c4 <__SREG__+0x185>
1ebc: 81 35 cpi r24, 0x51 ; 81
1ebe: 11 f4 brne .+4 ; 0x1ec4 <main+0x1c4>
// Adaboot no-wait mod
watchdogConfig(WATCHDOG_16MS);
1c0: 88 e0 ldi r24, 0x08 ; 8
1c2: 27 d0 rcall .+78 ; 0x212 <watchdogConfig>
1ec0: 88 e0 ldi r24, 0x08 ; 8
1ec2: 27 d0 rcall .+78 ; 0x1f12 <watchdogConfig>
verifySpace();
}
else {
// This covers the response to commands like STK_ENTER_PROGMODE
verifySpace();
1c4: 2a d0 rcall .+84 ; 0x21a <verifySpace>
1ec4: 2a d0 rcall .+84 ; 0x1f1a <verifySpace>
}
putch(STK_OK);
1c6: 80 e1 ldi r24, 0x10 ; 16
1c8: 01 d0 rcall .+2 ; 0x1cc <putch>
1ca: 3a cf rjmp .-396 ; 0x40 <__SREG__+0x1>
1ec6: 80 e1 ldi r24, 0x10 ; 16
1ec8: 01 d0 rcall .+2 ; 0x1ecc <putch>
1eca: 3a cf rjmp .-396 ; 0x1d40 <main+0x40>
000001cc <putch>:
00001ecc <putch>:
void putch(char ch) {
#ifndef SOFT_UART
while (!(UCSR0A & _BV(UDRE0)));
UDR0 = ch;
#else
__asm__ __volatile__ (
1cc: 2a e0 ldi r18, 0x0A ; 10
1ce: 30 e0 ldi r19, 0x00 ; 0
1d0: 80 95 com r24
1d2: 08 94 sec
1d4: 10 f4 brcc .+4 ; 0x1da <putch+0xe>
1d6: da 98 cbi 0x1b, 2 ; 27
1d8: 02 c0 rjmp .+4 ; 0x1de <putch+0x12>
1da: da 9a sbi 0x1b, 2 ; 27
1dc: 00 00 nop
1de: 15 d0 rcall .+42 ; 0x20a <uartDelay>
1e0: 14 d0 rcall .+40 ; 0x20a <uartDelay>
1e2: 86 95 lsr r24
1e4: 2a 95 dec r18
1e6: b1 f7 brne .-20 ; 0x1d4 <putch+0x8>
1ecc: 2a e0 ldi r18, 0x0A ; 10
1ece: 30 e0 ldi r19, 0x00 ; 0
1ed0: 80 95 com r24
1ed2: 08 94 sec
1ed4: 10 f4 brcc .+4 ; 0x1eda <putch+0xe>
1ed6: da 98 cbi 0x1b, 2 ; 27
1ed8: 02 c0 rjmp .+4 ; 0x1ede <putch+0x12>
1eda: da 9a sbi 0x1b, 2 ; 27
1edc: 00 00 nop
1ede: 15 d0 rcall .+42 ; 0x1f0a <uartDelay>
1ee0: 14 d0 rcall .+40 ; 0x1f0a <uartDelay>
1ee2: 86 95 lsr r24
1ee4: 2a 95 dec r18
1ee6: b1 f7 brne .-20 ; 0x1ed4 <putch+0x8>
[uartBit] "I" (UART_TX_BIT)
:
"r25"
);
#endif
}
1e8: 08 95 ret
1ee8: 08 95 ret
000001ea <getch>:
00001eea <getch>:
}
#endif
// Watchdog functions. These are only safe with interrupts turned off.
void watchdogReset() {
__asm__ __volatile__ (
1ea: a8 95 wdr
1eea: a8 95 wdr
LED_PIN |= _BV(LED);
#endif
#endif
return ch;
}
1ec: 29 e0 ldi r18, 0x09 ; 9
1ee: 30 e0 ldi r19, 0x00 ; 0
1f0: cb 99 sbic 0x19, 3 ; 25
1f2: fe cf rjmp .-4 ; 0x1f0 <getch+0x6>
1f4: 0a d0 rcall .+20 ; 0x20a <uartDelay>
1f6: 09 d0 rcall .+18 ; 0x20a <uartDelay>
1f8: 08 d0 rcall .+16 ; 0x20a <uartDelay>
1fa: 88 94 clc
1fc: cb 99 sbic 0x19, 3 ; 25
1fe: 08 94 sec
200: 2a 95 dec r18
202: 11 f0 breq .+4 ; 0x208 <getch+0x1e>
204: 87 95 ror r24
206: f7 cf rjmp .-18 ; 0x1f6 <getch+0xc>
208: 08 95 ret
1eec: 29 e0 ldi r18, 0x09 ; 9
1eee: 30 e0 ldi r19, 0x00 ; 0
1ef0: cb 99 sbic 0x19, 3 ; 25
1ef2: fe cf rjmp .-4 ; 0x1ef0 <getch+0x6>
1ef4: 0a d0 rcall .+20 ; 0x1f0a <uartDelay>
1ef6: 09 d0 rcall .+18 ; 0x1f0a <uartDelay>
1ef8: 08 d0 rcall .+16 ; 0x1f0a <uartDelay>
1efa: 88 94 clc
1efc: cb 99 sbic 0x19, 3 ; 25
1efe: 08 94 sec
1f00: 2a 95 dec r18
1f02: 11 f0 breq .+4 ; 0x1f08 <optiboot_version+0xa>
1f04: 87 95 ror r24
1f06: f7 cf rjmp .-18 ; 0x1ef6 <getch+0xc>
1f08: 08 95 ret
0000020a <uartDelay>:
00001f0a <uartDelay>:
#if UART_B_VALUE > 255
#error Baud rate too slow for soft UART
#endif
void uartDelay() {
__asm__ __volatile__ (
20a: 9e e0 ldi r25, 0x0E ; 14
20c: 9a 95 dec r25
20e: f1 f7 brne .-4 ; 0x20c <uartDelay+0x2>
210: 08 95 ret
1f0a: 9e e0 ldi r25, 0x0E ; 14
1f0c: 9a 95 dec r25
1f0e: f1 f7 brne .-4 ; 0x1f0c <uartDelay+0x2>
1f10: 08 95 ret
00000212 <watchdogConfig>:
00001f12 <watchdogConfig>:
"wdr\n"
);
}
void watchdogConfig(uint8_t x) {
WDTCSR = _BV(WDCE) | _BV(WDE);
212: 98 e1 ldi r25, 0x18 ; 24
214: 91 bd out 0x21, r25 ; 33
1f12: 98 e1 ldi r25, 0x18 ; 24
1f14: 91 bd out 0x21, r25 ; 33
WDTCSR = x;
216: 81 bd out 0x21, r24 ; 33
1f16: 81 bd out 0x21, r24 ; 33
}
218: 08 95 ret
1f18: 08 95 ret
0000021a <verifySpace>:
00001f1a <verifySpace>:
do getch(); while (--count);
verifySpace();
}
void verifySpace() {
if (getch() != CRC_EOP) {
21a: e7 df rcall .-50 ; 0x1ea <getch>
21c: 80 32 cpi r24, 0x20 ; 32
21e: 19 f0 breq .+6 ; 0x226 <verifySpace+0xc>
1f1a: e7 df rcall .-50 ; 0x1eea <getch>
1f1c: 80 32 cpi r24, 0x20 ; 32
1f1e: 19 f0 breq .+6 ; 0x1f26 <verifySpace+0xc>
watchdogConfig(WATCHDOG_16MS); // shorten WD timeout
220: 88 e0 ldi r24, 0x08 ; 8
222: f7 df rcall .-18 ; 0x212 <watchdogConfig>
224: ff cf rjmp .-2 ; 0x224 <verifySpace+0xa>
1f20: 88 e0 ldi r24, 0x08 ; 8
1f22: f7 df rcall .-18 ; 0x1f12 <watchdogConfig>
1f24: ff cf rjmp .-2 ; 0x1f24 <verifySpace+0xa>
while (1) // and busy-loop so that WD causes
; // a reset and app start.
}
putch(STK_INSYNC);
226: 84 e1 ldi r24, 0x14 ; 20
1f26: 84 e1 ldi r24, 0x14 ; 20
}
228: d1 cf rjmp .-94 ; 0x1cc <putch>
1f28: d1 cf rjmp .-94 ; 0x1ecc <putch>
0000022a <getNch>:
00001f2a <getNch>:
::[count] "M" (UART_B_VALUE)
);
}
#endif
void getNch(uint8_t count) {
22a: 1f 93 push r17
22c: 18 2f mov r17, r24
1f2a: 1f 93 push r17
1f2c: 18 2f mov r17, r24
do getch(); while (--count);
22e: dd df rcall .-70 ; 0x1ea <getch>
230: 11 50 subi r17, 0x01 ; 1
232: e9 f7 brne .-6 ; 0x22e <getNch+0x4>
1f2e: dd df rcall .-70 ; 0x1eea <getch>
1f30: 11 50 subi r17, 0x01 ; 1
1f32: e9 f7 brne .-6 ; 0x1f2e <getNch+0x4>
verifySpace();
234: f2 df rcall .-28 ; 0x21a <verifySpace>
1f34: f2 df rcall .-28 ; 0x1f1a <verifySpace>
}
236: 1f 91 pop r17
238: 08 95 ret
1f36: 1f 91 pop r17
1f38: 08 95 ret
0000023a <appStart>:
00001f3a <appStart>:
WDTCSR = _BV(WDCE) | _BV(WDE);
WDTCSR = x;
}
void appStart() {
watchdogConfig(WATCHDOG_OFF);
23a: 80 e0 ldi r24, 0x00 ; 0
23c: ea df rcall .-44 ; 0x212 <watchdogConfig>
1f3a: 80 e0 ldi r24, 0x00 ; 0
1f3c: ea df rcall .-44 ; 0x1f12 <watchdogConfig>
__asm__ __volatile__ (
23e: e4 e0 ldi r30, 0x04 ; 4
240: ff 27 eor r31, r31
242: 09 94 ijmp
1f3e: e4 e0 ldi r30, 0x04 ; 4
1f40: ff 27 eor r31, r31
1f42: 09 94 ijmp

2
bootloaders/optiboot/optiboot_pro_16MHz.hex
View File

@ -28,6 +28,6 @@
:103FB000F1DF803219F088E0F5DFFFCF84E1E2CF56
:103FC0001F93182FE7DF1150E9F7F2DF1F910895D3
:0A3FD00080E0E8DFEE27FF270994E8
:023FFE000104BC
:023FFE000204BB
:0400000300003E00BB
:00000001FF

14
bootloaders/optiboot/optiboot_pro_16MHz.lst
View File

@ -11,19 +11,19 @@ Idx Name Size VMA LMA File off Algn
CONTENTS, READONLY, DEBUGGING
3 .debug_pubnames 0000005f 00000000 00000000 00000258 2**0
CONTENTS, READONLY, DEBUGGING
4 .debug_info 0000028c 00000000 00000000 000002b7 2**0
4 .debug_info 0000028d 00000000 00000000 000002b7 2**0
CONTENTS, READONLY, DEBUGGING
5 .debug_abbrev 00000199 00000000 00000000 00000543 2**0
5 .debug_abbrev 0000018a 00000000 00000000 00000544 2**0
CONTENTS, READONLY, DEBUGGING
6 .debug_line 00000456 00000000 00000000 000006dc 2**0
6 .debug_line 00000456 00000000 00000000 000006ce 2**0
CONTENTS, READONLY, DEBUGGING
7 .debug_frame 00000080 00000000 00000000 00000b34 2**2
7 .debug_frame 00000080 00000000 00000000 00000b24 2**2
CONTENTS, READONLY, DEBUGGING
8 .debug_str 00000149 00000000 00000000 00000bb4 2**0
8 .debug_str 00000149 00000000 00000000 00000ba4 2**0
CONTENTS, READONLY, DEBUGGING
9 .debug_loc 0000027e 00000000 00000000 00000cfd 2**0
9 .debug_loc 0000027e 00000000 00000000 00000ced 2**0
CONTENTS, READONLY, DEBUGGING
10 .debug_ranges 00000060 00000000 00000000 00000f7b 2**0
10 .debug_ranges 00000060 00000000 00000000 00000f6b 2**0
CONTENTS, READONLY, DEBUGGING
Disassembly of section .text:

2
bootloaders/optiboot/optiboot_pro_20mhz.hex
View File

@ -28,6 +28,6 @@
:103FB000F1DF803219F088E0F5DFFFCF84E1E2CF56
:103FC0001F93182FE7DF1150E9F7F2DF1F910895D3
:0A3FD00080E0E8DFEE27FF270994E8
:023FFE000104BC
:023FFE000204BB
:0400000300003E00BB
:00000001FF

14
bootloaders/optiboot/optiboot_pro_20mhz.lst
View File

@ -11,19 +11,19 @@ Idx Name Size VMA LMA File off Algn
CONTENTS, READONLY, DEBUGGING
3 .debug_pubnames 0000005f 00000000 00000000 00000258 2**0
CONTENTS, READONLY, DEBUGGING
4 .debug_info 0000028c 00000000 00000000 000002b7 2**0
4 .debug_info 0000028d 00000000 00000000 000002b7 2**0
CONTENTS, READONLY, DEBUGGING
5 .debug_abbrev 00000199 00000000 00000000 00000543 2**0
5 .debug_abbrev 0000018a 00000000 00000000 00000544 2**0
CONTENTS, READONLY, DEBUGGING
6 .debug_line 00000456 00000000 00000000 000006dc 2**0
6 .debug_line 00000456 00000000 00000000 000006ce 2**0
CONTENTS, READONLY, DEBUGGING
7 .debug_frame 00000080 00000000 00000000 00000b34 2**2
7 .debug_frame 00000080 00000000 00000000 00000b24 2**2
CONTENTS, READONLY, DEBUGGING
8 .debug_str 00000149 00000000 00000000 00000bb4 2**0
8 .debug_str 00000149 00000000 00000000 00000ba4 2**0
CONTENTS, READONLY, DEBUGGING
9 .debug_loc 0000027e 00000000 00000000 00000cfd 2**0
9 .debug_loc 0000027e 00000000 00000000 00000ced 2**0
CONTENTS, READONLY, DEBUGGING
10 .debug_ranges 00000060 00000000 00000000 00000f7b 2**0
10 .debug_ranges 00000060 00000000 00000000 00000f6b 2**0
CONTENTS, READONLY, DEBUGGING
Disassembly of section .text:

2
bootloaders/optiboot/optiboot_pro_8MHz.hex
View File

@ -28,6 +28,6 @@
:103FB000F1DF803219F088E0F5DFFFCF84E1E2CF56
:103FC0001F93182FE7DF1150E9F7F2DF1F910895D3
:0A3FD00080E0E8DFEE27FF270994E8
:023FFE000104BC
:023FFE000204BB
:0400000300003E00BB
:00000001FF

14
bootloaders/optiboot/optiboot_pro_8MHz.lst
View File

@ -11,19 +11,19 @@ Idx Name Size VMA LMA File off Algn
CONTENTS, READONLY, DEBUGGING
3 .debug_pubnames 0000005f 00000000 00000000 00000258 2**0
CONTENTS, READONLY, DEBUGGING
4 .debug_info 0000028c 00000000 00000000 000002b7 2**0
4 .debug_info 0000028d 00000000 00000000 000002b7 2**0
CONTENTS, READONLY, DEBUGGING
5 .debug_abbrev 00000199 00000000 00000000 00000543 2**0
5 .debug_abbrev 0000018a 00000000 00000000 00000544 2**0
CONTENTS, READONLY, DEBUGGING
6 .debug_line 00000456 00000000 00000000 000006dc 2**0
6 .debug_line 00000456 00000000 00000000 000006ce 2**0
CONTENTS, READONLY, DEBUGGING
7 .debug_frame 00000080 00000000 00000000 00000b34 2**2
7 .debug_frame 00000080 00000000 00000000 00000b24 2**2
CONTENTS, READONLY, DEBUGGING
8 .debug_str 00000149 00000000 00000000 00000bb4 2**0
8 .debug_str 00000149 00000000 00000000 00000ba4 2**0
CONTENTS, READONLY, DEBUGGING
9 .debug_loc 0000027e 00000000 00000000 00000cfd 2**0
9 .debug_loc 0000027e 00000000 00000000 00000ced 2**0
CONTENTS, READONLY, DEBUGGING
10 .debug_ranges 00000060 00000000 00000000 00000f7b 2**0
10 .debug_ranges 00000060 00000000 00000000 00000f6b 2**0
CONTENTS, READONLY, DEBUGGING
Disassembly of section .text: