Add missing definitions for MISO etc to F4 core
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@ -11,4 +11,10 @@
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#define portConfigRegister(pin) ( &(PIN_MAP[pin].gpio_device->regs->CRL) )
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static const uint8_t SS = BOARD_SPI1_NSS_PIN;
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static const uint8_t SS1 = BOARD_SPI2_NSS_PIN;
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static const uint8_t MOSI = BOARD_SPI1_MOSI_PIN;
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static const uint8_t MISO = BOARD_SPI1_MISO_PIN;
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static const uint8_t SCK = BOARD_SPI1_SCK_PIN;
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#endif /* _VARIANT_ARDUINO_STM32_ */
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