diff --git a/STM32F1/platform.txt b/STM32F1/platform.txt index f9979c9..0186933 100644 --- a/STM32F1/platform.txt +++ b/STM32F1/platform.txt @@ -57,13 +57,7 @@ compiler.ar.extra_flags= compiler.elf2hex.extra_flags= -##compiler.libsam.c.flags="-I{build.system.path}/libsam" "-I{build.system.path}/CMSIS/CMSIS/Include/" "-I{build.system.path}/CMSIS/Device/ATMEL/" - -##compiler.libs.c.flags="-I{build.system.path}/libmaple" "-I{build.system.path}/libmaple/include" "-I{build.system.path}/libmaple/stm32f1/include" "-I{build.system.path}/libmaple/stm32f1/include/series" "-I{build.system.path}/libmaple/usb/stm32f1" "-I{build.system.path}/libmaple/usb/usb_lib" -compiler.libs.c.flags="-I{build.system.path}/libmaple" "-I{build.system.path}/libmaple/include" "-I{build.system.path}/libmaple/stm32f1/include" "-I{build.system.path}/libmaple/usb/stm32f1" "-I{build.system.path}/libmaple/usb/usb_lib" - - - +compiler.libs.c.flags="-I{build.system.path}/libmaple/include" "-I{build.system.path}/libmaple/usb" "-I{build.system.path}/libmaple/usb/usb_lib" # USB Flags # --------- @@ -85,7 +79,6 @@ recipe.cpp.o.pattern="{compiler.path}{compiler.cpp.cmd}" {compiler.cpp.flags} -m ## Compile S files recipe.S.o.pattern="{compiler.path}{compiler.c.cmd}" {compiler.S.flags} -mcpu={build.mcu} -DF_CPU={build.f_cpu} -DARDUINO={runtime.ide.version} -DARDUINO_{build.board} -DARDUINO_ARCH_{build.arch} {compiler.S.extra_flags} {build.extra_flags} {build.cpu_flags} {build.hs_flag} {build.common_flags} {compiler.libs.c.flags} {includes} "{source_file}" -o "{object_file}" -#recipe.S.o.pattern="{compiler.path}{compiler.c.cmd}" "{source_file}" -o "{object_file}" ## Create archives recipe.ar.pattern="{compiler.path}{compiler.ar.cmd}" {compiler.ar.flags} {compiler.ar.extra_flags} "{build.path}/{archive_file}" "{object_file}" @@ -102,8 +95,6 @@ recipe.objcopy.hex.pattern="{compiler.path}{compiler.elf2hex.cmd}" {compiler.elf ## Compute size recipe.size.pattern="{compiler.path}{compiler.size.cmd}" -A "{build.path}/{build.project_name}.elf" -#recipe.size.regex=\.text\s+([0-9]+).* -#recipe.size.regex=^(?:\.text|\.rodata|\.ARM.exidx)\s+([0-9]+).* recipe.size.regex=^(?:\.text|\.data|\.rodata|\.text.align|\.ARM.exidx)\s+([0-9]+).* recipe.size.regex.data=^(?:\.data|\.bss|\.noinit)\s+([0-9]+).* diff --git a/STM32F1/system/Makefile b/STM32F1/system/Makefile deleted file mode 100644 index 0c6dfc0..0000000 --- a/STM32F1/system/Makefile +++ /dev/null @@ -1,204 +0,0 @@ -# Try "make help" first - -.DEFAULT_GOAL := sketch - -## -## Useful paths, constants, etc. -## - -ifeq ($(LIB_MAPLE_HOME),) -SRCROOT := . -else -SRCROOT := $(LIB_MAPLE_HOME) -endif - -BUILD_PATH = build -LIBMAPLE_PATH := $(SRCROOT)/libmaple -WIRISH_PATH := $(SRCROOT)/wirish -SUPPORT_PATH := $(SRCROOT)/support -LIBRARIES_PATH := $(SRCROOT)/libraries -# Support files for linker -LDDIR := $(SUPPORT_PATH)/ld -# Support files for this Makefile -MAKEDIR := $(SUPPORT_PATH)/make -BOARD_INCLUDE_DIR := $(MAKEDIR)/board-includes - -## -## Target-specific configuration. This determines some compiler and -## linker options/flags. -## - -# Try "make help" for more information on BOARD and MEMORY_TARGET; -# these default to a Maple Flash build. -BOARD ?= maple -MEMORY_TARGET ?= flash - -# Chooses the bootloader, available: maple and robotis -BOOTLOADER ?= maple - -# This is the serial port used by robotis bootloader -ROBOTIS_PORT ?= /dev/ttyACM0 - -# $(BOARD)- and $(MEMORY_TARGET)-specific configuration -include $(MAKEDIR)/target-config.mk - -## -## Build rules and useful templates -## - -include $(MAKEDIR)/build-rules.mk -include $(MAKEDIR)/build-templates.mk - -## -## Compilation flags -## - -# FIXME: the following allows for deprecated include style, e.g.: -# #include "libmaple.h" -# or -# #include "wirish.h" -# It slows compilation noticeably; remove after 1 release. -TARGET_FLAGS += -I$(LIBMAPLE_PATH)/include/libmaple \ - -I$(WIRISH_PATH)/include/wirish -TARGET_FLAGS += -I$(LIBRARIES_PATH) # for internal lib. includes, e.g. -GLOBAL_CFLAGS := -Os -g3 -gdwarf-2 -nostdlib \ - -ffunction-sections -fdata-sections \ - -Wl,--gc-sections $(TARGET_FLAGS) \ - -DBOOTLOADER_$(BOOTLOADER) -GLOBAL_CXXFLAGS := -fno-rtti -fno-exceptions -Wall $(TARGET_FLAGS) -GLOBAL_ASFLAGS := -x assembler-with-cpp $(TARGET_FLAGS) -LDFLAGS = $(TARGET_LDFLAGS) $(TOOLCHAIN_LDFLAGS) -mcpu=cortex-m3 -mthumb \ - -Xlinker --gc-sections \ - -Xassembler --march=armv7-m -Wall -# -Xlinker --print-gc-sections \ - -## -## Set all submodules here -## - -LIBMAPLE_MODULES += $(SRCROOT)/libmaple -LIBMAPLE_MODULES += $(SRCROOT)/libmaple/usb # The USB module is kept separate -LIBMAPLE_MODULES += $(LIBMAPLE_MODULE_SERIES) # STM32 series submodule in libmaple -## LIBMAPLE_MODULES += $(SRCROOT)/wirish - -# Official libraries: -##LIBMAPLE_MODULES += $(SRCROOT)/libraries/Servo -##LIBMAPLE_MODULES += $(SRCROOT)/libraries/LiquidCrystal -##LIBMAPLE_MODULES += $(SRCROOT)/libraries/Wire -# Experimental libraries: -##LIBMAPLE_MODULES += $(SRCROOT)/libraries/FreeRTOS - -# User modules: -ifneq ($(USER_MODULES),) -LIBMAPLE_MODULES += $(USER_MODULES) -endif - -# Call each module's rules.mk: -$(foreach m,$(LIBMAPLE_MODULES),$(eval $(call LIBMAPLE_MODULE_template,$(m)))) - -## -## Targets -## - -# main target -include $(SRCROOT)/build-targets.mk - -.PHONY: install sketch clean help cscope tags ctags ram flash jtag doxygen mrproper list-boards - -# Target upload commands -# USB ID for DFU upload -- FIXME: do something smarter with this -BOARD_USB_VENDOR_ID := 1EAF -BOARD_USB_PRODUCT_ID := 0003 - -ifeq ($(BOOTLOADER),maple) -UPLOAD_ram := $(SUPPORT_PATH)/scripts/reset.py && \ - sleep 1 && \ - $(DFU) -a0 -d $(BOARD_USB_VENDOR_ID):$(BOARD_USB_PRODUCT_ID) -D $(BUILD_PATH)/$(BOARD).bin -R -UPLOAD_flash := $(SUPPORT_PATH)/scripts/reset.py && \ - sleep 1 && \ - $(DFU) -a1 -d $(BOARD_USB_VENDOR_ID):$(BOARD_USB_PRODUCT_ID) -D $(BUILD_PATH)/$(BOARD).bin -R -endif - -ifeq ($(BOOTLOADER),robotis) -UPLOAD_flash := $(SUPPORT_PATH)/scripts/robotis-loader.py $(ROBOTIS_PORT) $(BUILD_PATH)/$(BOARD).bin -endif - -# Conditionally upload to whatever the last build was -install: INSTALL_TARGET = $(shell cat $(BUILD_PATH)/build-type 2>/dev/null) -install: $(BUILD_PATH)/$(BOARD).bin - @echo "Install target:" $(INSTALL_TARGET) - $(UPLOAD_$(INSTALL_TARGET)) - -# Force a rebuild if the target changed -PREV_BUILD_TYPE = $(shell cat $(BUILD_PATH)/build-type 2>/dev/null) -build-check: -ifneq ($(PREV_BUILD_TYPE), $(MEMORY_TARGET)) - $(shell rm -rf $(BUILD_PATH)) -endif - -sketch: build-check MSG_INFO $(BUILD_PATH)/$(BOARD).bin - -clean: - rm -rf build - -mrproper: clean - rm -rf doxygen - -help: - @echo "" - @echo "Basic usage (BOARD defaults to maple):" - @echo " $$ cp your-main.cpp main.cpp" - @echo " $$ make BOARD=your_board" - @echo " $$ make BOARD=your_board install" - @echo "" - @echo "(Multiple source files? Link with libmaple.a (\`$$ make library')" - @echo "or hack build-targets.mk appropriately.)" - @echo "" - @echo "Important targets:" - @echo " sketch: Compile for BOARD to MEMORY_TARGET (default)." - @echo " install: Compile and upload over USB using Maple bootloader" - @echo "" - @echo "You *must* set BOARD if not compiling for Maple (e.g." - @echo "use BOARD=maple_mini for mini, etc.), and MEMORY_TARGET" - @echo "if not compiling to Flash. Run \`$$ make list-boards' for" - @echo "a list of all boards." - @echo "" - @echo "Valid MEMORY_TARGETs (default=flash):" - @echo " ram: Compile to RAM (doesn't touch Flash)" - @echo " flash: Compile to Flash (for Maple bootloader)" - @echo " jtag: Compile for JTAG/SWD upload (overwrites bootloader)" - @echo "" - @echo "Other targets:" - @echo " clean: Remove all build and object files" - @echo " doxygen: Build Doxygen HTML and XML documentation" - @echo " help: Show this message" - @echo " mrproper: Remove all generated files" - @echo "" - -cscope: - rm -rf cscope.* - find . -name '*.[hcS]' -o -name '*.cpp' | xargs cscope -b - -tags: - etags `find . -name "*.c" -o -name "*.cpp" -o -name "*.h"` - @echo "Made TAGS file for EMACS code browsing" - -ctags: - ctags-exuberant -R . - @echo "Made tags file for VIM code browsing" - -ram: - @$(MAKE) MEMORY_TARGET=ram --no-print-directory sketch - -flash: - @$(MAKE) MEMORY_TARGET=flash --no-print-directory sketch - -jtag: - @$(MAKE) MEMORY_TARGET=jtag --no-print-directory sketch - -doxygen: - doxygen $(SUPPORT_PATH)/doxygen/Doxyfile - -# This output is kind of ugly, but I don't understand make very well. -list-boards: - @echo " $(addsuffix "\\n",$(basename $(notdir $(wildcard $(BOARD_INCLUDE_DIR)/*.mk))))" diff --git a/STM32F1/system/build-targets.mk b/STM32F1/system/build-targets.mk deleted file mode 100644 index aaff2d0..0000000 --- a/STM32F1/system/build-targets.mk +++ /dev/null @@ -1,42 +0,0 @@ -# main project target -$(BUILD_PATH)/main.o: $(SRCROOT)/main.cpp - $(SILENT_CXX) $(CXX) $(CFLAGS) $(CXXFLAGS) $(LIBMAPLE_INCLUDES) $(WIRISH_INCLUDES) -o $@ -c $< - -$(BUILD_PATH)/libmaple.a: $(BUILDDIRS) $(TGT_BIN) - - rm -f $@ - $(AR) crv $(BUILD_PATH)/libmaple.a $(TGT_BIN) - -library: $(BUILD_PATH)/libmaple.a - -.PHONY: library - -$(BUILD_PATH)/$(BOARD).elf: $(BUILDDIRS) $(TGT_BIN) $(BUILD_PATH)/main.o - $(SILENT_LD) $(CXX) $(LDFLAGS) -o $@ $(TGT_BIN) $(BUILD_PATH)/main.o -Wl,-Map,$(BUILD_PATH)/$(BOARD).map - -$(BUILD_PATH)/$(BOARD).bin: $(BUILD_PATH)/$(BOARD).elf - $(SILENT_OBJCOPY) $(OBJCOPY) -v -Obinary $(BUILD_PATH)/$(BOARD).elf $@ 1>/dev/null - $(SILENT_DISAS) $(DISAS) -d $(BUILD_PATH)/$(BOARD).elf > $(BUILD_PATH)/$(BOARD).disas - @echo " " - @echo "Object file sizes:" - @find $(BUILD_PATH) -iname *.o | xargs $(SIZE) -t > $(BUILD_PATH)/$(BOARD).sizes - @cat $(BUILD_PATH)/$(BOARD).sizes - @echo " " - @echo "Final Size:" - @$(SIZE) $< - @echo $(MEMORY_TARGET) > $(BUILD_PATH)/build-type - -$(BUILDDIRS): - @mkdir -p $@ - -MSG_INFO: - @echo "================================================================================" - @echo "" - @echo " Build info:" - @echo " BOARD: " $(BOARD) - @echo " MCU: " $(MCU) - @echo " MEMORY_TARGET: " $(MEMORY_TARGET) - @echo "" - @echo " See 'make help' for all possible targets" - @echo "" - @echo "================================================================================" - @echo "" diff --git a/STM32F1/system/libmaple/stm32f1/include/series/adc.h b/STM32F1/system/libmaple/adc.h similarity index 100% rename from STM32F1/system/libmaple/stm32f1/include/series/adc.h rename to STM32F1/system/libmaple/adc.h diff --git a/STM32F1/system/libmaple/stm32f1/include/series/dac.h b/STM32F1/system/libmaple/dac.h similarity index 100% rename from STM32F1/system/libmaple/stm32f1/include/series/dac.h rename to STM32F1/system/libmaple/dac.h diff --git a/STM32F1/system/libmaple/stm32f1/include/series/dma.h b/STM32F1/system/libmaple/dma.h similarity index 99% rename from STM32F1/system/libmaple/stm32f1/include/series/dma.h rename to STM32F1/system/libmaple/dma.h index bedb602..58caf2f 100644 --- a/STM32F1/system/libmaple/stm32f1/include/series/dma.h +++ b/STM32F1/system/libmaple/dma.h @@ -26,7 +26,7 @@ *****************************************************************************/ /** - * @file libmaple/stm32f1/include/series/dma.h + * @file libmaple/dma.h * @author Marti Bolivar ; * Original implementation by Michael Hope * @brief STM32F1 DMA series header. diff --git a/STM32F1/system/libmaple/stm32f1/include/series/exti.h b/STM32F1/system/libmaple/exti.h similarity index 100% rename from STM32F1/system/libmaple/stm32f1/include/series/exti.h rename to STM32F1/system/libmaple/exti.h diff --git a/STM32F1/system/libmaple/stm32f1/include/series/flash.h b/STM32F1/system/libmaple/flash.h similarity index 100% rename from STM32F1/system/libmaple/stm32f1/include/series/flash.h rename to STM32F1/system/libmaple/flash.h diff --git a/STM32F1/system/libmaple/stm32f1/include/series/gpio.h b/STM32F1/system/libmaple/gpio.h similarity index 100% rename from STM32F1/system/libmaple/stm32f1/include/series/gpio.h rename to STM32F1/system/libmaple/gpio.h diff --git a/STM32F1/system/libmaple/stm32f1/include/series/i2c.h b/STM32F1/system/libmaple/i2c.h similarity index 100% rename from STM32F1/system/libmaple/stm32f1/include/series/i2c.h rename to STM32F1/system/libmaple/i2c.h diff --git a/STM32F1/system/libmaple/include/libmaple/adc.h b/STM32F1/system/libmaple/include/libmaple/adc.h deleted file mode 100644 index 4c6a253..0000000 --- a/STM32F1/system/libmaple/include/libmaple/adc.h +++ /dev/null @@ -1,332 +0,0 @@ -/****************************************************************************** - * The MIT License - * - * Copyright (c) 2012 LeafLabs, LLC. - * Copyright (c) 2010 Perry Hung. - * - * Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, copy, - * modify, merge, publish, distribute, sublicense, and/or sell copies - * of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS - * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN - * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - *****************************************************************************/ - -/** - * @file libmaple/include/libmaple/adc.h - * @author Marti Bolivar , - * Perry Hung - * @brief Analog-to-Digital Conversion (ADC) header. - */ - -#ifndef _LIBMAPLE_ADC_H_ -#define _LIBMAPLE_ADC_H_ - -#ifdef __cplusplus -extern "C"{ -#endif - -#include -#include -#include -/* We include the series header below, after defining the register map - * and device structs. */ - -/* - * Register map - */ - -/** ADC register map type. */ -typedef struct adc_reg_map { - __io uint32 SR; ///< Status register - __io uint32 CR1; ///< Control register 1 - __io uint32 CR2; ///< Control register 2 - __io uint32 SMPR1; ///< Sample time register 1 - __io uint32 SMPR2; ///< Sample time register 2 - __io uint32 JOFR1; ///< Injected channel data offset register 1 - __io uint32 JOFR2; ///< Injected channel data offset register 2 - __io uint32 JOFR3; ///< Injected channel data offset register 3 - __io uint32 JOFR4; ///< Injected channel data offset register 4 - __io uint32 HTR; ///< Watchdog high threshold register - __io uint32 LTR; ///< Watchdog low threshold register - __io uint32 SQR1; ///< Regular sequence register 1 - __io uint32 SQR2; ///< Regular sequence register 2 - __io uint32 SQR3; ///< Regular sequence register 3 - __io uint32 JSQR; ///< Injected sequence register - __io uint32 JDR1; ///< Injected data register 1 - __io uint32 JDR2; ///< Injected data register 2 - __io uint32 JDR3; ///< Injected data register 3 - __io uint32 JDR4; ///< Injected data register 4 - __io uint32 DR; ///< Regular data register -} adc_reg_map; - -/** ADC device type. */ -typedef struct adc_dev { - adc_reg_map *regs; /**< Register map */ - rcc_clk_id clk_id; /**< RCC clock information */ -} adc_dev; - -/* Pull in the series header (which may need the above struct - * definitions). - * - * IMPORTANT: The series header must define the following: - * - * - enum adc_extsel_event (and typedef to adc_extsel_event): One per - * external event used to trigger start of conversion of a regular - * group. If two different series support the same event as a - * trigger, they must use the same token for the enumerator for that - * event. (The value of the enumerator is of course allowed to be - * different). - * - * - enum adc_smp_rate (and typedef to adc_smp_rate): One per - * available sampling time. These must be in the form ADC_SMPR_X_Y - * for X.Y cycles (e.g. ADC_SMPR_1_5 means 1.5 cycles), or - * ADC_SMPR_X for X cycles (e.g. ADC_SMPR_3 means 3 cycles). - * - * - enum adc_prescaler (and typedef): One per available prescaler, - * suitable for adc_set_prescaler. Series which have the same - * prescaler dividers (e.g. STM32F1 and STM32F2 both divide PCLK2 by - * 2, 4, 6, or 8) must provide the same tokens as enumerators, for - * portability. - */ - - /* Roger clark. Replaced with line below #include */ -#include "stm32f1/include/series/adc.h" - - -/* - * Register bit definitions - */ - -/* Status register */ - -#define ADC_SR_AWD_BIT 0 -#define ADC_SR_EOC_BIT 1 -#define ADC_SR_JEOC_BIT 2 -#define ADC_SR_JSTRT_BIT 3 -#define ADC_SR_STRT_BIT 4 - -#define ADC_SR_AWD BIT(ADC_SR_AWD_BIT) -#define ADC_SR_EOC BIT(ADC_SR_EOC_BIT) -#define ADC_SR_JEOC BIT(ADC_SR_JEOC_BIT) -#define ADC_SR_JSTRT BIT(ADC_SR_JSTRT_BIT) -#define ADC_SR_STRT BIT(ADC_SR_STRT_BIT) - -/* Control register 1 */ - -#define ADC_CR1_EOCIE_BIT 5 -#define ADC_CR1_AWDIE_BIT 6 -#define ADC_CR1_JEOCIE_BIT 7 -#define ADC_CR1_SCAN_BIT 8 -#define ADC_CR1_AWDSGL_BIT 9 -#define ADC_CR1_JAUTO_BIT 10 -#define ADC_CR1_DISCEN_BIT 11 -#define ADC_CR1_JDISCEN_BIT 12 -#define ADC_CR1_JAWDEN_BIT 22 -#define ADC_CR1_AWDEN_BIT 23 - -#define ADC_CR1_AWDCH (0x1F) -#define ADC_CR1_EOCIE BIT(ADC_CR1_EOCIE_BIT) -#define ADC_CR1_AWDIE BIT(ADC_CR1_AWDIE_BIT) -#define ADC_CR1_JEOCIE BIT(ADC_CR1_JEOCIE_BIT) -#define ADC_CR1_SCAN BIT(ADC_CR1_SCAN_BIT) -#define ADC_CR1_AWDSGL BIT(ADC_CR1_AWDSGL_BIT) -#define ADC_CR1_JAUTO BIT(ADC_CR1_JAUTO_BIT) -#define ADC_CR1_DISCEN BIT(ADC_CR1_DISCEN_BIT) -#define ADC_CR1_JDISCEN BIT(ADC_CR1_JDISCEN_BIT) -#define ADC_CR1_DISCNUM (0xE000) -#define ADC_CR1_JAWDEN BIT(ADC_CR1_JAWDEN_BIT) -#define ADC_CR1_AWDEN BIT(ADC_CR1_AWDEN_BIT) - -/* Control register 2 */ - -/* Because this register varies significantly by series (e.g. some - * bits moved and others disappeared in the F1->F2 transition), its - * definitions are in the series headers. */ - -/* Sample time register 1 */ - -#define ADC_SMPR1_SMP17 (0x7 << 21) -#define ADC_SMPR1_SMP16 (0x7 << 18) -#define ADC_SMPR1_SMP15 (0x7 << 15) -#define ADC_SMPR1_SMP14 (0x7 << 12) -#define ADC_SMPR1_SMP13 (0x7 << 9) -#define ADC_SMPR1_SMP12 (0x7 << 6) -#define ADC_SMPR1_SMP11 (0x7 << 3) -#define ADC_SMPR1_SMP10 0x7 - -/* Sample time register 2 */ - -#define ADC_SMPR2_SMP9 (0x7 << 27) -#define ADC_SMPR2_SMP8 (0x7 << 24) -#define ADC_SMPR2_SMP7 (0x7 << 21) -#define ADC_SMPR2_SMP6 (0x7 << 18) -#define ADC_SMPR2_SMP5 (0x7 << 15) -#define ADC_SMPR2_SMP4 (0x7 << 12) -#define ADC_SMPR2_SMP3 (0x7 << 9) -#define ADC_SMPR2_SMP2 (0x7 << 6) -#define ADC_SMPR2_SMP1 (0x7 << 3) -#define ADC_SMPR2_SMP0 0x7 - -/* Injected channel data offset register */ - -#define ADC_JOFR_JOFFSET 0x3FF - -/* Watchdog high threshold register */ - -#define ADC_HTR_HT 0x3FF - -/* Watchdog low threshold register */ - -#define ADC_LTR_LT 0x3FF - -/* Regular sequence register 1 */ - -#define ADC_SQR1_L (0x1F << 20) -#define ADC_SQR1_SQ16 (0x1F << 15) -#define ADC_SQR1_SQ15 (0x1F << 10) -#define ADC_SQR1_SQ14 (0x1F << 5) -#define ADC_SQR1_SQ13 0x1F - -/* Regular sequence register 2 */ - -#define ADC_SQR2_SQ12 (0x1F << 25) -#define ADC_SQR2_SQ11 (0x1F << 20) -#define ADC_SQR2_SQ10 (0x1F << 16) -#define ADC_SQR2_SQ9 (0x1F << 10) -#define ADC_SQR2_SQ8 (0x1F << 5) -#define ADC_SQR2_SQ7 0x1F - -/* Regular sequence register 3 */ - -#define ADC_SQR3_SQ6 (0x1F << 25) -#define ADC_SQR3_SQ5 (0x1F << 20) -#define ADC_SQR3_SQ4 (0x1F << 16) -#define ADC_SQR3_SQ3 (0x1F << 10) -#define ADC_SQR3_SQ2 (0x1F << 5) -#define ADC_SQR3_SQ1 0x1F - -/* Injected sequence register */ - -#define ADC_JSQR_JL (0x3 << 20) -#define ADC_JSQR_JL_1CONV (0x0 << 20) -#define ADC_JSQR_JL_2CONV (0x1 << 20) -#define ADC_JSQR_JL_3CONV (0x2 << 20) -#define ADC_JSQR_JL_4CONV (0x3 << 20) -#define ADC_JSQR_JSQ4 (0x1F << 15) -#define ADC_JSQR_JSQ3 (0x1F << 10) -#define ADC_JSQR_JSQ2 (0x1F << 5) -#define ADC_JSQR_JSQ1 0x1F - -/* Injected data registers */ - -#define ADC_JDR_JDATA 0xFFFF - -/* Regular data register */ - -#define ADC_DR_ADC2DATA (0xFFFF << 16) -#define ADC_DR_DATA 0xFFFF - -/* - * Routines - */ - -void adc_init(const adc_dev *dev); -void adc_set_extsel(const adc_dev *dev, adc_extsel_event event); -void adc_set_sample_rate(const adc_dev *dev, adc_smp_rate smp_rate); -uint16 adc_read(const adc_dev *dev, uint8 channel); - -/** - * @brief Set the ADC prescaler. - * - * This determines the ADC clock for all devices. - */ -extern void adc_set_prescaler(adc_prescaler pre); - -/** - * @brief Call a function on all ADC devices. - * @param fn Function to call on each ADC device. - */ -extern void adc_foreach(void (*fn)(const adc_dev*)); - -struct gpio_dev; -/** - * @brief Configure a GPIO pin for ADC conversion. - * @param dev ADC device to use for conversion (currently ignored on - * all targets). - * @param gdev GPIO device to configure. - * @param bit Bit on gdev to configure for ADC conversion. - */ -extern void adc_config_gpio(const struct adc_dev *dev, - struct gpio_dev *gdev, - uint8 bit); - -/** - * @brief Enable an ADC and configure it for single conversion mode. - * - * This function performs any initialization necessary to allow the - * ADC device to perform a single synchronous regular software - * triggered conversion, using adc_read(). - * - * @param dev Device to enable. - * @see adc_read() - */ -extern void adc_enable_single_swstart(const adc_dev* dev); - -/** - * @brief Set the regular channel sequence length. - * - * Defines the total number of conversions in the regular channel - * conversion sequence. - * - * @param dev ADC device. - * @param length Regular channel sequence length, from 1 to 16. - */ -static inline void adc_set_reg_seqlen(const adc_dev *dev, uint8 length) { - uint32 tmp = dev->regs->SQR1; - tmp &= ~ADC_SQR1_L; - tmp |= (length - 1) << 20; - dev->regs->SQR1 = tmp; -} - -/** - * @brief Enable an adc peripheral - * @param dev ADC device to enable - */ -static inline void adc_enable(const adc_dev *dev) { - *bb_perip(&dev->regs->CR2, ADC_CR2_ADON_BIT) = 1; -} - -/** - * @brief Disable an ADC peripheral - * @param dev ADC device to disable - */ -static inline void adc_disable(const adc_dev *dev) { - *bb_perip(&dev->regs->CR2, ADC_CR2_ADON_BIT) = 0; -} - -/** - * @brief Disable all ADC peripherals. - */ -static inline void adc_disable_all(void) { - adc_foreach(adc_disable); -} - -#ifdef __cplusplus -} // extern "C" -#endif - -#endif diff --git a/STM32F1/system/libmaple/include/libmaple/bitband.h b/STM32F1/system/libmaple/include/libmaple/bitband.h deleted file mode 100644 index 6e77991..0000000 --- a/STM32F1/system/libmaple/include/libmaple/bitband.h +++ /dev/null @@ -1,128 +0,0 @@ -/****************************************************************************** - * The MIT License - * - * Copyright (c) 2011 LeafLabs, LLC. - * - * Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, copy, - * modify, merge, publish, distribute, sublicense, and/or sell copies - * of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS - * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN - * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - *****************************************************************************/ - -/** - * @file libmaple/include/libmaple/bitband.h - * - * @brief Bit-banding utility functions - */ - -#ifndef _LIBMAPLE_BITBAND_H_ -#define _LIBMAPLE_BITBAND_H_ - -#ifdef __cplusplus -extern "C" { -#endif - -#include - -#define BB_SRAM_REF 0x20000000 -#define BB_SRAM_BASE 0x22000000 -#define BB_PERI_REF 0x40000000 -#define BB_PERI_BASE 0x42000000 - -static inline volatile uint32* __bb_addr(volatile void*, - uint32, - uint32, - uint32); - -/** - * @brief Obtain a pointer to the bit-band address corresponding to a - * bit in a volatile SRAM address. - * @param address Address in the bit-banded SRAM region - * @param bit Bit in address to bit-band - */ -static inline volatile uint32* bb_sramp(volatile void *address, uint32 bit) { - return __bb_addr(address, bit, BB_SRAM_BASE, BB_SRAM_REF); -} - -/** - * @brief Get a bit from an address in the SRAM bit-band region. - * @param address Address in the SRAM bit-band region to read from - * @param bit Bit in address to read - * @return bit's value in address. - */ -static inline uint8 bb_sram_get_bit(volatile void *address, uint32 bit) { - return *bb_sramp(address, bit); -} - -/** - * @brief Set a bit in an address in the SRAM bit-band region. - * @param address Address in the SRAM bit-band region to write to - * @param bit Bit in address to write to - * @param val Value to write for bit, either 0 or 1. - */ -static inline void bb_sram_set_bit(volatile void *address, - uint32 bit, - uint8 val) { - *bb_sramp(address, bit) = val; -} - -/** - * @brief Obtain a pointer to the bit-band address corresponding to a - * bit in a peripheral address. - * @param address Address in the bit-banded peripheral region - * @param bit Bit in address to bit-band - */ -static inline volatile uint32* bb_perip(volatile void *address, uint32 bit) { - return __bb_addr(address, bit, BB_PERI_BASE, BB_PERI_REF); -} - -/** - * @brief Get a bit from an address in the peripheral bit-band region. - * @param address Address in the peripheral bit-band region to read from - * @param bit Bit in address to read - * @return bit's value in address. - */ -static inline uint8 bb_peri_get_bit(volatile void *address, uint32 bit) { - return *bb_perip(address, bit); -} - -/** - * @brief Set a bit in an address in the peripheral bit-band region. - * @param address Address in the peripheral bit-band region to write to - * @param bit Bit in address to write to - * @param val Value to write for bit, either 0 or 1. - */ -static inline void bb_peri_set_bit(volatile void *address, - uint32 bit, - uint8 val) { - *bb_perip(address, bit) = val; -} - -static inline volatile uint32* __bb_addr(volatile void *address, - uint32 bit, - uint32 bb_base, - uint32 bb_ref) { - return (volatile uint32*)(bb_base + ((uint32)address - bb_ref) * 32 + - bit * 4); -} - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/STM32F1/system/libmaple/include/libmaple/bkp.h b/STM32F1/system/libmaple/include/libmaple/bkp.h deleted file mode 100644 index bb63a2f..0000000 --- a/STM32F1/system/libmaple/include/libmaple/bkp.h +++ /dev/null @@ -1,166 +0,0 @@ -/****************************************************************************** - * The MIT License - * - * Copyright (c) 2010 LeafLabs, LLC. - * - * Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, copy, - * modify, merge, publish, distribute, sublicense, and/or sell copies - * of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS - * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN - * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - *****************************************************************************/ - -/** - * @file libmaple/include/libmaple/bkp.h - * @brief Backup register support (STM32F1 only). - */ - -#ifndef _LIBMAPLE_BKP_H_ -#define _LIBMAPLE_BKP_H_ - -#ifdef __cplusplus -extern "C" { -#endif - -#include - -#if defined(STM32_MEDIUM_DENSITY) -#define BKP_NR_DATA_REGS 10 -#elif defined(STM32_HIGH_DENSITY) -#define BKP_NR_DATA_REGS 42 -#endif - -/** Backup peripheral register map type. */ -typedef struct bkp_reg_map { - const uint32 RESERVED1; ///< Reserved - __io uint32 DR1; ///< Data register 1 - __io uint32 DR2; ///< Data register 2 - __io uint32 DR3; ///< Data register 3 - __io uint32 DR4; ///< Data register 4 - __io uint32 DR5; ///< Data register 5 - __io uint32 DR6; ///< Data register 6 - __io uint32 DR7; ///< Data register 7 - __io uint32 DR8; ///< Data register 8 - __io uint32 DR9; ///< Data register 9 - __io uint32 DR10; ///< Data register 10 - __io uint32 RTCCR; ///< RTC control register - __io uint32 CR; ///< Control register - __io uint32 CSR; ///< Control and status register -#if defined(STM32_HIGH_DENSITY) || defined(STM32_XL_DENSITY) - const uint32 RESERVED2; ///< Reserved - const uint32 RESERVED3; ///< Reserved - __io uint32 DR11; ///< Data register 11 - __io uint32 DR12; ///< Data register 12 - __io uint32 DR13; ///< Data register 13 - __io uint32 DR14; ///< Data register 14 - __io uint32 DR15; ///< Data register 15 - __io uint32 DR16; ///< Data register 16 - __io uint32 DR17; ///< Data register 17 - __io uint32 DR18; ///< Data register 18 - __io uint32 DR19; ///< Data register 19 - __io uint32 DR20; ///< Data register 20 - __io uint32 DR21; ///< Data register 21 - __io uint32 DR22; ///< Data register 22 - __io uint32 DR23; ///< Data register 23 - __io uint32 DR24; ///< Data register 24 - __io uint32 DR25; ///< Data register 25 - __io uint32 DR26; ///< Data register 26 - __io uint32 DR27; ///< Data register 27 - __io uint32 DR28; ///< Data register 28 - __io uint32 DR29; ///< Data register 29 - __io uint32 DR30; ///< Data register 30 - __io uint32 DR31; ///< Data register 31 - __io uint32 DR32; ///< Data register 32 - __io uint32 DR33; ///< Data register 33 - __io uint32 DR34; ///< Data register 34 - __io uint32 DR35; ///< Data register 35 - __io uint32 DR36; ///< Data register 36 - __io uint32 DR37; ///< Data register 37 - __io uint32 DR38; ///< Data register 38 - __io uint32 DR39; ///< Data register 39 - __io uint32 DR40; ///< Data register 40 - __io uint32 DR41; ///< Data register 41 - __io uint32 DR42; ///< Data register 42 -#endif -} bkp_reg_map; - -/** Backup peripheral register map base pointer. */ -#define BKP_BASE ((struct bkp_reg_map*)0x40006C00) - -/** Backup peripheral device type. */ -typedef struct bkp_dev { - bkp_reg_map *regs; /**< Register map */ -} bkp_dev; - -extern const bkp_dev *BKP; - -/* - * Register bit definitions - */ - -/* Data Registers */ - -#define BKP_DR_D 0xFFFF - -/* RTC Clock Calibration Register */ - -#define BKP_RTCCR_ASOS_BIT 9 -#define BKP_RTCCR_ASOE_BIT 8 -#define BKP_RTCCR_CCO_BIT 7 - -#define BKP_RTCCR_ASOS BIT(BKP_RTCCR_ASOS_BIT) -#define BKP_RTCCR_ASOE BIT(BKP_RTCCR_ASOE_BIT) -#define BKP_RTCCR_CCO BIT(BKP_RTCCR_CCO_BIT) -#define BKP_RTCCR_CAL 0x7F - -/* Backup control register */ - -#define BKP_CR_TPAL_BIT 1 -#define BKP_CR_TPE_BIT 0 - -#define BKP_CR_TPAL BIT(BKP_CR_TPAL_BIT) -#define BKP_CR_TPE BIT(BKP_CR_TPE_BIT) - -/* Backup control/status register */ - -#define BKP_CSR_TIF_BIT 9 -#define BKP_CSR_TEF_BIT 8 -#define BKP_CSR_TPIE_BIT 2 -#define BKP_CSR_CTI_BIT 1 -#define BKP_CSR_CTE_BIT 0 - -#define BKP_CSR_TIF BIT(BKP_CSR_TIF_BIT) -#define BKP_CSR_TEF BIT(BKP_CSR_TEF_BIT) -#define BKP_CSR_TPIE BIT(BKP_CSR_TPIE_BIT) -#define BKP_CSR_CTI BIT(BKP_CSR_CTI_BIT) -#define BKP_CSR_CTE BIT(BKP_CSR_CTE_BIT) - -/* - * Convenience functions - */ - -void bkp_init(void); -void bkp_enable_writes(void); -void bkp_disable_writes(void); -uint16 bkp_read(uint8 reg); -void bkp_write(uint8 reg, uint16 val); - -#ifdef __cplusplus -} /* extern "C" */ -#endif - -#endif diff --git a/STM32F1/system/libmaple/include/libmaple/dac.h b/STM32F1/system/libmaple/include/libmaple/dac.h deleted file mode 100644 index 7768423..0000000 --- a/STM32F1/system/libmaple/include/libmaple/dac.h +++ /dev/null @@ -1,162 +0,0 @@ -/****************************************************************************** - * The MIT License - * - * Copyright (c) 2011, 2012 LeafLabs, LLC. - * Copyright (c) 2010 Bryan Newbold. - * - * Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, copy, - * modify, merge, publish, distribute, sublicense, and/or sell copies - * of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS - * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN - * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - *****************************************************************************/ - -/** - * @file libmaple/include/libmaple/dac.h - * @brief Digital to analog converter support. - */ - -/* See notes/dac.txt for more info */ - -#ifndef _LIBMAPLE_DAC_H_ -#define _LIBMAPLE_DAC_H_ - -#ifdef __cplusplus -extern "C"{ -#endif - - /* Roger clark. Replaced with line below #include */ -#include "stm32f1/include/series/dac.h" -#include -#include -#include - -/* - * Register map base and device pointers. - * - * The DACs are the same on all supported targets, so it's not worth - * repeating these in the series headers. - */ - -#define DAC_BASE ((struct dac_reg_map*)0x40007400) - -/** DAC device type. */ -typedef struct dac_dev { - dac_reg_map *regs; /**< Register map */ -} dac_dev; - -#if STM32_HAVE_DAC -extern const dac_dev *DAC; -#endif - -/* - * Register bit definitions - */ - -/* Control register */ - -/* Channel 1 control */ -#define DAC_CR_EN1 (1U << 0) /* Enable */ -#define DAC_CR_BOFF1 (1U << 1) /* Output buffer disable */ -#define DAC_CR_TEN1 (1U << 2) /* Trigger enable */ -#define DAC_CR_TSEL1 (0x7 << 3) /* Trigger selection */ -#define DAC_CR_WAVE1 (0x3 << 6) /* Noise/triangle wave */ -#define DAC_CR_MAMP1 (0xF << 8) /* Mask/amplitude selector */ -#define DAC_CR_DMAEN1 (1U << 12) /* DMA enable */ -/* Channel 2 control */ -#define DAC_CR_EN2 (1U << 16) /* Enable */ -#define DAC_CR_BOFF2 (1U << 17) /* Output buffer disable */ -#define DAC_CR_TEN2 (1U << 18) /* Trigger enable */ -#define DAC_CR_TSEL2 (0x7 << 19) /* Trigger selection */ -#define DAC_CR_WAVE2 (0x3 << 22) /* Noise/triangle wave */ -#define DAC_CR_MAMP2 (0xF << 24) /* Mask/amplitude selector */ -#define DAC_CR_DMAEN2 (1U << 28) /* DMA enable */ - -/* Software trigger register */ - -#define DAC_SWTRIGR_SWTRIG1 (1U << 0) /* Channel 1 software trigger */ -#define DAC_SWTRIGR_SWTRIG2 (1U << 1) /* Channel 2 software trigger */ - -/* Channel 1 12-bit right-aligned data holding register */ - -#define DAC_DHR12R1_DACC1DHR 0x00000FFF - -/* Channel 1 12-bit left-aligned data holding register */ - -#define DAC_DHR12L1_DACC1DHR 0x0000FFF0 - -/* Channel 1 8-bit left-aligned data holding register */ - -#define DAC_DHR8R1_DACC1DHR 0x000000FF - -/* Channel 2 12-bit right-aligned data holding register */ - -#define DAC_DHR12R2_DACC2DHR 0x00000FFF - -/* Channel 2 12-bit left-aligned data holding register */ - -#define DAC_DHR12L2_DACC2DHR 0x0000FFF0 - -/* Channel 2 8-bit left-aligned data holding register */ - -#define DAC_DHR8R2_DACC2DHR 0x000000FF - -/* Dual DAC 12-bit right-aligned data holding register */ - -#define DAC_DHR12RD_DACC1DHR 0x00000FFF -#define DAC_DHR12RD_DACC2DHR 0x0FFF0000 - -/* Dual DAC 12-bit left-aligned data holding register */ - -#define DAC_DHR12LD_DACC1DHR 0x0000FFF0 -#define DAC_DHR12LD_DACC2DHR 0xFFF00000 - -/* Dual DAC 8-bit left-aligned data holding register */ - -#define DAC_DHR8RD_DACC1DHR 0x000000FF -#define DAC_DHR8RD_DACC2DHR 0x0000FF00 - -/* Channel 1 data output register */ - -#define DAC_DOR1_DACC1DOR 0x00000FFF - -/* Channel 1 data output register */ - -#define DAC_DOR2_DACC2DOR 0x00000FFF - -/* - * Routines - */ - -/* We take the dev argument in these for future-proofing */ - -#define DAC_CH1 0x1 -#define DAC_CH2 0x2 -void dac_init(const dac_dev *dev, uint32 flags); - -void dac_write_channel(const dac_dev *dev, uint8 channel, uint16 val); -void dac_enable_channel(const dac_dev *dev, uint8 channel); -void dac_disable_channel(const dac_dev *dev, uint8 channel); - -#define dac_write_channel1(val) ( DAC->regs->DHR12R1 = DAC_DHR12R1_DACC1DHR & val ) -#define dac_write_channel2(val) ( DAC->regs->DHR12R2 = DAC_DHR12R2_DACC2DHR & val ) - -#ifdef __cplusplus -} // extern "C" -#endif - -#endif diff --git a/STM32F1/system/libmaple/include/libmaple/delay.h b/STM32F1/system/libmaple/include/libmaple/delay.h deleted file mode 100644 index 472a208..0000000 --- a/STM32F1/system/libmaple/include/libmaple/delay.h +++ /dev/null @@ -1,65 +0,0 @@ -/****************************************************************************** - * The MIT License - * - * Copyright (c) 2010 Perry Hung. - * Copyright (c) 2011 LeafLabs, LLC. - * - * Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, copy, - * modify, merge, publish, distribute, sublicense, and/or sell copies - * of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS - * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN - * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - *****************************************************************************/ - -/** - * @file libmaple/include/libmaple/delay.h - * @brief Delay implementation - */ - -#ifndef _LIBMAPLE_DELAY_H_ -#define _LIBMAPLE_DELAY_H_ - -#ifdef __cplusplus -extern "C" { -#endif - -#include -#include - -/** - * @brief Delay the given number of microseconds. - * - * @param us Number of microseconds to delay. - */ -static inline void delay_us(uint32 us) { - us *= STM32_DELAY_US_MULT; - - /* fudge for function call overhead */ - us--; - asm volatile(" mov r0, %[us] \n\t" - "1: subs r0, #1 \n\t" - " bhi 1b \n\t" - : - : [us] "r" (us) - : "r0"); -} - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/STM32F1/system/libmaple/include/libmaple/dma.h b/STM32F1/system/libmaple/include/libmaple/dma.h deleted file mode 100644 index a75b314..0000000 --- a/STM32F1/system/libmaple/include/libmaple/dma.h +++ /dev/null @@ -1,447 +0,0 @@ -/****************************************************************************** - * The MIT License - * - * Copyright (c) 2010 Michael Hope. - * Copyright (c) 2012 LeafLabs, LLC. - * - * Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, copy, - * modify, merge, publish, distribute, sublicense, and/or sell copies - * of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS - * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN - * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - *****************************************************************************/ - -/** - * @file libmaple/include/libmaple/dma.h - * - * @author Marti Bolivar ; - * Original implementation by Michael Hope - * - * @brief Direct Memory Access peripheral support - */ - -#ifndef _LIBMAPLE_DMA_H_ -#define _LIBMAPLE_DMA_H_ - -#ifdef __cplusplus -extern "C"{ -#endif - -/* provides: - * - * - An opaque dma_tube type, and predefined rvalues for each tube - * supported by the series. - * - * A "DMA tube" is a series-specific (hopefully integer) datatype - * that abstracts the conduit through which DMA-ed data flow. - * - * Examples: On STM32F1, dma_tube is just an alias for dma_channel, - * and the tube values are just DMA_CH1 (=1), DMA_CH2 (=2), etc. - * - * Note that a dma_tube doesn't have to be an enum, and its values - * don't have to be integral. They _do_ need to be cheap to pass as - * arguments, though. - * - * - struct dma_tube_reg_map (and typedef to dma_tube_reg_map). DMA - * register maps tend to be split into global registers and per-tube - * registers. It's convenient to pass around pointers to a tube's - * registers, since that makes it possible to configure or otherwise - * mess with a tube without knowing which one you're dealing with. - * - * - Base pointers to the various dma_tube_reg_maps. - * - * Examples: On STM32F1, these are DMAxCHy_BASE. You can access - * registers like DMAxCHy_BASE->CPAR, etc. - * - * - enum dma_request_src (and typedef to dma_request_src). This - * specifies the peripheral DMA request sources (e.g. USART TX DMA - * requests, etc.). - * - * - enum dma_mode_flags (and typedef to dma_mode_flags). Used in - * dma_tube_config. If two series both support the same mode flags, - * they must use the same enumerator names for those flags (the - * values of those enumerators are of course allowed to differ). - * - * - Normal stuff: dma_reg_map and base pointers, register bit - * definitions, dma_dev pointer declarations, and any other - * convenience functions useful for the series. */ - - /* Roger clark. Replaced with line below #include */ -#include "stm32f1/include/series/dma.h" - -/* buys us dma_dev and other necessities. */ -#include -#include - -/* - * Declarations/documentation for some of the series-provided types. - */ - -/** - * @brief (Series-dependent) DMA request sources. - * - * These specify the various pieces of peripheral functionality which - * may make DMA requests. Use them to set up a DMA transfer (see - * struct dma_tube_config, dma_tube_cfg()). - */ -enum dma_request_src; - -/** - * @brief (Series-dependent) DMA tube configuration flags. - * These specify miscellaneous bits of configuration for a DMA tube. - * @see struct dma_mode_config - */ -enum dma_cfg_flags; - -/** - * @brief (Series-dependent) DMA tube register map type. - * This allows you to access a tube's registers as a group. - * @see dma_tube_regs() - */ -struct dma_tube_reg_map; - -/* - * Convenience functions - */ - -/* Initialization */ - -void dma_init(dma_dev *dev); - -/* dma_tube configuration - * - * Use these types and functions to set up DMA transfers, handle - * interrupts, etc. The main function of interest is dma_tube_cfg(), - * which the various series implement separately. */ - -/** - * @brief Specifies a DMA tube configuration. - * - * Use one of these to set up a DMA transfer by passing it to - * dma_tube_cfg(). - * - * @see dma_tube_cfg() - * @see dma_xfer_size - */ -typedef struct dma_tube_config { - /** Source of data */ - __io void *tube_src; - /** Source transfer size */ - dma_xfer_size tube_src_size; - - /** Destination of data */ - __io void *tube_dst; - /** Destination transfer size */ - dma_xfer_size tube_dst_size; - - /** - * Number of data to transfer (0 to 65,535). - * - * Note that this is NOT measured in bytes; it's measured in - * number of data, which occur in multiples of tube_src_size. For - * example, if tube_src_size is DMA_SIZE_32BITS and tube_nr_xfers - * is 2, then 8 total bytes will be transferred. - */ - unsigned tube_nr_xfers; - - /** - * Target-specific configuration flags. - * - * These are an OR of series-specific enum dma_mode_flags values. - * Consult the documentation for your target for what flags you - * can use here. - * - * Typical flag examples: DMA_CFG_SRC_INC, DMA_CFG_DST_INC, - * DMA_CFG_CIRC, DMA_CFG_CMPLT_IE, etc. - */ - unsigned tube_flags; - - /** - * Currently unused. You must set this to 0 or something valid for - * your target. */ - void *target_data; - - /** - * Hardware DMA request source. - * - * This is ignored for memory-to-memory transfers. - */ - enum dma_request_src tube_req_src; -} dma_tube_config; - -#define DMA_TUBE_CFG_SUCCESS 0 -#define DMA_TUBE_CFG_EREQ 1 -#define DMA_TUBE_CFG_ENDATA 2 -#define DMA_TUBE_CFG_EDEV 3 -#define DMA_TUBE_CFG_ESRC 4 -#define DMA_TUBE_CFG_EDST 5 -#define DMA_TUBE_CFG_EDIR 6 -#define DMA_TUBE_CFG_ESIZE 7 -#define DMA_TUBE_CFG_ECFG 0xFF -/** - * @brief Configure a DMA tube. - * - * Use this function to set up a DMA transfer. The tube will be - * disabled before being reconfigured. The transfer will have low - * priority by default. You can choose another priority before the - * transfer begins using dma_set_priority(). You can manage your - * interrupt handlers for the tube using dma_attach_interrupt() and - * dma_detach_interrupt(). - * - * After calling dma_tube_cfg() and performing any other desired - * configuration, start the transfer using dma_enable(). - * - * @param dev DMA device. - * @param tube DMA tube to configure. - * @param cfg Configuration to apply to tube. - * - * @return DMA_TUBE_CFG_SUCCESS (0) on success, <0 on failure. On - * failure, returned value will be the opposite (-) of one of: - * - * - DMA_TUBE_CFG_EREQ: tube doesn't work with cfg->tube_req_src - * - DMA_TUBE_CFG_ENDATA: cfg->tube_[src,dst]_size are - * incompatible with cfg->tube_nr_xfers, or cfg->tube_nr_xfers - * is out of bounds. - * - DMA_TUBE_CFG_EDEV: dev does not support cfg - * - DMA_TUBE_CFG_ESRC: bad cfg->tube_src - * - DMA_TUBE_CFG_EDST: bad cfg->tube_dst - * - DMA_TUBE_CFG_EDIR: dev can't transfer from cfg->tube_src to - * cfg->tube_dst - * - DMA_TUBE_CFG_ESIZE: something ended up wrong due to MSIZE/PSIZE - * - DMA_TUBE_CFG_ECFG: generic "something's wrong" - * - * @sideeffect Disables tube. May alter tube's registers even when an - * error occurs. - * @see struct dma_tube_config - * @see dma_attach_interrupt() - * @see dma_detach_interrupt() - * @see dma_enable() - */ -extern int dma_tube_cfg(dma_dev *dev, dma_tube tube, dma_tube_config *cfg); - -/* Other tube configuration functions. You can use these if - * dma_tube_cfg() isn't enough, or to adjust parts of an existing tube - * configuration. */ - -/** DMA transfer priority. */ -typedef enum dma_priority { - DMA_PRIORITY_LOW = 0, /**< Low priority */ - DMA_PRIORITY_MEDIUM = 1, /**< Medium priority */ - DMA_PRIORITY_HIGH = 2, /**< High priority */ - DMA_PRIORITY_VERY_HIGH = 3, /**< Very high priority */ -} dma_priority; - -/** - * @brief Set the priority of a DMA transfer. - * - * You may not call this function while the tube is enabled. - * - * @param dev DMA device - * @param tube DMA tube - * @param priority priority to set. - */ -extern void dma_set_priority(dma_dev *dev, dma_tube tube, - dma_priority priority); - -/** - * @brief Set the number of data transfers on a DMA tube. - * - * You may not call this function while the tube is enabled. - * - * @param dev DMA device - * @param tube Tube through which the transfer will occur. - * @param num_transfers Number of DMA transactions to set. - */ -extern void dma_set_num_transfers(dma_dev *dev, dma_tube tube, - uint16 num_transfers); - -/** - * @brief Set the base memory address where data will be read from or - * written to. - * - * You must not call this function while the tube is enabled. - * - * If the DMA memory size is 16 bits, the address is automatically - * aligned to a half-word. If the DMA memory size is 32 bits, the - * address is aligned to a word. - * - * @param dev DMA Device - * @param tube Tube whose base memory address to set. - * @param address Memory base address to use. - */ -extern void dma_set_mem_addr(dma_dev *dev, dma_tube tube, __io void *address); - -/** - * @brief Set the base peripheral address where data will be read from - * or written to. - * - * You must not call this function while the channel is enabled. - * - * If the DMA peripheral size is 16 bits, the address is automatically - * aligned to a half-word. If the DMA peripheral size is 32 bits, the - * address is aligned to a word. - * - * @param dev DMA Device - * @param tube Tube whose peripheral data register base address to set. - * @param address Peripheral memory base address to use. - */ -extern void dma_set_per_addr(dma_dev *dev, dma_tube tube, __io void *address); - -/* Interrupt handling */ - -/** - * @brief Attach an interrupt to a DMA transfer. - * - * Interrupts are enabled using series-specific mode flags in - * dma_tube_cfg(). - * - * @param dev DMA device - * @param tube Tube to attach handler to - * @param handler Interrupt handler to call when tube interrupt fires. - * @see dma_tube_cfg() - * @see dma_get_irq_cause() - * @see dma_detach_interrupt() - */ -extern void dma_attach_interrupt(dma_dev *dev, dma_tube tube, - void (*handler)(void)); - - -/** - * @brief Detach a DMA transfer interrupt handler. - * - * After calling this function, the given tube's interrupts will be - * disabled. - * - * @param dev DMA device - * @param tube Tube whose handler to detach - * @sideeffect Clears the tube's interrupt enable bits. - * @see dma_attach_interrupt() - */ -extern void dma_detach_interrupt(dma_dev *dev, dma_tube tube); - -/* Tube enable/disable */ - -/** - * @brief Enable a DMA tube. - * - * If the tube has been properly configured, calling this function - * allows it to start serving DMA requests. - * - * @param dev DMA device - * @param tube Tube to enable - * @see dma_tube_cfg() - */ -extern void dma_enable(dma_dev *dev, dma_tube tube); - -/** - * @brief Disable a DMA channel. - * - * Calling this function makes the tube stop serving DMA requests. - * - * @param dev DMA device - * @param tube Tube to disable - */ -extern void dma_disable(dma_dev *dev, dma_tube tube); - -/** - * @brief Check if a DMA tube is enabled. - * @param dev DMA device. - * @param tube Tube to check. - * @return 0 if the tube is disabled, >0 if it is enabled. - */ -static inline uint8 dma_is_enabled(dma_dev *dev, dma_tube tube); - -/* Other conveniences */ - -/** - * @brief Obtain a pointer to an individual DMA tube's registers. - * - * Examples: - * - * - On STM32F1, dma_channel_regs(DMA1, DMA_CH1)->CCR is DMA1_BASE->CCR1. - * - * @param dev DMA device. - * @param tube DMA tube whose register map to obtain. - * @return (Series-specific) tube register map. - */ -static inline dma_tube_reg_map* dma_tube_regs(dma_dev *dev, dma_tube tube); - -/** - * Encodes the reason why a DMA interrupt was called. - * @see dma_get_irq_cause() - */ -typedef enum dma_irq_cause { - DMA_TRANSFER_COMPLETE, /**< Transfer is complete. */ - DMA_TRANSFER_HALF_COMPLETE, /**< Transfer is half complete. */ - DMA_TRANSFER_ERROR, /**< Error occurred during transfer. */ - DMA_TRANSFER_DME_ERROR, /**< - * @brief Direct mode error occurred during - * transfer. */ - DMA_TRANSFER_FIFO_ERROR, /**< FIFO error occurred during transfer. */ -} dma_irq_cause; - -/** - * @brief Discover the reason why a DMA interrupt was called. - * - * You may only call this function within an attached interrupt - * handler for the given channel. - * - * This function resets the internal DMA register state which encodes - * the cause of the interrupt; consequently, it can only be called - * once per interrupt handler invocation. - * - * @param dev DMA device - * @param tube Tube whose interrupt is being handled. - * @return Reason why the interrupt fired. - * @sideeffect Clears flags in dev's interrupt status registers. - * @see dma_attach_interrupt() - * @see dma_irq_cause - */ -extern dma_irq_cause dma_get_irq_cause(dma_dev *dev, dma_tube tube); - -/** - * @brief Get the ISR status bits for a DMA channel. - * - * The bits are returned right-aligned, in the order they appear in - * the corresponding ISR register. - * - * If you're trying to figure out why a DMA interrupt fired, you may - * find dma_get_irq_cause() more convenient. - * - * @param dev DMA device - * @param tube Tube whose ISR bits to return. - * @see dma_get_irq_cause(). - */ -static inline uint8 dma_get_isr_bits(dma_dev *dev, dma_tube tube); - -/** - * @brief Clear the ISR status bits for a given DMA tube. - * - * If you're trying to clean up after yourself in a DMA interrupt, you - * may find dma_get_irq_cause() more convenient. - * - * @param dev DMA device - * @param tube Tube whose ISR bits to clear. - * @see dma_get_irq_cause() - */ -static inline void dma_clear_isr_bits(dma_dev *dev, dma_tube tube); - -#ifdef __cplusplus -} // extern "C" -#endif - -#endif diff --git a/STM32F1/system/libmaple/include/libmaple/dma_common.h b/STM32F1/system/libmaple/include/libmaple/dma_common.h deleted file mode 100644 index 3765cd5..0000000 --- a/STM32F1/system/libmaple/include/libmaple/dma_common.h +++ /dev/null @@ -1,112 +0,0 @@ -/****************************************************************************** - * The MIT License - * - * Copyright (c) 2012 LeafLabs, LLC. - * - * Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, copy, - * modify, merge, publish, distribute, sublicense, and/or sell copies - * of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS - * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN - * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - *****************************************************************************/ - -/** - * @file libmaple/include/libmaple/dma_common.h - * @author Marti Bolivar - * @brief Common DMA sub-header for and . - * - * CONTENTS UNSTABLE. The existence of this file is an implementation - * detail. Never include it directly. If you need something from - * here, include instead. - */ - -/* - * There's a fair amount of common DMA functionality needed by each - * and . This header exists in order - * to provide it to both, avoiding some hacks and circular - * dependencies. - */ - -#ifndef _LIBMAPLE_DMA_COMMON_H_ -#define _LIBMAPLE_DMA_COMMON_H_ - -#ifdef __cplusplus -extern "C"{ -#endif - -#include -#include -#include - -/* - * Devices - */ - -struct dma_reg_map; - -/* Encapsulates state related to user interrupt handlers. You - * shouldn't touch these directly; use dma_attach_interrupt() and - * dma_detach_interupt() instead. */ -typedef struct dma_handler_config { - void (*handler)(void); /* User handler */ - nvic_irq_num irq_line; /* IRQ line for interrupt */ -} dma_handler_config; - -/** DMA device type */ -typedef struct dma_dev { - struct dma_reg_map *regs; /**< Register map */ - rcc_clk_id clk_id; /**< Clock ID */ - struct dma_handler_config handlers[]; /**< For internal use */ -} dma_dev; - -/** - * @brief DMA channels - * - * Notes: - * - This is also the dma_tube type for STM32F1. - * - Channel 0 is not available on all STM32 series. - * - * @see dma_tube - */ -typedef enum dma_channel { - DMA_CH0 = 0, /**< Channel 0 */ - DMA_CH1 = 1, /**< Channel 1 */ - DMA_CH2 = 2, /**< Channel 2 */ - DMA_CH3 = 3, /**< Channel 3 */ - DMA_CH4 = 4, /**< Channel 4 */ - DMA_CH5 = 5, /**< Channel 5 */ - DMA_CH6 = 6, /**< Channel 6 */ - DMA_CH7 = 7, /**< Channel 7 */ -} dma_channel; - -/** - * @brief Source and destination transfer sizes. - * Use these when initializing a struct dma_tube_config. - * @see struct dma_tube_config - * @see dma_tube_cfg - */ -typedef enum dma_xfer_size { - DMA_SIZE_8BITS = 0, /**< 8-bit transfers */ - DMA_SIZE_16BITS = 1, /**< 16-bit transfers */ - DMA_SIZE_32BITS = 2, /**< 32-bit transfers */ -} dma_xfer_size; - -#ifdef __cplusplus -} // extern "C" -#endif - -#endif diff --git a/STM32F1/system/libmaple/include/libmaple/exti.h b/STM32F1/system/libmaple/include/libmaple/exti.h deleted file mode 100644 index 69362d6..0000000 --- a/STM32F1/system/libmaple/include/libmaple/exti.h +++ /dev/null @@ -1,144 +0,0 @@ -/****************************************************************************** - * The MIT License - * - * Copyright (c) 2010 Perry Hung. - * - * Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, copy, - * modify, merge, publish, distribute, sublicense, and/or sell copies - * of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS - * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN - * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - *****************************************************************************/ - -/** - * @file libmaple/include/libmaple/exti.h - * @brief External interrupt control - */ - -/* See notes/exti.txt for more info */ - -#ifndef _LIBMAPLE_EXTI_H_ -#define _LIBMAPLE_EXTI_H_ - -#ifdef __cplusplus -extern "C"{ -#endif - -/* Roger clark. replaced by line below #include */ /* provides EXTI_BASE */ -#include "stm32f1/include/series/exti.h" -#include - -/* - * Register map and base pointer. - */ - -/** EXTI register map type */ -typedef struct exti_reg_map { - __io uint32 IMR; /**< Interrupt mask register */ - __io uint32 EMR; /**< Event mask register */ - __io uint32 RTSR; /**< Rising trigger selection register */ - __io uint32 FTSR; /**< Falling trigger selection register */ - __io uint32 SWIER; /**< Software interrupt event register */ - __io uint32 PR; /**< Pending register */ -} exti_reg_map; - -/* - * Types: exti_num, exti_cfg, exti_trigger_mode. - * - * A combination of these three specifies an external interrupt - * configuration (see exti_attach_interrupt()). - */ - -/** EXTI line. */ -typedef enum exti_num { - EXTI0, /**< EXTI line 0 */ - EXTI1, /**< EXTI line 1 */ - EXTI2, /**< EXTI line 2 */ - EXTI3, /**< EXTI line 3 */ - EXTI4, /**< EXTI line 4 */ - EXTI5, /**< EXTI line 5 */ - EXTI6, /**< EXTI line 6 */ - EXTI7, /**< EXTI line 7 */ - EXTI8, /**< EXTI line 8 */ - EXTI9, /**< EXTI line 9 */ - EXTI10, /**< EXTI line 10 */ - EXTI11, /**< EXTI line 11 */ - EXTI12, /**< EXTI line 12 */ - EXTI13, /**< EXTI line 13 */ - EXTI14, /**< EXTI line 14 */ - EXTI15, /**< EXTI line 15 */ -} exti_num; - -/** - * @brief EXTI port configuration - * - * These specify which GPIO port an external interrupt line should be - * connected to. - */ -typedef enum exti_cfg { - EXTI_PA, /**< Use PAx pin */ - EXTI_PB, /**< Use PBx pin */ - EXTI_PC, /**< Use PCx pin */ - EXTI_PD, /**< Use PDx pin */ - EXTI_PE, /**< Use PEx pin */ - EXTI_PF, /**< Use PFx pin */ - EXTI_PG, /**< Use PGx pin */ - EXTI_PH, /**< Use PHx pin */ - EXTI_PI, /**< Use PIx pin */ -} exti_cfg; - -/** External interrupt trigger mode */ -typedef enum exti_trigger_mode { - EXTI_RISING, /**< Trigger on the rising edge */ - EXTI_FALLING, /**< Trigger on the falling edge */ - EXTI_RISING_FALLING /**< Trigger on both the rising and falling edges */ -} exti_trigger_mode; - -/* - * Routines - */ - -void exti_attach_interrupt(exti_num num, - exti_cfg port, - voidFuncPtr handler, - exti_trigger_mode mode); -void exti_attach_callback(exti_num num, - exti_cfg port, - voidArgumentFuncPtr handler, - void *arg, - exti_trigger_mode mode); -void exti_detach_interrupt(exti_num num); - -/** - * @brief Set the GPIO port for an EXTI line. - * - * This is a low-level routine that most users will not - * need. exti_attach_interrupt() handles calling this function - * appropriately. - * - * @param num EXTI line - * @param port EXTI configuration for GPIO port to connect to num. - * @see exti_num - * @see exti_cfg - */ -extern void exti_select(exti_num num, exti_cfg port); - -#ifdef __cplusplus -} // extern "C" -#endif - -#endif diff --git a/STM32F1/system/libmaple/include/libmaple/flash.h b/STM32F1/system/libmaple/include/libmaple/flash.h deleted file mode 100644 index 3b1d7b3..0000000 --- a/STM32F1/system/libmaple/include/libmaple/flash.h +++ /dev/null @@ -1,107 +0,0 @@ -/****************************************************************************** - * The MIT License - * - * Copyright (c) 2010 Perry Hung. - * - * Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, copy, - * modify, merge, publish, distribute, sublicense, and/or sell copies - * of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS - * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN - * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - *****************************************************************************/ - -/** - * @file libmaple/include/libmaple/flash.h - * @brief Flash support. - */ - -#ifndef _LIBMAPLE_FLASH_H_ -#define _LIBMAPLE_FLASH_H_ - -#ifdef __cplusplus -extern "C"{ -#endif - -#include - -#define FLASH_WAIT_STATE_0 0x0 -#define FLASH_WAIT_STATE_1 0x1 -#define FLASH_WAIT_STATE_2 0x2 -#define FLASH_WAIT_STATE_3 0x3 -#define FLASH_WAIT_STATE_4 0x4 -#define FLASH_WAIT_STATE_5 0x5 -#define FLASH_WAIT_STATE_6 0x6 -#define FLASH_WAIT_STATE_7 0x7 - -/* The series header must define: - * - * - FLASH_SAFE_WAIT_STATES, the smallest number of wait states that - * it is safe to use when SYSCLK is at its fastest documented rate - * and the MCU is powered at 3.3V (i.e. this doesn't consider - * overclocking or low voltage operation). - * - * - The following bit flags, for flash_enable_features(): - * - * -- FLASH_PREFETCH: prefetcher - * -- FLASH_ICACHE: instruction cache - * -- FLASH_DCACHE: data cache - * - * See that function's Doxygen for more restrictions. - */ - /* Roger clark. Replaced with line below #include */ -#include "stm32f1/include/series/flash.h" - -#ifdef __DOXYGEN__ -/** Flash register map base pointer. */ -#define FLASH_BASE -#endif - -/* - * Flash routines - */ - -void flash_set_latency(uint32 wait_states); - -/** - * @brief Enable Flash memory features - * - * If the target MCU doesn't provide a feature (e.g. instruction and - * data caches on the STM32F1), the flag will be ignored. This allows - * using these flags unconditionally, with the desired effect taking - * place on targets that support them. - * - * @param feature_flags Bitwise OR of the following: - * FLASH_PREFETCH (turns on prefetcher), - * FLASH_ICACHE (turns on instruction cache), - * FLASH_DCACHE (turns on data cache). - */ -static inline void flash_enable_features(uint32 feature_flags) { - FLASH_BASE->ACR |= feature_flags; -} - -/** - * @brief Deprecated. Use flash_enable_features(FLASH_PREFETCH) instead. - */ -static inline void flash_enable_prefetch(void) { - flash_enable_features(FLASH_PREFETCH); -} - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/STM32F1/system/libmaple/include/libmaple/fsmc.h b/STM32F1/system/libmaple/include/libmaple/fsmc.h deleted file mode 100644 index 6225fee..0000000 --- a/STM32F1/system/libmaple/include/libmaple/fsmc.h +++ /dev/null @@ -1,340 +0,0 @@ -/****************************************************************************** - * The MIT License - * - * Copyright (c) 2010 Bryan Newbold. - * - * Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, copy, - * modify, merge, publish, distribute, sublicense, and/or sell copies - * of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS - * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN - * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - *****************************************************************************/ - -/** - * @file libmaple/include/libmaple/fsmc.h - * @brief Flexible static memory controller support. - */ - -/* - * See ../notes/fsmc.txt for more info - */ - -#ifndef _LIBMAPLE_FSMC_H_ -#define _LIBMAPLE_FSMC_H_ - -#ifdef __cplusplus -extern "C"{ -#endif - -#include -#include - -#if !STM32_HAVE_FSMC -#error "FSMC is unavailable on your MCU" -#endif - -/* - * Register maps and devices - */ - -/** FSMC register map type */ -typedef struct fsmc_reg_map { - __io uint32 BCR1; /**< SRAM/NOR-Flash chip-select control register 1 */ - __io uint32 BTR1; /**< SRAM/NOR-Flash chip-select timing register 1 */ - __io uint32 BCR2; /**< SRAM/NOR-Flash chip-select control register 2 */ - __io uint32 BTR2; /**< SRAM/NOR-Flash chip-select timing register 2 */ - __io uint32 BCR3; /**< SRAM/NOR-Flash chip-select control register 3 */ - __io uint32 BTR3; /**< SRAM/NOR-Flash chip-select timing register 3 */ - __io uint32 BCR4; /**< SRAM/NOR-Flash chip-select control register 4 */ - __io uint32 BTR4; /**< SRAM/NOR-Flash chip-select timing register 4 */ - const uint8 RESERVED1[64]; /**< Reserved */ - __io uint32 PCR2; /**< PC Card/NAND Flash control register 2 */ - __io uint32 SR2; /**< FIFO status and interrupt register 2 */ - __io uint32 PMEM2; /**< Common memory space timing register 2 */ - __io uint32 PATT2; /**< Attribute memory space timing register 2 */ - const uint8 RESERVED2[4]; /**< Reserved */ - __io uint32 ECCR2; /**< ECC result register 2 */ - const uint8 RESERVED3[2]; - __io uint32 PCR3; /**< PC Card/NAND Flash control register 3 */ - __io uint32 SR3; /**< FIFO status and interrupt register 3 */ - __io uint32 PMEM3; /**< Common memory space timing register 3 */ - __io uint32 PATT3; /**< Attribute memory space timing register 3 */ - const uint32 RESERVED4; /**< Reserved */ - __io uint32 ECCR3; /**< ECC result register 3 */ - const uint8 RESERVED5[8]; /**< Reserved */ - __io uint32 PCR4; /**< PC Card/NAND Flash control register 4 */ - __io uint32 SR4; /**< FIFO status and interrupt register 4 */ - __io uint32 PMEM4; /**< Common memory space timing register 4 */ - __io uint32 PATT4; /**< Attribute memory space timing register 4 */ - __io uint32 PIO4; /**< I/O space timing register 4 */ - const uint8 RESERVED6[80]; /**< Reserved */ - __io uint32 BWTR1; /**< SRAM/NOR-Flash write timing register 1 */ - const uint32 RESERVED7; /**< Reserved */ - __io uint32 BWTR2; /**< SRAM/NOR-Flash write timing register 2 */ - const uint32 RESERVED8; /**< Reserved */ - __io uint32 BWTR3; /**< SRAM/NOR-Flash write timing register 3 */ - const uint32 RESERVED9; /**< Reserved */ - __io uint32 BWTR4; /**< SRAM/NOR-Flash write timing register 4 */ -} __attribute__((packed)) fsmc_reg_map; - -#define __FSMCB 0xA0000000 - -/** FSMC register map base pointer */ -#define FSMC_BASE ((struct fsmc_reg_map*)__FSMCB) - -/** FSMC NOR/PSRAM register map type */ -typedef struct fsmc_nor_psram_reg_map { - __io uint32 BCR; /**< Chip-select control register */ - __io uint32 BTR; /**< Chip-select timing register */ - const uint8 RESERVED[252]; /**< Reserved */ - __io uint32 BWTR; /**< Write timing register */ -} fsmc_nor_psram_reg_map; - -/** FSMC NOR/PSRAM base pointer 1 */ -#define FSMC_NOR_PSRAM1_BASE ((struct fsmc_nor_psram_reg_map*)__FSMCB) - -/** FSMC NOR/PSRAM base pointer 2 */ -#define FSMC_NOR_PSRAM2_BASE ((struct fsmc_nor_psram_reg_map*)(__FSMCB + 0x8)) - -/** FSMC NOR/PSRAM base pointer 3 */ -#define FSMC_NOR_PSRAM3_BASE ((struct fsmc_nor_psram_reg_map*)(__FSMCB + 0x10)) - -/** FSMC NOR/PSRAM base pointer 4 */ -#define FSMC_NOR_PSRAM4_BASE ((struct fsmc_nor_psram_reg_map*)(__FSMCB + 0x18)) - -/* - * Register bit definitions - */ - -/* NOR/PSRAM chip-select control registers */ - -#define FSMC_BCR_CBURSTRW_BIT 19 -#define FSMC_BCR_ASYNCWAIT_BIT 15 -#define FSMC_BCR_EXTMOD_BIT 14 -#define FSMC_BCR_WAITEN_BIT 13 -#define FSMC_BCR_WREN_BIT 12 -#define FSMC_BCR_WAITCFG_BIT 11 -#define FSMC_BCR_WRAPMOD_BIT 10 -#define FSMC_BCR_WAITPOL_BIT 9 -#define FSMC_BCR_BURSTEN_BIT 8 -#define FSMC_BCR_FACCEN_BIT 6 -#define FSMC_BCR_MUXEN_BIT 1 -#define FSMC_BCR_MBKEN_BIT 0 - -#define FSMC_BCR_CBURSTRW (1U << FSMC_BCR_CBURSTRW_BIT) -#define FSMC_BCR_ASYNCWAIT (1U << FSMC_BCR_ASYNCWAIT_BIT) -#define FSMC_BCR_EXTMOD (1U << FSMC_BCR_EXTMOD_BIT) -#define FSMC_BCR_WAITEN (1U << FSMC_BCR_WAITEN_BIT) -#define FSMC_BCR_WREN (1U << FSMC_BCR_WREN_BIT) -#define FSMC_BCR_WAITCFG (1U << FSMC_BCR_WAITCFG_BIT) -#define FSMC_BCR_WRAPMOD (1U << FSMC_BCR_WRAPMOD_BIT) -#define FSMC_BCR_WAITPOL (1U << FSMC_BCR_WAITPOL_BIT) -#define FSMC_BCR_BURSTEN (1U << FSMC_BCR_BURSTEN_BIT) -#define FSMC_BCR_FACCEN (1U << FSMC_BCR_FACCEN_BIT) -#define FSMC_BCR_MWID (0x3 << 4) -#define FSMC_BCR_MWID_8BITS (0x0 << 4) -#define FSMC_BCR_MWID_16BITS (0x1 << 4) -#define FSMC_BCR_MTYP (0x3 << 2) -#define FSMC_BCR_MTYP_SRAM (0x0 << 2) -#define FSMC_BCR_MTYP_PSRAM (0x1 << 2) -#define FSMC_BCR_MTYP_NOR_FLASH (0x2 << 2) -#define FSMC_BCR_MUXEN (1U << FSMC_BCR_MUXEN_BIT) -#define FSMC_BCR_MBKEN (1U << FSMC_BCR_MBKEN_BIT) - -/* SRAM/NOR-Flash chip-select timing registers */ - -#define FSMC_BTR_ACCMOD (0x3 << 28) -#define FSMC_BTR_ACCMOD_A (0x0 << 28) -#define FSMC_BTR_ACCMOD_B (0x1 << 28) -#define FSMC_BTR_ACCMOD_C (0x2 << 28) -#define FSMC_BTR_ACCMOD_D (0x3 << 28) -#define FSMC_BTR_DATLAT (0xF << 24) -#define FSMC_BTR_CLKDIV (0xF << 20) -#define FSMC_BTR_BUSTURN (0xF << 16) -#define FSMC_BTR_DATAST (0xFF << 8) -#define FSMC_BTR_ADDHLD (0xF << 4) -#define FSMC_BTR_ADDSET 0xF - -/* SRAM/NOR-Flash write timing registers */ - -#define FSMC_BWTR_ACCMOD (0x3 << 28) -#define FSMC_BWTR_ACCMOD_A (0x0 << 28) -#define FSMC_BWTR_ACCMOD_B (0x1 << 28) -#define FSMC_BWTR_ACCMOD_C (0x2 << 28) -#define FSMC_BWTR_ACCMOD_D (0x3 << 28) -#define FSMC_BWTR_DATLAT (0xF << 24) -#define FSMC_BWTR_CLKDIV (0xF << 20) -#define FSMC_BWTR_DATAST (0xFF << 8) -#define FSMC_BWTR_ADDHLD (0xF << 4) -#define FSMC_BWTR_ADDSET 0xF - -/* NAND Flash/PC Card controller registers */ - -#define FSMC_PCR_ECCEN_BIT 6 -#define FSMC_PCR_PTYP_BIT 3 -#define FSMC_PCR_PBKEN_BIT 2 -#define FSMC_PCR_PWAITEN_BIT 1 - -#define FSMC_PCR_ECCPS (0x7 << 17) -#define FSMC_PCR_ECCPS_256B (0x0 << 17) -#define FSMC_PCR_ECCPS_512B (0x1 << 17) -#define FSMC_PCR_ECCPS_1024B (0x2 << 17) -#define FSMC_PCR_ECCPS_2048B (0x3 << 17) -#define FSMC_PCR_ECCPS_4096B (0x4 << 17) -#define FSMC_PCR_ECCPS_8192B (0x5 << 17) -#define FSMC_PCR_TAR (0xF << 13) -#define FSMC_PCR_TCLR (0xF << 9) -#define FSMC_PCR_ECCEN (1U << FSMC_PCR_ECCEN_BIT) -#define FSMC_PCR_PWID (0x3 << 4) -#define FSMC_PCR_PWID_8BITS (0x0 << 4) -#define FSMC_PCR_PWID_16BITS (0x1 << 4) -#define FSMC_PCR_PTYP (1U << FSMC_PCR_PTYP_BIT) -#define FSMC_PCR_PTYP_PC_CF_PCMCIA (0x0 << FSMC_PCR_PTYP_BIT) -#define FSMC_PCR_PTYP_NAND (0x1 << FSMC_PCR_PTYP_BIT) -#define FSMC_PCR_PBKEN (1U << FSMC_PCR_PBKEN_BIT) -#define FSMC_PCR_PWAITEN (1U << FSMC_PCR_PWAITEN_BIT) - -/* FIFO status and interrupt registers */ - -#define FSMC_SR_FEMPT_BIT 6 -#define FSMC_SR_IFEN_BIT 5 -#define FSMC_SR_ILEN_BIT 4 -#define FSMC_SR_IREN_BIT 3 -#define FSMC_SR_IFS_BIT 2 -#define FSMC_SR_ILS_BIT 1 -#define FSMC_SR_IRS_BIT 0 - -#define FSMC_SR_FEMPT (1U << FSMC_SR_FEMPT_BIT) -#define FSMC_SR_IFEN (1U << FSMC_SR_IFEN_BIT) -#define FSMC_SR_ILEN (1U << FSMC_SR_ILEN_BIT) -#define FSMC_SR_IREN (1U << FSMC_SR_IREN_BIT) -#define FSMC_SR_IFS (1U << FSMC_SR_IFS_BIT) -#define FSMC_SR_ILS (1U << FSMC_SR_ILS_BIT) -#define FSMC_SR_IRS (1U << FSMC_SR_IRS_BIT) - -/* Common memory space timing registers */ - -#define FSMC_PMEM_MEMHIZ (0xFF << 24) -#define FSMC_PMEM_MEMHOLD (0xFF << 16) -#define FSMC_PMEM_MEMWAIT (0xFF << 8) -#define FSMC_PMEM_MEMSET 0xFF - -/* Attribute memory space timing registers */ - -#define FSMC_PATT_ATTHIZ (0xFF << 24) -#define FSMC_PATT_ATTHOLD (0xFF << 16) -#define FSMC_PATT_ATTWAIT (0xFF << 8) -#define FSMC_PATT_ATTSET 0xFF - -/* I/O space timing register 4 */ - -#define FSMC_PIO_IOHIZ (0xFF << 24) -#define FSMC_PIO_IOHOLD (0xFF << 16) -#define FSMC_PIO_IOWAIT (0xFF << 8) -#define FSMC_PIO_IOSET 0xFF - -/* - * Memory bank boundary addresses - */ - -/** - * @brief Void pointer to base address of FSMC memory bank 1 (NOR/PSRAM). - * - * This bank is split into 4 regions. Each region supports interfacing - * with 1 NOR Flash, SRAM, or PSRAM chip. The base addresses of these - * regions are FSMC_NOR_PSRAM_REGIONx, for x = 1, 2, 3, 4. - */ -#define FSMC_BANK1 ((void*)0x60000000) - -/** - * @brief Void pointer to base address of FSMC memory bank 1, region 1 - * (NOR/PSRAM). - */ -#define FSMC_NOR_PSRAM_REGION1 FSMC_BANK1 - -/** - * @brief Void pointer to base address of FSMC memory bank 1, region 2 - * (NOR/PSRAM). - */ -#define FSMC_NOR_PSRAM_REGION2 ((void*)0x64000000) - -/** - * @brief Void pointer to base address of FSMC memory bank 1, region 3 - * (NOR/PSRAM). - */ -#define FSMC_NOR_PSRAM_REGION3 ((void*)0x68000000) - -/** - * @brief Void pointer to base address of FSMC memory bank 1, region 4 - * (NOR/PSRAM). - */ -#define FSMC_NOR_PSRAM_REGION4 ((void*)0x6C000000) - -/** Void pointer to base address of FSMC memory bank 2 (NAND Flash). */ -#define FSMC_BANK2 ((void*)0x70000000) - -/** Void pointer to base address of FSMC memory bank 3 (NAND Flash). */ -#define FSMC_BANK3 ((void*)0x80000000) - -/** - * @brief Void pointer to base address of FSMC memory bank 4 (PC card - * devices). - */ -#define FSMC_BANK4 ((void*)0x90000000) - -/* - * SRAM/NOR Flash routines - */ - -/** - * @brief Configure FSMC GPIOs for use with SRAM. - */ -void fsmc_sram_init_gpios(void); - -/** - * Set the DATAST bits in the given NOR/PSRAM register map's - * chip-select timing register (FSMC_BTR). - * - * @param regs NOR Flash/PSRAM register map whose chip-select timing - * register to set. - * @param datast Value to use for DATAST bits. - */ -static inline void fsmc_nor_psram_set_datast(fsmc_nor_psram_reg_map *regs, - uint8 datast) { - regs->BTR &= ~FSMC_BTR_DATAST; - regs->BTR |= datast << 8; -} - -/** - * Set the ADDHLD bits in the given NOR/PSRAM register map's chip - * select timing register (FSMC_BTRx). - * - * @param regs NOR Flash/PSRAM register map whose chip-select timing - * register to set. - * @param addset Value to use for ADDSET bits. - */ -static inline void fsmc_nor_psram_set_addset(fsmc_nor_psram_reg_map *regs, - uint8 addset) { - regs->BTR &= ~FSMC_BTR_ADDSET; - regs->BTR |= addset & 0xF; -} - -#ifdef __cplusplus -} /* extern "C" */ -#endif - -#endif diff --git a/STM32F1/system/libmaple/include/libmaple/gpio.h b/STM32F1/system/libmaple/include/libmaple/gpio.h deleted file mode 100644 index 013b3ae..0000000 --- a/STM32F1/system/libmaple/include/libmaple/gpio.h +++ /dev/null @@ -1,123 +0,0 @@ -/****************************************************************************** - * The MIT License - * - * Copyright (c) 2010 Perry Hung. - * Copyright (c) 2011, 2012 LeafLabs, LLC. - * - * Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, copy, - * modify, merge, publish, distribute, sublicense, and/or sell copies - * of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS - * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN - * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. -*****************************************************************************/ - -/** - * @file libmaple/include/libmaple/gpio.h - * @brief General Purpose I/O (GPIO) interace. - */ - -#ifndef _LIBMAPLE_GPIO_H_ -#define _LIBMAPLE_GPIO_H_ - -#ifdef __cplusplus -extern "C"{ -#endif - -/* - * Note: Series header must define: - * - enum gpio_pin_mode (TODO think harder about portability here) - */ - -// roger clark. replaced with line below #include -#include "stm32f1/include/series/gpio.h" -#include -#include -#include - -/* - * Device type - */ - -/** GPIO device type */ -typedef struct gpio_dev { - gpio_reg_map *regs; /**< Register map */ - rcc_clk_id clk_id; /**< RCC clock information */ - /** - * @brief (Deprecated) External interrupt port. - * Instead of dev->exti_port, use gpio_exti_port(dev). - */ - exti_cfg exti_port; -} gpio_dev; - -/* - * Portable routines - */ - -void gpio_init(gpio_dev *dev); -void gpio_init_all(void); -/* TODO flags argument version? */ -void gpio_set_mode(gpio_dev *dev, uint8 pin, gpio_pin_mode mode); - -/** - * @brief Get a GPIO port's corresponding EXTI port configuration. - * @param dev GPIO port whose exti_cfg to return. - */ -static inline exti_cfg gpio_exti_port(gpio_dev *dev) { - return (exti_cfg)(EXTI_PA + (dev->clk_id - RCC_GPIOA)); -} - -/** - * Set or reset a GPIO pin. - * - * Pin must have previously been configured to output mode. - * - * @param dev GPIO device whose pin to set. - * @param pin Pin on to set or reset - * @param val If true, set the pin. If false, reset the pin. - */ -static inline void gpio_write_bit(gpio_dev *dev, uint8 pin, uint8 val) { - val = !val; /* "set" bits are lower than "reset" bits */ - dev->regs->BSRR = (1U << pin) << (16 * val); -} - -/** - * Determine whether or not a GPIO pin is set. - * - * Pin must have previously been configured to input mode. - * - * @param dev GPIO device whose pin to test. - * @param pin Pin on dev to test. - * @return True if the pin is set, false otherwise. - */ -static inline uint32 gpio_read_bit(gpio_dev *dev, uint8 pin) { - return dev->regs->IDR & (1U << pin); -} - -/** - * Toggle a pin configured as output push-pull. - * @param dev GPIO device. - * @param pin Pin on dev to toggle. - */ -static inline void gpio_toggle_bit(gpio_dev *dev, uint8 pin) { - dev->regs->ODR = dev->regs->ODR ^ (1U << pin); -} - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/STM32F1/system/libmaple/include/libmaple/i2c.h b/STM32F1/system/libmaple/include/libmaple/i2c.h deleted file mode 100644 index 92ec29e..0000000 --- a/STM32F1/system/libmaple/include/libmaple/i2c.h +++ /dev/null @@ -1,414 +0,0 @@ -/****************************************************************************** - * The MIT License - * - * Copyright (c) 2010 Perry Hung. - * Copyright (c) 2012 LeafLabs, LLC. - * - * Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, copy, - * modify, merge, publish, distribute, sublicense, and/or sell copies - * of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS - * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN - * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - *****************************************************************************/ - -/** - * @file libmaple/include/libmaple/i2c.h - * @brief Inter-Integrated Circuit (I2C) peripheral support - * - * Currently master-only. Usage notes: - * - * - Enable an I2C device with i2c_master_enable(). - * - Initialize an array of struct i2c_msg to suit the bus - * transactions (reads/writes) you wish to perform. - * - Call i2c_master_xfer() to do the work. - */ - -#ifndef _LIBMAPLE_I2C_H_ -#define _LIBMAPLE_I2C_H_ - -#ifdef __cplusplus -extern "C" { -#endif - -/* - * Series header must provide: - * - * - uint32 _i2c_bus_clk(i2c_dev*): Clock frequency of dev's bus, in - * MHz. (This is for internal use only). - * - * - (optional) _I2C_HAVE_IRQ_FIXUP: Leave undefined, or define to 1. - * This is for internal use only. It's a hack to work around a - * silicon bug related to I2C IRQ pre-emption on some targets. If 1, - * the series header must also declare and implement a routine with - * this signature (it may also be provided as a macro): - * - * void _i2c_irq_priority_fixup(i2c_dev*) - * - * This will be called by i2c_enable_irq() before actually enabling - * I2C interrupts. - * - * - Reg. map base pointers, device pointer declarations. - */ - - /* Roger clark. Replaced with line below #include */ -#include "stm32f1/include/series/i2c.h" -#include - -#include -#include -#include -#include - -/** I2C register map type */ -typedef struct i2c_reg_map { - __io uint32 CR1; /**< Control register 1 */ - __io uint32 CR2; /**< Control register 2 */ - __io uint32 OAR1; /**< Own address register 1 */ - __io uint32 OAR2; /**< Own address register 2 */ - __io uint32 DR; /**< Data register */ - __io uint32 SR1; /**< Status register 1 */ - __io uint32 SR2; /**< Status register 2 */ - __io uint32 CCR; /**< Clock control register */ - __io uint32 TRISE; /**< TRISE (rise time) register */ -} i2c_reg_map; - -/** - * @brief I2C message type - */ -typedef struct i2c_msg { - uint16 addr; /**< Address */ - -#define I2C_MSG_READ 0x1 -#define I2C_MSG_10BIT_ADDR 0x2 - /** - * Bitwise OR of: - * - I2C_MSG_READ (write is default) - * - I2C_MSG_10BIT_ADDR (7-bit is default) */ - uint16 flags; - - uint16 length; /**< Message length */ - uint16 xferred; /**< Messages transferred */ - uint8 *data; /**< Data */ -} i2c_msg; - -/* - * Register bit definitions - */ - -/* Control register 1 */ - -#define I2C_CR1_SWRST (1U << 15) // Software reset -#define I2C_CR1_ALERT (1U << 13) // SMBus alert -#define I2C_CR1_PEC (1U << 12) // Packet error checking -#define I2C_CR1_POS (1U << 11) // Acknowledge/PEC position -#define I2C_CR1_ACK (1U << 10) // Acknowledge enable -#define I2C_CR1_STOP (1U << 9) // Stop generation -#define I2C_CR1_START (1U << 8) // Start generation -#define I2C_CR1_NOSTRETCH (1U << 7) // Clock stretching disable -#define I2C_CR1_ENGC (1U << 6) // General call enable -#define I2C_CR1_ENPEC (1U << 5) // PEC enable -#define I2C_CR1_ENARP (1U << 4) // ARP enable -#define I2C_CR1_SMBTYPE (1U << 3) // SMBus type -#define I2C_CR1_SMBTYPE_DEVICE (0U << 3) // SMBus type: device -#define I2C_CR1_SMBTYPE_HOST (1U << 3) // SMBus type: host -#define I2C_CR1_SMBUS (1U << 1) // SMBus mode -#define I2C_CR1_SMBUS_I2C (0U << 1) // SMBus mode: I2C -#define I2C_CR1_SMBUS_SMBUS (1U << 1) // SMBus mode: SMBus -#define I2C_CR1_PE (1U << 0) // Peripheral Enable - -/* Control register 2 */ - -#define I2C_CR2_LAST (1U << 12) // DMA last transfer -#define I2C_CR2_DMAEN (1U << 11) // DMA requests enable -#define I2C_CR2_ITBUFEN (1U << 10) // Buffer interrupt enable -#define I2C_CR2_ITEVTEN (1U << 9) // Event interupt enable -#define I2C_CR2_ITERREN (1U << 8) // Error interupt enable -#define I2C_CR2_FREQ 0x3F // Peripheral input frequency - -/* Own address register 1 */ - -#define I2C_OAR1_ADDMODE (1U << 15) // Addressing mode -#define I2C_OAR1_ADDMODE_7_BIT (0U << 15) // Addressing mode: 7-bit -#define I2C_OAR1_ADDMODE_10_BIT (1U << 15) // Addressing mode: 10-bit -#define I2C_OAR1_ADD 0x3FF // Interface address - -/* Own address register 2 */ - -#define I2C_OAR2_ADD2 0xFE // Interface address -#define I2C_OAR2_ENDUAL 1U // Dual addressing mode enable - -/* Status register 1 */ - -#define I2C_SR1_SMBALERT (1U << 15) // SMBus alert -#define I2C_SR1_TIMEOUT (1U << 14) // Timeout or Tlow error -#define I2C_SR1_PECERR (1U << 12) // PEC Error in reception -#define I2C_SR1_OVR (1U << 11) // Overrun/underrun -#define I2C_SR1_AF (1U << 10) // Acknowledge failure -#define I2C_SR1_ARLO (1U << 9) // Arbitration lost -#define I2C_SR1_BERR (1U << 8) // Bus error -#define I2C_SR1_TXE (1U << 7) // Data register empty -#define I2C_SR1_RXNE (1U << 6) // Data register not empty -#define I2C_SR1_STOPF (1U << 4) // Stop detection -#define I2C_SR1_ADD10 (1U << 3) // 10-bit header sent -#define I2C_SR1_BTF (1U << 2) // Byte transfer finished -#define I2C_SR1_ADDR (1U << 1) // Address sent/matched -#define I2C_SR1_SB (1U << 0) // Start bit - -/* Status register 2 */ - -#define I2C_SR2_PEC 0xFF00 // Packet error checking register -#define I2C_SR2_DUALF (1U << 7) // Dual flag -#define I2C_SR2_SMBHOST (1U << 6) // SMBus host header -#define I2C_SR2_SMBDEFAULT (1U << 5) // SMBus device default address -#define I2C_SR2_GENCALL (1U << 4) // General call address -#define I2C_SR2_TRA (1U << 2) // Transmitter/receiver -#define I2C_SR2_BUSY (1U << 1) // Bus busy -#define I2C_SR2_MSL (1U << 0) // Master/slave - -/* Clock control register */ - -#define I2C_CCR_FS (1U << 15) // Fast mode selection -#define I2C_CCR_DUTY (1U << 14) // Fast mode duty cycle -#define I2C_CCR_DUTY_2_1 (0U << 14) // Fast mode duty: 2/1 -#define I2C_CCR_DUTY_16_9 (1U << 14) // Fast mode duty: 16/9 -#define I2C_CCR_CCR 0xFFF // Clock control bits - -/* - * Convenience routines - */ - -/* Main I2C API */ - -/* I2C enable options */ -#define I2C_FAST_MODE 0x1 // 400 khz -#define I2C_DUTY_16_9 0x2 // 16/9 duty ratio -/* Flag 0x4 is reserved; DO NOT USE. */ -#define I2C_BUS_RESET 0x8 // Perform a bus reset -void i2c_master_enable(i2c_dev *dev, uint32 flags); - -#define I2C_ERROR_PROTOCOL (-1) -#define I2C_ERROR_TIMEOUT (-2) -int32 i2c_master_xfer(i2c_dev *dev, i2c_msg *msgs, uint16 num, uint32 timeout); - -void i2c_bus_reset(const i2c_dev *dev); - -/** - * @brief Disable an I2C device - * - * This function disables the corresponding peripheral and marks dev's - * state as I2C_STATE_DISABLED. - * - * @param dev Device to disable. - */ -static inline void i2c_disable(i2c_dev *dev) { - dev->regs->CR1 &= ~I2C_CR1_PE; - dev->state = I2C_STATE_DISABLED; -} - -/* Start/stop conditions */ - -/** - * @brief Generate a start condition on the bus. - * @param dev I2C device - */ -static inline void i2c_start_condition(i2c_dev *dev) { - uint32 cr1; - while ((cr1 = dev->regs->CR1) & (I2C_CR1_START | - I2C_CR1_STOP | - I2C_CR1_PEC)) { - ; - } - dev->regs->CR1 |= I2C_CR1_START; -} - -/** - * @brief Generate a stop condition on the bus - * @param dev I2C device - */ -static inline void i2c_stop_condition(i2c_dev *dev) { - uint32 cr1; - while ((cr1 = dev->regs->CR1) & (I2C_CR1_START | - I2C_CR1_STOP | - I2C_CR1_PEC)) { - ; - } - dev->regs->CR1 |= I2C_CR1_STOP; - while ((cr1 = dev->regs->CR1) & (I2C_CR1_START | - I2C_CR1_STOP | - I2C_CR1_PEC)) { - ; - } - -} - -/* IRQ enable/disable */ - -#ifndef _I2C_HAVE_IRQ_FIXUP -/* The series header provides this if _I2C_HAVE_IRQ_FIXUP is defined, - * but we need it either way. */ -#define _i2c_irq_priority_fixup(dev) ((void)0) -#endif - -#define I2C_IRQ_ERROR I2C_CR2_ITERREN -#define I2C_IRQ_EVENT I2C_CR2_ITEVTEN -#define I2C_IRQ_BUFFER I2C_CR2_ITBUFEN -/** - * @brief Enable one or more I2C interrupts - * @param dev I2C device - * @param irqs Bitwise or of: - * I2C_IRQ_ERROR (error interrupt), - * I2C_IRQ_EVENT (event interrupt), and - * I2C_IRQ_BUFFER (buffer interrupt). - */ -static inline void i2c_enable_irq(i2c_dev *dev, uint32 irqs) { - _i2c_irq_priority_fixup(dev); - dev->regs->CR2 |= irqs; -} - -/** - * @brief Disable one or more I2C interrupts - * @param dev I2C device - * @param irqs Bitwise or of: - * I2C_IRQ_ERROR (error interrupt), - * I2C_IRQ_EVENT (event interrupt), and - * I2C_IRQ_BUFFER (buffer interrupt). - */ -static inline void i2c_disable_irq(i2c_dev *dev, uint32 irqs) { - dev->regs->CR2 &= ~irqs; -} - -/* ACK/NACK */ - -/** - * @brief Enable I2C acknowledgment - * @param dev I2C device - */ -static inline void i2c_enable_ack(i2c_dev *dev) { - dev->regs->CR1 |= I2C_CR1_ACK; -} - -/** - * @brief Disable I2C acknowledgment - * @param dev I2C device - */ -static inline void i2c_disable_ack(i2c_dev *dev) { - dev->regs->CR1 &= ~I2C_CR1_ACK; -} - -/* GPIO control */ - -/** - * @brief Configure device GPIOs. - * - * Configure GPIO bits dev->sda_pin and dev->scl_pin on GPIO device - * dev->gpio_port for use with I2C device dev. - * - * @param dev I2C Device - * @see i2c_release_gpios() - */ -extern void i2c_config_gpios(const i2c_dev *dev); - -/** - * @brief Release GPIOs controlling an I2C bus - * - * Releases the I2C bus controlled by dev as master, and disconnects - * GPIO bits dev->sda_pin and dev->scl_pin on GPIO device - * dev->gpio_port from I2C device dev. - * - * @param dev I2C device - * @see i2c_config_gpios() - */ -extern void i2c_master_release_bus(const i2c_dev *dev); - -/* Miscellaneous low-level routines */ - -void i2c_init(i2c_dev *dev); - -/** - * @brief Turn on an I2C peripheral - * @param dev Device to enable - */ -static inline void i2c_peripheral_enable(i2c_dev *dev) { - dev->regs->CR1 |= I2C_CR1_PE; -} - -/** - * @brief Turn off an I2C peripheral - * @param dev Device to turn off - */ -static inline void i2c_peripheral_disable(i2c_dev *dev) { - dev->regs->CR1 &= ~I2C_CR1_PE; -} - -/** - * @brief Fill transmit register - * @param dev I2C device - * @param byte Byte to write - */ -static inline void i2c_write(i2c_dev *dev, uint8 byte) { - dev->regs->DR = byte; -} - -/** - * @brief Set input clock frequency, in MHz - * @param dev I2C device - * @param freq Frequency, in MHz. This must be at least 2, and at most - * the APB frequency of dev's bus. (For example, if - * rcc_dev_clk(dev) == RCC_APB1, freq must be at most - * PCLK1, in MHz). There is an additional limit of 46 MHz. - */ -static inline void i2c_set_input_clk(i2c_dev *dev, uint32 freq) { -#define I2C_MAX_FREQ_MHZ 46 - ASSERT(2 <= freq && freq <= _i2c_bus_clk(dev) && freq <= I2C_MAX_FREQ_MHZ); - uint32 cr2 = dev->regs->CR2; - cr2 &= ~I2C_CR2_FREQ; - cr2 |= freq; - dev->regs->CR2 = freq; -#undef I2C_MAX_FREQ_MHZ -} - -/** - * @brief Set I2C clock control register. - * - * See the chip reference manual for the details. - * - * @param dev I2C device - * @param val Value to use for clock control register (in - * Fast/Standard mode) - */ -static inline void i2c_set_clk_control(i2c_dev *dev, uint32 val) { - uint32 ccr = dev->regs->CCR; - ccr &= ~I2C_CCR_CCR; - ccr |= val; - dev->regs->CCR = ccr; -} - -/** - * @brief Set SCL rise time - * @param dev I2C device - * @param trise Maximum rise time in fast/standard mode (see chip - * reference manual for the relevant formulas). - */ -static inline void i2c_set_trise(i2c_dev *dev, uint32 trise) { - dev->regs->TRISE = trise; -} - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/STM32F1/system/libmaple/include/libmaple/i2c_common.h b/STM32F1/system/libmaple/include/libmaple/i2c_common.h deleted file mode 100644 index 17cabe3..0000000 --- a/STM32F1/system/libmaple/include/libmaple/i2c_common.h +++ /dev/null @@ -1,93 +0,0 @@ -/****************************************************************************** - * The MIT License - * - * Copyright (c) 2010 Perry Hung (from ). - * Copyright (c) 2012 LeafLabs, LLC. - * - * Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, copy, - * modify, merge, publish, distribute, sublicense, and/or sell copies - * of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS - * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN - * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - *****************************************************************************/ - -/** - * @file libmaple/include/libmaple/i2c_common.h - * @author Marti Bolivar - * @brief This file is an implementation detail - * - * CONTENTS UNSTABLE. The existence of this file is an implementation - * detail. Never include it directly. If you need something from - * here, include instead. - */ - -#ifndef _LIBMAPLE_I2C_COMMON_H_ -#define _LIBMAPLE_I2C_COMMON_H_ - -#include -#include -#include - -struct gpio_dev; -struct i2c_reg_map; -struct i2c_msg; - -/** I2C device states */ -typedef enum i2c_state { - I2C_STATE_DISABLED = 0, /**< Disabled */ - I2C_STATE_IDLE = 1, /**< Idle */ - I2C_STATE_XFER_DONE = 2, /**< Done with transfer */ - I2C_STATE_BUSY = 3, /**< Busy */ - I2C_STATE_ERROR = -1 /**< Error occurred */ -} i2c_state; - -/** - * @brief I2C device type. - */ -typedef struct i2c_dev { - struct i2c_reg_map *regs; /**< Register map */ - struct i2c_msg *msg; /**< Messages */ - uint32 error_flags; /**< Error flags, set on I2C error condition */ - volatile uint32 timestamp; /**< For internal use */ - - /** - * @brief Deprecated. Use .scl_port or .sda_port instead. - * If non-null, this will be used as SDA, SCL pins' GPIO port. If - * null, then .sda_port will be used for SDA, and .sda_port for - * SDA. */ - struct gpio_dev *gpio_port; - - /** - * @brief SDA GPIO device (but see .gpio_port). - */ - struct gpio_dev *sda_port; - - /** - * @brief SCL GPIO device (but see .gpio_port). - */ - struct gpio_dev *scl_port; - - uint16 msgs_left; /**< Messages left */ - uint8 sda_pin; /**< SDA bit on gpio_port */ - uint8 scl_pin; /**< SCL bit on gpio_port */ - rcc_clk_id clk_id; /**< RCC clock information */ - nvic_irq_num ev_nvic_line; /**< Event IRQ number */ - nvic_irq_num er_nvic_line; /**< Error IRQ number */ - volatile i2c_state state; /**< Device state */ -} i2c_dev; - -#endif diff --git a/STM32F1/system/libmaple/include/libmaple/iwdg.h b/STM32F1/system/libmaple/include/libmaple/iwdg.h deleted file mode 100644 index 3a16c55..0000000 --- a/STM32F1/system/libmaple/include/libmaple/iwdg.h +++ /dev/null @@ -1,115 +0,0 @@ -/****************************************************************************** - * The MIT License - * - * Copyright (c) 2010 Michael Hope. - * - * Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, copy, - * modify, merge, publish, distribute, sublicense, and/or sell copies - * of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS - * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN - * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - *****************************************************************************/ - -/** - * @file libmaple/include/libmaple/iwdg.h - * @author Michael Hope, Marti Bolivar - * @brief Independent watchdog support. - * - * To use the independent watchdog, first call iwdg_init() with the - * appropriate prescaler and IWDG counter reload values for your - * application. Afterwards, you must periodically call iwdg_feed() - * before the IWDG counter reaches 0 to reset the counter to its - * reload value. If you do not, the chip will reset. - * - * Once started, the independent watchdog cannot be turned off. - */ - -#ifndef _LIBMAPLE_IWDG_H_ -#define _LIBMAPLE_IWDG_H_ - -#ifdef __cplusplus -extern "C"{ -#endif - -#include - -/* - * Register map - */ - -/** Independent watchdog register map type. */ -typedef struct iwdg_reg_map { - __io uint32 KR; /**< Key register. */ - __io uint32 PR; /**< Prescaler register. */ - __io uint32 RLR; /**< Reload register. */ - __io uint32 SR; /**< Status register */ -} iwdg_reg_map; - -/** Independent watchdog base pointer */ -#define IWDG_BASE ((struct iwdg_reg_map*)0x40003000) - -/* - * Register bit definitions - */ - -/* Key register */ - -#define IWDG_KR_UNLOCK 0x5555 -#define IWDG_KR_FEED 0xAAAA -#define IWDG_KR_START 0xCCCC - -/* Prescaler register */ - -#define IWDG_PR_DIV_4 0x0 -#define IWDG_PR_DIV_8 0x1 -#define IWDG_PR_DIV_16 0x2 -#define IWDG_PR_DIV_32 0x3 -#define IWDG_PR_DIV_64 0x4 -#define IWDG_PR_DIV_128 0x5 -#define IWDG_PR_DIV_256 0x6 - -/* Status register */ - -#define IWDG_SR_RVU_BIT 1 -#define IWDG_SR_PVU_BIT 0 - -#define IWDG_SR_RVU (1U << IWDG_SR_RVU_BIT) -#define IWDG_SR_PVU (1U << IWDG_SR_PVU_BIT) - -/** - * @brief Independent watchdog prescalers. - * - * These divide the 40 kHz IWDG clock. - */ -typedef enum iwdg_prescaler { - IWDG_PRE_4 = IWDG_PR_DIV_4, /**< Divide by 4 */ - IWDG_PRE_8 = IWDG_PR_DIV_8, /**< Divide by 8 */ - IWDG_PRE_16 = IWDG_PR_DIV_16, /**< Divide by 16 */ - IWDG_PRE_32 = IWDG_PR_DIV_32, /**< Divide by 32 */ - IWDG_PRE_64 = IWDG_PR_DIV_64, /**< Divide by 64 */ - IWDG_PRE_128 = IWDG_PR_DIV_128, /**< Divide by 128 */ - IWDG_PRE_256 = IWDG_PR_DIV_256 /**< Divide by 256 */ -} iwdg_prescaler; - -void iwdg_init(iwdg_prescaler prescaler, uint16 reload); -void iwdg_feed(void); - -#ifdef __cplusplus -} // extern "C" -#endif - -#endif diff --git a/STM32F1/system/libmaple/include/libmaple/libmaple.h b/STM32F1/system/libmaple/include/libmaple/libmaple.h deleted file mode 100644 index c9034d7..0000000 --- a/STM32F1/system/libmaple/include/libmaple/libmaple.h +++ /dev/null @@ -1,48 +0,0 @@ -/****************************************************************************** - * The MIT License - * - * Copyright (c) 2010 Perry Hung. - * - * Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, copy, - * modify, merge, publish, distribute, sublicense, and/or sell copies - * of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS - * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN - * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - *****************************************************************************/ - -/** - * @file libmaple/include/libmaple/libmaple.h - * @brief General include file for libmaple - */ - -#ifndef _LIBMAPLE_LIBMAPLE_H_ -#define _LIBMAPLE_LIBMAPLE_H_ - -#ifdef __cplusplus -extern "C" { -#endif - -#include -#include -#include -#include - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/STM32F1/system/libmaple/include/libmaple/libmaple_types.h b/STM32F1/system/libmaple/include/libmaple/libmaple_types.h deleted file mode 100644 index 882a910..0000000 --- a/STM32F1/system/libmaple/include/libmaple/libmaple_types.h +++ /dev/null @@ -1,75 +0,0 @@ -/****************************************************************************** - * The MIT License - * - * Copyright (c) 2010 Perry Hung. - * - * Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, copy, - * modify, merge, publish, distribute, sublicense, and/or sell copies - * of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS - * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN - * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - *****************************************************************************/ - -/** - * @file libmaple/include/libmaple/libmaple_types.h - * - * @brief libmaple's types, and operations on types. - */ - -#ifndef _LIBMAPLE_LIBMAPLE_TYPES_H_ -#define _LIBMAPLE_LIBMAPLE_TYPES_H_ - -#include - -#ifdef __cplusplus -extern "C" { -#endif - -typedef unsigned char uint8; -typedef unsigned short uint16; -typedef uint32_t uint32; -typedef unsigned long long uint64; - -typedef signed char int8; -typedef short int16; -typedef int int32; -typedef long long int64; - -typedef void (*voidFuncPtr)(void); -typedef void (*voidArgumentFuncPtr)(void *); - -#define __io volatile -#define __attr_flash __attribute__((section (".USER_FLASH"))) -#define __packed __attribute__((__packed__)) -#define __deprecated __attribute__((__deprecated__)) -#define __weak __attribute__((weak)) -#define __always_inline inline __attribute__((always_inline)) -#define __unused __attribute__((unused)) - -#ifndef NULL -#define NULL 0 -#endif - -#ifndef offsetof -#define offsetof(type, member) __builtin_offsetof(type, member) -#endif - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/STM32F1/system/libmaple/include/libmaple/nvic.h b/STM32F1/system/libmaple/include/libmaple/nvic.h deleted file mode 100644 index 4642363..0000000 --- a/STM32F1/system/libmaple/include/libmaple/nvic.h +++ /dev/null @@ -1,157 +0,0 @@ -/****************************************************************************** - * The MIT License - * - * Copyright (c) 2010 Perry Hung. - * - * Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, copy, - * modify, merge, publish, distribute, sublicense, and/or sell copies - * of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS - * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN - * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - *****************************************************************************/ - -/** - * @file libmaple/include/libmaple/nvic.h - * @brief Nested vectored interrupt controller support. - * - * Basic usage: - * - * @code - * // Initialise the interrupt controller and point to the vector - * // table at the start of flash. - * nvic_init(0x08000000, 0); - * // Bind in a timer interrupt handler - * timer_attach_interrupt(TIMER_CC1_INTERRUPT, handler); - * // Optionally set the priority - * nvic_irq_set_priority(NVIC_TIMER1_CC, 5); - * // All done, enable all interrupts - * nvic_globalirq_enable(); - * @endcode - */ - -#ifndef _LIBMAPLE_NVIC_H_ -#define _LIBMAPLE_NVIC_H_ - -#ifdef __cplusplus -extern "C"{ -#endif - -#include -#include - -/** NVIC register map type. */ -typedef struct nvic_reg_map { - __io uint32 ISER[8]; /**< Interrupt Set Enable Registers */ - /** Reserved */ - uint32 RESERVED0[24]; - - __io uint32 ICER[8]; /**< Interrupt Clear Enable Registers */ - /** Reserved */ - uint32 RESERVED1[24]; - - __io uint32 ISPR[8]; /**< Interrupt Set Pending Registers */ - /** Reserved */ - uint32 RESERVED2[24]; - - __io uint32 ICPR[8]; /**< Interrupt Clear Pending Registers */ - /** Reserved */ - uint32 RESERVED3[24]; - - __io uint32 IABR[8]; /**< Interrupt Active bit Registers */ - /** Reserved */ - uint32 RESERVED4[56]; - - __io uint8 IP[240]; /**< Interrupt Priority Registers */ - /** Reserved */ - uint32 RESERVED5[644]; - - __io uint32 STIR; /**< Software Trigger Interrupt Registers */ -} nvic_reg_map; - -/** NVIC register map base pointer. */ -#define NVIC_BASE ((struct nvic_reg_map*)0xE000E100) - -/* - * Note: The series header must define enum nvic_irq_num, which gives - * descriptive names to the interrupts and exceptions from NMI (-14) - * to the largest interrupt available in the series, where the value - * for nonnegative enumerators corresponds to its position in the - * vector table. - * - * It also must define a static inline nvic_irq_disable_all(), which - * writes 0xFFFFFFFF to all ICE registers available in the series. (We - * place the include here to give the series header access to - * NVIC_BASE, in order to let it do so). - */ - -/* Roger clark. Replaced with line below #include */ -#include "stm32f1/include/series/nvic.h" - -void nvic_init(uint32 address, uint32 offset); -void nvic_set_vector_table(uint32 address, uint32 offset); -void nvic_irq_set_priority(nvic_irq_num irqn, uint8 priority); -void nvic_sys_reset(); - -/** - * Enables interrupts and configurable fault handlers (clear PRIMASK). - */ -static __always_inline void nvic_globalirq_enable() { - asm volatile("cpsie i"); -} - -/** - * Disable interrupts and configurable fault handlers (set PRIMASK). - */ -static __always_inline void nvic_globalirq_disable() { - asm volatile("cpsid i"); -} - -/** - * @brief Enable interrupt irq_num - * @param irq_num Interrupt to enable - */ -static inline void nvic_irq_enable(nvic_irq_num irq_num) { - if (irq_num < 0) { - return; - } - NVIC_BASE->ISER[irq_num / 32] = BIT(irq_num % 32); -} - -/** - * @brief Disable interrupt irq_num - * @param irq_num Interrupt to disable - */ -static inline void nvic_irq_disable(nvic_irq_num irq_num) { - if (irq_num < 0) { - return; - } - NVIC_BASE->ICER[irq_num / 32] = BIT(irq_num % 32); -} - -/** - * @brief Quickly disable all interrupts. - * - * Calling this function is significantly faster than calling - * nvic_irq_disable() in a loop. - */ -static inline void nvic_irq_disable_all(void); - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/STM32F1/system/libmaple/include/libmaple/pwr.h b/STM32F1/system/libmaple/include/libmaple/pwr.h deleted file mode 100644 index f711c7c..0000000 --- a/STM32F1/system/libmaple/include/libmaple/pwr.h +++ /dev/null @@ -1,117 +0,0 @@ -/****************************************************************************** - * The MIT License - * - * Copyright (c) 2010 LeafLabs, LLC. - * - * Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, copy, - * modify, merge, publish, distribute, sublicense, and/or sell copies - * of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS - * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN - * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - *****************************************************************************/ - -/** - * @file libmaple/include/libmaple/pwr.h - * @brief Power control (PWR). - */ - -#ifndef _LIBMAPLE_PWR_H_ -#define _LIBMAPLE_PWR_H_ - -#ifdef __cplusplus -extern "C" { -#endif - -#include - /* Roger clark. Replaced with line below #include */ -#include "stm32f1/include/series/pwr.h" - - -/** Power interface register map. */ -typedef struct pwr_reg_map { - __io uint32 CR; /**< Control register */ - __io uint32 CSR; /**< Control and status register */ -} pwr_reg_map; - -/** Power peripheral register map base pointer. */ -#define PWR_BASE ((struct pwr_reg_map*)0x40007000) - -/* - * Register bit definitions - */ - -/* Control register */ - -/** Disable backup domain write protection bit */ -#define PWR_CR_DBP_BIT 8 -/** Power voltage detector enable bit */ -#define PWR_CR_PVDE_BIT 4 -/** Clear standby flag bit */ -#define PWR_CR_CSBF_BIT 3 -/** Clear wakeup flag bit */ -#define PWR_CR_CWUF_BIT 2 -/** Power down deepsleep bit */ -#define PWR_CR_PDDS_BIT 1 -/** Low-power deepsleep bit */ -#define PWR_CR_LPDS_BIT 0 - -/** Disable backup domain write protection */ -#define PWR_CR_DBP (1U << PWR_CR_DBP_BIT) -/** Power voltage detector (PVD) level selection */ -#define PWR_CR_PLS (0x7 << 5) -/** Power voltage detector enable */ -#define PWR_CR_PVDE (1U << PWR_CR_PVDE_BIT) -/** Clear standby flag */ -#define PWR_CR_CSBF (1U << PWR_CR_CSBF_BIT) -/** Clear wakeup flag */ -#define PWR_CR_CWUF (1U << PWR_CR_CWUF_BIT) -/** Power down deepsleep */ -#define PWR_CR_PDDS (1U << PWR_CR_PDDS_BIT) -/** Low-power deepsleep */ -#define PWR_CR_LPDS (1U << PWR_CR_LPDS_BIT) - -/* Control and status register */ - -/** Enable wakeup pin bit */ -#define PWR_CSR_EWUP_BIT 8 -/** PVD output bit */ -#define PWR_CSR_PVDO_BIT 2 -/** Standby flag bit */ -#define PWR_CSR_SBF_BIT 1 -/** Wakeup flag bit */ -#define PWR_CSR_WUF_BIT 0 - -/** Enable wakeup pin */ -#define PWR_CSR_EWUP (1U << PWR_CSR_EWUP_BIT) -/** PVD output */ -#define PWR_CSR_PVDO (1U << PWR_CSR_PVDO_BIT) -/** Standby flag */ -#define PWR_CSR_SBF (1U << PWR_CSR_SBF_BIT) -/** Wakeup flag */ -#define PWR_CSR_WUF (1U << PWR_CSR_WUF_BIT) - -/* - * Convenience functions - */ - -void pwr_init(void); - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/STM32F1/system/libmaple/include/libmaple/rcc.h b/STM32F1/system/libmaple/include/libmaple/rcc.h deleted file mode 100644 index 4889449..0000000 --- a/STM32F1/system/libmaple/include/libmaple/rcc.h +++ /dev/null @@ -1,176 +0,0 @@ -/****************************************************************************** - * The MIT License - * - * Copyright (c) 2010 Perry Hung. - * - * Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, copy, - * modify, merge, publish, distribute, sublicense, and/or sell copies - * of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS - * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN - * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - *****************************************************************************/ - -/** - * @file libmaple/include/libmaple/rcc.h - * @brief Reset and Clock Control (RCC) interface. - */ - -#ifndef _LIBMAPLE_RCC_H_ -#define _LIBMAPLE_RCC_H_ - -#ifdef __cplusplus -extern "C"{ -#endif - -#include - -/* Put the SYSCLK sources before the series header is included, as it - * might need them. */ -/** - * @brief SYSCLK sources - * @see rcc_switch_sysclk() - */ -typedef enum rcc_sysclk_src { - RCC_CLKSRC_HSI = 0x0, - RCC_CLKSRC_HSE = 0x1, - RCC_CLKSRC_PLL = 0x2, -} rcc_sysclk_src; - -/* Roger clark. Replaced with line below #include */ -#include "stm32f1/include/series/rcc.h" - -/* Note: Beyond the usual (registers, etc.), it's up to the series - * header to define the following types: - * - * - enum rcc_clk: Available system and secondary clock sources, - * e.g. RCC_CLK_HSE, RCC_CLK_PLL, RCC_CLK_LSE. - * - * Note that the inclusion of secondary clock sources (like LSI and - * LSE) makes enum rcc_clk different from the SYSCLK sources, which - * are defined in this header as enum rcc_sysclk_src. - * - * IMPORTANT NOTE TO IMPLEMENTORS: If you are adding support for a - * new STM32 series, see the comment near rcc_clk_reg() in - * libmaple/rcc.c for information on how to choose these values so - * that rcc_turn_on_clk() etc. will work on your series. - * - * - enum rcc_clk_id: For each available peripheral. These are widely used - * as unique IDs (TODO extricate from RCC?). Peripherals which are - * common across STM32 series should use the same token for their - * rcc_clk_id in each series header. - * - * - enum rcc_clk_domain: For each clock domain. This is returned by - * rcc_dev_clk(). For instance, each AHB and APB is a clock domain. - * - * - enum rcc_prescaler: And a suitable set of dividers for - * rcc_set_prescaler(). - * - * - enum rcc_pllsrc: For each PLL source. Same source, same token. - * - * - A target-dependent type to be pointed to by the data field in a - * struct rcc_pll_cfg. - */ - -#ifdef __DOXYGEN__ -/** RCC register map base pointer */ -#define RCC_BASE -#endif - -/* Clock prescaler management. */ - -/** - * @brief Set the divider on a peripheral prescaler - * @param prescaler prescaler to set - * @param divider prescaler divider - */ -extern void rcc_set_prescaler(rcc_prescaler prescaler, uint32 divider); - -/* SYSCLK. */ - -void rcc_switch_sysclk(rcc_sysclk_src sysclk_src); - -/* PLL configuration */ - -/** - * @brief Specifies a configuration for the main PLL. - */ -typedef struct rcc_pll_cfg { - rcc_pllsrc pllsrc; /**< PLL source */ - - /** Series-specific configuration data. */ - void *data; -} rcc_pll_cfg; - -/** - * @brief Configure the main PLL. - * - * You may only call this function while the PLL is disabled. - * - * @param pll_cfg Desired PLL configuration. The contents of this - * struct depend entirely on the target. - */ -extern void rcc_configure_pll(rcc_pll_cfg *pll_cfg); - -/* System and secondary clock sources. */ - -void rcc_turn_on_clk(rcc_clk clock); -void rcc_turn_off_clk(rcc_clk clock); -int rcc_is_clk_on(rcc_clk clock); -int rcc_is_clk_ready(rcc_clk clock); - -/* Peripheral clock lines and clock domains. */ - -/** - * @brief Turn on the clock line on a peripheral - * @param id Clock ID of the peripheral to turn on. - */ -extern void rcc_clk_enable(rcc_clk_id id); - -/** - * @brief Reset a peripheral. - * - * Caution: not all rcc_clk_id values refer to a peripheral which can - * be reset. (Only rcc_clk_ids for peripherals with bits in an RCC - * reset register can be used here.) - * - * @param id Clock ID of the peripheral to reset. - */ -extern void rcc_reset_dev(rcc_clk_id id); - -rcc_clk_domain rcc_dev_clk(rcc_clk_id id); - -/* Clock security system */ - -/** - * @brief Enable the clock security system (CSS). - */ -static inline void rcc_enable_css() { - RCC_BASE->CR |= RCC_CR_CSSON; -} - -/** - * @brief Disable the clock security system (CSS). - */ -static inline void rcc_disable_css() { - RCC_BASE->CR &= ~RCC_CR_CSSON; -} - -#ifdef __cplusplus -} // extern "C" -#endif - -#endif diff --git a/STM32F1/system/libmaple/include/libmaple/ring_buffer.h b/STM32F1/system/libmaple/include/libmaple/ring_buffer.h deleted file mode 100644 index eb38634..0000000 --- a/STM32F1/system/libmaple/include/libmaple/ring_buffer.h +++ /dev/null @@ -1,208 +0,0 @@ -/****************************************************************************** - * The MIT License - * - * Copyright (c) 2011 LeafLabs, LLC. - * - * Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, copy, - * modify, merge, publish, distribute, sublicense, and/or sell copies - * of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS - * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN - * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - *****************************************************************************/ - -/** - * @file libmaple/include/libmaple/ring_buffer.h - * @brief Simple circular buffer - * - * This implementation is not thread-safe. In particular, none of - * these functions is guaranteed re-entrant. - */ - -#ifndef _LIBMAPLE_RING_BUFFER_H_ -#define _LIBMAPLE_RING_BUFFER_H_ - -#ifdef __cplusplus -extern "C"{ -#endif - -#include - -/** - * Ring buffer type. - * - * The buffer is empty when head == tail. - * - * The buffer is full when the head is one byte in front of the tail, - * modulo buffer length. - * - * One byte is left free to distinguish empty from full. */ -typedef struct ring_buffer { - volatile uint8 *buf; /**< Buffer items are stored into */ - uint16 head; /**< Index of the next item to remove */ - uint16 tail; /**< Index where the next item will get inserted */ - uint16 size; /**< Buffer capacity minus one */ -} ring_buffer; - -/** - * Initialise a ring buffer. - * - * @param rb Instance to initialise - * - * @param size Number of items in buf. The ring buffer will always - * leave one element unoccupied, so the maximum number of - * elements it can store will be size - 1. Thus, size - * must be at least 2. - * - * @param buf Buffer to store items into - */ -static inline void rb_init(ring_buffer *rb, uint16 size, uint8 *buf) { - rb->head = 0; - rb->tail = 0; - rb->size = size - 1; - rb->buf = buf; -} - -/** - * @brief Return the number of elements stored in the ring buffer. - * @param rb Buffer whose elements to count. - */ -static inline uint16 rb_full_count(ring_buffer *rb) { - __io ring_buffer *arb = rb; - int32 size = arb->tail - arb->head; - if (arb->tail < arb->head) { - size += arb->size + 1; - } - return (uint16)size; -} - -/** - * @brief Returns true if and only if the ring buffer is full. - * @param rb Buffer to test. - */ -static inline int rb_is_full(ring_buffer *rb) { - return (rb->tail + 1 == rb->head) || - (rb->tail == rb->size && rb->head == 0); -} - -/** - * @brief Returns true if and only if the ring buffer is empty. - * @param rb Buffer to test. - */ -static inline int rb_is_empty(ring_buffer *rb) { - return rb->head == rb->tail; -} - -/** - * Append element onto the end of a ring buffer. - * @param rb Buffer to append onto. - * @param element Value to append. - */ -static inline void rb_insert(ring_buffer *rb, uint8 element) { - rb->buf[rb->tail] = element; - rb->tail = (rb->tail == rb->size) ? 0 : rb->tail + 1; -} - -/** - * @brief Remove and return the first item from a ring buffer. - * @param rb Buffer to remove from, must contain at least one element. - */ -static inline uint8 rb_remove(ring_buffer *rb) { - uint8 ch = rb->buf[rb->head]; - rb->head = (rb->head == rb->size) ? 0 : rb->head + 1; - return ch; -} - -/* - * Roger Clark. 20141125, - * added peek function. - * @brief Return the first item from a ring buffer, without removing it - * @param rb Buffer to remove from, must contain at least one element. - */ - -static inline int rb_peek(ring_buffer *rb) -{ - if (rb->head == rb->tail) - { - return -1; - } - else - { - return rb->buf[rb->head]; - } -} - - -/** - * @brief Attempt to remove the first item from a ring buffer. - * - * If the ring buffer is nonempty, removes and returns its first item. - * If it is empty, does nothing and returns a negative value. - * - * @param rb Buffer to attempt to remove from. - */ -static inline int16 rb_safe_remove(ring_buffer *rb) { - return rb_is_empty(rb) ? -1 : rb_remove(rb); -} - -/** - * @brief Attempt to insert an element into a ring buffer. - * - * @param rb Buffer to insert into. - * @param element Value to insert into rb. - * @sideeffect If rb is not full, appends element onto buffer. - * @return If element was appended, then true; otherwise, false. */ -static inline int rb_safe_insert(ring_buffer *rb, uint8 element) { - if (rb_is_full(rb)) { - return 0; - } - rb_insert(rb, element); - return 1; -} - -/** - * @brief Append an item onto the end of a non-full ring buffer. - * - * If the buffer is full, removes its first item, then inserts the new - * element at the end. - * - * @param rb Ring buffer to insert into. - * @param element Value to insert into ring buffer. - * @return On success, returns -1. If an element was popped, returns - * the popped value. - */ -static inline int rb_push_insert(ring_buffer *rb, uint8 element) { - int ret = -1; - if (rb_is_full(rb)) { - ret = rb_remove(rb); - } - rb_insert(rb, element); - return ret; -} - -/** - * @brief Discard all items from a ring buffer. - * @param rb Ring buffer to discard all items from. - */ -static inline void rb_reset(ring_buffer *rb) { - rb->tail = rb->head; -} - -#ifdef __cplusplus -} // extern "C" -#endif - -#endif diff --git a/STM32F1/system/libmaple/include/libmaple/scb.h b/STM32F1/system/libmaple/include/libmaple/scb.h deleted file mode 100644 index c42a0f2..0000000 --- a/STM32F1/system/libmaple/include/libmaple/scb.h +++ /dev/null @@ -1,214 +0,0 @@ -/****************************************************************************** - * The MIT License - * - * Copyright (c) 2010 Perry Hung. - * Copyright (c) 2011-2012 LeafLabs, LLC. - * - * Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, copy, - * modify, merge, publish, distribute, sublicense, and/or sell copies - * of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS - * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN - * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - *****************************************************************************/ - -/** - * @file libmaple/include/libmaple/scb.h - * @brief System control block header - */ - -/* - * FIXME: STM32F2? - */ - -#ifndef _LIBMAPLE_SCB_H_ -#define _LIBMAPLE_SCB_H_ - -#ifdef __cplusplus -extern "C" { -#endif - -#include - -/* - * Register map and base pointer - */ - -/** System control block register map type */ -typedef struct scb_reg_map { - __io uint32 CPUID; /**< CPU ID Base Register */ - __io uint32 ICSR; /**< Interrupt Control State Register */ - __io uint32 VTOR; /**< Vector Table Offset Register */ - __io uint32 AIRCR; /**< Application Interrupt / Reset Control Register */ - __io uint32 SCR; /**< System Control Register */ - __io uint32 CCR; /**< Configuration and Control Register */ - __io uint8 SHP[12]; /**< System Handler Priority Registers - (4-7, 8-11, 12-15) */ - __io uint32 SHCSR; /**< System Handler Control and State Register */ - __io uint32 CFSR; /**< Configurable Fault Status Register */ - __io uint32 HFSR; /**< Hard Fault Status Register */ - /* DFSR is not documented by ST in PM0056 (as of Revision 4), but - * there's a 4 byte hole in the SCB register map docs right where - * it belongs. Since it's specified as "always implemented" in - * the ARM v7-M ARM, I'm assuming its absence is a bug in the ST - * doc, but I haven't proven it. [mbolivar] */ - __io uint32 DFSR; /**< Debug Fault Status Register */ - __io uint32 MMFAR; /**< Mem Manage Address Register */ - __io uint32 BFAR; /**< Bus Fault Address Register */ -#if 0 - /* The following registers are implementation-defined according to - * ARM v7-M, and I can't find evidence of their existence in ST's - * docs. I'm removing them. Feel free to yell at me if they do - * exist. [mbolivar] - */ - __io uint32 AFSR; /**< Auxiliary Fault Status Register */ - __io uint32 PFR[2]; /**< Processor Feature Register */ - __io uint32 DFR; /**< Debug Feature Register */ - __io uint32 AFR; /**< Auxiliary Feature Register */ - __io uint32 MMFR[4]; /**< Memory Model Feature Register */ - __io uint32 ISAR[5]; /**< ISA Feature Register */ -#endif -} scb_reg_map; - -/** System control block register map base pointer */ -#define SCB_BASE ((struct scb_reg_map*)0xE000ED00) - -/* - * Register bit definitions - */ - -/* No SCB_REG_FIELD_BIT macros as the relevant addresses are not in a - * bit-band region. */ - -/* CPUID base register (SCB_CPUID) */ - -#define SCB_CPUID_IMPLEMENTER (0xFF << 24) -#define SCB_CPUID_VARIANT (0xF << 20) -#define SCB_CPUID_CONSTANT (0xF << 16) -#define SCB_CPUID_PARTNO (0xFFF << 4) -#define SCB_CPUID_REVISION 0xF - -/* Interrupt control state register (SCB_ICSR) */ - -#define SCB_ICSR_NMIPENDSET (1U << 31) -#define SCB_ICSR_PENDSVSET (1U << 28) -#define SCB_ICSR_PENDSVCLR (1U << 27) -#define SCB_ICSR_PENDSTSET (1U << 26) -#define SCB_ICSR_PENDSTCLR (1U << 25) -#define SCB_ICSR_ISRPENDING (1U << 22) -#define SCB_ICSR_VECTPENDING (0x3FF << 12) -#define SCB_ICSR_RETOBASE (1U << 11) -#define SCB_ICSR_VECTACTIVE 0xFF - -/* Vector table offset register (SCB_VTOR) */ - -#define SCB_VTOR_TBLOFF (0x1FFFFF << 9) - -/* Application interrupt and reset control register (SCB_AIRCR) */ - -#define SCB_AIRCR_VECTKEYSTAT (0x5FA << 16) -#define SCB_AIRCR_VECTKEY (0x5FA << 16) -#define SCB_AIRCR_ENDIANNESS (1U << 15) -#define SCB_AIRCR_PRIGROUP (0x3 << 8) -#define SCB_AIRCR_SYSRESETREQ (1U << 2) -#define SCB_AIRCR_VECTCLRACTIVE (1U << 1) -#define SCB_AIRCR_VECTRESET (1U << 0) - -/* System control register (SCB_SCR) */ - -#define SCB_SCR_SEVONPEND (1U << 4) -#define SCB_SCR_SLEEPDEEP (1U << 2) -#define SCB_SCR_SLEEPONEXIT (1U << 1) - -/* Configuration and Control Register (SCB_CCR) */ - -#define SCB_CCR_STKALIGN (1U << 9) -#define SCB_CCR_BFHFNMIGN (1U << 8) -#define SCB_CCR_DIV_0_TRP (1U << 4) -#define SCB_CCR_UNALIGN_TRP (1U << 3) -#define SCB_CCR_USERSETMPEND (1U << 1) -#define SCB_CCR_NONBASETHRDENA (1U << 0) - -/* System handler priority registers (SCB_SHPRx) */ - -#define SCB_SHPR1_PRI6 (0xFF << 16) -#define SCB_SHPR1_PRI5 (0xFF << 8) -#define SCB_SHPR1_PRI4 0xFF - -#define SCB_SHPR2_PRI11 (0xFF << 24) - -#define SCB_SHPR3_PRI15 (0xFF << 24) -#define SCB_SHPR3_PRI14 (0xFF << 16) - -/* System Handler Control and state register (SCB_SHCSR) */ - -#define SCB_SHCSR_USGFAULTENA (1U << 18) -#define SCB_SHCSR_BUSFAULTENA (1U << 17) -#define SCB_SHCSR_MEMFAULTENA (1U << 16) -#define SCB_SHCSR_SVCALLPENDED (1U << 15) -#define SCB_SHCSR_BUSFAULTPENDED (1U << 14) -#define SCB_SHCSR_MEMFAULTPENDED (1U << 13) -#define SCB_SHCSR_USGFAULTPENDED (1U << 12) -#define SCB_SHCSR_SYSTICKACT (1U << 11) -#define SCB_SHCSR_PENDSVACT (1U << 10) -#define SCB_SHCSR_MONITORACT (1U << 8) -#define SCB_SHCSR_SVCALLACT (1U << 7) -#define SCB_SHCSR_USGFAULTACT (1U << 3) -#define SCB_SHCSR_BUSFAULTACT (1U << 1) -#define SCB_SHCSR_MEMFAULTACT (1U << 0) - -/* Configurable fault status register (SCB_CFSR) */ - -#define SCB_CFSR_DIVBYZERO (1U << 25) -#define SCB_CFSR_UNALIGNED (1U << 24) -#define SCB_CFSR_NOCP (1U << 19) -#define SCB_CFSR_INVPC (1U << 18) -#define SCB_CFSR_INVSTATE (1U << 17) -#define SCB_CFSR_UNDEFINSTR (1U << 16) -#define SCB_CFSR_BFARVALID (1U << 15) -#define SCB_CFSR_STKERR (1U << 12) -#define SCB_CFSR_UNSTKERR (1U << 11) -#define SCB_CFSR_IMPRECISERR (1U << 10) -#define SCB_CFSR_PRECISERR (1U << 9) -#define SCB_CFSR_IBUSERR (1U << 8) -#define SCB_CFSR_MMARVALID (1U << 7) -#define SCB_CFSR_MSTKERR (1U << 4) -#define SCB_CFSR_MUNSTKERR (1U << 3) -#define SCB_CFSR_DACCVIOL (1U << 1) -#define SCB_CFSR_IACCVIOL (1U << 0) - -/* Hard Fault Status Register (SCB_HFSR) */ - -#define SCB_HFSR_DEBUG_VT (1U << 31) -#define SCB_CFSR_FORCED (1U << 30) -#define SCB_CFSR_VECTTBL (1U << 1) - -/* Debug Fault Status Register */ - -/* Not specified by PM0056, but required by ARM. The bit definitions - * here are based on the names given in the ARM v7-M ARM. */ - -#define SCB_DFSR_EXTERNAL (1U << 4) -#define SCB_DFSR_VCATCH (1U << 3) -#define SCB_DFSR_DWTTRAP (1U << 2) -#define SCB_DFSR_BKPT (1U << 1) -#define SCB_DFSR_HALTED (1U << 0) - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/STM32F1/system/libmaple/include/libmaple/spi.h b/STM32F1/system/libmaple/include/libmaple/spi.h deleted file mode 100644 index 0da4129..0000000 --- a/STM32F1/system/libmaple/include/libmaple/spi.h +++ /dev/null @@ -1,472 +0,0 @@ -/****************************************************************************** - * The MIT License - * - * Copyright (c) 2011, 2012 LeafLabs, LLC. - * Copyright (c) 2010 Perry Hung. - * - * Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, copy, - * modify, merge, publish, distribute, sublicense, and/or sell copies - * of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS - * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN - * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - *****************************************************************************/ - -/** - * @file libmaple/include/libmaple/spi.h - * @author Marti Bolivar - * @brief Serial Peripheral Interface (SPI) and Integrated - * Interchip Sound (I2S) peripheral support. - * - * I2S support is currently limited to register maps and bit definitions. - */ - -#ifndef _LIBMAPLE_SPI_H_ -#define _LIBMAPLE_SPI_H_ - -#ifdef __cplusplus -extern "C" { -#endif - -#include -#include -#include - /* Roger clark. Replaced with line below #include */ -#include "stm32f1/include/series/spi.h" - - -/* - * Register maps - */ - -/** SPI register map type. */ -typedef struct spi_reg_map { - __io uint32 CR1; /**< Control register 1 */ - __io uint32 CR2; /**< Control register 2 */ - __io uint32 SR; /**< Status register */ - __io uint32 DR; /**< Data register */ - __io uint32 CRCPR; /**< CRC polynomial register */ - __io uint32 RXCRCR; /**< RX CRC register */ - __io uint32 TXCRCR; /**< TX CRC register */ - __io uint32 I2SCFGR; /**< I2S configuration register */ - __io uint32 I2SPR; /**< I2S prescaler register */ -} spi_reg_map; - -/* - * Register bit definitions - */ - -/* Control register 1 */ - -#define SPI_CR1_BIDIMODE_BIT 15 -#define SPI_CR1_BIDIOE_BIT 14 -#define SPI_CR1_CRCEN_BIT 13 -#define SPI_CR1_CRCNEXT_BIT 12 -#define SPI_CR1_DFF_BIT 11 -#define SPI_CR1_RXONLY_BIT 10 -#define SPI_CR1_SSM_BIT 9 -#define SPI_CR1_SSI_BIT 8 -#define SPI_CR1_LSBFIRST_BIT 7 -#define SPI_CR1_SPE_BIT 6 -#define SPI_CR1_MSTR_BIT 2 -#define SPI_CR1_CPOL_BIT 1 -#define SPI_CR1_CPHA_BIT 0 - -#define SPI_CR1_BIDIMODE (1U << SPI_CR1_BIDIMODE_BIT) -#define SPI_CR1_BIDIMODE_2_LINE (0x0 << SPI_CR1_BIDIMODE_BIT) -#define SPI_CR1_BIDIMODE_1_LINE (0x1 << SPI_CR1_BIDIMODE_BIT) -#define SPI_CR1_BIDIOE (1U << SPI_CR1_BIDIOE_BIT) -#define SPI_CR1_CRCEN (1U << SPI_CR1_CRCEN_BIT) -#define SPI_CR1_CRCNEXT (1U << SPI_CR1_CRCNEXT_BIT) -#define SPI_CR1_DFF (1U << SPI_CR1_DFF_BIT) -#define SPI_CR1_DFF_8_BIT (0x0 << SPI_CR1_DFF_BIT) -#define SPI_CR1_DFF_16_BIT (0x1 << SPI_CR1_DFF_BIT) -#define SPI_CR1_RXONLY (1U << SPI_CR1_RXONLY_BIT) -#define SPI_CR1_SSM (1U << SPI_CR1_SSM_BIT) -#define SPI_CR1_SSI (1U << SPI_CR1_SSI_BIT) -#define SPI_CR1_LSBFIRST (1U << SPI_CR1_LSBFIRST_BIT) -#define SPI_CR1_SPE (1U << SPI_CR1_SPE_BIT) -#define SPI_CR1_BR (0x7 << 3) -#define SPI_CR1_BR_PCLK_DIV_2 (0x0 << 3) -#define SPI_CR1_BR_PCLK_DIV_4 (0x1 << 3) -#define SPI_CR1_BR_PCLK_DIV_8 (0x2 << 3) -#define SPI_CR1_BR_PCLK_DIV_16 (0x3 << 3) -#define SPI_CR1_BR_PCLK_DIV_32 (0x4 << 3) -#define SPI_CR1_BR_PCLK_DIV_64 (0x5 << 3) -#define SPI_CR1_BR_PCLK_DIV_128 (0x6 << 3) -#define SPI_CR1_BR_PCLK_DIV_256 (0x7 << 3) -#define SPI_CR1_MSTR (1U << SPI_CR1_MSTR_BIT) -#define SPI_CR1_CPOL (1U << SPI_CR1_CPOL_BIT) -#define SPI_CR1_CPOL_LOW (0x0 << SPI_CR1_CPOL_BIT) -#define SPI_CR1_CPOL_HIGH (0x1 << SPI_CR1_CPOL_BIT) -#define SPI_CR1_CPHA (1U << SPI_CR1_CPHA_BIT) - -/* Control register 2 */ - -#define SPI_CR2_TXEIE_BIT 7 -#define SPI_CR2_RXNEIE_BIT 6 -#define SPI_CR2_ERRIE_BIT 5 -#define SPI_CR2_SSOE_BIT 2 -#define SPI_CR2_TXDMAEN_BIT 1 -#define SPI_CR2_RXDMAEN_BIT 0 - -#define SPI_CR2_TXEIE (1U << SPI_CR2_TXEIE_BIT) -#define SPI_CR2_RXNEIE (1U << SPI_CR2_RXNEIE_BIT) -#define SPI_CR2_ERRIE (1U << SPI_CR2_ERRIE_BIT) -#define SPI_CR2_SSOE (1U << SPI_CR2_SSOE_BIT) -#define SPI_CR2_TXDMAEN (1U << SPI_CR2_TXDMAEN_BIT) -#define SPI_CR2_RXDMAEN (1U << SPI_CR2_RXDMAEN_BIT) - -/* Status register */ - -#define SPI_SR_BSY_BIT 7 -#define SPI_SR_OVR_BIT 6 -#define SPI_SR_MODF_BIT 5 -#define SPI_SR_CRCERR_BIT 4 -#define SPI_SR_UDR_BIT 3 -#define SPI_SR_CHSIDE_BIT 2 -#define SPI_SR_TXE_BIT 1 -#define SPI_SR_RXNE_BIT 0 - -#define SPI_SR_BSY (1U << SPI_SR_BSY_BIT) -#define SPI_SR_OVR (1U << SPI_SR_OVR_BIT) -#define SPI_SR_MODF (1U << SPI_SR_MODF_BIT) -#define SPI_SR_CRCERR (1U << SPI_SR_CRCERR_BIT) -#define SPI_SR_UDR (1U << SPI_SR_UDR_BIT) -#define SPI_SR_CHSIDE (1U << SPI_SR_CHSIDE_BIT) -#define SPI_SR_CHSIDE_LEFT (0x0 << SPI_SR_CHSIDE_BIT) -#define SPI_SR_CHSIDE_RIGHT (0x1 << SPI_SR_CHSIDE_BIT) -#define SPI_SR_TXE (1U << SPI_SR_TXE_BIT) -#define SPI_SR_RXNE (1U << SPI_SR_RXNE_BIT) - -/* I2S configuration register */ - -#define SPI_I2SCFGR_I2SMOD_BIT 11 -#define SPI_I2SCFGR_I2SE_BIT 10 -#define SPI_I2SCFGR_PCMSYNC_BIT 7 -#define SPI_I2SCFGR_CKPOL_BIT 3 -#define SPI_I2SCFGR_CHLEN_BIT 0 - -#define SPI_I2SCFGR_I2SMOD (1U << SPI_I2SCFGR_I2SMOD_BIT) -#define SPI_I2SCFGR_I2SMOD_SPI (0x0 << SPI_I2SCFGR_I2SMOD_BIT) -#define SPI_I2SCFGR_I2SMOD_I2S (0x1 << SPI_I2SCFGR_I2SMOD_BIT) -#define SPI_I2SCFGR_I2SE (1U << SPI_I2SCFGR_I2SE_BIT) -#define SPI_I2SCFGR_I2SCFG (0x3 << 8) -#define SPI_I2SCFGR_I2SCFG_SLAVE_TX (0x0 << 8) -#define SPI_I2SCFGR_I2SCFG_SLAVE_RX (0x1 << 8) -#define SPI_I2SCFGR_I2SCFG_MASTER_TX (0x2 << 8) -#define SPI_I2SCFGR_I2SCFG_MASTER_RX (0x3 << 8) -#define SPI_I2SCFGR_PCMSYNC (1U << SPI_I2SCFGR_PCMSYNC_BIT) -#define SPI_I2SCFGR_PCMSYNC_SHORT (0x0 << SPI_I2SCFGR_PCMSYNC_BIT) -#define SPI_I2SCFGR_PCMSYNC_LONG (0x1 << SPI_I2SCFGR_PCMSYNC_BIT) -#define SPI_I2SCFGR_I2SSTD (0x3 << 4) -#define SPI_I2SCFGR_I2SSTD_PHILLIPS (0x0 << 4) -#define SPI_I2SCFGR_I2SSTD_MSB (0x1 << 4) -#define SPI_I2SCFGR_I2SSTD_LSB (0x2 << 4) -#define SPI_I2SCFGR_I2SSTD_PCM (0x3 << 4) -#define SPI_I2SCFGR_CKPOL (1U << SPI_I2SCFGR_CKPOL_BIT) -#define SPI_I2SCFGR_CKPOL_LOW (0x0 << SPI_I2SCFGR_CKPOL_BIT) -#define SPI_I2SCFGR_CKPOL_HIGH (0x1 << SPI_I2SCFGR_CKPOL_BIT) -#define SPI_I2SCFGR_DATLEN (0x3 << 1) -#define SPI_I2SCFGR_DATLEN_16_BIT (0x0 << 1) -#define SPI_I2SCFGR_DATLEN_24_BIT (0x1 << 1) -#define SPI_I2SCFGR_DATLEN_32_BIT (0x2 << 1) -#define SPI_I2SCFGR_CHLEN (1U << SPI_I2SCFGR_CHLEN_BIT) -#define SPI_I2SCFGR_CHLEN_16_BIT (0x0 << SPI_I2SCFGR_CHLEN_BIT) -#define SPI_I2SCFGR_CHLEN_32_BIT (0x1 << SPI_I2SCFGR_CHLEN_BIT) - -/* I2S prescaler register */ - -#define SPI_I2SPR_MCKOE_BIT 9 -#define SPI_I2SPR_ODD_BIT 8 - -#define SPI_I2SPR_MCKOE (1U << SPI_I2SPR_MCKOE_BIT) -#define SPI_I2SPR_ODD (1U << SPI_I2SPR_ODD_BIT) -#define SPI_I2SPR_I2SDIV 0xFF - -/* - * Devices - */ - -/** SPI device type */ -typedef struct spi_dev { - spi_reg_map *regs; /**< Register map */ - rcc_clk_id clk_id; /**< RCC clock information */ - nvic_irq_num irq_num; /**< NVIC interrupt number */ -} spi_dev; - -/* - * SPI Convenience functions - */ - -void spi_init(spi_dev *dev); - -struct gpio_dev; -/** - * @brief Configure GPIO bit modes for use as a SPI port's pins. - * - * @param dev SPI device - * @param as_master If true, configure as bus master; otherwise, as slave. - * @param nss_dev NSS pin's GPIO device - * @param nss_bit NSS pin's GPIO bit on nss_dev - * @param comm_dev SCK, MISO, MOSI pins' GPIO device - * @param sck_bit SCK pin's GPIO bit on comm_dev - * @param miso_bit MISO pin's GPIO bit on comm_dev - * @param mosi_bit MOSI pin's GPIO bit on comm_dev - */ -extern void spi_config_gpios(spi_dev *dev, - uint8 as_master, - struct gpio_dev *nss_dev, - uint8 nss_bit, - struct gpio_dev *comm_dev, - uint8 sck_bit, - uint8 miso_bit, - uint8 mosi_bit); - -/** - * @brief SPI mode configuration. - * - * A SPI mode determines a combination of the idle state of the clock - * line (the clock polarity, or "CPOL"), and which clock edge triggers - * data capture (the clock phase, or "CPHA"). - */ -typedef enum spi_mode { - /** Clock idles low, data captured on rising edge (first transition) */ - SPI_MODE_LOW_RISING = 0, - /** Clock idles low, data captured on falling edge (second transition) */ - SPI_MODE_LOW_FALLING = 1, - /** Clock idles high, data captured on falling edge (first transition) */ - SPI_MODE_HIGH_FALLING = 2, - /** Clock idles high, data captured on rising edge (second transition) */ - SPI_MODE_HIGH_RISING = 3, - - SPI_MODE_0 = SPI_MODE_LOW_RISING, /**< Same as SPI_MODE_LOW_RISING */ - SPI_MODE_1 = SPI_MODE_LOW_FALLING, /**< Same as SPI_MODE_LOW_FALLING */ - SPI_MODE_2 = SPI_MODE_HIGH_FALLING, /**< Same as SPI_MODE_HIGH_FALLING */ - SPI_MODE_3 = SPI_MODE_HIGH_RISING, /**< Same as SPI_MODE_HIGH_RISING */ -} spi_mode; - -/** - * @brief SPI baud rate configuration, as a divisor of f_PCLK, the - * PCLK clock frequency. - */ -typedef enum spi_baud_rate { - SPI_BAUD_PCLK_DIV_2 = SPI_CR1_BR_PCLK_DIV_2, /**< f_PCLK/2 */ - SPI_BAUD_PCLK_DIV_4 = SPI_CR1_BR_PCLK_DIV_4, /**< f_PCLK/4 */ - SPI_BAUD_PCLK_DIV_8 = SPI_CR1_BR_PCLK_DIV_8, /**< f_PCLK/8 */ - SPI_BAUD_PCLK_DIV_16 = SPI_CR1_BR_PCLK_DIV_16, /**< f_PCLK/16 */ - SPI_BAUD_PCLK_DIV_32 = SPI_CR1_BR_PCLK_DIV_32, /**< f_PCLK/32 */ - SPI_BAUD_PCLK_DIV_64 = SPI_CR1_BR_PCLK_DIV_64, /**< f_PCLK/64 */ - SPI_BAUD_PCLK_DIV_128 = SPI_CR1_BR_PCLK_DIV_128, /**< f_PCLK/128 */ - SPI_BAUD_PCLK_DIV_256 = SPI_CR1_BR_PCLK_DIV_256, /**< f_PCLK/256 */ -} spi_baud_rate; - -/** - * @brief SPI initialization flags. - * @see spi_master_enable() - * @see spi_slave_enable() - */ -typedef enum spi_cfg_flag { - SPI_BIDIMODE = SPI_CR1_BIDIMODE, /**< Bidirectional mode enable */ - SPI_BIDIOE = SPI_CR1_BIDIOE, /**< Output enable in bidirectional - mode */ - SPI_CRCEN = SPI_CR1_CRCEN, /**< Cyclic redundancy check (CRC) - enable */ - SPI_DFF_8_BIT = SPI_CR1_DFF_8_BIT, /**< 8-bit data frame format (this is - the default) */ - SPI_DFF_16_BIT = SPI_CR1_DFF_16_BIT, /**< 16-bit data frame format */ - SPI_RX_ONLY = SPI_CR1_RXONLY, /**< Receive only */ - SPI_SW_SLAVE = SPI_CR1_SSM, /**< Software slave management */ - SPI_SOFT_SS = SPI_CR1_SSI, /**< Software (internal) slave - select. This flag only has an - effect when used in combination - with SPI_SW_SLAVE. */ - SPI_FRAME_LSB = SPI_CR1_LSBFIRST, /**< LSB-first (little-endian) frame - format */ - SPI_FRAME_MSB = 0, /**< MSB-first (big-endian) frame - format (this is the default) */ -} spi_cfg_flag; - -void spi_master_enable(spi_dev *dev, - spi_baud_rate baud, - spi_mode mode, - uint32 flags); - -void spi_slave_enable(spi_dev *dev, - spi_mode mode, - uint32 flags); - -uint32 spi_tx(spi_dev *dev, const void *buf, uint32 len); - -/** - * @brief Call a function on each SPI port - * @param fn Function to call. - */ -extern void spi_foreach(void (*fn)(spi_dev*)); - -void spi_peripheral_enable(spi_dev *dev); -void spi_peripheral_disable(spi_dev *dev); - -void spi_tx_dma_enable(spi_dev *dev); -void spi_tx_dma_disable(spi_dev *dev); - -void spi_rx_dma_enable(spi_dev *dev); -void spi_rx_dma_disable(spi_dev *dev); - -/** - * @brief Determine if a SPI peripheral is enabled. - * @param dev SPI device - * @return True, if and only if dev's peripheral is enabled. - */ -static inline uint8 spi_is_enabled(spi_dev *dev) { - return dev->regs->CR1 & SPI_CR1_SPE_BIT; -} - -/** - * @brief Disable all SPI peripherals - */ -static inline void spi_peripheral_disable_all(void) { - spi_foreach(spi_peripheral_disable); -} - -/** Available SPI interrupts */ -typedef enum spi_interrupt { - SPI_TXE_INTERRUPT = SPI_CR2_TXEIE, /**< TX buffer empty interrupt */ - SPI_RXNE_INTERRUPT = SPI_CR2_RXNEIE, /**< RX buffer not empty interrupt */ - SPI_ERR_INTERRUPT = SPI_CR2_ERRIE /**< - * Error interrupt (CRC, overrun, - * and mode fault errors for SPI; - * underrun, overrun errors for I2S) - */ -} spi_interrupt; - -/** - * @brief Mask for all spi_interrupt values - * @see spi_interrupt - */ -#define SPI_INTERRUPTS_ALL (SPI_TXE_INTERRUPT | \ - SPI_RXNE_INTERRUPT | \ - SPI_ERR_INTERRUPT) - -/** - * @brief Enable SPI interrupt requests - * @param dev SPI device - * @param interrupt_flags Bitwise OR of spi_interrupt values to enable - * @see spi_interrupt - */ -static inline void spi_irq_enable(spi_dev *dev, uint32 interrupt_flags) { - dev->regs->CR2 |= interrupt_flags; - nvic_irq_enable(dev->irq_num); -} - -/** - * @brief Disable SPI interrupt requests - * @param dev SPI device - * @param interrupt_flags Bitwise OR of spi_interrupt values to disable - * @see spi_interrupt - */ -static inline void spi_irq_disable(spi_dev *dev, uint32 interrupt_flags) { - dev->regs->CR2 &= ~interrupt_flags; -} - -/** - * @brief Get the data frame format flags with which a SPI port is - * configured. - * @param dev SPI device whose data frame format to get. - * @return SPI_DFF_8_BIT, if dev has an 8-bit data frame format. - * Otherwise, SPI_DFF_16_BIT. - */ -static inline spi_cfg_flag spi_dff(spi_dev *dev) { - return ((dev->regs->CR1 & SPI_CR1_DFF) == SPI_CR1_DFF_8_BIT ? - SPI_DFF_8_BIT : - SPI_DFF_16_BIT); -} - -/** - * @brief Determine whether the device's peripheral receive (RX) - * register is empty. - * @param dev SPI device - * @return true, iff dev's RX register is empty. - */ -static inline uint8 spi_is_rx_nonempty(spi_dev *dev) { - return dev->regs->SR & SPI_SR_RXNE; -} - -/** - * @brief Retrieve the contents of the device's peripheral receive - * (RX) register. - * - * You may only call this function when the RX register is nonempty. - * Calling this function clears the contents of the RX register. - * - * @param dev SPI device - * @return Contents of dev's peripheral RX register - * @see spi_is_rx_reg_nonempty() - */ -static inline uint16 spi_rx_reg(spi_dev *dev) { - return (uint16)dev->regs->DR; -} - -/** - * @brief Determine whether the device's peripheral transmit (TX) - * register is empty. - * @param dev SPI device - * @return true, iff dev's TX register is empty. - */ -static inline uint8 spi_is_tx_empty(spi_dev *dev) { - return dev->regs->SR & SPI_SR_TXE; -} - -/** - * @brief Load a value into the device's peripheral transmit (TX) register. - * - * You may only call this function when the TX register is empty. - * Calling this function loads val into the peripheral's TX register. - * If the device is properly configured, this will initiate a - * transmission, the completion of which will cause the TX register to - * be empty again. - * - * @param dev SPI device - * @param val Value to load into the TX register. If the SPI data - * frame format is 8 bit, the value must be right-aligned. - * @see spi_is_tx_reg_empty() - * @see spi_init() - * @see spi_master_enable() - * @see spi_slave_enable() - */ -static inline void spi_tx_reg(spi_dev *dev, uint16 val) { - dev->regs->DR = val; -} - -/** - * @brief Determine whether the device's peripheral busy (SPI_SR_BSY) - * flag is set. - * @param dev SPI device - * @return true, iff dev's BSY flag is set. - */ -static inline uint8 spi_is_busy(spi_dev *dev) { - return dev->regs->SR & SPI_SR_BSY; -} - -/* - * I2S convenience functions (TODO) - */ - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/STM32F1/system/libmaple/include/libmaple/stm32.h b/STM32F1/system/libmaple/include/libmaple/stm32.h deleted file mode 100644 index f1990dd..0000000 --- a/STM32F1/system/libmaple/include/libmaple/stm32.h +++ /dev/null @@ -1,238 +0,0 @@ -/****************************************************************************** - * The MIT License - * - * Copyright (c) 2010, 2011, 2012 LeafLabs, LLC. - * - * Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, copy, - * modify, merge, publish, distribute, sublicense, and/or sell copies - * of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS - * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN - * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - *****************************************************************************/ - -/** - * @file libmaple/include/libmaple/stm32.h - * @brief STM32 chip header - * - * This header supplies various chip-specific values for the current - * build target. It's useful both to abstract away hardware details - * (e.g. through use of STM32_NR_INTERRUPTS) and to decide what to do - * when you want something nonportable (e.g. by checking - * STM32_MCU_SERIES). - */ - -#ifndef _LIBMAPLE_STM32_H_ -#define _LIBMAPLE_STM32_H_ - -#ifdef __cplusplus -extern "C" { -#endif - -/* - * STM32 series identifiers. - * - * Don't make these into an enum; the preprocessor needs them. - */ - -/** STM32F1 series. */ -#define STM32_SERIES_F1 0 -/** STM32F2 series. */ -#define STM32_SERIES_F2 1 -/** STM32L1 series. */ -#define STM32_SERIES_L1 2 -/** STM32F4 series. */ -#define STM32_SERIES_F4 3 - -/* The series header is responsible for defining: - * - * - Everything in the following __DOXYGEN__ conditional block. - * - * - STM32_HAVE_FSMC: 1 if the MCU has the FSMC peripheral, and 0 - * otherwise. - * - * - STM32_HAVE_USB: 1 if the MCU has a USB peripheral, and 0 - * otherwise. - */ - /* roger clark. replaced with line below #include */ -#include "stm32f1/include/series/stm32.h" - -/* Ensure the series header isn't broken. */ -#if (!defined(STM32_PCLK1) || \ - !defined(STM32_PCLK2) || \ - !defined(STM32_MCU_SERIES) || \ - !defined(STM32_NR_INTERRUPTS) || \ - !defined(STM32_NR_GPIO_PORTS) || \ - !defined(STM32_TIMER_MASK) || \ - !defined(STM32_DELAY_US_MULT) || \ - !defined(STM32_SRAM_END) || \ - !defined(STM32_HAVE_DAC) || \ - !defined(STM32_HAVE_FSMC) || \ - !defined(STM32_HAVE_USB)) -#error "Bad STM32F1 configuration. Check header for your MCU." -#endif - -/* - * Derived macros - */ - -/* FIXME [0.0.13] add this to ReST API page */ -/** - * @brief Statically determine whether a timer is present. - * - * Given a constant timer number n (starting from 1), this macro has a - * nonzero value exactly when TIMERn is available. - */ -#define STM32_HAVE_TIMER(n) (STM32_TIMER_MASK & (1 << (n))) - -/* - * Doxygen for functionality provided by series header. - */ - -#ifdef __DOXYGEN__ - -/* - * Clock configuration. - * - * These defines depend upon how the MCU is configured. Because of - * the potential for a mismatch between them and the actual clock - * configuration, keep their number to a minimum. - */ - -/** - * @brief APB1 clock speed, in Hz. - */ -#define STM32_PCLK1 - -/** - * @brief APB2 clock speed, in Hz. - */ -#define STM32_PCLK2 - -/** @brief Deprecated. Use STM32_PCLK1 instead. */ -#define PCLK1 -/** @brief Deprecated. Use STM32_PCLK2 instead. */ -#define PCLK2 - -/* - * Series- and MCU-specific values. - */ - -/** - * @brief STM32 series value for the MCU being targeted. - * - * At time of writing, allowed values are: STM32_SERIES_F1, - * STM32_SERIES_F2. This set of values will expand as libmaple adds - * support for more STM32 series MCUs. - */ -#define STM32_MCU_SERIES - -/** - * @brief Number of interrupts in the vector table. - * - * This does not include Cortex-M interrupts (NMI, HardFault, etc.). - */ -#define STM32_NR_INTERRUPTS - -/** - * Number of GPIO ports. - */ -#define STM32_NR_GPIO_PORTS - -/* FIXME [0.0.13] add this to ReST API page */ -/** - * @brief Bitmask of timers available on the MCU. - * - * That is, if TIMERn is available, then STM32_TIMER_MASK & (1 << n) - * will be nonzero. For example, a nonzero value of "STM32_TIMER_MASK - * & 0x2" means TIMER1 is available. - * - * A bitmask is necessary as some STM32 MCUs have "holes" in the range - * of available timers. - */ -#define STM32_TIMER_MASK - -/** - * @brief Multiplier to convert microseconds into loop iterations - * in delay_us(). - * - * @see delay_us() - */ -#define STM32_DELAY_US_MULT - -/** - * @brief Pointer to end of built-in SRAM. - * - * Points to the address which is 1 byte past the last valid - * SRAM address. - */ -#define STM32_SRAM_END - -/** - * @brief 1 if the target MCU has a DAC, and 0 otherwise. - */ -#define STM32_HAVE_DAC - -/** - * @brief 1 if the target MCU has the FSMC peripheral, and 0 otherwise. - * - * Note that the feature set of the FSMC peripheral is restricted on - * some MCUs. - */ -#define STM32_HAVE_FSMC - -/** - * @brief 1 if the target MCU has a USB peripheral, and 0 otherwise. - * - * Note that a variety of USB peripherals are available across the - * different series, with widely varying feature sets and programming - * interfaces. This macro will be 1 if any such peripheral is present. - */ -#define STM32_HAVE_USB - -#endif /* __DOXYGEN__ */ - -/* - * The following are for backwards compatibility only. - */ - -/* PCLK1 and PCLK2 are for backwards compatibility only; don't use in - * new code. */ -#ifndef PCLK1 -#define PCLK1 STM32_PCLK1 -#endif -#if PCLK1 != STM32_PCLK1 -#error "PCLK1 (which is deprecated) differs from STM32_PCLK1." -#endif -#ifndef PCLK2 -#define PCLK2 STM32_PCLK2 -#endif -#if PCLK2 != STM32_PCLK2 -#error "PCLK2 (which is deprecated) differs from STM32_PCLK2." -#endif - -/** @brief Deprecated. Use STM32_NR_INTERRUPTS instead. */ -#define NR_INTERRUPTS STM32_NR_INTERRUPTS -/** @brief Deprecated. Use STM32_NR_GPIO_PORTS instead. */ -#define NR_GPIO_PORTS STM32_NR_GPIO_PORTS -/** @brief Deprecated. Use STM32_DELAY_US_MULT instead. */ -#define DELAY_US_MULT STM32_DELAY_US_MULT - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/STM32F1/system/libmaple/include/libmaple/syscfg.h b/STM32F1/system/libmaple/include/libmaple/syscfg.h deleted file mode 100644 index 6b375d3..0000000 --- a/STM32F1/system/libmaple/include/libmaple/syscfg.h +++ /dev/null @@ -1,151 +0,0 @@ -/****************************************************************************** - * The MIT License - * - * Copyright (c) 2012 LeafLabs, LLC. - * - * Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, copy, - * modify, merge, publish, distribute, sublicense, and/or sell copies - * of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS - * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN - * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - *****************************************************************************/ - -/** - * @file libmaple/include/libmaple/syscfg.h - * @brief System configuration controller (SYSCFG) - * - * Availability: STM32F2, STM32F4. - */ - -#ifndef _LIBMAPLE_SYSCFG_H_ -#define _LIBMAPLE_SYSCFG_H_ - -#ifdef __cplusplus -extern "C" { -#endif - -#include - -/* - * Register map and base pointer - */ - -/** - * @brief SYSCFG register map type. - */ -typedef struct syscfg_reg_map { - __io uint32 MEMRMP; /**< Memory remap register */ - __io uint32 PMC; /**< Peripheral mode configuration */ - __io uint32 EXTICR[4]; /**< External interrupt configuration registers */ - const uint32 RESERVED1; - const uint32 RESERVED2; - __io uint32 CMPCR; /**< Compensation cell control register */ -} syscfg_reg_map; - -/** SYSCFG register map base pointer */ -#define SYSCFG_BASE ((struct syscfg_reg_map*)0x40013800) - -/* - * Register bit definitions - */ - -/* Memory remap register */ - -#define SYSCFG_MEMRMP_MEM_MODE 0x3 -#define SYSCFG_MEMRMP_MEM_MODE_FLASH 0x0 -#define SYSCFG_MEMRMP_MEM_MODE_SYS_FLASH 0x1 -#define SYSCFG_MEMRMP_MEM_MODE_FSMC_1 0x2 -#define SYSCFG_MEMRMP_MEM_MODE_EMB_SRAM 0x3 - -/* Peripheral mode configuration register */ - -#define SYSCFG_PMC_MII_RMII_SEL_BIT 23 - -#define SYSCFG_PMC_MII_RMII_SEL (1U << SYSCFG_PMC_MII_RMII_SEL_BIT) -#define SYSCFG_PMC_MII_RMII_SEL_MII (0U << SYSCFG_PMC_MII_RMII_SEL_BIT) -#define SYSCFG_PMC_MII_RMII_SEL_RMII (1U << SYSCFG_PMC_MII_RMII_SEL_BIT) - -/* External interrupt configuration register 1 */ - -#define SYSCFG_EXTICR1_EXTI0 0xF -#define SYSCFG_EXTICR1_EXTI1 0xF0 -#define SYSCFG_EXTICR1_EXTI2 0xF00 -#define SYSCFG_EXTICR1_EXTI3 0xF000 - -/* External interrupt configuration register 2 */ - -#define SYSCFG_EXTICR2_EXTI4 0xF -#define SYSCFG_EXTICR2_EXTI5 0xF0 -#define SYSCFG_EXTICR2_EXTI6 0xF00 -#define SYSCFG_EXTICR2_EXTI7 0xF000 - -/* External interrupt configuration register 3 */ - -#define SYSCFG_EXTICR3_EXTI8 0xF -#define SYSCFG_EXTICR3_EXTI9 0xF0 -#define SYSCFG_EXTICR3_EXTI10 0xF00 -#define SYSCFG_EXTICR3_EXTI11 0xF000 - -/* External interrupt configuration register 4 */ - -#define SYSCFG_EXTICR4_EXTI12 0xF -#define SYSCFG_EXTICR4_EXTI13 0xF0 -#define SYSCFG_EXTICR4_EXTI14 0xF00 -#define SYSCFG_EXTICR4_EXTI15 0xF000 - -/* Compensation cell control register */ - -#define SYSCFG_CMPCR_READY_BIT 8 -#define SYSCFG_CMPCR_CMP_PD_BIT 0 - -#define SYSCFG_CMPCR_READY (1U << SYSCFG_CMPCR_READY_BIT) -#define SYSCFG_CMPCR_CMP_PD (1U << SYSCFG_CMPCR_CMP_PD_BIT) -#define SYSCFG_CMPCR_CMP_PD_PDWN (0U << SYSCFG_CMPCR_CMP_PD_BIT) -#define SYSCFG_CMPCR_CMP_PD_ENABLE (1U << SYSCFG_CMPCR_CMP_PD_BIT) - -/* - * Routines - */ - -void syscfg_init(void); - -void syscfg_enable_io_compensation(void); -void syscfg_disable_io_compensation(void); - -/** - * @brief System memory mode - * These values specify what memory to map to address 0x00000000. - * @see syscfg_set_mem_mode - */ -typedef enum syscfg_mem_mode { - /** Main flash memory is mapped at 0x0. */ - SYCFG_MEM_MODE_FLASH = SYSCFG_MEMRMP_MEM_MODE_FLASH, - /** System flash (i.e. ST's baked-in bootloader) is mapped at 0x0. */ - SYCFG_MEM_MODE_SYSTEM_FLASH = SYSCFG_MEMRMP_MEM_MODE_SYS_FLASH, - /** FSMC bank 1 (NOR/PSRAM 1 and 2) is mapped at 0x0. */ - SYCFG_MEM_MODE_FSMC_BANK_1 = SYSCFG_MEMRMP_MEM_MODE_FSMC_1, - /** Embedded SRAM (i.e., not backup SRAM) is mapped at 0x0. */ - SYCFG_MEM_MODE_SRAM = SYSCFG_MEMRMP_MEM_MODE_EMB_SRAM, -} syscfg_mem_mode; - -void syscfg_set_mem_mode(syscfg_mem_mode); - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/STM32F1/system/libmaple/include/libmaple/systick.h b/STM32F1/system/libmaple/include/libmaple/systick.h deleted file mode 100644 index 551f800..0000000 --- a/STM32F1/system/libmaple/include/libmaple/systick.h +++ /dev/null @@ -1,115 +0,0 @@ -/****************************************************************************** - * The MIT License - * - * Copyright (c) 2010 Perry Hung. - * - * Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, copy, - * modify, merge, publish, distribute, sublicense, and/or sell copies - * of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS - * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN - * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - *****************************************************************************/ - -/** - * @file libmaple/include/libmaple/systick.h - * @brief System timer definitions - */ - -#ifndef _LIBMAPLE_SYSTICK_H_ -#define _LIBMAPLE_SYSTICK_H_ - -#ifdef __cplusplus -extern "C"{ -#endif - -#include -#include - -/** SysTick register map type */ -typedef struct systick_reg_map { - __io uint32 CSR; /**< Control and status register */ - __io uint32 RVR; /**< Reload value register */ - __io uint32 CNT; /**< Current value register ("count") */ - __io uint32 CVR; /**< Calibration value register */ -} systick_reg_map; - -/** SysTick register map base pointer */ -#define SYSTICK_BASE ((struct systick_reg_map*)0xE000E010) - -/* - * Register bit definitions. - */ - -/* Control and status register */ - -#define SYSTICK_CSR_COUNTFLAG BIT(16) -#define SYSTICK_CSR_CLKSOURCE BIT(2) -#define SYSTICK_CSR_CLKSOURCE_EXTERNAL 0 -#define SYSTICK_CSR_CLKSOURCE_CORE BIT(2) -#define SYSTICK_CSR_TICKINT BIT(1) -#define SYSTICK_CSR_TICKINT_PEND BIT(1) -#define SYSTICK_CSR_TICKINT_NO_PEND 0 -#define SYSTICK_CSR_ENABLE BIT(0) -#define SYSTICK_CSR_ENABLE_MULTISHOT BIT(0) -#define SYSTICK_CSR_ENABLE_DISABLED 0 - -/* Calibration value register */ - -#define SYSTICK_CVR_NOREF BIT(31) -#define SYSTICK_CVR_SKEW BIT(30) -#define SYSTICK_CVR_TENMS 0xFFFFFF - -/** System elapsed time, in milliseconds */ -extern volatile uint32 systick_uptime_millis; - -/** - * @brief Returns the system uptime, in milliseconds. - */ -static inline uint32 systick_uptime(void) { - return systick_uptime_millis; -} - - -void systick_init(uint32 reload_val); -void systick_disable(); -void systick_enable(); - -/** - * @brief Returns the current value of the SysTick counter. - */ -static inline uint32 systick_get_count(void) { - return SYSTICK_BASE->CNT; -} - -/** - * @brief Check for underflow. - * - * This function returns 1 if the SysTick timer has counted to 0 since - * the last time it was called. However, any reads of any part of the - * SysTick Control and Status Register SYSTICK_BASE->CSR will - * interfere with this functionality. See the ARM Cortex M3 Technical - * Reference Manual for more details (e.g. Table 8-3 in revision r1p1). - */ -static inline uint32 systick_check_underflow(void) { - return SYSTICK_BASE->CSR & SYSTICK_CSR_COUNTFLAG; -} - -#ifdef __cplusplus -} // extern "C" -#endif - -#endif diff --git a/STM32F1/system/libmaple/include/libmaple/timer.h b/STM32F1/system/libmaple/include/libmaple/timer.h deleted file mode 100644 index ab87cab..0000000 --- a/STM32F1/system/libmaple/include/libmaple/timer.h +++ /dev/null @@ -1,1111 +0,0 @@ -/****************************************************************************** - * The MIT License - * - * Copyright (c) 2011, 2012 LeafLabs, LLC. - * - * Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, copy, - * modify, merge, publish, distribute, sublicense, and/or sell copies - * of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS - * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN - * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - *****************************************************************************/ - -/** - * @file libmaple/include/libmaple/timer.h - * @author Marti Bolivar - * @brief Timer interface. - */ - -#ifndef _LIBMAPLE_TIMER_H_ -#define _LIBMAPLE_TIMER_H_ - -#ifdef __cplusplus -extern "C"{ -#endif - -/* Roger clark. Replaced with line below #include */ -#include "stm32f1/include/series/timer.h" -#include -#include -#include -#include - -/* - * Register maps - */ - -/** Advanced control timer register map type */ -typedef struct timer_adv_reg_map { - __io uint32 CR1; /**< Control register 1 */ - __io uint32 CR2; /**< Control register 2 */ - __io uint32 SMCR; /**< Slave mode control register */ - __io uint32 DIER; /**< DMA/interrupt enable register */ - __io uint32 SR; /**< Status register */ - __io uint32 EGR; /**< Event generation register */ - __io uint32 CCMR1; /**< Capture/compare mode register 1 */ - __io uint32 CCMR2; /**< Capture/compare mode register 2 */ - __io uint32 CCER; /**< Capture/compare enable register */ - __io uint32 CNT; /**< Counter */ - __io uint32 PSC; /**< Prescaler */ - __io uint32 ARR; /**< Auto-reload register */ - __io uint32 RCR; /**< Repetition counter register */ - __io uint32 CCR1; /**< Capture/compare register 1 */ - __io uint32 CCR2; /**< Capture/compare register 2 */ - __io uint32 CCR3; /**< Capture/compare register 3 */ - __io uint32 CCR4; /**< Capture/compare register 4 */ - __io uint32 BDTR; /**< Break and dead-time register */ - __io uint32 DCR; /**< DMA control register */ - __io uint32 DMAR; /**< DMA address for full transfer */ -} timer_adv_reg_map; - -/* General purpose timer register map type: intentionally omitted. - * - * General purpose timers differ slightly across series, so leave it - * up to the series header to define struct timer_gen_reg_map. */ - -/** Basic timer register map type */ -typedef struct timer_bas_reg_map { - __io uint32 CR1; /**< Control register 1 */ - __io uint32 CR2; /**< Control register 2 */ - const uint32 RESERVED1; /**< Reserved */ - __io uint32 DIER; /**< DMA/interrupt enable register */ - __io uint32 SR; /**< Status register */ - __io uint32 EGR; /**< Event generation register */ - const uint32 RESERVED2; /**< Reserved */ - const uint32 RESERVED3; /**< Reserved */ - const uint32 RESERVED4; /**< Reserved */ - __io uint32 CNT; /**< Counter */ - __io uint32 PSC; /**< Prescaler */ - __io uint32 ARR; /**< Auto-reload register */ -} timer_bas_reg_map; - -/* - * Timer devices - */ - -/** - * @brief Timer register map type. - * - * Just holds a pointer to the correct type of register map, based on - * the timer's type. - */ -typedef union timer_reg_map { - timer_adv_reg_map *adv; /**< Advanced register map */ - timer_gen_reg_map *gen; /**< General purpose register map */ - timer_bas_reg_map *bas; /**< Basic register map */ -} timer_reg_map; - -/** - * @brief Timer type - * - * Type marker for timer_dev. - * - * @see timer_dev - */ -typedef enum timer_type { - TIMER_ADVANCED, /**< Advanced type */ - TIMER_GENERAL, /**< General purpose type */ - TIMER_BASIC, /**< Basic type */ -} timer_type; - -/** Timer device type */ -typedef struct timer_dev { - timer_reg_map regs; /**< Register map */ - rcc_clk_id clk_id; /**< RCC clock information */ - timer_type type; /**< Timer's type */ - voidFuncPtr handlers[]; /**< - * Don't touch these. Use these instead: - * @see timer_attach_interrupt() - * @see timer_detach_interrupt() */ -} timer_dev; - -#if STM32_HAVE_TIMER(1) -extern timer_dev *TIMER1; -#endif -#if STM32_HAVE_TIMER(2) -extern timer_dev *TIMER2; -#endif -#if STM32_HAVE_TIMER(3) -extern timer_dev *TIMER3; -#endif -#if STM32_HAVE_TIMER(4) -extern timer_dev *TIMER4; -#endif -#if STM32_HAVE_TIMER(5) -extern timer_dev *TIMER5; -#endif -#if STM32_HAVE_TIMER(6) -extern timer_dev *TIMER6; -#endif -#if STM32_HAVE_TIMER(7) -extern timer_dev *TIMER7; -#endif -#if STM32_HAVE_TIMER(8) -extern timer_dev *TIMER8; -#endif -#if STM32_HAVE_TIMER(9) -extern timer_dev *TIMER9; -#endif -#if STM32_HAVE_TIMER(10) -extern timer_dev *TIMER10; -#endif -#if STM32_HAVE_TIMER(11) -extern timer_dev *TIMER11; -#endif -#if STM32_HAVE_TIMER(12) -extern timer_dev *TIMER12; -#endif -#if STM32_HAVE_TIMER(13) -extern timer_dev *TIMER13; -#endif -#if STM32_HAVE_TIMER(14) -extern timer_dev *TIMER14; -#endif - -/* - * Register bit definitions - */ - -/* Control register 1 (CR1) */ - -#define TIMER_CR1_ARPE_BIT 7 -#define TIMER_CR1_DIR_BIT 4 -#define TIMER_CR1_OPM_BIT 3 -#define TIMER_CR1_URS_BIT 2 -#define TIMER_CR1_UDIS_BIT 1 -#define TIMER_CR1_CEN_BIT 0 - -#define TIMER_CR1_CKD (0x3 << 8) -#define TIMER_CR1_CKD_1TCKINT (0x0 << 8) -#define TIMER_CR1_CKD_2TCKINT (0x1 << 8) -#define TIMER_CR1_CKD_4TICKINT (0x2 << 8) -#define TIMER_CR1_ARPE (1U << TIMER_CR1_ARPE_BIT) -#define TIMER_CR1_CKD_CMS (0x3 << 5) -#define TIMER_CR1_CKD_CMS_EDGE (0x0 << 5) -#define TIMER_CR1_CKD_CMS_CENTER1 (0x1 << 5) -#define TIMER_CR1_CKD_CMS_CENTER2 (0x2 << 5) -#define TIMER_CR1_CKD_CMS_CENTER3 (0x3 << 5) -#define TIMER_CR1_DIR (1U << TIMER_CR1_DIR_BIT) -#define TIMER_CR1_OPM (1U << TIMER_CR1_OPM_BIT) -#define TIMER_CR1_URS (1U << TIMER_CR1_URS_BIT) -#define TIMER_CR1_UDIS (1U << TIMER_CR1_UDIS_BIT) -#define TIMER_CR1_CEN (1U << TIMER_CR1_CEN_BIT) - -/* Control register 2 (CR2) */ - -#define TIMER_CR2_OIS4_BIT 14 -#define TIMER_CR2_OIS3N_BIT 13 -#define TIMER_CR2_OIS3_BIT 12 -#define TIMER_CR2_OIS2N_BIT 11 -#define TIMER_CR2_OIS2_BIT 10 -#define TIMER_CR2_OIS1N_BIT 9 -#define TIMER_CR2_OIS1_BIT 8 -#define TIMER_CR2_TI1S_BIT 7 -#define TIMER_CR2_CCDS_BIT 3 -#define TIMER_CR2_CCUS_BIT 2 -#define TIMER_CR2_CCPC_BIT 0 - -#define TIMER_CR2_OIS4 (1U << TIMER_CR2_OIS4_BIT) -#define TIMER_CR2_OIS3N (1U << TIMER_CR2_OIS3N_BIT) -#define TIMER_CR2_OIS3 (1U << TIMER_CR2_OIS3_BIT) -#define TIMER_CR2_OIS2N (1U << TIMER_CR2_OIS2N_BIT) -#define TIMER_CR2_OIS2 (1U << TIMER_CR2_OIS2_BIT) -#define TIMER_CR2_OIS1N (1U << TIMER_CR2_OIS1N_BIT) -#define TIMER_CR2_OIS1 (1U << TIMER_CR2_OIS1_BIT) -#define TIMER_CR2_TI1S (1U << TIMER_CR2_TI1S_BIT) -#define TIMER_CR2_MMS (0x7 << 4) -#define TIMER_CR2_MMS_RESET (0x0 << 4) -#define TIMER_CR2_MMS_ENABLE (0x1 << 4) -#define TIMER_CR2_MMS_UPDATE (0x2 << 4) -#define TIMER_CR2_MMS_COMPARE_PULSE (0x3 << 4) -#define TIMER_CR2_MMS_COMPARE_OC1REF (0x4 << 4) -#define TIMER_CR2_MMS_COMPARE_OC2REF (0x5 << 4) -#define TIMER_CR2_MMS_COMPARE_OC3REF (0x6 << 4) -#define TIMER_CR2_MMS_COMPARE_OC4REF (0x7 << 4) -#define TIMER_CR2_CCDS (1U << TIMER_CR2_CCDS_BIT) -#define TIMER_CR2_CCUS (1U << TIMER_CR2_CCUS_BIT) -#define TIMER_CR2_CCPC (1U << TIMER_CR2_CCPC_BIT) - -/* Slave mode control register (SMCR) */ - -#define TIMER_SMCR_ETP_BIT 15 -#define TIMER_SMCR_ECE_BIT 14 -#define TIMER_SMCR_MSM_BIT 7 - -#define TIMER_SMCR_ETP (1U << TIMER_SMCR_ETP_BIT) -#define TIMER_SMCR_ECE (1U << TIMER_SMCR_ECE_BIT) -#define TIMER_SMCR_ETPS (0x3 << 12) -#define TIMER_SMCR_ETPS_OFF (0x0 << 12) -#define TIMER_SMCR_ETPS_DIV2 (0x1 << 12) -#define TIMER_SMCR_ETPS_DIV4 (0x2 << 12) -#define TIMER_SMCR_ETPS_DIV8 (0x3 << 12) -#define TIMER_SMCR_ETF (0xF << 12) -#define TIMER_SMCR_MSM (1U << TIMER_SMCR_MSM_BIT) -#define TIMER_SMCR_TS (0x3 << 4) -#define TIMER_SMCR_TS_ITR0 (0x0 << 4) -#define TIMER_SMCR_TS_ITR1 (0x1 << 4) -#define TIMER_SMCR_TS_ITR2 (0x2 << 4) -#define TIMER_SMCR_TS_ITR3 (0x3 << 4) -#define TIMER_SMCR_TS_TI1F_ED (0x4 << 4) -#define TIMER_SMCR_TS_TI1FP1 (0x5 << 4) -#define TIMER_SMCR_TS_TI2FP2 (0x6 << 4) -#define TIMER_SMCR_TS_ETRF (0x7 << 4) -#define TIMER_SMCR_SMS 0x3 -#define TIMER_SMCR_SMS_DISABLED 0x0 -#define TIMER_SMCR_SMS_ENCODER1 0x1 -#define TIMER_SMCR_SMS_ENCODER2 0x2 -#define TIMER_SMCR_SMS_ENCODER3 0x3 -#define TIMER_SMCR_SMS_RESET 0x4 -#define TIMER_SMCR_SMS_GATED 0x5 -#define TIMER_SMCR_SMS_TRIGGER 0x6 -#define TIMER_SMCR_SMS_EXTERNAL 0x7 - -/* DMA/Interrupt enable register (DIER) */ - -#define TIMER_DIER_TDE_BIT 14 -#define TIMER_DIER_COMDE_BIT 13 -#define TIMER_DIER_CC4DE_BIT 12 -#define TIMER_DIER_CC3DE_BIT 11 -#define TIMER_DIER_CC2DE_BIT 10 -#define TIMER_DIER_CC1DE_BIT 9 -#define TIMER_DIER_UDE_BIT 8 -#define TIMER_DIER_BIE_BIT 7 -#define TIMER_DIER_TIE_BIT 6 -#define TIMER_DIER_COMIE_BIT 5 -#define TIMER_DIER_CC4IE_BIT 4 -#define TIMER_DIER_CC3IE_BIT 3 -#define TIMER_DIER_CC2IE_BIT 2 -#define TIMER_DIER_CC1IE_BIT 1 -#define TIMER_DIER_UIE_BIT 0 - -#define TIMER_DIER_TDE (1U << TIMER_DIER_TDE_BIT) -#define TIMER_DIER_COMDE (1U << TIMER_DIER_COMDE_BIT) -#define TIMER_DIER_CC4DE (1U << TIMER_DIER_CC4DE_BIT) -#define TIMER_DIER_CC3DE (1U << TIMER_DIER_CC3DE_BIT) -#define TIMER_DIER_CC2DE (1U << TIMER_DIER_CC2DE_BIT) -#define TIMER_DIER_CC1DE (1U << TIMER_DIER_CC1DE_BIT) -#define TIMER_DIER_UDE (1U << TIMER_DIER_UDE_BIT) -#define TIMER_DIER_BIE (1U << TIMER_DIER_BIE_BIT) -#define TIMER_DIER_TIE (1U << TIMER_DIER_TIE_BIT) -#define TIMER_DIER_COMIE (1U << TIMER_DIER_COMIE_BIT) -#define TIMER_DIER_CC4IE (1U << TIMER_DIER_CC4IE_BIT) -#define TIMER_DIER_CC3IE (1U << TIMER_DIER_CC3IE_BIT) -#define TIMER_DIER_CC2IE (1U << TIMER_DIER_CC2IE_BIT) -#define TIMER_DIER_CC1IE (1U << TIMER_DIER_CC1IE_BIT) -#define TIMER_DIER_UIE (1U << TIMER_DIER_UIE_BIT) - -/* Status register (SR) */ - -#define TIMER_SR_CC4OF_BIT 12 -#define TIMER_SR_CC3OF_BIT 11 -#define TIMER_SR_CC2OF_BIT 10 -#define TIMER_SR_CC1OF_BIT 9 -#define TIMER_SR_BIF_BIT 7 -#define TIMER_SR_TIF_BIT 6 -#define TIMER_SR_COMIF_BIT 5 -#define TIMER_SR_CC4IF_BIT 4 -#define TIMER_SR_CC3IF_BIT 3 -#define TIMER_SR_CC2IF_BIT 2 -#define TIMER_SR_CC1IF_BIT 1 -#define TIMER_SR_UIF_BIT 0 - -#define TIMER_SR_CC4OF (1U << TIMER_SR_CC4OF_BIT) -#define TIMER_SR_CC3OF (1U << TIMER_SR_CC3OF_BIT) -#define TIMER_SR_CC2OF (1U << TIMER_SR_CC2OF_BIT) -#define TIMER_SR_CC1OF (1U << TIMER_SR_CC1OF_BIT) -#define TIMER_SR_BIF (1U << TIMER_SR_BIF_BIT) -#define TIMER_SR_TIF (1U << TIMER_SR_TIF_BIT) -#define TIMER_SR_COMIF (1U << TIMER_SR_COMIF_BIT) -#define TIMER_SR_CC4IF (1U << TIMER_SR_CC4IF_BIT) -#define TIMER_SR_CC3IF (1U << TIMER_SR_CC3IF_BIT) -#define TIMER_SR_CC2IF (1U << TIMER_SR_CC2IF_BIT) -#define TIMER_SR_CC1IF (1U << TIMER_SR_CC1IF_BIT) -#define TIMER_SR_UIF (1U << TIMER_SR_UIF_BIT) - -/* Event generation register (EGR) */ - -#define TIMER_EGR_BG_BIT 7 -#define TIMER_EGR_TG_BIT 6 -#define TIMER_EGR_COMG_BIT 5 -#define TIMER_EGR_CC4G_BIT 4 -#define TIMER_EGR_CC3G_BIT 3 -#define TIMER_EGR_CC2G_BIT 2 -#define TIMER_EGR_CC1G_BIT 1 -#define TIMER_EGR_UG_BIT 0 - -#define TIMER_EGR_BG (1U << TIMER_EGR_BG_BIT) -#define TIMER_EGR_TG (1U << TIMER_EGR_TG_BIT) -#define TIMER_EGR_COMG (1U << TIMER_EGR_COMG_BIT) -#define TIMER_EGR_CC4G (1U << TIMER_EGR_CC4G_BIT) -#define TIMER_EGR_CC3G (1U << TIMER_EGR_CC3G_BIT) -#define TIMER_EGR_CC2G (1U << TIMER_EGR_CC2G_BIT) -#define TIMER_EGR_CC1G (1U << TIMER_EGR_CC1G_BIT) -#define TIMER_EGR_UG (1U << TIMER_EGR_UG_BIT) - -/* Capture/compare mode registers, common values */ - -#define TIMER_CCMR_CCS_OUTPUT 0x0 -#define TIMER_CCMR_CCS_INPUT_TI1 0x1 -#define TIMER_CCMR_CCS_INPUT_TI2 0x2 -#define TIMER_CCMR_CCS_INPUT_TRC 0x3 - -/* Capture/compare mode register 1 (CCMR1) */ - -#define TIMER_CCMR1_OC2CE_BIT 15 -#define TIMER_CCMR1_OC2PE_BIT 11 -#define TIMER_CCMR1_OC2FE_BIT 10 -#define TIMER_CCMR1_OC1CE_BIT 7 -#define TIMER_CCMR1_OC1PE_BIT 3 -#define TIMER_CCMR1_OC1FE_BIT 2 - -#define TIMER_CCMR1_OC2CE (1U << TIMER_CCMR1_OC2CE_BIT) -#define TIMER_CCMR1_OC2M (0x3 << 12) -#define TIMER_CCMR1_IC2F (0xF << 12) -#define TIMER_CCMR1_OC2PE (1U << TIMER_CCMR1_OC2PE_BIT) -#define TIMER_CCMR1_OC2FE (1U << TIMER_CCMR1_OC2FE_BIT) -#define TIMER_CCMR1_IC2PSC (0x3 << 10) -#define TIMER_CCMR1_CC2S (0x3 << 8) -#define TIMER_CCMR1_CC2S_OUTPUT (TIMER_CCMR_CCS_OUTPUT << 8) -#define TIMER_CCMR1_CC2S_INPUT_TI1 (TIMER_CCMR_CCS_INPUT_TI1 << 8) -#define TIMER_CCMR1_CC2S_INPUT_TI2 (TIMER_CCMR_CCS_INPUT_TI2 << 8) -#define TIMER_CCMR1_CC2S_INPUT_TRC (TIMER_CCMR_CCS_INPUT_TRC << 8) -#define TIMER_CCMR1_OC1CE (1U << TIMER_CCMR1_OC1CE_BIT) -#define TIMER_CCMR1_OC1M (0x3 << 4) -#define TIMER_CCMR1_IC1F (0xF << 4) -#define TIMER_CCMR1_OC1PE (1U << TIMER_CCMR1_OC1PE_BIT) -#define TIMER_CCMR1_OC1FE (1U << TIMER_CCMR1_OC1FE_BIT) -#define TIMER_CCMR1_IC1PSC (0x3 << 2) -#define TIMER_CCMR1_CC1S 0x3 -#define TIMER_CCMR1_CC1S_OUTPUT TIMER_CCMR_CCS_OUTPUT -#define TIMER_CCMR1_CC1S_INPUT_TI1 TIMER_CCMR_CCS_INPUT_TI1 -#define TIMER_CCMR1_CC1S_INPUT_TI2 TIMER_CCMR_CCS_INPUT_TI2 -#define TIMER_CCMR1_CC1S_INPUT_TRC TIMER_CCMR_CCS_INPUT_TRC - -/* Capture/compare mode register 2 (CCMR2) */ - -#define TIMER_CCMR2_OC4CE_BIT 15 -#define TIMER_CCMR2_OC4PE_BIT 11 -#define TIMER_CCMR2_OC4FE_BIT 10 -#define TIMER_CCMR2_OC3CE_BIT 7 -#define TIMER_CCMR2_OC3PE_BIT 3 -#define TIMER_CCMR2_OC3FE_BIT 2 - -#define TIMER_CCMR2_OC4CE (1U << TIMER_CCMR2_OC4CE_BIT) -#define TIMER_CCMR2_OC4M (0x3 << 12) -#define TIMER_CCMR2_IC4F (0xF << 12) -#define TIMER_CCMR2_OC4PE (1U << TIMER_CCMR2_OC4PE_BIT) -#define TIMER_CCMR2_OC4FE (1U << TIMER_CCMR2_OC4FE_BIT) -#define TIMER_CCMR2_IC4PSC (0x3 << 10) -#define TIMER_CCMR2_CC4S (0x3 << 8) -#define TIMER_CCMR2_CC4S_OUTPUT (TIMER_CCMR_CCS_OUTPUT << 8) -#define TIMER_CCMR2_CC4S_INPUT_TI1 (TIMER_CCMR_CCS_INPUT_TI1 << 8) -#define TIMER_CCMR2_CC4S_INPUT_TI2 (TIMER_CCMR_CCS_INPUT_TI2 << 8) -#define TIMER_CCMR2_CC4S_INPUT_TRC (TIMER_CCMR_CCS_INPUT_TRC << 8) -#define TIMER_CCMR2_OC3CE (1U << TIMER_CCMR2_OC3CE_BIT) -#define TIMER_CCMR2_OC3M (0x3 << 4) -#define TIMER_CCMR2_IC3F (0xF << 4) -#define TIMER_CCMR2_OC3PE (1U << TIMER_CCMR2_OC3PE_BIT) -#define TIMER_CCMR2_OC3FE (1U << TIMER_CCMR2_OC3FE_BIT) -#define TIMER_CCMR2_IC3PSC (0x3 << 2) -#define TIMER_CCMR2_CC3S 0x3 -#define TIMER_CCMR2_CC3S_OUTPUT TIMER_CCMR_CCS_OUTPUT -#define TIMER_CCMR2_CC3S_INPUT_TI1 TIMER_CCMR_CCS_INPUT_TI1 -#define TIMER_CCMR2_CC3S_INPUT_TI2 TIMER_CCMR_CCS_INPUT_TI2 -#define TIMER_CCMR2_CC3S_INPUT_TRC TIMER_CCMR_CCS_INPUT_TRC - -/* Capture/compare enable register (CCER) */ - -#define TIMER_CCER_CC4P_BIT 13 -#define TIMER_CCER_CC4E_BIT 12 -#define TIMER_CCER_CC3NP_BIT 11 -#define TIMER_CCER_CC3NE_BIT 10 -#define TIMER_CCER_CC3P_BIT 9 -#define TIMER_CCER_CC3E_BIT 8 -#define TIMER_CCER_CC2NP_BIT 7 -#define TIMER_CCER_CC2NE_BIT 6 -#define TIMER_CCER_CC2P_BIT 5 -#define TIMER_CCER_CC2E_BIT 4 -#define TIMER_CCER_CC1NP_BIT 3 -#define TIMER_CCER_CC1NE_BIT 2 -#define TIMER_CCER_CC1P_BIT 1 -#define TIMER_CCER_CC1E_BIT 0 - -#define TIMER_CCER_CC4P (1U << TIMER_CCER_CC4P_BIT) -#define TIMER_CCER_CC4E (1U << TIMER_CCER_CC4E_BIT) -#define TIMER_CCER_CC3NP (1U << TIMER_CCER_CC3NP_BIT) -#define TIMER_CCER_CC3NE (1U << TIMER_CCER_CC3NE_BIT) -#define TIMER_CCER_CC3P (1U << TIMER_CCER_CC3P_BIT) -#define TIMER_CCER_CC3E (1U << TIMER_CCER_CC3E_BIT) -#define TIMER_CCER_CC2NP (1U << TIMER_CCER_CC2NP_BIT) -#define TIMER_CCER_CC2NE (1U << TIMER_CCER_CC2NE_BIT) -#define TIMER_CCER_CC2P (1U << TIMER_CCER_CC2P_BIT) -#define TIMER_CCER_CC2E (1U << TIMER_CCER_CC2E_BIT) -#define TIMER_CCER_CC1NP (1U << TIMER_CCER_CC1NP_BIT) -#define TIMER_CCER_CC1NE (1U << TIMER_CCER_CC1NE_BIT) -#define TIMER_CCER_CC1P (1U << TIMER_CCER_CC1P_BIT) -#define TIMER_CCER_CC1E (1U << TIMER_CCER_CC1E_BIT) - -/* Break and dead-time register (BDTR) */ - -#define TIMER_BDTR_MOE_BIT 15 -#define TIMER_BDTR_AOE_BIT 14 -#define TIMER_BDTR_BKP_BIT 13 -#define TIMER_BDTR_BKE_BIT 12 -#define TIMER_BDTR_OSSR_BIT 11 -#define TIMER_BDTR_OSSI_BIT 10 - -#define TIMER_BDTR_MOE (1U << TIMER_BDTR_MOE_BIT) -#define TIMER_BDTR_AOE (1U << TIMER_BDTR_AOE_BIT) -#define TIMER_BDTR_BKP (1U << TIMER_BDTR_BKP_BIT) -#define TIMER_BDTR_BKE (1U << TIMER_BDTR_BKE_BIT) -#define TIMER_BDTR_OSSR (1U << TIMER_BDTR_OSSR_BIT) -#define TIMER_BDTR_OSSI (1U << TIMER_BDTR_OSSI_BIT) -#define TIMER_BDTR_LOCK (0x3 << 8) -#define TIMER_BDTR_LOCK_OFF (0x0 << 8) -#define TIMER_BDTR_LOCK_LEVEL1 (0x1 << 8) -#define TIMER_BDTR_LOCK_LEVEL2 (0x2 << 8) -#define TIMER_BDTR_LOCK_LEVEL3 (0x3 << 8) -#define TIMER_BDTR_DTG 0xFF - -/* DMA control register (DCR) */ - -#define TIMER_DCR_DBL (0x1F << 8) -#define TIMER_DCR_DBL_1_XFER (0x0 << 8) -#define TIMER_DCR_DBL_2_XFER (0x1 << 8) -#define TIMER_DCR_DBL_3_XFER (0x2 << 8) -#define TIMER_DCR_DBL_4_XFER (0x3 << 8) -#define TIMER_DCR_DBL_5_XFER (0x4 << 8) -#define TIMER_DCR_DBL_6_XFER (0x5 << 8) -#define TIMER_DCR_DBL_7_XFER (0x6 << 8) -#define TIMER_DCR_DBL_8_XFER (0x7 << 8) -#define TIMER_DCR_DBL_9_XFER (0x8 << 8) -#define TIMER_DCR_DBL_10_XFER (0x9 << 8) -#define TIMER_DCR_DBL_11_XFER (0xA << 8) -#define TIMER_DCR_DBL_12_XFER (0xB << 8) -#define TIMER_DCR_DBL_13_XFER (0xC << 8) -#define TIMER_DCR_DBL_14_XFER (0xD << 8) -#define TIMER_DCR_DBL_15_XFER (0xE << 8) -#define TIMER_DCR_DBL_16_XFER (0xF << 8) -#define TIMER_DCR_DBL_17_XFER (0x10 << 8) -#define TIMER_DCR_DBL_18_XFER (0x11 << 8) -#define TIMER_DCR_DBA 0x1F -#define TIMER_DCR_DBA_CR1 0x0 -#define TIMER_DCR_DBA_CR2 0x1 -#define TIMER_DCR_DBA_SMCR 0x2 -#define TIMER_DCR_DBA_DIER 0x3 -#define TIMER_DCR_DBA_SR 0x4 -#define TIMER_DCR_DBA_EGR 0x5 -#define TIMER_DCR_DBA_CCMR1 0x6 -#define TIMER_DCR_DBA_CCMR2 0x7 -#define TIMER_DCR_DBA_CCER 0x8 -#define TIMER_DCR_DBA_CNT 0x9 -#define TIMER_DCR_DBA_PSC 0xA -#define TIMER_DCR_DBA_ARR 0xB -#define TIMER_DCR_DBA_RCR 0xC -#define TIMER_DCR_DBA_CCR1 0xD -#define TIMER_DCR_DBA_CCR2 0xE -#define TIMER_DCR_DBA_CCR3 0xF -#define TIMER_DCR_DBA_CCR4 0x10 -#define TIMER_DCR_DBA_BDTR 0x11 -#define TIMER_DCR_DBA_DCR 0x12 -#define TIMER_DCR_DBA_DMAR 0x13 - -/* - * Convenience routines - */ - -/** - * @brief Used to configure the behavior of a timer channel. - * - * Be careful: not all timers can be configured in every mode. - */ -typedef enum timer_mode { - /** - * The timer stops counting, channel interrupts are detached, and - * no state changes are output. */ - TIMER_DISABLED, - - /** PWM output. */ - TIMER_PWM, - - /* TIMER_PWM_CENTER_ALIGNED, TODO: Center-aligned PWM output mode. */ - - /** - * The timer counts from 0 to its reload value repeatedly; every - * time the counter value reaches one of the channel compare - * values, the corresponding interrupt is fired. */ - TIMER_OUTPUT_COMPARE, - - /* TIMER_INPUT_CAPTURE, TODO: In this mode, the timer can measure the - * pulse lengths of input signals */ - /* TIMER_ONE_PULSE, TODO: In this mode, the timer can generate a single - * pulse on a GPIO pin for a specified amount of - * time. */ -} timer_mode; - -/** Timer channel numbers */ -typedef enum timer_channel { - TIMER_CH1 = 1, /**< Channel 1 */ - TIMER_CH2 = 2, /**< Channel 2 */ - TIMER_CH3 = 3, /**< Channel 3 */ - TIMER_CH4 = 4 /**< Channel 4 */ -} timer_channel; - -/* - * Note: Don't require timer_channel arguments! We want to be able to say - * - * for (int channel = 1; channel <= 4; channel++) { - * ... - * } - * - * without the compiler yelling at us. - */ - -void timer_init(timer_dev *dev); -void timer_disable(timer_dev *dev); -void timer_set_mode(timer_dev *dev, uint8 channel, timer_mode mode); -void timer_foreach(void (*fn)(timer_dev*)); -int timer_has_cc_channel(timer_dev *dev, uint8 channel); - -/** - * @brief Timer interrupt number. - * - * Not all timers support all of these values. All timers support - * TIMER_UPDATE_INTERRUPT. "General purpose" timers can be a special - * nuisance in this regard, as they individually support different - * subsets of the available interupts. Consult your target's reference - * manual for the details. - */ -typedef enum timer_interrupt_id { - TIMER_UPDATE_INTERRUPT, /**< Update interrupt. */ - TIMER_CC1_INTERRUPT, /**< Capture/compare 1 interrupt. */ - TIMER_CC2_INTERRUPT, /**< Capture/compare 2 interrupt. */ - TIMER_CC3_INTERRUPT, /**< Capture/compare 3 interrupt. */ - TIMER_CC4_INTERRUPT, /**< Capture/compare 4 interrupt. */ - TIMER_COM_INTERRUPT, /**< COM interrupt. */ - TIMER_TRG_INTERRUPT, /**< Trigger interrupt. */ - TIMER_BREAK_INTERRUPT, /**< Break interrupt. */ -} timer_interrupt_id; - -void timer_attach_interrupt(timer_dev *dev, - uint8 interrupt, - voidFuncPtr handler); -void timer_detach_interrupt(timer_dev *dev, uint8 interrupt); - -/** - * Initialize all timer devices on the chip. - */ -static inline void timer_init_all(void) { - timer_foreach(timer_init); -} - -/** - * Disables all timers on the device. - */ -static inline void timer_disable_all(void) { - timer_foreach(timer_disable); -} - -/** - * @brief Stop a timer's counter from changing. - * - * Does not affect the timer's mode or other settings. - * - * @param dev Device whose counter to pause. - */ -static inline void timer_pause(timer_dev *dev) { - *bb_perip(&(dev->regs).bas->CR1, TIMER_CR1_CEN_BIT) = 0; -} - -/** - * @brief Start a timer's counter. - * - * Does not affect the timer's mode or other settings. - * - * @param dev Device whose counter to resume - */ -static inline void timer_resume(timer_dev *dev) { - *bb_perip(&(dev->regs).bas->CR1, TIMER_CR1_CEN_BIT) = 1; -} - -/** - * @brief Returns the timer's counter value. - * - * This value is likely to be inaccurate if the counter is running - * with a low prescaler. - * - * @param dev Timer whose counter to return - */ -static inline uint16 timer_get_count(timer_dev *dev) { - return (uint16)(dev->regs).bas->CNT; -} - -/** - * @brief Sets the counter value for the given timer. - * @param dev Timer whose counter to set - * @param value New counter value - */ -static inline void timer_set_count(timer_dev *dev, uint16 value) { - (dev->regs).bas->CNT = value; -} - -/** - * @brief Returns the given timer's prescaler. - * - * Note that if the timer's prescaler is set (e.g. via - * timer_set_prescaler() or accessing a TIMx_PSC register), the value - * returned by this function will reflect the new setting, but the - * timer's counter will only reflect the new prescaler at the next - * update event. - * - * @param dev Timer whose prescaler to return - * @see timer_generate_update() - */ -static inline uint16 timer_get_prescaler(timer_dev *dev) { - return (uint16)(dev->regs).bas->PSC; -} - -/** - * @brief Set a timer's prescale value. - * - * Divides the input clock by (PSC+1). The new value will not take - * effect until the next update event. - * - * @param dev Timer whose prescaler to set - * @param psc New prescaler value - * @see timer_generate_update() - */ -static inline void timer_set_prescaler(timer_dev *dev, uint16 psc) { - (dev->regs).bas->PSC = psc; -} - -/** - * @brief Returns a timer's reload value. - * @param dev Timer whose reload value to return - */ -static inline uint16 timer_get_reload(timer_dev *dev) { - return (uint16)(dev->regs).bas->ARR; -} - -/** - * @brief Set a timer's reload value. - * @param dev Timer whose reload value to set - * @param arr New reload value to use. Takes effect at next update event. - * @see timer_generate_update() - */ -static inline void timer_set_reload(timer_dev *dev, uint16 arr) { - (dev->regs).bas->ARR = arr; -} - -/** - * @brief Get the compare value for the given timer channel. - * @param dev Timer device, must have type TIMER_ADVANCED or TIMER_GENERAL. - * @param channel Channel whose compare value to get. - */ -static inline uint16 timer_get_compare(timer_dev *dev, uint8 channel) { - __io uint32 *ccr = &(dev->regs).gen->CCR1 + (channel - 1); - return *ccr; -} - -/** - * @brief Set the compare value for the given timer channel. - * @param dev Timer device, must have type TIMER_ADVANCED or TIMER_GENERAL. - * @param channel Channel whose compare value to set. - * @param value New compare value. - */ -static inline void timer_set_compare(timer_dev *dev, - uint8 channel, - uint16 value) { - __io uint32 *ccr = &(dev->regs).gen->CCR1 + (channel - 1); - *ccr = value; -} - -/** - * @brief Generate an update event for the given timer. - * - * Normally, this will cause the prescaler and auto-reload values in - * the PSC and ARR registers to take immediate effect. However, this - * function will do nothing if the UDIS bit is set in the timer's CR1 - * register (UDIS is cleared by default). - * - * @param dev Timer device to generate an update for. - */ -static inline void timer_generate_update(timer_dev *dev) { - *bb_perip(&(dev->regs).bas->EGR, TIMER_EGR_UG_BIT) = 1; -} - -/** - * @brief Enable a timer's trigger DMA request - * @param dev Timer device, must have type TIMER_ADVANCED or TIMER_GENERAL - */ -static inline void timer_dma_enable_trg_req(timer_dev *dev) { - *bb_perip(&(dev->regs).gen->DIER, TIMER_DIER_TDE_BIT) = 1; -} - -/** - * @brief Disable a timer's trigger DMA request - * @param dev Timer device, must have type TIMER_ADVANCED or TIMER_GENERAL - */ -static inline void timer_dma_disable_trg_req(timer_dev *dev) { - *bb_perip(&(dev->regs).gen->DIER, TIMER_DIER_TDE_BIT) = 0; -} - -/** - * @brief Enable a timer channel's DMA request. - * @param dev Timer device, must have type TIMER_ADVANCED or TIMER_GENERAL - * @param channel Channel whose DMA request to enable. - */ -static inline void timer_dma_enable_req(timer_dev *dev, uint8 channel) { - *bb_perip(&(dev->regs).gen->DIER, channel + 8) = 1; -} - -/** - * @brief Disable a timer channel's DMA request. - * @param dev Timer device, must have type TIMER_ADVANCED or TIMER_GENERAL. - * @param channel Channel whose DMA request to disable. - */ -static inline void timer_dma_disable_req(timer_dev *dev, uint8 channel) { - *bb_perip(&(dev->regs).gen->DIER, channel + 8) = 0; -} - -/** - * @brief Enable a timer interrupt. - * @param dev Timer device. - * @param interrupt Interrupt number to enable; this may be any - * timer_interrupt_id value appropriate for the timer. - * @see timer_interrupt_id - * @see timer_channel - */ -static inline void timer_enable_irq(timer_dev *dev, uint8 interrupt) { - *bb_perip(&(dev->regs).adv->DIER, interrupt) = 1; -} - -/** - * @brief Disable a timer interrupt. - * @param dev Timer device. - * @param interrupt Interrupt number to disable; this may be any - * timer_interrupt_id value appropriate for the timer. - * @see timer_interrupt_id - * @see timer_channel - */ -static inline void timer_disable_irq(timer_dev *dev, uint8 interrupt) { - *bb_perip(&(dev->regs).adv->DIER, interrupt) = 0; -} - -/** - * @brief Enable a timer channel's capture/compare signal. - * - * If the channel is configured as output, the corresponding output - * compare signal will be output on the corresponding output pin. If - * the channel is configured as input, enables capture of the counter - * value into the input capture/compare register. - * - * @param dev Timer device, must have type TIMER_ADVANCED or TIMER_GENERAL. - * @param channel Channel to enable, from 1 to 4. - */ -static inline void timer_cc_enable(timer_dev *dev, uint8 channel) { - *bb_perip(&(dev->regs).gen->CCER, 4 * (channel - 1)) = 1; -} - -/** - * @brief Disable a timer channel's output compare or input capture signal. - * @param dev Timer device, must have type TIMER_ADVANCED or TIMER_GENERAL. - * @param channel Channel to disable, from 1 to 4. - * @see timer_cc_enable() - */ -static inline void timer_cc_disable(timer_dev *dev, uint8 channel) { - *bb_perip(&(dev->regs).gen->CCER, 4 * (channel - 1)) = 0; -} - -/** - * @brief Get a channel's capture/compare output polarity - * @param dev Timer device, must have type TIMER_ADVANCED or TIMER_GENERAL. - * @param channel Channel whose capture/compare output polarity to get. - * @return Polarity, either 0 or 1. - * @see timer_cc_set_polarity() - */ -static inline uint8 timer_cc_get_pol(timer_dev *dev, uint8 channel) { - return *bb_perip(&(dev->regs).gen->CCER, 4 * (channel - 1) + 1); -} - -/** - * @brief Set a timer channel's capture/compare output polarity. - * - * If the timer channel is configured as output: polarity == 0 means - * the output channel will be active high; polarity == 1 means active - * low. - * - * If the timer channel is configured as input: polarity == 0 means - * capture is done on the rising edge of ICn; when used as an external - * trigger, ICn is non-inverted. polarity == 1 means capture is done - * on the falling edge of ICn; when used as an external trigger, ICn - * is inverted. - * - * @param dev Timer device, must have type TIMER_ADVANCED or TIMER_GENERAL. - * @param channel Channel whose capture/compare output polarity to set. - * @param pol New polarity, 0 or 1. - */ -static inline void timer_cc_set_pol(timer_dev *dev, uint8 channel, uint8 pol) { - *bb_perip(&(dev->regs).gen->CCER, 4 * (channel - 1) + 1) = pol; -} - -/** - * @brief Get a timer's DMA burst length. - * @param dev Timer device, must have type TIMER_ADVANCED or TIMER_GENERAL. - * @return Number of transfers per read or write to timer DMA register, - * from 1 to 18. - */ -static inline uint8 timer_dma_get_burst_len(timer_dev *dev) { - uint32 dbl = ((dev->regs).gen->DCR & TIMER_DCR_DBL) >> 8; - return dbl + 1; /* 0 means 1 transfer, etc. */ -} - -/** - * @brief Set a timer's DMA burst length. - * @param dev Timer device, must have type TIMER_ADVANCED or TIMER_GENERAL. - * @param length DMA burst length; i.e., number of DMA transfers per - * read/write to timer DMA register, from 1 to 18. - */ -static inline void timer_dma_set_burst_len(timer_dev *dev, uint8 length) { - uint32 tmp = (dev->regs).gen->DCR; - tmp &= ~TIMER_DCR_DBL; - tmp |= (length - 1) << 8; - (dev->regs).gen->DCR = tmp; -} - -/** - * @brief Timer DMA base address. - * - * Defines the base address for DMA transfers. - */ -typedef enum timer_dma_base_addr { - /** Base is control register 1 */ - TIMER_DMA_BASE_CR1 = TIMER_DCR_DBA_CR1, - /** Base is control register 2 */ - TIMER_DMA_BASE_CR2 = TIMER_DCR_DBA_CR2, - /** Base is slave mode control register */ - TIMER_DMA_BASE_SMCR = TIMER_DCR_DBA_SMCR, - /** Base is DMA interrupt enable register */ - TIMER_DMA_BASE_DIER = TIMER_DCR_DBA_DIER, - /** Base is status register */ - TIMER_DMA_BASE_SR = TIMER_DCR_DBA_SR, - /** Base is event generation register */ - TIMER_DMA_BASE_EGR = TIMER_DCR_DBA_EGR, - /** Base is capture/compare mode register 1 */ - TIMER_DMA_BASE_CCMR1 = TIMER_DCR_DBA_CCMR1, - /** Base is capture/compare mode register 2 */ - TIMER_DMA_BASE_CCMR2 = TIMER_DCR_DBA_CCMR2, - /** Base is capture/compare enable register */ - TIMER_DMA_BASE_CCER = TIMER_DCR_DBA_CCER, - /** Base is counter */ - TIMER_DMA_BASE_CNT = TIMER_DCR_DBA_CNT, - /** Base is prescaler */ - TIMER_DMA_BASE_PSC = TIMER_DCR_DBA_PSC, - /** Base is auto-reload register */ - TIMER_DMA_BASE_ARR = TIMER_DCR_DBA_ARR, - /** Base is repetition counter register */ - TIMER_DMA_BASE_RCR = TIMER_DCR_DBA_RCR, - /** Base is capture/compare register 1 */ - TIMER_DMA_BASE_CCR1 = TIMER_DCR_DBA_CCR1, - /** Base is capture/compare register 2 */ - TIMER_DMA_BASE_CCR2 = TIMER_DCR_DBA_CCR2, - /** Base is capture/compare register 3 */ - TIMER_DMA_BASE_CCR3 = TIMER_DCR_DBA_CCR3, - /** Base is capture/compare register 4 */ - TIMER_DMA_BASE_CCR4 = TIMER_DCR_DBA_CCR4, - /** Base is break and dead-time register */ - TIMER_DMA_BASE_BDTR = TIMER_DCR_DBA_BDTR, - /** Base is DMA control register */ - TIMER_DMA_BASE_DCR = TIMER_DCR_DBA_DCR, - /** Base is DMA address for full transfer */ - TIMER_DMA_BASE_DMAR = TIMER_DCR_DBA_DMAR, -} timer_dma_base_addr; - -/** - * @brief Get the timer's DMA base address. - * - * Some restrictions apply; see the reference manual for your chip. - * - * @param dev Timer device, must have type TIMER_ADVANCED or TIMER_GENERAL. - * @return DMA base address - */ -static inline timer_dma_base_addr timer_dma_get_base_addr(timer_dev *dev) { - uint32 dcr = (dev->regs).gen->DCR; - return (timer_dma_base_addr)(dcr & TIMER_DCR_DBA); -} - -/** - * @brief Set the timer's DMA base address. - * - * Some restrictions apply; see the reference manual for your chip. - * - * @param dev Timer device, must have type TIMER_ADVANCED or TIMER_GENERAL. - * @param dma_base DMA base address. - */ -static inline void timer_dma_set_base_addr(timer_dev *dev, - timer_dma_base_addr dma_base) { - uint32 tmp = (dev->regs).gen->DCR; - tmp &= ~TIMER_DCR_DBA; - tmp |= dma_base; - (dev->regs).gen->DCR = tmp; -} - -/** - * Timer output compare modes. - */ -typedef enum timer_oc_mode { - /** - * Frozen: comparison between output compare register and counter - * has no effect on the outputs. */ - TIMER_OC_MODE_FROZEN = 0 << 4, - /** - * OCxREF signal is forced high when the count matches the channel - * capture/compare register. */ - TIMER_OC_MODE_ACTIVE_ON_MATCH = 1 << 4, - /** - * OCxREF signal is forced low when the counter matches the - * channel capture/compare register. */ - TIMER_OC_MODE_INACTIVE_ON_MATCH = 2 << 4, - /** - * OCxREF toggles when counter matches the channel capture/compare - * register. */ - TIMER_OC_MODE_TOGGLE = 3 << 4, - /** OCxREF is forced low. */ - TIMER_OC_MODE_FORCE_INACTIVE = 4 << 4, - /** OCxREF is forced high. */ - TIMER_OC_MODE_FORCE_ACTIVE = 5 << 4, - /** - * PWM mode 1. In upcounting, channel is active as long as count - * is less than channel capture/compare register, else inactive. - * In downcounting, channel is inactive as long as count exceeds - * capture/compare register, else active. */ - TIMER_OC_MODE_PWM_1 = 6 << 4, - /** - * PWM mode 2. In upcounting, channel is inactive as long as count - * is less than capture/compare register, else active. In - * downcounting, channel is active as long as count exceeds - * capture/compare register, else inactive. */ - TIMER_OC_MODE_PWM_2 = 7 << 4, -} timer_oc_mode; - -/** - * Timer output compare mode flags. - * @see timer_oc_set_mode() - */ -typedef enum timer_oc_mode_flags { - TIMER_OC_CE = 1U << 7, /**< Output compare clear enable. */ - TIMER_OC_PE = 1U << 3, /**< Output compare preload enable. */ - TIMER_OC_FE = 1U << 2, /**< Output compare fast enable. */ -} timer_oc_mode_flags; - -/** - * @brief Configure a channel's output compare mode. - * - * @param dev Timer device, must have type TIMER_ADVANCED or TIMER_GENERAL. - * @param channel Channel to configure in output compare mode. - * @param mode Timer mode to set. - * @param flags OR of timer_oc_mode_flags. - * @see timer_oc_mode - * @see timer_oc_mode_flags - */ -static inline void timer_oc_set_mode(timer_dev *dev, - uint8 channel, - timer_oc_mode mode, - uint8 flags) { - /* channel == 1,2 -> CCMR1; channel == 3,4 -> CCMR2 */ - __io uint32 *ccmr = &(dev->regs).gen->CCMR1 + (((channel - 1) >> 1) & 1); - /* channel == 1,3 -> shift = 0, channel == 2,4 -> shift = 8 */ - uint8 shift = 8 * (1 - (channel & 1)); - - uint32 tmp = *ccmr; - tmp &= ~(0xFF << shift); - tmp |= (mode | flags | TIMER_CCMR_CCS_OUTPUT) << shift; - *ccmr = tmp; -} - -/* - * Old, erroneous bit definitions from previous releases, kept for - * backwards compatibility: - */ - -/** Deprecated. Use TIMER_CCMR1_CC4S_OUTPUT instead. */ -#define TIMER_CCMR1_CC4S_OUTPUT TIMER_CCMR2_CC4S_OUTPUT -/** Deprecated. Use TIMER_CCMR1_CC4S_INPUT_TI1 instead. */ -#define TIMER_CCMR1_CC4S_INPUT_TI1 TIMER_CCMR2_CC4S_INPUT_TI1 -/** Deprecated. Use TIMER_CCMR1_CC4S_INPUT_TI2 instead. */ -#define TIMER_CCMR1_CC4S_INPUT_TI2 TIMER_CCMR2_CC4S_INPUT_TI2 -/** Deprecated. Use TIMER_CCMR1_CC4S_INPUT_TRC instead. */ -#define TIMER_CCMR1_CC4S_INPUT_TRC TIMER_CCMR2_CC4S_INPUT_TRC -/** Deprecated. Use TIMER_CCMR2_IC4F instead. */ -#define TIMER_CCMR2_IC2F TIMER_CCMR2_IC4F -/** Deprecated. Use TIMER_CCMR2_IC4PSC instead. */ -#define TIMER_CCMR2_IC2PSC TIMER_CCMR2_IC4PSC -/** Deprecated. Use TIMER_CCMR2_IC3F instead. */ -#define TIMER_CCMR2_IC1F TIMER_CCMR2_IC3F -/** Deprecated. Use TIMER_CCMR2_IC3PSC instead. */ -#define TIMER_CCMR2_IC1PSC TIMER_CCMR2_IC3PSC -/** Deprecated. Use TIMER_CCMR1_CC3S_OUTPUT instead. */ -#define TIMER_CCMR1_CC3S_OUTPUT TIMER_CCMR2_CC3S_OUTPUT -/** Deprecated. Use TIMER_CCMR1_CC3S_INPUT_TI1 instead. */ -#define TIMER_CCMR1_CC3S_INPUT_TI1 TIMER_CCMR2_CC3S_INPUT_TI1 -/** Deprecated. Use TIMER_CCMR1_CC3S_INPUT_TI2 instead. */ -#define TIMER_CCMR1_CC3S_INPUT_TI2 TIMER_CCMR2_CC3S_INPUT_TI2 -/** Deprecated. Use TIMER_CCMR1_CC3S_INPUT_TRC instead. */ -#define TIMER_CCMR1_CC3S_INPUT_TRC TIMER_CCMR2_CC3S_INPUT_TRC - -/** Deprecated. Use TIMER_DCR_DBL_1_XFER instead. */ -#define TIMER_DCR_DBL_1BYTE TIMER_DCR_DBL_1_XFER -/** Deprecated. Use TIMER_DCR_DBL_2_XFER instead. */ -#define TIMER_DCR_DBL_2BYTE TIMER_DCR_DBL_2_XFER -/** Deprecated. Use TIMER_DCR_DBL_3_XFER instead. */ -#define TIMER_DCR_DBL_3BYTE TIMER_DCR_DBL_3_XFER -/** Deprecated. Use TIMER_DCR_DBL_4_XFER instead. */ -#define TIMER_DCR_DBL_4BYTE TIMER_DCR_DBL_4_XFER -/** Deprecated. Use TIMER_DCR_DBL_5_XFER instead. */ -#define TIMER_DCR_DBL_5BYTE TIMER_DCR_DBL_5_XFER -/** Deprecated. Use TIMER_DCR_DBL_6_XFER instead. */ -#define TIMER_DCR_DBL_6BYTE TIMER_DCR_DBL_6_XFER -/** Deprecated. Use TIMER_DCR_DBL_7_XFER instead. */ -#define TIMER_DCR_DBL_7BYTE TIMER_DCR_DBL_7_XFER -/** Deprecated. Use TIMER_DCR_DBL_8_XFER instead. */ -#define TIMER_DCR_DBL_8BYTE TIMER_DCR_DBL_8_XFER -/** Deprecated. Use TIMER_DCR_DBL_9_XFER instead. */ -#define TIMER_DCR_DBL_9BYTE TIMER_DCR_DBL_9_XFER -/** Deprecated. Use TIMER_DCR_DBL_10_XFER instead. */ -#define TIMER_DCR_DBL_10BYTE TIMER_DCR_DBL_10_XFER -/** Deprecated. Use TIMER_DCR_DBL_11_XFER instead. */ -#define TIMER_DCR_DBL_11BYTE TIMER_DCR_DBL_11_XFER -/** Deprecated. Use TIMER_DCR_DBL_12_XFER instead. */ -#define TIMER_DCR_DBL_12BYTE TIMER_DCR_DBL_12_XFER -/** Deprecated. Use TIMER_DCR_DBL_13_XFER instead. */ -#define TIMER_DCR_DBL_13BYTE TIMER_DCR_DBL_13_XFER -/** Deprecated. Use TIMER_DCR_DBL_14_XFER instead. */ -#define TIMER_DCR_DBL_14BYTE TIMER_DCR_DBL_14_XFER -/** Deprecated. Use TIMER_DCR_DBL_15_XFER instead. */ -#define TIMER_DCR_DBL_15BYTE TIMER_DCR_DBL_15_XFER -/** Deprecated. Use TIMER_DCR_DBL_16_XFER instead. */ -#define TIMER_DCR_DBL_16BYTE TIMER_DCR_DBL_16_XFER -/** Deprecated. Use TIMER_DCR_DBL_17_XFER instead. */ -#define TIMER_DCR_DBL_17BYTE TIMER_DCR_DBL_17_XFER -/** Deprecated. Use TIMER_DCR_DBL_18_XFER instead. */ -#define TIMER_DCR_DBL_18BYTE TIMER_DCR_DBL_18_XFER - -#ifdef __cplusplus -} // extern "C" -#endif - -#endif diff --git a/STM32F1/system/libmaple/include/libmaple/usart.h b/STM32F1/system/libmaple/include/libmaple/usart.h deleted file mode 100644 index c85980c..0000000 --- a/STM32F1/system/libmaple/include/libmaple/usart.h +++ /dev/null @@ -1,509 +0,0 @@ -/****************************************************************************** - * The MIT License - * - * Copyright (c) 2010 Perry Hung. - * - * Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, copy, - * modify, merge, publish, distribute, sublicense, and/or sell copies - * of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS - * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN - * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - *****************************************************************************/ - -/** - * @file libmaple/include/libmaple/usart.h - * @author Marti Bolivar , - * Perry Hung - * @brief USART definitions and prototypes - */ - -#ifndef _LIBMAPLE_USART_H_ -#define _LIBMAPLE_USART_H_ - -#ifdef __cplusplus -extern "C"{ -#endif - -#include -#include -#include -#include -#include - - /* Roger clark. Replaced with line below #include */ -#include "stm32f1/include/series/usart.h" - -/* - * Register map (common across supported STM32 series). - */ - -/** USART register map type */ -typedef struct usart_reg_map { - __io uint32 SR; /**< Status register */ - __io uint32 DR; /**< Data register */ - __io uint32 BRR; /**< Baud rate register */ - __io uint32 CR1; /**< Control register 1 */ - __io uint32 CR2; /**< Control register 2 */ - __io uint32 CR3; /**< Control register 3 */ - __io uint32 GTPR; /**< Guard time and prescaler register */ -} usart_reg_map; - -/* - * Register bit definitions - */ - -/* Status register */ - -/** Clear to send bit */ -#define USART_SR_CTS_BIT 9 -/** Line break detection bit */ -#define USART_SR_LBD_BIT 8 -/** Transmit data register empty bit */ -#define USART_SR_TXE_BIT 7 -/** Transmission complete bit */ -#define USART_SR_TC_BIT 6 -/** Read data register not empty bit */ -#define USART_SR_RXNE_BIT 5 -/** IDLE line detected bit */ -#define USART_SR_IDLE_BIT 4 -/** Overrun error bit */ -#define USART_SR_ORE_BIT 3 -/** Noise error bit */ -#define USART_SR_NE_BIT 2 -/** - * @brief Synonym for USART_SR_NE_BIT. - * - * Some series (e.g. STM32F2) use "NF" for "noise flag" instead of the - * original "NE" for "noise error". The meaning of the bit is - * unchanged, but the NF flag can be disabled when the line is - * noise-free. - * - * @see USART_SR_NE_BIT - */ -#define USART_SR_NF_BIT USART_SR_NE_BIT -/** Framing error bit */ -#define USART_SR_FE_BIT 1 -/** Parity error bit */ -#define USART_SR_PE_BIT 0 - -/** Clear to send mask */ -#define USART_SR_CTS BIT(USART_SR_CTS_BIT) -/** Line break detected mask */ -#define USART_SR_LBD BIT(USART_SR_LBD_BIT) -/** Transmit data register empty mask */ -#define USART_SR_TXE BIT(USART_SR_TXE_BIT) -/** Transmission complete mask */ -#define USART_SR_TC BIT(USART_SR_TC_BIT) -/** Read data register not empty mask */ -#define USART_SR_RXNE BIT(USART_SR_RXNE_BIT) -/** IDLE line detected mask */ -#define USART_SR_IDLE BIT(USART_SR_IDLE_BIT) -/** Overrun error mask */ -#define USART_SR_ORE BIT(USART_SR_ORE_BIT) -/** Noise error mask */ -#define USART_SR_NE BIT(USART_SR_NE_BIT) -/** - * @brief Synonym for USART_SR_NE. - * @see USART_SR_NF_BIT - */ -#define USART_SR_NF USART_SR_NE -/** Framing error mask */ -#define USART_SR_FE BIT(USART_SR_FE_BIT) -/** Parity error mask */ -#define USART_SR_PE BIT(USART_SR_PE_BIT) - -/* Data register */ - -/** Data register data value mask */ -#define USART_DR_DR 0xFF - -/* Baud rate register */ - -/** Mantissa of USARTDIV mask */ -#define USART_BRR_DIV_MANTISSA (0xFFF << 4) -/** Fraction of USARTDIV mask */ -#define USART_BRR_DIV_FRACTION 0xF - -/* Control register 1 */ - -/** USART enable bit */ -#define USART_CR1_UE_BIT 13 -/** Word length bit */ -#define USART_CR1_M_BIT 12 -/** Wakeup method bit */ -#define USART_CR1_WAKE_BIT 11 -/** Parity control enable bit */ -#define USART_CR1_PCE_BIT 10 -/** Parity selection bit */ -#define USART_CR1_PS_BIT 9 -/** Parity error interrupt enable bit */ -#define USART_CR1_PEIE_BIT 8 -/** Transmit data regsiter not empty interrupt enable bit */ -#define USART_CR1_TXEIE_BIT 7 -/** Transmission complete interrupt enable bit */ -#define USART_CR1_TCIE_BIT 6 -/** RXNE interrupt enable bit */ -#define USART_CR1_RXNEIE_BIT 5 -/** IDLE interrupt enable bit */ -#define USART_CR1_IDLEIE_BIT 4 -/** Transmitter enable bit */ -#define USART_CR1_TE_BIT 3 -/** Receiver enable bit */ -#define USART_CR1_RE_BIT 2 -/** Receiver wakeup bit */ -#define USART_CR1_RWU_BIT 1 -/** Send break bit */ -#define USART_CR1_SBK_BIT 0 - -/** USART enable mask */ -#define USART_CR1_UE BIT(USART_CR1_UE_BIT) -/** Word length mask */ -#define USART_CR1_M BIT(USART_CR1_M_BIT) -/** Word length: 1 start bit, 8 data bits, n stop bit */ -#define USART_CR1_M_8N1 (0 << USART_CR1_M_BIT) -/** Word length: 1 start bit, 9 data bits, n stop bit */ -#define USART_CR1_M_9N1 (1 << USART_CR1_M_BIT) -/** Wakeup method mask */ -#define USART_CR1_WAKE BIT(USART_CR1_WAKE_BIT) -/** Wakeup on idle line */ -#define USART_CR1_WAKE_IDLE (0 << USART_CR1_WAKE_BIT) -/** Wakeup on address mark */ -#define USART_CR1_WAKE_ADDR (1 << USART_CR1_WAKE_BIT) -/** Parity control enable mask */ -#define USART_CR1_PCE BIT(USART_CR1_PCE_BIT) -/** Parity selection mask */ -#define USART_CR1_PS BIT(USART_CR1_PS_BIT) -/** Parity selection: even parity */ -#define USART_CR1_PS_EVEN (0 << USART_CR1_PS_BIT) -/** Parity selection: odd parity */ -#define USART_CR1_PS_ODD (1 << USART_CR1_PS_BIT) -/** Parity error interrupt enable mask */ -#define USART_CR1_PEIE BIT(USART_CR1_PEIE_BIT) -/** Transmit data register empty interrupt enable mask */ -#define USART_CR1_TXEIE BIT(USART_CR1_TXEIE_BIT) -/** Transmission complete interrupt enable mask */ -#define USART_CR1_TCIE BIT(USART_CR1_TCIE_BIT) -/** RXNE interrupt enable mask */ -#define USART_CR1_RXNEIE BIT(USART_CR1_RXNEIE_BIT) -/** IDLE line interrupt enable mask */ -#define USART_CR1_IDLEIE BIT(USART_CR1_IDLEIE_BIT) -/** Transmitter enable mask */ -#define USART_CR1_TE BIT(USART_CR1_TE_BIT) -/** Receiver enable mask */ -#define USART_CR1_RE BIT(USART_CR1_RE_BIT) -/** Receiver wakeup mask */ -#define USART_CR1_RWU BIT(USART_CR1_RWU_BIT) -/** Receiver wakeup: receiver in active mode */ -#define USART_CR1_RWU_ACTIVE (0 << USART_CR1_RWU_BIT) -/** Receiver wakeup: receiver in mute mode */ -#define USART_CR1_RWU_MUTE (1 << USART_CR1_RWU_BIT) -/** Send break */ -#define USART_CR1_SBK BIT(USART_CR1_SBK_BIT) - -/* Control register 2 */ - -/** LIN mode enable bit */ -#define USART_CR2_LINEN_BIT 14 -/** Clock enable bit */ -#define USART_CR2_CLKEN_BIT 11 -/** Clock polarity bit */ -#define USART_CR2_CPOL_BIT 10 -/** Clock phase bit */ -#define USART_CR2_CPHA_BIT 9 -/** Last bit clock pulse bit */ -#define USART_CR2_LBCL_BIT 8 -/** LIN break detection interrupt enable bit */ -#define USART_CR2_LBDIE_BIT 6 -/** LIN break detection length bit */ -#define USART_CR2_LBDL_BIT 5 - -/** LIN mode enable mask */ -#define USART_CR2_LINEN BIT(USART_CR2_LINEN_BIT) -/** STOP bits mask */ -#define USART_CR2_STOP (0x3 << 12) -/** STOP bits: 1 stop bit */ -#define USART_CR2_STOP_BITS_1 (0x0 << 12) -/** - * @brief STOP bits: 0.5 stop bits - * Not available on UART4, UART5. */ -#define USART_CR2_STOP_BITS_POINT_5 (0x1 << 12) -/** STOP bits: 2 stop bits */ -#define USART_CR2_STOP_BITS_2 (0x2 << 12) -/** - * @brief STOP bits: 1.5 stop bits - * Not available on UART4, UART5. */ -#define USART_CR2_STOP_BITS_1_POINT_5 (0x3 << 12) -/** - * @brief Clock enable. - * Not available on UART4, UART5 */ -#define USART_CR2_CLKEN BIT(USART_CR2_CLKEN_BIT) -/** - * @brief Clock polarity mask. - * Not available on UART4, UART5 */ -#define USART_CR2_CPOL BIT(USART_CR2_CPOL_BIT) -/** Clock polarity: low */ -#define USART_CR2_CPOL_LOW (0x0 << USART_CR2_CLKEN_BIT) -/** Clock polarity: high */ -#define USART_CR2_CPOL_HIGH (0x1 << USART_CR2_CLKEN_BIT) -/** - * @brief Clock phase mask. - * Not available on UART4, UART5 */ -#define USART_CR2_CPHA BIT(USART_CR2_CPHA_BIT) -/** - * @brief Clock phase: first - * First clock transition is the first data capture edge. */ -#define USART_CR2_CPHA_FIRST (0x0 << USART_CR2_CPHA_BIT) -/** - * @brief Clock phase: second - * Second clock transition is the first data capture edge. */ -#define USART_CR2_CPHA_SECOND (0x1 << USART_CR2_CPHA_BIT) -/** - * @brief Last bit clock pulse mask. - * - * When set, the last bit transmitted causes a clock pulse in - * synchronous mode. - * - * Not available on UART4, UART5 */ -#define USART_CR2_LBCL BIT(USART_CR2_LBCL_BIT) -/** LIN break detection interrupt enable mask. */ -#define USART_CR2_LBDIE BIT(USART_CR2_LBDIE_BIT) -/** LIN break detection length. */ -#define USART_CR2_LBDL BIT(USART_CR2_LBDL_BIT) -/** LIN break detection length: 10 bits */ -#define USART_CR2_LBDL_10_BIT (0 << USART_CR2_LBDL_BIT) -/** LIN break detection length: 11 bits */ -#define USART_CR2_LBDL_11_BIT (1 << USART_CR2_LBDL_BIT) -/** - * @brief Address of the USART node - * This is useful during multiprocessor communication. */ -#define USART_CR2_ADD 0xF - -/* Control register 3 */ - -/** Clear to send interrupt enable bit */ -#define USART_CR3_CTSIE_BIT 10 -/** Clear to send enable bit */ -#define USART_CR3_CTSE_BIT 9 -/** Ready to send enable bit */ -#define USART_CR3_RTSE_BIT 8 -/** DMA enable transmitter bit */ -#define USART_CR3_DMAT_BIT 7 -/** DMA enable receiver bit */ -#define USART_CR3_DMAR_BIT 6 -/** Smartcard mode enable bit */ -#define USART_CR3_SCEN_BIT 5 -/** Smartcard NACK enable bit */ -#define USART_CR3_NACK_BIT 4 -/** Half-duplex selection bit */ -#define USART_CR3_HDSEL_BIT 3 -/** IrDA low power bit */ -#define USART_CR3_IRLP_BIT 2 -/** IrDA mode enable bit */ -#define USART_CR3_IREN_BIT 1 -/** Error interrupt enable bit */ -#define USART_CR3_EIE_BIT 0 - -/** - * @brief Clear to send interrupt enable - * Not available on UART4, UART5. */ -#define USART_CR3_CTSIE BIT(USART_CR3_CTSIE_BIT) -/** - * @brief Clear to send enable - * Not available on UART4, UART5. */ -#define USART_CR3_CTSE BIT(USART_CR3_CTSE_BIT) -/** - * @brief Ready to send enable - * Not available on UART4, UART5. */ -#define USART_CR3_RTSE BIT(USART_CR3_RTSE_BIT) -/** - * @brief DMA enable transmitter - * Not available on UART5. */ -#define USART_CR3_DMAT BIT(USART_CR3_DMAT_BIT) -/** - * @brief DMA enable receiver - * Not available on UART5. */ -#define USART_CR3_DMAR BIT(USART_CR3_DMAR_BIT) -/** - * @brief Smartcard mode enable - * Not available on UART4, UART5. */ -#define USART_CR3_SCEN BIT(USART_CR3_SCEN_BIT) -/** - * @brief Smartcard NACK enable - * Not available on UART4, UART5. */ -#define USART_CR3_NACK BIT(USART_CR3_NACK_BIT) -/** - * @brief Half-duplex selection - * When set, single-wire half duplex mode is selected. - */ -#define USART_CR3_HDSEL BIT(USART_CR3_HDSEL_BIT) -/** IrDA low power mode */ -#define USART_CR3_IRLP BIT(USART_CR3_IRLP_BIT) -/** IrDA mode: normal */ -#define USART_CR3_IRLP_NORMAL (0U << USART_CR3_IRLP_BIT) -/** IrDA mode: low power */ -#define USART_CR3_IRLP_LOW_POWER (1U << USART_CR3_IRLP_BIT) -/** IrDA mode enable */ -#define USART_CR3_IREN BIT(USART_CR3_IREN_BIT) -/** Error interrupt enable */ -#define USART_CR3_EIE BIT(USART_CR3_EIE_BIT) - -/* Guard time and prescaler register */ - -/** - * @brief Guard time value mask - * Used in Smartcard mode. Not available on UART4, UART5. */ -#define USART_GTPR_GT (0xFF << 8) -/** - * @brief Prescaler value mask - * Restrictions on this value apply, depending on the USART mode. Not - * available on UART4, UART5. */ -#define USART_GTPR_PSC 0xFF - -/* - * Devices - */ - -#ifndef USART_RX_BUF_SIZE -#define USART_RX_BUF_SIZE 64 -#endif - -/** USART device type */ -typedef struct usart_dev { - usart_reg_map *regs; /**< Register map */ - ring_buffer *rb; /**< RX ring buffer */ - uint32 max_baud; /**< @brief Deprecated. - * Maximum baud rate. */ - uint8 rx_buf[USART_RX_BUF_SIZE]; /**< @brief Deprecated. - * Actual RX buffer used by rb. - * This field will be removed in - * a future release. */ - rcc_clk_id clk_id; /**< RCC clock information */ - nvic_irq_num irq_num; /**< USART NVIC interrupt */ -} usart_dev; - -void usart_init(usart_dev *dev); - -struct gpio_dev; /* forward declaration */ -/* FIXME [PRE 0.0.13] decide if flags are necessary */ -/** - * @brief Configure GPIOs for use as USART TX/RX. - * @param udev USART device to use - * @param rx_dev RX pin gpio_dev - * @param rx RX pin bit on rx_dev - * @param tx_dev TX pin gpio_dev - * @param tx TX pin bit on tx_dev - * @param flags Currently ignored - */ -extern void usart_config_gpios_async(usart_dev *udev, - struct gpio_dev *rx_dev, uint8 rx, - struct gpio_dev *tx_dev, uint8 tx, - unsigned flags); - -#define USART_USE_PCLK 0 -void usart_set_baud_rate(usart_dev *dev, uint32 clock_speed, uint32 baud); - -void usart_enable(usart_dev *dev); -void usart_disable(usart_dev *dev); -void usart_foreach(void (*fn)(usart_dev *dev)); -uint32 usart_tx(usart_dev *dev, const uint8 *buf, uint32 len); -uint32 usart_rx(usart_dev *dev, uint8 *buf, uint32 len); -void usart_putudec(usart_dev *dev, uint32 val); - -/** - * @brief Disable all serial ports. - */ -static inline void usart_disable_all(void) { - usart_foreach(usart_disable); -} - -/** - * @brief Transmit one character on a serial port. - * - * This function blocks until the character has been successfully - * transmitted. - * - * @param dev Serial port to send on. - * @param byte Byte to transmit. - */ -static inline void usart_putc(usart_dev* dev, uint8 byte) { - while (!usart_tx(dev, &byte, 1)) - ; -} - -/** - * @brief Transmit a character string on a serial port. - * - * This function blocks until str is completely transmitted. - * - * @param dev Serial port to send on - * @param str String to send - */ -static inline void usart_putstr(usart_dev *dev, const char* str) { - uint32 i = 0; - while (str[i] != '\0') { - usart_putc(dev, str[i++]); - } -} - -/** - * @brief Read one character from a serial port. - * - * It's not safe to call this function if the serial port has no data - * available. - * - * @param dev Serial port to read from - * @return byte read - * @see usart_data_available() - */ -static inline uint8 usart_getc(usart_dev *dev) { - return rb_remove(dev->rb); -} - -/* - * Roger Clark. 20141125, - * added peek function. - * @param dev Serial port to read from - * @return byte read - */ -static inline int usart_peek(usart_dev *dev) -{ - return rb_peek(dev->rb); -} - - -/** - * @brief Return the amount of data available in a serial port's RX buffer. - * @param dev Serial port to check - * @return Number of bytes in dev's RX buffer. - */ -static inline uint32 usart_data_available(usart_dev *dev) { - return rb_full_count(dev->rb); -} - -/** - * @brief Discard the contents of a serial port's RX buffer. - * @param dev Serial port whose buffer to empty. - */ -static inline void usart_reset_rx(usart_dev *dev) { - rb_reset(dev->rb); -} - -#ifdef __cplusplus -} // extern "C" -#endif - -#endif diff --git a/STM32F1/system/libmaple/include/libmaple/usb.h b/STM32F1/system/libmaple/include/libmaple/usb.h deleted file mode 100644 index ea24030..0000000 --- a/STM32F1/system/libmaple/include/libmaple/usb.h +++ /dev/null @@ -1,176 +0,0 @@ -/****************************************************************************** - * The MIT License - * - * Copyright (c) 2010, 2011, 2012 LeafLabs LLC. - * - * Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, copy, - * modify, merge, publish, distribute, sublicense, and/or sell copies - * of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS - * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN - * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - *****************************************************************************/ - -/* - * NOTE: This API is _unstable_ and will change drastically over time. - */ - -#ifndef _LIBMAPLE_USB_H_ -#define _LIBMAPLE_USB_H_ - -#ifdef __cplusplus -extern "C" { -#endif - -#include -#include - -/* - * Descriptors and other paraphernalia - */ - -/* Descriptor types */ - -#define USB_DESCRIPTOR_TYPE_DEVICE 0x01 -#define USB_DESCRIPTOR_TYPE_CONFIGURATION 0x02 -#define USB_DESCRIPTOR_TYPE_STRING 0x03 -#define USB_DESCRIPTOR_TYPE_INTERFACE 0x04 -#define USB_DESCRIPTOR_TYPE_ENDPOINT 0x05 - -/* Descriptor structs and declaration helpers */ - -#define USB_DESCRIPTOR_STRING_LEN(x) (2 + (x << 1)) - -#define USB_DESCRIPTOR_STRING(len) \ - struct { \ - uint8 bLength; \ - uint8 bDescriptorType; \ - uint16 bString[len]; \ - } __packed - -typedef struct usb_descriptor_device { - uint8 bLength; - uint8 bDescriptorType; - uint16 bcdUSB; - uint8 bDeviceClass; - uint8 bDeviceSubClass; - uint8 bDeviceProtocol; - uint8 bMaxPacketSize0; - uint16 idVendor; - uint16 idProduct; - uint16 bcdDevice; - uint8 iManufacturer; - uint8 iProduct; - uint8 iSerialNumber; - uint8 bNumConfigurations; -} __packed usb_descriptor_device; - -typedef struct usb_descriptor_config_header { - uint8 bLength; - uint8 bDescriptorType; - uint16 wTotalLength; - uint8 bNumInterfaces; - uint8 bConfigurationValue; - uint8 iConfiguration; - uint8 bmAttributes; - uint8 bMaxPower; -} __packed usb_descriptor_config_header; - -typedef struct usb_descriptor_interface { - uint8 bLength; - uint8 bDescriptorType; - uint8 bInterfaceNumber; - uint8 bAlternateSetting; - uint8 bNumEndpoints; - uint8 bInterfaceClass; - uint8 bInterfaceSubClass; - uint8 bInterfaceProtocol; - uint8 iInterface; -} __packed usb_descriptor_interface; - -typedef struct usb_descriptor_endpoint { - uint8 bLength; - uint8 bDescriptorType; - uint8 bEndpointAddress; - uint8 bmAttributes; - uint16 wMaxPacketSize; - uint8 bInterval; -} __packed usb_descriptor_endpoint; - -typedef struct usb_descriptor_string { - uint8 bLength; - uint8 bDescriptorType; - uint8 bString[]; -} usb_descriptor_string; - -/* Common values that go inside descriptors */ - -#define USB_CONFIG_ATTR_BUSPOWERED 0b10000000 -#define USB_CONFIG_ATTR_SELF_POWERED 0b11000000 - -#define USB_EP_TYPE_INTERRUPT 0x03 -#define USB_EP_TYPE_BULK 0x02 - -#define USB_DESCRIPTOR_ENDPOINT_IN 0x80 -#define USB_DESCRIPTOR_ENDPOINT_OUT 0x00 - -/* - * USB module core - */ - -#ifndef USB_ISR_MSK -/* Handle CTRM, WKUPM, SUSPM, ERRM, SOFM, ESOFM, RESETM */ -#define USB_ISR_MSK 0xBF00 -#endif - -typedef enum usb_dev_state { - USB_UNCONNECTED, - USB_ATTACHED, - USB_POWERED, - USB_SUSPENDED, - USB_ADDRESSED, - USB_CONFIGURED -} usb_dev_state; - -/* Encapsulates global state formerly handled by usb_lib/ */ -typedef struct usblib_dev { - uint32 irq_mask; - void (**ep_int_in)(void); - void (**ep_int_out)(void); - usb_dev_state state; - usb_dev_state prevState; - rcc_clk_id clk_id; -} usblib_dev; - -extern usblib_dev *USBLIB; - -void usb_init_usblib(usblib_dev *dev, - void (**ep_int_in)(void), - void (**ep_int_out)(void)); - -static inline uint8 usb_is_connected(usblib_dev *dev) { - return dev->state != USB_UNCONNECTED; -} - -static inline uint8 usb_is_configured(usblib_dev *dev) { - return dev->state == USB_CONFIGURED; -} - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/STM32F1/system/libmaple/include/libmaple/usb_cdcacm.h b/STM32F1/system/libmaple/include/libmaple/usb_cdcacm.h deleted file mode 100644 index 13e1bac..0000000 --- a/STM32F1/system/libmaple/include/libmaple/usb_cdcacm.h +++ /dev/null @@ -1,180 +0,0 @@ -/****************************************************************************** - * The MIT License - * - * Copyright (c) 2011 LeafLabs LLC. - * - * Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, copy, - * modify, merge, publish, distribute, sublicense, and/or sell copies - * of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS - * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN - * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - *****************************************************************************/ - -/** - * @file libmaple/include/libmaple/usb_cdcacm.h - * @brief USB CDC ACM (virtual serial terminal) support - * - * IMPORTANT: this API is unstable, and may change without notice. - */ - -#ifndef _LIBMAPLE_USB_CDCACM_H_ -#define _LIBMAPLE_USB_CDCACM_H_ - -#include -#include -#include - -#ifdef __cplusplus -extern "C" { -#endif - -/* - * CDC ACM Requests - */ - -#define USB_CDCACM_SET_LINE_CODING 0x20 -#define USB_CDCACM_GET_LINE_CODING 0x21 -#define USB_CDCACM_SET_COMM_FEATURE 0x02 -#define USB_CDCACM_SET_CONTROL_LINE_STATE 0x22 -#define USB_CDCACM_CONTROL_LINE_DTR (0x01) -#define USB_CDCACM_CONTROL_LINE_RTS (0x02) - -/* - * Descriptors, etc. - */ - -#define CDC_FUNCTIONAL_DESCRIPTOR_SIZE(DataSize) (3 + DataSize) -#define CDC_FUNCTIONAL_DESCRIPTOR(DataSize) \ - struct { \ - uint8 bLength; \ - uint8 bDescriptorType; \ - uint8 SubType; \ - uint8 Data[DataSize]; \ - } __packed - -#define USB_DEVICE_CLASS_CDC 0x02 -#define USB_DEVICE_SUBCLASS_CDC 0x00 -#define USB_INTERFACE_CLASS_CDC 0x02 -#define USB_INTERFACE_SUBCLASS_CDC_ACM 0x02 -#define USB_INTERFACE_CLASS_DIC 0x0A - -/* - * Endpoint configuration - */ - -#define USB_CDCACM_CTRL_ENDP 0 -#define USB_CDCACM_CTRL_RX_ADDR 0x40 -#define USB_CDCACM_CTRL_TX_ADDR 0x80 -#define USB_CDCACM_CTRL_EPSIZE 0x40 - -#define USB_CDCACM_TX_ENDP 1 -#define USB_CDCACM_TX_ADDR 0xC0 -#define USB_CDCACM_TX_EPSIZE 0x40 - -#define USB_CDCACM_MANAGEMENT_ENDP 2 -#define USB_CDCACM_MANAGEMENT_ADDR 0x100 -#define USB_CDCACM_MANAGEMENT_EPSIZE 0x40 - -#define USB_CDCACM_RX_ENDP 3 -#define USB_CDCACM_RX_ADDR 0x110 -#define USB_CDCACM_RX_EPSIZE 0x40 - -#ifndef __cplusplus -#define USB_CDCACM_DECLARE_DEV_DESC(vid, pid) \ - { \ - .bLength = sizeof(usb_descriptor_device), \ - .bDescriptorType = USB_DESCRIPTOR_TYPE_DEVICE, \ - .bcdUSB = 0x0200, \ - .bDeviceClass = USB_DEVICE_CLASS_CDC, \ - .bDeviceSubClass = USB_DEVICE_SUBCLASS_CDC, \ - .bDeviceProtocol = 0x00, \ - .bMaxPacketSize0 = 0x40, \ - .idVendor = vid, \ - .idProduct = pid, \ - .bcdDevice = 0x0200, \ - .iManufacturer = 0x01, \ - .iProduct = 0x02, \ - .iSerialNumber = 0x00, \ - .bNumConfigurations = 0x01, \ - } -#endif - -/* - * CDC ACM interface - */ - -void usb_cdcacm_enable(gpio_dev*, uint8); -void usb_cdcacm_disable(gpio_dev*, uint8); - -void usb_cdcacm_putc(char ch); -uint32 usb_cdcacm_tx(const uint8* buf, uint32 len); -uint32 usb_cdcacm_rx(uint8* buf, uint32 len); -uint32 usb_cdcacm_peek(uint8* buf, uint32 len); -uint32 usb_cdcacm_peek_ex(uint8* buf, uint32 offset, uint32 len); - -uint32 usb_cdcacm_data_available(void); /* in RX buffer */ -uint16 usb_cdcacm_get_pending(void); -uint8 usb_cdcacm_is_transmitting(void); - -uint8 usb_cdcacm_get_dtr(void); -uint8 usb_cdcacm_get_rts(void); - -typedef struct usb_cdcacm_line_coding { - uint32 dwDTERate; /* Baud rate */ - -#define USB_CDCACM_STOP_BITS_1 0 -#define USB_CDCACM_STOP_BITS_1_5 1 -#define USB_CDCACM_STOP_BITS_2 2 - uint8 bCharFormat; /* Stop bits */ - -#define USB_CDCACM_PARITY_NONE 0 -#define USB_CDCACM_PARITY_ODD 1 -#define USB_CDCACM_PARITY_EVEN 2 -#define USB_CDCACM_PARITY_MARK 3 -#define USB_CDCACM_PARITY_SPACE 4 - uint8 bParityType; /* Parity type */ - - uint8 bDataBits; /* Data bits: 5, 6, 7, 8, or 16 */ -} __packed usb_cdcacm_line_coding; - -/* Retrieve a copy of the current line coding structure. */ -void usb_cdcacm_get_line_coding(usb_cdcacm_line_coding*); - -/* Line coding conveniences. */ -int usb_cdcacm_get_baud(void); /* dwDTERate */ -int usb_cdcacm_get_stop_bits(void); /* bCharFormat */ -int usb_cdcacm_get_parity(void); /* bParityType */ -int usb_cdcacm_get_n_data_bits(void); /* bDataBits */ - -/* - * Hack: hooks for bootloader reset signalling - */ - -#define USB_CDCACM_HOOK_RX 0x1 -#define USB_CDCACM_HOOK_IFACE_SETUP 0x2 - -void usb_cdcacm_set_hooks(unsigned hook_flags, void (*hook)(unsigned, void*)); - -static __always_inline void usb_cdcacm_remove_hooks(unsigned hook_flags) { - usb_cdcacm_set_hooks(hook_flags, 0); -} - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/STM32F1/system/libmaple/include/libmaple/util.h b/STM32F1/system/libmaple/include/libmaple/util.h deleted file mode 100644 index 5a70348..0000000 --- a/STM32F1/system/libmaple/include/libmaple/util.h +++ /dev/null @@ -1,111 +0,0 @@ -/****************************************************************************** - * The MIT License - * - * Copyright (c) 2010 Perry Hung. - * - * Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, copy, - * modify, merge, publish, distribute, sublicense, and/or sell copies - * of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS - * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN - * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - *****************************************************************************/ - -/** - * @file libmaple/include/libmaple/util.h - * @brief Miscellaneous utility macros and procedures. - */ - -#ifndef _LIBMAPLE_UTIL_H_ -#define _LIBMAPLE_UTIL_H_ - -#ifdef __cplusplus -extern "C"{ -#endif - -#include - -/* - * Bit manipulation - */ - -/** 1UL shifted left by 'shift' */ -#define BIT(shift) (1UL << (shift)) -/** 'Mask' shifted left by 'shift' */ -#define BIT_MASK_SHIFT(mask, shift) ((mask) << (shift)) -/** Bits m to n of x */ -#define GET_BITS(x, m, n) ((((uint32)x) << (31 - (n))) >> ((31 - (n)) + (m))) -/** True iff v is a power of two (1, 2, 4, 8, ...) */ -#define IS_POWER_OF_TWO(v) ((v) && !((v) & ((v) - 1))) - -/* - * Failure routines - */ - -void __error(void); -void _fail(const char*, int, const char*); -void throb(void); - -/* - * Asserts and debug levels - */ - -#define DEBUG_NONE 0 -#define DEBUG_FAULT 1 -#define DEBUG_ALL 2 - -/** - * \def DEBUG_LEVEL - * - * Controls the level of assertion checking. - * - * The higher the debug level, the more assertions will be compiled - * in. This increases the amount of debugging information, but slows - * down (and increases the size of) the binary. - * - * The debug levels, from lowest to highest, are DEBUG_NONE, - * DEBUG_FAULT, and DEBUG_ALL. The default level is DEBUG_ALL. - */ - -#ifndef DEBUG_LEVEL -#define DEBUG_LEVEL DEBUG_ALL -#endif - -#if DEBUG_LEVEL >= DEBUG_ALL -#define ASSERT(exp) \ - if (exp) { \ - } else { \ - _fail(__FILE__, __LINE__, #exp); \ - } -#else -#define ASSERT(exp) (void)((0)) -#endif - -#if DEBUG_LEVEL >= DEBUG_FAULT -#define ASSERT_FAULT(exp) \ - if (exp) { \ - } else { \ - _fail(__FILE__, __LINE__, #exp); \ - } -#else -#define ASSERT_FAULT(exp) (void)((0)) -#endif - -#ifdef __cplusplus -} // extern "C" -#endif - -#endif diff --git a/STM32F1/system/libmaple/stm32f1/include/series/nvic.h b/STM32F1/system/libmaple/nvic.h similarity index 100% rename from STM32F1/system/libmaple/stm32f1/include/series/nvic.h rename to STM32F1/system/libmaple/nvic.h diff --git a/STM32F1/system/libmaple/stm32f1/include/series/pwr.h b/STM32F1/system/libmaple/pwr.h similarity index 100% rename from STM32F1/system/libmaple/stm32f1/include/series/pwr.h rename to STM32F1/system/libmaple/pwr.h diff --git a/STM32F1/system/libmaple/stm32f1/include/series/rcc.h b/STM32F1/system/libmaple/rcc.h similarity index 100% rename from STM32F1/system/libmaple/stm32f1/include/series/rcc.h rename to STM32F1/system/libmaple/rcc.h diff --git a/STM32F1/system/libmaple/rules.mk b/STM32F1/system/libmaple/rules.mk deleted file mode 100644 index 71979f0..0000000 --- a/STM32F1/system/libmaple/rules.mk +++ /dev/null @@ -1,50 +0,0 @@ -# Standard things -sp := $(sp).x -dirstack_$(sp) := $(d) -d := $(dir) -BUILDDIRS += $(BUILD_PATH)/$(d) - -LIBMAPLE_INCLUDES := -I$(LIBMAPLE_PATH)/include -I$(LIBMAPLE_MODULE_SERIES)/include -LIBMAPLE_PRIVATE_INCLUDES := -I$(LIBMAPLE_PATH) - -# Local flags -CFLAGS_$(d) = $(LIBMAPLE_PRIVATE_INCLUDES) $(LIBMAPLE_INCLUDES) -Wall -Werror - -# Local rules and targets -cSRCS_$(d) := adc.c -cSRCS_$(d) += dac.c -cSRCS_$(d) += dma.c -cSRCS_$(d) += exti.c -cSRCS_$(d) += flash.c -cSRCS_$(d) += gpio.c -cSRCS_$(d) += iwdg.c -cSRCS_$(d) += nvic.c -cSRCS_$(d) += pwr.c -cSRCS_$(d) += rcc.c -cSRCS_$(d) += spi.c -cSRCS_$(d) += systick.c -cSRCS_$(d) += timer.c -cSRCS_$(d) += usart.c -cSRCS_$(d) += usart_private.c -cSRCS_$(d) += util.c -sSRCS_$(d) := exc.S -# I2C support must be ported to F2: -ifeq ($(MCU_SERIES),stm32f1) -cSRCS_$(d) += i2c.c -endif - -cFILES_$(d) := $(cSRCS_$(d):%=$(d)/%) -sFILES_$(d) := $(sSRCS_$(d):%=$(d)/%) - -OBJS_$(d) := $(cFILES_$(d):%.c=$(BUILD_PATH)/%.o) $(sFILES_$(d):%.S=$(BUILD_PATH)/%.o) -DEPS_$(d) := $(OBJS_$(d):%.o=%.d) - -$(OBJS_$(d)): TGT_CFLAGS := $(CFLAGS_$(d)) -$(OBJS_$(d)): TGT_ASFLAGS := - -TGT_BIN += $(OBJS_$(d)) - -# Standard things --include $(DEPS_$(d)) -d := $(dirstack_$(sp)) -sp := $(basename $(sp)) diff --git a/STM32F1/system/libmaple/stm32f1/include/series/spi.h b/STM32F1/system/libmaple/spi.h similarity index 100% rename from STM32F1/system/libmaple/stm32f1/include/series/spi.h rename to STM32F1/system/libmaple/spi.h diff --git a/STM32F1/system/libmaple/stm32f1/include/series/stm32.h b/STM32F1/system/libmaple/stm32.h similarity index 100% rename from STM32F1/system/libmaple/stm32f1/include/series/stm32.h rename to STM32F1/system/libmaple/stm32.h diff --git a/STM32F1/system/libmaple/stm32f1/rules.mk b/STM32F1/system/libmaple/stm32f1/rules.mk deleted file mode 100644 index f1cc23e..0000000 --- a/STM32F1/system/libmaple/stm32f1/rules.mk +++ /dev/null @@ -1,45 +0,0 @@ -# Standard things -sp := $(sp).x -dirstack_$(sp) := $(d) -d := $(dir) -BUILDDIRS += $(BUILD_PATH)/$(d) - -# Local flags -CFLAGS_$(d) = -I$(d) $(LIBMAPLE_PRIVATE_INCLUDES) $(LIBMAPLE_INCLUDES) -Wall -Werror -ASFLAGS_$(d) = -I$(d) $(LIBMAPLE_PRIVATE_INCLUDES) $(LIBMAPLE_INCLUDES) -Wall -Werror - -# Extra BUILDDIRS -BUILDDIRS += $(BUILD_PATH)/$(d)/$(MCU_F1_LINE) - -# Local rules and targets -sSRCS_$(d) := $(MCU_F1_LINE)/isrs.S -sSRCS_$(d) += $(MCU_F1_LINE)/vector_table.S - -cSRCS_$(d) := adc.c -cSRCS_$(d) += bkp.c -cSRCS_$(d) += dma.c -cSRCS_$(d) += exti.c -cSRCS_$(d) += fsmc.c -cSRCS_$(d) += gpio.c -cSRCS_$(d) += i2c.c -cSRCS_$(d) += rcc.c -cSRCS_$(d) += spi.c -cSRCS_$(d) += timer.c -cSRCS_$(d) += usart.c - -sFILES_$(d) := $(sSRCS_$(d):%=$(d)/%) -cFILES_$(d) := $(cSRCS_$(d):%=$(d)/%) - -OBJS_$(d) := $(sFILES_$(d):%.S=$(BUILD_PATH)/%.o) \ - $(cFILES_$(d):%.c=$(BUILD_PATH)/%.o) -DEPS_$(d) := $(OBJS_$(d):%.o=%.d) - -$(OBJS_$(d)): TGT_ASFLAGS := $(ASFLAGS_$(d)) -$(OBJS_$(d)): TGT_CFLAGS := $(CFLAGS_$(d)) - -TGT_BIN += $(OBJS_$(d)) - -# Standard things --include $(DEPS_$(d)) -d := $(dirstack_$(sp)) -sp := $(basename $(sp)) diff --git a/STM32F1/system/libmaple/stm32f2/include/series/adc.h b/STM32F1/system/libmaple/stm32f2/include/series/adc.h deleted file mode 100644 index 175fe11..0000000 --- a/STM32F1/system/libmaple/stm32f2/include/series/adc.h +++ /dev/null @@ -1,335 +0,0 @@ -/****************************************************************************** - * The MIT License - * - * Copyright (c) 2012 LeafLabs, LLC. - * - * Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, copy, - * modify, merge, publish, distribute, sublicense, and/or sell copies - * of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS - * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN - * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - *****************************************************************************/ - -/** - * @file libmaple/stm32f2/include/series/adc.h - * @author Marti Bolivar , - * @brief STM32F2 ADC support. - */ - -#ifndef _LIBMAPLE_STM32F2_ADC_H_ -#define _LIBMAPLE_STM32F2_ADC_H_ - -#include - -/* - * Devices - */ - -extern const struct adc_dev *ADC1; -extern const struct adc_dev *ADC2; -extern const struct adc_dev *ADC3; - -/* - * Common register map - */ - -/** ADC common register map type */ -typedef struct adc_common_reg_map { - __io uint32 CSR; /**< Common status register */ - __io uint32 CCR; /**< Common control register */ - __io uint32 CDR; /**< - * @brief Common regular data register - * for dual and triple modes */ -} adc_common_reg_map; - -/* - * Register map base pointers - */ - -/** ADC1 register map base pointer. */ -#define ADC1_BASE ((struct adc_reg_map*)0x40012000) -/** ADC2 register map base pointer. */ -#define ADC2_BASE ((struct adc_reg_map*)0x40012100) -/** ADC3 register map base pointer. */ -#define ADC3_BASE ((struct adc_reg_map*)0x40012200) -/** ADC common register map base pointer. */ -#define ADC_COMMON_BASE ((struct adc_common_reg_map*)0x40012300) - -/* - * Register bit definitions - */ - -/* Status register */ - -/** Overrun bit. */ -#define ADC_SR_OVR_BIT 5 -/** Overrun. */ -#define ADC_SR_OVR (1U << ADC_SR_OVR_BIT) - -/* Control register 1 */ - -/** Overrun interrupt enable bit. */ -#define ADC_CR1_OVRIE_BIT 26 - -/** Overrun interrupt error enable. */ -#define ADC_CR1_OVRIE (1U << ADC_CR1_OVRIE_BIT) -/** Conversion resolution. */ -#define ADC_CR1_RES (0x3U << 24) -/** Conversion resolution: 12 bit (at least 15 ADCCLK cycles). */ -#define ADC_CR1_RES_12BIT (0x0U << 24) -/** Conversion resolution: 10 bit (at least 13 ADCCLK cycles). */ -#define ADC_CR1_RES_10BIT (0x1U << 24) -/** Conversion resolution: 8 bit (at least 11 ADCCLK cycles). */ -#define ADC_CR1_RES_8BIT (0x2U << 24) -/** Conversion resolution: 6 bit (at least 9 ADCCLK cycles). */ -#define ADC_CR1_RES_6BIT (0x3U << 24) - -/* Control register 2 */ - -#define ADC_CR2_SWSTART_BIT 30 -#define ADC_CR2_JSWSTART_BIT 22 -#define ADC_CR2_ALIGN_BIT 11 -#define ADC_CR2_EOCS_BIT 10 -#define ADC_CR2_DDS_BIT 9 -#define ADC_CR2_DMA_BIT 8 -#define ADC_CR2_CONT_BIT 1 -#define ADC_CR2_ADON_BIT 0 - -#define ADC_CR2_SWSTART (1U << ADC_CR2_SWSTART_BIT) -#define ADC_CR2_EXTEN (0x3 << 28) -#define ADC_CR2_EXTEN_DISABLED (0x0 << 28) -#define ADC_CR2_EXTEN_RISE (0x1 << 28) -#define ADC_CR2_EXTEN_FALL (0x2 << 28) -#define ADC_CR2_EXTEN_RISE_FALL (0x3 << 28) -#define ADC_CR2_EXTSEL (0xF << 24) -#define ADC_CR2_EXTSEL_TIM1_CC1 (0x0 << 24) -#define ADC_CR2_EXTSEL_TIM1_CC2 (0x1 << 24) -#define ADC_CR2_EXTSEL_TIM1_CC3 (0x2 << 24) -#define ADC_CR2_EXTSEL_TIM2_CC2 (0x3 << 24) -#define ADC_CR2_EXTSEL_TIM2_CC3 (0x4 << 24) -#define ADC_CR2_EXTSEL_TIM2_CC4 (0x5 << 24) -#define ADC_CR2_EXTSEL_TIM1_TRGO (0x6 << 24) -#define ADC_CR2_EXTSEL_TIM3_CC1 (0x7 << 24) -#define ADC_CR2_EXTSEL_TIM3_TRGO (0x8 << 24) -#define ADC_CR2_EXTSEL_TIM4_CC4 (0x9 << 24) -#define ADC_CR2_EXTSEL_TIM5_CC1 (0xA << 24) -#define ADC_CR2_EXTSEL_TIM5_CC2 (0xB << 24) -#define ADC_CR2_EXTSEL_TIM5_CC3 (0xC << 24) -#define ADC_CR2_EXTSEL_TIM8_CC1 (0xD << 24) -#define ADC_CR2_EXTSEL_TIM8_TRGO (0xE << 24) -#define ADC_CR2_EXTSEL_TIM1_EXTI11 (0xF << 24) -#define ADC_CR2_JSWSTART (1U << ADC_CR2_JSWSTART_BIT) -#define ADC_CR2_JEXTEN (0x3 << 20) -#define ADC_CR2_JEXTEN_DISABLED (0x0 << 20) -#define ADC_CR2_JEXTEN_RISE (0x1 << 20) -#define ADC_CR2_JEXTEN_FALL (0x2 << 20) -#define ADC_CR2_JEXTEN_RISE_FALL (0x3 << 20) -#define ADC_CR2_JEXTSEL (0xF << 16) -#define ADC_CR2_JEXTSEL_TIM1_CC4 (0x0 << 16) -#define ADC_CR2_JEXTSEL_TIM1_TRGO (0x1 << 16) -#define ADC_CR2_JEXTSEL_TIM2_CC1 (0x2 << 16) -#define ADC_CR2_JEXTSEL_TIM2_TRGO (0x3 << 16) -#define ADC_CR2_JEXTSEL_TIM3_CC2 (0x4 << 16) -#define ADC_CR2_JEXTSEL_TIM3_CC4 (0x5 << 16) -#define ADC_CR2_JEXTSEL_TIM4_CC1 (0x6 << 16) -#define ADC_CR2_JEXTSEL_TIM4_CC2 (0x7 << 16) -#define ADC_CR2_JEXTSEL_TIM4_CC3 (0x8 << 16) -#define ADC_CR2_JEXTSEL_TIM4_TRGO (0x9 << 16) -#define ADC_CR2_JEXTSEL_TIM5_CC4 (0xA << 16) -#define ADC_CR2_JEXTSEL_TIM5_TRGO (0xB << 16) -#define ADC_CR2_JEXTSEL_TIM8_CC2 (0xC << 16) -#define ADC_CR2_JEXTSEL_TIM8_CC3 (0xD << 16) -#define ADC_CR2_JEXTSEL_TIM8_CC4 (0xE << 16) -#define ADC_CR2_JEXTSEL_TIM1_EXTI15 (0xF << 16) -#define ADC_CR2_ALIGN (1U << ADC_CR2_ALIGN_BIT) -#define ADC_CR2_ALIGN_RIGHT (0U << ADC_CR2_ALIGN_BIT) -#define ADC_CR2_ALIGN_LEFT (1U << ADC_CR2_ALIGN_BIT) -#define ADC_CR2_EOCS (1U << ADC_CR2_EOCS_BIT) -#define ADC_CR2_EOCS_SEQUENCE (0U << ADC_CR2_EOCS_BIT) -#define ADC_CR2_EOCS_CONVERSION (1U << ADC_CR2_EOCS_BIT) -#define ADC_CR2_DDS (1U << ADC_CR2_DDS_BIT) -#define ADC_CR2_DMA (1U << ADC_CR2_DMA_BIT) -#define ADC_CR2_CONT (1U << ADC_CR2_CONT_BIT) -#define ADC_CR2_ADON (1U << ADC_CR2_ADON_BIT) - -/* Common status register */ - -#define ADC_CSR_OVR3_BIT 21 -#define ADC_CSR_STRT3_BIT 20 -#define ADC_CSR_JSTRT3_BIT 19 -#define ADC_CSR_JEOC3_BIT 18 -#define ADC_CSR_EOC3_BIT 17 -#define ADC_CSR_AWD3_BIT 16 -#define ADC_CSR_OVR2_BIT 13 -#define ADC_CSR_STRT2_BIT 12 -#define ADC_CSR_JSTRT2_BIT 11 -#define ADC_CSR_JEOC2_BIT 10 -#define ADC_CSR_EOC2_BIT 9 -#define ADC_CSR_AWD2_BIT 8 -#define ADC_CSR_OVR1_BIT 5 -#define ADC_CSR_STRT1_BIT 4 -#define ADC_CSR_JSTRT1_BIT 3 -#define ADC_CSR_JEOC1_BIT 2 -#define ADC_CSR_EOC1_BIT 1 -#define ADC_CSR_AWD1_BIT 0 - -#define ADC_CSR_OVR3 (1U << ADC_CSR_OVR3_BIT) -#define ADC_CSR_STRT3 (1U << ADC_CSR_STRT3_BIT) -#define ADC_CSR_JSTRT3 (1U << ADC_CSR_JSTRT3_BIT) -#define ADC_CSR_JEOC3 (1U << ADC_CSR_JEOC3_BIT) -#define ADC_CSR_EOC3 (1U << ADC_CSR_EOC3_BIT) -#define ADC_CSR_AWD3 (1U << ADC_CSR_AWD3_BIT) -#define ADC_CSR_OVR2 (1U << ADC_CSR_OVR2_BIT) -#define ADC_CSR_STRT2 (1U << ADC_CSR_STRT2_BIT) -#define ADC_CSR_JSTRT2 (1U << ADC_CSR_JSTRT2_BIT) -#define ADC_CSR_JEOC2 (1U << ADC_CSR_JEOC2_BIT) -#define ADC_CSR_EOC2 (1U << ADC_CSR_EOC2_BIT) -#define ADC_CSR_AWD2 (1U << ADC_CSR_AWD2_BIT) -#define ADC_CSR_OVR1 (1U << ADC_CSR_OVR1_BIT) -#define ADC_CSR_STRT1 (1U << ADC_CSR_STRT1_BIT) -#define ADC_CSR_JSTRT1 (1U << ADC_CSR_JSTRT1_BIT) -#define ADC_CSR_JEOC1 (1U << ADC_CSR_JEOC1_BIT) -#define ADC_CSR_EOC1 (1U << ADC_CSR_EOC1_BIT) -#define ADC_CSR_AWD1 (1U << ADC_CSR_AWD1_BIT) - -/* Common control register */ - -#define ADC_CCR_TSVREFE_BIT 23 -#define ADC_CCR_VBATE_BIT 22 -#define ADC_CCR_DDS_BIT 13 - -#define ADC_CCR_TSVREFE (1U << ADC_CCR_TSVREFE_BIT) -#define ADC_CCR_VBATE (1U << ADC_CCR_VBATE_BIT) -#define ADC_CCR_ADCPRE (0x3 << 16) -#define ADC_CCR_ADCPRE_PCLK2_DIV_2 (0x0 << 16) -#define ADC_CCR_ADCPRE_PCLK2_DIV_4 (0x1 << 16) -#define ADC_CCR_ADCPRE_PCLK2_DIV_6 (0x2 << 16) -#define ADC_CCR_ADCPRE_PCLK2_DIV_8 (0x3 << 16) -#define ADC_CCR_DMA (0x3 << 14) -#define ADC_CCR_DMA_DIS (0x0 << 14) -#define ADC_CCR_DMA_MODE_1 (0x1 << 14) -#define ADC_CCR_DMA_MODE_2 (0x2 << 14) -#define ADC_CCR_DMA_MODE_3 (0x3 << 14) -#define ADC_CCR_DDS (1U << ADC_CCR_DDS_BIT) -#define ADC_CCR_DELAY (0xF << 8) -#define ADC_CCR_DELAY_5 (0x0 << 8) -#define ADC_CCR_DELAY_6 (0x1 << 8) -#define ADC_CCR_DELAY_7 (0x2 << 8) -#define ADC_CCR_DELAY_8 (0x3 << 8) -#define ADC_CCR_DELAY_9 (0x4 << 8) -#define ADC_CCR_DELAY_10 (0x5 << 8) -#define ADC_CCR_DELAY_11 (0x6 << 8) -#define ADC_CCR_DELAY_12 (0x7 << 8) -#define ADC_CCR_DELAY_13 (0x8 << 8) -#define ADC_CCR_DELAY_14 (0x9 << 8) -#define ADC_CCR_DELAY_15 (0xA << 8) -#define ADC_CCR_DELAY_16 (0xB << 8) -#define ADC_CCR_DELAY_17 (0xC << 8) -#define ADC_CCR_DELAY_18 (0xD << 8) -#define ADC_CCR_DELAY_19 (0xE << 8) -#define ADC_CCR_DELAY_20 (0xF << 8) -/** Multi ADC mode selection. */ -#define ADC_CCR_MULTI 0x1F -/** All ADCs independent. */ -#define ADC_CCR_MULTI_INDEPENDENT 0x0 -/** Dual mode: combined regular simultaneous/injected simultaneous. */ -#define ADC_CCR_MULTI_DUAL_REG_SIM_INJ_SIM 0x1 -/** Dual mode: combined regular simultaneous/alternate trigger. */ -#define ADC_CCR_MULTI_DUAL_REG_SIM_ALT_TRIG 0x2 -/** Dual mode: injected simultaneous mode only. */ -#define ADC_CCR_MULTI_DUAL_INJ_SIM 0x5 -/** Dual mode: regular simultaneous mode only. */ -#define ADC_CCR_MULTI_DUAL_REG_SIM 0x6 -/** Dual mode: interleaved mode only. */ -#define ADC_CCR_MULTI_DUAL_INTER 0x7 -/** Dual mode: alternate trigger mode only. */ -#define ADC_CCR_MULTI_DUAL_ALT_TRIG 0x9 -/** Triple mode: combined regular simultaneous/injected simultaneous. */ -#define ADC_CCR_MULTI_TRIPLE_REG_SIM_INJ_SIM 0x10 -/** Triple mode: combined regular simultaneous/alternate trigger. */ -#define ADC_CCR_MULTI_TRIPLE_REG_SIM_ALT_TRIG 0x11 -/** Triple mode: injected simultaneous mode only. */ -#define ADC_CCR_MULTI_TRIPLE_INJ_SIM 0x12 -/** Triple mode: regular simultaneous mode only. */ -#define ADC_CCR_MULTI_TRIPLE_REG_SIM 0x15 -/** Triple mode: interleaved mode only. */ -#define ADC_CCR_MULTI_TRIPLE_INTER 0x17 -/** Triple mode: alternate trigger mode only. */ -#define ADC_CCR_MULTI_TRIPLE_ALT_TRIG 0x19 - -/* Common regular data register for dual and triple modes */ - -#define ADC_CDR_DATA2 0xFFFF0000 -#define ADC_CDR_DATA1 0xFFFF - -/* - * Other types - */ - -/** - * @brief STM32F2 external event selectors for regular group - * conversion. - * @see adc_set_extsel() - */ -typedef enum adc_extsel_event { - ADC_EXT_EV_TIM1_CC1 = ADC_CR2_EXTSEL_TIM1_CC1, - ADC_EXT_EV_TIM1_CC2 = ADC_CR2_EXTSEL_TIM1_CC2, - ADC_EXT_EV_TIM1_CC3 = ADC_CR2_EXTSEL_TIM1_CC3, - ADC_EXT_EV_TIM2_CC2 = ADC_CR2_EXTSEL_TIM2_CC2, - ADC_EXT_EV_TIM2_CC3 = ADC_CR2_EXTSEL_TIM2_CC3, - ADC_EXT_EV_TIM2_CC4 = ADC_CR2_EXTSEL_TIM2_CC4, - ADC_EXT_EV_TIM1_TRGO = ADC_CR2_EXTSEL_TIM1_TRGO, - ADC_EXT_EV_TIM3_CC1 = ADC_CR2_EXTSEL_TIM3_CC1, - ADC_EXT_EV_TIM3_TRGO = ADC_CR2_EXTSEL_TIM3_TRGO, - ADC_EXT_EV_TIM4_CC4 = ADC_CR2_EXTSEL_TIM4_CC4, - ADC_EXT_EV_TIM5_CC1 = ADC_CR2_EXTSEL_TIM5_CC1, - ADC_EXT_EV_TIM5_CC2 = ADC_CR2_EXTSEL_TIM5_CC2, - ADC_EXT_EV_TIM5_CC3 = ADC_CR2_EXTSEL_TIM5_CC3, - ADC_EXT_EV_TIM8_CC1 = ADC_CR2_EXTSEL_TIM8_CC1, - ADC_EXT_EV_TIM8_TRGO = ADC_CR2_EXTSEL_TIM8_TRGO, - ADC_EXT_EV_TIM1_EXTI11 = ADC_CR2_EXTSEL_TIM1_EXTI11, -} adc_extsel_event; - -/** - * @brief STM32F2 sample times, in ADC clock cycles. - */ -typedef enum adc_smp_rate { - ADC_SMPR_3, /**< 3 ADC cycles */ - ADC_SMPR_15, /**< 15 ADC cycles */ - ADC_SMPR_28, /**< 28 ADC cycles */ - ADC_SMPR_56, /**< 56 ADC cycles */ - ADC_SMPR_84, /**< 84 ADC cycles */ - ADC_SMPR_112, /**< 112 ADC cycles */ - ADC_SMPR_144, /**< 144 ADC cycles */ - ADC_SMPR_480, /**< 480 ADC cycles */ -} adc_smp_rate; - -/** - * @brief STM32F2 ADC prescalers, as divisors of PCLK2. - */ -typedef enum adc_prescaler { - /** PCLK2 divided by 2 */ - ADC_PRE_PCLK2_DIV_2 = ADC_CCR_ADCPRE_PCLK2_DIV_2, - /** PCLK2 divided by 4 */ - ADC_PRE_PCLK2_DIV_4 = ADC_CCR_ADCPRE_PCLK2_DIV_4, - /** PCLK2 divided by 6 */ - ADC_PRE_PCLK2_DIV_6 = ADC_CCR_ADCPRE_PCLK2_DIV_6, - /** PCLK2 divided by 8 */ - ADC_PRE_PCLK2_DIV_8 = ADC_CCR_ADCPRE_PCLK2_DIV_8, -} adc_prescaler; - -#endif diff --git a/STM32F1/system/libmaple/stm32f2/include/series/dac.h b/STM32F1/system/libmaple/stm32f2/include/series/dac.h deleted file mode 100644 index 0a578ca..0000000 --- a/STM32F1/system/libmaple/stm32f2/include/series/dac.h +++ /dev/null @@ -1,94 +0,0 @@ -/****************************************************************************** - * The MIT License - * - * Copyright (c) 2012 LeafLabs, LLC. - * - * Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, copy, - * modify, merge, publish, distribute, sublicense, and/or sell copies - * of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS - * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN - * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - *****************************************************************************/ - -/** - * @file libmaple/stm32f2/include/series/dac.h - * @brief STM32F2 DAC support - */ - -#ifndef _LIBMAPLE_STM32F2_DAC_H_ -#define _LIBMAPLE_STM32F2_DAC_H_ - -#ifdef __cplusplus -extern "C"{ -#endif - -#include - -/* - * Register map type - */ - -/** STM32F2 DAC register map type. */ -typedef struct dac_reg_map { - __io uint32 CR; /**< Control register */ - __io uint32 SWTRIGR; /**< Software trigger register */ - __io uint32 DHR12R1; /**< Channel 1 12-bit right-aligned data - holding register */ - __io uint32 DHR12L1; /**< Channel 1 12-bit left-aligned data - holding register */ - __io uint32 DHR8R1; /**< Channel 1 8-bit left-aligned data - holding register */ - __io uint32 DHR12R2; /**< Channel 2 12-bit right-aligned data - holding register */ - __io uint32 DHR12L2; /**< Channel 2 12-bit left-aligned data - holding register */ - __io uint32 DHR8R2; /**< Channel 2 8-bit left-aligned data - holding register */ - __io uint32 DHR12RD; /**< Dual DAC 12-bit right-aligned data - holding register */ - __io uint32 DHR12LD; /**< Dual DAC 12-bit left-aligned data - holding register */ - __io uint32 DHR8RD; /**< Dual DAC 8-bit right-aligned data holding - register */ - __io uint32 DOR1; /**< Channel 1 data output register */ - __io uint32 DOR2; /**< Channel 2 data output register */ - __io uint32 SR; /**< Status register */ -} dac_reg_map; - -/* - * Register bit definitions - */ - -/* Control register */ - -#define DAC_CR_DMAUDRIE1 (1U << 13) /* Channel 1 DMA underrun - * interrupt enable */ -#define DAC_CR_DMAUDRIE2 (1U << 29) /* Channel 2 DMA underrun - * interrupt enable */ - -/* Status register */ - -#define DAC_SR_DMAUDR1 (1U << 13) /* Channel 1 DMA underrun - * occurred */ -#define DAC_SR_DMAUDR2 (1U << 29) /* Channel 2 DMA underrun - * ocurred */ - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/STM32F1/system/libmaple/stm32f2/include/series/dma.h b/STM32F1/system/libmaple/stm32f2/include/series/dma.h deleted file mode 100644 index 43bd1a2..0000000 --- a/STM32F1/system/libmaple/stm32f2/include/series/dma.h +++ /dev/null @@ -1,810 +0,0 @@ -/****************************************************************************** - * The MIT License - * - * Copyright (c) 2012 LeafLabs, LLC - * - * Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, copy, - * modify, merge, publish, distribute, sublicense, and/or sell copies - * of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS - * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN - * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - *****************************************************************************/ - -/** - * @file libmaple/stm32f2/include/series/dma.h - * @author Marti Bolivar - * @brief STM32F2 DMA series header - */ - -#ifndef _LIBMAPLE_STM32F2_DMA_H_ -#define _LIBMAPLE_STM32F2_DMA_H_ - -#ifdef __cplusplus -extern "C"{ -#endif - -#include -#include - -/* - * Register map and base pointers - */ - -/** - * @brief STM32F2 DMA register map type. - */ -typedef struct dma_reg_map { - /* Isn't it nice how on F1, it's CCR1, but on F2, it's S1CR? */ - - /* Global DMA registers */ - __io uint32 LISR; /**< Low interrupt status register */ - __io uint32 HISR; /**< High interrupt status register */ - __io uint32 LIFCR; /**< Low interrupt flag clear register */ - __io uint32 HIFCR; /**< High interrupt flag clear register */ - /* Stream 0 registers */ - __io uint32 S0CR; /**< Stream 0 control register */ - __io uint32 S0NDTR; /**< Stream 0 number of data register */ - __io uint32 S0PAR; /**< Stream 0 peripheral address register */ - __io uint32 S0M0AR; /**< Stream 0 memory 0 address register */ - __io uint32 S0M1AR; /**< Stream 0 memory 1 address register */ - __io uint32 S0FCR; /**< Stream 0 FIFO control register */ - /* Stream 1 registers */ - __io uint32 S1CR; /**< Stream 1 control register */ - __io uint32 S1NDTR; /**< Stream 1 number of data register */ - __io uint32 S1PAR; /**< Stream 1 peripheral address register */ - __io uint32 S1M0AR; /**< Stream 1 memory 0 address register */ - __io uint32 S1M1AR; /**< Stream 1 memory 1 address register */ - __io uint32 S1FCR; /**< Stream 1 FIFO control register */ - /* Stream 2 registers */ - __io uint32 S2CR; /**< Stream 2 control register */ - __io uint32 S2NDTR; /**< Stream 2 number of data register */ - __io uint32 S2PAR; /**< Stream 2 peripheral address register */ - __io uint32 S2M0AR; /**< Stream 2 memory 0 address register */ - __io uint32 S2M1AR; /**< Stream 2 memory 1 address register */ - __io uint32 S2FCR; /**< Stream 2 FIFO control register */ - /* Stream 3 registers */ - __io uint32 S3CR; /**< Stream 3 control register */ - __io uint32 S3NDTR; /**< Stream 3 number of data register */ - __io uint32 S3PAR; /**< Stream 3 peripheral address register */ - __io uint32 S3M0AR; /**< Stream 3 memory 0 address register */ - __io uint32 S3M1AR; /**< Stream 3 memory 1 address register */ - __io uint32 S3FCR; /**< Stream 3 FIFO control register */ - /* Stream 4 registers */ - __io uint32 S4CR; /**< Stream 4 control register */ - __io uint32 S4NDTR; /**< Stream 4 number of data register */ - __io uint32 S4PAR; /**< Stream 4 peripheral address register */ - __io uint32 S4M0AR; /**< Stream 4 memory 0 address register */ - __io uint32 S4M1AR; /**< Stream 4 memory 1 address register */ - __io uint32 S4FCR; /**< Stream 4 FIFO control register */ - /* Stream 5 registers */ - __io uint32 S5CR; /**< Stream 5 control register */ - __io uint32 S5NDTR; /**< Stream 5 number of data register */ - __io uint32 S5PAR; /**< Stream 5 peripheral address register */ - __io uint32 S5M0AR; /**< Stream 5 memory 0 address register */ - __io uint32 S5M1AR; /**< Stream 5 memory 1 address register */ - __io uint32 S5FCR; /**< Stream 5 FIFO control register */ - /* Stream 6 registers */ - __io uint32 S6CR; /**< Stream 6 control register */ - __io uint32 S6NDTR; /**< Stream 6 number of data register */ - __io uint32 S6PAR; /**< Stream 6 peripheral address register */ - __io uint32 S6M0AR; /**< Stream 6 memory 0 address register */ - __io uint32 S6M1AR; /**< Stream 6 memory 1 address register */ - __io uint32 S6FCR; /**< Stream 6 FIFO control register */ - /* Stream 7 registers */ - __io uint32 S7CR; /**< Stream 7 control register */ - __io uint32 S7NDTR; /**< Stream 7 number of data register */ - __io uint32 S7PAR; /**< Stream 7 peripheral address register */ - __io uint32 S7M0AR; /**< Stream 7 memory 0 address register */ - __io uint32 S7M1AR; /**< Stream 7 memory 1 address register */ - __io uint32 S7FCR; /**< Stream 7 FIFO control register */ -} dma_reg_map; - -/** DMA controller 1 register map base pointer */ -#define DMA1_BASE ((struct dma_reg_map*)0x40026000) -/** DMA controller 2 register map base pointer */ -#define DMA2_BASE ((struct dma_reg_map*)0x40026400) - -/** - * @brief STM32F2 DMA stream (i.e. tube) register map type. - * Provides access to an individual stream's registers. - * @see dma_tube_regs() - */ -typedef struct dma_tube_reg_map { - __io uint32 SCR; /**< Stream configuration register */ - __io uint32 SNDTR; /**< Stream number of data register */ - __io uint32 SPAR; /**< Stream peripheral address register */ - __io uint32 SM0AR; /**< Stream memory 0 address register */ - __io uint32 SM1AR; /**< Stream memory 1 address register */ - __io uint32 SFCR; /**< Stream FIFO control register */ -} dma_tube_reg_map; - -/** DMA1 stream 0 register map base pointer */ -#define DMA1S0_BASE ((struct dma_tube_reg_map*)0x40026010) -/** DMA1 stream 1 register map base pointer */ -#define DMA1S1_BASE ((struct dma_tube_reg_map*)0x40026028) -/** DMA1 stream 2 register map base pointer */ -#define DMA1S2_BASE ((struct dma_tube_reg_map*)0x40026040) -/** DMA1 stream 3 register map base pointer */ -#define DMA1S3_BASE ((struct dma_tube_reg_map*)0x40026058) -/** DMA1 stream 4 register map base pointer */ -#define DMA1S4_BASE ((struct dma_tube_reg_map*)0x40026070) -/** DMA1 stream 5 register map base pointer */ -#define DMA1S5_BASE ((struct dma_tube_reg_map*)0x40026088) -/** DMA1 stream 6 register map base pointer */ -#define DMA1S6_BASE ((struct dma_tube_reg_map*)0x400260A0) -/** DMA1 stream 7 register map base pointer */ -#define DMA1S7_BASE ((struct dma_tube_reg_map*)0x400260B8) - -/** DMA2 stream 0 register map base pointer */ -#define DMA2S0_BASE ((struct dma_tube_reg_map*)0x40026410) -/** DMA2 stream 1 register map base pointer */ -#define DMA2S1_BASE ((struct dma_tube_reg_map*)0x40026028) -/** DMA2 stream 2 register map base pointer */ -#define DMA2S2_BASE ((struct dma_tube_reg_map*)0x40026040) -/** DMA2 stream 3 register map base pointer */ -#define DMA2S3_BASE ((struct dma_tube_reg_map*)0x40026058) -/** DMA2 stream 4 register map base pointer */ -#define DMA2S4_BASE ((struct dma_tube_reg_map*)0x40026070) -/** DMA2 stream 5 register map base pointer */ -#define DMA2S5_BASE ((struct dma_tube_reg_map*)0x40026088) -/** DMA2 stream 6 register map base pointer */ -#define DMA2S6_BASE ((struct dma_tube_reg_map*)0x400260A0) -/** DMA2 stream 7 register map base pointer */ -#define DMA2S7_BASE ((struct dma_tube_reg_map*)0x400260B8) - -/* - * Register bit definitions - */ - -/* Low interrupt status register */ - -#define DMA_LISR_TCIF3_BIT 27 -#define DMA_LISR_HTIF3_BIT 26 -#define DMA_LISR_TEIF3_BIT 25 -#define DMA_LISR_DMEIF3_BIT 24 -#define DMA_LISR_FEIF3_BIT 22 -#define DMA_LISR_TCIF2_BIT 21 -#define DMA_LISR_HTIF2_BIT 20 -#define DMA_LISR_TEIF2_BIT 19 -#define DMA_LISR_DMEIF2_BIT 18 -#define DMA_LISR_FEIF2_BIT 16 -#define DMA_LISR_TCIF1_BIT 11 -#define DMA_LISR_HTIF1_BIT 10 -#define DMA_LISR_TEIF1_BIT 9 -#define DMA_LISR_DMEIF1_BIT 8 -#define DMA_LISR_FEIF1_BIT 6 -#define DMA_LISR_TCIF0_BIT 5 -#define DMA_LISR_HTIF0_BIT 4 -#define DMA_LISR_TEIF0_BIT 3 -#define DMA_LISR_DMEIF0_BIT 2 -#define DMA_LISR_FEIF0_BIT 0 - -#define DMA_LISR_TCIF3 (1U << DMA_LISR_TCIF3_BIT) -#define DMA_LISR_HTIF3 (1U << DMA_LISR_HTIF3_BIT) -#define DMA_LISR_TEIF3 (1U << DMA_LISR_TEIF3_BIT) -#define DMA_LISR_DMEIF3 (1U << DMA_LISR_DMEIF3_BIT) -#define DMA_LISR_FEIF3 (1U << DMA_LISR_FEIF3_BIT) -#define DMA_LISR_TCIF2 (1U << DMA_LISR_TCIF2_BIT) -#define DMA_LISR_HTIF2 (1U << DMA_LISR_HTIF2_BIT) -#define DMA_LISR_TEIF2 (1U << DMA_LISR_TEIF2_BIT) -#define DMA_LISR_DMEIF2 (1U << DMA_LISR_DMEIF2_BIT) -#define DMA_LISR_FEIF2 (1U << DMA_LISR_FEIF2_BIT) -#define DMA_LISR_TCIF1 (1U << DMA_LISR_TCIF1_BIT) -#define DMA_LISR_HTIF1 (1U << DMA_LISR_HTIF1_BIT) -#define DMA_LISR_TEIF1 (1U << DMA_LISR_TEIF1_BIT) -#define DMA_LISR_DMEIF1 (1U << DMA_LISR_DMEIF1_BIT) -#define DMA_LISR_FEIF1 (1U << DMA_LISR_FEIF1_BIT) -#define DMA_LISR_TCIF0 (1U << DMA_LISR_TCIF0_BIT) -#define DMA_LISR_HTIF0 (1U << DMA_LISR_HTIF0_BIT) -#define DMA_LISR_TEIF0 (1U << DMA_LISR_TEIF0_BIT) -#define DMA_LISR_DMEIF0 (1U << DMA_LISR_DMEIF0_BIT) -#define DMA_LISR_FEIF0 (1U << DMA_LISR_FEIF0_BIT) - -/* High interrupt status register */ - -#define DMA_HISR_TCIF7_BIT 27 -#define DMA_HISR_HTIF7_BIT 26 -#define DMA_HISR_TEIF7_BIT 25 -#define DMA_HISR_DMEIF7_BIT 24 -#define DMA_HISR_FEIF7_BIT 22 -#define DMA_HISR_TCIF6_BIT 21 -#define DMA_HISR_HTIF6_BIT 20 -#define DMA_HISR_TEIF6_BIT 19 -#define DMA_HISR_DMEIF6_BIT 18 -#define DMA_HISR_FEIF6_BIT 16 -#define DMA_HISR_TCIF5_BIT 11 -#define DMA_HISR_HTIF5_BIT 10 -#define DMA_HISR_TEIF5_BIT 9 -#define DMA_HISR_DMEIF5_BIT 8 -#define DMA_HISR_FEIF5_BIT 6 -#define DMA_HISR_TCIF4_BIT 5 -#define DMA_HISR_HTIF4_BIT 4 -#define DMA_HISR_TEIF4_BIT 3 -#define DMA_HISR_DMEIF4_BIT 2 -#define DMA_HISR_FEIF4_BIT 0 - -#define DMA_HISR_TCIF7 (1U << DMA_HISR_TCIF7_BIT) -#define DMA_HISR_HTIF7 (1U << DMA_HISR_HTIF7_BIT) -#define DMA_HISR_TEIF7 (1U << DMA_HISR_TEIF7_BIT) -#define DMA_HISR_DMEIF7 (1U << DMA_HISR_DMEIF7_BIT) -#define DMA_HISR_FEIF7 (1U << DMA_HISR_FEIF7_BIT) -#define DMA_HISR_TCIF6 (1U << DMA_HISR_TCIF6_BIT) -#define DMA_HISR_HTIF6 (1U << DMA_HISR_HTIF6_BIT) -#define DMA_HISR_TEIF6 (1U << DMA_HISR_TEIF6_BIT) -#define DMA_HISR_DMEIF6 (1U << DMA_HISR_DMEIF6_BIT) -#define DMA_HISR_FEIF6 (1U << DMA_HISR_FEIF6_BIT) -#define DMA_HISR_TCIF5 (1U << DMA_HISR_TCIF5_BIT) -#define DMA_HISR_HTIF5 (1U << DMA_HISR_HTIF5_BIT) -#define DMA_HISR_TEIF5 (1U << DMA_HISR_TEIF5_BIT) -#define DMA_HISR_DMEIF5 (1U << DMA_HISR_DMEIF5_BIT) -#define DMA_HISR_FEIF5 (1U << DMA_HISR_FEIF5_BIT) -#define DMA_HISR_TCIF4 (1U << DMA_HISR_TCIF4_BIT) -#define DMA_HISR_HTIF4 (1U << DMA_HISR_HTIF4_BIT) -#define DMA_HISR_TEIF4 (1U << DMA_HISR_TEIF4_BIT) -#define DMA_HISR_DMEIF4 (1U << DMA_HISR_DMEIF4_BIT) -#define DMA_HISR_FEIF4 (1U << DMA_HISR_FEIF4_BIT) - -/* Low interrupt flag clear register */ - -#define DMA_LIFCR_CTCIF3_BIT 27 -#define DMA_LIFCR_CHTIF3_BIT 26 -#define DMA_LIFCR_CTEIF3_BIT 25 -#define DMA_LIFCR_CDMEIF3_BIT 24 -#define DMA_LIFCR_CFEIF3_BIT 22 -#define DMA_LIFCR_CTCIF2_BIT 21 -#define DMA_LIFCR_CHTIF2_BIT 20 -#define DMA_LIFCR_CTEIF2_BIT 19 -#define DMA_LIFCR_CDMEIF2_BIT 18 -#define DMA_LIFCR_CFEIF2_BIT 16 -#define DMA_LIFCR_CTCIF1_BIT 11 -#define DMA_LIFCR_CHTIF1_BIT 10 -#define DMA_LIFCR_CTEIF1_BIT 9 -#define DMA_LIFCR_CDMEIF1_BIT 8 -#define DMA_LIFCR_CFEIF1_BIT 6 -#define DMA_LIFCR_CTCIF0_BIT 5 -#define DMA_LIFCR_CHTIF0_BIT 4 -#define DMA_LIFCR_CTEIF0_BIT 3 -#define DMA_LIFCR_CDMEIF0_BIT 2 -#define DMA_LIFCR_CFEIF0_BIT 0 - -#define DMA_LIFCR_CTCIF3 (1U << DMA_LIFCR_CTCIF3_BIT) -#define DMA_LIFCR_CHTIF3 (1U << DMA_LIFCR_CHTIF3_BIT) -#define DMA_LIFCR_CTEIF3 (1U << DMA_LIFCR_CTEIF3_BIT) -#define DMA_LIFCR_CDMEIF3 (1U << DMA_LIFCR_CDMEIF3_BIT) -#define DMA_LIFCR_CFEIF3 (1U << DMA_LIFCR_CFEIF3_BIT) -#define DMA_LIFCR_CTCIF2 (1U << DMA_LIFCR_CTCIF2_BIT) -#define DMA_LIFCR_CHTIF2 (1U << DMA_LIFCR_CHTIF2_BIT) -#define DMA_LIFCR_CTEIF2 (1U << DMA_LIFCR_CTEIF2_BIT) -#define DMA_LIFCR_CDMEIF2 (1U << DMA_LIFCR_CDMEIF2_BIT) -#define DMA_LIFCR_CFEIF2 (1U << DMA_LIFCR_CFEIF2_BIT) -#define DMA_LIFCR_CTCIF1 (1U << DMA_LIFCR_CTCIF1_BIT) -#define DMA_LIFCR_CHTIF1 (1U << DMA_LIFCR_CHTIF1_BIT) -#define DMA_LIFCR_CTEIF1 (1U << DMA_LIFCR_CTEIF1_BIT) -#define DMA_LIFCR_CDMEIF1 (1U << DMA_LIFCR_CDMEIF1_BIT) -#define DMA_LIFCR_CFEIF1 (1U << DMA_LIFCR_CFEIF1_BIT) -#define DMA_LIFCR_CTCIF0 (1U << DMA_LIFCR_CTCIF0_BIT) -#define DMA_LIFCR_CHTIF0 (1U << DMA_LIFCR_CHTIF0_BIT) -#define DMA_LIFCR_CTEIF0 (1U << DMA_LIFCR_CTEIF0_BIT) -#define DMA_LIFCR_CDMEIF0 (1U << DMA_LIFCR_CDMEIF0_BIT) -#define DMA_LIFCR_CFEIF0 (1U << DMA_LIFCR_CFEIF0_BIT) - -/* High interrupt flag clear regsister */ - -#define DMA_HIFCR_CTCIF7_BIT 27 -#define DMA_HIFCR_CHTIF7_BIT 26 -#define DMA_HIFCR_CTEIF7_BIT 25 -#define DMA_HIFCR_CDMEIF7_BIT 24 -#define DMA_HIFCR_CFEIF7_BIT 22 -#define DMA_HIFCR_CTCIF6_BIT 21 -#define DMA_HIFCR_CHTIF6_BIT 20 -#define DMA_HIFCR_CTEIF6_BIT 19 -#define DMA_HIFCR_CDMEIF6_BIT 18 -#define DMA_HIFCR_CFEIF6_BIT 16 -#define DMA_HIFCR_CTCIF5_BIT 11 -#define DMA_HIFCR_CHTIF5_BIT 10 -#define DMA_HIFCR_CTEIF5_BIT 9 -#define DMA_HIFCR_CDMEIF5_BIT 8 -#define DMA_HIFCR_CFEIF5_BIT 6 -#define DMA_HIFCR_CTCIF4_BIT 5 -#define DMA_HIFCR_CHTIF4_BIT 4 -#define DMA_HIFCR_CTEIF4_BIT 3 -#define DMA_HIFCR_CDMEIF4_BIT 2 -#define DMA_HIFCR_CFEIF4_BIT 0 - -#define DMA_HIFCR_CTCIF7 (1U << DMA_HIFCR_CTCIF7_BIT) -#define DMA_HIFCR_CHTIF7 (1U << DMA_HIFCR_CHTIF7_BIT) -#define DMA_HIFCR_CTEIF7 (1U << DMA_HIFCR_CTEIF7_BIT) -#define DMA_HIFCR_CDMEIF7 (1U << DMA_HIFCR_CDMEIF7_BIT) -#define DMA_HIFCR_CFEIF7 (1U << DMA_HIFCR_CFEIF7_BIT) -#define DMA_HIFCR_CTCIF6 (1U << DMA_HIFCR_CTCIF6_BIT) -#define DMA_HIFCR_CHTIF6 (1U << DMA_HIFCR_CHTIF6_BIT) -#define DMA_HIFCR_CTEIF6 (1U << DMA_HIFCR_CTEIF6_BIT) -#define DMA_HIFCR_CDMEIF6 (1U << DMA_HIFCR_CDMEIF6_BIT) -#define DMA_HIFCR_CFEIF6 (1U << DMA_HIFCR_CFEIF6_BIT) -#define DMA_HIFCR_CTCIF5 (1U << DMA_HIFCR_CTCIF5_BIT) -#define DMA_HIFCR_CHTIF5 (1U << DMA_HIFCR_CHTIF5_BIT) -#define DMA_HIFCR_CTEIF5 (1U << DMA_HIFCR_CTEIF5_BIT) -#define DMA_HIFCR_CDMEIF5 (1U << DMA_HIFCR_CDMEIF5_BIT) -#define DMA_HIFCR_CFEIF5 (1U << DMA_HIFCR_CFEIF5_BIT) -#define DMA_HIFCR_CTCIF4 (1U << DMA_HIFCR_CTCIF4_BIT) -#define DMA_HIFCR_CHTIF4 (1U << DMA_HIFCR_CHTIF4_BIT) -#define DMA_HIFCR_CTEIF4 (1U << DMA_HIFCR_CTEIF4_BIT) -#define DMA_HIFCR_CDMEIF4 (1U << DMA_HIFCR_CDMEIF4_BIT) -#define DMA_HIFCR_CFEIF4 (1U << DMA_HIFCR_CFEIF4_BIT) - -/* Stream configuration register */ - -#define DMA_SCR_CT_BIT 19 -#define DMA_SCR_DBM_BIT 18 -#define DMA_SCR_PINCOS_BIT 15 -#define DMA_SCR_MINC_BIT 10 -#define DMA_SCR_PINC_BIT 9 -#define DMA_SCR_CIRC_BIT 8 -#define DMA_SCR_PFCTRL_BIT 5 -#define DMA_SCR_TCIE_BIT 4 -#define DMA_SCR_HTIE_BIT 3 -#define DMA_SCR_TEIE_BIT 2 -#define DMA_SCR_DMEIE_BIT 1 -#define DMA_SCR_EN_BIT 0 - -#define DMA_SCR_CHSEL (0x7 << 25) -#define DMA_SCR_CHSEL_CH_0 (0x0 << 25) -#define DMA_SCR_CHSEL_CH_1 (0x1 << 25) -#define DMA_SCR_CHSEL_CH_2 (0x2 << 25) -#define DMA_SCR_CHSEL_CH_3 (0x3 << 25) -#define DMA_SCR_CHSEL_CH_4 (0x4 << 25) -#define DMA_SCR_CHSEL_CH_5 (0x5 << 25) -#define DMA_SCR_CHSEL_CH_6 (0x6 << 25) -#define DMA_SCR_CHSEL_CH_7 (0x7 << 25) -#define DMA_SCR_MBURST (0x3 << 23) -#define DMA_SCR_MBURST_SINGLE (0x0 << 23) -#define DMA_SCR_MBURST_INCR4 (0x1 << 23) -#define DMA_SCR_MBURST_INCR8 (0x2 << 23) -#define DMA_SCR_MBURST_INCR16 (0x3 << 23) -#define DMA_SCR_PBURST (0x3 << 21) -#define DMA_SCR_PBURST_SINGLE (0x0 << 21) -#define DMA_SCR_PBURST_INCR4 (0x1 << 21) -#define DMA_SCR_PBURST_INCR8 (0x2 << 21) -#define DMA_SCR_PBURST_INCR16 (0x3 << 21) -#define DMA_SCR_CT (1U << DMA_SCR_CT_BIT) -#define DMA_SCR_DBM (1U << DMA_SCR_DBM_BIT) -#define DMA_SCR_PL (0x3 << 16) -#define DMA_SCR_PL_LOW (0x0 << 16) -#define DMA_SCR_PL_MEDIUM (0x1 << 16) -#define DMA_SCR_PL_HIGH (0x2 << 16) -#define DMA_SCR_VERY_HIGH (0x3 << 16) -#define DMA_SCR_PINCOS (1U << DMA_SCR_PINCOS_BIT) -#define DMA_SCR_MSIZE (0x3 << 13) -#define DMA_SCR_MSIZE_8BITS (0x0 << 13) -#define DMA_SCR_MSIZE_16BITS (0x1 << 13) -#define DMA_SCR_MSIZE_32BITS (0x2 << 13) -#define DMA_SCR_PSIZE (0x3 << 11) -#define DMA_SCR_PSIZE_8BITS (0x0 << 11) -#define DMA_SCR_PSIZE_16BITS (0x1 << 11) -#define DMA_SCR_PSIZE_32BITS (0x2 << 11) -#define DMA_SCR_MINC (1U << DMA_SCR_MINC_BIT) -#define DMA_SCR_PINC (1U << DMA_SCR_PINC_BIT) -#define DMA_SCR_CIRC (1U << DMA_SCR_CIRC_BIT) -#define DMA_SCR_DIR (0x3 << 6) -#define DMA_SCR_DIR_PER_TO_MEM (0x0 << 6) -#define DMA_SCR_DIR_MEM_TO_PER (0x1 << 6) -#define DMA_SCR_DIR_MEM_TO_MEM (0x2 << 6) -#define DMA_SCR_PFCTRL (1U << DMA_SCR_PFCTRL_BIT) -#define DMA_SCR_TCIE (1U << DMA_SCR_TCIE_BIT) -#define DMA_SCR_HTIE (1U << DMA_SCR_HTIE_BIT) -#define DMA_SCR_TEIE (1U << DMA_SCR_TEIE_BIT) -#define DMA_SCR_DMEIE (1U << DMA_SCR_DMEIE_BIT) -#define DMA_SCR_EN (1U << DMA_SCR_EN_BIT) - -/* Stream FIFO control register */ - -#define DMA_SFCR_FEIE_BIT 7 -#define DMA_SFCR_DMDIS_BIT 2 - -#define DMA_SFCR_FEIE (1U << DMA_SFCR_FEIE_BIT) -#define DMA_SFCR_FS (0x7 << 3) -#define DMA_SFCR_FS_ZERO_TO_QUARTER (0x0 << 3) -#define DMA_SFCR_FS_QUARTER_TO_HALF (0x1 << 3) -#define DMA_SFCR_FS_HALF_TO_THREE_QUARTERS (0x2 << 3) -#define DMA_SFCR_FS_THREE_QUARTERS_TO_FULL (0x3 << 3) -#define DMA_SFCR_FS_EMPTY (0x4 << 3) -#define DMA_SFCR_FS_FULL (0x5 << 3) -#define DMA_SFCR_DMDIS (1U << DMA_SFCR_DMDIS_BIT) -#define DMA_SFCR_FTH (0x3 << 0) -#define DMA_SFCR_FTH_QUARTER_FULL (0x0 << 3) -#define DMA_SFCR_FTH_HALF_FULL (0x1 << 3) -#define DMA_SFCR_FTH_THREE_QUARTERS_FULL (0x2 << 3) -#define DMA_SFCR_FTH_FULL (0x3 << 3) - -/* - * Devices - */ - -extern dma_dev *DMA1; -extern dma_dev *DMA2; - -/* - * Other types needed by, or useful for, - */ - -/** - * @brief DMA streams - * This is also the dma_tube type for STM32F2. - * @see dma_tube - */ -typedef enum dma_stream { - DMA_S0 = 0, - DMA_S1 = 1, - DMA_S2 = 2, - DMA_S3 = 3, - DMA_S4 = 4, - DMA_S5 = 5, - DMA_S6 = 6, - DMA_S7 = 7, -} dma_stream; - -/** STM32F2 dma_tube (=dma_stream) */ -#define dma_tube dma_stream - -/** - * @brief STM32F2 configuration flags for dma_tube_config. - * @see struct dma_tube_config - */ -typedef enum dma_cfg_flags { - /* NB: flags that aren't SCR bits are treated specially. */ - - /** - * Source address increment mode - * - * If this flag is set, the source address is incremented (by the - * source size) after each DMA transfer. - */ - DMA_CFG_SRC_INC = 1U << 31, - - /** - * Destination address increment mode - * - * If this flag is set, the destination address is incremented (by - * the destination size) after each DMA transfer. - */ - DMA_CFG_DST_INC = 1U << 30, - - /** - * Circular mode - * - * This mode is not available for memory-to-memory transfers. - */ - DMA_CFG_CIRC = DMA_SCR_CIRC, - - /** Transfer complete interrupt enable */ - DMA_CFG_CMPLT_IE = DMA_SCR_TCIE, - /** Transfer half-complete interrupt enable */ - DMA_CFG_HALF_CMPLT_IE = DMA_SCR_HTIE, - /** Transfer error interrupt enable */ - DMA_CFG_ERR_IE = DMA_SCR_TEIE, - /** Direct mode error interrupt enable */ - DMA_CFG_DM_ERR_IE = DMA_SCR_DMEIE, - /** FIFO error interrupt enable */ - DMA_CFG_FIFO_ERR_IE = (1U << 29), -} dma_cfg_flags; - -/** - * @brief STM32F2 DMA request sources. - * - * IMPORTANT: - * - * 1. On STM32F2, a particular dma_request_src is always tied to a - * single DMA controller, but often can be supported by multiple - * streams. For example, DMA requests from ADC1 (DMA_REQ_SRC_ADC1) can - * only be handled by DMA2, but they can go to either stream 0 or - * stream 4 (though not any other stream). If you try to use a request - * source with the wrong DMA controller or the wrong stream on - * STM32F2, dma_tube_cfg() will fail. - * - * 2. A single stream can only handle a single request source at a - * time. If you change a stream's request source later, it will stop - * serving requests from the old source. However, for some streams, - * some sources conflict with one another (when they correspond to the - * same channel on that stream), and on STM32F2, Terrible Super-Bad - * Things will happen if two conflicting request sources are active at - * the same time. - * - * @see struct dma_tube_config - * @see dma_tube_cfg() - */ -typedef enum dma_request_src { - /* These are constructed like so (though this may change, so user - * code shouldn't depend on it): - * - * Bits 0--2: Channel associated with request source - * - * Bits 3--9: rcc_clk_id of DMA controller associated with request source - * - * Bits 10--17: Bit mask of streams which can handle that request - * source. (E.g., bit 10 set means stream 0 can - * handle the source, bit 11 set means stream 1 can, - * etc.) - * - * Among other things, this is used for error checking in - * dma_tube_cfg(). If you change this bit encoding, you need to - * update the helper functions in stm32f2/dma.c. - */ -#define _DMA_STM32F2_REQ_SRC(stream_mask, clk_id, channel) \ - (((stream_mask) << 10) | ((clk_id) << 3) | (channel)) -#define _DMA_S(n) (1U << (n)) - - /* DMA1 request sources */ -#define _DMA_1_REQ_SRC(stream_mask, channel) \ - _DMA_STM32F2_REQ_SRC(stream_mask, RCC_DMA1, channel) - - /* Channel 0 */ - DMA_REQ_SRC_SPI3_RX = _DMA_1_REQ_SRC(_DMA_S(0) | _DMA_S(2), 0), - DMA_REQ_SRC_SPI2_RX = _DMA_1_REQ_SRC(_DMA_S(3), 0), - DMA_REQ_SRC_SPI2_TX = _DMA_1_REQ_SRC(_DMA_S(4), 0), - DMA_REQ_SRC_SPI3_TX = _DMA_1_REQ_SRC(_DMA_S(5) | _DMA_S(7), 0), - - /* Channel 1 */ - DMA_REQ_SRC_I2C1_RX = _DMA_1_REQ_SRC(_DMA_S(0) | _DMA_S(5), 1), - DMA_REQ_SRC_TIM7_UP = _DMA_1_REQ_SRC(_DMA_S(2) | _DMA_S(4), 1), - DMA_REQ_SRC_I2C1_TX = _DMA_1_REQ_SRC(_DMA_S(6) | _DMA_S(7), 1), - - /* Channel 2 */ - DMA_REQ_SRC_TIM4_CH1 = _DMA_1_REQ_SRC(_DMA_S(0), 2), - DMA_REQ_SRC_TIM4_CH2 = _DMA_1_REQ_SRC(_DMA_S(3), 2), - DMA_REQ_SRC_TIM4_UP = _DMA_1_REQ_SRC(_DMA_S(6), 2), - DMA_REQ_SRC_TIM4_CH3 = _DMA_1_REQ_SRC(_DMA_S(7), 2), - - /* Channel 3 */ - DMA_REQ_SRC_TIM2_UP = _DMA_1_REQ_SRC(_DMA_S(1) | _DMA_S(7), 3), - DMA_REQ_SRC_TIM2_CH3 = _DMA_1_REQ_SRC(_DMA_S(1), 3), - DMA_REQ_SRC_I2C3_RX = _DMA_1_REQ_SRC(_DMA_S(2), 3), - DMA_REQ_SRC_I2C3_TX = _DMA_1_REQ_SRC(_DMA_S(4), 3), - DMA_REQ_SRC_TIM2_CH1 = _DMA_1_REQ_SRC(_DMA_S(5), 3), - DMA_REQ_SRC_TIM2_CH2 = _DMA_1_REQ_SRC(_DMA_S(6), 3), - DMA_REQ_SRC_TIM2_CH4 = _DMA_1_REQ_SRC(_DMA_S(6) | _DMA_S(7), 3), - - /* Channel 4 */ - DMA_REQ_SRC_UART5_RX = _DMA_1_REQ_SRC(_DMA_S(0), 4), - DMA_REQ_SRC_USART3_RX = _DMA_1_REQ_SRC(_DMA_S(1), 4), - DMA_REQ_SRC_UART4_RX = _DMA_1_REQ_SRC(_DMA_S(2), 4), - DMA_REQ_SRC_USART3_TX = _DMA_1_REQ_SRC(_DMA_S(3), 4), - DMA_REQ_SRC_UART4_TX = _DMA_1_REQ_SRC(_DMA_S(4), 4), - DMA_REQ_SRC_USART2_RX = _DMA_1_REQ_SRC(_DMA_S(5), 4), - DMA_REQ_SRC_USART2_TX = _DMA_1_REQ_SRC(_DMA_S(6), 4), - DMA_REQ_SRC_UART5_TX = _DMA_1_REQ_SRC(_DMA_S(7), 4), - - /* Channel 5 */ - DMA_REQ_SRC_TIM3_CH4 = _DMA_1_REQ_SRC(_DMA_S(2), 5), - DMA_REQ_SRC_TIM3_UP = _DMA_1_REQ_SRC(_DMA_S(2), 5), - DMA_REQ_SRC_TIM3_CH1 = _DMA_1_REQ_SRC(_DMA_S(4), 5), - DMA_REQ_SRC_TIM3_TRIG = _DMA_1_REQ_SRC(_DMA_S(4), 5), - DMA_REQ_SRC_TIM3_CH2 = _DMA_1_REQ_SRC(_DMA_S(5), 5), - DMA_REQ_SRC_TIM3_CH3 = _DMA_1_REQ_SRC(_DMA_S(7), 5), - - /* Channel 6 */ - DMA_REQ_SRC_TIM5_CH3 = _DMA_1_REQ_SRC(_DMA_S(0), 6), - DMA_REQ_SRC_TIM5_UP = _DMA_1_REQ_SRC(_DMA_S(0) | _DMA_S(6), 6), - DMA_REQ_SRC_TIM5_CH4 = _DMA_1_REQ_SRC(_DMA_S(1) | _DMA_S(3), 6), - DMA_REQ_SRC_TIM5_TRIG = _DMA_1_REQ_SRC(_DMA_S(1) | _DMA_S(3), 6), - DMA_REQ_SRC_TIM5_CH1 = _DMA_1_REQ_SRC(_DMA_S(2), 6), - DMA_REQ_SRC_TIM5_CH2 = _DMA_1_REQ_SRC(_DMA_S(4), 6), - - /* Channel 7 */ - DMA_REQ_SRC_TIM6_UP = _DMA_1_REQ_SRC(_DMA_S(1), 7), - DMA_REQ_SRC_I2C2_RX = _DMA_1_REQ_SRC(_DMA_S(2) | _DMA_S(3), 7), - DMA_REQ_SRC_USART3_TX_ALTERNATE = _DMA_1_REQ_SRC(_DMA_S(4), 7), - DMA_REQ_SRC_DAC1 = _DMA_1_REQ_SRC(_DMA_S(5), 7), - DMA_REQ_SRC_DAC2 = _DMA_1_REQ_SRC(_DMA_S(6), 7), - DMA_REQ_SRC_I2C2_TX = _DMA_1_REQ_SRC(_DMA_S(7), 7), -#undef _DMA_1_REQ_SRC - - /* DMA2 request sources */ -#define _DMA_2_REQ_SRC(stream_mask, channel) \ - _DMA_STM32F2_REQ_SRC(stream_mask, RCC_DMA2, channel) - - /* Channel 0 */ - DMA_REQ_SRC_ADC1 = _DMA_2_REQ_SRC(_DMA_S(0) | _DMA_S(4), 0), - /* You can use these "DMA_REQ_SRC_TIMx_CHx_ALTERNATE" if you know - * what you're doing, but the other ones (for channels 6 and 7), - * are better, in that they don't conflict with one another. */ - DMA_REQ_SRC_TIM8_CH1_ALTERNATE = _DMA_2_REQ_SRC(_DMA_S(2), 0), - DMA_REQ_SRC_TIM8_CH2_ALTERNATE = _DMA_2_REQ_SRC(_DMA_S(2), 0), - DMA_REQ_SRC_TIM8_CH3_ALTERNATE = _DMA_2_REQ_SRC(_DMA_S(2), 0), - DMA_REQ_SRC_TIM1_CH1_ALTERNATE = _DMA_2_REQ_SRC(_DMA_S(6), 0), - DMA_REQ_SRC_TIM1_CH2_ALTERNATE = _DMA_2_REQ_SRC(_DMA_S(6), 0), - DMA_REQ_SRC_TIM1_CH3_ALTENRATE = _DMA_2_REQ_SRC(_DMA_S(6), 0), - - /* Channel 1 */ - DMA_REQ_SRC_DCMI = _DMA_2_REQ_SRC(_DMA_S(1) | _DMA_S(7), 1), - DMA_REQ_SRC_ADC2 = _DMA_2_REQ_SRC(_DMA_S(2) | _DMA_S(3), 1), - - /* Channel 2 */ - DMA_REQ_SRC_ADC3 = _DMA_2_REQ_SRC(_DMA_S(0) | _DMA_S(1), 2), - DMA_REQ_SRC_CRYP_OUT = _DMA_2_REQ_SRC(_DMA_S(5), 2), - DMA_REQ_SRC_CRYP_IN = _DMA_2_REQ_SRC(_DMA_S(6), 2), - DMA_REQ_SRC_HASH_IN = _DMA_2_REQ_SRC(_DMA_S(7), 2), - - /* Channel 3 */ - DMA_REQ_SRC_SPI1_RX = _DMA_2_REQ_SRC(_DMA_S(0) | _DMA_S(2), 3), - DMA_REQ_SRC_SPI1_TX = _DMA_2_REQ_SRC(_DMA_S(3) | _DMA_S(5), 3), - - /* Channel 4 */ - DMA_REQ_SRC_USART1_RX = _DMA_2_REQ_SRC(_DMA_S(2) | _DMA_S(5), 4), - DMA_REQ_SRC_SDIO = _DMA_2_REQ_SRC(_DMA_S(3) | _DMA_S(6), 4), - DMA_REQ_SRC_USART1_TX = _DMA_2_REQ_SRC(_DMA_S(7), 4), - - /* Channel 5 */ - DMA_REQ_SRC_USART6_RX = _DMA_2_REQ_SRC(_DMA_S(1) | _DMA_S(2), 5), - DMA_REQ_SRC_USART6_TX = _DMA_2_REQ_SRC(_DMA_S(6) | _DMA_S(7), 5), - - /* Channel 6 */ - DMA_REQ_SRC_TIM1_TRIG = _DMA_2_REQ_SRC(_DMA_S(0) | _DMA_S(4), 6), - DMA_REQ_SRC_TIM1_CH1 = _DMA_2_REQ_SRC(_DMA_S(1) | _DMA_S(3), 6), - DMA_REQ_SRC_TIM1_CH2 = _DMA_2_REQ_SRC(_DMA_S(3), 6), - DMA_REQ_SRC_TIM1_CH4 = _DMA_2_REQ_SRC(_DMA_S(4), 6), - DMA_REQ_SRC_TIM1_COM = _DMA_2_REQ_SRC(_DMA_S(4), 6), - DMA_REQ_SRC_TIM1_UP = _DMA_2_REQ_SRC(_DMA_S(5), 6), - DMA_REQ_SRC_TIM1_CH3 = _DMA_2_REQ_SRC(_DMA_S(6), 6), - - /* Channel 7 */ - DMA_REQ_SRC_TIM8_UP = _DMA_2_REQ_SRC(_DMA_S(1), 7), - DMA_REQ_SRC_TIM8_CH1 = _DMA_2_REQ_SRC(_DMA_S(2), 7), - DMA_REQ_SRC_TIM8_CH2 = _DMA_2_REQ_SRC(_DMA_S(3), 7), - DMA_REQ_SRC_TIM8_CH3 = _DMA_2_REQ_SRC(_DMA_S(4), 7), - DMA_REQ_SRC_TIM8_CH4 = _DMA_2_REQ_SRC(_DMA_S(7), 7), - DMA_REQ_SRC_TIM8_TRIG = _DMA_2_REQ_SRC(_DMA_S(7), 7), - DMA_REQ_SRC_TIM8_COM = _DMA_2_REQ_SRC(_DMA_S(7), 7), -#undef _DMA_2_REQ_SRC -#undef _DMA_S -} dma_request_src; - -/* - * Tube conveniences - */ - -static inline dma_tube_reg_map* dma_tube_regs(dma_dev *dev, - dma_tube tube) { - ASSERT(DMA_S0 <= tube && tube <= DMA_S7); - switch (dev->clk_id) { - case RCC_DMA1: - return DMA1S0_BASE + (int)tube; - case RCC_DMA2: - return DMA2S0_BASE + (int)tube; - default: - /* Can't happen */ - ASSERT(0); - return 0; - } -} - -static inline uint8 dma_is_enabled(dma_dev *dev, dma_tube tube) { - return dma_tube_regs(dev, tube)->SCR & DMA_SCR_EN; -} - -/* F2-only; available because of double-buffering. */ -void dma_set_mem_n_addr(dma_dev *dev, dma_tube tube, int n, - __io void *address); - -/** - * @brief Set memory 0 address. - * Availability: STM32F2. - * - * @param dev DMA device - * @param tube Tube whose memory 0 address to set - * @param addr Address to use as memory 0 - */ -static __always_inline void -dma_set_mem0_addr(dma_dev *dev, dma_tube tube, __io void *addr) { - dma_set_mem_n_addr(dev, tube, 0, addr); -} - -/** - * @brief Set memory 1 address. - * Availability: STM32F2. - * - * @param dev DMA device - * @param tube Tube whose memory 1 address to set - * @param addr Address to use as memory 1 - */ -static __always_inline void -dma_set_mem1_addr(dma_dev *dev, dma_tube tube, __io void *addr) { - dma_set_mem_n_addr(dev, tube, 1, addr); -} - -/* Assume the user means SM0AR in a non-double-buffered configuration. */ -static __always_inline void -dma_set_mem_addr(dma_dev *dev, dma_tube tube, __io void *addr) { - dma_set_mem0_addr(dev, tube, addr); -} - -/* SM0AR and SM1AR are treated as though they have the same size */ -static inline dma_xfer_size dma_get_mem_size(dma_dev *dev, dma_tube tube) { - return (dma_xfer_size)(dma_tube_regs(dev, tube)->SCR >> 13); -} - -static inline dma_xfer_size dma_get_per_size(dma_dev *dev, dma_tube tube) { - return (dma_xfer_size)(dma_tube_regs(dev, tube)->SCR >> 11); -} - -void dma_enable_fifo(dma_dev *dev, dma_tube tube); -void dma_disable_fifo(dma_dev *dev, dma_tube tube); - -static __always_inline int dma_is_fifo_enabled(dma_dev *dev, dma_tube tube) { - return dma_tube_regs(dev, tube)->SFCR & DMA_SFCR_DMDIS; -} - -/* - * TODO: - * - Double-buffer configuration function - * - FIFO configuration function - * - MBURST/PBURST configuration function - */ - -/* - * ISR/IFCR conveniences. - */ - -/* (undocumented) helper for reading LISR/HISR and writing - * LIFCR/HIFCR. For these registers, - * - * S0, S4: bits start at bit 0 - * S1, S5: 6 - * S2, S6: 16 - * S3, S7: 22 - * - * I can't imagine why ST didn't just use a byte for each group. The - * bits fit, and it would have made functions like these simpler and - * faster. Oh well. */ -static __always_inline uint32 _dma_sr_fcr_shift(dma_tube tube) { - switch (tube) { - case DMA_S0: /* fall through */ - case DMA_S4: - return 0; - case DMA_S1: /* fall through */ - case DMA_S5: - return 6; - case DMA_S2: /* fall through */ - case DMA_S6: - return 16; - case DMA_S3: /* fall through */ - case DMA_S7: - return 22; - } - /* Can't happen */ - ASSERT(0); - return 0; -} - -static inline uint8 dma_get_isr_bits(dma_dev *dev, dma_tube tube) { - dma_reg_map *regs = dev->regs; - __io uint32 *isr = tube > DMA_S3 ? ®s->HISR : ®s->LISR; - return (*isr >> _dma_sr_fcr_shift(tube)) & 0x3D; -} - -static inline void dma_clear_isr_bits(dma_dev *dev, dma_tube tube) { - dma_reg_map *regs = dev->regs; - __io uint32 *ifcr = tube > DMA_S3 ? ®s->HIFCR : ®s->LIFCR; - *ifcr = (0x3D << _dma_sr_fcr_shift(tube)); -} - -#undef _DMA_IRQ_BIT_SHIFT - -#ifdef __cplusplus -} // extern "C" -#endif - -#endif diff --git a/STM32F1/system/libmaple/stm32f2/include/series/exti.h b/STM32F1/system/libmaple/stm32f2/include/series/exti.h deleted file mode 100644 index 4643fcf..0000000 --- a/STM32F1/system/libmaple/stm32f2/include/series/exti.h +++ /dev/null @@ -1,46 +0,0 @@ -/****************************************************************************** - * The MIT License - * - * Copyright (c) 2012 LeafLabs, LLC. - * - * Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, copy, - * modify, merge, publish, distribute, sublicense, and/or sell copies - * of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS - * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN - * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - *****************************************************************************/ - -/** - * @file libmaple/stm32f1/include/series/exti.h - * @brief STM32F2 external interrupts - */ - -#ifndef _LIBMAPLE_STM32F2_EXTI_H_ -#define _LIBMAPLE_STM32F2_EXTI_H_ - -#ifdef __cpluspus -extern "C" { -#endif - -struct exti_reg_map; -#define EXTI_BASE ((struct exti_reg_map*)0x40013C00) - -#ifdef __cpluspus -} -#endif - -#endif diff --git a/STM32F1/system/libmaple/stm32f2/include/series/flash.h b/STM32F1/system/libmaple/stm32f2/include/series/flash.h deleted file mode 100644 index a3c3933..0000000 --- a/STM32F1/system/libmaple/stm32f2/include/series/flash.h +++ /dev/null @@ -1,202 +0,0 @@ -/****************************************************************************** - * The MIT License - * - * Copyright (c) 2011 LeafLabs, LLC. - * - * Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, copy, - * modify, merge, publish, distribute, sublicense, and/or sell copies - * of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS - * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN - * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - *****************************************************************************/ - -/** - * @file libmaple/stm32f2/include/series/flash.h - * @brief STM32F2 Flash header. - * - * Provides register map, base pointer, and register bit definitions - * for the Flash controller on the STM32F2 series, along with - * series-specific configuration values. - */ - -#ifndef _LIBMAPLE_STM32F2_FLASH_H_ -#define _LIBMAPLE_STM32F2_FLASH_H_ - -#ifdef __cplusplus -extern "C"{ -#endif - -#include - -/* - * Register map - */ - -/** @brief STM32F2 Flash register map type */ -typedef struct flash_reg_map { - __io uint32 ACR; /**< Access control register */ - __io uint32 KEYR; /**< Key register */ - __io uint32 OPTKEYR; /**< Option key register */ - __io uint32 SR; /**< Status register */ - __io uint32 CR; /**< Control register */ - __io uint32 OPTCR; /**< Option control register */ -} flash_reg_map; - -#define FLASH_BASE ((struct flash_reg_map*)0x40023C00) - -/* - * Register bit definitions - */ - -/* Access control register */ - -#define FLASH_ACR_DCRST_BIT 12 -#define FLASH_ACR_ICRST_BIT 11 -#define FLASH_ACR_DCEN_BIT 10 -#define FLASH_ACR_ICEN_BIT 9 -#define FLASH_ACR_PRFTEN_BIT 8 - -#define FLASH_ACR_DCRST (1U << FLASH_ACR_DCRST_BIT) -#define FLASH_ACR_ICRST (1U << FLASH_ACR_ICRST_BIT) -#define FLASH_ACR_DCEN (1U << FLASH_ACR_DCEN_BIT) -#define FLASH_ACR_ICEN (1U << FLASH_ACR_ICEN_BIT) -#define FLASH_ACR_PRFTEN (1U << FLASH_ACR_PRFTEN_BIT) -#define FLASH_ACR_LATENCY 0x7 -#define FLASH_ACR_LATENCY_0WS 0x0 -#define FLASH_ACR_LATENCY_1WS 0x1 -#define FLASH_ACR_LATENCY_2WS 0x2 -#define FLASH_ACR_LATENCY_3WS 0x3 -#define FLASH_ACR_LATENCY_4WS 0x4 -#define FLASH_ACR_LATENCY_5WS 0x5 -#define FLASH_ACR_LATENCY_6WS 0x6 -#define FLASH_ACR_LATENCY_7WS 0x7 - -/* Key register */ - -#define FLASH_KEYR_KEY1 0x45670123 -#define FLASH_KEYR_KEY2 0xCDEF89AB - -/* Option key register */ - -#define FLASH_OPTKEYR_OPTKEY1 0x08192A3B -#define FLASH_OPTKEYR_OPTKEY2 0x4C5D6E7F - -/* Status register */ - -#define FLASH_SR_BSY_BIT 16 -#define FLASH_SR_PGSERR_BIT 7 -#define FLASH_SR_PGPERR_BIT 6 -#define FLASH_SR_PGAERR_BIT 5 -#define FLASH_SR_WRPERR_BIT 4 -#define FLASH_SR_OPERR_BIT 1 -#define FLASH_SR_EOP_BIT 0 - -#define FLASH_SR_BSY (1U << FLASH_SR_BSY_BIT) -#define FLASH_SR_PGSERR (1U << FLASH_SR_PGSERR_BIT) -#define FLASH_SR_PGPERR (1U << FLASH_SR_PGPERR_BIT) -#define FLASH_SR_PGAERR (1U << FLASH_SR_PGAERR_BIT) -#define FLASH_SR_WRPERR (1U << FLASH_SR_WRPERR_BIT) -#define FLASH_SR_OPERR (1U << FLASH_SR_OPERR_BIT) -#define FLASH_SR_EOP (1U << FLASH_SR_EOP_BIT) - -/* Control register */ - -#define FLASH_CR_LOCK_BIT 31 -#define FLASH_CR_ERRIE_BIT 25 -#define FLASH_CR_EOPIE_BIT 24 -#define FLASH_CR_STRT_BIT 16 -#define FLASH_CR_MER_BIT 2 -#define FLASH_CR_SER_BIT 1 -#define FLASH_CR_PG_BIT 0 - -#define FLASH_CR_LOCK (1U << FLASH_CR_LOCK_BIT) -#define FLASH_CR_ERRIE (1U << FLASH_CR_ERRIE_BIT) -#define FLASH_CR_EOPIE (1U << FLASH_CR_EOPIE_BIT) -#define FLASH_CR_STRT (1U << FLASH_CR_STRT_BIT) - -#define FLASH_CR_PSIZE (0x3 << 8) -#define FLASH_CR_PSIZE_MUL8 (0x0 << 8) -#define FLASH_CR_PSIZE_MUL16 (0x1 << 8) -#define FLASH_CR_PSIZE_MUL32 (0x2 << 8) -#define FLASH_CR_PSIZE_MUL64 (0x3 << 8) - -#define FLASH_CR_SNB (0xF << 3) -#define FLASH_CR_SNB_0 (0x0 << 3) -#define FLASH_CR_SNB_1 (0x1 << 3) -#define FLASH_CR_SNB_2 (0x2 << 3) -#define FLASH_CR_SNB_3 (0x3 << 3) -#define FLASH_CR_SNB_4 (0x4 << 3) -#define FLASH_CR_SNB_5 (0x5 << 3) -#define FLASH_CR_SNB_6 (0x6 << 3) -#define FLASH_CR_SNB_7 (0x7 << 3) -#define FLASH_CR_SNB_8 (0x8 << 3) -#define FLASH_CR_SNB_9 (0x9 << 3) -#define FLASH_CR_SNB_10 (0xA << 3) -#define FLASH_CR_SNB_11 (0xB << 3) - -#define FLASH_CR_MER (1U << FLASH_CR_MER_BIT) -#define FLASH_CR_SER (1U << FLASH_CR_SER_BIT) -#define FLASH_CR_PG (1U << FLASH_CR_PG_BIT) - -/* Option control register */ - -#define FLASH_OPTCR_NRST_STDBY_BIT 7 -#define FLASH_OPTCR_NRST_STOP_BIT 6 -#define FLASH_OPTCR_WDG_SW_BIT 5 -#define FLASH_OPTCR_OPTSTRT_BIT 1 -#define FLASH_OPTCR_OPTLOCK_BIT 0 - -#define FLASH_OPTCR_NWRP (0x3FF << 16) - -/* Excluded: The many level 1 values */ -#define FLASH_OPTCR_RDP (0xFF << 8) -#define FLASH_OPTCR_RDP_LEVEL0 (0xAA << 8) -#define FLASH_OPTCR_RDP_LEVEL2 (0xCC << 8) - -#define FLASH_OPTCR_USER (0x7 << 5) -#define FLASH_OPTCR_nRST_STDBY (1U << FLASH_OPTCR_nRST_STDBY_BIT) -#define FLASH_OPTCR_nRST_STOP (1U << FLASH_OPTCR_nRST_STOP_BIT) -#define FLASH_OPTCR_WDG_SW (1U << FLASH_OPTCR_WDG_SW_BIT) - -#define FLASH_OPTCR_BOR_LEV (0x3 << 2) -#define FLASH_OPTCR_BOR_LEVEL3 (0x0 << 2) -#define FLASH_OPTCR_BOR_LEVEL2 (0x1 << 2) -#define FLASH_OPTCR_BOR_LEVEL1 (0x2 << 2) -#define FLASH_OPTCR_BOR_OFF (0x3 << 2) - -#define FLASH_OPTCR_OPTSTRT (1U << FLASH_OPTCR_OPTSTRT_BIT) -#define FLASH_OPTCR_OPTLOCK (1U << FLASH_OPTCR_OPTLOCK_BIT) - -/* - * Series-specific configuration values - */ - -/* Note that this value depends on a 2.7V--3.6V supply voltage */ -#define FLASH_SAFE_WAIT_STATES FLASH_WAIT_STATE_3 - -/* Flash memory features available via ACR. */ -enum { - FLASH_PREFETCH = 0x100, - FLASH_ICACHE = 0x200, - FLASH_DCACHE = 0x400, -}; - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/STM32F1/system/libmaple/stm32f2/include/series/gpio.h b/STM32F1/system/libmaple/stm32f2/include/series/gpio.h deleted file mode 100644 index 4d0d98c..0000000 --- a/STM32F1/system/libmaple/stm32f2/include/series/gpio.h +++ /dev/null @@ -1,264 +0,0 @@ -/****************************************************************************** - * The MIT License - * - * Copyright (c) 2011, 2012 LeafLabs, LLC. - * - * Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, copy, - * modify, merge, publish, distribute, sublicense, and/or sell copies - * of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS - * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN - * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. -*****************************************************************************/ - -/** - * @file libmaple/stm32f2/include/series/gpio.h - * @brief STM32F2 GPIO support. - */ - -#ifndef _LIBMAPLE_STM32F2_GPIO_H_ -#define _LIBMAPLE_STM32F2_GPIO_H_ - -#ifdef __cplusplus -extern "C"{ -#endif - -#include - -/* - * GPIO register maps and devices - */ - -/** GPIO register map type */ -typedef struct gpio_reg_map { - __io uint32 MODER; /**< Mode register */ - __io uint32 OTYPER; /**< Output type register */ - __io uint32 OSPEEDR; /**< Output speed register */ - __io uint32 PUPDR; /**< Pull-up/pull-down register */ - __io uint32 IDR; /**< Input data register */ - __io uint32 ODR; /**< Output data register */ - __io uint32 BSRR; /**< Bit set/reset register */ - __io uint32 LCKR; /**< Configuration lock register */ - __io uint32 AFRL; /**< Alternate function low register */ - __io uint32 AFRH; /**< Alternate function high register */ -} gpio_reg_map; - -/** GPIO port A register map base pointer */ -#define GPIOA_BASE ((struct gpio_reg_map*)0x40020000) -/** GPIO port B register map base pointer */ -#define GPIOB_BASE ((struct gpio_reg_map*)0x40020400) -/** GPIO port C register map base pointer */ -#define GPIOC_BASE ((struct gpio_reg_map*)0x40020800) -/** GPIO port D register map base pointer */ -#define GPIOD_BASE ((struct gpio_reg_map*)0x40020C00) -/** GPIO port E register map base pointer */ -#define GPIOE_BASE ((struct gpio_reg_map*)0x40021000) -/** GPIO port F register map base pointer */ -#define GPIOF_BASE ((struct gpio_reg_map*)0x40021400) -/** GPIO port G register map base pointer */ -#define GPIOG_BASE ((struct gpio_reg_map*)0x40021800) -/** GPIO port H register map base pointer */ -#define GPIOH_BASE ((struct gpio_reg_map*)0x40021C00) -/** GPIO port I register map base pointer */ -#define GPIOI_BASE ((struct gpio_reg_map*)0x40022000) - -struct gpio_dev; -extern struct gpio_dev* const GPIOA; -extern struct gpio_dev gpioa; -extern struct gpio_dev* const GPIOB; -extern struct gpio_dev gpiob; -extern struct gpio_dev* const GPIOC; -extern struct gpio_dev gpioc; -extern struct gpio_dev* const GPIOD; -extern struct gpio_dev gpiod; -extern struct gpio_dev* const GPIOE; -extern struct gpio_dev gpioe; -extern struct gpio_dev* const GPIOF; -extern struct gpio_dev gpiof; -extern struct gpio_dev* const GPIOG; -extern struct gpio_dev gpiog; -extern struct gpio_dev* const GPIOH; -extern struct gpio_dev gpioh; -extern struct gpio_dev* const GPIOI; -extern struct gpio_dev gpioi; - -/* - * Register bit definitions - * - * Currently, we only provide masks to be used for shifting for some - * registers, rather than repeating the same values 16 times. - */ - -/* Mode register */ - -#define GPIO_MODER_INPUT 0x0 -#define GPIO_MODER_OUTPUT 0x1 -#define GPIO_MODER_AF 0x2 -#define GPIO_MODER_ANALOG 0x3 - -/* Output type register */ - -#define GPIO_OTYPER_PP 0x0 -#define GPIO_OTYPER_OD 0x1 - -/* Output speed register */ - -#define GPIO_OSPEEDR_LOW 0x0 -#define GPIO_OSPEEDR_MED 0x1 -#define GPIO_OSPEEDR_FAST 0x2 -#define GPIO_OSPEEDR_HIGH 0x3 - -/* Pull-up/pull-down register */ - -#define GPIO_PUPDR_NOPUPD 0x0 -#define GPIO_PUPDR_PU 0x1 -#define GPIO_PUPDR_PD 0x2 - -/* Alternate function register low */ - -#define GPIO_AFRL_AF0 (0xFU << 0) -#define GPIO_AFRL_AF1 (0xFU << 4) -#define GPIO_AFRL_AF2 (0xFU << 8) -#define GPIO_AFRL_AF3 (0xFU << 12) -#define GPIO_AFRL_AF4 (0xFU << 16) -#define GPIO_AFRL_AF5 (0xFU << 20) -#define GPIO_AFRL_AF6 (0xFU << 24) -#define GPIO_AFRL_AF7 (0xFU << 28) - -/* Alternate function register high */ - -#define GPIO_AFRH_AF8 (0xFU << 0) -#define GPIO_AFRH_AF9 (0xFU << 4) -#define GPIO_AFRH_AF10 (0xFU << 8) -#define GPIO_AFRH_AF11 (0xFU << 12) -#define GPIO_AFRH_AF12 (0xFU << 16) -#define GPIO_AFRH_AF13 (0xFU << 20) -#define GPIO_AFRH_AF14 (0xFU << 24) -#define GPIO_AFRH_AF15 (0xFU << 28) - -/* - * GPIO routines - */ - -/** - * @brief GPIO pin modes - */ -typedef enum gpio_pin_mode { - GPIO_MODE_INPUT = GPIO_MODER_INPUT, /**< Input mode */ - GPIO_MODE_OUTPUT = GPIO_MODER_OUTPUT, /**< Output mode */ - GPIO_MODE_AF = GPIO_MODER_AF, /**< Alternate function mode */ - GPIO_MODE_ANALOG = GPIO_MODER_ANALOG, /**< Analog mode */ -} gpio_pin_mode; - -/** - * @brief Additional flags to be used when setting a pin's mode. - * - * Beyond the basic modes (input, general purpose output, alternate - * function, and analog), there are three parameters that can affect a - * pin's mode: - * - * 1. Output type: push/pull or open-drain. This only has an effect - * for output modes. Choices are: GPIO_MODEF_TYPE_PP (the default) - * and GPIO_MODEF_TYPE_OD. - * - * 2. Output speed: specifies the frequency at which a pin changes - * state. This only has an effect for output modes. Choices are: - * GPIO_MODEF_SPEED_LOW (default), GPIO_MODEF_SPEED_MED, - * GPIO_MODEF_SPEED_FAST, and GPIO_MODEF_SPEED_HIGH. - * - * 3. Push/pull setting: All GPIO pins have weak pull-up and pull-down - * resistors that can be enabled when the pin's mode is - * set. Choices are: GPIO_MODEF_PUPD_NONE (default), - * GPIO_MODEF_PUPD_PU, and GPIO_MODEF_PUPD_PD. - */ -typedef enum gpio_mode_flags { - /* Output type in bit 0 */ - GPIO_MODEF_TYPE_PP = GPIO_OTYPER_PP, /**< Output push/pull (default). - Applies only when the mode - specifies output. */ - GPIO_MODEF_TYPE_OD = GPIO_OTYPER_OD, /**< Output open drain. - Applies only when the mode - specifies output. */ - - /* Speed in bits 2:1 */ - GPIO_MODEF_SPEED_LOW = GPIO_OSPEEDR_LOW << 1, /**< Low speed (default): - 2 MHz. */ - GPIO_MODEF_SPEED_MED = GPIO_OSPEEDR_MED << 1, /**< Medium speed: 25 MHz. */ - GPIO_MODEF_SPEED_FAST = GPIO_OSPEEDR_FAST << 1, /**< Fast speed: 50 MHz. */ - GPIO_MODEF_SPEED_HIGH = GPIO_OSPEEDR_HIGH << 1, /**< High speed: - 100 MHz on 30 pF, - 80 MHz on 15 pF. */ - - /* Pull-up/pull-down in bits 4:3 */ - GPIO_MODEF_PUPD_NONE = GPIO_PUPDR_NOPUPD << 3, /**< No pull-up/pull-down - (default). */ - GPIO_MODEF_PUPD_PU = GPIO_PUPDR_PU << 3, /**< Pull-up */ - GPIO_MODEF_PUPD_PD = GPIO_PUPDR_PD << 3, /**< Pull-down */ -} gpio_mode_flags; - -void gpio_set_modef(struct gpio_dev *dev, - uint8 bit, - gpio_pin_mode mode, - unsigned flags); - -/** - * @brief Set the mode of a GPIO pin. - * - * Calling this function is equivalent to calling gpio_set_modef(dev, - * pin, mode, GPIO_MODE_SPEED_HIGH). Note that this overrides the - * default speed. - * - * @param dev GPIO device. - * @param bit Bit on the device whose mode to set, 0--15. - * @param mode Mode to set the pin to. - */ -static inline void gpio_set_mode(struct gpio_dev *dev, - uint8 bit, - gpio_pin_mode mode) { - gpio_set_modef(dev, bit, mode, GPIO_MODEF_SPEED_HIGH); -} - -/** - * @brief GPIO alternate functions. - * Use these to select an alternate function for a pin. - * @see gpio_set_af() - */ -typedef enum gpio_af { - GPIO_AF_SYS = 0, /**< System. */ - GPIO_AF_TIM_1_2 = 1, /**< Timers 1 and 2. */ - GPIO_AF_TIM_3_4_5 = 2, /**< Timers 3, 4, and 5. */ - GPIO_AF_TIM_8_9_10_11 = 3, /**< Timers 8 through 11. */ - GPIO_AF_I2C = 4, /**< I2C 1, 2, and 3. */ - GPIO_AF_SPI_1_2 = 5, /**< SPI1, SPI2/I2S2. */ - GPIO_AF_SPI3 = 6, /**< SPI3/I2S3. */ - GPIO_AF_USART_1_2_3 = 7, /**< USART 1, 2, and 3. */ - GPIO_AF_USART_4_5_6 = 8, /**< UART 4 and 5, USART 6. */ - GPIO_AF_CAN_1_2_TIM_12_13_14 = 9, /**< - * CAN 1 and 2, timers 12, 13, and 14. */ - GPIO_AF_USB_OTG_FS_HS = 10, /**< USB OTG HS and FS. */ - GPIO_AF_ETH = 11, /**< Ethernet MII and RMII. */ - GPIO_AF_FSMC_SDIO_OTG_FS = 12, /**< FSMC, SDIO, and USB OTG FS. */ - GPIO_AF_DCMI = 13, /**< DCMI. */ - GPIO_AF_EVENTOUT = 15, /**< EVENTOUT. */ -} gpio_af; - -void gpio_set_af(struct gpio_dev *dev, uint8 bit, gpio_af af); - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/STM32F1/system/libmaple/stm32f2/include/series/nvic.h b/STM32F1/system/libmaple/stm32f2/include/series/nvic.h deleted file mode 100644 index dc03806..0000000 --- a/STM32F1/system/libmaple/stm32f2/include/series/nvic.h +++ /dev/null @@ -1,160 +0,0 @@ -/****************************************************************************** - * The MIT License - * - * Copyright (c) 2011 LeafLabs, LLC. - * - * Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, copy, - * modify, merge, publish, distribute, sublicense, and/or sell copies - * of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS - * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN - * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - *****************************************************************************/ - -/** - * @file libmaple/stm32f2/include/series/nvic.h - * @brief STM32F2 nested vectored interrupt controller (NVIC) header. - */ - -#ifndef _LIBMAPLE_STM32F2_NVIC_H_ -#define _LIBMAPLE_STM32F2_NVIC_H_ - -#ifdef __cplusplus -extern "C"{ -#endif - -/** - * @brief STM32F2 interrupt vector table interrupt numbers. - */ -typedef enum nvic_irq_num { - NVIC_NMI = -14, /**< Non-maskable interrupt */ - NVIC_HARDFAULT = -13, /**< Hard fault (all class of fault) */ - NVIC_MEM_MANAGE = -12, /**< Memory management */ - NVIC_BUS_FAULT = -11, /**< Bus fault: prefetch fault, memory - access fault. */ - NVIC_USAGE_FAULT = -10, /**< Usage fault: Undefined instruction - or illegal state. */ - NVIC_SVC = -5, /**< System service call via SWI - instruction */ - NVIC_DEBUG_MON = -4, /**< Debug monitor */ - NVIC_PEND_SVC = -2, /**< Pendable request for system - service */ - NVIC_SYSTICK = -1, /**< System tick timer */ - NVIC_WWDG = 0, /**< Window watchdog interrupt */ - NVIC_PVD = 1, /**< PVD through EXTI line detection */ - NVIC_TAMP_STAMP = 2, /**< Tamper and TimeStamp */ - NVIC_RTC_WKUP = 3, /**< Real-time clock wakeup */ - NVIC_FLASH = 4, /**< Flash */ - NVIC_RCC = 5, /**< Reset and clock control */ - NVIC_EXTI0 = 6, /**< EXTI line 0 */ - NVIC_EXTI1 = 7, /**< EXTI line 1 */ - NVIC_EXTI2 = 8, /**< EXTI line 2 */ - NVIC_EXTI3 = 9, /**< EXTI line 3 */ - NVIC_EXTI4 = 10, /**< EXTI line 4 */ - NVIC_DMA1_STREAM0 = 11, /**< DMA1 stream 0 */ - NVIC_DMA1_STREAM1 = 12, /**< DMA1 stream 1 */ - NVIC_DMA1_STREAM2 = 13, /**< DMA1 stream 2 */ - NVIC_DMA1_STREAM3 = 14, /**< DMA1 stream 3 */ - NVIC_DMA1_STREAM4 = 15, /**< DMA1 stream 4 */ - NVIC_DMA1_STREAM5 = 16, /**< DMA1 stream 5 */ - NVIC_DMA1_STREAM6 = 17, /**< DMA1 stream 6 */ - NVIC_ADC = 18, /**< ADC */ - NVIC_CAN1_TX = 19, /**< CAN1 TX */ - NVIC_CAN1_RX0 = 20, /**< CAN1 RX0 */ - NVIC_CAN1_RX1 = 21, /**< CAN1 RX1 */ - NVIC_CAN1_SCE = 22, /**< CAN1 SCE */ - NVIC_EXTI_9_5 = 23, /**< EXTI lines [9:5] */ - NVIC_TIMER1_BRK_TIMER9 = 24, /**< Timer 1 break and timer 9 */ - NVIC_TIMER1_UP_TIMER10 = 25, /**< Timer 1 update and timer 10 */ - NVIC_TIMER1_TRG_COM_TIMER11 = 26, /**< Timer 1 trigger and commutation and - timer 11.*/ - NVIC_TIMER1_CC = 27, /**< Timer 1 capture and compare */ - NVIC_TIMER2 = 28, /**< Timer 2 */ - NVIC_TIMER3 = 29, /**< Timer 3 */ - NVIC_TIMER4 = 30, /**< Timer 4 */ - NVIC_I2C1_EV = 31, /**< I2C1 event */ - NVIC_I2C1_ER = 32, /**< I2C2 error */ - NVIC_I2C2_EV = 33, /**< I2C2 event */ - NVIC_I2C2_ER = 34, /**< I2C2 error */ - NVIC_SPI1 = 35, /**< SPI1 */ - NVIC_SPI2 = 36, /**< SPI2 */ - NVIC_USART1 = 37, /**< USART1 */ - NVIC_USART2 = 38, /**< USART2 */ - NVIC_USART3 = 39, /**< USART3 */ - NVIC_EXTI_15_10 = 40, /**< EXTI lines [15:10] */ - NVIC_RTCALARM = 41, /**< RTC alarms A and B through EXTI */ - NVIC_OTG_FS_WKUP = 42, /**< USB on-the-go full-speed wakeup - through EXTI*/ - NVIC_TIMER8_BRK_TIMER12 = 43, /**< Timer 8 break and timer 12 */ - NVIC_TIMER8_UP_TIMER13 = 44, /**< Timer 8 update and timer 13 */ - NVIC_TIMER8_TRG_COM_TIMER14 = 45, /**< Timer 8 trigger and commutation and - timer 14 */ - NVIC_TIMER8_CC = 46, /**< Timer 8 capture and compare */ - NVIC_DMA1_STREAM7 = 47, /**< DMA1 stream 7 */ - NVIC_FSMC = 48, /**< FSMC */ - NVIC_SDIO = 49, /**< SDIO */ - NVIC_TIMER5 = 50, /**< Timer 5 */ - NVIC_SPI3 = 51, /**< SPI3 */ - NVIC_UART4 = 52, /**< UART4 */ - NVIC_UART5 = 53, /**< UART5 */ - NVIC_TIMER6_DAC = 54, /**< Timer 6 and DAC underrun */ - NVIC_TIMER7 = 55, /**< Timer 7 */ - NVIC_DMA2_STREAM0 = 56, /**< DMA2 stream 0 */ - NVIC_DMA2_STREAM1 = 57, /**< DMA2 stream 1 */ - NVIC_DMA2_STREAM2 = 58, /**< DMA2 stream 2 */ - NVIC_DMA2_STREAM3 = 59, /**< DMA2 stream 3 */ - NVIC_DMA2_STREAM4 = 60, /**< DMA2 stream 4 */ - NVIC_ETH = 61, /**< Ethernet */ - NVIC_ETH_WKUP = 62, /**< Ethernet wakeup through EXTI */ - NVIC_CAN2_TX = 63, /**< CAN2 TX */ - NVIC_CAN2_RX0 = 64, /**< CAN2 RX0 */ - NVIC_CAN2_RX1 = 65, /**< CAN2 RX1 */ - NVIC_CAN2_SCE = 66, /**< CAN2 SCE */ - NVIC_OTG_FS = 67, /**< USB on-the-go full-speed */ - NVIC_DMA2_STREAM5 = 68, /**< DMA2 stream 5 */ - NVIC_DMA2_STREAM6 = 69, /**< DMA2 stream 6 */ - NVIC_DMA2_STREAM7 = 70, /**< DMA2 stream 7 */ - NVIC_USART6 = 71, /**< USART6 */ - NVIC_I2C3_EV = 72, /**< I2C3 event */ - NVIC_I2C3_ER = 73, /**< I2C3 error */ - NVIC_OTG_HS_EP1_OUT = 74, /**< USB on-the-go high-speed - endpoint 1 OUT */ - NVIC_OTG_HS_EP1_IN = 75, /**< USB on-the-go high-speed - endpoint 1 IN */ - NVIC_OTG_HS_WKUP = 76, /**< USB on-the-go high-speed wakeup - through EXTI*/ - NVIC_OTG_HS = 77, /**< USB on-the-go high-speed */ - NVIC_DCMI = 78, /**< DCMI */ - NVIC_CRYP = 79, /**< Cryptographic processor */ - NVIC_HASH_RNG = 80, /**< Hash and random number - generation */ - - /* Fake enumerator values, for compatiblity with F1. - * TODO decide if this is actually a good idea. */ - NVIC_TIMER6 = NVIC_TIMER6_DAC, /**< For compatibility with STM32F1. */ -} nvic_irq_num; - -static inline void nvic_irq_disable_all(void) { - NVIC_BASE->ICER[0] = 0xFFFFFFFF; - NVIC_BASE->ICER[1] = 0xFFFFFFFF; - NVIC_BASE->ICER[2] = 0xFFFFFFFF; -} - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/STM32F1/system/libmaple/stm32f2/include/series/pwr.h b/STM32F1/system/libmaple/stm32f2/include/series/pwr.h deleted file mode 100644 index 96353a4..0000000 --- a/STM32F1/system/libmaple/stm32f2/include/series/pwr.h +++ /dev/null @@ -1,73 +0,0 @@ -/****************************************************************************** - * The MIT License - * - * Copyright (c) 2012 LeafLabs, LLC. - * - * Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, copy, - * modify, merge, publish, distribute, sublicense, and/or sell copies - * of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS - * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN - * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - *****************************************************************************/ - -/** - * @file libmaple/stm32f2/include/series/pwr.h - * @author Marti Bolivar - * @brief STM32F2 Power control (PWR) support. - */ - -#ifndef _LIBMAPLE_STM32F2_PWR_H_ -#define _LIBMAPLE_STM32F2_PWR_H_ - -/* - * Additional register bits - */ - -/* Control register */ - -/** - * @brief Flash power down in stop mode bit. - * Availability: STM32F2 */ -#define PWR_CR_FPDS_BIT 9 -/** - * @brief Flash power down in stop mode. - * Availability: STM32F2 */ -#define PWR_CR_FPDS (1U << PWR_CR_FPDS_BIT) - -/* PVD level selection */ -#define PWR_CR_PLS_2_0V (0x0 << 5) -#define PWR_CR_PLS_2_1V (0x1 << 5) -#define PWR_CR_PLS_2_3V (0x2 << 5) -#define PWR_CR_PLS_2_5V (0x3 << 5) -#define PWR_CR_PLS_2_6V (0x4 << 5) -#define PWR_CR_PLS_2_7V (0x5 << 5) -#define PWR_CR_PLS_2_8V (0x6 << 5) -#define PWR_CR_PLS_2_9V (0x7 << 5) - -/* Control/Status register */ - -/** Backup regulator enable bit. */ -#define PWR_CSR_BRE_BIT 9 -/** Backup regulator ready bit. */ -#define PWR_CSR_BRR_BIT 3 - -/** Backup regulator enable. */ -#define PWR_CSR_BRE (1U << PWR_CSR_BRE_BIT) -/** Backup regulator ready. */ -#define PWR_CSR_BRR (1U << PWR_CSR_BRR_BIT) - -#endif diff --git a/STM32F1/system/libmaple/stm32f2/include/series/rcc.h b/STM32F1/system/libmaple/stm32f2/include/series/rcc.h deleted file mode 100644 index 441a5a8..0000000 --- a/STM32F1/system/libmaple/stm32f2/include/series/rcc.h +++ /dev/null @@ -1,951 +0,0 @@ -/****************************************************************************** - * The MIT License - * - * Copyright (c) 2011 LeafLabs, LLC. - * - * Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, copy, - * modify, merge, publish, distribute, sublicense, and/or sell copies - * of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS - * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN - * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - *****************************************************************************/ - -/** - * @file libmaple/stm32f2/include/series/rcc.h - * @brief STM32F2 reset and clock control (RCC) support. - */ - -#ifndef _LIBMAPLE_STM32F2_RCC_H_ -#define _LIBMAPLE_STM32F2_RCC_H_ - -#ifdef __cplusplus -extern "C"{ -#endif - -#include - -/* - * Register map - */ - -/** STM32F2 RCC register map type */ -typedef struct rcc_reg_map { - __io uint32 CR; /**< Clock control register */ - __io uint32 PLLCFGR; /**< PLL configuration register */ - __io uint32 CFGR; /**< Clock configuration register */ - __io uint32 CIR; /**< Clock interrupt register */ - __io uint32 AHB1RSTR; /**< AHB1 peripheral reset register */ - __io uint32 AHB2RSTR; /**< AHB2 peripheral reset register */ - __io uint32 AHB3RSTR; /**< AHB3 peripheral reset register */ - const uint32 RESERVED1; /**< Reserved */ - __io uint32 APB1RSTR; /**< APB1 peripheral reset register */ - __io uint32 APB2RSTR; /**< APB2 peripheral reset register */ - const uint32 RESERVED2; /**< Reserved */ - const uint32 RESERVED3; /**< Reserved */ - __io uint32 AHB1ENR; /**< AHB1 peripheral clock enable register */ - __io uint32 AHB2ENR; /**< AHB2 peripheral clock enable register */ - __io uint32 AHB3ENR; /**< AHB3 peripheral clock enable register */ - const uint32 RESERVED4; /**< Reserved */ - __io uint32 APB1ENR; /**< APB1 peripheral clock enable register */ - __io uint32 APB2ENR; /**< APB2 peripheral clock enable register */ - const uint32 RESERVED5; /**< Reserved */ - const uint32 RESERVED6; /**< Reserved */ - __io uint32 AHB1LPENR; /**< AHB1 peripheral clock enable in - low power mode register */ - __io uint32 AHB2LPENR; /**< AHB2 peripheral clock enable in - low power mode register */ - __io uint32 AHB3LPENR; /**< AHB3 peripheral clock enable in - low power mode register */ - const uint32 RESERVED7; /**< Reserved */ - __io uint32 APB1LPENR; /**< APB1 peripheral clock enable in - low power mode register */ - __io uint32 APB2LPENR; /**< APB2 peripheral clock enable in - low power mode register */ - const uint32 RESERVED8; /**< Reserved */ - const uint32 RESERVED9; /**< Reserved */ - __io uint32 BDCR; /**< Backup domain control register */ - __io uint32 CSR; /**< Clock control and status register */ - const uint32 RESERVED10; /**< Reserved */ - const uint32 RESERVED11; /**< Reserved */ - __io uint32 SSCGR; /**< Spread spectrum clock generation - register */ - __io uint32 PLLI2SCFGR; /**< PLLI2S configuration register */ -} rcc_reg_map; - -#define RCC_BASE ((struct rcc_reg_map*)0x40023800) - -/* - * Register bit definitions - */ - -/* Clock control register */ - -#define RCC_CR_PLLI2SRDY_BIT 27 -#define RCC_CR_PLLI2SON_BIT 26 -#define RCC_CR_PLLRDY_BIT 25 -#define RCC_CR_PLLON_BIT 24 -#define RCC_CR_CSSON_BIT 19 -#define RCC_CR_HSEBYP_BIT 18 -#define RCC_CR_HSERDY_BIT 17 -#define RCC_CR_HSEON_BIT 16 -#define RCC_CR_HSIRDY_BIT 1 -#define RCC_CR_HSION_BIT 0 - -#define RCC_CR_PLLI2SRDY (1U << RCC_CR_PLLI2SRDY_BIT) -#define RCC_CR_PLLI2SON (1U << RCC_CR_PLLI2SON_BIT) -#define RCC_CR_PLLRDY (1U << RCC_CR_PLLRDY_BIT) -#define RCC_CR_PLLON (1U << RCC_CR_PLLON_BIT) -#define RCC_CR_CSSON (1U << RCC_CR_CSSON_BIT) -#define RCC_CR_HSEBYP (1U << RCC_CR_HSEBYP_BIT) -#define RCC_CR_HSERDY (1U << RCC_CR_HSERDY_BIT) -#define RCC_CR_HSEON (1U << RCC_CR_HSEON_BIT) -#define RCC_CR_HSICAL (0xFF << 8) -#define RCC_CR_HSITRIM (0x1F << 3) -#define RCC_CR_HSIRDY (1U << RCC_CR_HSIRDY_BIT) -#define RCC_CR_HSION (1U << RCC_CR_HSION_BIT) - -/* PLL configuration register */ - -#define RCC_PLLCFGR_PLLSRC_BIT 22 - -#define RCC_PLLCFGR_PLLQ (0xF << 24) -#define RCC_PLLCFGR_PLLSRC (1U << RCC_PLLCFGR_PLLSRC_BIT) -#define RCC_PLLCFGR_PLLSRC_HSI (0x0 << RCC_PLLCFGR_PLLSRC_BIT) -#define RCC_PLLCFGR_PLLSRC_HSE (0x1 << RCC_PLLCFGR_PLLSRC_BIT) -#define RCC_PLLCFGR_PLLP (0x3 << 16) -#define RCC_PLLCFGR_PLLN (0x1FF << 6) -#define RCC_PLLCFGR_PLLM 0x1F - -/* Clock configuration register */ - -#define RCC_CFGR_I2SSRC_BIT 23 - -#define RCC_CFGR_MCO2 (0x3 << 30) -#define RCC_CFGR_MCO2_SYSCLK (0x0 << 30) -#define RCC_CFGR_MCO2_PLLI2S (0x1 << 30) -#define RCC_CFGR_MCO2_HSE (0x2 << 30) -#define RCC_CFGR_MCO2_PLL (0x3 << 30) - -#define RCC_CFGR_MCO2PRE (0x7 << 27) -#define RCC_CFGR_MCO2PRE_DIV_1 (0x0 << 27) -#define RCC_CFGR_MCO2PRE_DIV_2 (0x4 << 27) -#define RCC_CFGR_MCO2PRE_DIV_3 (0x5 << 27) -#define RCC_CFGR_MCO2PRE_DIV_4 (0x6 << 27) -#define RCC_CFGR_MCO2PRE_DIV_5 (0x7 << 27) - -#define RCC_CFGR_MCO1PRE (0x7 << 24) -#define RCC_CFGR_MCO1PRE_DIV_1 (0x0 << 24) -#define RCC_CFGR_MCO1PRE_DIV_2 (0x4 << 24) -#define RCC_CFGR_MCO1PRE_DIV_3 (0x5 << 24) -#define RCC_CFGR_MCO1PRE_DIV_4 (0x6 << 24) -#define RCC_CFGR_MCO1PRE_DIV_5 (0x7 << 24) - -#define RCC_CFGR_I2SSRC (1U << RCC_CFGR_I2SSRC_BIT) -#define RCC_CFGR_I2SSRC_PLLI2S (0 << RCC_CFGR_I2SSRC_BIT) -#define RCC_CFGR_I2SSRC_I2S_CKIN (1 << RCC_CFGR_I2SSRC_BIT) - -#define RCC_CFGR_MCO1 (0x3 << 21) -#define RCC_CFGR_MCO1_HSI (0x0 << 21) -#define RCC_CFGR_MCO1_LSE (0x1 << 21) -#define RCC_CFGR_MCO1_HSE (0x2 << 21) -#define RCC_CFGR_MCO1_PLL (0x3 << 21) - -#define RCC_CFGR_RTCPRE (0x1F << 16) - -/* Skipped: all the 0b0xx values meaning "not divided" */ -#define RCC_CFGR_PPRE2 (0x7 << 13) -#define RCC_CFGR_PPRE2_AHB_DIV_2 (0x4 << 13) -#define RCC_CFGR_PPRE2_AHB_DIV_4 (0x5 << 13) -#define RCC_CFGR_PPRE2_AHB_DIV_8 (0x6 << 13) -#define RCC_CFGR_PPRE2_AHB_DIV_16 (0x7 << 13) - -/* Skipped: all the 0b0xx values meaning "not divided" */ -#define RCC_CFGR_PPRE1 (0x7 << 10) -#define RCC_CFGR_PPRE1_AHB_DIV_2 (0x4 << 10) -#define RCC_CFGR_PPRE1_AHB_DIV_4 (0x5 << 10) -#define RCC_CFGR_PPRE1_AHB_DIV_8 (0x6 << 10) -#define RCC_CFGR_PPRE1_AHB_DIV_16 (0x7 << 10) - -/* Skipped: all the 0b0xxx values meaning "not divided" */ -#define RCC_CFGR_HPRE (0xF << 4) -#define RCC_CFGR_HPRE_SYSCLK_DIV_2 (0x8 << 4) -#define RCC_CFGR_HPRE_SYSCLK_DIV_4 (0x9 << 4) -#define RCC_CFGR_HPRE_SYSCLK_DIV_8 (0xA << 4) -#define RCC_CFGR_HPRE_SYSCLK_DIV_16 (0xB << 4) -#define RCC_CFGR_HPRE_SYSCLK_DIV_64 (0xC << 4) -#define RCC_CFGR_HPRE_SYSCLK_DIV_128 (0xD << 4) -#define RCC_CFGR_HPRE_SYSCLK_DIV_256 (0xE << 4) -#define RCC_CFGR_HPRE_SYSCLK_DIV_512 (0xF << 4) - -#define RCC_CFGR_SWS (0x3 << 2) -#define RCC_CFGR_SWS_HSI (0x0 << 2) -#define RCC_CFGR_SWS_HSE (0x1 << 2) -#define RCC_CFGR_SWS_PLL (0x2 << 2) - -#define RCC_CFGR_SW 0x3 -#define RCC_CFGR_SW_HSI 0x0 -#define RCC_CFGR_SW_HSE 0x1 -#define RCC_CFGR_SW_PLL 0x2 - -/* Clock interrupt register */ - -#define RCC_CIR_CSSC_BIT 23 - -#define RCC_CIR_PLLI2SRDYC_BIT 21 -#define RCC_CIR_PLLRDYC_BIT 20 -#define RCC_CIR_HSERDYC_BIT 19 -#define RCC_CIR_HSIRDYC_BIT 18 -#define RCC_CIR_LSERDYC_BIT 17 -#define RCC_CIR_LSIRDYC_BIT 16 - -#define RCC_CIR_PLLI2SRDYIE_BIT 13 -#define RCC_CIR_PLLRDYIE_BIT 12 -#define RCC_CIR_HSERDYIE_BIT 11 -#define RCC_CIR_HSIRDYIE_BIT 10 -#define RCC_CIR_LSERDYIE_BIT 9 -#define RCC_CIR_LSIRDYIE_BIT 8 - -#define RCC_CIR_CSSF_BIT 7 - -#define RCC_CIR_PLLI2SRDYF_BIT 5 -#define RCC_CIR_PLLRDYF_BIT 4 -#define RCC_CIR_HSERDYF_BIT 3 -#define RCC_CIR_HSIRDYF_BIT 2 -#define RCC_CIR_LSERDYF_BIT 1 -#define RCC_CIR_LSIRDYF_BIT 0 - -#define RCC_CIR_CSSC (1U << RCC_CIR_CSSC_BIT) - -#define RCC_CIR_PLLI2SRDYC (1U << RCC_CIR_PLLI2SRDYC_BIT) -#define RCC_CIR_PLLRDYC (1U << RCC_CIR_PLLRDYC_BIT) -#define RCC_CIR_HSERDYC (1U << RCC_CIR_HSERDYC_BIT) -#define RCC_CIR_HSIRDYC (1U << RCC_CIR_HSIRDYC_BIT) -#define RCC_CIR_LSERDYC (1U << RCC_CIR_LSERDYC_BIT) -#define RCC_CIR_LSIRDYC (1U << RCC_CIR_LSIRDYC_BIT) - -#define RCC_CIR_PLLI2SRDYIE (1U << RCC_CIR_PLLI2SRDYIE_BIT) -#define RCC_CIR_PLLRDYIE (1U << RCC_CIR_PLLRDYIE_BIT) -#define RCC_CIR_HSERDYIE (1U << RCC_CIR_HSERDYIE_BIT) -#define RCC_CIR_HSIRDYIE (1U << RCC_CIR_HSIRDYIE_BIT) -#define RCC_CIR_LSERDYIE (1U << RCC_CIR_LSERDYIE_BIT) -#define RCC_CIR_LSIRDYIE (1U << RCC_CIR_LSIRDYIE_BIT) - -#define RCC_CIR_CSSF (1U << RCC_CIR_CSSF_BIT) - -#define RCC_CIR_PLLI2SRDYF (1U << RCC_CIR_PLLI2SRDYF_BIT) -#define RCC_CIR_PLLRDYF (1U << RCC_CIR_PLLRDYF_BIT) -#define RCC_CIR_HSERDYF (1U << RCC_CIR_HSERDYF_BIT) -#define RCC_CIR_HSIRDYF (1U << RCC_CIR_HSIRDYF_BIT) -#define RCC_CIR_LSERDYF (1U << RCC_CIR_LSERDYF_BIT) -#define RCC_CIR_LSIRDYF (1U << RCC_CIR_LSIRDYF_BIT) - -/* AHB1 peripheral reset register */ - -#define RCC_AHB1RSTR_OTGHSRST_BIT 29 -#define RCC_AHB1RSTR_ETHMACRST_BIT 25 -#define RCC_AHB1RSTR_DMA2RST_BIT 22 -#define RCC_AHB1RSTR_DMA1RST_BIT 21 -#define RCC_AHB1RSTR_CRCRST_BIT 12 -#define RCC_AHB1RSTR_GPIOIRST_BIT 8 -#define RCC_AHB1RSTR_GPIOHRST_BIT 7 -#define RCC_AHB1RSTR_GPIOGRST_BIT 6 -#define RCC_AHB1RSTR_GPIOFRST_BIT 5 -#define RCC_AHB1RSTR_GPIOERST_BIT 4 -#define RCC_AHB1RSTR_GPIODRST_BIT 3 -#define RCC_AHB1RSTR_GPIOCRST_BIT 2 -#define RCC_AHB1RSTR_GPIOBRST_BIT 1 -#define RCC_AHB1RSTR_GPIOARST_BIT 0 - -#define RCC_AHB1RSTR_OTGHSRST (1U << RCC_AHB1RSTR_OTGHSRST_BIT) -#define RCC_AHB1RSTR_ETHMACRST (1U << RCC_AHB1RSTR_ETHMACRST_BIT) -#define RCC_AHB1RSTR_DMA2RST (1U << RCC_AHB1RSTR_DMA2RST_BIT) -#define RCC_AHB1RSTR_DMA1RST (1U << RCC_AHB1RSTR_DMA1RST_BIT) -#define RCC_AHB1RSTR_CRCRST (1U << RCC_AHB1RSTR_CRCRST_BIT) -#define RCC_AHB1RSTR_GPIOIRST (1U << RCC_AHB1RSTR_GPIOIRST_BIT) -#define RCC_AHB1RSTR_GPIOHRST (1U << RCC_AHB1RSTR_GPIOHRST_BIT) -#define RCC_AHB1RSTR_GPIOGRST (1U << RCC_AHB1RSTR_GPIOGRST_BIT) -#define RCC_AHB1RSTR_GPIOFRST (1U << RCC_AHB1RSTR_GPIOFRST_BIT) -#define RCC_AHB1RSTR_GPIOERST (1U << RCC_AHB1RSTR_GPIOERST_BIT) -#define RCC_AHB1RSTR_GPIODRST (1U << RCC_AHB1RSTR_GPIODRST_BIT) -#define RCC_AHB1RSTR_GPIOCRST (1U << RCC_AHB1RSTR_GPIOCRST_BIT) -#define RCC_AHB1RSTR_GPIOBRST (1U << RCC_AHB1RSTR_GPIOBRST_BIT) -#define RCC_AHB1RSTR_GPIOARST (1U << RCC_AHB1RSTR_GPIOARST_BIT) - -/* AHB2 peripheral reset register */ - -#define RCC_AHB2RSTR_OTGFSRST_BIT 7 -#define RCC_AHB2RSTR_RNGRST_BIT 6 -#define RCC_AHB2RSTR_HASHRST_BIT 5 -#define RCC_AHB2RSTR_CRYPRST_BIT 4 -#define RCC_AHB2RSTR_DCMIRST_BIT 0 - -#define RCC_AHB2RSTR_OTGFSRST (1U << RCC_AHB2RSTR_OTGFSRST_BIT) -#define RCC_AHB2RSTR_RNGRST (1U << RCC_AHB2RSTR_RNGRST_BIT) -#define RCC_AHB2RSTR_HASHRST (1U << RCC_AHB2RSTR_HASHRST_BIT) -#define RCC_AHB2RSTR_CRYPRST (1U << RCC_AHB2RSTR_CRYPRST_BIT) -#define RCC_AHB2RSTR_DCMIRST (1U << RCC_AHB2RSTR_DCMIRST_BIT) - -/* AHB3 peripheral reset register */ - -#define RCC_AHB3RSTR_FSMCRST_BIT 0 - -#define RCC_AHB3RSTR_FSMCRST (1U << RCC_AHB3RSTR_FSMCRST_BIT) - -/* APB1 peripheral reset register */ - -#define RCC_APB1RSTR_DACRST_BIT 29 -#define RCC_APB1RSTR_PWRRST_BIT 28 -#define RCC_APB1RSTR_CAN2RST_BIT 26 -#define RCC_APB1RSTR_CAN1RST_BIT 25 -#define RCC_APB1RSTR_I2C3RST_BIT 23 -#define RCC_APB1RSTR_I2C2RST_BIT 22 -#define RCC_APB1RSTR_I2C1RST_BIT 21 -#define RCC_APB1RSTR_UART5RST_BIT 20 -#define RCC_APB1RSTR_UART4RST_BIT 19 -#define RCC_APB1RSTR_UART3RST_BIT 18 -#define RCC_APB1RSTR_UART2RST_BIT 17 -#define RCC_APB1RSTR_SPI3RST_BIT 15 -#define RCC_APB1RSTR_SPI2RST_BIT 14 -#define RCC_APB1RSTR_WWDGRST_BIT 11 -#define RCC_APB1RSTR_TIM14RST_BIT 8 -#define RCC_APB1RSTR_TIM13RST_BIT 7 -#define RCC_APB1RSTR_TIM12RST_BIT 6 -#define RCC_APB1RSTR_TIM7RST_BIT 5 -#define RCC_APB1RSTR_TIM6RST_BIT 4 -#define RCC_APB1RSTR_TIM5RST_BIT 3 -#define RCC_APB1RSTR_TIM4RST_BIT 2 -#define RCC_APB1RSTR_TIM3RST_BIT 1 -#define RCC_APB1RSTR_TIM2RST_BIT 0 - -#define RCC_APB1RSTR_DACRST (1U << RCC_APB1RSTR_DACRST_BIT) -#define RCC_APB1RSTR_PWRRST (1U << RCC_APB1RSTR_PWRRST_BIT) -#define RCC_APB1RSTR_CAN2RST (1U << RCC_APB1RSTR_CAN2RST_BIT) -#define RCC_APB1RSTR_CAN1RST (1U << RCC_APB1RSTR_CAN1RST_BIT) -#define RCC_APB1RSTR_I2C3RST (1U << RCC_APB1RSTR_I2C3RST_BIT) -#define RCC_APB1RSTR_I2C2RST (1U << RCC_APB1RSTR_I2C2RST_BIT) -#define RCC_APB1RSTR_I2C1RST (1U << RCC_APB1RSTR_I2C1RST_BIT) -#define RCC_APB1RSTR_UART5RST (1U << RCC_APB1RSTR_UART5RST_BIT) -#define RCC_APB1RSTR_UART4RST (1U << RCC_APB1RSTR_UART4RST_BIT) -#define RCC_APB1RSTR_UART3RST (1U << RCC_APB1RSTR_UART3RST_BIT) -#define RCC_APB1RSTR_UART2RST (1U << RCC_APB1RSTR_UART2RST_BIT) -#define RCC_APB1RSTR_SPI3RST (1U << RCC_APB1RSTR_SPI3RST_BIT) -#define RCC_APB1RSTR_SPI2RST (1U << RCC_APB1RSTR_SPI2RST_BIT) -#define RCC_APB1RSTR_WWDGRST (1U << RCC_APB1RSTR_WWDGRST_BIT) -#define RCC_APB1RSTR_TIM14RST (1U << RCC_APB1RSTR_TIM14RST_BIT) -#define RCC_APB1RSTR_TIM13RST (1U << RCC_APB1RSTR_TIM13RST_BIT) -#define RCC_APB1RSTR_TIM12RST (1U << RCC_APB1RSTR_TIM12RST_BIT) -#define RCC_APB1RSTR_TIM7RST (1U << RCC_APB1RSTR_TIM7RST_BIT) -#define RCC_APB1RSTR_TIM6RST (1U << RCC_APB1RSTR_TIM6RST_BIT) -#define RCC_APB1RSTR_TIM5RST (1U << RCC_APB1RSTR_TIM5RST_BIT) -#define RCC_APB1RSTR_TIM4RST (1U << RCC_APB1RSTR_TIM4RST_BIT) -#define RCC_APB1RSTR_TIM3RST (1U << RCC_APB1RSTR_TIM3RST_BIT) -#define RCC_APB1RSTR_TIM2RST (1U << RCC_APB1RSTR_TIM2RST_BIT) - -/* APB2 peripheral reset register */ - -#define RCC_APB2RSTR_TIM11RST_BIT 18 -#define RCC_APB2RSTR_TIM10RST_BIT 17 -#define RCC_APB2RSTR_TIM9RST_BIT 16 -#define RCC_APB2RSTR_SYSCFGRST_BIT 14 -#define RCC_APB2RSTR_SPI1RST_BIT 12 -#define RCC_APB2RSTR_SDIORST_BIT 11 -#define RCC_APB2RSTR_ADCRST_BIT 8 -#define RCC_APB2RSTR_USART6RST_BIT 5 -#define RCC_APB2RSTR_USART1RST_BIT 4 -#define RCC_APB2RSTR_TIM8RST_BIT 1 -#define RCC_APB2RSTR_TIM1RST_BIT 0 - -#define RCC_APB2RSTR_TIM11RST (1U << RCC_APB2RSTR_TIM11RST_BIT) -#define RCC_APB2RSTR_TIM10RST (1U << RCC_APB2RSTR_TIM10RST_BIT) -#define RCC_APB2RSTR_TIM9RST (1U << RCC_APB2RSTR_TIM9RST_BIT) -#define RCC_APB2RSTR_SYSCFGRST (1U << RCC_APB2RSTR_SYSCFGRST_BIT) -#define RCC_APB2RSTR_SPI1RST (1U << RCC_APB2RSTR_SPI1RST_BIT) -#define RCC_APB2RSTR_SDIORST (1U << RCC_APB2RSTR_SDIORST_BIT) -#define RCC_APB2RSTR_ADCRST (1U << RCC_APB2RSTR_ADCRST_BIT) -#define RCC_APB2RSTR_USART6RST (1U << RCC_APB2RSTR_USART6RST_BIT) -#define RCC_APB2RSTR_USART1RST (1U << RCC_APB2RSTR_USART1RST_BIT) -#define RCC_APB2RSTR_TIM8RST (1U << RCC_APB2RSTR_TIM8RST_BIT) -#define RCC_APB2RSTR_TIM1RST (1U << RCC_APB2RSTR_TIM1RST_BIT) - -/* AHB1 peripheral clock enable register */ - -#define RCC_AHB1ENR_OTGHSULPIEN_BIT 30 -#define RCC_AHB1ENR_OTGHSEN_BIT 29 -#define RCC_AHB1ENR_ETHMACPTPEN_BIT 28 -#define RCC_AHB1ENR_ETHMACRXEN_BIT 27 -#define RCC_AHB1ENR_ETHMACTXEN_BIT 26 -#define RCC_AHB1ENR_ETHMACEN_BIT 25 -#define RCC_AHB1ENR_DMA2EN_BIT 22 -#define RCC_AHB1ENR_DMA1EN_BIT 21 -#define RCC_AHB1ENR_BKPSRAMEN_BIT 18 -#define RCC_AHB1ENR_CRCEN_BIT 12 -#define RCC_AHB1ENR_GPIOIEN_BIT 8 -#define RCC_AHB1ENR_GPIOHEN_BIT 7 -#define RCC_AHB1ENR_GPIOGEN_BIT 6 -#define RCC_AHB1ENR_GPIOFEN_BIT 5 -#define RCC_AHB1ENR_GPIOEEN_BIT 4 -#define RCC_AHB1ENR_GPIODEN_BIT 3 -#define RCC_AHB1ENR_GPIOCEN_BIT 2 -#define RCC_AHB1ENR_GPIOBEN_BIT 1 -#define RCC_AHB1ENR_GPIOAEN_BIT 0 - -#define RCC_AHB1ENR_OTGHSULPIEN (1U << RCC_AHB1ENR_OTGHSULPIEN_BIT) -#define RCC_AHB1ENR_OTGHSEN (1U << RCC_AHB1ENR_OTGHSEN_BIT) -#define RCC_AHB1ENR_ETHMACPTPEN (1U << RCC_AHB1ENR_ETHMACPTPEN_BIT) -#define RCC_AHB1ENR_ETHMACRXEN (1U << RCC_AHB1ENR_ETHMACRXEN_BIT) -#define RCC_AHB1ENR_ETHMACTXEN (1U << RCC_AHB1ENR_ETHMACTXEN_BIT) -#define RCC_AHB1ENR_ETHMACEN (1U << RCC_AHB1ENR_ETHMACEN_BIT) -#define RCC_AHB1ENR_DMA2EN (1U << RCC_AHB1ENR_DMA2EN_BIT) -#define RCC_AHB1ENR_DMA1EN (1U << RCC_AHB1ENR_DMA1EN_BIT) -#define RCC_AHB1ENR_BKPSRAMEN (1U << RCC_AHB1ENR_BKPSRAMEN_BIT) -#define RCC_AHB1ENR_CRCEN (1U << RCC_AHB1ENR_CRCEN_BIT) -#define RCC_AHB1ENR_GPIOIEN (1U << RCC_AHB1ENR_GPIOIEN_BIT) -#define RCC_AHB1ENR_GPIOHEN (1U << RCC_AHB1ENR_GPIOHEN_BIT) -#define RCC_AHB1ENR_GPIOGEN (1U << RCC_AHB1ENR_GPIOGEN_BIT) -#define RCC_AHB1ENR_GPIOFEN (1U << RCC_AHB1ENR_GPIOFEN_BIT) -#define RCC_AHB1ENR_GPIOEEN (1U << RCC_AHB1ENR_GPIOEEN_BIT) -#define RCC_AHB1ENR_GPIODEN (1U << RCC_AHB1ENR_GPIODEN_BIT) -#define RCC_AHB1ENR_GPIOCEN (1U << RCC_AHB1ENR_GPIOCEN_BIT) -#define RCC_AHB1ENR_GPIOBEN (1U << RCC_AHB1ENR_GPIOBEN_BIT) -#define RCC_AHB1ENR_GPIOAEN (1U << RCC_AHB1ENR_GPIOAEN_BIT) - -/* AHB2 peripheral clock enable register */ - -#define RCC_AHB2ENR_OTGFSEN_BIT 7 -#define RCC_AHB2ENR_RNGEN_BIT 6 -#define RCC_AHB2ENR_HASHEN_BIT 5 -#define RCC_AHB2ENR_CRYPEN_BIT 4 -#define RCC_AHB2ENR_DCMIEN_BIT 0 - -#define RCC_AHB2ENR_OTGFSEN (1U << RCC_AHB2ENR_OTGFSEN_BIT) -#define RCC_AHB2ENR_RNGEN (1U << RCC_AHB2ENR_RNGEN_BIT) -#define RCC_AHB2ENR_HASHEN (1U << RCC_AHB2ENR_HASHEN_BIT) -#define RCC_AHB2ENR_CRYPEN (1U << RCC_AHB2ENR_CRYPEN_BIT) -#define RCC_AHB2ENR_DCMIEN (1U << RCC_AHB2ENR_DCMIEN_BIT) - -/* AHB3 peripheral clock enable register */ - -#define RCC_AHB3ENR_FSMCEN_BIT 0 - -#define RCC_AHB3ENR_FSMCEN (1U << RCC_AHB3ENR_FSMCEN_BIT) - -/* APB1 peripheral clock enable register */ - -#define RCC_APB1ENR_DACEN_BIT 29 -#define RCC_APB1ENR_PWREN_BIT 28 -#define RCC_APB1ENR_CAN2EN_BIT 26 -#define RCC_APB1ENR_CAN1EN_BIT 25 -#define RCC_APB1ENR_I2C3EN_BIT 23 -#define RCC_APB1ENR_I2C2EN_BIT 22 -#define RCC_APB1ENR_I2C1EN_BIT 21 -#define RCC_APB1ENR_UART5EN_BIT 20 -#define RCC_APB1ENR_UART4EN_BIT 19 -#define RCC_APB1ENR_USART3EN_BIT 18 -#define RCC_APB1ENR_USART2EN_BIT 17 -#define RCC_APB1ENR_SPI3EN_BIT 15 -#define RCC_APB1ENR_SPI2EN_BIT 14 -#define RCC_APB1ENR_WWDGEN_BIT 11 -#define RCC_APB1ENR_TIM14EN_BIT 8 -#define RCC_APB1ENR_TIM13EN_BIT 7 -#define RCC_APB1ENR_TIM12EN_BIT 6 -#define RCC_APB1ENR_TIM7EN_BIT 5 -#define RCC_APB1ENR_TIM6EN_BIT 4 -#define RCC_APB1ENR_TIM5EN_BIT 3 -#define RCC_APB1ENR_TIM4EN_BIT 2 -#define RCC_APB1ENR_TIM3EN_BIT 1 -#define RCC_APB1ENR_TIM2EN_BIT 0 - -#define RCC_APB1ENR_DACEN (1U << RCC_APB1ENR_DACEN_BIT) -#define RCC_APB1ENR_PWREN (1U << RCC_APB1ENR_PWREN_BIT) -#define RCC_APB1ENR_CAN2EN (1U << RCC_APB1ENR_CAN2EN_BIT) -#define RCC_APB1ENR_CAN1EN (1U << RCC_APB1ENR_CAN1EN_BIT) -#define RCC_APB1ENR_I2C3EN (1U << RCC_APB1ENR_I2C3EN_BIT) -#define RCC_APB1ENR_I2C2EN (1U << RCC_APB1ENR_I2C2EN_BIT) -#define RCC_APB1ENR_I2C1EN (1U << RCC_APB1ENR_I2C1EN_BIT) -#define RCC_APB1ENR_UART5EN (1U << RCC_APB1ENR_UART5EN_BIT) -#define RCC_APB1ENR_UART4EN (1U << RCC_APB1ENR_UART4EN_BIT) -#define RCC_APB1ENR_USART3EN (1U << RCC_APB1ENR_USART3EN_BIT) -#define RCC_APB1ENR_USART2EN (1U << RCC_APB1ENR_USART2EN_BIT) -#define RCC_APB1ENR_SPI3EN (1U << RCC_APB1ENR_SPI3EN_BIT) -#define RCC_APB1ENR_SPI2EN (1U << RCC_APB1ENR_SPI2EN_BIT) -#define RCC_APB1ENR_WWDGEN (1U << RCC_APB1ENR_WWDGEN_BIT) -#define RCC_APB1ENR_TIM14EN (1U << RCC_APB1ENR_TIM14EN_BIT) -#define RCC_APB1ENR_TIM13EN (1U << RCC_APB1ENR_TIM13EN_BIT) -#define RCC_APB1ENR_TIM12EN (1U << RCC_APB1ENR_TIM12EN_BIT) -#define RCC_APB1ENR_TIM7EN (1U << RCC_APB1ENR_TIM7EN_BIT) -#define RCC_APB1ENR_TIM6EN (1U << RCC_APB1ENR_TIM6EN_BIT) -#define RCC_APB1ENR_TIM5EN (1U << RCC_APB1ENR_TIM5EN_BIT) -#define RCC_APB1ENR_TIM4EN (1U << RCC_APB1ENR_TIM4EN_BIT) -#define RCC_APB1ENR_TIM3EN (1U << RCC_APB1ENR_TIM3EN_BIT) -#define RCC_APB1ENR_TIM2EN (1U << RCC_APB1ENR_TIM2EN_BIT) - -/* APB2 peripheral clock enable register */ - -#define RCC_APB2ENR_TIM11EN_BIT 18 -#define RCC_APB2ENR_TIM10EN_BIT 17 -#define RCC_APB2ENR_TIM9EN_BIT 16 -#define RCC_APB2ENR_SYSCFGEN_BIT 14 -#define RCC_APB2ENR_SPI1EN_BIT 12 -#define RCC_APB2ENR_SDIOEN_BIT 11 -#define RCC_APB2ENR_ADC3EN_BIT 10 -#define RCC_APB2ENR_ADC2EN_BIT 9 -#define RCC_APB2ENR_ADC1EN_BIT 8 -#define RCC_APB2ENR_USART6EN_BIT 5 -#define RCC_APB2ENR_USART1EN_BIT 4 -#define RCC_APB2ENR_TIM8EN_BIT 1 -#define RCC_APB2ENR_TIM1EN_BIT 0 - -#define RCC_APB2ENR_TIM11EN (1U << RCC_APB2ENR_TIM11EN_BIT) -#define RCC_APB2ENR_TIM10EN (1U << RCC_APB2ENR_TIM10EN_BIT) -#define RCC_APB2ENR_TIM9EN (1U << RCC_APB2ENR_TIM9EN_BIT) -#define RCC_APB2ENR_SYSCFGEN (1U << RCC_APB2ENR_SYSCFGEN_BIT) -#define RCC_APB2ENR_SPI1EN (1U << RCC_APB2ENR_SPI1EN_BIT) -#define RCC_APB2ENR_SDIOEN (1U << RCC_APB2ENR_SDIOEN_BIT) -#define RCC_APB2ENR_ADC3EN (1U << RCC_APB2ENR_ADC3EN_BIT) -#define RCC_APB2ENR_ADC2EN (1U << RCC_APB2ENR_ADC2EN_BIT) -#define RCC_APB2ENR_ADC1EN (1U << RCC_APB2ENR_ADC1EN_BIT) -#define RCC_APB2ENR_USART6EN (1U << RCC_APB2ENR_USART6EN_BIT) -#define RCC_APB2ENR_USART1EN (1U << RCC_APB2ENR_USART1EN_BIT) -#define RCC_APB2ENR_TIM8EN (1U << RCC_APB2ENR_TIM8EN_BIT) -#define RCC_APB2ENR_TIM1EN (1U << RCC_APB2ENR_TIM1EN_BIT) - -/* AHB1 peripheral clock enable in low power mode register */ - -#define RCC_AHB1LPENR_OTGHSULPILPEN_BIT 30 -#define RCC_AHB1LPENR_OTGHSLPEN_BIT 29 -#define RCC_AHB1LPENR_ETHMACPTPLPEN_BIT 28 -#define RCC_AHB1LPENR_ETHMACRXLPEN_BIT 27 -#define RCC_AHB1LPENR_ETHMACTXLPEN_BIT 26 -#define RCC_AHB1LPENR_ETHMACLPEN_BIT 25 -#define RCC_AHB1LPENR_DMA2LPEN_BIT 22 -#define RCC_AHB1LPENR_DMA1LPEN_BIT 21 -#define RCC_AHB1LPENR_BKPSRAMLPEN_BIT 18 -#define RCC_AHB1LPENR_SRAM2LPEN_BIT 17 -#define RCC_AHB1LPENR_SRAM1LPEN_BIT 16 -#define RCC_AHB1LPENR_FLITFLPEN_BIT 15 -#define RCC_AHB1LPENR_CRCLPEN_BIT 12 -#define RCC_AHB1LPENR_GPIOILPEN_BIT 8 -#define RCC_AHB1LPENR_GPIOGLPEN_BIT 6 -#define RCC_AHB1LPENR_GPIOFLPEN_BIT 5 -#define RCC_AHB1LPENR_GPIOELPEN_BIT 4 -#define RCC_AHB1LPENR_GPIODLPEN_BIT 3 -#define RCC_AHB1LPENR_GPIOCLPEN_BIT 2 -#define RCC_AHB1LPENR_GPIOBLPEN_BIT 1 -#define RCC_AHB1LPENR_GPIOALPEN_BIT 0 - -#define RCC_AHB1LPENR_OTGHSULPILPEN (1U << RCC_AHB1LPENR_OTGHSULPILPEN_BIT) -#define RCC_AHB1LPENR_OTGHSLPEN (1U << RCC_AHB1LPENR_OTGHSLPEN_BIT) -#define RCC_AHB1LPENR_ETHMACPTPLPEN (1U << RCC_AHB1LPENR_ETHMACPTPLPEN_BIT) -#define RCC_AHB1LPENR_ETHMACRXLPEN (1U << RCC_AHB1LPENR_ETHMACRXLPEN_BIT) -#define RCC_AHB1LPENR_ETHMACTXLPEN (1U << RCC_AHB1LPENR_ETHMACTXLPEN_BIT) -#define RCC_AHB1LPENR_ETHMACLPEN (1U << RCC_AHB1LPENR_ETHMACLPEN_BIT) -#define RCC_AHB1LPENR_DMA2LPEN (1U << RCC_AHB1LPENR_DMA2LPEN_BIT) -#define RCC_AHB1LPENR_DMA1LPEN (1U << RCC_AHB1LPENR_DMA1LPEN_BIT) -#define RCC_AHB1LPENR_BKPSRAMLPEN (1U << RCC_AHB1LPENR_BKPSRAMLPEN_BIT) -#define RCC_AHB1LPENR_SRAM2LPEN (1U << RCC_AHB1LPENR_SRAM2LPEN_BIT) -#define RCC_AHB1LPENR_SRAM1LPEN (1U << RCC_AHB1LPENR_SRAM1LPEN_BIT) -#define RCC_AHB1LPENR_FLITFLPEN (1U << RCC_AHB1LPENR_FLITFLPEN_BIT) -#define RCC_AHB1LPENR_CRCLPEN (1U << RCC_AHB1LPENR_CRCLPEN_BIT) -#define RCC_AHB1LPENR_GPIOILPEN (1U << RCC_AHB1LPENR_GPIOILPEN_BIT) -#define RCC_AHB1LPENR_GPIOGLPEN (1U << RCC_AHB1LPENR_GPIOGLPEN_BIT) -#define RCC_AHB1LPENR_GPIOFLPEN (1U << RCC_AHB1LPENR_GPIOFLPEN_BIT) -#define RCC_AHB1LPENR_GPIOELPEN (1U << RCC_AHB1LPENR_GPIOELPEN_BIT) -#define RCC_AHB1LPENR_GPIODLPEN (1U << RCC_AHB1LPENR_GPIODLPEN_BIT) -#define RCC_AHB1LPENR_GPIOCLPEN (1U << RCC_AHB1LPENR_GPIOCLPEN_BIT) -#define RCC_AHB1LPENR_GPIOBLPEN (1U << RCC_AHB1LPENR_GPIOBLPEN_BIT) -#define RCC_AHB1LPENR_GPIOALPEN (1U << RCC_AHB1LPENR_GPIOALPEN_BIT) - -/* AHB2 peripheral clock enable in low power mode register */ - -#define RCC_AHB2LPENR_OTGFSLPEN_BIT 7 -#define RCC_AHB2LPENR_RNGLPEN_BIT 6 -#define RCC_AHB2LPENR_HASHLPEN_BIT 5 -#define RCC_AHB2LPENR_CRYPLPEN_BIT 4 -#define RCC_AHB2LPENR_DCMILPEN_BIT 0 - -#define RCC_AHB2LPENR_OTGFSLPEN (1U << RCC_AHB2LPENR_OTGFSLPEN_BIT) -#define RCC_AHB2LPENR_RNGLPEN (1U << RCC_AHB2LPENR_RNGLPEN_BIT) -#define RCC_AHB2LPENR_HASHLPEN (1U << RCC_AHB2LPENR_HASHLPEN_BIT) -#define RCC_AHB2LPENR_CRYPLPEN (1U << RCC_AHB2LPENR_CRYPLPEN_BIT) -#define RCC_AHB2LPENR_DCMILPEN (1U << RCC_AHB2LPENR_DCMILPEN_BIT) - -/* AHB3 peripheral clock enable in low power mode register */ - -#define RCC_AHB3LPENR_FSMCLPEN_BIT 0 - -#define RCC_AHB3LPENR_FSMCLPEN (1U << RCC_AHB3LPENR_FSMCLPEN_BIT) - -/* APB1 peripheral clock enable in low power mode register */ - -#define RCC_APB1LPENR_DACLPEN_BIT 29 -#define RCC_APB1LPENR_PWRLPEN_BIT 28 -#define RCC_APB1LPENR_CAN2LPEN_BIT 26 -#define RCC_APB1LPENR_CAN1LPEN_BIT 25 -#define RCC_APB1LPENR_I2C3LPEN_BIT 23 -#define RCC_APB1LPENR_I2C2LPEN_BIT 22 -#define RCC_APB1LPENR_I2C1LPEN_BIT 21 -#define RCC_APB1LPENR_UART5LPEN_BIT 20 -#define RCC_APB1LPENR_UART4LPEN_BIT 19 -#define RCC_APB1LPENR_USART3LPEN_BIT 18 -#define RCC_APB1LPENR_USART2LPEN_BIT 17 -#define RCC_APB1LPENR_SPI3LPEN_BIT 15 -#define RCC_APB1LPENR_SPI2LPEN_BIT 14 -#define RCC_APB1LPENR_WWDGLPEN_BIT 11 -#define RCC_APB1LPENR_TIM14LPEN_BIT 8 -#define RCC_APB1LPENR_TIM13LPEN_BIT 7 -#define RCC_APB1LPENR_TIM12LPEN_BIT 6 -#define RCC_APB1LPENR_TIM7LPEN_BIT 5 -#define RCC_APB1LPENR_TIM6LPEN_BIT 4 -#define RCC_APB1LPENR_TIM5LPEN_BIT 3 -#define RCC_APB1LPENR_TIM4LPEN_BIT 2 -#define RCC_APB1LPENR_TIM3LPEN_BIT 1 -#define RCC_APB1LPENR_TIM2LPEN_BIT 0 - -#define RCC_APB1LPENR_DACLPEN (1U << RCC_APB1LPENR_DACLPEN_BIT) -#define RCC_APB1LPENR_PWRLPEN (1U << RCC_APB1LPENR_PWRLPEN_BIT) -#define RCC_APB1LPENR_CAN2LPEN (1U << RCC_APB1LPENR_CAN2LPEN_BIT) -#define RCC_APB1LPENR_CAN1LPEN (1U << RCC_APB1LPENR_CAN1LPEN_BIT) -#define RCC_APB1LPENR_I2C3LPEN (1U << RCC_APB1LPENR_I2C3LPEN_BIT) -#define RCC_APB1LPENR_I2C2LPEN (1U << RCC_APB1LPENR_I2C2LPEN_BIT) -#define RCC_APB1LPENR_I2C1LPEN (1U << RCC_APB1LPENR_I2C1LPEN_BIT) -#define RCC_APB1LPENR_UART5LPEN (1U << RCC_APB1LPENR_UART5LPEN_BIT) -#define RCC_APB1LPENR_UART4LPEN (1U << RCC_APB1LPENR_UART4LPEN_BIT) -#define RCC_APB1LPENR_USART3LPEN (1U << RCC_APB1LPENR_USART3LPEN_BIT) -#define RCC_APB1LPENR_USART2LPEN (1U << RCC_APB1LPENR_USART2LPEN_BIT) -#define RCC_APB1LPENR_SPI3LPEN (1U << RCC_APB1LPENR_SPI3LPEN_BIT) -#define RCC_APB1LPENR_SPI2LPEN (1U << RCC_APB1LPENR_SPI2LPEN_BIT) -#define RCC_APB1LPENR_WWDGLPEN (1U << RCC_APB1LPENR_WWDGLPEN_BIT) -#define RCC_APB1LPENR_TIM14LPEN (1U << RCC_APB1LPENR_TIM14LPEN_BIT) -#define RCC_APB1LPENR_TIM13LPEN (1U << RCC_APB1LPENR_TIM13LPEN_BIT) -#define RCC_APB1LPENR_TIM12LPEN (1U << RCC_APB1LPENR_TIM12LPEN_BIT) -#define RCC_APB1LPENR_TIM7LPEN (1U << RCC_APB1LPENR_TIM7LPEN_BIT) -#define RCC_APB1LPENR_TIM6LPEN (1U << RCC_APB1LPENR_TIM6LPEN_BIT) -#define RCC_APB1LPENR_TIM5LPEN (1U << RCC_APB1LPENR_TIM5LPEN_BIT) -#define RCC_APB1LPENR_TIM4LPEN (1U << RCC_APB1LPENR_TIM4LPEN_BIT) -#define RCC_APB1LPENR_TIM3LPEN (1U << RCC_APB1LPENR_TIM3LPEN_BIT) -#define RCC_APB1LPENR_TIM2LPEN (1U << RCC_APB1LPENR_TIM2LPEN_BIT) - -/* APB2 peripheral clock enable in low power mode register */ - -#define RCC_APB2LPENR_TIM11LPEN_BIT 18 -#define RCC_APB2LPENR_TIM10LPEN_BIT 17 -#define RCC_APB2LPENR_TIM9LPEN_BIT 16 -#define RCC_APB2LPENR_SYSCFGLPEN_BIT 14 -#define RCC_APB2LPENR_SPI1LPEN_BIT 12 -#define RCC_APB2LPENR_SDIOLPEN_BIT 11 -#define RCC_APB2LPENR_ADC3LPEN_BIT 10 -#define RCC_APB2LPENR_ADC2LPEN_BIT 9 -#define RCC_APB2LPENR_ADC1LPEN_BIT 8 -#define RCC_APB2LPENR_USART6LPEN_BIT 5 -#define RCC_APB2LPENR_USART1LPEN_BIT 4 -#define RCC_APB2LPENR_TIM8LPEN_BIT 1 -#define RCC_APB2LPENR_TIM1LPEN_BIT 0 - -#define RCC_APB2LPENR_TIM11LPEN (1U << RCC_APB2LPENR_TIM11LPEN_BIT) -#define RCC_APB2LPENR_TIM10LPEN (1U << RCC_APB2LPENR_TIM10LPEN_BIT) -#define RCC_APB2LPENR_TIM9LPEN (1U << RCC_APB2LPENR_TIM9LPEN_BIT) -#define RCC_APB2LPENR_SYSCFGLPEN (1U << RCC_APB2LPENR_SYSCFGLPEN_BIT) -#define RCC_APB2LPENR_SPI1LPEN (1U << RCC_APB2LPENR_SPI1LPEN_BIT) -#define RCC_APB2LPENR_SDIOLPEN (1U << RCC_APB2LPENR_SDIOLPEN_BIT) -#define RCC_APB2LPENR_ADC3LPEN (1U << RCC_APB2LPENR_ADC3LPEN_BIT) -#define RCC_APB2LPENR_ADC2LPEN (1U << RCC_APB2LPENR_ADC2LPEN_BIT) -#define RCC_APB2LPENR_ADC1LPEN (1U << RCC_APB2LPENR_ADC1LPEN_BIT) -#define RCC_APB2LPENR_USART6LPEN (1U << RCC_APB2LPENR_USART6LPEN_BIT) -#define RCC_APB2LPENR_USART1LPEN (1U << RCC_APB2LPENR_USART1LPEN_BIT) -#define RCC_APB2LPENR_TIM8LPEN (1U << RCC_APB2LPENR_TIM8LPEN_BIT) -#define RCC_APB2LPENR_TIM1LPEN (1U << RCC_APB2LPENR_TIM1LPEN_BIT) - -/* Backup domain control register */ - -#define RCC_BDCR_BDRST_BIT 16 -#define RCC_BDCR_RTCEN_BIT 15 -#define RCC_BDCR_LSEBYP_BIT 2 -#define RCC_BDCR_LSERDY_BIT 1 -#define RCC_BDCR_LSEON_BIT 0 - -#define RCC_BDCR_BDRST (1U << RCC_BDCR_BDRST_BIT) -#define RCC_BDCR_RTCEN (1U << RCC_BDCR_RTCEN_BIT) -#define RCC_BDCR_RTCSEL (0x3 << 8) -#define RCC_BDCR_RTCSEL_NOCLOCK (0x0 << 8) -#define RCC_BDCR_RTCSEL_LSE (0x1 << 8) -#define RCC_BDCR_RTCSEL_LSI (0x2 << 8) -#define RCC_BDCR_RTCSEL_HSE_DIV (0x3 << 8) -#define RCC_BDCR_LSEBYP (1U << RCC_BDCR_LSEBYP_BIT) -#define RCC_BDCR_LSERDY (1U << RCC_BDCR_LSERDY_BIT) -#define RCC_BDCR_LSEON (1U << RCC_BDCR_LSEON_BIT) - -/* Clock control and status register */ - -#define RCC_CSR_LPWRRSTF_BIT 31 -#define RCC_CSR_WWDGRSTF_BIT 30 -#define RCC_CSR_IWDGRSTF_BIT 29 -#define RCC_CSR_SFTRSTF_BIT 28 -#define RCC_CSR_PORRSTF_BIT 27 -#define RCC_CSR_PINRSTF_BIT 26 -#define RCC_CSR_BORRSTF_BIT 25 -#define RCC_CSR_RMVF_BIT 24 -#define RCC_CSR_LSIRDY_BIT 1 -#define RCC_CSR_LSION_BIT 0 - -#define RCC_CSR_LPWRRSTF (1U << RCC_CSR_LPWRRSTF_BIT) -#define RCC_CSR_WWDGRSTF (1U << RCC_CSR_WWDGRSTF_BIT) -#define RCC_CSR_IWDGRSTF (1U << RCC_CSR_IWDGRSTF_BIT) -#define RCC_CSR_SFTRSTF (1U << RCC_CSR_SFTRSTF_BIT) -#define RCC_CSR_PORRSTF (1U << RCC_CSR_PORRSTF_BIT) -#define RCC_CSR_PINRSTF (1U << RCC_CSR_PINRSTF_BIT) -#define RCC_CSR_BORRSTF (1U << RCC_CSR_BORRSTF_BIT) -#define RCC_CSR_RMVF (1U << RCC_CSR_RMVF_BIT) -#define RCC_CSR_LSIRDY (1U << RCC_CSR_LSIRDY_BIT) -#define RCC_CSR_LSION (1U << RCC_CSR_LSION_BIT) - -/* Spread spectrum clock generation register */ - -#define RCC_SSCGR_SSCGEN_BIT 31 -#define RCC_SSCGR_SPREADSEL_BIT 30 - -#define RCC_SSCGR_SSCGEN (1U << RCC_SSCGR_SSCGEN_BIT) -#define RCC_SSCGR_SPREADSEL (1U << RCC_SSCGR_SPREADSEL_BIT) -#define RCC_SSCGR_SPREADSEL_CENTER (0x0 << RCC_SSCGR_SPREADSEL_BIT) -#define RCC_SSCGR_SPREADSEL_DOWN (0x1 << RCC_SSCGR_SPREADSEL_BIT) -#define RCC_SSCGR_INCSTEP (0xFFF << 16) -#define RCC_SSCGR_MODPER 0xFFFF - -/* PLLI2S configuration register */ - -#define RCC_PLLI2SCFGR_PLLI2SR (0x7 << 28) -#define RCC_PLLI2SCFGR_PLLI2SN (0x1FF << 6) - -/* - * Clock sources, domains, and peripheral clock IDs. - */ - -/** - * @brief STM32F2 clock sources. - */ -typedef enum rcc_clk { - RCC_CLK_PLLI2S = (uint16)((offsetof(struct rcc_reg_map, CR) << 8) | - RCC_CR_PLLI2SON_BIT), /**< Dedicated PLL - for I2S. */ - RCC_CLK_PLL = (uint16)((offsetof(struct rcc_reg_map, CR) << 8) | - RCC_CR_PLLON_BIT), /**< Main PLL, clocked by - HSI or HSE. */ - RCC_CLK_HSE = (uint16)((offsetof(struct rcc_reg_map, CR) << 8) | - RCC_CR_HSEON_BIT), /**< High speed external. */ - RCC_CLK_HSI = (uint16)((offsetof(struct rcc_reg_map, CR) << 8) | - RCC_CR_HSION_BIT), /**< High speed internal. */ - RCC_CLK_LSE = (uint16)((offsetof(struct rcc_reg_map, BDCR) << 8) | - RCC_BDCR_LSEON_BIT), /**< Low-speed external - * (32.768 KHz). */ - RCC_CLK_LSI = (uint16)((offsetof(struct rcc_reg_map, CSR) << 8) | - RCC_CSR_LSION_BIT), /**< Low-speed internal - * (approximately 32 KHz). */ -} rcc_clk; - -/** - * @brief STM32F2 rcc_clk_id. - */ -typedef enum rcc_clk_id { - RCC_ADC1, - RCC_ADC2, - RCC_ADC3, - RCC_BKPSRAM, - RCC_CAN1, - RCC_CAN2, - RCC_CRC, - RCC_CRYP, - RCC_DAC, - RCC_DCMI, - RCC_DMA1, - RCC_DMA2, - RCC_ETHMAC, - RCC_ETHMACPTP, - RCC_ETHMACRX, - RCC_ETHMACTX, - RCC_FSMC, - RCC_GPIOA, - RCC_GPIOB, - RCC_GPIOC, - RCC_GPIOD, - RCC_GPIOE, - RCC_GPIOF, - RCC_GPIOG, - RCC_GPIOH, - RCC_GPIOI, - RCC_HASH, - RCC_I2C1, - RCC_I2C2, - RCC_I2C3, - RCC_OTGFS, - RCC_OTGHS, - RCC_OTGHSULPI, - RCC_PWR, - RCC_RNG, - RCC_SDIO, - RCC_SPI1, - RCC_SPI2, - RCC_SPI3, - RCC_SYSCFG, - RCC_TIMER1, - RCC_TIMER10, - RCC_TIMER11, - RCC_TIMER12, - RCC_TIMER13, - RCC_TIMER14, - RCC_TIMER2, - RCC_TIMER3, - RCC_TIMER4, - RCC_TIMER5, - RCC_TIMER6, - RCC_TIMER7, - RCC_TIMER8, - RCC_TIMER9, - RCC_USART1, - RCC_USART2, - RCC_USART3, - RCC_UART4, - RCC_UART5, - RCC_USART6, - RCC_WWDG, -} rcc_clk_id; - -/** - * @brief STM32F2 PLL entry clock source - * @see rcc_configure_pll() - */ -typedef enum rcc_pllsrc { - RCC_PLLSRC_HSI = 0, - RCC_PLLSRC_HSE = RCC_PLLCFGR_PLLSRC, -} rcc_pllsrc; - -/** - * @brief STM32F2 Peripheral clock domains. - */ -typedef enum rcc_clk_domain { - RCC_APB1, - RCC_APB2, - RCC_AHB1, - RCC_AHB2, - RCC_AHB3, -} rcc_clk_domain; - -/* - * Prescalers and dividers. - */ - -/** - * @brief STM32F2 Prescaler identifiers. - */ -typedef enum rcc_prescaler { - RCC_PRESCALER_MCO2, - RCC_PRESCALER_MCO1, - RCC_PRESCALER_RTC, - RCC_PRESCALER_APB2, - RCC_PRESCALER_APB1, - RCC_PRESCALER_AHB -} rcc_prescaler; - -/** - * @brief STM32F2 MCO2 prescaler dividers. - */ -typedef enum rcc_mco2_divider { - RCC_MCO2_DIV_1 = RCC_CFGR_MCO2PRE_DIV_1, - RCC_MCO2_DIV_2 = RCC_CFGR_MCO2PRE_DIV_2, - RCC_MCO2_DIV_3 = RCC_CFGR_MCO2PRE_DIV_3, - RCC_MCO2_DIV_4 = RCC_CFGR_MCO2PRE_DIV_4, - RCC_MCO2_DIV_5 = RCC_CFGR_MCO2PRE_DIV_5, -} rcc_mco2_divider; - -/** - * @brief STM32F2 MCO1 prescaler dividers. - */ -typedef enum rcc_mco1_divider { - RCC_MCO1_DIV_1 = RCC_CFGR_MCO1PRE_DIV_1, - RCC_MCO1_DIV_2 = RCC_CFGR_MCO1PRE_DIV_2, - RCC_MCO1_DIV_3 = RCC_CFGR_MCO1PRE_DIV_3, - RCC_MCO1_DIV_4 = RCC_CFGR_MCO1PRE_DIV_4, - RCC_MCO1_DIV_5 = RCC_CFGR_MCO1PRE_DIV_5, -} rcc_mco1_divider; - -/** - * @brief STM32F2 RTC prescaler dividers. - */ -typedef enum rcc_rtc_divider { /* FIXME [0.0.13] TODO */ - RCC_RTC_DIV_TODO = 0xFFFFFFFF, -} rcc_rtc_divider; - -/** - * @brief STM32F2 AP2 prescaler dividers. - */ -typedef enum rcc_apb2_divider { - RCC_APB2_HCLK_DIV_1 = 0, - RCC_APB2_HCLK_DIV_2 = RCC_CFGR_PPRE2_AHB_DIV_2, - RCC_APB2_HCLK_DIV_4 = RCC_CFGR_PPRE2_AHB_DIV_4, - RCC_APB2_HCLK_DIV_8 = RCC_CFGR_PPRE2_AHB_DIV_8, - RCC_APB2_HCLK_DIV_16 = RCC_CFGR_PPRE2_AHB_DIV_16, -} rcc_apb2_divider; - -/** - * @brief STM32F2 APB1 prescaler dividers. - */ -typedef enum rcc_apb1_divider { - RCC_APB1_HCLK_DIV_1 = 0, - RCC_APB1_HCLK_DIV_2 = RCC_CFGR_PPRE1_AHB_DIV_2, - RCC_APB1_HCLK_DIV_4 = RCC_CFGR_PPRE1_AHB_DIV_4, - RCC_APB1_HCLK_DIV_8 = RCC_CFGR_PPRE1_AHB_DIV_8, - RCC_APB1_HCLK_DIV_16 = RCC_CFGR_PPRE1_AHB_DIV_16, -} rcc_apb1_divider; - -/** - * @brief STM32F2 AHB prescaler dividers. - */ -typedef enum rcc_ahb_divider { - RCC_AHB_SYSCLK_DIV_1 = 0, - RCC_AHB_SYSCLK_DIV_2 = RCC_CFGR_HPRE_SYSCLK_DIV_2, - RCC_AHB_SYSCLK_DIV_4 = RCC_CFGR_HPRE_SYSCLK_DIV_4, - RCC_AHB_SYSCLK_DIV_8 = RCC_CFGR_HPRE_SYSCLK_DIV_8, - RCC_AHB_SYSCLK_DIV_16 = RCC_CFGR_HPRE_SYSCLK_DIV_16, - RCC_AHB_SYSCLK_DIV_64 = RCC_CFGR_HPRE_SYSCLK_DIV_64, - RCC_AHB_SYSCLK_DIV_128 = RCC_CFGR_HPRE_SYSCLK_DIV_128, - RCC_AHB_SYSCLK_DIV_256 = RCC_CFGR_HPRE_SYSCLK_DIV_256, - RCC_AHB_SYSCLK_DIV_512 = RCC_CFGR_HPRE_SYSCLK_DIV_512, -} rcc_ahb_divider; - -/** - * @brief STM32F2 PLL configuration values. - * Point to one of these with the "data" field in a struct rcc_pll_cfg. - * @see struct rcc_pll_cfg. - */ -typedef struct stm32f2_rcc_pll_data { - uint8 pllq; /**< - * @brief PLLQ value. - * Allowed values: 4, 5, ..., 15. */ - uint8 pllp; /**< - * @brief PLLP value. - * Allowed values: 2, 4, 6, 8. */ - uint16 plln; /**< - * @brief PLLN value. - * Allowed values: 192, 193, ..., 432. */ - uint8 pllm; /**< - * @brief PLLM value. - * Allowed values: 2, 3, ..., 63. */ -} stm32f2_rcc_pll_data; - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/STM32F1/system/libmaple/stm32f2/include/series/spi.h b/STM32F1/system/libmaple/stm32f2/include/series/spi.h deleted file mode 100644 index 7b9f94a..0000000 --- a/STM32F1/system/libmaple/stm32f2/include/series/spi.h +++ /dev/null @@ -1,88 +0,0 @@ -/****************************************************************************** - * The MIT License - * - * Copyright (c) 2012 LeafLabs, LLC. - * - * Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, copy, - * modify, merge, publish, distribute, sublicense, and/or sell copies - * of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS - * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN - * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - *****************************************************************************/ - -/** - * @file libmaple/stm32f2/include/series/spi.h - * @author Marti Bolivar - * @brief STM32F2 SPI/I2S series header. - */ - -#ifndef _LIBMAPLE_STM32F2_SPI_H_ -#define _LIBMAPLE_STM32F2_SPI_H_ - -#include /* for gpio_af */ - -#ifdef __cplusplus -extern "C" { -#endif - -/* - * Register map base pointers - */ - -struct spi_reg_map; - -#define SPI1_BASE ((struct spi_reg_map*)0x40013000) -#define SPI2_BASE ((struct spi_reg_map*)0x40003800) -#define SPI3_BASE ((struct spi_reg_map*)0x40003C00) - -/* - * Register bit definitions - */ - -/* Control register 2 */ - -#define SPI_CR2_FRF_BIT 4 - -#define SPI_CR2_FRF (1U << SPI_CR2_FRF_BIT) - -/* Status register */ - -#define SPI_SR_TIFRFE_BIT 8 - -#define SPI_SR_TIFRFE (1U << SPI_SR_TIFRFE_BIT) - -/* - * Device pointers - */ - -struct spi_dev; - -extern struct spi_dev *SPI1; -extern struct spi_dev *SPI2; -extern struct spi_dev *SPI3; - -/* - * Routines - */ - -gpio_af spi_get_af(struct spi_dev *dev); - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/STM32F1/system/libmaple/stm32f2/include/series/stm32.h b/STM32F1/system/libmaple/stm32f2/include/series/stm32.h deleted file mode 100644 index 180ab30..0000000 --- a/STM32F1/system/libmaple/stm32f2/include/series/stm32.h +++ /dev/null @@ -1,77 +0,0 @@ -/****************************************************************************** - * The MIT License - * - * Copyright (c) 2011 LeafLabs, LLC. - * - * Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, copy, - * modify, merge, publish, distribute, sublicense, and/or sell copies - * of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS - * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN - * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - *****************************************************************************/ - -/** - * @file libmaple/stm32f2/include/series/stm32.h - * @brief STM32F2 chip- and series-specific definitions. - */ - -#ifndef _LIBMAPLE_STM32F2_STM32_H_ -#define _LIBMAPLE_STM32F2_STM32_H_ - -#ifdef __cplusplus -extern "C" { -#endif - -/* - * Chip configuration - */ - -#ifndef STM32_PCLK1 -#define STM32_PCLK1 30000000U -#endif - -#ifndef STM32_PCLK2 -#define STM32_PCLK2 60000000U -#endif - -#ifndef STM32_DELAY_US_MULT -#define STM32_DELAY_US_MULT 20 /* FIXME: dummy value. */ -#endif - -/* - * Series- and MCU-specific values - */ - -#define STM32_MCU_SERIES STM32_SERIES_F2 -#define STM32_NR_INTERRUPTS 81 -#define STM32_HAVE_FSMC 1 -#define STM32_HAVE_USB 1 -#define STM32_HAVE_DAC 1 - -#if defined(MCU_STM32F207IC) || defined(MCU_STM32F207IG) -# define STM32_NR_GPIO_PORTS 9 -# define STM32_TIMER_MASK 0x7FFE /* TIMER1-TIMER14. */ -# define STM32_SRAM_END ((void*)0x20020000) -#else -#warning "Unsupported or unspecified STM32F2 MCU." -#endif - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/STM32F1/system/libmaple/stm32f2/include/series/timer.h b/STM32F1/system/libmaple/stm32f2/include/series/timer.h deleted file mode 100644 index a7ac276..0000000 --- a/STM32F1/system/libmaple/stm32f2/include/series/timer.h +++ /dev/null @@ -1,176 +0,0 @@ -/****************************************************************************** - * The MIT License - * - * Copyright (c) 2011,2012 LeafLabs, LLC. - * - * Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, copy, - * modify, merge, publish, distribute, sublicense, and/or sell copies - * of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS - * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN - * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - *****************************************************************************/ - -/** - * @file libmaple/stm32f2/include/series/timer.h - * @author Marti Bolivar - * @brief STM32F2 timer support. - */ - -#ifndef _LIBMAPLE_STM32F2_TIMER_H_ -#define _LIBMAPLE_STM32F2_TIMER_H_ - -#include -#include /* for gpio_af */ - -/* - * Register maps and base pointers - */ - -/** - * @brief STM32F2 general purpose timer register map type - * - * Note that not all general purpose timers have all of these - * registers. Consult your chip's reference manual for the details. - */ -typedef struct timer_gen_reg_map { - __io uint32 CR1; /**< Control register 1 */ - __io uint32 CR2; /**< Control register 2 */ - __io uint32 SMCR; /**< Slave mode control register */ - __io uint32 DIER; /**< DMA/Interrupt enable register */ - __io uint32 SR; /**< Status register */ - __io uint32 EGR; /**< Event generation register */ - __io uint32 CCMR1; /**< Capture/compare mode register 1 */ - __io uint32 CCMR2; /**< Capture/compare mode register 2 */ - __io uint32 CCER; /**< Capture/compare enable register */ - __io uint32 CNT; /**< Counter */ - __io uint32 PSC; /**< Prescaler */ - __io uint32 ARR; /**< Auto-reload register */ - const uint32 RESERVED1; /**< Reserved */ - __io uint32 CCR1; /**< Capture/compare register 1 */ - __io uint32 CCR2; /**< Capture/compare register 2 */ - __io uint32 CCR3; /**< Capture/compare register 3 */ - __io uint32 CCR4; /**< Capture/compare register 4 */ - const uint32 RESERVED2; /**< Reserved */ - __io uint32 DCR; /**< DMA control register */ - __io uint32 DMAR; /**< DMA address for full transfer */ - __io uint32 OR; /**< Option register. */ -} timer_gen_reg_map; - -struct timer_adv_reg_map; -struct timer_bas_reg_map; - -/** Timer 1 register map base pointer */ -#define TIMER1_BASE ((struct timer_adv_reg_map*)0x40010000) -/** Timer 2 register map base pointer */ -#define TIMER2_BASE ((struct timer_gen_reg_map*)0x40000000) -/** Timer 3 register map base pointer */ -#define TIMER3_BASE ((struct timer_gen_reg_map*)0x40000400) -/** Timer 4 register map base pointer */ -#define TIMER4_BASE ((struct timer_gen_reg_map*)0x40000800) -/** Timer 5 register map base pointer */ -#define TIMER5_BASE ((struct timer_gen_reg_map*)0x40000C00) -/** Timer 6 register map base pointer */ -#define TIMER6_BASE ((struct timer_bas_reg_map*)0x40001000) -/** Timer 7 register map base pointer */ -#define TIMER7_BASE ((struct timer_bas_reg_map*)0x40001400) -/** Timer 8 register map base pointer */ -#define TIMER8_BASE ((struct timer_adv_reg_map*)0x40010400) -/** Timer 9 register map base pointer */ -#define TIMER9_BASE ((struct timer_gen_reg_map*)0x40014000) -/** Timer 10 register map base pointer */ -#define TIMER10_BASE ((struct timer_gen_reg_map*)0x40014400) -/** Timer 11 register map base pointer */ -#define TIMER11_BASE ((struct timer_gen_reg_map*)0x40014800) -/** Timer 12 register map base pointer */ -#define TIMER12_BASE ((struct timer_gen_reg_map*)0x40001800) -/** Timer 13 register map base pointer */ -#define TIMER13_BASE ((struct timer_gen_reg_map*)0x40001C00) -/** Timer 14 register map base pointer */ -#define TIMER14_BASE ((struct timer_gen_reg_map*)0x40002000) - -/* - * Register bit definitions - */ - -/* TIM2 option register */ - -/** Timer 2 option register internal trigger 1 remap */ -#define TIMER2_OR_ITR1_RMP (0x3 << 10) -/** Timer 2 OR internal trigger 1: TIM8_TRGOUT */ -#define TIMER2_OR_ITR1_RMP_TIM8_TRGOUT (0x0 << 10) -/** Timer 2 OR internal trigger 1: Ethernet PTP trigger output */ -#define TIMER2_OR_ITR1_RMP_PTP_TRGOUT (0x1 << 10) -/** Timer 2 OR internal trigger 1: USB OTG full speed start of frame */ -#define TIMER2_OR_ITR1_RMP_OTG_FS_SOF (0x2 << 10) -/** Timer 2 OR internal trigger 1: USB OTG high speed start of frame */ -#define TIMER2_OR_ITR1_RMP_OTG_HS_SOF (0x3 << 10) - -/* TIM5 option register */ - -/** - * Timer 5 option register input 4 remap. - * - * These bits control whether TIM5_CH4 is connected to a GPIO or a - * clock. Connecting to a GPIO is the normal mode, useful for e.g. PWM - * generation or input pulse duration measurement. Connecting to a - * clock is useful for calibrating that clock. - */ -#define TIMER5_OR_TI4_RMP (0x3 << 6) -/** - * Timer 5 OR input 4: Timer 5 channel 4 connected to GPIO. */ -#define TIMER5_OR_TI4_RMP_GPIO (0x0 << 6) -/** - * Timer 5 OR input 4: low speed internal clock (LSI) is connected to - * TIM5_CH4. */ -#define TIMER5_OR_TI4_RMP_LSI (0x1 << 6) -/** - * Timer 5 OR input 4: low speed external clock (LSE) is connected to - * TIM5_CH4. */ -#define TIMER5_OR_TI4_RMP_LSE (0x2 << 6) -/** - * Timer 5 OR input 4: real time clock (RTC) output is connected to - * TIM5_CH4. */ -#define TIMER5_OR_TI4_RMP_RTC (0x3 << 6) - -/* - * Device pointers - */ - -struct timer_dev; - -extern struct timer_dev *TIMER1; -extern struct timer_dev *TIMER2; -extern struct timer_dev *TIMER3; -extern struct timer_dev *TIMER4; -extern struct timer_dev *TIMER5; -extern struct timer_dev *TIMER6; -extern struct timer_dev *TIMER7; -extern struct timer_dev *TIMER8; -extern struct timer_dev *TIMER9; -extern struct timer_dev *TIMER10; -extern struct timer_dev *TIMER11; -extern struct timer_dev *TIMER12; -extern struct timer_dev *TIMER13; -extern struct timer_dev *TIMER14; - -/* - * Routines - */ - -gpio_af timer_get_af(struct timer_dev *dev); - -#endif diff --git a/STM32F1/system/libmaple/stm32f2/include/series/usart.h b/STM32F1/system/libmaple/stm32f2/include/series/usart.h deleted file mode 100644 index 8936efa..0000000 --- a/STM32F1/system/libmaple/stm32f2/include/series/usart.h +++ /dev/null @@ -1,111 +0,0 @@ -/****************************************************************************** - * The MIT License - * - * Copyright (c) 2012 LeafLabs, LLC. - * - * Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, copy, - * modify, merge, publish, distribute, sublicense, and/or sell copies - * of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS - * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN - * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - *****************************************************************************/ - -/** - * @file libmaple/stm32f2/include/series/usart.h - * @author Marti Bolivar - * @brief STM32F2 USART support. - */ - -#ifndef _LIBMAPLE_STM32F2_USART_H_ -#define _LIBMAPLE_STM32F2_USART_H_ - -#ifdef __cplusplus -extern "C"{ -#endif - -#include /* for gpio_af */ - -/* - * Register map base pointers. - */ - -struct usart_reg_map; - -/** USART1 register map base pointer */ -#define USART1_BASE ((struct usart_reg_map*)0x40011000) -/** USART2 register map base pointer */ -#define USART2_BASE ((struct usart_reg_map*)0x40004400) -/** USART3 register map base pointer */ -#define USART3_BASE ((struct usart_reg_map*)0x40004800) -/** UART4 register map base pointer */ -#define UART4_BASE ((struct usart_reg_map*)0x40004C00) -/** UART5 register map base pointer */ -#define UART5_BASE ((struct usart_reg_map*)0x40005000) -/** USART6 register map base pointer */ -#define USART6_BASE ((struct usart_reg_map*)0x40011400) - -/* - * F2-only register bit definitions. - */ - -/* Control register 1 */ - -/** - * @brief Oversampling mode bit. - * Availability: STM32F2. */ -#define USART_CR1_OVER8_BIT 15 - -/** - * @brief Oversampling mode. - * Availability: STM32F2. */ -#define USART_CR1_OVER8 (1U << USART_CR1_OVER8_BIT) - -/* Control register 3 */ - -/** One sample bit method enable bit. */ -#define USART_CR3_ONEBIT_BIT 11 - -/** One bit sample method enable. */ -#define USART_CR3_ONEBIT (1 << USART_CR3_ONEBIT_BIT) -/** Sample method: Three sample bit method. */ -#define USART_CR3_ONEBIT_3SAMPLE (0 << USART_CR3_ONEBIT_BIT) -/** Sample method: One sample bit method. */ -#define USART_CR3_ONEBIT_1SAMPLE (1 << USART_CR3_ONEBIT_BIT) - -/* - * Devices - */ - -struct usart_dev; -extern struct usart_dev *USART1; -extern struct usart_dev *USART2; -extern struct usart_dev *USART3; -extern struct usart_dev *UART4; -extern struct usart_dev *UART5; -extern struct usart_dev *USART6; - -/* - * Routines - */ - -gpio_af usart_get_af(struct usart_dev *dev); - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/STM32F1/system/libmaple/stm32f2/rules.mk b/STM32F1/system/libmaple/stm32f2/rules.mk deleted file mode 100644 index 4c62cc2..0000000 --- a/STM32F1/system/libmaple/stm32f2/rules.mk +++ /dev/null @@ -1,40 +0,0 @@ -# Standard things -sp := $(sp).x -dirstack_$(sp) := $(d) -d := $(dir) -BUILDDIRS += $(BUILD_PATH)/$(d) - -# Local flags -CFLAGS_$(d) = -I$(d) $(LIBMAPLE_INCLUDES) $(LIBMAPLE_PRIVATE_INCLUDES) -Wall -Werror - -# Local rules and targets -sSRCS_$(d) := isrs.S -sSRCS_$(d) += vector_table.S - -cSRCS_$(d) := adc.c -cSRCS_$(d) += dma.c -cSRCS_$(d) += exti.c -cSRCS_$(d) += fsmc.c -cSRCS_$(d) += gpio.c -cSRCS_$(d) += rcc.c -cSRCS_$(d) += spi.c -cSRCS_$(d) += syscfg.c -cSRCS_$(d) += timer.c -cSRCS_$(d) += usart.c - -sFILES_$(d) := $(sSRCS_$(d):%=$(d)/%) -cFILES_$(d) := $(cSRCS_$(d):%=$(d)/%) - -OBJS_$(d) := $(sFILES_$(d):%.S=$(BUILD_PATH)/%.o) \ - $(cFILES_$(d):%.c=$(BUILD_PATH)/%.o) -DEPS_$(d) := $(OBJS_$(d):%.o=%.d) - -$(OBJS_$(d)): TGT_ASFLAGS := -$(OBJS_$(d)): TGT_CFLAGS := $(CFLAGS_$(d)) - -TGT_BIN += $(OBJS_$(d)) - -# Standard things --include $(DEPS_$(d)) -d := $(dirstack_$(sp)) -sp := $(basename $(sp)) diff --git a/STM32F1/system/libmaple/stm32f1/include/series/timer.h b/STM32F1/system/libmaple/timer.h similarity index 100% rename from STM32F1/system/libmaple/stm32f1/include/series/timer.h rename to STM32F1/system/libmaple/timer.h diff --git a/STM32F1/system/libmaple/stm32f1/include/series/usart.h b/STM32F1/system/libmaple/usart.h similarity index 100% rename from STM32F1/system/libmaple/stm32f1/include/series/usart.h rename to STM32F1/system/libmaple/usart.h diff --git a/STM32F1/system/libmaple/usb/rules.mk b/STM32F1/system/libmaple/usb/rules.mk deleted file mode 100644 index e8ccc15..0000000 --- a/STM32F1/system/libmaple/usb/rules.mk +++ /dev/null @@ -1,45 +0,0 @@ -# Standard things -sp := $(sp).x -dirstack_$(sp) := $(d) -d := $(dir) -BUILDDIRS += $(BUILD_PATH)/$(d) - -# Local flags -CFLAGS_$(d) = -I$(d) -I$(d)/$(MCU_SERIES) -I$(d)/usb_lib $(LIBMAPLE_INCLUDES) $(LIBMAPLE_PRIVATE_INCLUDES) -Wall - -# Add usblib and series subdirectory to BUILDDIRS. -BUILDDIRS += $(BUILD_PATH)/$(d)/$(MCU_SERIES) -BUILDDIRS += $(BUILD_PATH)/$(d)/usb_lib - -# Local rules and targets -sSRCS_$(d) := -cSRCS_$(d) := -# We currently only have F1 performance line support. Sigh. -ifeq ($(MCU_SERIES), stm32f1) -ifeq ($(MCU_F1_LINE), performance) -cSRCS_$(d) += $(MCU_SERIES)/usb.c -cSRCS_$(d) += $(MCU_SERIES)/usb_reg_map.c -cSRCS_$(d) += $(MCU_SERIES)/usb_cdcacm.c -cSRCS_$(d) += usb_lib/usb_core.c -cSRCS_$(d) += usb_lib/usb_init.c -cSRCS_$(d) += usb_lib/usb_mem.c -cSRCS_$(d) += usb_lib/usb_regs.c -endif -endif - -sFILES_$(d) := $(sSRCS_$(d):%=$(d)/%) -cFILES_$(d) := $(cSRCS_$(d):%=$(d)/%) - -OBJS_$(d) := $(sFILES_$(d):%.S=$(BUILD_PATH)/%.o) \ - $(cFILES_$(d):%.c=$(BUILD_PATH)/%.o) -DEPS_$(d) := $(OBJS_$(d):%.o=%.d) - -$(OBJS_$(d)): TGT_CFLAGS := $(CFLAGS_$(d)) -$(OBJS_$(d)): TGT_ASFLAGS := - -TGT_BIN += $(OBJS_$(d)) - -# Standard things --include $(DEPS_$(d)) -d := $(dirstack_$(sp)) -sp := $(basename $(sp)) diff --git a/STM32F1/system/libmaple/usb/stm32f1/usb_lib_globals.h b/STM32F1/system/libmaple/usb/usb_lib_globals.h similarity index 100% rename from STM32F1/system/libmaple/usb/stm32f1/usb_lib_globals.h rename to STM32F1/system/libmaple/usb/usb_lib_globals.h diff --git a/STM32F1/system/libmaple/usb/stm32f1/usb_reg_map.h b/STM32F1/system/libmaple/usb/usb_reg_map.h similarity index 100% rename from STM32F1/system/libmaple/usb/stm32f1/usb_reg_map.h rename to STM32F1/system/libmaple/usb/usb_reg_map.h diff --git a/STM32F1/system/support/doxygen/Doxyfile b/STM32F1/system/support/doxygen/Doxyfile deleted file mode 100644 index 170cff4..0000000 --- a/STM32F1/system/support/doxygen/Doxyfile +++ /dev/null @@ -1,1648 +0,0 @@ -# Doxyfile 1.7.1 - -# This file describes the settings to be used by the documentation system -# doxygen (www.doxygen.org) for a project -# -# All text after a hash (#) is considered a comment and will be ignored -# The format is: -# TAG = value [value, ...] -# For lists items can also be appended using: -# TAG += value [value, ...] -# Values that contain spaces should be placed between quotes (" ") - -#--------------------------------------------------------------------------- -# Project related configuration options -#--------------------------------------------------------------------------- - -# This tag specifies the encoding used for all characters in the config file -# that follow. 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So -# typedef struct TypeS {} TypeT, will appear in the documentation as a struct -# with name TypeT. When disabled the typedef will appear as a member of a file, -# namespace, or class. And the struct will be named TypeS. This can typically -# be useful for C code in case the coding convention dictates that all compound -# types are typedef'ed and only the typedef is referenced, never the tag name. - -TYPEDEF_HIDES_STRUCT = NO - -# The SYMBOL_CACHE_SIZE determines the size of the internal cache use to -# determine which symbols to keep in memory and which to flush to disk. -# When the cache is full, less often used symbols will be written to disk. -# For small to medium size projects (<1000 input files) the default value is -# probably good enough. For larger projects a too small cache size can cause -# doxygen to be busy swapping symbols to and from disk most of the time -# causing a significant performance penality. -# If the system has enough physical memory increasing the cache will improve the -# performance by keeping more symbols in memory. Note that the value works on -# a logarithmic scale so increasing the size by one will rougly double the -# memory usage. The cache size is given by this formula: -# 2^(16+SYMBOL_CACHE_SIZE). The valid range is 0..9, the default is 0, -# corresponding to a cache size of 2^16 = 65536 symbols - -SYMBOL_CACHE_SIZE = 0 - -#--------------------------------------------------------------------------- -# Build related configuration options -#--------------------------------------------------------------------------- - -# If the EXTRACT_ALL tag is set to YES doxygen will assume all entities in -# documentation are documented, even if no documentation was available. -# Private class members and static file members will be hidden unless -# the EXTRACT_PRIVATE and EXTRACT_STATIC tags are set to YES - -EXTRACT_ALL = NO - -# If the EXTRACT_PRIVATE tag is set to YES all private members of a class -# will be included in the documentation. - -EXTRACT_PRIVATE = NO - -# If the EXTRACT_STATIC tag is set to YES all static members of a file -# will be included in the documentation. - -EXTRACT_STATIC = YES - -# If the EXTRACT_LOCAL_CLASSES tag is set to YES classes (and structs) -# defined locally in source files will be included in the documentation. -# If set to NO only classes defined in header files are included. - -EXTRACT_LOCAL_CLASSES = YES - -# This flag is only useful for Objective-C code. When set to YES local -# methods, which are defined in the implementation section but not in -# the interface are included in the documentation. -# If set to NO (the default) only methods in the interface are included. - -EXTRACT_LOCAL_METHODS = NO - -# If this flag is set to YES, the members of anonymous namespaces will be -# extracted and appear in the documentation as a namespace called -# 'anonymous_namespace{file}', where file will be replaced with the base -# name of the file that contains the anonymous namespace. By default -# anonymous namespace are hidden. - -EXTRACT_ANON_NSPACES = NO - -# If the HIDE_UNDOC_MEMBERS tag is set to YES, Doxygen will hide all -# undocumented members of documented classes, files or namespaces. -# If set to NO (the default) these members will be included in the -# various overviews, but no documentation section is generated. -# This option has no effect if EXTRACT_ALL is enabled. - -HIDE_UNDOC_MEMBERS = NO - -# If the HIDE_UNDOC_CLASSES tag is set to YES, Doxygen will hide all -# undocumented classes that are normally visible in the class hierarchy. -# If set to NO (the default) these classes will be included in the various -# overviews. This option has no effect if EXTRACT_ALL is enabled. - -HIDE_UNDOC_CLASSES = NO - -# If the HIDE_FRIEND_COMPOUNDS tag is set to YES, Doxygen will hide all -# friend (class|struct|union) declarations. -# If set to NO (the default) these declarations will be included in the -# documentation. - -HIDE_FRIEND_COMPOUNDS = NO - -# If the HIDE_IN_BODY_DOCS tag is set to YES, Doxygen will hide any -# documentation blocks found inside the body of a function. -# If set to NO (the default) these blocks will be appended to the -# function's detailed documentation block. - -HIDE_IN_BODY_DOCS = NO - -# The INTERNAL_DOCS tag determines if documentation -# that is typed after a \internal command is included. If the tag is set -# to NO (the default) then the documentation will be excluded. -# Set it to YES to include the internal documentation. - -INTERNAL_DOCS = NO - -# If the CASE_SENSE_NAMES tag is set to NO then Doxygen will only generate -# file names in lower-case letters. If set to YES upper-case letters are also -# allowed. This is useful if you have classes or files whose names only differ -# in case and if your file system supports case sensitive file names. Windows -# and Mac users are advised to set this option to NO. - -CASE_SENSE_NAMES = NO - -# If the HIDE_SCOPE_NAMES tag is set to NO (the default) then Doxygen -# will show members with their full class and namespace scopes in the -# documentation. If set to YES the scope will be hidden. - -HIDE_SCOPE_NAMES = NO - -# If the SHOW_INCLUDE_FILES tag is set to YES (the default) then Doxygen -# will put a list of the files that are included by a file in the documentation -# of that file. - -SHOW_INCLUDE_FILES = YES - -# If the FORCE_LOCAL_INCLUDES tag is set to YES then Doxygen -# will list include files with double quotes in the documentation -# rather than with sharp brackets. - -FORCE_LOCAL_INCLUDES = NO - -# If the INLINE_INFO tag is set to YES (the default) then a tag [inline] -# is inserted in the documentation for inline members. - -INLINE_INFO = YES - -# If the SORT_MEMBER_DOCS tag is set to YES (the default) then doxygen -# will sort the (detailed) documentation of file and class members -# alphabetically by member name. If set to NO the members will appear in -# declaration order. - -SORT_MEMBER_DOCS = YES - -# If the SORT_BRIEF_DOCS tag is set to YES then doxygen will sort the -# brief documentation of file, namespace and class members alphabetically -# by member name. If set to NO (the default) the members will appear in -# declaration order. - -SORT_BRIEF_DOCS = NO - -# If the SORT_MEMBERS_CTORS_1ST tag is set to YES then doxygen -# will sort the (brief and detailed) documentation of class members so that -# constructors and destructors are listed first. If set to NO (the default) -# the constructors will appear in the respective orders defined by -# SORT_MEMBER_DOCS and SORT_BRIEF_DOCS. -# This tag will be ignored for brief docs if SORT_BRIEF_DOCS is set to NO -# and ignored for detailed docs if SORT_MEMBER_DOCS is set to NO. - -SORT_MEMBERS_CTORS_1ST = YES - -# If the SORT_GROUP_NAMES tag is set to YES then doxygen will sort the -# hierarchy of group names into alphabetical order. If set to NO (the default) -# the group names will appear in their defined order. - -SORT_GROUP_NAMES = NO - -# If the SORT_BY_SCOPE_NAME tag is set to YES, the class list will be -# sorted by fully-qualified names, including namespaces. If set to -# NO (the default), the class list will be sorted only by class name, -# not including the namespace part. -# Note: This option is not very useful if HIDE_SCOPE_NAMES is set to YES. -# Note: This option applies only to the class list, not to the -# alphabetical list. - -SORT_BY_SCOPE_NAME = NO - -# The GENERATE_TODOLIST tag can be used to enable (YES) or -# disable (NO) the todo list. This list is created by putting \todo -# commands in the documentation. - -GENERATE_TODOLIST = YES - -# The GENERATE_TESTLIST tag can be used to enable (YES) or -# disable (NO) the test list. This list is created by putting \test -# commands in the documentation. - -GENERATE_TESTLIST = NO - -# The GENERATE_BUGLIST tag can be used to enable (YES) or -# disable (NO) the bug list. This list is created by putting \bug -# commands in the documentation. - -GENERATE_BUGLIST = NO - -# The GENERATE_DEPRECATEDLIST tag can be used to enable (YES) or -# disable (NO) the deprecated list. This list is created by putting -# \deprecated commands in the documentation. - -GENERATE_DEPRECATEDLIST= YES - -# The ENABLED_SECTIONS tag can be used to enable conditional -# documentation sections, marked by \if sectionname ... \endif. - -ENABLED_SECTIONS = - -# The MAX_INITIALIZER_LINES tag determines the maximum number of lines -# the initial value of a variable or define consists of for it to appear in -# the documentation. If the initializer consists of more lines than specified -# here it will be hidden. Use a value of 0 to hide initializers completely. -# The appearance of the initializer of individual variables and defines in the -# documentation can be controlled using \showinitializer or \hideinitializer -# command in the documentation regardless of this setting. - -MAX_INITIALIZER_LINES = 30 - -# Set the SHOW_USED_FILES tag to NO to disable the list of files generated -# at the bottom of the documentation of classes and structs. If set to YES the -# list will mention the files that were used to generate the documentation. - -SHOW_USED_FILES = YES - -# If the sources in your project are distributed over multiple directories -# then setting the SHOW_DIRECTORIES tag to YES will show the directory hierarchy -# in the documentation. The default is NO. - -SHOW_DIRECTORIES = YES - -# Set the SHOW_FILES tag to NO to disable the generation of the Files page. -# This will remove the Files entry from the Quick Index and from the -# Folder Tree View (if specified). The default is YES. - -SHOW_FILES = YES - -# Set the SHOW_NAMESPACES tag to NO to disable the generation of the -# Namespaces page. This will remove the Namespaces entry from the Quick Index -# and from the Folder Tree View (if specified). The default is YES. - -SHOW_NAMESPACES = YES - -# The FILE_VERSION_FILTER tag can be used to specify a program or script that -# doxygen should invoke to get the current version for each file (typically from -# the version control system). Doxygen will invoke the program by executing (via -# popen()) the command , where is the value of -# the FILE_VERSION_FILTER tag, and is the name of an input file -# provided by doxygen. Whatever the program writes to standard output -# is used as the file version. See the manual for examples. - -FILE_VERSION_FILTER = - -# The LAYOUT_FILE tag can be used to specify a layout file which will be parsed -# by doxygen. The layout file controls the global structure of the generated -# output files in an output format independent way. The create the layout file -# that represents doxygen's defaults, run doxygen with the -l option. -# You can optionally specify a file name after the option, if omitted -# DoxygenLayout.xml will be used as the name of the layout file. - -LAYOUT_FILE = - -#--------------------------------------------------------------------------- -# configuration options related to warning and progress messages -#--------------------------------------------------------------------------- - -# The QUIET tag can be used to turn on/off the messages that are generated -# by doxygen. Possible values are YES and NO. If left blank NO is used. - -QUIET = YES - -# The WARNINGS tag can be used to turn on/off the warning messages that are -# generated by doxygen. Possible values are YES and NO. If left blank -# NO is used. - -WARNINGS = YES - -# If WARN_IF_UNDOCUMENTED is set to YES, then doxygen will generate warnings -# for undocumented members. If EXTRACT_ALL is set to YES then this flag will -# automatically be disabled. - -WARN_IF_UNDOCUMENTED = NO - -# If WARN_IF_DOC_ERROR is set to YES, doxygen will generate warnings for -# potential errors in the documentation, such as not documenting some -# parameters in a documented function, or documenting parameters that -# don't exist or using markup commands wrongly. - -WARN_IF_DOC_ERROR = YES - -# This WARN_NO_PARAMDOC option can be abled to get warnings for -# functions that are documented, but have no documentation for their parameters -# or return value. If set to NO (the default) doxygen will only warn about -# wrong or incomplete parameter documentation, but not about the absence of -# documentation. - -WARN_NO_PARAMDOC = NO - -# The WARN_FORMAT tag determines the format of the warning messages that -# doxygen can produce. The string should contain the $file, $line, and $text -# tags, which will be replaced by the file and line number from which the -# warning originated and the warning text. Optionally the format may contain -# $version, which will be replaced by the version of the file (if it could -# be obtained via FILE_VERSION_FILTER) - -WARN_FORMAT = "$file:$line: $text" - -# The WARN_LOGFILE tag can be used to specify a file to which warning -# and error messages should be written. If left blank the output is written -# to stderr. - -WARN_LOGFILE = - -#--------------------------------------------------------------------------- -# configuration options related to the input files -#--------------------------------------------------------------------------- - -# The INPUT tag can be used to specify the files and/or directories that contain -# documented source files. You may enter file names like "myfile.cpp" or -# directories like "/usr/src/myproject". Separate the files or directories -# with spaces. - -INPUT = ./libmaple/ \ - ./wirish/ \ - ./libraries/ - -# This tag can be used to specify the character encoding of the source files -# that doxygen parses. Internally doxygen uses the UTF-8 encoding, which is -# also the default input encoding. Doxygen uses libiconv (or the iconv built -# into libc) for the transcoding. See http://www.gnu.org/software/libiconv for -# the list of possible encodings. - -INPUT_ENCODING = UTF-8 - -# If the value of the INPUT tag contains directories, you can use the -# FILE_PATTERNS tag to specify one or more wildcard pattern (like *.cpp -# and *.h) to filter out the source-files in the directories. If left -# blank the following patterns are tested: -# *.c *.cc *.cxx *.cpp *.c++ *.java *.ii *.ixx *.ipp *.i++ *.inl *.h *.hh *.hxx -# *.hpp *.h++ *.idl *.odl *.cs *.php *.php3 *.inc *.m *.mm *.py *.f90 - -FILE_PATTERNS = *.h *.c - -# The RECURSIVE tag can be used to turn specify whether or not subdirectories -# should be searched for input files as well. Possible values are YES and NO. -# If left blank NO is used. - -RECURSIVE = YES - -# The EXCLUDE tag can be used to specify files and/or directories that should -# excluded from the INPUT source files. This way you can easily exclude a -# subdirectory from a directory tree whose root is specified with the INPUT tag. - -# We include the FreeRTOS sources. That's probably a mistake. Oh well. -EXCLUDE = ./libraries/FreeRTOS/ - -# The EXCLUDE_SYMLINKS tag can be used select whether or not files or -# directories that are symbolic links (a Unix filesystem feature) are excluded -# from the input. - -EXCLUDE_SYMLINKS = NO - -# If the value of the INPUT tag contains directories, you can use the -# EXCLUDE_PATTERNS tag to specify one or more wildcard patterns to exclude -# certain files from those directories. Note that the wildcards are matched -# against the file with absolute path, so to exclude all test directories -# for example use the pattern */test/* - -EXCLUDE_PATTERNS = - -# The EXCLUDE_SYMBOLS tag can be used to specify one or more symbol names -# (namespaces, classes, functions, etc.) that should be excluded from the -# output. The symbol name can be a fully qualified name, a word, or if the -# wildcard * is used, a substring. Examples: ANamespace, AClass, -# AClass::ANamespace, ANamespace::*Test - -EXCLUDE_SYMBOLS = - -# The EXAMPLE_PATH tag can be used to specify one or more files or -# directories that contain example code fragments that are included (see -# the \include command). - -EXAMPLE_PATH = - -# If the value of the EXAMPLE_PATH tag contains directories, you can use the -# EXAMPLE_PATTERNS tag to specify one or more wildcard pattern (like *.cpp -# and *.h) to filter out the source-files in the directories. If left -# blank all files are included. - -EXAMPLE_PATTERNS = * - -# If the EXAMPLE_RECURSIVE tag is set to YES then subdirectories will be -# searched for input files to be used with the \include or \dontinclude -# commands irrespective of the value of the RECURSIVE tag. -# Possible values are YES and NO. If left blank NO is used. - -EXAMPLE_RECURSIVE = NO - -# The IMAGE_PATH tag can be used to specify one or more files or -# directories that contain image that are included in the documentation (see -# the \image command). - -IMAGE_PATH = - -# The INPUT_FILTER tag can be used to specify a program that doxygen should -# invoke to filter for each input file. Doxygen will invoke the filter program -# by executing (via popen()) the command , where -# is the value of the INPUT_FILTER tag, and is the name of an -# input file. Doxygen will then use the output that the filter program writes -# to standard output. If FILTER_PATTERNS is specified, this tag will be -# ignored. - -INPUT_FILTER = - -# The FILTER_PATTERNS tag can be used to specify filters on a per file pattern -# basis. Doxygen will compare the file name with each pattern and apply the -# filter if there is a match. The filters are a list of the form: -# pattern=filter (like *.cpp=my_cpp_filter). See INPUT_FILTER for further -# info on how filters are used. If FILTER_PATTERNS is empty, INPUT_FILTER -# is applied to all files. - -# Trick Doxygen into thinking series headers are in separate -# namespaces; see the Evil Mangler source for more information. -FILTER_PATTERNS = */libmaple/stm32*/include/series/*.h=./support/doxygen/evil_mangler.awk - -# If the FILTER_SOURCE_FILES tag is set to YES, the input filter (if set using -# INPUT_FILTER) will be used to filter the input files when producing source -# files to browse (i.e. when SOURCE_BROWSER is set to YES). - -FILTER_SOURCE_FILES = NO - -#--------------------------------------------------------------------------- -# configuration options related to source browsing -#--------------------------------------------------------------------------- - -# If the SOURCE_BROWSER tag is set to YES then a list of source files will -# be generated. Documented entities will be cross-referenced with these sources. -# Note: To get rid of all source code in the generated output, make sure also -# VERBATIM_HEADERS is set to NO. - -SOURCE_BROWSER = YES - -# Setting the INLINE_SOURCES tag to YES will include the body -# of functions and classes directly in the documentation. - -INLINE_SOURCES = NO - -# Setting the STRIP_CODE_COMMENTS tag to YES (the default) will instruct -# doxygen to hide any special comment blocks from generated source code -# fragments. Normal C and C++ comments will always remain visible. - -STRIP_CODE_COMMENTS = YES - -# If the REFERENCED_BY_RELATION tag is set to YES -# then for each documented function all documented -# functions referencing it will be listed. - -REFERENCED_BY_RELATION = NO - -# If the REFERENCES_RELATION tag is set to YES -# then for each documented function all documented entities -# called/used by that function will be listed. - -REFERENCES_RELATION = NO - -# If the REFERENCES_LINK_SOURCE tag is set to YES (the default) -# and SOURCE_BROWSER tag is set to YES, then the hyperlinks from -# functions in REFERENCES_RELATION and REFERENCED_BY_RELATION lists will -# link to the source code. Otherwise they will link to the documentation. - -REFERENCES_LINK_SOURCE = YES - -# If the USE_HTAGS tag is set to YES then the references to source code -# will point to the HTML generated by the htags(1) tool instead of doxygen -# built-in source browser. The htags tool is part of GNU's global source -# tagging system (see http://www.gnu.org/software/global/global.html). You -# will need version 4.8.6 or higher. - -USE_HTAGS = NO - -# If the VERBATIM_HEADERS tag is set to YES (the default) then Doxygen -# will generate a verbatim copy of the header file for each class for -# which an include is specified. Set to NO to disable this. - -VERBATIM_HEADERS = YES - -#--------------------------------------------------------------------------- -# configuration options related to the alphabetical class index -#--------------------------------------------------------------------------- - -# If the ALPHABETICAL_INDEX tag is set to YES, an alphabetical index -# of all compounds will be generated. Enable this if the project -# contains a lot of classes, structs, unions or interfaces. - -ALPHABETICAL_INDEX = YES - -# If the alphabetical index is enabled (see ALPHABETICAL_INDEX) then -# the COLS_IN_ALPHA_INDEX tag can be used to specify the number of columns -# in which this list will be split (can be a number in the range [1..20]) - -COLS_IN_ALPHA_INDEX = 5 - -# In case all classes in a project start with a common prefix, all -# classes will be put under the same header in the alphabetical index. -# The IGNORE_PREFIX tag can be used to specify one or more prefixes that -# should be ignored while generating the index headers. - -IGNORE_PREFIX = - -#--------------------------------------------------------------------------- -# configuration options related to the HTML output -#--------------------------------------------------------------------------- - -# If the GENERATE_HTML tag is set to YES (the default) Doxygen will -# generate HTML output. - -GENERATE_HTML = YES - -# The HTML_OUTPUT tag is used to specify where the HTML docs will be put. -# If a relative path is entered the value of OUTPUT_DIRECTORY will be -# put in front of it. If left blank `html' will be used as the default path. - -HTML_OUTPUT = html - -# The HTML_FILE_EXTENSION tag can be used to specify the file extension for -# each generated HTML page (for example: .htm,.php,.asp). If it is left blank -# doxygen will generate files with .html extension. - -HTML_FILE_EXTENSION = .html - -# The HTML_HEADER tag can be used to specify a personal HTML header for -# each generated HTML page. If it is left blank doxygen will generate a -# standard header. - -HTML_HEADER = - -# The HTML_FOOTER tag can be used to specify a personal HTML footer for -# each generated HTML page. If it is left blank doxygen will generate a -# standard footer. - -HTML_FOOTER = - -# The HTML_STYLESHEET tag can be used to specify a user-defined cascading -# style sheet that is used by each HTML page. It can be used to -# fine-tune the look of the HTML output. If the tag is left blank doxygen -# will generate a default style sheet. Note that doxygen will try to copy -# the style sheet file to the HTML output directory, so don't put your own -# stylesheet in the HTML output directory as well, or it will be erased! - -HTML_STYLESHEET = - -# The HTML_COLORSTYLE_HUE tag controls the color of the HTML output. -# Doxygen will adjust the colors in the stylesheet and background images -# according to this color. Hue is specified as an angle on a colorwheel, -# see http://en.wikipedia.org/wiki/Hue for more information. -# For instance the value 0 represents red, 60 is yellow, 120 is green, -# 180 is cyan, 240 is blue, 300 purple, and 360 is red again. -# The allowed range is 0 to 359. - -HTML_COLORSTYLE_HUE = 220 - -# The HTML_COLORSTYLE_SAT tag controls the purity (or saturation) of -# the colors in the HTML output. For a value of 0 the output will use -# grayscales only. A value of 255 will produce the most vivid colors. - -HTML_COLORSTYLE_SAT = 100 - -# The HTML_COLORSTYLE_GAMMA tag controls the gamma correction applied to -# the luminance component of the colors in the HTML output. Values below -# 100 gradually make the output lighter, whereas values above 100 make -# the output darker. The value divided by 100 is the actual gamma applied, -# so 80 represents a gamma of 0.8, The value 220 represents a gamma of 2.2, -# and 100 does not change the gamma. - -HTML_COLORSTYLE_GAMMA = 80 - -# If the HTML_TIMESTAMP tag is set to YES then the footer of each generated HTML -# page will contain the date and time when the page was generated. Setting -# this to NO can help when comparing the output of multiple runs. - -HTML_TIMESTAMP = YES - -# If the HTML_ALIGN_MEMBERS tag is set to YES, the members of classes, -# files or namespaces will be aligned in HTML using tables. If set to -# NO a bullet list will be used. - -HTML_ALIGN_MEMBERS = YES - -# If the HTML_DYNAMIC_SECTIONS tag is set to YES then the generated HTML -# documentation will contain sections that can be hidden and shown after the -# page has loaded. For this to work a browser that supports -# JavaScript and DHTML is required (for instance Mozilla 1.0+, Firefox -# Netscape 6.0+, Internet explorer 5.0+, Konqueror, or Safari). - -HTML_DYNAMIC_SECTIONS = NO - -# If the GENERATE_DOCSET tag is set to YES, additional index files -# will be generated that can be used as input for Apple's Xcode 3 -# integrated development environment, introduced with OSX 10.5 (Leopard). -# To create a documentation set, doxygen will generate a Makefile in the -# HTML output directory. Running make will produce the docset in that -# directory and running "make install" will install the docset in -# ~/Library/Developer/Shared/Documentation/DocSets so that Xcode will find -# it at startup. -# See http://developer.apple.com/tools/creatingdocsetswithdoxygen.html -# for more information. - -GENERATE_DOCSET = NO - -# When GENERATE_DOCSET tag is set to YES, this tag determines the name of the -# feed. A documentation feed provides an umbrella under which multiple -# documentation sets from a single provider (such as a company or product suite) -# can be grouped. - -DOCSET_FEEDNAME = "Doxygen generated docs" - -# When GENERATE_DOCSET tag is set to YES, this tag specifies a string that -# should uniquely identify the documentation set bundle. This should be a -# reverse domain-name style string, e.g. com.mycompany.MyDocSet. Doxygen -# will append .docset to the name. - -DOCSET_BUNDLE_ID = org.doxygen.Project - -# When GENERATE_PUBLISHER_ID tag specifies a string that should uniquely identify -# the documentation publisher. This should be a reverse domain-name style -# string, e.g. com.mycompany.MyDocSet.documentation. - -DOCSET_PUBLISHER_ID = org.doxygen.Publisher - -# The GENERATE_PUBLISHER_NAME tag identifies the documentation publisher. - -DOCSET_PUBLISHER_NAME = Publisher - -# If the GENERATE_HTMLHELP tag is set to YES, additional index files -# will be generated that can be used as input for tools like the -# Microsoft HTML help workshop to generate a compiled HTML help file (.chm) -# of the generated HTML documentation. - -GENERATE_HTMLHELP = NO - -# If the GENERATE_HTMLHELP tag is set to YES, the CHM_FILE tag can -# be used to specify the file name of the resulting .chm file. You -# can add a path in front of the file if the result should not be -# written to the html output directory. - -CHM_FILE = - -# If the GENERATE_HTMLHELP tag is set to YES, the HHC_LOCATION tag can -# be used to specify the location (absolute path including file name) of -# the HTML help compiler (hhc.exe). If non-empty doxygen will try to run -# the HTML help compiler on the generated index.hhp. - -HHC_LOCATION = - -# If the GENERATE_HTMLHELP tag is set to YES, the GENERATE_CHI flag -# controls if a separate .chi index file is generated (YES) or that -# it should be included in the master .chm file (NO). - -GENERATE_CHI = NO - -# If the GENERATE_HTMLHELP tag is set to YES, the CHM_INDEX_ENCODING -# is used to encode HtmlHelp index (hhk), content (hhc) and project file -# content. - -CHM_INDEX_ENCODING = - -# If the GENERATE_HTMLHELP tag is set to YES, the BINARY_TOC flag -# controls whether a binary table of contents is generated (YES) or a -# normal table of contents (NO) in the .chm file. - -BINARY_TOC = NO - -# The TOC_EXPAND flag can be set to YES to add extra items for group members -# to the contents of the HTML help documentation and to the tree view. - -TOC_EXPAND = NO - -# If the GENERATE_QHP tag is set to YES and both QHP_NAMESPACE and -# QHP_VIRTUAL_FOLDER are set, an additional index file will be generated -# that can be used as input for Qt's qhelpgenerator to generate a -# Qt Compressed Help (.qch) of the generated HTML documentation. - -GENERATE_QHP = NO - -# If the QHG_LOCATION tag is specified, the QCH_FILE tag can -# be used to specify the file name of the resulting .qch file. -# The path specified is relative to the HTML output folder. - -QCH_FILE = - -# The QHP_NAMESPACE tag specifies the namespace to use when generating -# Qt Help Project output. For more information please see -# http://doc.trolltech.com/qthelpproject.html#namespace - -QHP_NAMESPACE = org.doxygen.Project - -# The QHP_VIRTUAL_FOLDER tag specifies the namespace to use when generating -# Qt Help Project output. For more information please see -# http://doc.trolltech.com/qthelpproject.html#virtual-folders - -QHP_VIRTUAL_FOLDER = doc - -# If QHP_CUST_FILTER_NAME is set, it specifies the name of a custom filter to -# add. For more information please see -# http://doc.trolltech.com/qthelpproject.html#custom-filters - -QHP_CUST_FILTER_NAME = - -# The QHP_CUST_FILT_ATTRS tag specifies the list of the attributes of the -# custom filter to add. For more information please see -# -# Qt Help Project / Custom Filters. - -QHP_CUST_FILTER_ATTRS = - -# The QHP_SECT_FILTER_ATTRS tag specifies the list of the attributes this -# project's -# filter section matches. -# -# Qt Help Project / Filter Attributes. - -QHP_SECT_FILTER_ATTRS = - -# If the GENERATE_QHP tag is set to YES, the QHG_LOCATION tag can -# be used to specify the location of Qt's qhelpgenerator. -# If non-empty doxygen will try to run qhelpgenerator on the generated -# .qhp file. - -QHG_LOCATION = - -# If the GENERATE_ECLIPSEHELP tag is set to YES, additional index files -# will be generated, which together with the HTML files, form an Eclipse help -# plugin. To install this plugin and make it available under the help contents -# menu in Eclipse, the contents of the directory containing the HTML and XML -# files needs to be copied into the plugins directory of eclipse. The name of -# the directory within the plugins directory should be the same as -# the ECLIPSE_DOC_ID value. After copying Eclipse needs to be restarted before -# the help appears. - -GENERATE_ECLIPSEHELP = NO - -# A unique identifier for the eclipse help plugin. When installing the plugin -# the directory name containing the HTML and XML files should also have -# this name. - -ECLIPSE_DOC_ID = org.doxygen.Project - -# The DISABLE_INDEX tag can be used to turn on/off the condensed index at -# top of each HTML page. The value NO (the default) enables the index and -# the value YES disables it. - -DISABLE_INDEX = NO - -# This tag can be used to set the number of enum values (range [1..20]) -# that doxygen will group on one line in the generated HTML documentation. - -ENUM_VALUES_PER_LINE = 4 - -# The GENERATE_TREEVIEW tag is used to specify whether a tree-like index -# structure should be generated to display hierarchical information. -# If the tag value is set to YES, a side panel will be generated -# containing a tree-like index structure (just like the one that -# is generated for HTML Help). For this to work a browser that supports -# JavaScript, DHTML, CSS and frames is required (i.e. any modern browser). -# Windows users are probably better off using the HTML help feature. - -GENERATE_TREEVIEW = NO - -# By enabling USE_INLINE_TREES, doxygen will generate the Groups, Directories, -# and Class Hierarchy pages using a tree view instead of an ordered list. - -USE_INLINE_TREES = NO - -# If the treeview is enabled (see GENERATE_TREEVIEW) then this tag can be -# used to set the initial width (in pixels) of the frame in which the tree -# is shown. - -TREEVIEW_WIDTH = 250 - -# When the EXT_LINKS_IN_WINDOW option is set to YES doxygen will open -# links to external symbols imported via tag files in a separate window. - -EXT_LINKS_IN_WINDOW = NO - -# Use this tag to change the font size of Latex formulas included -# as images in the HTML documentation. The default is 10. Note that -# when you change the font size after a successful doxygen run you need -# to manually remove any form_*.png images from the HTML output directory -# to force them to be regenerated. - -FORMULA_FONTSIZE = 10 - -# Use the FORMULA_TRANPARENT tag to determine whether or not the images -# generated for formulas are transparent PNGs. Transparent PNGs are -# not supported properly for IE 6.0, but are supported on all modern browsers. -# Note that when changing this option you need to delete any form_*.png files -# in the HTML output before the changes have effect. - -FORMULA_TRANSPARENT = YES - -# When the SEARCHENGINE tag is enabled doxygen will generate a search box -# for the HTML output. The underlying search engine uses javascript -# and DHTML and should work on any modern browser. Note that when using -# HTML help (GENERATE_HTMLHELP), Qt help (GENERATE_QHP), or docsets -# (GENERATE_DOCSET) there is already a search function so this one should -# typically be disabled. For large projects the javascript based search engine -# can be slow, then enabling SERVER_BASED_SEARCH may provide a better solution. - -SEARCHENGINE = YES - -# When the SERVER_BASED_SEARCH tag is enabled the search engine will be -# implemented using a PHP enabled web server instead of at the web client -# using Javascript. Doxygen will generate the search PHP script and index -# file to put on the web server. The advantage of the server -# based approach is that it scales better to large projects and allows -# full text search. The disadvances is that it is more difficult to setup -# and does not have live searching capabilities. - -SERVER_BASED_SEARCH = NO - -#--------------------------------------------------------------------------- -# configuration options related to the LaTeX output -#--------------------------------------------------------------------------- - -# If the GENERATE_LATEX tag is set to YES (the default) Doxygen will -# generate Latex output. - -GENERATE_LATEX = NO - -# The LATEX_OUTPUT tag is used to specify where the LaTeX docs will be put. -# If a relative path is entered the value of OUTPUT_DIRECTORY will be -# put in front of it. If left blank `latex' will be used as the default path. - -LATEX_OUTPUT = latex - -# The LATEX_CMD_NAME tag can be used to specify the LaTeX command name to be -# invoked. If left blank `latex' will be used as the default command name. -# Note that when enabling USE_PDFLATEX this option is only used for -# generating bitmaps for formulas in the HTML output, but not in the -# Makefile that is written to the output directory. - -LATEX_CMD_NAME = latex - -# The MAKEINDEX_CMD_NAME tag can be used to specify the command name to -# generate index for LaTeX. If left blank `makeindex' will be used as the -# default command name. - -MAKEINDEX_CMD_NAME = makeindex - -# If the COMPACT_LATEX tag is set to YES Doxygen generates more compact -# LaTeX documents. This may be useful for small projects and may help to -# save some trees in general. - -COMPACT_LATEX = NO - -# The PAPER_TYPE tag can be used to set the paper type that is used -# by the printer. Possible values are: a4, a4wide, letter, legal and -# executive. If left blank a4wide will be used. - -PAPER_TYPE = a4wide - -# The EXTRA_PACKAGES tag can be to specify one or more names of LaTeX -# packages that should be included in the LaTeX output. - -EXTRA_PACKAGES = - -# The LATEX_HEADER tag can be used to specify a personal LaTeX header for -# the generated latex document. The header should contain everything until -# the first chapter. If it is left blank doxygen will generate a -# standard header. Notice: only use this tag if you know what you are doing! - -LATEX_HEADER = - -# If the PDF_HYPERLINKS tag is set to YES, the LaTeX that is generated -# is prepared for conversion to pdf (using ps2pdf). The pdf file will -# contain links (just like the HTML output) instead of page references -# This makes the output suitable for online browsing using a pdf viewer. - -PDF_HYPERLINKS = YES - -# If the USE_PDFLATEX tag is set to YES, pdflatex will be used instead of -# plain latex in the generated Makefile. Set this option to YES to get a -# higher quality PDF documentation. - -USE_PDFLATEX = YES - -# If the LATEX_BATCHMODE tag is set to YES, doxygen will add the \\batchmode. -# command to the generated LaTeX files. This will instruct LaTeX to keep -# running if errors occur, instead of asking the user for help. -# This option is also used when generating formulas in HTML. - -LATEX_BATCHMODE = NO - -# If LATEX_HIDE_INDICES is set to YES then doxygen will not -# include the index chapters (such as File Index, Compound Index, etc.) -# in the output. - -LATEX_HIDE_INDICES = NO - -# If LATEX_SOURCE_CODE is set to YES then doxygen will include -# source code with syntax highlighting in the LaTeX output. -# Note that which sources are shown also depends on other settings -# such as SOURCE_BROWSER. - -LATEX_SOURCE_CODE = NO - -#--------------------------------------------------------------------------- -# configuration options related to the RTF output -#--------------------------------------------------------------------------- - -# If the GENERATE_RTF tag is set to YES Doxygen will generate RTF output -# The RTF output is optimized for Word 97 and may not look very pretty with -# other RTF readers or editors. - -GENERATE_RTF = NO - -# The RTF_OUTPUT tag is used to specify where the RTF docs will be put. -# If a relative path is entered the value of OUTPUT_DIRECTORY will be -# put in front of it. If left blank `rtf' will be used as the default path. - -RTF_OUTPUT = rtf - -# If the COMPACT_RTF tag is set to YES Doxygen generates more compact -# RTF documents. This may be useful for small projects and may help to -# save some trees in general. - -COMPACT_RTF = NO - -# If the RTF_HYPERLINKS tag is set to YES, the RTF that is generated -# will contain hyperlink fields. The RTF file will -# contain links (just like the HTML output) instead of page references. -# This makes the output suitable for online browsing using WORD or other -# programs which support those fields. -# Note: wordpad (write) and others do not support links. - -RTF_HYPERLINKS = NO - -# Load stylesheet definitions from file. Syntax is similar to doxygen's -# config file, i.e. a series of assignments. You only have to provide -# replacements, missing definitions are set to their default value. - -RTF_STYLESHEET_FILE = - -# Set optional variables used in the generation of an rtf document. -# Syntax is similar to doxygen's config file. - -RTF_EXTENSIONS_FILE = - -#--------------------------------------------------------------------------- -# configuration options related to the man page output -#--------------------------------------------------------------------------- - -# If the GENERATE_MAN tag is set to YES (the default) Doxygen will -# generate man pages - -GENERATE_MAN = NO - -# The MAN_OUTPUT tag is used to specify where the man pages will be put. -# If a relative path is entered the value of OUTPUT_DIRECTORY will be -# put in front of it. If left blank `man' will be used as the default path. - -MAN_OUTPUT = man - -# The MAN_EXTENSION tag determines the extension that is added to -# the generated man pages (default is the subroutine's section .3) - -MAN_EXTENSION = .3 - -# If the MAN_LINKS tag is set to YES and Doxygen generates man output, -# then it will generate one additional man file for each entity -# documented in the real man page(s). These additional files -# only source the real man page, but without them the man command -# would be unable to find the correct page. The default is NO. - -MAN_LINKS = NO - -#--------------------------------------------------------------------------- -# configuration options related to the XML output -#--------------------------------------------------------------------------- - -# If the GENERATE_XML tag is set to YES Doxygen will -# generate an XML file that captures the structure of -# the code including all documentation. - -GENERATE_XML = YES - -# The XML_OUTPUT tag is used to specify where the XML pages will be put. -# If a relative path is entered the value of OUTPUT_DIRECTORY will be -# put in front of it. If left blank `xml' will be used as the default path. - -XML_OUTPUT = xml - -# The XML_SCHEMA tag can be used to specify an XML schema, -# which can be used by a validating XML parser to check the -# syntax of the XML files. - -XML_SCHEMA = - -# The XML_DTD tag can be used to specify an XML DTD, -# which can be used by a validating XML parser to check the -# syntax of the XML files. - -XML_DTD = - -# If the XML_PROGRAMLISTING tag is set to YES Doxygen will -# dump the program listings (including syntax highlighting -# and cross-referencing information) to the XML output. Note that -# enabling this will significantly increase the size of the XML output. - -XML_PROGRAMLISTING = YES - -#--------------------------------------------------------------------------- -# configuration options for the AutoGen Definitions output -#--------------------------------------------------------------------------- - -# If the GENERATE_AUTOGEN_DEF tag is set to YES Doxygen will -# generate an AutoGen Definitions (see autogen.sf.net) file -# that captures the structure of the code including all -# documentation. Note that this feature is still experimental -# and incomplete at the moment. - -GENERATE_AUTOGEN_DEF = NO - -#--------------------------------------------------------------------------- -# configuration options related to the Perl module output -#--------------------------------------------------------------------------- - -# If the GENERATE_PERLMOD tag is set to YES Doxygen will -# generate a Perl module file that captures the structure of -# the code including all documentation. Note that this -# feature is still experimental and incomplete at the -# moment. - -GENERATE_PERLMOD = NO - -# If the PERLMOD_LATEX tag is set to YES Doxygen will generate -# the necessary Makefile rules, Perl scripts and LaTeX code to be able -# to generate PDF and DVI output from the Perl module output. - -PERLMOD_LATEX = NO - -# If the PERLMOD_PRETTY tag is set to YES the Perl module output will be -# nicely formatted so it can be parsed by a human reader. This is useful -# if you want to understand what is going on. On the other hand, if this -# tag is set to NO the size of the Perl module output will be much smaller -# and Perl will parse it just the same. - -PERLMOD_PRETTY = YES - -# The names of the make variables in the generated doxyrules.make file -# are prefixed with the string contained in PERLMOD_MAKEVAR_PREFIX. -# This is useful so different doxyrules.make files included by the same -# Makefile don't overwrite each other's variables. - -PERLMOD_MAKEVAR_PREFIX = - -#--------------------------------------------------------------------------- -# Configuration options related to the preprocessor -#--------------------------------------------------------------------------- - -# If the ENABLE_PREPROCESSING tag is set to YES (the default) Doxygen will -# evaluate all C-preprocessor directives found in the sources and include -# files. - -ENABLE_PREPROCESSING = YES - -# If the MACRO_EXPANSION tag is set to YES Doxygen will expand all macro -# names in the source code. If set to NO (the default) only conditional -# compilation will be performed. Macro expansion can be done in a controlled -# way by setting EXPAND_ONLY_PREDEF to YES. - -MACRO_EXPANSION = YES - -# If the EXPAND_ONLY_PREDEF and MACRO_EXPANSION tags are both set to YES -# then the macro expansion is limited to the macros specified with the -# PREDEFINED and EXPAND_AS_DEFINED tags. - -EXPAND_ONLY_PREDEF = YES - -# If the SEARCH_INCLUDES tag is set to YES (the default) the includes files -# in the INCLUDE_PATH (see below) will be search if a #include is found. - -SEARCH_INCLUDES = NO - -# The INCLUDE_PATH tag can be used to specify one or more directories that -# contain include files that are not input files but should be processed by -# the preprocessor. - -INCLUDE_PATH = - -# You can use the INCLUDE_FILE_PATTERNS tag to specify one or more wildcard -# patterns (like *.h and *.hpp) to filter out the header-files in the -# directories. If left blank, the patterns specified with FILE_PATTERNS will -# be used. - -INCLUDE_FILE_PATTERNS = - -# The PREDEFINED tag can be used to specify one or more macro names that -# are defined before the preprocessor is started (similar to the -D option of -# gcc). The argument of the tag is a list of macros of the form: name -# or name=definition (no spaces). If the definition and the = are -# omitted =1 is assumed. To prevent a macro definition from being -# undefined via #undef or recursively expanded use the := operator -# instead of the = operator. - -PREDEFINED = __attribute__()= \ - __deprecated= \ - __always_inline= \ - __packed = \ - __weak = \ - __cplusplus \ - STM32_MEDIUM_DENSITY \ - STM32_HIGH_DENSITY \ - STM32_XL_DENSITY \ - PCLK1=0 STM32_PCLK1=0 \ - PCLK2=0 STM32_PCLK2=0 \ - STM32_HAVE_TIMER(x)=1 \ - __DOXYGEN__ - -# If the MACRO_EXPANSION and EXPAND_ONLY_PREDEF tags are set to YES then -# this tag can be used to specify a list of macro names that should be expanded. -# The macro definition that is found in the sources will be used. -# Use the PREDEFINED tag if you want to use a different macro definition. - -EXPAND_AS_DEFINED = - -# If the SKIP_FUNCTION_MACROS tag is set to YES (the default) then -# doxygen's preprocessor will remove all function-like macros that are alone -# on a line, have an all uppercase name, and do not end with a semicolon. Such -# function macros are typically used for boiler-plate code, and will confuse -# the parser if not removed. - -SKIP_FUNCTION_MACROS = YES - -#--------------------------------------------------------------------------- -# Configuration::additions related to external references -#--------------------------------------------------------------------------- - -# The TAGFILES option can be used to specify one or more tagfiles. -# Optionally an initial location of the external documentation -# can be added for each tagfile. The format of a tag file without -# this location is as follows: -# TAGFILES = file1 file2 ... -# Adding location for the tag files is done as follows: -# TAGFILES = file1=loc1 "file2 = loc2" ... -# where "loc1" and "loc2" can be relative or absolute paths or -# URLs. If a location is present for each tag, the installdox tool -# does not have to be run to correct the links. -# Note that each tag file must have a unique name -# (where the name does NOT include the path) -# If a tag file is not located in the directory in which doxygen -# is run, you must also specify the path to the tagfile here. - -TAGFILES = - -# When a file name is specified after GENERATE_TAGFILE, doxygen will create -# a tag file that is based on the input files it reads. - -GENERATE_TAGFILE = - -# If the ALLEXTERNALS tag is set to YES all external classes will be listed -# in the class index. If set to NO only the inherited external classes -# will be listed. - -ALLEXTERNALS = NO - -# If the EXTERNAL_GROUPS tag is set to YES all external groups will be listed -# in the modules index. If set to NO, only the current project's groups will -# be listed. - -EXTERNAL_GROUPS = YES - -# The PERL_PATH should be the absolute path and name of the perl script -# interpreter (i.e. the result of `which perl'). - -PERL_PATH = /usr/bin/perl - -#--------------------------------------------------------------------------- -# Configuration options related to the dot tool -#--------------------------------------------------------------------------- - -# If the CLASS_DIAGRAMS tag is set to YES (the default) Doxygen will -# generate a inheritance diagram (in HTML, RTF and LaTeX) for classes with base -# or super classes. Setting the tag to NO turns the diagrams off. Note that -# this option is superseded by the HAVE_DOT option below. This is only a -# fallback. It is recommended to install and use dot, since it yields more -# powerful graphs. - -CLASS_DIAGRAMS = NO - -# You can define message sequence charts within doxygen comments using the \msc -# command. Doxygen will then run the mscgen tool (see -# http://www.mcternan.me.uk/mscgen/) to produce the chart and insert it in the -# documentation. The MSCGEN_PATH tag allows you to specify the directory where -# the mscgen tool resides. If left empty the tool is assumed to be found in the -# default search path. - -MSCGEN_PATH = - -# If set to YES, the inheritance and collaboration graphs will hide -# inheritance and usage relations if the target is undocumented -# or is not a class. - -HIDE_UNDOC_RELATIONS = YES - -# If you set the HAVE_DOT tag to YES then doxygen will assume the dot tool is -# available from the path. This tool is part of Graphviz, a graph visualization -# toolkit from AT&T and Lucent Bell Labs. The other options in this section -# have no effect if this option is set to NO (the default) - -HAVE_DOT = NO - -# The DOT_NUM_THREADS specifies the number of dot invocations doxygen is -# allowed to run in parallel. When set to 0 (the default) doxygen will -# base this on the number of processors available in the system. You can set it -# explicitly to a value larger than 0 to get control over the balance -# between CPU load and processing speed. - -DOT_NUM_THREADS = 0 - -# By default doxygen will write a font called FreeSans.ttf to the output -# directory and reference it in all dot files that doxygen generates. This -# font does not include all possible unicode characters however, so when you need -# these (or just want a differently looking font) you can specify the font name -# using DOT_FONTNAME. You need need to make sure dot is able to find the font, -# which can be done by putting it in a standard location or by setting the -# DOTFONTPATH environment variable or by setting DOT_FONTPATH to the directory -# containing the font. - -DOT_FONTNAME = FreeSans.ttf - -# The DOT_FONTSIZE tag can be used to set the size of the font of dot graphs. -# The default size is 10pt. - -DOT_FONTSIZE = 10 - -# By default doxygen will tell dot to use the output directory to look for the -# FreeSans.ttf font (which doxygen will put there itself). If you specify a -# different font using DOT_FONTNAME you can set the path where dot -# can find it using this tag. - -DOT_FONTPATH = - -# If the CLASS_GRAPH and HAVE_DOT tags are set to YES then doxygen -# will generate a graph for each documented class showing the direct and -# indirect inheritance relations. Setting this tag to YES will force the -# the CLASS_DIAGRAMS tag to NO. - -CLASS_GRAPH = NO - -# If the COLLABORATION_GRAPH and HAVE_DOT tags are set to YES then doxygen -# will generate a graph for each documented class showing the direct and -# indirect implementation dependencies (inheritance, containment, and -# class references variables) of the class with other documented classes. - -COLLABORATION_GRAPH = NO - -# If the GROUP_GRAPHS and HAVE_DOT tags are set to YES then doxygen -# will generate a graph for groups, showing the direct groups dependencies - -GROUP_GRAPHS = NO - -# If the UML_LOOK tag is set to YES doxygen will generate inheritance and -# collaboration diagrams in a style similar to the OMG's Unified Modeling -# Language. - -UML_LOOK = NO - -# If set to YES, the inheritance and collaboration graphs will show the -# relations between templates and their instances. - -TEMPLATE_RELATIONS = NO - -# If the ENABLE_PREPROCESSING, SEARCH_INCLUDES, INCLUDE_GRAPH, and HAVE_DOT -# tags are set to YES then doxygen will generate a graph for each documented -# file showing the direct and indirect include dependencies of the file with -# other documented files. - -INCLUDE_GRAPH = YES - -# If the ENABLE_PREPROCESSING, SEARCH_INCLUDES, INCLUDED_BY_GRAPH, and -# HAVE_DOT tags are set to YES then doxygen will generate a graph for each -# documented header file showing the documented files that directly or -# indirectly include this file. - -INCLUDED_BY_GRAPH = YES - -# If the CALL_GRAPH and HAVE_DOT options are set to YES then -# doxygen will generate a call dependency graph for every global function -# or class method. Note that enabling this option will significantly increase -# the time of a run. So in most cases it will be better to enable call graphs -# for selected functions only using the \callgraph command. - -CALL_GRAPH = NO - -# If the CALLER_GRAPH and HAVE_DOT tags are set to YES then -# doxygen will generate a caller dependency graph for every global function -# or class method. Note that enabling this option will significantly increase -# the time of a run. So in most cases it will be better to enable caller -# graphs for selected functions only using the \callergraph command. - -CALLER_GRAPH = NO - -# If the GRAPHICAL_HIERARCHY and HAVE_DOT tags are set to YES then doxygen -# will graphical hierarchy of all classes instead of a textual one. - -GRAPHICAL_HIERARCHY = YES - -# If the DIRECTORY_GRAPH, SHOW_DIRECTORIES and HAVE_DOT tags are set to YES -# then doxygen will show the dependencies a directory has on other directories -# in a graphical way. The dependency relations are determined by the #include -# relations between the files in the directories. - -DIRECTORY_GRAPH = YES - -# The DOT_IMAGE_FORMAT tag can be used to set the image format of the images -# generated by dot. Possible values are png, jpg, or gif -# If left blank png will be used. - -DOT_IMAGE_FORMAT = png - -# The tag DOT_PATH can be used to specify the path where the dot tool can be -# found. If left blank, it is assumed the dot tool can be found in the path. - -DOT_PATH = - -# The DOTFILE_DIRS tag can be used to specify one or more directories that -# contain dot files that are included in the documentation (see the -# \dotfile command). - -DOTFILE_DIRS = - -# The DOT_GRAPH_MAX_NODES tag can be used to set the maximum number of -# nodes that will be shown in the graph. If the number of nodes in a graph -# becomes larger than this value, doxygen will truncate the graph, which is -# visualized by representing a node as a red box. Note that doxygen if the -# number of direct children of the root node in a graph is already larger than -# DOT_GRAPH_MAX_NODES then the graph will not be shown at all. Also note -# that the size of a graph can be further restricted by MAX_DOT_GRAPH_DEPTH. - -DOT_GRAPH_MAX_NODES = 50 - -# The MAX_DOT_GRAPH_DEPTH tag can be used to set the maximum depth of the -# graphs generated by dot. A depth value of 3 means that only nodes reachable -# from the root by following a path via at most 3 edges will be shown. Nodes -# that lay further from the root node will be omitted. Note that setting this -# option to 1 or 2 may greatly reduce the computation time needed for large -# code bases. Also note that the size of a graph can be further restricted by -# DOT_GRAPH_MAX_NODES. Using a depth of 0 means no depth restriction. - -MAX_DOT_GRAPH_DEPTH = 0 - -# Set the DOT_TRANSPARENT tag to YES to generate images with a transparent -# background. This is disabled by default, because dot on Windows does not -# seem to support this out of the box. Warning: Depending on the platform used, -# enabling this option may lead to badly anti-aliased labels on the edges of -# a graph (i.e. they become hard to read). - -DOT_TRANSPARENT = NO - -# Set the DOT_MULTI_TARGETS tag to YES allow dot to generate multiple output -# files in one run (i.e. multiple -o and -T options on the command line). This -# makes dot run faster, but since only newer versions of dot (>1.8.10) -# support this, this feature is disabled by default. - -DOT_MULTI_TARGETS = NO - -# If the GENERATE_LEGEND tag is set to YES (the default) Doxygen will -# generate a legend page explaining the meaning of the various boxes and -# arrows in the dot generated graphs. - -GENERATE_LEGEND = YES - -# If the DOT_CLEANUP tag is set to YES (the default) Doxygen will -# remove the intermediate dot files that are used to generate -# the various graphs. - -DOT_CLEANUP = YES diff --git a/STM32F1/system/support/doxygen/evil_mangler.awk b/STM32F1/system/support/doxygen/evil_mangler.awk deleted file mode 100644 index b07da72..0000000 --- a/STM32F1/system/support/doxygen/evil_mangler.awk +++ /dev/null @@ -1,38 +0,0 @@ -#!/usr/bin/awk -f - -# libmaple's own Evil Mangler -# -# Input filter hack to trick Doxygen into thinking that a series -# header is in a separate namespace. This is necessary because Doxygen -# doesn't know how to cope with two data structures with the same name -# in different places in the project. (We do that all the time, -# e.g. for foo_reg_map structs.) -# -# E.g., an STM32F1 header gets transformed into: -# -# namespace stm32f1 { -# -# } - -BEGIN { - # For extracting series component from header FILENAME. - series_regex = "/stm32[flw][0-9]*/"; - # Holds header FILENAME. Cargo-culted; not sure why it's necessary. - f = ""; - # Holds series component. - series = ""; -} -{ - if (f != FILENAME) { - f = FILENAME; - match(f, series_regex); - series = substr(f, RSTART + 1, RLENGTH - 2); - printf("namespace %s {\n", series); - } - print; -} -END { - if (series != "") { - print "}" - } -} diff --git a/STM32F1/system/support/gdb/gpio/gpio.gdb b/STM32F1/system/support/gdb/gpio/gpio.gdb deleted file mode 100644 index 4376cfd..0000000 --- a/STM32F1/system/support/gdb/gpio/gpio.gdb +++ /dev/null @@ -1,12 +0,0 @@ -set print pretty on - -print "GPIOA registers:" -p/x *GPIOA->regs -print "GPIOB registers:" -p/x *GPIOB->regs -print "GPIOC registers:" -p/x *GPIOC->regs -print "GPIOD registers:" -p/x *GPIOD->regs -print "AFIO registers:" -p/x *(struct afio_reg_map*)0x40010000 diff --git a/STM32F1/system/support/gdb/i2c/test.gdb b/STM32F1/system/support/gdb/i2c/test.gdb deleted file mode 100644 index 8b71320..0000000 --- a/STM32F1/system/support/gdb/i2c/test.gdb +++ /dev/null @@ -1,112 +0,0 @@ -define i2c_sr1_flags -set $s = $arg0 -printf "SR1: " - -if (($s & (1 << 15))) - printf "SMBALERT " -end - -if (($s & (1 << 14))) - printf "TIMEOUT " -end - -if (($s & (1 << 12))) - printf "PECERR " -end - -if (($s & (1 << 11))) - printf "OVR " -end - -if (($s & (1 << 10))) - printf "AF " -end - -if (($s & (1 << 9))) - printf "ARLO " -end - -if (($s & (1 << 8))) - printf "BERR " -end - -if (($s & (1 << 7))) - printf "TXE " -end - -if (($s & (1 << 6))) - printf "RXNE " -end - -if (($s & (1 << 4))) - printf "STOPF " -end - -if (($s & (1 << 3))) - printf "ADD10 " -end - -if (($s & (1 << 2))) - printf "BTF " -end - -if (($s & (1 << 1))) - printf "ADDR " -end - -if (($s & (1 << 0))) - printf "SB " -end -end - -define i2c_sr2_flags -set $s = $arg0 -printf "SR2: " - -if (($s & (1 << 7))) - printf "DUALF " -end - -if (($s & (1 << 6))) - printf "SMBHOST " -end - -if (($s & (1 << 5))) - printf "SMBDEFAULT " -end - -if (($s & (1 << 4))) - printf "GENCALL " -end - - -if (($s & (1 << 2))) - printf "TRA " -end - -if (($s & (1 << 1))) - printf "BUSY " -end - -if (($s & (1 << 0))) - printf "MSL " -end - -end - -define pbc -set $c = crumbs -while ($c->event) - if ($c->event != 0) - printf "Event: %d ", $c->event - if ($c->event == 1) - i2c_sr1_flags $c->sr1 - printf "\t" - i2c_sr2_flags $c->sr2 - end - printf "\n" - end - set $c = $c + 1 -end - - diff --git a/STM32F1/system/support/ld/common.inc b/STM32F1/system/support/ld/common.inc deleted file mode 100644 index f5a0f5b..0000000 --- a/STM32F1/system/support/ld/common.inc +++ /dev/null @@ -1,219 +0,0 @@ -/* - * Linker script for libmaple. - * - * Original author "lanchon" from ST forums, with modifications by LeafLabs. - */ - -OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm") - -/* - * Configure other libraries we want in the link. - * - * libgcc, libc, and libm are common across supported toolchains. - * However, some toolchains require additional archives which aren't - * present everywhere (e.g. ARM's gcc-arm-embedded releases). - * - * To hack around this, we let the build system specify additional - * archives by putting the right extra_libs.inc (in a directory under - * toolchains/) in our search path. - */ -GROUP(libgcc.a libc.a libm.a) -INCLUDE extra_libs.inc - -/* - * These force the linker to search for vector table symbols. - * - * These symbols vary by STM32 family (and also within families). - * It's up to the build system to configure the link's search path - * properly for the target MCU. - */ -INCLUDE vector_symbols.inc - -/* STM32 vector table. */ -EXTERN(__stm32_vector_table) - -/* C runtime initialization function. */ -EXTERN(start_c) - -/* main entry point */ -EXTERN(main) - -/* Initial stack pointer value. */ -EXTERN(__msp_init) -PROVIDE(__msp_init = ORIGIN(ram) + LENGTH(ram)); - -/* Reset vector and chip reset entry point */ -EXTERN(__start__) -ENTRY(__start__) -PROVIDE(__exc_reset = __start__); - -/* Heap boundaries, for libmaple */ -EXTERN(_lm_heap_start); -EXTERN(_lm_heap_end); - -SECTIONS -{ - .text : - { - __text_start__ = .; - /* - * STM32 vector table. Leave this here. Yes, really. - */ - *(.stm32.interrupt_vector) - - /* - * Program code and vague linking - */ - *(.text .text.* .gnu.linkonce.t.*) - *(.plt) - *(.gnu.warning) - *(.glue_7t) *(.glue_7) *(.vfp11_veneer) - - *(.ARM.extab* .gnu.linkonce.armextab.*) - *(.gcc_except_table) - *(.eh_frame_hdr) - *(.eh_frame) - - . = ALIGN(4); - KEEP(*(.init)) - - . = ALIGN(4); - __preinit_array_start = .; - KEEP (*(.preinit_array)) - __preinit_array_end = .; - - . = ALIGN(4); - __init_array_start = .; - KEEP (*(SORT(.init_array.*))) - KEEP (*(.init_array)) - __init_array_end = .; - - . = ALIGN(0x4); - KEEP (*crtbegin.o(.ctors)) - KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors)) - KEEP (*(SORT(.ctors.*))) - KEEP (*crtend.o(.ctors)) - - . = ALIGN(4); - KEEP(*(.fini)) - - . = ALIGN(4); - __fini_array_start = .; - KEEP (*(.fini_array)) - KEEP (*(SORT(.fini_array.*))) - __fini_array_end = .; - - KEEP (*crtbegin.o(.dtors)) - KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors)) - KEEP (*(SORT(.dtors.*))) - KEEP (*crtend.o(.dtors)) - } > REGION_TEXT - - /* - * End of text - */ - .text.align : - { - . = ALIGN(8); - __text_end__ = .; - } > REGION_TEXT - - /* - * .ARM.exidx exception unwinding; mandated by ARM's C++ ABI - */ - __exidx_start = .; - .ARM.exidx : - { - *(.ARM.exidx* .gnu.linkonce.armexidx.*) - } > REGION_RODATA - __exidx_end = .; - - /* - * .data - */ - .data : - { - . = ALIGN(8); - __data_start__ = .; - - *(.got.plt) *(.got) - *(.data .data.* .gnu.linkonce.d.*) - - . = ALIGN(8); - __data_end__ = .; - } > REGION_DATA AT> REGION_RODATA - - /* - * Read-only data - */ - .rodata : - { - *(.rodata .rodata.* .gnu.linkonce.r.*) - /* .USER_FLASH: We allow users to allocate into Flash here */ - *(.USER_FLASH) - /* ROM image configuration; for C startup */ - . = ALIGN(4); - _lm_rom_img_cfgp = .; - LONG(LOADADDR(.data)); - /* - * Heap: Linker scripts may choose a custom heap by overriding - * _lm_heap_start and _lm_heap_end. Otherwise, the heap is in - * internal SRAM, beginning after .bss, and growing towards - * the stack. - * - * I'm shoving these here naively; there's probably a cleaner way - * to go about this. [mbolivar] - */ - _lm_heap_start = DEFINED(_lm_heap_start) ? _lm_heap_start : _end; - _lm_heap_end = DEFINED(_lm_heap_end) ? _lm_heap_end : __msp_init; - } > REGION_RODATA - - /* - * .bss - */ - .bss : - { - . = ALIGN(8); - __bss_start__ = .; - *(.bss .bss.* .gnu.linkonce.b.*) - *(COMMON) - . = ALIGN (8); - __bss_end__ = .; - _end = __bss_end__; - } > REGION_BSS - - /* - * Debugging sections - */ - .stab 0 (NOLOAD) : { *(.stab) } - .stabstr 0 (NOLOAD) : { *(.stabstr) } - /* DWARF debug sections. - * Symbols in the DWARF debugging sections are relative to the beginning - * of the section so we begin them at 0. */ - /* DWARF 1 */ - .debug 0 : { *(.debug) } - .line 0 : { *(.line) } - /* GNU DWARF 1 extensions */ - .debug_srcinfo 0 : { *(.debug_srcinfo) } - .debug_sfnames 0 : { *(.debug_sfnames) } - /* DWARF 1.1 and DWARF 2 */ - .debug_aranges 0 : { *(.debug_aranges) } - .debug_pubnames 0 : { *(.debug_pubnames) } - /* DWARF 2 */ - .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } - .debug_abbrev 0 : { *(.debug_abbrev) } - .debug_line 0 : { *(.debug_line) } - .debug_frame 0 : { *(.debug_frame) } - .debug_str 0 : { *(.debug_str) } - .debug_loc 0 : { *(.debug_loc) } - .debug_macinfo 0 : { *(.debug_macinfo) } - /* SGI/MIPS DWARF 2 extensions */ - .debug_weaknames 0 : { *(.debug_weaknames) } - .debug_funcnames 0 : { *(.debug_funcnames) } - .debug_typenames 0 : { *(.debug_typenames) } - .debug_varnames 0 : { *(.debug_varnames) } - - .note.gnu.arm.ident 0 : { KEEP (*(.note.gnu.arm.ident)) } - .ARM.attributes 0 : { KEEP (*(.ARM.attributes)) } - /DISCARD/ : { *(.note.GNU-stack) } -} diff --git a/STM32F1/system/support/ld/flash.ld b/STM32F1/system/support/ld/flash.ld deleted file mode 100644 index 9e250cd..0000000 --- a/STM32F1/system/support/ld/flash.ld +++ /dev/null @@ -1,26 +0,0 @@ -/* - * libmaple linker script for "Flash" builds. - * - * A Flash build puts .text (and .rodata) in Flash, and - * .data/.bss/heap (of course) in SRAM, but offsets the sections by - * enough space to store the Maple bootloader, which lives in low - * Flash and uses low memory. - */ - -/* - * This pulls in the appropriate MEMORY declaration from the right - * subdirectory of stm32/mem/ (the environment must call ld with the - * right include directory flags to make this happen). Boards can also - * use this file to use any of libmaple's memory-related hooks (like - * where the heap should live). - */ -INCLUDE mem-flash.inc - -/* Provide memory region aliases for common.inc */ -REGION_ALIAS("REGION_TEXT", rom); -REGION_ALIAS("REGION_DATA", ram); -REGION_ALIAS("REGION_BSS", ram); -REGION_ALIAS("REGION_RODATA", rom); - -/* Let common.inc handle the real work. */ -INCLUDE common.inc diff --git a/STM32F1/system/support/ld/jtag.ld b/STM32F1/system/support/ld/jtag.ld deleted file mode 100644 index 0612f95..0000000 --- a/STM32F1/system/support/ld/jtag.ld +++ /dev/null @@ -1,31 +0,0 @@ -/* - * libmaple linker script for "JTAG" builds. - * - * A "JTAG" build puts .text (and .rodata) in Flash, and - * .data/.bss/heap (of course) in SRAM, but links starting at the - * Flash and SRAM starting addresses (0x08000000 and 0x20000000 - * respectively). This will wipe out a Maple bootloader if there's one - * on the board, so only use this if you know what you're doing. - * - * Of course, a "JTAG" build is perfectly usable for upload over SWD, - * the system memory bootloader, etc. The name is just a historical - * artifact. - */ - -/* - * This pulls in the appropriate MEMORY declaration from the right - * subdirectory of stm32/mem/ (the environment must call ld with the - * right include directory flags to make this happen). Boards can also - * use this file to use any of libmaple's memory-related hooks (like - * where the heap should live). - */ -INCLUDE mem-jtag.inc - -/* Provide memory region aliases for common.inc */ -REGION_ALIAS("REGION_TEXT", rom); -REGION_ALIAS("REGION_DATA", ram); -REGION_ALIAS("REGION_BSS", ram); -REGION_ALIAS("REGION_RODATA", rom); - -/* Let common.inc handle the real work. */ -INCLUDE common.inc diff --git a/STM32F1/system/support/ld/ram.ld b/STM32F1/system/support/ld/ram.ld deleted file mode 100644 index 34b468e..0000000 --- a/STM32F1/system/support/ld/ram.ld +++ /dev/null @@ -1,25 +0,0 @@ -/* - * libmaple linker script for RAM builds. - * - * A Flash build puts .text, .rodata, and .data/.bss/heap (of course) - * in SRAM, but offsets the sections by enough space to store the - * Maple bootloader, which uses low memory. - */ - -/* - * This pulls in the appropriate MEMORY declaration from the right - * subdirectory of stm32/mem/ (the environment must call ld with the - * right include directory flags to make this happen). Boards can also - * use this file to use any of libmaple's memory-related hooks (like - * where the heap should live). - */ -INCLUDE mem-ram.inc - -/* Provide memory region aliases for common.inc */ -REGION_ALIAS("REGION_TEXT", ram); -REGION_ALIAS("REGION_DATA", ram); -REGION_ALIAS("REGION_BSS", ram); -REGION_ALIAS("REGION_RODATA", ram); - -/* Let common.inc handle the real work. */ -INCLUDE common.inc diff --git a/STM32F1/system/support/ld/stm32/mem/maple_native/maple_native_heap.inc b/STM32F1/system/support/ld/stm32/mem/maple_native/maple_native_heap.inc deleted file mode 100644 index 34b5a2d..0000000 --- a/STM32F1/system/support/ld/stm32/mem/maple_native/maple_native_heap.inc +++ /dev/null @@ -1,3 +0,0 @@ -/* Specify heap boundary addresses on the external SRAM chip */ -_lm_heap_start = 0x60000000; -_lm_heap_end = 0x60100000; diff --git a/STM32F1/system/support/ld/stm32/mem/maple_native/mem-flash.inc b/STM32F1/system/support/ld/stm32/mem/maple_native/mem-flash.inc deleted file mode 100644 index bae4f39..0000000 --- a/STM32F1/system/support/ld/stm32/mem/maple_native/mem-flash.inc +++ /dev/null @@ -1,7 +0,0 @@ -MEMORY -{ - ram (rwx) : ORIGIN = 0x20000C00, LENGTH = 61K - rom (rx) : ORIGIN = 0x08005000, LENGTH = 492K -} - -INCLUDE maple_native_heap.inc diff --git a/STM32F1/system/support/ld/stm32/mem/maple_native/mem-jtag.inc b/STM32F1/system/support/ld/stm32/mem/maple_native/mem-jtag.inc deleted file mode 100644 index 508ed44..0000000 --- a/STM32F1/system/support/ld/stm32/mem/maple_native/mem-jtag.inc +++ /dev/null @@ -1,7 +0,0 @@ -MEMORY -{ - ram (rwx) : ORIGIN = 0x20000000, LENGTH = 64K - rom (rx) : ORIGIN = 0x08000000, LENGTH = 512K -} - -INCLUDE maple_native_heap.inc diff --git a/STM32F1/system/support/ld/stm32/mem/maple_native/mem-ram.inc b/STM32F1/system/support/ld/stm32/mem/maple_native/mem-ram.inc deleted file mode 100644 index 6ae11ef..0000000 --- a/STM32F1/system/support/ld/stm32/mem/maple_native/mem-ram.inc +++ /dev/null @@ -1,7 +0,0 @@ -MEMORY -{ - ram (rwx) : ORIGIN = 0x20000C00, LENGTH = 61K - rom (rx) : ORIGIN = 0x08005000, LENGTH = 0K -} - -INCLUDE maple_native_heap.inc diff --git a/STM32F1/system/support/ld/stm32/mem/sram_112k_flash_1024k/mem-jtag.inc b/STM32F1/system/support/ld/stm32/mem/sram_112k_flash_1024k/mem-jtag.inc deleted file mode 100644 index e0d2da1..0000000 --- a/STM32F1/system/support/ld/stm32/mem/sram_112k_flash_1024k/mem-jtag.inc +++ /dev/null @@ -1,5 +0,0 @@ -MEMORY -{ - ram (rwx) : ORIGIN = 0x20000000, LENGTH = 112K - rom (rx) : ORIGIN = 0x08000000, LENGTH = 1024K -} diff --git a/STM32F1/system/support/ld/stm32/mem/sram_112k_flash_1024k/mem-ram.inc b/STM32F1/system/support/ld/stm32/mem/sram_112k_flash_1024k/mem-ram.inc deleted file mode 100644 index d21f17c..0000000 --- a/STM32F1/system/support/ld/stm32/mem/sram_112k_flash_1024k/mem-ram.inc +++ /dev/null @@ -1,5 +0,0 @@ -MEMORY -{ - ram (rwx) : ORIGIN = 0x20000000, LENGTH = 112K - rom (rx) : ORIGIN = 0x08000000, LENGTH = 0K -} diff --git a/STM32F1/system/support/ld/stm32/mem/sram_20k_flash_128k/mem-flash.inc b/STM32F1/system/support/ld/stm32/mem/sram_20k_flash_128k/mem-flash.inc deleted file mode 100644 index a9091ca..0000000 --- a/STM32F1/system/support/ld/stm32/mem/sram_20k_flash_128k/mem-flash.inc +++ /dev/null @@ -1,5 +0,0 @@ -MEMORY -{ - ram (rwx) : ORIGIN = 0x20000C00, LENGTH = 17K - rom (rx) : ORIGIN = 0x08005000, LENGTH = 108K -} diff --git a/STM32F1/system/support/ld/stm32/mem/sram_20k_flash_128k/mem-jtag.inc b/STM32F1/system/support/ld/stm32/mem/sram_20k_flash_128k/mem-jtag.inc deleted file mode 100644 index 20fbec0..0000000 --- a/STM32F1/system/support/ld/stm32/mem/sram_20k_flash_128k/mem-jtag.inc +++ /dev/null @@ -1,5 +0,0 @@ -MEMORY -{ - ram (rwx) : ORIGIN = 0x20000000, LENGTH = 20K - rom (rx) : ORIGIN = 0x08000000, LENGTH = 128K -} diff --git a/STM32F1/system/support/ld/stm32/mem/sram_20k_flash_128k/mem-ram.inc b/STM32F1/system/support/ld/stm32/mem/sram_20k_flash_128k/mem-ram.inc deleted file mode 100644 index f02453b..0000000 --- a/STM32F1/system/support/ld/stm32/mem/sram_20k_flash_128k/mem-ram.inc +++ /dev/null @@ -1,5 +0,0 @@ -MEMORY -{ - ram (rwx) : ORIGIN = 0x20000C00, LENGTH = 17K - rom (rx) : ORIGIN = 0x08005000, LENGTH = 0K -} diff --git a/STM32F1/system/support/ld/stm32/mem/sram_20k_flash_128k_robotis/mem-flash.inc b/STM32F1/system/support/ld/stm32/mem/sram_20k_flash_128k_robotis/mem-flash.inc deleted file mode 100644 index 2c03ea9..0000000 --- a/STM32F1/system/support/ld/stm32/mem/sram_20k_flash_128k_robotis/mem-flash.inc +++ /dev/null @@ -1,5 +0,0 @@ -MEMORY -{ - ram (rwx) : ORIGIN = 0x20000C00, LENGTH = 17K - rom (rx) : ORIGIN = 0x08003000, LENGTH = 108K -} diff --git a/STM32F1/system/support/ld/stm32/mem/sram_20k_flash_128k_robotis/mem-jtag.inc b/STM32F1/system/support/ld/stm32/mem/sram_20k_flash_128k_robotis/mem-jtag.inc deleted file mode 100644 index 20fbec0..0000000 --- a/STM32F1/system/support/ld/stm32/mem/sram_20k_flash_128k_robotis/mem-jtag.inc +++ /dev/null @@ -1,5 +0,0 @@ -MEMORY -{ - ram (rwx) : ORIGIN = 0x20000000, LENGTH = 20K - rom (rx) : ORIGIN = 0x08000000, LENGTH = 128K -} diff --git a/STM32F1/system/support/ld/stm32/mem/sram_20k_flash_128k_robotis/mem-ram.inc b/STM32F1/system/support/ld/stm32/mem/sram_20k_flash_128k_robotis/mem-ram.inc deleted file mode 100644 index f02453b..0000000 --- a/STM32F1/system/support/ld/stm32/mem/sram_20k_flash_128k_robotis/mem-ram.inc +++ /dev/null @@ -1,5 +0,0 @@ -MEMORY -{ - ram (rwx) : ORIGIN = 0x20000C00, LENGTH = 17K - rom (rx) : ORIGIN = 0x08005000, LENGTH = 0K -} diff --git a/STM32F1/system/support/ld/stm32/mem/sram_64k_flash_512k/mem-flash.inc b/STM32F1/system/support/ld/stm32/mem/sram_64k_flash_512k/mem-flash.inc deleted file mode 100644 index ddb8876..0000000 --- a/STM32F1/system/support/ld/stm32/mem/sram_64k_flash_512k/mem-flash.inc +++ /dev/null @@ -1,5 +0,0 @@ -MEMORY -{ - ram (rwx) : ORIGIN = 0x20000C00, LENGTH = 61K - rom (rx) : ORIGIN = 0x08005000, LENGTH = 492K -} diff --git a/STM32F1/system/support/ld/stm32/mem/sram_64k_flash_512k/mem-jtag.inc b/STM32F1/system/support/ld/stm32/mem/sram_64k_flash_512k/mem-jtag.inc deleted file mode 100644 index d3ed992..0000000 --- a/STM32F1/system/support/ld/stm32/mem/sram_64k_flash_512k/mem-jtag.inc +++ /dev/null @@ -1,5 +0,0 @@ -MEMORY -{ - ram (rwx) : ORIGIN = 0x20000000, LENGTH = 64K - rom (rx) : ORIGIN = 0x08000000, LENGTH = 512K -} diff --git a/STM32F1/system/support/ld/stm32/mem/sram_64k_flash_512k/mem-ram.inc b/STM32F1/system/support/ld/stm32/mem/sram_64k_flash_512k/mem-ram.inc deleted file mode 100644 index 360beaf..0000000 --- a/STM32F1/system/support/ld/stm32/mem/sram_64k_flash_512k/mem-ram.inc +++ /dev/null @@ -1,5 +0,0 @@ -MEMORY -{ - ram (rwx) : ORIGIN = 0x20000C00, LENGTH = 61K - rom (rx) : ORIGIN = 0x08005000, LENGTH = 0K -} diff --git a/STM32F1/system/support/ld/stm32/mem/sram_8k_flash_128k/mem-flash.inc b/STM32F1/system/support/ld/stm32/mem/sram_8k_flash_128k/mem-flash.inc deleted file mode 100644 index 19372b7..0000000 --- a/STM32F1/system/support/ld/stm32/mem/sram_8k_flash_128k/mem-flash.inc +++ /dev/null @@ -1,5 +0,0 @@ -MEMORY -{ - ram (rwx) : ORIGIN = 0x20000000, LENGTH = 8K - rom (rx) : ORIGIN = 0x08000000, LENGTH = 128K -} diff --git a/STM32F1/system/support/ld/stm32/mem/sram_8k_flash_128k/mem-jtag.inc b/STM32F1/system/support/ld/stm32/mem/sram_8k_flash_128k/mem-jtag.inc deleted file mode 100644 index 19372b7..0000000 --- a/STM32F1/system/support/ld/stm32/mem/sram_8k_flash_128k/mem-jtag.inc +++ /dev/null @@ -1,5 +0,0 @@ -MEMORY -{ - ram (rwx) : ORIGIN = 0x20000000, LENGTH = 8K - rom (rx) : ORIGIN = 0x08000000, LENGTH = 128K -} diff --git a/STM32F1/system/support/ld/stm32/mem/sram_8k_flash_128k/mem-ram.inc b/STM32F1/system/support/ld/stm32/mem/sram_8k_flash_128k/mem-ram.inc deleted file mode 100644 index 4063ab4..0000000 --- a/STM32F1/system/support/ld/stm32/mem/sram_8k_flash_128k/mem-ram.inc +++ /dev/null @@ -1,5 +0,0 @@ -MEMORY -{ - ram (rwx) : ORIGIN = 0x20000000, LENGTH = 8K - rom (rx) : ORIGIN = 0x08000000, LENGTH = 0K -} diff --git a/STM32F1/system/support/ld/stm32/series/stm32f1/performance/vector_symbols.inc b/STM32F1/system/support/ld/stm32/series/stm32f1/performance/vector_symbols.inc deleted file mode 100644 index f8519bb..0000000 --- a/STM32F1/system/support/ld/stm32/series/stm32f1/performance/vector_symbols.inc +++ /dev/null @@ -1,78 +0,0 @@ -EXTERN(__msp_init) -EXTERN(__exc_reset) -EXTERN(__exc_nmi) -EXTERN(__exc_hardfault) -EXTERN(__exc_memmanage) -EXTERN(__exc_busfault) -EXTERN(__exc_usagefault) -EXTERN(__stm32reservedexception7) -EXTERN(__stm32reservedexception8) -EXTERN(__stm32reservedexception9) -EXTERN(__stm32reservedexception10) -EXTERN(__exc_svc) -EXTERN(__exc_debug_monitor) -EXTERN(__stm32reservedexception13) -EXTERN(__exc_pendsv) -EXTERN(__exc_systick) - -EXTERN(__irq_wwdg) -EXTERN(__irq_pvd) -EXTERN(__irq_tamper) -EXTERN(__irq_rtc) -EXTERN(__irq_flash) -EXTERN(__irq_rcc) -EXTERN(__irq_exti0) -EXTERN(__irq_exti1) -EXTERN(__irq_exti2) -EXTERN(__irq_exti3) -EXTERN(__irq_exti4) -EXTERN(__irq_dma1_channel1) -EXTERN(__irq_dma1_channel2) -EXTERN(__irq_dma1_channel3) -EXTERN(__irq_dma1_channel4) -EXTERN(__irq_dma1_channel5) -EXTERN(__irq_dma1_channel6) -EXTERN(__irq_dma1_channel7) -EXTERN(__irq_adc) -EXTERN(__irq_usb_hp_can_tx) -EXTERN(__irq_usb_lp_can_rx0) -EXTERN(__irq_can_rx1) -EXTERN(__irq_can_sce) -EXTERN(__irq_exti9_5) -EXTERN(__irq_tim1_brk) -EXTERN(__irq_tim1_up) -EXTERN(__irq_tim1_trg_com) -EXTERN(__irq_tim1_cc) -EXTERN(__irq_tim2) -EXTERN(__irq_tim3) -EXTERN(__irq_tim4) -EXTERN(__irq_i2c1_ev) -EXTERN(__irq_i2c1_er) -EXTERN(__irq_i2c2_ev) -EXTERN(__irq_i2c2_er) -EXTERN(__irq_spi1) -EXTERN(__irq_spi2) -EXTERN(__irq_usart1) -EXTERN(__irq_usart2) -EXTERN(__irq_usart3) -EXTERN(__irq_exti15_10) -EXTERN(__irq_rtcalarm) -EXTERN(__irq_usbwakeup) - -EXTERN(__irq_tim8_brk) -EXTERN(__irq_tim8_up) -EXTERN(__irq_tim8_trg_com) -EXTERN(__irq_tim8_cc) -EXTERN(__irq_adc3) -EXTERN(__irq_fsmc) -EXTERN(__irq_sdio) -EXTERN(__irq_tim5) -EXTERN(__irq_spi3) -EXTERN(__irq_uart4) -EXTERN(__irq_uart5) -EXTERN(__irq_tim6) -EXTERN(__irq_tim7) -EXTERN(__irq_dma2_channel1) -EXTERN(__irq_dma2_channel2) -EXTERN(__irq_dma2_channel3) -EXTERN(__irq_dma2_channel4_5) diff --git a/STM32F1/system/support/ld/stm32/series/stm32f1/value/vector_symbols.inc b/STM32F1/system/support/ld/stm32/series/stm32f1/value/vector_symbols.inc deleted file mode 100644 index f8726f9..0000000 --- a/STM32F1/system/support/ld/stm32/series/stm32f1/value/vector_symbols.inc +++ /dev/null @@ -1,78 +0,0 @@ -EXTERN(__msp_init) -EXTERN(__exc_reset) -EXTERN(__exc_nmi) -EXTERN(__exc_hardfault) -EXTERN(__exc_memmanage) -EXTERN(__exc_busfault) -EXTERN(__exc_usagefault) -EXTERN(__stm32reservedexception7) -EXTERN(__stm32reservedexception8) -EXTERN(__stm32reservedexception9) -EXTERN(__stm32reservedexception10) -EXTERN(__exc_svc) -EXTERN(__exc_debug_monitor) -EXTERN(__stm32reservedexception13) -EXTERN(__exc_pendsv) -EXTERN(__exc_systick) - -EXTERN(__irq_wwdg) -EXTERN(__irq_pvd) -EXTERN(__irq_tamper) -EXTERN(__irq_rtc) -EXTERN(__irq_flash) -EXTERN(__irq_rcc) -EXTERN(__irq_exti0) -EXTERN(__irq_exti1) -EXTERN(__irq_exti2) -EXTERN(__irq_exti3) -EXTERN(__irq_exti4) -EXTERN(__irq_dma1_channel1) -EXTERN(__irq_dma1_channel2) -EXTERN(__irq_dma1_channel3) -EXTERN(__irq_dma1_channel4) -EXTERN(__irq_dma1_channel5) -EXTERN(__irq_dma1_channel6) -EXTERN(__irq_dma1_channel7) -EXTERN(__irq_adc1) -EXTERN(__stm32reservedexception14) -EXTERN(__stm32reservedexception15) -EXTERN(__stm32reservedexception16) -EXTERN(__stm32reservedexception17) -EXTERN(__irq_exti9_5) -EXTERN(__irq_tim1_brk) -EXTERN(__irq_tim1_up) -EXTERN(__irq_tim1_trg_com) -EXTERN(__irq_tim1_cc) -EXTERN(__irq_tim2) -EXTERN(__irq_tim3) -EXTERN(__irq_tim4) -EXTERN(__irq_i2c1_ev) -EXTERN(__irq_i2c1_er) -EXTERN(__irq_i2c2_ev) -EXTERN(__irq_i2c2_er) -EXTERN(__irq_spi1) -EXTERN(__irq_spi2) -EXTERN(__irq_usart1) -EXTERN(__irq_usart2) -EXTERN(__irq_usart3) -EXTERN(__irq_exti15_10) -EXTERN(__irq_rtcalarm) -EXTERN(__irq_cec) -EXTERN(__irq_tim12) -EXTERN(__irq_tim13) -EXTERN(__irq_tim14) -EXTERN(__stm32reservedexception18) -EXTERN(__stm32reservedexception19) -EXTERN(__irq_fsmc) -EXTERN(__stm32reservedexception20) -EXTERN(__irq_tim5) -EXTERN(__irq_spi3) -EXTERN(__irq_uart4) -EXTERN(__irq_uart5) -EXTERN(__irq_tim6) -EXTERN(__irq_tim7) -EXTERN(__irq_dma2_channel1) -EXTERN(__irq_dma2_channel2) -EXTERN(__irq_dma2_channel3) -EXTERN(__irq_dma2_channel4_5) -EXTERN(__irq_dma2_channel5) /* on remap only */ diff --git a/STM32F1/system/support/ld/stm32/series/stm32f2/vector_symbols.inc b/STM32F1/system/support/ld/stm32/series/stm32f2/vector_symbols.inc deleted file mode 100644 index d275ec3..0000000 --- a/STM32F1/system/support/ld/stm32/series/stm32f2/vector_symbols.inc +++ /dev/null @@ -1,98 +0,0 @@ -EXTERN(__msp_init) -EXTERN(__exc_reset) -EXTERN(__exc_nmi) -EXTERN(__exc_hardfault) -EXTERN(__exc_memmanage) -EXTERN(__exc_busfault) -EXTERN(__exc_usagefault) -EXTERN(__stm32reservedexception7) -EXTERN(__stm32reservedexception8) -EXTERN(__stm32reservedexception9) -EXTERN(__stm32reservedexception10) -EXTERN(__exc_svc) -EXTERN(__exc_debug_monitor) -EXTERN(__stm32reservedexception13) -EXTERN(__exc_pendsv) -EXTERN(__exc_systick) - -EXTERN(__irq_wwdg) -EXTERN(__irq_pvd) -EXTERN(__irq_tamp_stamp) -EXTERN(__irq_rtc_wkup) -EXTERN(__irq_flash) -EXTERN(__irq_rcc) -EXTERN(__irq_exti0) -EXTERN(__irq_exti1) -EXTERN(__irq_exti2) -EXTERN(__irq_exti3) -EXTERN(__irq_exti4) -EXTERN(__irq_dma1_stream0) -EXTERN(__irq_dma1_stream1) -EXTERN(__irq_dma1_stream2) -EXTERN(__irq_dma1_stream3) -EXTERN(__irq_dma1_stream4) -EXTERN(__irq_dma1_stream5) -EXTERN(__irq_dma1_stream6) -EXTERN(__irq_adc) -EXTERN(__irq_can1_tx) -EXTERN(__irq_can1_rx0) -EXTERN(__irq_can1_rx1) -EXTERN(__irq_can1_sce) -EXTERN(__irq_exti9_5) -EXTERN(__irq_tim1_brk_tim9) -EXTERN(__irq_tim1_up_tim10) -EXTERN(__irq_tim1_trg_com_tim11) -EXTERN(__irq_tim1_cc) -EXTERN(__irq_tim2) -EXTERN(__irq_tim3) -EXTERN(__irq_tim4) -EXTERN(__irq_i2c1_ev) -EXTERN(__irq_i2c1_er) -EXTERN(__irq_i2c2_ev) -EXTERN(__irq_i2c2_er) -EXTERN(__irq_spi1) -EXTERN(__irq_spi2) -EXTERN(__irq_usart1) -EXTERN(__irq_usart2) -EXTERN(__irq_usart3) -EXTERN(__irq_exti15_10) -EXTERN(__irq_rtc_alarm) -EXTERN(__irq_otg_fs_wkup) -EXTERN(__irq_tim8_brk_tim12) -EXTERN(__irq_tim8_up_tim13) -EXTERN(__irq_tim8_trg_com_tim14) -EXTERN(__irq_tim8_cc) -EXTERN(__irq_dma1_stream7) -EXTERN(__irq_fsmc) -EXTERN(__irq_sdio) -EXTERN(__irq_tim5) -EXTERN(__irq_spi3) -EXTERN(__irq_uart4) -EXTERN(__irq_uart5) -EXTERN(__irq_tim6_dac) -EXTERN(__irq_tim7) -EXTERN(__irq_dma2_stream0) -EXTERN(__irq_dma2_stream1) -EXTERN(__irq_dma2_stream2) -EXTERN(__irq_dma2_stream3) -EXTERN(__irq_dma2_stream4) -EXTERN(__irq_eth) -EXTERN(__irq_eth_wkup) -EXTERN(__irq_can2_tx) -EXTERN(__irq_can2_rx0) -EXTERN(__irq_can2_rx1) -EXTERN(__irq_can2_sce) -EXTERN(__irq_otg_fs) -EXTERN(__irq_dma2_stream5) -EXTERN(__irq_dma2_stream6) -EXTERN(__irq_dma2_stream7) -EXTERN(__irq_usart6) -EXTERN(__irq_i2c3_ev) -EXTERN(__irq_i2c3_er) -EXTERN(__irq_otg_hs_ep1_out) -EXTERN(__irq_otg_hs_ep1_in) -EXTERN(__irq_otg_hs_wkup) -EXTERN(__irq_otg_hs) -EXTERN(__irq_dcmi) -EXTERN(__irq_cryp) -EXTERN(__irq_hash_rng) diff --git a/STM32F1/system/support/ld/toolchains/gcc-arm-embedded/extra_libs.inc b/STM32F1/system/support/ld/toolchains/gcc-arm-embedded/extra_libs.inc deleted file mode 100644 index dd2c84f..0000000 --- a/STM32F1/system/support/ld/toolchains/gcc-arm-embedded/extra_libs.inc +++ /dev/null @@ -1,7 +0,0 @@ -/* - * Extra archives needed by ARM's GCC ARM Embedded arm-none-eabi- - * releases (https://launchpad.net/gcc-arm-embedded/). - */ - -/* This is for the provided newlib. */ -GROUP(libnosys.a) diff --git a/STM32F1/system/support/ld/toolchains/generic/extra_libs.inc b/STM32F1/system/support/ld/toolchains/generic/extra_libs.inc deleted file mode 100644 index e69de29..0000000 diff --git a/STM32F1/system/support/make/board-includes/VLDiscovery.mk b/STM32F1/system/support/make/board-includes/VLDiscovery.mk deleted file mode 100644 index 76cd85a..0000000 --- a/STM32F1/system/support/make/board-includes/VLDiscovery.mk +++ /dev/null @@ -1,7 +0,0 @@ -MCU := STM32F100RB -PRODUCT_ID := 0003 -ERROR_LED_PORT := GPIOC -ERROR_LED_PIN := 9 -MCU_SERIES := stm32f1 -MCU_F1_LINE := value -LD_MEM_DIR := sram_8k_flash_128k diff --git a/STM32F1/system/support/make/board-includes/cm900.mk b/STM32F1/system/support/make/board-includes/cm900.mk deleted file mode 100644 index 9f70a1b..0000000 --- a/STM32F1/system/support/make/board-includes/cm900.mk +++ /dev/null @@ -1,15 +0,0 @@ -MCU := STM32F103C8 -PRODUCT_ID := 0003 -ERROR_LED_PORT := GPIOB -ERROR_LED_PIN := 2 -MCU_SERIES := stm32f1 -MCU_F1_LINE := performance -# This crap is due to ld-script limitations. If you know of a better -# way to go about this (like some magic ld switches to specify MEMORY -# at the command line), please tell us! -ifeq ($(BOOTLOADER),maple) -LD_MEM_DIR := sram_20k_flash_128k -endif -ifeq ($(BOOTLOADER),robotis) -LD_MEM_DIR := sram_20k_flash_128k_robotis -endif diff --git a/STM32F1/system/support/make/board-includes/maple.mk b/STM32F1/system/support/make/board-includes/maple.mk deleted file mode 100644 index a2943ce..0000000 --- a/STM32F1/system/support/make/board-includes/maple.mk +++ /dev/null @@ -1,10 +0,0 @@ -MCU := STM32F103RB -PRODUCT_ID := 0003 -ERROR_LED_PORT := GPIOA -ERROR_LED_PIN := 5 -MCU_SERIES := stm32f1 -MCU_F1_LINE := performance -# This crap is due to ld-script limitations. If you know of a better -# way to go about this (like some magic ld switches to specify MEMORY -# at the command line), please tell us! -LD_MEM_DIR := sram_20k_flash_128k diff --git a/STM32F1/system/support/make/board-includes/maple_RET6.mk b/STM32F1/system/support/make/board-includes/maple_RET6.mk deleted file mode 100644 index 138722f..0000000 --- a/STM32F1/system/support/make/board-includes/maple_RET6.mk +++ /dev/null @@ -1,7 +0,0 @@ -MCU := STM32F103RE -PRODUCT_ID := 0003 -ERROR_LED_PORT := GPIOA -ERROR_LED_PIN := 5 -MCU_SERIES := stm32f1 -MCU_F1_LINE := performance -LD_MEM_DIR := sram_64k_flash_512k diff --git a/STM32F1/system/support/make/board-includes/maple_mini.mk b/STM32F1/system/support/make/board-includes/maple_mini.mk deleted file mode 100644 index b022537..0000000 --- a/STM32F1/system/support/make/board-includes/maple_mini.mk +++ /dev/null @@ -1,7 +0,0 @@ -MCU := STM32F103CB -PRODUCT_ID := 0003 -ERROR_LED_PORT := GPIOB -ERROR_LED_PIN := 1 -MCU_SERIES := stm32f1 -MCU_F1_LINE := performance -LD_MEM_DIR := sram_20k_flash_128k diff --git a/STM32F1/system/support/make/board-includes/maple_native.mk b/STM32F1/system/support/make/board-includes/maple_native.mk deleted file mode 100644 index 87e58e3..0000000 --- a/STM32F1/system/support/make/board-includes/maple_native.mk +++ /dev/null @@ -1,7 +0,0 @@ -MCU := STM32F103ZE -PRODUCT_ID := 0003 -ERROR_LED_PORT := GPIOC -ERROR_LED_PIN := 15 -MCU_SERIES := stm32f1 -MCU_F1_LINE := performance -LD_MEM_DIR := maple_native # The SRAM chip makes this board special diff --git a/STM32F1/system/support/make/board-includes/olimex_stm32_h103.mk b/STM32F1/system/support/make/board-includes/olimex_stm32_h103.mk deleted file mode 100644 index a3304a1..0000000 --- a/STM32F1/system/support/make/board-includes/olimex_stm32_h103.mk +++ /dev/null @@ -1,7 +0,0 @@ -MCU := STM32F103RB -PRODUCT_ID := 0003 -ERROR_LED_PORT := GPIOC -ERROR_LED_PIN := 12 -MCU_SERIES := stm32f1 -MCU_F1_LINE := performance -LD_MEM_DIR := sram_20k_flash_128k diff --git a/STM32F1/system/support/make/board-includes/opencm904.mk b/STM32F1/system/support/make/board-includes/opencm904.mk deleted file mode 100644 index 64d3351..0000000 --- a/STM32F1/system/support/make/board-includes/opencm904.mk +++ /dev/null @@ -1,15 +0,0 @@ -MCU := STM32F103CB -PRODUCT_ID := 0003 -ERROR_LED_PORT := GPIOB -ERROR_LED_PIN := 9 -MCU_SERIES := stm32f1 -MCU_F1_LINE := performance -# This crap is due to ld-script limitations. If you know of a better -# way to go about this (like some magic ld switches to specify MEMORY -# at the command line), please tell us! -ifeq ($(BOOTLOADER),maple) -LD_MEM_DIR := sram_20k_flash_128k -endif -ifeq ($(BOOTLOADER),robotis) -LD_MEM_DIR := sram_20k_flash_128k_robotis -endif diff --git a/STM32F1/system/support/make/board-includes/st_stm3220g_eval.mk b/STM32F1/system/support/make/board-includes/st_stm3220g_eval.mk deleted file mode 100644 index 8aaefc9..0000000 --- a/STM32F1/system/support/make/board-includes/st_stm3220g_eval.mk +++ /dev/null @@ -1,5 +0,0 @@ -MCU := STM32F207IG -ERROR_LED_PORT := GPIOG -ERROR_LED_PIN := 6 -MCU_SERIES := stm32f2 -LD_MEM_DIR := sram_112k_flash_1024k diff --git a/STM32F1/system/support/make/build-rules.mk b/STM32F1/system/support/make/build-rules.mk deleted file mode 100644 index 7c918d8..0000000 --- a/STM32F1/system/support/make/build-rules.mk +++ /dev/null @@ -1,59 +0,0 @@ -# Useful tools -CROSS_COMPILE ?= arm-none-eabi- - -CC := $(CROSS_COMPILE)gcc -CXX := $(CROSS_COMPILE)g++ -LD := $(CROSS_COMPILE)ld -v -AR := $(CROSS_COMPILE)ar -AS := $(CROSS_COMPILE)gcc -OBJCOPY := $(CROSS_COMPILE)objcopy -DISAS := $(CROSS_COMPILE)objdump -OBJDUMP := $(CROSS_COMPILE)objdump -SIZE := $(CROSS_COMPILE)size -DFU ?= dfu-util - -# Suppress annoying output unless V is set -ifndef V - SILENT_CC = @echo ' [CC] ' $(@:$(BUILD_PATH)/%.o=%.c); - SILENT_AS = @echo ' [AS] ' $(@:$(BUILD_PATH)/%.o=%.S); - SILENT_CXX = @echo ' [CXX] ' $(@:$(BUILD_PATH)/%.o=%.cpp); - SILENT_LD = @echo ' [LD] ' $(@F); - SILENT_AR = @echo ' [AR] ' - SILENT_OBJCOPY = @echo ' [OBJCOPY] ' $(@F); - SILENT_DISAS = @echo ' [DISAS] ' $(@:$(BUILD_PATH)/%.bin=%).disas; - SILENT_OBJDUMP = @echo ' [OBJDUMP] ' $(OBJDUMP); -endif - -# Extra build configuration - -BUILDDIRS := -TGT_BIN := - -CFLAGS = $(GLOBAL_CFLAGS) $(TGT_CFLAGS) -CXXFLAGS = $(GLOBAL_CXXFLAGS) $(TGT_CXXFLAGS) -ASFLAGS = $(GLOBAL_ASFLAGS) $(TGT_ASFLAGS) - -# Hacks to determine extra libraries we need to link against based on -# the toolchain. The default specifies no extra libraries, but it can -# be overridden. -LD_TOOLCHAIN_PATH := $(LDDIR)/toolchains/generic -ifneq ($(findstring ARM/embedded,$(shell $(CC) --version)),) -# GCC ARM Embedded, https://launchpad.net/gcc-arm-embedded/ -LD_TOOLCHAIN_PATH := $(LDDIR)/toolchains/gcc-arm-embedded -endif -ifneq ($(findstring Linaro GCC,$(shell $(CC) --version)),) -# Summon/Linaro GCC ARM Embedded, https://github.com/esden/summon-arm-toolchain -LD_TOOLCHAIN_PATH := $(LDDIR)/toolchains/gcc-arm-embedded -endif -# Add toolchain directory to LD search path -TOOLCHAIN_LDFLAGS := -L $(LD_TOOLCHAIN_PATH) - -# General directory independent build rules, generate dependency information -$(BUILD_PATH)/%.o: %.c - $(SILENT_CC) $(CC) $(CFLAGS) -MMD -MP -MF $(@:%.o=%.d) -MT $@ -o $@ -c $< - -$(BUILD_PATH)/%.o: %.cpp - $(SILENT_CXX) $(CXX) $(CFLAGS) $(CXXFLAGS) -MMD -MP -MF $(@:%.o=%.d) -MT $@ -o $@ -c $< - -$(BUILD_PATH)/%.o: %.S - $(SILENT_AS) $(AS) $(ASFLAGS) -MMD -MP -MF $(@:%.o=%.d) -MT $@ -o $@ -c $< diff --git a/STM32F1/system/support/make/build-templates.mk b/STM32F1/system/support/make/build-templates.mk deleted file mode 100644 index 4371f13..0000000 --- a/STM32F1/system/support/make/build-templates.mk +++ /dev/null @@ -1,5 +0,0 @@ -define LIBMAPLE_MODULE_template -dir := $(1) -include $$(dir)/rules.mk -endef - diff --git a/STM32F1/system/support/make/footer.mk b/STM32F1/system/support/make/footer.mk deleted file mode 100644 index 2242416..0000000 --- a/STM32F1/system/support/make/footer.mk +++ /dev/null @@ -1,18 +0,0 @@ -sFILES_$(d) := $(sSRCS_$(d):%=$(d)/%) -cFILES_$(d) := $(cSRCS_$(d):%=$(d)/%) -cppFILES_$(d) := $(cppSRCS_$(d):%=$(d)/%) - -OBJS_$(d) := $(sFILES_$(d):%.S=$(BUILD_PATH)/%.o) \ - $(cFILES_$(d):%.c=$(BUILD_PATH)/%.o) \ - $(cppFILES_$(d):%.cpp=$(BUILD_PATH)/%.o) -DEPS_$(d) := $(OBJS_$(d):%.o=%.d) - -$(OBJS_$(d)): TGT_CFLAGS := $(CFLAGS_$(d)) -$(OBJS_$(d)): TGT_CXXFLAGS := $(CXXFLAGS_$(d)) -$(OBJS_$(d)): TGT_ASFLAGS := $(ASFLAGS_$(d)) - -TGT_BIN += $(OBJS_$(d)) - --include $(DEPS_$(d)) -d := $(dirstack_$(sp)) -sp := $(basename $(sp)) diff --git a/STM32F1/system/support/make/header.mk b/STM32F1/system/support/make/header.mk deleted file mode 100644 index c85594a..0000000 --- a/STM32F1/system/support/make/header.mk +++ /dev/null @@ -1,4 +0,0 @@ -sp := $(sp).x -dirstack_$(sp) := $(d) -d := $(dir) -BUILDDIRS += $(BUILD_PATH)/$(d) diff --git a/STM32F1/system/support/make/target-config.mk b/STM32F1/system/support/make/target-config.mk deleted file mode 100644 index 0e3a2c2..0000000 --- a/STM32F1/system/support/make/target-config.mk +++ /dev/null @@ -1,54 +0,0 @@ -# TARGET_FLAGS are to be passed while compiling, assembling, linking. -TARGET_FLAGS := -# TARGET_LDFLAGS go to the linker -TARGET_LDFLAGS := - -# Configuration derived from $(MEMORY_TARGET) - -LD_SCRIPT_PATH := $(LDDIR)/$(MEMORY_TARGET).ld - -ifeq ($(MEMORY_TARGET), ram) -VECT_BASE_ADDR := VECT_TAB_RAM -endif -ifeq ($(MEMORY_TARGET), flash) -VECT_BASE_ADDR := VECT_TAB_FLASH -endif -ifeq ($(MEMORY_TARGET), jtag) -VECT_BASE_ADDR := VECT_TAB_BASE -endif - -# Pull in the board configuration file here, so it can override the -# above. - -include $(BOARD_INCLUDE_DIR)/$(BOARD).mk - -# Configuration derived from $(BOARD).mk - -LD_SERIES_PATH := $(LDDIR)/stm32/series/$(MCU_SERIES) -LD_MEM_PATH := $(LDDIR)/stm32/mem/$(LD_MEM_DIR) -ifeq ($(MCU_SERIES), stm32f1) -# Due to the Balkanization on F1, we need to specify the line when -# making linker decisions. -LD_SERIES_PATH := $(LD_SERIES_PATH)/$(MCU_F1_LINE) -endif - -ifeq ($(MCU_SERIES), stm32f1) -TARGET_FLAGS += -mcpu=cortex-m3 -march=armv7-m -endif -ifeq ($(MCU_SERIES), stm32f2) -TARGET_FLAGS += -mcpu=cortex-m3 -march=armv7-m -endif -ifeq ($(MCU_SERIES), stm32f4) -TARGET_FLAGS += -mcpu=cortex-m4 -march=armv7e-m -mfloat-abi=hard -mfpu=fpv4-sp-d16 -endif - -TARGET_LDFLAGS += -Xlinker -T$(LD_SCRIPT_PATH) \ - -L $(LD_SERIES_PATH) \ - -L $(LD_MEM_PATH) \ - -L $(LDDIR) -TARGET_FLAGS += -mthumb -DBOARD_$(BOARD) -DMCU_$(MCU) \ - -DERROR_LED_PORT=$(ERROR_LED_PORT) \ - -DERROR_LED_PIN=$(ERROR_LED_PIN) \ - -D$(VECT_BASE_ADDR) - -LIBMAPLE_MODULE_SERIES := $(LIBMAPLE_PATH)/$(MCU_SERIES) diff --git a/STM32F1/system/support/scripts/45-maple.rules b/STM32F1/system/support/scripts/45-maple.rules deleted file mode 100644 index d1bda5f..0000000 --- a/STM32F1/system/support/scripts/45-maple.rules +++ /dev/null @@ -1,5 +0,0 @@ -ATTRS{idProduct}=="1001", ATTRS{idVendor}=="0110", MODE="664", GROUP="plugdev" -ATTRS{idProduct}=="1002", ATTRS{idVendor}=="0110", MODE="664", GROUP="plugdev" -ATTRS{idProduct}=="0003", ATTRS{idVendor}=="1eaf", MODE="664", GROUP="plugdev" SYMLINK+="maple" -ATTRS{idProduct}=="0004", ATTRS{idVendor}=="1eaf", MODE="664", GROUP="plugdev" SYMLINK+="maple" - diff --git a/STM32F1/system/support/scripts/copy-to-ide b/STM32F1/system/support/scripts/copy-to-ide deleted file mode 100644 index e68abca..0000000 --- a/STM32F1/system/support/scripts/copy-to-ide +++ /dev/null @@ -1,54 +0,0 @@ -#!/bin/sh - -# This hack copies libmaple's source, linker scripts, and support -# libraries into the Maple IDE repository (which is expected as its -# first argument). - -DEST=$1 - -DEST_CORES=$DEST/hardware/leaflabs/cores/maple -DEST_LIBS=$DEST/libraries - -LMAPLE_SRC="LICENSE - ./libmaple/*.h - ./libmaple/*.c - ./libmaple/*.S - ./libmaple/usb/*.h - ./libmaple/usb/*.c - ./libmaple/usb/usb_lib/*.h - ./libmaple/usb/usb_lib/*.c - ./wirish/*.h - ./wirish/main.cxx - ./wirish/*.cpp - ./wirish/comm/*.cpp - ./wirish/comm/*.h - ./wirish/boards/*.h - ./wirish/boards/*.cpp - ./support/ld/common.inc - ./support/ld/maple - ./support/ld/maple_mini - ./support/ld/maple_native - ./support/ld/maple_RET6 - ./support/ld/names.inc" - -echo "First make sure DEST exists: $DEST" -if !(test -d $DEST) -then - echo "Nope! Make sure you're doing this right?" - exit -1 -fi - -# source -echo Copying libmaple source -rm -rf $DEST_CORES/*.c $DEST_CORES/*.cpp $DEST_CORES/*.h $DEST_CORES/*.cxx $DEST_CORES/*.S -rm -rf $DEST_CORES/*.inc $DEST_CORES/*.a $DEST_CORES/maple $DEST_CORES/maple_* -cp -R $LMAPLE_SRC $DEST_CORES - -echo Copying over libraries -cp -R libraries/* $DEST_LIBS - -# libmaple version -echo Creating libmaple-version.txt -git show-ref HEAD | cut -c 1-10 > $DEST/libmaple-version.txt - -echo Done. diff --git a/STM32F1/system/support/scripts/reset.py b/STM32F1/system/support/scripts/reset.py deleted file mode 100644 index 67a72c1..0000000 --- a/STM32F1/system/support/scripts/reset.py +++ /dev/null @@ -1,145 +0,0 @@ -#!/usr/bin/env python - -from __future__ import print_function - -import serial -import os -import platform -import sys -import time -from struct import pack - -def unix_get_maple_path(file_prefix, dev_is_maple=lambda dev: True): - """Try to find the device file for the Maple on *nix. - - This function works assuming that the device file globs like - '/dev/*'. The caller may pass an additional - dev_is_maple predicate if the platform supports additional tests - to determine if a device is a Maple. - - If there are multiple possibilities, ask the user what to do. If - the user chooses not to say, returns None.""" - possible_paths = [os.path.join('/dev', x) for x in os.listdir('/dev') \ - if x.startswith(file_prefix) and dev_is_maple(x)] - return choose_path(possible_paths) - -def linux_get_maple_path(file_prefix='ttyACM'): - """Specialized unix_get_maple_path() for Linux. - - Attempts to check that a candidate device has the correct ID in - the /sys tree when deciding if it's a Maple.""" - return unix_get_maple_path(file_prefix, linux_tty_is_maple) - -def linux_tty_is_maple(device): - try: - sysfile = open("/sys/class/tty/%s/device/uevent" % device, "r") - text = "".join(sysfile.readlines()) - return "PRODUCT=1eaf/4" in text - except IOError: # no udev info available - return True - -def windows_get_maple_path(): - """Similar to unix_get_maple_path(), but on Windows.""" - import _winreg as reg - p = 'HARDWARE\\DEVICEMAP\\SERIALCOMM' - k = reg.OpenKey(reg.HKEY_LOCAL_MACHINE, p) - possible_paths = [] - i = 0 - while True: - try: - possible_paths.append(reg.EnumValue(k, i)[1]) - i += 1 - except WindowsError: - break - return choose_path(possible_paths) - -def choose_path(possible_paths): - if len(possible_paths) == 0: - return None - elif len(possible_paths) == 1: - return possible_paths[0] - else: - print('Found multiple candidates for the Maple device:') - return choose_among_options(possible_paths) - -def choose_among_options(options): - for (i,p) in enumerate(options): - print('\t%d. %s' % (i+1, p)) - - prompt = 'Enter a number to select one, or q to quit: ' - while True: - resp = raw_input(prompt).strip().lower() - if resp == 'q': sys.exit() - - try: - i = int(resp, 10) - except ValueError: - pass - else: - if 0 <= i-1 < len(options): - return options[i-1] - - prompt = 'Please enter a number from the list, or q to quit: ' - -plat_sys = platform.system() -plat_bits = platform.architecture()[0] -if plat_sys == 'Linux': - maple_path = linux_get_maple_path() - # fall back on /dev/maple if that doesn't work - if maple_path is None: - maple_path = '/dev/maple' - print('Could not find Maple serial port; defaulting to /dev/maple.') -elif plat_sys == 'Darwin': - maple_path = unix_get_maple_path('tty.usbmodem') -elif plat_sys == 'Windows': - maple_path = windows_get_maple_path() -else: - maple_path = raw_input('Unrecognized platform. Please enter ' - "the path to the Maple's serial port device file:") - -if maple_path is None: - print('Could not find the Maple serial port for reset.', - 'Perhaps this is your first upload, or the board is already', - 'in bootloader mode.') - print() - print("If your sketch doesn't upload, try putting your Maple", - 'into bootloader mode manually by pressing the RESET button', - 'then letting it go and quickly pressing button BUT', - '(hold for several seconds).') - sys.exit() - -print('Using %s as Maple serial port' % maple_path) - -try: - ser = serial.Serial(maple_path, baudrate=115200, xonxoff=1) - - try: - # try to toggle DTR/RTS (old scheme) - ser.setRTS(0) - time.sleep(0.01) - ser.setDTR(0) - time.sleep(0.01) - ser.setDTR(1) - time.sleep(0.01) - ser.setDTR(0) - - # try magic number - ser.setRTS(1) - time.sleep(0.01) - ser.setDTR(1) - time.sleep(0.01) - ser.setDTR(0) - time.sleep(0.01) - ser.write("1EAF".encode("ascii")) - ser.flush() - - # Delay a bit before proceeding - time.sleep(0.1) - finally: - # ok we're done here - ser.close() - -except Exception as e: - print('Failed to open serial port %s for reset' % maple_path) - sys.exit() - diff --git a/STM32F1/system/support/scripts/robotis-loader.py b/STM32F1/system/support/scripts/robotis-loader.py deleted file mode 100644 index 95d4e71..0000000 --- a/STM32F1/system/support/scripts/robotis-loader.py +++ /dev/null @@ -1,94 +0,0 @@ -#!/usr/bin/python - -# This script sends a program on a robotis board (OpenCM9.04 or CM900) -# using the robotis bootloader (used in OpenCM IDE) -# -# Usage: -# python robotis-loader.py -# -# Example: -# python robotis-loader.py /dev/ttyACM0 firmware.bin -# -# https://github.com/Gregwar/robotis-loader - -import serial, sys, os, time - -print('~~ Robotis loader ~~') -print('') - -# Reading command line -if len(sys.argv) != 3: - exit('! Usage: robotis-loader.py ') -pgm, port, binary = sys.argv - -# Helper to prints a progress bar -def progressBar(percent, precision=65): - threshold=precision*percent/100.0 - sys.stdout.write('[ ') - for x in xrange(0, precision): - if x < threshold: sys.stdout.write('#') - else: sys.stdout.write(' ') - sys.stdout.write(' ] ') - sys.stdout.flush() - -# Opening the firmware file -try: - stat = os.stat(binary) - size = stat.st_size - firmware = file(binary, 'rb') - print('* Opening %s, size=%d' % (binary, size)) -except: - exit('! Unable to open file %s' % binary) - -# Opening serial port -try: - s = serial.Serial(port, baudrate=115200) -except: - exit('! Unable to open serial port %s' % port) - -print('* Resetting the board') -s.setRTS(True) -s.setDTR(False) -time.sleep(0.1) -s.setRTS(False) -s.write('CM9X') -s.close() -time.sleep(1.0); - -print('* Connecting...') -s = serial.Serial(port, baudrate=115200) -s.write('AT&LD') -print('* Download signal transmitted, waiting...') - -# Entering bootloader sequence -while True: - line = s.readline().strip() - if line.endswith('Ready..'): - print('* Board ready, sending data') - cs = 0 - pos = 0 - while True: - c = firmware.read(2048) - if len(c): - pos += len(c) - sys.stdout.write("\r") - progressBar(100*float(pos)/float(size)) - s.write(c) - for k in range(0,len(c)): - cs = (cs+ord(c[k]))%256 - else: - break - print('') - s.setDTR(True) - print('* Checksum: %d' % (cs)) - s.write(chr(cs)) - print('* Firmware was sent') - else: - if line == 'Success..': - print('* Success, running the code') - print('') - s.write('AT&RST') - s.close() - exit() - else: - print('Board -> '+line) diff --git a/STM32F1/system/support/scripts/win-list-com-ports.py b/STM32F1/system/support/scripts/win-list-com-ports.py deleted file mode 100644 index 3e6ecb8..0000000 --- a/STM32F1/system/support/scripts/win-list-com-ports.py +++ /dev/null @@ -1,29 +0,0 @@ -# Windows program for listing COM (serial) ports. -# -# enumerate_serial_ports() is by Eli Bendersky: -# -# http://eli.thegreenplace.net/2009/07/31/listing-all-serial-ports-on-windows-with-python/ - -import _winreg as winreg -import itertools - -def enumerate_serial_ports(): - """ Uses the Win32 registry to return an - iterator of serial (COM) ports - existing on this computer. - """ - path = 'HARDWARE\\DEVICEMAP\\SERIALCOMM' - try: - key = winreg.OpenKey(winreg.HKEY_LOCAL_MACHINE, path) - except WindowsError: - raise IterationError - - for i in itertools.count(): - try: - val = winreg.EnumValue(key, i) - yield str(val[1]) - except EnvironmentError: - break - -for com in enumerate_serial_ports(): - print com diff --git a/STM32F1/system/support/stm32loader.py b/STM32F1/system/support/stm32loader.py deleted file mode 100644 index 50686bf..0000000 --- a/STM32F1/system/support/stm32loader.py +++ /dev/null @@ -1,532 +0,0 @@ -#!/usr/bin/env python - -# -*- coding: utf-8 -*- -# vim: sw=4:ts=4:si:et:enc=utf-8 - -# Author: Ivan A-R -# Project page: http://tuxotronic.org/wiki/projects/stm32loader -# -# This file is part of stm32loader. -# -# stm32loader is free software; you can redistribute it and/or modify it under -# the terms of the GNU General Public License as published by the Free -# Software Foundation; either version 3, or (at your option) any later -# version. -# -# stm32loader is distributed in the hope that it will be useful, but WITHOUT ANY -# WARRANTY; without even the implied warranty of MERCHANTABILITY or -# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -# for more details. -# -# You should have received a copy of the GNU General Public License -# along with stm32loader; see the file COPYING3. If not see -# . - -from __future__ import print_function - -import sys, getopt -import serial -import time -import glob -import time -import tempfile -import os -import subprocess - -try: - from progressbar import * - usepbar = 1 -except: - usepbar = 0 - -# Verbose level -QUIET = 5 - -def mdebug(level, message): - if QUIET >= level: - print(message, file=sys.stderr) - -# Takes chip IDs (obtained via Get ID command) to human-readable names -CHIP_ID_STRS = {0x410: 'STM32F1, performance, medium-density', - 0x411: 'STM32F2', - 0x412: 'STM32F1, performance, low-density', - 0x413: 'STM32F4', - 0x414: 'STM32F1, performance, high-density', - 0x416: 'STM32L1, performance, medium-density', - 0x418: 'STM32F1, connectivity', - 0x420: 'STM32F1, value, medium-density', - 0x428: 'STM32F1, value, high-density', - 0x430: 'STM32F1, performance, XL-density'} - -class CmdException(Exception): - pass - -class CommandInterface(object): - def open(self, aport='/dev/tty.usbserial-FTD3TMCH', abaudrate=115200) : - self.sp = serial.Serial( - port=aport, - baudrate=abaudrate, # baudrate - bytesize=8, # number of databits - parity=serial.PARITY_EVEN, - stopbits=1, - xonxoff=0, # enable software flow control - rtscts=0, # disable RTS/CTS flow control - timeout=0.5 # set a timeout value, None for waiting forever - ) - - - def _wait_for_ack(self, info="", timeout=0): - stop = time.time() + timeout - got = None - while not got: - got = self.sp.read(1) - if time.time() > stop: - break - - if not got: - raise CmdException("No response to %s" % info) - - # wait for ask - ask = ord(got) - - if ask == 0x79: - # ACK - return 1 - elif ask == 0x1F: - # NACK - raise CmdException("Chip replied with a NACK during %s" % info) - - # Unknown response - raise CmdException("Unrecognised response 0x%x to %s" % (ask, info)) - - def reset(self): - self.sp.setDTR(0) - time.sleep(0.1) - self.sp.setDTR(1) - time.sleep(0.5) - - def initChip(self): - # Set boot - self.sp.setRTS(0) - self.reset() - - # Be a bit more persistent when trying to initialise the chip - stop = time.time() + 5.0 - - while time.time() <= stop: - self.sp.write('\x7f') - - got = self.sp.read() - - # The chip will ACK a sync the very first time and - # NACK it every time afterwards - if got and got in '\x79\x1f': - # Synced up - return - - raise CmdException('No response while trying to sync') - - def releaseChip(self): - self.sp.setRTS(1) - self.reset() - - def cmdGeneric(self, cmd): - self.sp.write(chr(cmd)) - self.sp.write(chr(cmd ^ 0xFF)) # Control byte - return self._wait_for_ack(hex(cmd)) - - def cmdGet(self): - if self.cmdGeneric(0x00): - mdebug(10, "*** Get command"); - len = ord(self.sp.read()) - version = ord(self.sp.read()) - mdebug(10, " Bootloader version: "+hex(version)) - dat = map(lambda c: hex(ord(c)), self.sp.read(len)) - mdebug(10, " Available commands: "+str(dat)) - self._wait_for_ack("0x00 end") - return version - else: - raise CmdException("Get (0x00) failed") - - def cmdGetVersion(self): - if self.cmdGeneric(0x01): - mdebug(10, "*** GetVersion command") - version = ord(self.sp.read()) - self.sp.read(2) - self._wait_for_ack("0x01 end") - mdebug(10, " Bootloader version: "+hex(version)) - return version - else: - raise CmdException("GetVersion (0x01) failed") - - def cmdGetID(self): - if self.cmdGeneric(0x02): - mdebug(10, "*** GetID command") - len = ord(self.sp.read()) - id = self.sp.read(len+1) - self._wait_for_ack("0x02 end") - return id - else: - raise CmdException("GetID (0x02) failed") - - - def _encode_addr(self, addr): - byte3 = (addr >> 0) & 0xFF - byte2 = (addr >> 8) & 0xFF - byte1 = (addr >> 16) & 0xFF - byte0 = (addr >> 24) & 0xFF - crc = byte0 ^ byte1 ^ byte2 ^ byte3 - return (chr(byte0) + chr(byte1) + chr(byte2) + chr(byte3) + chr(crc)) - - - def cmdReadMemory(self, addr, lng): - assert(lng <= 256) - if self.cmdGeneric(0x11): - mdebug(10, "*** ReadMemory command") - self.sp.write(self._encode_addr(addr)) - self._wait_for_ack("0x11 address failed") - N = (lng - 1) & 0xFF - crc = N ^ 0xFF - self.sp.write(chr(N) + chr(crc)) - self._wait_for_ack("0x11 length failed") - return map(lambda c: ord(c), self.sp.read(lng)) - else: - raise CmdException("ReadMemory (0x11) failed") - - - def cmdGo(self, addr): - if self.cmdGeneric(0x21): - mdebug(10, "*** Go command") - self.sp.write(self._encode_addr(addr)) - self._wait_for_ack("0x21 go failed") - else: - raise CmdException("Go (0x21) failed") - - - def cmdWriteMemory(self, addr, data): - assert(len(data) <= 256) - if self.cmdGeneric(0x31): - mdebug(10, "*** Write memory command") - self.sp.write(self._encode_addr(addr)) - self._wait_for_ack("0x31 address failed") - #map(lambda c: hex(ord(c)), data) - lng = (len(data)-1) & 0xFF - mdebug(10, " %s bytes to write" % [lng+1]); - self.sp.write(chr(lng)) # len really - crc = 0xFF - for c in data: - crc = crc ^ c - self.sp.write(chr(c)) - self.sp.write(chr(crc)) - self._wait_for_ack("0x31 programming failed") - mdebug(10, " Write memory done") - else: - raise CmdException("Write memory (0x31) failed") - - - def cmdEraseMemory(self, sectors = None): - if self.cmdGeneric(0x43): - mdebug(10, "*** Erase memory command") - if sectors is None: - # Global erase - self.sp.write(chr(0xFF)) - self.sp.write(chr(0x00)) - else: - # Sectors erase - self.sp.write(chr((len(sectors)-1) & 0xFF)) - crc = 0xFF - for c in sectors: - crc = crc ^ c - self.sp.write(chr(c)) - self.sp.write(chr(crc)) - self._wait_for_ack("0x43 erasing failed") - mdebug(10, " Erase memory done") - else: - raise CmdException("Erase memory (0x43) failed") - - - # TODO support for non-global mass erase - GLOBAL_ERASE_TIMEOUT_SECONDS = 20 # This takes a while - def cmdExtendedEraseMemory(self): - if self.cmdGeneric(0x44): - mdebug(10, "*** Extended erase memory command") - # Global mass erase - mdebug(5, "Global mass erase; this may take a while") - self.sp.write(chr(0xFF)) - self.sp.write(chr(0xFF)) - # Checksum - self.sp.write(chr(0x00)) - self._wait_for_ack("0x44 extended erase failed", - timeout=self.GLOBAL_ERASE_TIMEOUT_SECONDS) - mdebug(10, " Extended erase memory done") - else: - raise CmdException("Extended erase memory (0x44) failed") - - - def cmdWriteProtect(self, sectors): - if self.cmdGeneric(0x63): - mdebug(10, "*** Write protect command") - self.sp.write(chr((len(sectors)-1) & 0xFF)) - crc = 0xFF - for c in sectors: - crc = crc ^ c - self.sp.write(chr(c)) - self.sp.write(chr(crc)) - self._wait_for_ack("0x63 write protect failed") - mdebug(10, " Write protect done") - else: - raise CmdException("Write Protect memory (0x63) failed") - - def cmdWriteUnprotect(self): - if self.cmdGeneric(0x73): - mdebug(10, "*** Write Unprotect command") - self._wait_for_ack("0x73 write unprotect failed") - self._wait_for_ack("0x73 write unprotect 2 failed") - mdebug(10, " Write Unprotect done") - else: - raise CmdException("Write Unprotect (0x73) failed") - - def cmdReadoutProtect(self): - if self.cmdGeneric(0x82): - mdebug(10, "*** Readout protect command") - self._wait_for_ack("0x82 readout protect failed") - self._wait_for_ack("0x82 readout protect 2 failed") - mdebug(10, " Read protect done") - else: - raise CmdException("Readout protect (0x82) failed") - - def cmdReadoutUnprotect(self): - if self.cmdGeneric(0x92): - mdebug(10, "*** Readout Unprotect command") - self._wait_for_ack("0x92 readout unprotect failed") - self._wait_for_ack("0x92 readout unprotect 2 failed") - mdebug(10, " Read Unprotect done") - else: - raise CmdException("Readout unprotect (0x92) failed") - - -# Complex commands section - - def readMemory(self, addr, lng): - data = [] - if usepbar: - widgets = ['Reading: ', Percentage(),', ', ETA(), ' ', Bar()] - pbar = ProgressBar(widgets=widgets,maxval=lng, term_width=79).start() - - while lng > 256: - if usepbar: - pbar.update(pbar.maxval-lng) - else: - mdebug(5, "Read %(len)d bytes at 0x%(addr)X" % {'addr': addr, 'len': 256}) - data = data + self.cmdReadMemory(addr, 256) - addr = addr + 256 - lng = lng - 256 - if usepbar: - pbar.update(pbar.maxval-lng) - pbar.finish() - else: - mdebug(5, "Read %(len)d bytes at 0x%(addr)X" % {'addr': addr, 'len': 256}) - data = data + self.cmdReadMemory(addr, lng) - return data - - def writeMemory(self, addr, data): - lng = len(data) - - mdebug(5, "Writing %(lng)d bytes to start address 0x%(addr)X" % - { 'lng': lng, 'addr': addr}) - - if usepbar: - widgets = ['Writing: ', Percentage(),' ', ETA(), ' ', Bar()] - pbar = ProgressBar(widgets=widgets, maxval=lng, term_width=79).start() - - offs = 0 - while lng > 256: - if usepbar: - pbar.update(pbar.maxval-lng) - else: - mdebug(5, "Write %(len)d bytes at 0x%(addr)X" % {'addr': addr, 'len': 256}) - self.cmdWriteMemory(addr, data[offs:offs+256]) - offs = offs + 256 - addr = addr + 256 - lng = lng - 256 - if usepbar: - pbar.update(pbar.maxval-lng) - pbar.finish() - else: - mdebug(5, "Write %(len)d bytes at 0x%(addr)X" % {'addr': addr, 'len': 256}) - self.cmdWriteMemory(addr, data[offs:offs+lng] + ([0xFF] * (256-lng)) ) - - -def usage(): - print("""Usage: %s [-hqVewvr] [-l length] [-p port] [-b baud] [-a addr] [file.bin] - -h This help - -q Quiet - -V Verbose - -e Erase - -w Write - -v Verify - -r Read - -l length Length of read - -p port Serial port (default: first USB-like port in /dev) - -b baud Baud speed (default: 115200) - -a addr Target address - - ./stm32loader.py -e -w -v example/main.bin - - """ % sys.argv[0]) - -def read(filename): - """Read the file to be programmed and turn it into a binary""" - with open(filename, 'rb') as f: - bytes = f.read() - - if bytes.startswith('\x7FELF'): - # Actually an ELF file. Convert to binary - handle, path = tempfile.mkstemp(suffix='.bin', prefix='stm32loader') - - try: - os.close(handle) - - # Try a couple of options for objcopy - for name in ['arm-none-eabi-objcopy', 'arm-linux-gnueabi-objcopy']: - try: - code = subprocess.call([name, '-Obinary', filename, path]) - - if code == 0: - return read(path) - except OSError: - pass - else: - raise Exception('Error %d while converting to a binary file' % code) - finally: - # Remove the temporary file - os.unlink(path) - else: - return [ord(x) for x in bytes] - -if __name__ == "__main__": - - conf = { - 'port': 'auto', - 'baud': 115200, - 'address': 0x08000000, - 'erase': 0, - 'write': 0, - 'verify': 0, - 'read': 0, - 'len': 1000, - 'fname':'', - } - -# http://www.python.org/doc/2.5.2/lib/module-getopt.html - - try: - opts, args = getopt.getopt(sys.argv[1:], "hqVewvrp:b:a:l:") - except getopt.GetoptError as err: - # print help information and exit: - print(str(err)) # will print something like "option -a not recognized" - usage() - sys.exit(2) - - for o, a in opts: - if o == '-V': - QUIET = 10 - elif o == '-q': - QUIET = 0 - elif o == '-h': - usage() - sys.exit(0) - elif o == '-e': - conf['erase'] = 1 - elif o == '-w': - conf['write'] = 1 - elif o == '-v': - conf['verify'] = 1 - elif o == '-r': - conf['read'] = 1 - elif o == '-p': - conf['port'] = a - elif o == '-b': - conf['baud'] = eval(a) - elif o == '-a': - conf['address'] = eval(a) - elif o == '-l': - conf['len'] = eval(a) - else: - assert False, "unhandled option" - - # Try and find the port automatically - if conf['port'] == 'auto': - ports = [] - - # Get a list of all USB-like names in /dev - for name in ['tty.usbserial', 'ttyUSB']: - ports.extend(glob.glob('/dev/%s*' % name)) - - ports = sorted(ports) - - if ports: - # Found something - take it - conf['port'] = ports[0] - - cmd = CommandInterface() - cmd.open(conf['port'], conf['baud']) - mdebug(10, "Open port %(port)s, baud %(baud)d" % {'port':conf['port'], - 'baud':conf['baud']}) - try: - if (conf['write'] or conf['verify']): - mdebug(5, "Reading data from %s" % args[0]) - data = read(args[0]) - - try: - cmd.initChip() - except CmdException: - print("Can't init. Ensure BOOT0=1, BOOT1=0, and reset device") - - bootversion = cmd.cmdGet() - - mdebug(0, "Bootloader version 0x%X" % bootversion) - - if bootversion < 20 or bootversion >= 100: - raise Exception('Unreasonable bootloader version %d' % bootversion) - - chip_id = cmd.cmdGetID() - assert len(chip_id) == 2, "Unreasonable chip id: %s" % repr(chip_id) - chip_id_num = (ord(chip_id[0]) << 8) | ord(chip_id[1]) - chip_id_str = CHIP_ID_STRS.get(chip_id_num, None) - - if chip_id_str is None: - mdebug(0, 'Warning: unrecognised chip ID 0x%x' % chip_id_num) - else: - mdebug(0, "Chip id 0x%x, %s" % (chip_id_num, chip_id_str)) - - if conf['erase']: - # Pre-3.0 bootloaders use the erase memory - # command. Starting with 3.0, extended erase memory - # replaced this command. - if bootversion < 0x30: - cmd.cmdEraseMemory() - else: - cmd.cmdExtendedEraseMemory() - - if conf['write']: - cmd.writeMemory(conf['address'], data) - - if conf['verify']: - verify = cmd.readMemory(conf['address'], len(data)) - if(data == verify): - print("Verification OK") - else: - print("Verification FAILED") - print(str(len(data)) + ' vs ' + str(len(verify))) - for i in xrange(0, len(data)): - if data[i] != verify[i]: - print(hex(i) + ': ' + hex(data[i]) + ' vs ' + hex(verify[i])) - - if not conf['write'] and conf['read']: - rdata = cmd.readMemory(conf['address'], conf['len']) - file(args[0], 'wb').write(''.join(map(chr,rdata))) - - finally: - cmd.releaseChip() -