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Move Timer ISR handlers from timer_f1.c to timer.c to resolve linker issue in which some ISR's were not being linked even though they were being used

This commit is contained in:
Roger Clark 2015-07-05 22:38:47 +10:00
parent 3d51e8c530
commit 6d18be66ad
2 changed files with 106 additions and 89 deletions
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100
STM32F1/cores/maple/libmaple/timer.c
View File

@ -1,3 +1,4 @@
/******************************************************************************
* The MIT License
*
@ -410,3 +411,102 @@ static void enable_bas_gen_irq(timer_dev *dev) {
}
nvic_irq_enable(irq_num);
}
/* Note.
*
* 2015/07/06 Roger Clark
*
* The IRQ handlers were initially in timer_f1.c however this seems to cause problems
* in which the compiler / linker doesn't always link all the required handlers.
* The work around was to move the handlers into this file
*/
/*
* IRQ handlers
*
* Defer to the timer_private dispatch API.
*
* FIXME: The names of these handlers are inaccurate since XL-density
* devices came out. Update these to match the STM32F2 names, maybe
* using some weak symbol magic to preserve backwards compatibility if
* possible. Once that's done, we can just move the IRQ handlers into
* the top-level libmaple/timer.c, and there will be no need for this
* file.
*/
void __irq_tim1_brk(void) {
dispatch_adv_brk(TIMER1);
#if STM32_HAVE_TIMER(9)
dispatch_tim_9_12(TIMER9);
#endif
}
void __irq_tim1_up(void) {
dispatch_adv_up(TIMER1);
#if STM32_HAVE_TIMER(10)
dispatch_tim_10_11_13_14(TIMER10);
#endif
}
void __irq_tim1_trg_com(void) {
dispatch_adv_trg_com(TIMER1);
#if STM32_HAVE_TIMER(11)
dispatch_tim_10_11_13_14(TIMER11);
#endif
}
void __irq_tim1_cc(void) {
dispatch_adv_cc(TIMER1);
}
void __irq_tim2(void) {
dispatch_general(TIMER2);
}
void __irq_tim3(void) {
dispatch_general(TIMER3);
}
void __irq_tim4(void) {
dispatch_general(TIMER4);
}
#if defined(STM32_HIGH_DENSITY) || defined(STM32_XL_DENSITY)
void __irq_tim5(void) {
dispatch_general(TIMER5);
}
void __irq_tim6(void) {
dispatch_basic(TIMER6);
}
void __irq_tim7(void) {
dispatch_basic(TIMER7);
}
void __irq_tim8_brk(void) {
dispatch_adv_brk(TIMER8);
#if STM32_HAVE_TIMER(12)
dispatch_tim_9_12(TIMER12);
#endif
}
void __irq_tim8_up(void) {
dispatch_adv_up(TIMER8);
#if STM32_HAVE_TIMER(13)
dispatch_tim_10_11_13_14(TIMER13);
#endif
}
void __irq_tim8_trg_com(void) {
dispatch_adv_trg_com(TIMER8);
#if STM32_HAVE_TIMER(14)
dispatch_tim_10_11_13_14(TIMER14);
#endif
}
void __irq_tim8_cc(void) {
dispatch_adv_cc(TIMER8);
}
#endif /* defined(STM32_HIGH_DENSITY) || defined(STM32_XL_DENSITY) */

95
STM32F1/cores/maple/libmaple/timer_f1.c
View File

@ -30,95 +30,12 @@
* @brief STM32F1 timer.
*/
#include <libmaple/timer.h>
#include <libmaple/stm32.h>
#include "timer_private.h"
/*
* IRQ handlers
*
* Defer to the timer_private dispatch API.
*
* FIXME: The names of these handlers are inaccurate since XL-density
* devices came out. Update these to match the STM32F2 names, maybe
* using some weak symbol magic to preserve backwards compatibility if
* possible. Once that's done, we can just move the IRQ handlers into
* the top-level libmaple/timer.c, and there will be no need for this
* file.
* 2015/07/06
* Note. The IRQ handlers which were initially in this file have been moved to timer.c
* to resolve a linker issue in where some IRQ handlers were not being linked even though
* they were being used.
* This file has been retains for historical reasons, but can be moved at some time in the future
* when full testing of the code in the new location has been completed.
*/
void __irq_tim1_brk(void) {
dispatch_adv_brk(TIMER1);
#if STM32_HAVE_TIMER(9)
dispatch_tim_9_12(TIMER9);
#endif
}
void __irq_tim1_up(void) {
dispatch_adv_up(TIMER1);
#if STM32_HAVE_TIMER(10)
dispatch_tim_10_11_13_14(TIMER10);
#endif
}
void __irq_tim1_trg_com(void) {
dispatch_adv_trg_com(TIMER1);
#if STM32_HAVE_TIMER(11)
dispatch_tim_10_11_13_14(TIMER11);
#endif
}
void __irq_tim1_cc(void) {
dispatch_adv_cc(TIMER1);
}
void __irq_tim2(void) {
dispatch_general(TIMER2);
}
void __irq_tim3(void) {
dispatch_general(TIMER3);
}
void __irq_tim4(void) {
dispatch_general(TIMER4);
}
#if defined(STM32_HIGH_DENSITY) || defined(STM32_XL_DENSITY)
void __irq_tim5(void) {
dispatch_general(TIMER5);
}
void __irq_tim6(void) {
dispatch_basic(TIMER6);
}
void __irq_tim7(void) {
dispatch_basic(TIMER7);
}
void __irq_tim8_brk(void) {
dispatch_adv_brk(TIMER8);
#if STM32_HAVE_TIMER(12)
dispatch_tim_9_12(TIMER12);
#endif
}
void __irq_tim8_up(void) {
dispatch_adv_up(TIMER8);
#if STM32_HAVE_TIMER(13)
dispatch_tim_10_11_13_14(TIMER13);
#endif
}
void __irq_tim8_trg_com(void) {
dispatch_adv_trg_com(TIMER8);
#if STM32_HAVE_TIMER(14)
dispatch_tim_10_11_13_14(TIMER14);
#endif
}
void __irq_tim8_cc(void) {
dispatch_adv_cc(TIMER8);
}
#endif /* defined(STM32_HIGH_DENSITY) || defined(STM32_XL_DENSITY) */