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Fixed a master/slave mode mixup. 

Turns out that (sr2&I2C_SR2_MSL)!=I2C_SR2_MSL indicates slave mode after master has requested, and received, data.

"MSL - Cleared by hardware after detecting a Stop condition on the bus or a loss of arbitration
(ARLO=1), or by hardware when PE=0." -RM0008
This commit is contained in:
lacklustrlabs 2017-12-19 23:46:32 +01:00 committed by Lacklustrlabs
parent 987102c8d2
commit 78f8a90a2d
1 changed files with 9 additions and 8 deletions
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17
STM32F1/libraries/WireSlave/src/i2c_slave.c
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@ -70,6 +70,12 @@ static inline void i2c_send_slave_addr(i2c_dev *dev, uint32 addr, uint32 rw) {
#ifdef I2C_DEBUG
#define NR_CRUMBS 128
struct crumb {
uint32 event;
uint32 arg0;
uint32 arg1;
uint32 arg2; // filler to make the data fit GDB memory dump screen
};
static struct crumb crumbs[NR_CRUMBS];
static uint32 cur_crumb = 0;
@ -79,6 +85,7 @@ static inline void i2c_drop_crumb(uint32 event, uint32 arg0, uint32 arg1) {
crumb->event = event;
crumb->arg0 = arg0;
crumb->arg1 = arg1;
crumb->arg2 = cur_crumb-1;
}
}
#define I2C_CRUMB(event, arg0, arg1) i2c_drop_crumb(event, arg0, arg1)
@ -87,12 +94,6 @@ static inline void i2c_drop_crumb(uint32 event, uint32 arg0, uint32 arg1) {
#define I2C_CRUMB(event, arg0, arg1)
#endif
struct crumb {
uint32 event;
uint32 arg0;
uint32 arg1;
};
enum {
IRQ_ENTRY = 1,
TXE_ONLY = 2,
@ -351,8 +352,8 @@ void _i2c_irq_handler(i2c_dev *dev) {
* Add Slave support
*/
/* Check to see if MSL master slave bit is set */
if ((sr2 & I2C_SR2_MSL) != I2C_SR2_MSL) { /* 0 = slave mode 1 = master */
/* Check to see if in slave mode */
if (dev->config_flags&(I2C_SLAVE_DUAL_ADDRESS|I2C_SLAVE_GENERAL_CALL)) {
/* Check for address match */
if (sr1 & I2C_SR1_ADDR) {