diff --git a/STM32F1/libraries/SPI/src/SPI.cpp b/STM32F1/libraries/SPI/src/SPI.cpp
index 33cf62f..ebb0198 100644
--- a/STM32F1/libraries/SPI/src/SPI.cpp
+++ b/STM32F1/libraries/SPI/src/SPI.cpp
@@ -365,7 +365,7 @@ uint8 SPIClass::transfer(uint8 byte) const {
 */
 uint8 SPIClass::dmaTransfer(uint8 *transmitBuf, uint8 *receiveBuf, uint16 length) {
 	if (length == 0) return 0;
-	uint8 b;
+	uint8 b = 0;
 	if (spi_is_rx_nonempty(_currentSetting->spi_d) == 1) b = spi_rx_reg(_currentSetting->spi_d); //Clear the RX buffer in case a byte is waiting on it.
 //	dma1_ch3_Active=true;
     dma_init(_currentSetting->spiDmaDev);
@@ -427,7 +427,7 @@ uint8 SPIClass::dmaTransfer(uint8 *transmitBuf, uint8 *receiveBuf, uint16 length
 uint8 SPIClass::dmaSend(uint8 *transmitBuf, uint16 length, bool minc) {
 	if (length == 0) return 0;
 	uint32 flags = ((DMA_MINC_MODE * minc) |  DMA_FROM_MEM | DMA_TRNS_CMPLT);
-	uint8 b;
+	uint8 b = 0;
 //	dma1_ch3_Active=true;
     dma_init(_currentSetting->spiDmaDev);
 //	dma_attach_interrupt(DMA1, DMA_CH3, &SPIClass::DMA1_CH3_Event);
diff --git a/STM32F4/variants/discovery_f407/variant.h b/STM32F4/variants/discovery_f407/variant.h
new file mode 100644
index 0000000..6e399f3
--- /dev/null
+++ b/STM32F4/variants/discovery_f407/variant.h
@@ -0,0 +1,14 @@
+#ifndef _VARIANT_ARDUINO_STM32_
+#define _VARIANT_ARDUINO_STM32_
+
+#define digitalPinToPort(P)        ( PIN_MAP[P].gpio_device )
+#define digitalPinToBitMask(P)     ( BIT(PIN_MAP[P].gpio_bit) )
+#define portOutputRegister(port)   ( &(port->regs->ODR) )
+#define portInputRegister(port)    ( &(port->regs->IDR) )
+
+#define portSetRegister(pin)		( &(PIN_MAP[pin].gpio_device->regs->BSRR) )
+#define portClearRegister(pin)		( &(PIN_MAP[pin].gpio_device->regs->BRR) )
+
+#define portConfigRegister(pin)		( &(PIN_MAP[pin].gpio_device->regs->CRL) )
+
+#endif /* _VARIANT_ARDUINO_STM32_ */
\ No newline at end of file