SPI DMA cleanup

This commit is contained in:
stevstrong 2017-05-19 17:25:51 +02:00
parent 04cf037a1d
commit c294b0d0dc
1 changed files with 7 additions and 11 deletions

View File

@ -428,14 +428,13 @@ uint8 SPIClass::dmaTransfer(void * transmitBuf, void * receiveBuf, uint16 length
);
dma_set_num_transfers(_currentSetting->spiDmaDev, _currentSetting->spiRxDmaStream, length);
dma_set_fifo_flags(_currentSetting->spiDmaDev, _currentSetting->spiRxDmaStream, 0);
dma_clear_isr_bits(_currentSetting->spiDmaDev, _currentSetting->spiRxDmaStream);
// TX
uint32 flags = (DMA_MINC_MODE | DMA_FROM_MEM); // | DMA_TRNS_CMPLT);
uint32 flags = (DMA_MINC_MODE | DMA_FROM_MEM);
if ( transmitBuf==0 ) {
static uint8_t ff = 0XFF;
static uint16_t ff = 0XFFFF;
transmitBuf = &ff;
flags &= ~((uint32)DMA_MINC_MODE); // remove increment mode
flags ^= DMA_MINC_MODE; // remove increment mode
}
dma_setup_transfer( _currentSetting->spiDmaDev,
_currentSetting->spiTxDmaStream,
@ -457,19 +456,18 @@ uint8 SPIClass::dmaTransfer(void * transmitBuf, void * receiveBuf, uint16 length
spi_tx_dma_enable(_currentSetting->spi_d); // must be the last enable to avoid DMA error flag
uint32_t m = millis();
while ((b = dma_get_isr_bits(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaStream) & DMA_ISR_TCIF)==0 ) {// wait for completion flag to be set
if ( b&(DMA_ISR_TEIF|DMA_ISR_DMEIF|DMA_ISR_FEIF) ) { b = 1; break; } // break on any error flag
while ((dma_get_isr_bits(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaStream) & DMA_ISR_TCIF)==0 ) {// wait for completion flag to be set
if ((millis() - m) > DMA_TIMEOUT) { b = 2; break; }
}
if (b & DMA_ISR_TCIF) b = 0;
while (spi_is_tx_empty(_currentSetting->spi_d) == 0); // "5. Wait until TXE=1 ..."
while (spi_is_busy(_currentSetting->spi_d) != 0); // "... and then wait until BSY=0 before disabling the SPI."
// software disable sequence, see AN4031, chapter 4.1
spi_tx_dma_disable(_currentSetting->spi_d);
spi_rx_dma_disable(_currentSetting->spi_d);
dma_disable(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaStream);
dma_disable(_currentSetting->spiDmaDev, _currentSetting->spiRxDmaStream);
dma_disable(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaStream);
return b;
}
@ -502,11 +500,9 @@ uint8 SPIClass::dmaSend(void * transmitBuf, uint16 length, bool minc)
spi_tx_dma_enable(_currentSetting->spi_d);
uint32_t m = millis();
while ((b = dma_get_isr_bits(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaStream) & DMA_ISR_TCIF)==0 ) {// wait for completion flag to be set
if ( b&(DMA_ISR_TEIF|DMA_ISR_DMEIF|DMA_ISR_FEIF) ) { b = 1; break; } // break on any error flag
while ((dma_get_isr_bits(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaStream) & DMA_ISR_TCIF)==0 ) {// wait for completion flag to be set
if ((millis() - m) > DMA_TIMEOUT) { b = 2; break; }
}
if (b & DMA_ISR_TCIF) b = 0;
while (spi_is_tx_empty(_currentSetting->spi_d) == 0); // "5. Wait until TXE=1 ..."
while (spi_is_busy(_currentSetting->spi_d) != 0); // "... and then wait until BSY=0 before disabling the SPI."