Merge branch 'master' of https://github.com/stevstrong/Arduino_STM32 into stevstrong-master

This commit is contained in:
Roger Clark 2015-11-04 09:02:56 +11:00
commit e48ff38e52
3 changed files with 36 additions and 14 deletions

View File

@ -141,16 +141,19 @@ SPIClass::SPIClass(uint32 spi_num) {
/*
* Set up/tear down
*/
void SPIClass::begin(void) {
uint32 flags = ((_currentSetting->bitOrder == MSBFIRST ? SPI_FRAME_MSB : SPI_FRAME_LSB) | SPI_DFF_8_BIT | SPI_SW_SLAVE | SPI_SOFT_SS);
spi_init(_currentSetting->spi_d);
configure_gpios(_currentSetting->spi_d, 1);
void SPIClass::updateSettings(void) {
uint32 flags = ((_currentSetting->bitOrder == MSBFIRST ? SPI_FRAME_MSB : SPI_FRAME_LSB) | SPI_DFF_8_BIT | SPI_SW_SLAVE | SPI_SOFT_SS);
#ifdef SPI_DEBUG
Serial.print("spi_master_enable("); Serial.print(_currentSetting->clockDivider); Serial.print(","); Serial.print(_currentSetting->dataMode); Serial.print(","); Serial.print(flags); Serial.println(")");
#endif
spi_master_enable(_currentSetting->spi_d, (spi_baud_rate)_currentSetting->clockDivider, (spi_mode)_currentSetting->dataMode, flags);
spi_master_enable(_currentSetting->spi_d, (spi_baud_rate)_currentSetting->clockDivider, (spi_mode)_currentSetting->dataMode, flags);
}
void SPIClass::begin(void) {
spi_init(_currentSetting->spi_d);
configure_gpios(_currentSetting->spi_d, 1);
updateSettings();
}
void SPIClass::beginSlave(void) {
@ -192,7 +195,7 @@ void SPIClass::setClockDivider(uint32_t clockDivider)
Serial.print("Clock divider set to "); Serial.println(clockDivider);
#endif
_currentSetting->clockDivider = clockDivider;
this->begin();
updateSettings();
}
void SPIClass::setBitOrder(BitOrder bitOrder)
@ -201,7 +204,7 @@ void SPIClass::setBitOrder(BitOrder bitOrder)
Serial.print("Bit order set to "); Serial.println(bitOrder);
#endif
_currentSetting->bitOrder = bitOrder;
this->begin();
updateSettings();
}
/* Victor Perez. Added to test changing datasize from 8 to 16 bit modes on the fly.
@ -250,8 +253,8 @@ If someone finds this is not the case or sees a logic error with this let me kno
Serial.print("Data mode set to "); Serial.println(dataMode);
#endif
_currentSetting->dataMode = dataMode;
this->begin();
}
updateSettings();
}
void SPIClass::beginTransaction(uint8_t pin, SPISettings settings)
@ -266,7 +269,6 @@ void SPIClass::beginTransaction(uint8_t pin, SPISettings settings)
setDataMode(settings.dataMode);
setClockDivider(determine_baud_rate(_currentSetting->spi_d, settings.clock));
begin();
}
void SPIClass::endTransaction(void)
@ -346,13 +348,16 @@ void SPIClass::write(const uint8 *data, uint32 length) {
}
while (spi_is_tx_empty(_currentSetting->spi_d) == 0); // "4. After writing the last data item into the SPI_DR register, wait until TXE=1 ..."
while (spi_is_busy(_currentSetting->spi_d) != 0); // "... then wait until BSY=0, this indicates that the transmission of the last data is complete."
// taken from SdSpiSTM32F1.cpp - Victor's lib, and adapted to support device selection
if (spi_is_rx_nonempty(_currentSetting->spi_d)) {
uint8_t b = spi_rx_reg(_currentSetting->spi_d);
}
}
uint8 SPIClass::transfer(uint8 byte) const {
uint8 b;
spi_tx_reg(_currentSetting->spi_d, byte); // "2. Write the first data item to be transmitted into the SPI_DR register (this clears the TXE flag)."
while (spi_is_rx_nonempty(_currentSetting->spi_d) == 0); // "4. Wait until RXNE=1 ..."
b = spi_rx_reg(_currentSetting->spi_d); // "... and read the last received data."
uint8 b = spi_rx_reg(_currentSetting->spi_d); // "... and read the last received data."
while (spi_is_tx_empty(_currentSetting->spi_d) == 0); // "5. Wait until TXE=1 ..."
while (spi_is_busy(_currentSetting->spi_d) != 0); // "... and then wait until BSY=0 before disabling the SPI."
return b;

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@ -375,6 +375,7 @@ private:
SPISettings _settings[BOARD_NR_SPI];
SPISettings *_currentSetting;
void updateSettings(void);
/*
spi_dev *spi_d;
uint8_t _SSPin;

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@ -87,8 +87,24 @@ extern const struct adc_dev *ADC3;
#define ADC_CR2_DMA (1U << ADC_CR2_DMA_BIT)
#define ADC_CR2_ALIGN (1U << ADC_CR2_ALIGN_BIT)
#define ADC_CR2_JEXTSEL 0x7000
#define ADC_CR2_JEXTSEL_TIM1_TRGO (0x0 << 12)
#define ADC_CR2_JEXTSEL_TIM1_CC4 (0x1 << 12)
#define ADC_CR2_JEXTSEL_TIM2_TRGO (0x2 << 12)
#define ADC_CR2_JEXTSEL_TIM2_CC1 (0x3 << 12)
#define ADC_CR2_JEXTSEL_TIM3_CC4 (0x4 << 12)
#define ADC_CR2_JEXTSEL_TIM4_TRGO (0x5 << 12)
#define ADC_CR2_JEXTSEL_EXTI15 (0x6 << 12)
#define ADC_CR2_JEXTSEL_JSWSTART (0x7 << 12)
#define ADC_CR2_JEXTTRIG (1U << ADC_CR2_JEXTTRIG_BIT)
#define ADC_CR2_EXTSEL 0xE0000
#define ADC_CR2_EXTSEL_TIM1_CC1 (0x0 << 17)
#define ADC_CR2_EXTSEL_TIM1_CC2 (0x1 << 17)
#define ADC_CR2_EXTSEL_TIM1_CC3 (0x2 << 17)
#define ADC_CR2_EXTSEL_TIM2_CC2 (0x3 << 17)
#define ADC_CR2_EXTSEL_TIM3_TRGO (0x4 << 17)
#define ADC_CR2_EXTSEL_TIM4_CC4 (0x5 << 17)
#define ADC_CR2_EXTSEL_EXTI11 (0x6 << 17)
#define ADC_CR2_EXTSEL_SWSTART (0x7 << 17)
#define ADC_CR2_EXTTRIG (1U << ADC_CR2_EXTTRIG_BIT)
#define ADC_CR2_JSWSTART (1U << ADC_CR2_JSWSTART_BIT)
#define ADC_CR2_SWSTART (1U << ADC_CR2_SWSTART_BIT)