From 6030e1325878a264338c65905bbda47a8fa9d85a Mon Sep 17 00:00:00 2001 From: Testato Date: Sat, 17 Dec 2016 12:29:42 +0100 Subject: [PATCH 01/12] Update boards.txt PR for issue https://github.com/rogerclarkmelbourne/Arduino_STM32/issues/200 --- STM32F1/boards.txt | 82 ++++++++++++++++------------------------------ 1 file changed, 29 insertions(+), 53 deletions(-) diff --git a/STM32F1/boards.txt b/STM32F1/boards.txt index 95a5f86..030a961 100644 --- a/STM32F1/boards.txt +++ b/STM32F1/boards.txt @@ -25,17 +25,15 @@ mapleMini.upload.auto_reset=true mapleMini.menu.bootloader_version.original = Original (17k RAM,108k Flash) mapleMini.menu.bootloader_version.original.build.vect=VECT_TAB_ADDR=0x8005000 mapleMini.menu.bootloader_version.original.build.ldscript=ld/flash.ld -mapleMini.menu.bootloader_version.original.upload.ram.maximum_size=17408 -mapleMini.menu.bootloader_version.original.upload.flash.maximum_size=110592 mapleMini.menu.bootloader_version.original.upload.maximum_size=110592 +mapleMini.menu.bootloader_version.original.upload.maximum_data_size=17408 mapleMini.menu.bootloader_version.original.upload.altID=1 mapleMini.menu.bootloader_version.bootloader20 = Bootloader 2.0 (20k RAM,120k Flash) mapleMini.menu.bootloader_version.bootloader20.build.vect=VECT_TAB_ADDR=0x8002000 mapleMini.menu.bootloader_version.bootloader20.build.ldscript=ld/bootloader_20.ld -mapleMini.menu.bootloader_version.bootloader20.upload.ram.maximum_size=20480 -mapleMini.menu.bootloader_version.bootloader20.upload.flash.maximum_size=122880 mapleMini.menu.bootloader_version.bootloader20.upload.maximum_size=122880 +mapleMini.menu.bootloader_version.bootloader20.upload.maximum_data_size=20480 mapleMini.menu.bootloader_version.bootloader20.upload.altID=2 ############################################################## @@ -46,10 +44,9 @@ maple.pid.0=0x0004 maple.upload.tool=maple_upload maple.upload.protocol=maple_dfu maple.upload.maximum_size=108000 +maple.upload.maximum_data_size=17000 maple.upload.use_1200bps_touch=false maple.upload.file_type=bin -maple.upload.ram.maximum_size=17000 -maple.upload.flash.maximum_size=108000 maple.upload.usbID=1EAF:0003 maple.upload.altID=1 maple.upload.auto_reset=true @@ -77,10 +74,9 @@ mapleRET6.build.vect=VECT_TAB_ADDR=0x8005000 mapleRET6.upload.tool=maple_upload mapleRET6.upload.protocol=maple_dfu mapleRET6.upload.maximum_size=262144 +mapleRET6.upload.maximum_data_size=49152 mapleRET6.upload.use_1200bps_touch=false mapleRET6.upload.file_type=bin -mapleRET6.upload.ram.maximum_size=49152 -mapleRET6.upload.flash.maximum_size=262144 mapleRET6.upload.usbID=1EAF:0003 mapleRET6.upload.altID=1 mapleRET6.upload.auto_reset=true @@ -94,10 +90,9 @@ microduino32_flash.pid.0=0x0004 microduino32_flash.upload.tool=maple_upload microduino32_flash.upload.protocol=maple_dfu microduino32_flash.upload.maximum_size=108000 +microduino32_flash.upload.maximum_data_size=17000 microduino32_flash.upload.use_1200bps_touch=false microduino32_flash.upload.file_type=bin -microduino32_flash.upload.ram.maximum_size=17000 -microduino32_flash.upload.flash.maximum_size=108000 microduino32_flash.upload.usbID=1EAF:0003 microduino32_flash.upload.altID=1 microduino32_flash.upload.auto_reset=true @@ -123,10 +118,9 @@ nucleo_f103rb.name=STM Nucleo F103RB (STLink) nucleo_f103rb.upload.tool=stlink_upload nucleo_f103rb.upload.protocol=maple_dfu nucleo_f103rb.upload.maximum_size=108000 +nucleo_f103rb.upload.maximum_data_size=17000 nucleo_f103rb.upload.use_1200bps_touch=false nucleo_f103rb.upload.file_type=bin -nucleo_f103rb.upload.ram.maximum_size=17000 -nucleo_f103rb.upload.flash.maximum_size=108000 nucleo_f103rb.upload.params.quiet=no nucleo_f103rb.upload.usbID=1EAF:0003 @@ -174,16 +168,14 @@ genericSTM32F103C.menu.device_variant.STM32F103C8=STM32F103C8 (20k RAM. 64k Flas genericSTM32F103C.menu.device_variant.STM32F103C8.build.cpu_flags=-DMCU_STM32F103C8 genericSTM32F103C.menu.device_variant.STM32F103C8.build.ldscript=ld/jtag_c8.ld genericSTM32F103C.menu.device_variant.STM32F103C8.upload.maximum_size=65536 -genericSTM32F103C.menu.device_variant.STM32F103C8.upload.ram.maximum_size=20480 -genericSTM32F103C.menu.device_variant.STM32F103C8.upload.flash.maximum_size=65536 +genericSTM32F103C.menu.device_variant.STM32F103C8.upload.maximum_data_size=20480 ## STM32F103CB ------------------------- genericSTM32F103C.menu.device_variant.STM32F103CB=STM32F103CB (20k RAM. 128k Flash) genericSTM32F103C.menu.device_variant.STM32F103CB.build.cpu_flags=-DMCU_STM32F103CB genericSTM32F103C.menu.device_variant.STM32F103CB.build.ldscript=ld/jtag.ld genericSTM32F103C.menu.device_variant.STM32F103CB.upload.maximum_size=131072 -genericSTM32F103C.menu.device_variant.STM32F103CB.upload.ram.maximum_size=20480 -genericSTM32F103C.menu.device_variant.STM32F103CB.upload.flash.maximum_size=131072 +genericSTM32F103C.menu.device_variant.STM32F103C8.upload.maximum_data_size=20480 #---------------------------- UPLOAD METHODS --------------------------- @@ -211,7 +203,6 @@ genericSTM32F103C.menu.upload_method.BMPMethod.upload.protocol=gdb_bmp genericSTM32F103C.menu.upload_method.BMPMethod.upload.tool=bmp_upload genericSTM32F103C.menu.upload_method.BMPMethod.build.upload_flags=-DCONFIG_MAPLE_MINI_NO_DISABLE_DEBUG - genericSTM32F103C.menu.upload_method.jlinkMethod=JLink genericSTM32F103C.menu.upload_method.jlinkMethod.upload.protocol=jlink genericSTM32F103C.menu.upload_method.jlinkMethod.upload.tool=jlink_upload @@ -234,22 +225,21 @@ genericSTM32F103R.menu.device_variant.STM32F103R8=STM32F103R8 (20k RAM. 64k Flas genericSTM32F103R.menu.device_variant.STM32F103R8.build.variant=generic_stm32f103r8 genericSTM32F103R.menu.device_variant.STM32F103R8.build.cpu_flags=-DMCU_STM32F103R8 genericSTM32F103R.menu.device_variant.STM32F103R8.upload.maximum_size=65536 -genericSTM32F103R.menu.device_variant.STM32F103R8.upload.ram.maximum_size=20480 -genericSTM32F103R.menu.device_variant.STM32F103R8.upload.flash.maximum_size=65536 +genericSTM32F103R.menu.device_variant.STM32F103R8.upload.maximum_data_size=20480 genericSTM32F103R.menu.device_variant.STM32F103R8.build.ldscript=ld/stm32f103r8.ld genericSTM32F103R.menu.device_variant.STM32F103RB=STM32F103RB (20k RAM. 128k Flash) genericSTM32F103R.menu.device_variant.STM32F103RB.build.variant=generic_stm32f103r8 genericSTM32F103R.menu.device_variant.STM32F103RB.build.cpu_flags=-DMCU_STM32F103RB genericSTM32F103R.menu.device_variant.STM32F103RB.upload.maximum_size=131072 -genericSTM32F103R.menu.device_variant.STM32F103RB.upload.ram.maximum_size=20480 -genericSTM32F103R.menu.device_variant.STM32F103RB.upload.flash.maximum_size=131072 +genericSTM32F103R.menu.device_variant.STM32F103RB.upload.maximum_data_size=20480 genericSTM32F103R.menu.device_variant.STM32F103RB.build.ldscript=ld/stm32f103rb.ld genericSTM32F103R.menu.device_variant.STM32F103RC=STM32F103RC (48k RAM. 256k Flash) genericSTM32F103R.menu.device_variant.STM32F103RC.build.variant=generic_stm32f103r genericSTM32F103R.menu.device_variant.STM32F103RC.build.cpu_flags=-DMCU_STM32F103RC genericSTM32F103R.menu.device_variant.STM32F103RC.upload.maximum_size=262144 +genericSTM32F103R.menu.device_variant.STM32F103RC.upload.maximum_data_size=49152 genericSTM32F103R.menu.device_variant.STM32F103RC.upload.ram.maximum_size=49152 genericSTM32F103R.menu.device_variant.STM32F103RC.upload.flash.maximum_size=262144 genericSTM32F103R.menu.device_variant.STM32F103RC.build.ldscript=ld/stm32f103rc.ld @@ -258,8 +248,7 @@ genericSTM32F103R.menu.device_variant.STM32F103RE=STM32F103RE (64k RAM. 512k Fla genericSTM32F103R.menu.device_variant.STM32F103RE.build.variant=generic_stm32f103r genericSTM32F103R.menu.device_variant.STM32F103RE.build.cpu_flags=-DMCU_STM32F103RE genericSTM32F103R.menu.device_variant.STM32F103RE.upload.maximum_size=524288 -genericSTM32F103R.menu.device_variant.STM32F103RE.upload.ram.maximum_size=65536 -genericSTM32F103R.menu.device_variant.STM32F103RE.upload.flash.maximum_size=524288 +genericSTM32F103R.menu.device_variant.STM32F103RE.upload.maximum_data_size=65536 genericSTM32F103R.menu.device_variant.STM32F103RE.build.ldscript=ld/stm32f103re.ld #---------------------------- UPLOAD METHODS --------------------------- @@ -305,16 +294,14 @@ genericSTM32F103T.menu.device_variant.STM32F103T8=STM32F103T8 (20k RAM. 64k Flas genericSTM32F103T.menu.device_variant.STM32F103T8.build.cpu_flags=-DMCU_STM32F103T8 genericSTM32F103T.menu.device_variant.STM32F103T8.build.ldscript=ld/jtag_t8.ld genericSTM32F103T.menu.device_variant.STM32F103T8.upload.maximum_size=65536 -genericSTM32F103T.menu.device_variant.STM32F103T8.upload.ram.maximum_size=20480 -genericSTM32F103T.menu.device_variant.STM32F103T8.upload.flash.maximum_size=65536 +genericSTM32F103T.menu.device_variant.STM32F103T8.upload.maximum_data_size=20480 ## STM32F103TB ------------------------- genericSTM32F103T.menu.device_variant.STM32F103TB=STM32F103TB (20k RAM. 128k Flash) genericSTM32F103T.menu.device_variant.STM32F103TB.build.cpu_flags=-DMCU_STM32F103TB genericSTM32F103T.menu.device_variant.STM32F103TB.build.ldscript=ld/jtag.ld genericSTM32F103T.menu.device_variant.STM32F103TB.upload.maximum_size=131072 -genericSTM32F103T.menu.device_variant.STM32F103TB.upload.ram.maximum_size=20480 -genericSTM32F103T.menu.device_variant.STM32F103TB.upload.flash.maximum_size=131072 +genericSTM32F103T.menu.device_variant.STM32F103TB.upload.maximum_data_size=20480 #---------------------------- UPLOAD METHODS --------------------------- @@ -360,22 +347,19 @@ genericSTM32F103V.build.error_led_pin=6 genericSTM32F103V.menu.device_variant.STM32F103VC=STM32F103VC genericSTM32F103V.menu.device_variant.STM32F103VC.build.cpu_flags=-DMCU_STM32F103VC genericSTM32F103V.menu.device_variant.STM32F103VC.upload.maximum_size=262144 -genericSTM32F103V.menu.device_variant.STM32F103VC.upload.ram.maximum_size=49152 -genericSTM32F103V.menu.device_variant.STM32F103VC.upload.flash.maximum_size=262144 +genericSTM32F103V.menu.device_variant.STM32F103VC.upload.maximum_data_size=49152 genericSTM32F103V.menu.device_variant.STM32F103VC.build.ldscript=ld/stm32f103vc.ld genericSTM32F103V.menu.device_variant.STM32F103VD=STM32F103VD genericSTM32F103V.menu.device_variant.STM32F103VD.build.cpu_flags=-DMCU_STM32F103VD genericSTM32F103V.menu.device_variant.STM32F103VD.upload.maximum_size=393216 -genericSTM32F103V.menu.device_variant.STM32F103VD.upload.ram.maximum_size=65536 -genericSTM32F103V.menu.device_variant.STM32F103VD.upload.flash.maximum_size=393216 +genericSTM32F103V.menu.device_variant.STM32F103VD.upload.maximum_data_size=65536 genericSTM32F103V.menu.device_variant.STM32F103VD.build.ldscript=ld/stm32f103vd.ld genericSTM32F103V.menu.device_variant.STM32F103VE=STM32F103VE genericSTM32F103V.menu.device_variant.STM32F103VE.build.cpu_flags=-DMCU_STM32F103VE genericSTM32F103V.menu.device_variant.STM32F103VE.upload.maximum_size=524288 -genericSTM32F103V.menu.device_variant.STM32F103VE.upload.ram.maximum_size=65536 -genericSTM32F103V.menu.device_variant.STM32F103VE.upload.flash.maximum_size=524288 +genericSTM32F103V.menu.device_variant.STM32F103VE.upload.maximum_data_size=65536 genericSTM32F103V.menu.device_variant.STM32F103VE.build.ldscript=ld/stm32f103ve.ld #---------------------------- UPLOAD METHODS --------------------------- @@ -419,22 +403,19 @@ genericSTM32F103Z.upload.auto_reset=true genericSTM32F103Z.menu.device_variant.STM32F103ZC=STM32F103ZC genericSTM32F103Z.menu.device_variant.STM32F103ZC.build.cpu_flags=-DMCU_STM32F103ZC genericSTM32F103Z.menu.device_variant.STM32F103ZC.upload.maximum_size=262144 -genericSTM32F103Z.menu.device_variant.STM32F103ZC.upload.ram.maximum_size=49152 -genericSTM32F103Z.menu.device_variant.STM32F103ZC.upload.flash.maximum_size=262144 +genericSTM32F103Z.menu.device_variant.STM32F103ZC.upload.maximum_data_size=49152 genericSTM32F103Z.menu.device_variant.STM32F103ZC.build.ldscript=ld/stm32f103zc.ld genericSTM32F103Z.menu.device_variant.STM32F103ZD=STM32F103ZD genericSTM32F103Z.menu.device_variant.STM32F103ZD.build.cpu_flags=-DMCU_STM32F103ZD genericSTM32F103Z.menu.device_variant.STM32F103ZD.upload.maximum_size=393216 -genericSTM32F103Z.menu.device_variant.STM32F103ZD.upload.ram.maximum_size=65536 -genericSTM32F103Z.menu.device_variant.STM32F103ZD.upload.flash.maximum_size=393216 +genericSTM32F103Z.menu.device_variant.STM32F103ZD.upload.maximum_data_size=65536 genericSTM32F103Z.menu.device_variant.STM32F103ZD.build.ldscript=ld/stm32f103zd.ld genericSTM32F103Z.menu.device_variant.STM32F103ZE=STM32F103ZE genericSTM32F103Z.menu.device_variant.STM32F103ZE.build.cpu_flags=-DMCU_STM32F103ZE genericSTM32F103Z.menu.device_variant.STM32F103ZE.upload.maximum_size=524288 -genericSTM32F103Z.menu.device_variant.STM32F103ZE.upload.ram.maximum_size=65536 -genericSTM32F103Z.menu.device_variant.STM32F103ZE.upload.flash.maximum_size=524288 +genericSTM32F103Z.menu.device_variant.STM32F103ZE.upload.maximum_data_size=65536 genericSTM32F103Z.menu.device_variant.STM32F103ZE.build.ldscript=ld/stm32f103ze.ld #---------------------------- UPLOAD METHODS --------------------------- @@ -479,9 +460,7 @@ hytiny-stm32f103t.upload.auto_reset=true hytiny-stm32f103t.build.cpu_flags=-DMCU_STM32F103CB hytiny-stm32f103t.build.ldscript=ld/jtag.ld hytiny-stm32f103t.upload.maximum_size=131072 -hytiny-stm32f103t.upload.ram.maximum_size=20480 -hytiny-stm32f103t.upload.flash.maximum_size=131072 - +hytiny-stm32f103t.upload.maximum_data_size=20480 #---------------------------- UPLOAD METHODS --------------------------- @@ -529,20 +508,17 @@ genericGD32F103C.upload.auto_reset=true genericGD32F103C.build.cpu_flags=-DMCU_STM32F103CB genericGD32F103C.build.f_cpu=72000000L -## GD32F103CB ------------------------- -genericGD32F103C.menu.device_variant.GD32F103CB=GD32F103CB (20k RAM. 128k Flash) -genericGD32F103C.menu.device_variant.GD32F103CB.build.ldscript=ld/jtag.ld -genericGD32F103C.menu.device_variant.GD32F103CB.upload.maximum_size=131072 -genericGD32F103C.menu.device_variant.GD32F103CB.upload.ram.maximum_size=20480 -genericGD32F103C.menu.device_variant.GD32F103CB.upload.flash.maximum_size=131072 - - ## GD32F103C8 ------------------------- genericGD32F103C.menu.device_variant.GD32F103C8=GD32F103C8 (20k RAM. 64k Flash) genericGD32F103C.menu.device_variant.GD32F103C8.build.ldscript=ld/jtag_c8.ld genericGD32F103C.menu.device_variant.GD32F103C8.upload.maximum_size=65536 -genericGD32F103C.menu.device_variant.GD32F103C8.upload.ram.maximum_size=20480 -genericGD32F103C.menu.device_variant.GD32F103C8.upload.flash.maximum_size=65536 +genericGD32F103C.menu.device_variant.GD32F103C8.upload.maximum_data_size=20480 + +## GD32F103CB ------------------------- +genericGD32F103C.menu.device_variant.GD32F103CB=GD32F103CB (20k RAM. 128k Flash) +genericGD32F103C.menu.device_variant.GD32F103CB.build.ldscript=ld/jtag.ld +genericGD32F103C.menu.device_variant.GD32F103CB.upload.maximum_size=131072 +genericGD32F103C.menu.device_variant.GD32F103CB.upload.maximum_data_size=20480 #---------------------------- UPLOAD METHODS --------------------------- @@ -601,8 +577,8 @@ STM32VLD.upload.auto_reset=true STM32VLD.upload.params.quiet=no STM32VLD.build.cpu_flags=-DMCU_STM32F100RB -##---------------------------- UPLOAD METHODS --------------------------- +#---------------------------- UPLOAD METHODS --------------------------- STM32VLD.menu.upload_method.STLinkMethod=STLink STM32VLD.menu.upload_method.STLinkMethod.upload.protocol=STLink From 30d1bf490071c6beeeb3b6f1eb108f4450e0fdf6 Mon Sep 17 00:00:00 2001 From: syfre Date: Sat, 6 May 2017 23:02:54 +0200 Subject: [PATCH 02/12] Fix, add ADC_CR2_EXTTRIG to adc_set_extsel() to enable the external trigger mode --- STM32F1/cores/maple/libmaple/adc.c | 1 + 1 file changed, 1 insertion(+) diff --git a/STM32F1/cores/maple/libmaple/adc.c b/STM32F1/cores/maple/libmaple/adc.c index 7c48ee4..416cfaa 100644 --- a/STM32F1/cores/maple/libmaple/adc.c +++ b/STM32F1/cores/maple/libmaple/adc.c @@ -59,6 +59,7 @@ void adc_set_extsel(adc_dev *dev, adc_extsel_event event) { uint32 cr2 = dev->regs->CR2; cr2 &= ~ADC_CR2_EXTSEL; cr2 |= event; + cr2 |= ADC_CR2_EXTTRIG; dev->regs->CR2 = cr2; } From 50e4d84db49dbe20d759f99614bb6d71ef8737e5 Mon Sep 17 00:00:00 2001 From: syfre Date: Sat, 6 May 2017 23:03:47 +0200 Subject: [PATCH 03/12] Add, setMasterModeTrGo to configure the TrGo mode Use to trigger the ADC on TIMx_TRGO --- STM32F1/cores/maple/HardwareTimer.cpp | 5 +++++ STM32F1/cores/maple/HardwareTimer.h | 17 +++++++++++++++++ 2 files changed, 22 insertions(+) diff --git a/STM32F1/cores/maple/HardwareTimer.cpp b/STM32F1/cores/maple/HardwareTimer.cpp index 48d0400..ecd1b11 100644 --- a/STM32F1/cores/maple/HardwareTimer.cpp +++ b/STM32F1/cores/maple/HardwareTimer.cpp @@ -142,6 +142,11 @@ void HardwareTimer::refresh(void) { timer_generate_update(this->dev); } +void HardwareTimer::setMasterModeTrGo(uint32_t mode) { + this->dev->regs.bas->CR2 &= ~TIMER_CR2_MMS; + this->dev->regs.bas->CR2 |= mode; +} + /* CARLOS Changes to add encoder mode.*/ //direction of movement. (to be better described). diff --git a/STM32F1/cores/maple/HardwareTimer.h b/STM32F1/cores/maple/HardwareTimer.h index 45272ec..75601d0 100644 --- a/STM32F1/cores/maple/HardwareTimer.h +++ b/STM32F1/cores/maple/HardwareTimer.h @@ -209,6 +209,23 @@ public: */ void refresh(void); + // SYFRE + /** + * @brief Set the Master mode TRGO signal + * These bits allow to select the information to be sent in master mode to slave timers for + * synchronization (TRGO). + * mode: + * TIMER_CR2_MMS_RESET + * TIMER_CR2_MMS_ENABLE + * TIMER_CR2_MMS_UPDATE + * TIMER_CR2_MMS_COMPARE_PULSE + * TIMER_CR2_MMS_COMPARE_OC1REF + * TIMER_CR2_MMS_COMPARE_OC2REF + * TIMER_CR2_MMS_COMPARE_OC3REF + * TIMER_CR2_MMS_COMPARE_OC4REF + */ + void setMasterModeTrGo(uint32_t mode); + //CARLOS. /* added these functions to make sense for the encoder mode. From d240a7efa737a4f4a7a8f053c4a3d1eb4da68841 Mon Sep 17 00:00:00 2001 From: syfre Date: Sat, 6 May 2017 23:04:11 +0200 Subject: [PATCH 04/12] Fix, compile error in enable_internal_reading() --- STM32F1/libraries/STM32ADC/src/utility/util_adc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/STM32F1/libraries/STM32ADC/src/utility/util_adc.c b/STM32F1/libraries/STM32ADC/src/utility/util_adc.c index 5d44939..e64b58e 100644 --- a/STM32F1/libraries/STM32ADC/src/utility/util_adc.c +++ b/STM32F1/libraries/STM32ADC/src/utility/util_adc.c @@ -45,7 +45,7 @@ void enable_adc_irq(adc_dev* dev) {//ADC1 for now. Enable the reading of the internal variables (Temperature and Vref). */ void enable_internal_reading(adc_dev *dev) { - dev->regs->CR2 |= ADC_CR2_TSEREFE; + dev->regs->CR2 |= ADC_CR2_TSVREFE; } /* From c8df44228ced3ad7a08f0275ad7acc3458dede70 Mon Sep 17 00:00:00 2001 From: syfre Date: Sun, 7 May 2017 11:41:58 +0200 Subject: [PATCH 05/12] Add, SMT32ADC example, Single channel at fixed sample rate (timer) using circular buffer (DMA) --- ...ingleChannelAtSampleRateCircularBuffer.ino | 87 +++++++++++++++++++ 1 file changed, 87 insertions(+) create mode 100644 STM32F1/libraries/STM32ADC/examples/SingleChannelAtSampleRateCircularBuffer/SingleChannelAtSampleRateCircularBuffer.ino diff --git a/STM32F1/libraries/STM32ADC/examples/SingleChannelAtSampleRateCircularBuffer/SingleChannelAtSampleRateCircularBuffer.ino b/STM32F1/libraries/STM32ADC/examples/SingleChannelAtSampleRateCircularBuffer/SingleChannelAtSampleRateCircularBuffer.ino new file mode 100644 index 0000000..e63fe32 --- /dev/null +++ b/STM32F1/libraries/STM32ADC/examples/SingleChannelAtSampleRateCircularBuffer/SingleChannelAtSampleRateCircularBuffer.ino @@ -0,0 +1,87 @@ +#include +#include + +#define pinLED PC13 +#define pinOUT PB0 + +#define _SEND_BY_USB +#ifdef SEND_BY_USB +USBSerial usb; +#endif + +// Channels to be acquired. +// A0 (adc1 channel 1) +uint8 pins = 0; + +#define maxSamples 2000 +uint16_t buffer[maxSamples]; +uint16_t *buffers[2]; +uint8_t bufr; +uint8_t bufw; + +#define sampleFreqKhz 200 +#define samplePeriodus 1000 / sampleFreqKhz +#define ticksPerSecond 2 * sampleFreqKhz * 1000 / maxSamples + + +STM32ADC myADC(ADC1); + + +long ticks; +void TimerIRQ(void) { + ticks++; +} +void DmaIRQ(void) { + digitalWrite(pinOUT, ! digitalRead(pinOUT)); + bufw = (bufw+1)%2; + ticks++; +} + +void setup() { + + pinMode(pinLED, OUTPUT); + pinMode(pinOUT, OUTPUT); + pinMode(pins, INPUT_ANALOG); + + Serial.begin(115200); + Serial.println("START"); + + #ifdef SEND_BY_USB + usb.begin(); + while (!usb.isConnected()) ; + #endif + + ticks = 0; + bufr = 0; + bufw = 0; + buffers[0] = &buffer[0]; + buffers[1] = &buffer[maxSamples/2]; + + Timer3.setPeriod(samplePeriodus); + Timer3.setMasterModeTrGo(TIMER_CR2_MMS_UPDATE); + + myADC.calibrate(); + myADC.setSampleRate(ADC_SMPR_1_5); // ? + myADC.setPins(&pins, 1); + myADC.setDMA(buffer, maxSamples, (DMA_MINC_MODE | DMA_CIRC_MODE | DMA_HALF_TRNS | DMA_TRNS_CMPLT), DmaIRQ); + myADC.setTrigger(ADC_EXT_EV_TIM3_TRGO); + myADC.startConversion(); +} + +void loop() { + + if (bufr!=bufw) { + // process data + + #ifdef SEND_BY_USB + if (usb.isConnected()) usb.write((uint8_t *)buffers[bufr],maxSamples); // send it : (maxSamples /2 )*2 (bytes) + #endif + + bufr = (bufr+1)%2; + } + + if (ticks==ticksPerSecond) { + digitalWrite(pinLED, ! digitalRead(pinLED)); + ticks = 0; + } +} From 85f8b8237af7f580fbcd823e42d4ba4e9c530b58 Mon Sep 17 00:00:00 2001 From: Testato Date: Tue, 4 Jul 2017 10:05:01 +0200 Subject: [PATCH 06/12] Update boards.txt - Exluded CCM Ram --- STM32F4/boards.txt | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/STM32F4/boards.txt b/STM32F4/boards.txt index 0df9990..60d4fc4 100644 --- a/STM32F4/boards.txt +++ b/STM32F4/boards.txt @@ -11,7 +11,7 @@ discovery_f407.upload.protocol=stlink #discovery_f407.upload.use_1200bps_touch=false discovery_f407.upload.file_type=bin discovery_f407.upload.maximum_size=1048576 -discovery_f407.upload.maximum_data_size=196608 +discovery_f407.upload.maximum_data_size=131072 #discovery_f407.upload.usbID=1EAF:0003 #discovery_f407.upload.altID=1 @@ -43,9 +43,8 @@ generic_f407v.upload.tool=stlink_upload generic_f407v.upload.protocol=stlink generic_f407v.upload.file_type=bin -generic_f407v.upload.ram.maximum_size=131072 -generic_f407v.upload.flash.maximum_size=514288 generic_f407v.upload.maximum_size=514288 +generic_f407v.upload.ram.maximum_size=131072 #generic_f407v.upload.usbID=0483:3748 #generic_f407v.upload.altID=1 @@ -82,7 +81,7 @@ stm32f4stamp.upload.protocol=maple_dfu #stm32f4stamp.upload.use_1200bps_touch=false stm32f4stamp.upload.file_type=bin stm32f4stamp.upload.maximum_size=1048576 -stm32f4stamp.upload.maximum_data_size=196608 +stm32f4stamp.upload.maximum_data_size=131072 stm32f4stamp.upload.usbID=0483:df11 stm32f4stamp.upload.altID=0 @@ -117,7 +116,7 @@ netduino2plus.upload.protocol=maple_dfu #netduino2plus.upload.use_1200bps_touch=false netduino2plus.upload.file_type=bin netduino2plus.upload.maximum_size=1048576 -netduino2plus.upload.maximum_data_size=196608 +netduino2plus.upload.maximum_data_size=131072 netduino2plus.upload.usbID=0483:df11 netduino2plus.upload.altID=0 From 8683035cb7f95127b18b386be24b0fac537bb1f8 Mon Sep 17 00:00:00 2001 From: victorpv Date: Sat, 8 Jul 2017 10:46:49 -0500 Subject: [PATCH 07/12] Update usb_serial.h --- STM32F1/cores/maple/usb_serial.h | 1 + 1 file changed, 1 insertion(+) diff --git a/STM32F1/cores/maple/usb_serial.h b/STM32F1/cores/maple/usb_serial.h index d6c3e02..153eb8e 100644 --- a/STM32F1/cores/maple/usb_serial.h +++ b/STM32F1/cores/maple/usb_serial.h @@ -51,6 +51,7 @@ public: virtual int available(void);// Changed to virtual + size_t usb_serial_class::readBytes(char *buf, const size_t& len); uint32 read(uint8 * buf, uint32 len); // uint8 read(void); From 1c07e25bd71f4e823aa9d61e2194731a9d9aee8a Mon Sep 17 00:00:00 2001 From: victorpv Date: Sat, 8 Jul 2017 10:49:14 -0500 Subject: [PATCH 08/12] Update usb_serial.h --- STM32F1/cores/maple/usb_serial.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/STM32F1/cores/maple/usb_serial.h b/STM32F1/cores/maple/usb_serial.h index 153eb8e..8351593 100644 --- a/STM32F1/cores/maple/usb_serial.h +++ b/STM32F1/cores/maple/usb_serial.h @@ -51,7 +51,7 @@ public: virtual int available(void);// Changed to virtual - size_t usb_serial_class::readBytes(char *buf, const size_t& len); + size_t readBytes(char *buf, const size_t& len); uint32 read(uint8 * buf, uint32 len); // uint8 read(void); From fd95b999146be0ffbb607551370bf4cd0d7bfaff Mon Sep 17 00:00:00 2001 From: victorpv Date: Sat, 8 Jul 2017 10:52:50 -0500 Subject: [PATCH 09/12] Added readBytes function to usbSerial Add Arduino USB implementation of Arduino Stream class readBytes, which reads bytes in blocks with a timeout. Increases the speed from 300KB/s to 500KB/s over the Stream class readBytes function. --- STM32F1/cores/maple/usb_serial.cpp | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/STM32F1/cores/maple/usb_serial.cpp b/STM32F1/cores/maple/usb_serial.cpp index 994cd7a..0902c50 100644 --- a/STM32F1/cores/maple/usb_serial.cpp +++ b/STM32F1/cores/maple/usb_serial.cpp @@ -168,6 +168,19 @@ uint32 USBSerial::read(uint8 * buf, uint32 len) { return rxed; } +size_t USBSerial::readBytes(char *buf, const size_t& len) +{ + size_t rxed=0; + unsigned long startMillis; + startMillis = millis(); + if (len <= 0) return 0; + do { + rxed += usb_cdcacm_rx((uint8 *)buf + rxed, len - rxed); + if (rxed == len) return rxed; + } while(millis() - startMillis < _timeout); + return rxed; +} + /* Blocks forever until 1 byte is received */ int USBSerial::read(void) { uint8 b; From b892004cc236553618c29c7afb43663f00af9016 Mon Sep 17 00:00:00 2001 From: victorpv Date: Mon, 10 Jul 2017 12:00:29 -0500 Subject: [PATCH 10/12] Add files via upload --- STM32F1/libraries/SPI/src/SPI.cpp | 362 +++++++++++++++++++++--------- STM32F1/libraries/SPI/src/SPI.h | 81 +++++-- 2 files changed, 313 insertions(+), 130 deletions(-) diff --git a/STM32F1/libraries/SPI/src/SPI.cpp b/STM32F1/libraries/SPI/src/SPI.cpp index f0d9f7f..998f9b0 100644 --- a/STM32F1/libraries/SPI/src/SPI.cpp +++ b/STM32F1/libraries/SPI/src/SPI.cpp @@ -101,16 +101,19 @@ SPIClass::SPIClass(uint32 spi_num) { #if BOARD_NR_SPI >= 1 case 1: _currentSetting->spi_d = SPI1; + _spi1_this = (void*) this; break; #endif #if BOARD_NR_SPI >= 2 case 2: _currentSetting->spi_d = SPI2; + _spi2_this = (void*) this; break; #endif #if BOARD_NR_SPI >= 3 case 3: _currentSetting->spi_d = SPI3; + _spi3_this = (void*) this; break; #endif default: @@ -137,6 +140,8 @@ SPIClass::SPIClass(uint32 spi_num) { _settings[2].spiRxDmaChannel = DMA_CH1; #endif + // added for DMA callbacks. + _currentSetting->state = SPI_STATE_IDLE; } /* @@ -154,6 +159,8 @@ void SPIClass::begin(void) { spi_init(_currentSetting->spi_d); configure_gpios(_currentSetting->spi_d, 1); updateSettings(); + // added for DMA callbacks. + _currentSetting->state = SPI_STATE_READY; } void SPIClass::beginSlave(void) { @@ -164,6 +171,8 @@ void SPIClass::beginSlave(void) { Serial.print("spi_slave_enable("); Serial.print(_currentSetting->dataMode); Serial.print(","); Serial.print(flags); Serial.println(")"); #endif spi_slave_enable(_currentSetting->spi_d, (spi_mode)_currentSetting->dataMode, flags); + // added for DMA callbacks. + _currentSetting->state = SPI_STATE_READY; } void SPIClass::end(void) { @@ -182,6 +191,9 @@ void SPIClass::end(void) { while (spi_is_busy(_currentSetting->spi_d)) ; spi_peripheral_disable(_currentSetting->spi_d); + // added for DMA callbacks. + // Need to add unsetting the callbacks for the DMA channels. + _currentSetting->state = SPI_STATE_IDLE; } /* Roger Clark added 3 functions */ @@ -384,98 +396,126 @@ uint16_t SPIClass::transfer16(uint16_t wr_data) const /* Roger Clark and Victor Perez, 2015 * Performs a DMA SPI transfer with at least a receive buffer. -* If a TX buffer is not provided, FF is sent over and over for the length of the transfer. -* On exit TX buffer is not modified, and RX buffer contains the received data. +* If a TX buffer is not provided, FF is sent over and over for the lenght of the transfer. +* On exit TX buffer is not modified, and RX buffer cotains the received data. * Still in progress. */ -uint8 SPIClass::dmaTransfer(void * transmitBuf, void * receiveBuf, uint16 length) -{ - if (length == 0) return 0; - uint8 b = 0; -// dma1_ch3_Active=true; +void SPIClass::dmaTransferSet(void *transmitBuf, void *receiveBuf) { dma_init(_currentSetting->spiDmaDev); -// dma_attach_interrupt(DMA1, DMA_CH3, &SPIClass::DMA1_CH3_Event); - - // RX + //spi_rx_dma_enable(_currentSetting->spi_d); + //spi_tx_dma_enable(_currentSetting->spi_d); dma_xfer_size dma_bit_size = (_currentSetting->dataSize==DATA_SIZE_16BIT) ? DMA_SIZE_16BITS : DMA_SIZE_8BITS; dma_setup_transfer(_currentSetting->spiDmaDev, _currentSetting->spiRxDmaChannel, &_currentSetting->spi_d->regs->DR, dma_bit_size, - receiveBuf, dma_bit_size, (DMA_MINC_MODE));// receive buffer DMA - dma_set_num_transfers(_currentSetting->spiDmaDev, _currentSetting->spiRxDmaChannel, length); - dma_enable(_currentSetting->spiDmaDev, _currentSetting->spiRxDmaChannel);// enable receive - - // TX - uint32 flags = (DMA_MINC_MODE | DMA_FROM_MEM); - if ( transmitBuf==0 ) { - static uint8_t ff = 0XFF; - transmitBuf = &ff; - flags ^= DMA_MINC_MODE; // remove increment mode + receiveBuf, dma_bit_size, (DMA_MINC_MODE | DMA_TRNS_CMPLT ));// receive buffer DMA + if (!transmitBuf) { + transmitBuf = &ff; + dma_setup_transfer(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel, &_currentSetting->spi_d->regs->DR, dma_bit_size, + transmitBuf, dma_bit_size, (DMA_FROM_MEM));// Transmit FF repeatedly } + else { dma_setup_transfer(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel, &_currentSetting->spi_d->regs->DR, dma_bit_size, - transmitBuf, dma_bit_size, flags);// Transmit buffer DMA - dma_set_num_transfers(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel, length); - dma_clear_isr_bits(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel); - dma_enable(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel);// enable transmit + transmitBuf, dma_bit_size, (DMA_MINC_MODE | DMA_FROM_MEM ));// Transmit buffer DMA + } + dma_set_priority(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel, DMA_PRIORITY_LOW); + dma_set_priority(_currentSetting->spiDmaDev, _currentSetting->spiRxDmaChannel, DMA_PRIORITY_VERY_HIGH); +} - spi_rx_reg(_currentSetting->spi_d); //Clear the RX buffer in case a byte is waiting on it. +uint8 SPIClass::dmaTransferRepeat(uint16 length) { + if (length == 0) return 0; + if (spi_is_rx_nonempty(_currentSetting->spi_d) == 1) spi_rx_reg(_currentSetting->spi_d); + _currentSetting->state = SPI_STATE_TRANSFER; + dma_set_num_transfers(_currentSetting->spiDmaDev, _currentSetting->spiRxDmaChannel, length); + dma_set_num_transfers(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel, length); + dma_enable(_currentSetting->spiDmaDev, _currentSetting->spiRxDmaChannel);// enable receive + dma_enable(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel);// enable transmit spi_rx_dma_enable(_currentSetting->spi_d); - spi_tx_dma_enable(_currentSetting->spi_d); // must be the last enable to avoid DMA error flag - + spi_tx_dma_enable(_currentSetting->spi_d); + if (_currentSetting->receiveCallback){ + return 0; + } + //uint32_t m = millis(); + uint8 b = 0; uint32_t m = millis(); - while ((dma_get_isr_bits(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel) & DMA_ISR_TCIF1)==0) {//Avoid interrupts and just loop waiting for the flag to be set. - //delayMicroseconds(10); + while ((dma_get_isr_bits(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel) & DMA_ISR_TCIF1)==0) { + //Avoid interrupts and just loop waiting for the flag to be set. if ((millis() - m) > DMA_TIMEOUT) { b = 2; break; } } while (spi_is_tx_empty(_currentSetting->spi_d) == 0); // "5. Wait until TXE=1 ..." - while (spi_is_busy(_currentSetting->spi_d) != 0); // "... and then wait until BSY=0 before disabling the SPI." + while (spi_is_busy(_currentSetting->spi_d) != 0); // "... and then wait until BSY=0 before disabling the SPI." spi_tx_dma_disable(_currentSetting->spi_d); - spi_rx_dma_disable(_currentSetting->spi_d); // And disable generation of DMA request from the SPI port so other peripherals can use the channels - dma_disable(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel); + spi_rx_dma_disable(_currentSetting->spi_d); + dma_disable(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel); dma_disable(_currentSetting->spiDmaDev, _currentSetting->spiRxDmaChannel); + dma_clear_isr_bits(_currentSetting->spiDmaDev, _currentSetting->spiRxDmaChannel); + dma_clear_isr_bits(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel); + _currentSetting->state = SPI_STATE_READY; return b; } +/* Roger Clark and Victor Perez, 2015 +* Performs a DMA SPI transfer with at least a receive buffer. +* If a TX buffer is not provided, FF is sent over and over for the length of the transfer. +* On exit TX buffer is not modified, and RX buffer contains the received data. +* Still in progress. +*/ + +uint8 SPIClass::dmaTransfer(void *transmitBuf, void *receiveBuf, uint16 length) { + dmaTransferSet(transmitBuf, receiveBuf); + return dmaTransferRepeat(length); +} + /* Roger Clark and Victor Perez, 2015 * Performs a DMA SPI send using a TX buffer. * On exit TX buffer is not modified. * Still in progress. * 2016 - stevstrong - reworked to automatically detect bit size from SPI setting */ -uint8 SPIClass::dmaSend(void * transmitBuf, uint16 length, bool minc) -{ + +void SPIClass::dmaSendSet(void * transmitBuf, bool minc) { + uint32 flags = ( (DMA_MINC_MODE*minc) | DMA_FROM_MEM | DMA_TRNS_CMPLT); + dma_init(_currentSetting->spiDmaDev); + dma_xfer_size dma_bit_size = (_currentSetting->dataSize==DATA_SIZE_16BIT) ? DMA_SIZE_16BITS : DMA_SIZE_8BITS; + dma_setup_transfer(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel, &_currentSetting->spi_d->regs->DR, dma_bit_size, + transmitBuf, dma_bit_size, flags);// Transmit buffer DMA + dma_set_priority(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel, DMA_PRIORITY_LOW); +} + +uint8 SPIClass::dmaSendRepeat(uint16 length) { if (length == 0) return 0; - uint32 flags = ( (DMA_MINC_MODE*minc) | DMA_FROM_MEM | DMA_TRNS_CMPLT); - uint8 b = 0; - dma_init(_currentSetting->spiDmaDev); - // TX - dma_xfer_size dma_bit_size = (_currentSetting->dataSize==DATA_SIZE_16BIT) ? DMA_SIZE_16BITS : DMA_SIZE_8BITS; - dma_setup_transfer(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel, &_currentSetting->spi_d->regs->DR, dma_bit_size, - transmitBuf, dma_bit_size, flags);// Transmit buffer DMA - dma_set_num_transfers(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel, length); dma_clear_isr_bits(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel); + dma_set_num_transfers(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel, length); + _currentSetting->state = SPI_STATE_TRANSMIT; dma_enable(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel);// enable transmit - spi_tx_dma_enable(_currentSetting->spi_d); - - uint32_t m = millis(); - while ((dma_get_isr_bits(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel) & DMA_ISR_TCIF1)==0) {//Avoid interrupts and just loop waiting for the flag to be set. - //delayMicroseconds(10); + spi_tx_dma_enable(_currentSetting->spi_d); + if (_currentSetting->transmitCallback) + { + return 0; + } + uint32_t m = millis(); + uint8 b = 0; + while ((dma_get_isr_bits(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel) & DMA_ISR_TCIF1)==0) { + //Avoid interrupts and just loop waiting for the flag to be set. if ((millis() - m) > DMA_TIMEOUT) { b = 2; break; } - } - + } while (spi_is_tx_empty(_currentSetting->spi_d) == 0); // "5. Wait until TXE=1 ..." while (spi_is_busy(_currentSetting->spi_d) != 0); // "... and then wait until BSY=0 before disabling the SPI." spi_tx_dma_disable(_currentSetting->spi_d); dma_disable(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel); + dma_clear_isr_bits(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel); + _currentSetting->state = SPI_STATE_READY; return b; } +uint8 SPIClass::dmaSend(void * transmitBuf, uint16 length, bool minc) { + dmaSendSet(transmitBuf, minc); + return dmaSendRepeat(length); +} -uint8 SPIClass::dmaSendAsync(void * transmitBuf, uint16 length, bool minc) -{ - static bool isRunning=false; +uint8 SPIClass::dmaSendAsync(void * transmitBuf, uint16 length, bool minc) { uint8 b = 0; - if (isRunning) + if (_currentSetting->state != SPI_STATE_READY) { uint32_t m = millis(); @@ -488,29 +528,121 @@ uint8 SPIClass::dmaSendAsync(void * transmitBuf, uint16 length, bool minc) while (spi_is_busy(_currentSetting->spi_d) != 0); // "... and then wait until BSY=0 before disabling the SPI." spi_tx_dma_disable(_currentSetting->spi_d); dma_disable(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel); - isRunning=false; + _currentSetting->state = SPI_STATE_READY; } if (length == 0) return 0; uint32 flags = ( (DMA_MINC_MODE*minc) | DMA_FROM_MEM | DMA_TRNS_CMPLT); - dma_init(_currentSetting->spiDmaDev); + + dma_init(_currentSetting->spiDmaDev); // TX dma_xfer_size dma_bit_size = (_currentSetting->dataSize==DATA_SIZE_16BIT) ? DMA_SIZE_16BITS : DMA_SIZE_8BITS; - dma_setup_transfer(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel, &_currentSetting->spi_d->regs->DR, dma_bit_size, - transmitBuf, dma_bit_size, flags);// Transmit buffer DMA + dma_setup_transfer(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel, &_currentSetting->spi_d->regs->DR, dma_bit_size, + transmitBuf, dma_bit_size, flags);// Transmit buffer DMA dma_set_num_transfers(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel, length); dma_clear_isr_bits(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel); dma_enable(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel);// enable transmit spi_tx_dma_enable(_currentSetting->spi_d); - isRunning=true; + _currentSetting->state = SPI_STATE_TRANSMIT; return b; } +/* + New functions added to manage callbacks. + Victor Perez 2017 +*/ + +void SPIClass::onReceive(void(*callback)(void)) { + _currentSetting->receiveCallback = callback; + if (callback){ + switch (_currentSetting->spi_d->clk_id) { + case RCC_SPI1: + dma_attach_interrupt(_currentSetting->spiDmaDev, _currentSetting->spiRxDmaChannel, &SPIClass::_spi1EventCallback); + break; + case RCC_SPI2: + dma_attach_interrupt(_currentSetting->spiDmaDev, _currentSetting->spiRxDmaChannel, &SPIClass::_spi2EventCallback); + break; + #if BOARD_NR_SPI >= 3 + case RCC_SPI3: + dma_attach_interrupt(_currentSetting->spiDmaDev, _currentSetting->spiRxDmaChannel, &SPIClass::_spi3EventCallback); + break; + #endif + default: + ASSERT(0); + } + } + else { + dma_detach_interrupt(_currentSetting->spiDmaDev, _currentSetting->spiRxDmaChannel); + } +} + +void SPIClass::onTransmit(void(*callback)(void)) { + _currentSetting->transmitCallback = callback; + if (callback){ + switch (_currentSetting->spi_d->clk_id) { + case RCC_SPI1: + dma_attach_interrupt(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel, &SPIClass::_spi1EventCallback); + break; + case RCC_SPI2: + dma_attach_interrupt(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel, &SPIClass::_spi2EventCallback); + break; + #if BOARD_NR_SPI >= 3 + case RCC_SPI3: + dma_attach_interrupt(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel, &SPIClass::_spi3EventCallback); + break; + #endif + default: + ASSERT(0); + } + } + else { + dma_detach_interrupt(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel); + } +} + +/* + TODO: check if better to first call the customer code, next disable the DMA requests. + Also see if we need to check whether callbacks are set or not, may be better to be checked during the initial setup and only set the callback to EventCallback if they are set. +*/ + +void SPIClass::EventCallback() { + while (spi_is_tx_empty(_currentSetting->spi_d) == 0); // "5. Wait until TXE=1 ..." + while (spi_is_busy(_currentSetting->spi_d) != 0); // "... and then wait until BSY=0" + switch (_currentSetting->state) { + case SPI_STATE_TRANSFER: + while (spi_is_rx_nonempty(_currentSetting->spi_d)); + _currentSetting->state = SPI_STATE_READY; + spi_tx_dma_disable(_currentSetting->spi_d); + spi_rx_dma_disable(_currentSetting->spi_d); + //dma_disable(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel); + //dma_disable(_currentSetting->spiDmaDev, _currentSetting->spiRxDmaChannel); + + if (_currentSetting->receiveCallback) + { + _currentSetting->receiveCallback(); + } + break; + case SPI_STATE_TRANSMIT: + _currentSetting->state = SPI_STATE_READY; + spi_tx_dma_disable(_currentSetting->spi_d); + //dma_disable(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel); + if (_currentSetting->transmitCallback) + { + _currentSetting->transmitCallback(); + } + + break; + default: + // we shouldn't get here, so better to add an assert and fail. + return; + } +} + void SPIClass::attachInterrupt(void) { // Should be enableInterrupt() } @@ -557,85 +689,101 @@ uint8 SPIClass::recv(void) { return this->read(); } - /* - * Auxiliary functions - */ + DMA call back functions, one per port. +*/ + +void SPIClass::_spi1EventCallback() +{ + reinterpret_cast(_spi1_this)->EventCallback(); +} + +void SPIClass::_spi2EventCallback() { + reinterpret_cast(_spi2_this)->EventCallback(); +} +#if BOARD_NR_SPI >= 3 +void SPIClass::_spi3EventCallback() { + reinterpret_cast(_spi3_this)->EventCallback(); +} +#endif +/* +* Auxiliary functions +*/ static const spi_pins* dev_to_spi_pins(spi_dev *dev) { - switch (dev->clk_id) { + switch (dev->clk_id) { #if BOARD_NR_SPI >= 1 - case RCC_SPI1: return board_spi_pins; + case RCC_SPI1: return board_spi_pins; #endif #if BOARD_NR_SPI >= 2 - case RCC_SPI2: return board_spi_pins + 1; + case RCC_SPI2: return board_spi_pins + 1; #endif #if BOARD_NR_SPI >= 3 - case RCC_SPI3: return board_spi_pins + 2; + case RCC_SPI3: return board_spi_pins + 2; #endif - default: return NULL; - } + default: return NULL; + } } static void disable_pwm(const stm32_pin_info *i) { - if (i->timer_device) { - timer_set_mode(i->timer_device, i->timer_channel, TIMER_DISABLED); - } + if (i->timer_device) { + timer_set_mode(i->timer_device, i->timer_channel, TIMER_DISABLED); + } } static void configure_gpios(spi_dev *dev, bool as_master) { - const spi_pins *pins = dev_to_spi_pins(dev); + const spi_pins *pins = dev_to_spi_pins(dev); - if (!pins) { - return; - } + if (!pins) { + return; + } - const stm32_pin_info *nssi = &PIN_MAP[pins->nss]; - const stm32_pin_info *scki = &PIN_MAP[pins->sck]; - const stm32_pin_info *misoi = &PIN_MAP[pins->miso]; - const stm32_pin_info *mosii = &PIN_MAP[pins->mosi]; + const stm32_pin_info *nssi = &PIN_MAP[pins->nss]; + const stm32_pin_info *scki = &PIN_MAP[pins->sck]; + const stm32_pin_info *misoi = &PIN_MAP[pins->miso]; + const stm32_pin_info *mosii = &PIN_MAP[pins->mosi]; - disable_pwm(nssi); - disable_pwm(scki); - disable_pwm(misoi); - disable_pwm(mosii); + disable_pwm(nssi); + disable_pwm(scki); + disable_pwm(misoi); + disable_pwm(mosii); - spi_config_gpios(dev, as_master, nssi->gpio_device, nssi->gpio_bit, - scki->gpio_device, scki->gpio_bit, misoi->gpio_bit, - mosii->gpio_bit); + spi_config_gpios(dev, as_master, nssi->gpio_device, nssi->gpio_bit, + scki->gpio_device, scki->gpio_bit, misoi->gpio_bit, + mosii->gpio_bit); } static const spi_baud_rate baud_rates[8] __FLASH__ = { - SPI_BAUD_PCLK_DIV_2, - SPI_BAUD_PCLK_DIV_4, - SPI_BAUD_PCLK_DIV_8, - SPI_BAUD_PCLK_DIV_16, - SPI_BAUD_PCLK_DIV_32, - SPI_BAUD_PCLK_DIV_64, - SPI_BAUD_PCLK_DIV_128, - SPI_BAUD_PCLK_DIV_256, + SPI_BAUD_PCLK_DIV_2, + SPI_BAUD_PCLK_DIV_4, + SPI_BAUD_PCLK_DIV_8, + SPI_BAUD_PCLK_DIV_16, + SPI_BAUD_PCLK_DIV_32, + SPI_BAUD_PCLK_DIV_64, + SPI_BAUD_PCLK_DIV_128, + SPI_BAUD_PCLK_DIV_256, }; /* - * Note: This assumes you're on a LeafLabs-style board - * (CYCLES_PER_MICROSECOND == 72, APB2 at 72MHz, APB1 at 36MHz). - */ +* Note: This assumes you're on a LeafLabs-style board +* (CYCLES_PER_MICROSECOND == 72, APB2 at 72MHz, APB1 at 36MHz). +*/ static spi_baud_rate determine_baud_rate(spi_dev *dev, uint32_t freq) { uint32_t clock = 0, i; #ifdef SPI_DEBUG Serial.print("determine_baud_rate("); Serial.print(freq); Serial.println(")"); #endif - switch (rcc_dev_clk(dev->clk_id)) - { - case RCC_APB2: clock = STM32_PCLK2; break; // 72 Mhz - case RCC_APB1: clock = STM32_PCLK1; break; // 36 Mhz - } - clock /= 2; - i = 0; - while (i < 7 && freq < clock) { - clock /= 2; - i++; - } + switch (rcc_dev_clk(dev->clk_id)) + { + case RCC_APB2: clock = STM32_PCLK2; break; // 72 Mhz + case RCC_APB1: clock = STM32_PCLK1; break; // 36 Mhz + } + clock /= 2; + i = 0; + while (i < 7 && freq < clock) { + clock /= 2; + i++; + } return baud_rates[i]; } diff --git a/STM32F1/libraries/SPI/src/SPI.h b/STM32F1/libraries/SPI/src/SPI.h index 4d9b563..2160d26 100644 --- a/STM32F1/libraries/SPI/src/SPI.h +++ b/STM32F1/libraries/SPI/src/SPI.h @@ -99,6 +99,13 @@ #define DATA_SIZE_8BIT SPI_CR1_DFF_8_BIT #define DATA_SIZE_16BIT SPI_CR1_DFF_16_BIT +typedef enum { + SPI_STATE_IDLE, + SPI_STATE_READY, + SPI_STATE_RECEIVE, + SPI_STATE_TRANSMIT, + SPI_STATE_TRANSFER + } spi_mode_t; class SPISettings { public: SPISettings(uint32_t clock, BitOrder bitOrder, uint8_t dataMode) { @@ -134,21 +141,31 @@ private: this->dataSize = dataSize; } uint32_t clock; + uint32_t dataSize; + uint32_t clockDivider; BitOrder bitOrder; uint8_t dataMode; - uint32_t dataSize; - + uint8_t _SSPin; + volatile spi_mode_t state; spi_dev *spi_d; - uint8_t _SSPin; - uint32_t clockDivider; dma_channel spiRxDmaChannel, spiTxDmaChannel; dma_dev* spiDmaDev; + void (*receiveCallback)(void) = NULL; + void (*transmitCallback)(void) = NULL; friend class SPIClass; }; -volatile static bool dma1_ch3_Active; +/* + Should move this to within the class once tested out, just for tidyness +*/ +static uint8_t ff = 0XFF; +static void (*_spi1_this); +static void (*_spi2_this); +#if BOARD_NR_SPI >= 3 +static void (*_spi3_this); +#endif /** * @brief Wirish SPI interface. @@ -217,7 +234,15 @@ public: */ void setDataSize(uint32 ds); - + /* Victor Perez 2017. Added to set and clear callback functions for callback + * on DMA transfer completion. + * onReceive used to set the callback in case of dmaTransfer (tx/rx), once rx is completed + * onTransmit used to set the callback in case of dmaSend (tx only). That function + * will NOT be called in case of TX/RX + */ + void onReceive(void(*)(void)); + void onTransmit(void(*)(void)); + /* * I/O */ @@ -279,7 +304,9 @@ public: * @param receiveBuf buffer Bytes to save received data. * @param length Number of bytes in buffer to transmit. */ - uint8 dmaTransfer(void * transmitBuf, void * receiveBuf, uint16 length); + uint8 dmaTransfer(void * transmitBuf, void * receiveBuf, uint16 length); + void dmaTransferSet(void *transmitBuf, void *receiveBuf); + uint8 dmaTransferRepeat(uint16 length); /** * @brief Sets up a DMA Transmit for SPI 8 or 16 bit transfer mode. @@ -289,9 +316,13 @@ public: * * @param data buffer half words to transmit, * @param length Number of bytes in buffer to transmit. + * @param minc Set to use Memory Increment mode, clear to use Circular mode. */ - uint8 dmaSend(void * transmitBuf, uint16 length, bool minc = 1); - uint8 dmaSendAsync(void * transmitBuf, uint16 length, bool minc = 1); + uint8 dmaSend(void * transmitBuf, uint16 length, bool minc = 1); + void dmaSendSet(void * transmitBuf, bool minc); + uint8 dmaSendRepeat(uint16 length); + + uint8 dmaSendAsync(void * transmitBuf, uint16 length, bool minc = 1); /* * Pin accessors */ @@ -325,7 +356,7 @@ public: spi_dev* c_dev(void) { return _currentSetting->spi_d; } - spi_dev *dev(){ return _currentSetting->spi_d;} + spi_dev *dev(){ return _currentSetting->spi_d;} /** * @brief Sets the number of the SPI peripheral to be used by @@ -335,10 +366,10 @@ public: * or 1-3 in high density devices. */ - void setModule(int spi_num) - { - _currentSetting=&_settings[spi_num-1];// SPI channels are called 1 2 and 3 but the array is zero indexed - } + void setModule(int spi_num) + { + _currentSetting=&_settings[spi_num-1];// SPI channels are called 1 2 and 3 but the array is zero indexed + } /* -- The following methods are deprecated --------------------------- */ @@ -374,19 +405,23 @@ public: uint8 recv(void); private: -/* - static inline void DMA1_CH3_Event() { - dma1_ch3_Active = 0; -// dma_disable(DMA1, DMA_CH3); -// dma_disable(DMA1, DMA_CH2); - - // To Do. Need to wait for - } -*/ + SPISettings _settings[BOARD_NR_SPI]; SPISettings *_currentSetting; void updateSettings(void); + /* + * Functions added for DMA transfers with Callback. + * Experimental. + */ + + void EventCallback(void); + + static void _spi1EventCallback(void); + static void _spi2EventCallback(void); + #if BOARD_NR_SPI >= 3 + static void _spi3EventCallback(void); + #endif /* spi_dev *spi_d; uint8_t _SSPin; From 910072c7db2c0f81452589cc8fdf965457824aa1 Mon Sep 17 00:00:00 2001 From: victorpv Date: Mon, 10 Jul 2017 12:08:59 -0500 Subject: [PATCH 11/12] Changes tabs for spaces. --- STM32F1/libraries/SPI/src/SPI.cpp | 684 +++++++++++++++--------------- 1 file changed, 342 insertions(+), 342 deletions(-) diff --git a/STM32F1/libraries/SPI/src/SPI.cpp b/STM32F1/libraries/SPI/src/SPI.cpp index 998f9b0..94e5031 100644 --- a/STM32F1/libraries/SPI/src/SPI.cpp +++ b/STM32F1/libraries/SPI/src/SPI.cpp @@ -94,14 +94,14 @@ static const spi_pins board_spi_pins[] __FLASH__ = { SPIClass::SPIClass(uint32 spi_num) { - _currentSetting=&_settings[spi_num-1];// SPI channels are called 1 2 and 3 but the array is zero indexed + _currentSetting=&_settings[spi_num-1];// SPI channels are called 1 2 and 3 but the array is zero indexed - + switch (spi_num) { #if BOARD_NR_SPI >= 1 case 1: _currentSetting->spi_d = SPI1; - _spi1_this = (void*) this; + _spi1_this = (void*) this; break; #endif #if BOARD_NR_SPI >= 2 @@ -119,25 +119,25 @@ SPIClass::SPIClass(uint32 spi_num) { default: ASSERT(0); } - - // Init things specific to each SPI device - // clock divider setup is a bit of hack, and needs to be improved at a later date. - _settings[0].spi_d = SPI1; - _settings[0].clockDivider = determine_baud_rate(_settings[0].spi_d, _settings[0].clock); - _settings[0].spiDmaDev = DMA1; - _settings[0].spiTxDmaChannel = DMA_CH3; - _settings[0].spiRxDmaChannel = DMA_CH2; - _settings[1].spi_d = SPI2; - _settings[1].clockDivider = determine_baud_rate(_settings[1].spi_d, _settings[1].clock); - _settings[1].spiDmaDev = DMA1; - _settings[1].spiTxDmaChannel = DMA_CH5; - _settings[1].spiRxDmaChannel = DMA_CH4; + + // Init things specific to each SPI device + // clock divider setup is a bit of hack, and needs to be improved at a later date. + _settings[0].spi_d = SPI1; + _settings[0].clockDivider = determine_baud_rate(_settings[0].spi_d, _settings[0].clock); + _settings[0].spiDmaDev = DMA1; + _settings[0].spiTxDmaChannel = DMA_CH3; + _settings[0].spiRxDmaChannel = DMA_CH2; + _settings[1].spi_d = SPI2; + _settings[1].clockDivider = determine_baud_rate(_settings[1].spi_d, _settings[1].clock); + _settings[1].spiDmaDev = DMA1; + _settings[1].spiTxDmaChannel = DMA_CH5; + _settings[1].spiRxDmaChannel = DMA_CH4; #if BOARD_NR_SPI >= 3 - _settings[2].spi_d = SPI3; - _settings[2].clockDivider = determine_baud_rate(_settings[2].spi_d, _settings[2].clock); - _settings[2].spiDmaDev = DMA2; - _settings[2].spiTxDmaChannel = DMA_CH2; - _settings[2].spiRxDmaChannel = DMA_CH1; + _settings[2].spi_d = SPI3; + _settings[2].clockDivider = determine_baud_rate(_settings[2].spi_d, _settings[2].clock); + _settings[2].spiDmaDev = DMA2; + _settings[2].spiTxDmaChannel = DMA_CH2; + _settings[2].spiRxDmaChannel = DMA_CH1; #endif // added for DMA callbacks. @@ -148,11 +148,11 @@ SPIClass::SPIClass(uint32 spi_num) { * Set up/tear down */ void SPIClass::updateSettings(void) { - uint32 flags = ((_currentSetting->bitOrder == MSBFIRST ? SPI_FRAME_MSB : SPI_FRAME_LSB) | _currentSetting->dataSize | SPI_SW_SLAVE | SPI_SOFT_SS); - #ifdef SPI_DEBUG - Serial.print("spi_master_enable("); Serial.print(_currentSetting->clockDivider); Serial.print(","); Serial.print(_currentSetting->dataMode); Serial.print(","); Serial.print(flags); Serial.println(")"); - #endif - spi_master_enable(_currentSetting->spi_d, (spi_baud_rate)_currentSetting->clockDivider, (spi_mode)_currentSetting->dataMode, flags); + uint32 flags = ((_currentSetting->bitOrder == MSBFIRST ? SPI_FRAME_MSB : SPI_FRAME_LSB) | _currentSetting->dataSize | SPI_SW_SLAVE | SPI_SOFT_SS); + #ifdef SPI_DEBUG + Serial.print("spi_master_enable("); Serial.print(_currentSetting->clockDivider); Serial.print(","); Serial.print(_currentSetting->dataMode); Serial.print(","); Serial.print(flags); Serial.println(")"); + #endif + spi_master_enable(_currentSetting->spi_d, (spi_baud_rate)_currentSetting->clockDivider, (spi_mode)_currentSetting->dataMode, flags); } void SPIClass::begin(void) { @@ -167,9 +167,9 @@ void SPIClass::beginSlave(void) { spi_init(_currentSetting->spi_d); configure_gpios(_currentSetting->spi_d, 0); uint32 flags = ((_currentSetting->bitOrder == MSBFIRST ? SPI_FRAME_MSB : SPI_FRAME_LSB) | _currentSetting->dataSize | SPI_RX_ONLY); - #ifdef SPI_DEBUG - Serial.print("spi_slave_enable("); Serial.print(_currentSetting->dataMode); Serial.print(","); Serial.print(flags); Serial.println(")"); - #endif + #ifdef SPI_DEBUG + Serial.print("spi_slave_enable("); Serial.print(_currentSetting->dataMode); Serial.print(","); Serial.print(flags); Serial.println(")"); + #endif spi_slave_enable(_currentSetting->spi_d, (spi_mode)_currentSetting->dataMode, flags); // added for DMA callbacks. _currentSetting->state = SPI_STATE_READY; @@ -199,23 +199,23 @@ void SPIClass::end(void) { /* Roger Clark added 3 functions */ void SPIClass::setClockDivider(uint32_t clockDivider) { - #ifdef SPI_DEBUG - Serial.print("Clock divider set to "); Serial.println(clockDivider); - #endif - _currentSetting->clockDivider = clockDivider; - uint32 cr1 = _currentSetting->spi_d->regs->CR1 & ~(SPI_CR1_BR); - _currentSetting->spi_d->regs->CR1 = cr1 | (clockDivider & SPI_CR1_BR); + #ifdef SPI_DEBUG + Serial.print("Clock divider set to "); Serial.println(clockDivider); + #endif + _currentSetting->clockDivider = clockDivider; + uint32 cr1 = _currentSetting->spi_d->regs->CR1 & ~(SPI_CR1_BR); + _currentSetting->spi_d->regs->CR1 = cr1 | (clockDivider & SPI_CR1_BR); } void SPIClass::setBitOrder(BitOrder bitOrder) { - #ifdef SPI_DEBUG - Serial.print("Bit order set to "); Serial.println(bitOrder); - #endif - _currentSetting->bitOrder = bitOrder; - uint32 cr1 = _currentSetting->spi_d->regs->CR1 & ~(SPI_CR1_LSBFIRST); - if ( bitOrder==LSBFIRST ) cr1 |= SPI_CR1_LSBFIRST; - _currentSetting->spi_d->regs->CR1 = cr1; + #ifdef SPI_DEBUG + Serial.print("Bit order set to "); Serial.println(bitOrder); + #endif + _currentSetting->bitOrder = bitOrder; + uint32 cr1 = _currentSetting->spi_d->regs->CR1 & ~(SPI_CR1_LSBFIRST); + if ( bitOrder==LSBFIRST ) cr1 |= SPI_CR1_LSBFIRST; + _currentSetting->spi_d->regs->CR1 = cr1; } /* Victor Perez. Added to test changing datasize from 8 to 16 bit modes on the fly. @@ -224,11 +224,11 @@ void SPIClass::setBitOrder(BitOrder bitOrder) */ void SPIClass::setDataSize(uint32 datasize) { - _currentSetting->dataSize = datasize; - uint32 cr1 = _currentSetting->spi_d->regs->CR1 & ~(SPI_CR1_DFF); - uint8 en = spi_is_enabled(_currentSetting->spi_d); - spi_peripheral_disable(_currentSetting->spi_d); - _currentSetting->spi_d->regs->CR1 = cr1 | (datasize & SPI_CR1_DFF) | en; + _currentSetting->dataSize = datasize; + uint32 cr1 = _currentSetting->spi_d->regs->CR1 & ~(SPI_CR1_DFF); + uint8 en = spi_is_enabled(_currentSetting->spi_d); + spi_peripheral_disable(_currentSetting->spi_d); + _currentSetting->spi_d->regs->CR1 = cr1 | (datasize & SPI_CR1_DFF) | en; } void SPIClass::setDataMode(uint8_t dataMode) @@ -258,56 +258,56 @@ bit 0 - CPHA : Clock phase If someone finds this is not the case or sees a logic error with this let me know ;-) */ - #ifdef SPI_DEBUG - Serial.print("Data mode set to "); Serial.println(dataMode); - #endif - _currentSetting->dataMode = dataMode; - uint32 cr1 = _currentSetting->spi_d->regs->CR1 & ~(SPI_CR1_CPOL|SPI_CR1_CPHA); - _currentSetting->spi_d->regs->CR1 = cr1 | (dataMode & (SPI_CR1_CPOL|SPI_CR1_CPHA)); + #ifdef SPI_DEBUG + Serial.print("Data mode set to "); Serial.println(dataMode); + #endif + _currentSetting->dataMode = dataMode; + uint32 cr1 = _currentSetting->spi_d->regs->CR1 & ~(SPI_CR1_CPOL|SPI_CR1_CPHA); + _currentSetting->spi_d->regs->CR1 = cr1 | (dataMode & (SPI_CR1_CPOL|SPI_CR1_CPHA)); } void SPIClass::beginTransaction(uint8_t pin, SPISettings settings) { - #ifdef SPI_DEBUG - Serial.println("SPIClass::beginTransaction"); - #endif - setBitOrder(settings.bitOrder); - setDataMode(settings.dataMode); - setDataSize(settings.dataSize); - setClockDivider(determine_baud_rate(_currentSetting->spi_d, settings.clock)); - begin(); + #ifdef SPI_DEBUG + Serial.println("SPIClass::beginTransaction"); + #endif + setBitOrder(settings.bitOrder); + setDataMode(settings.dataMode); + setDataSize(settings.dataSize); + setClockDivider(determine_baud_rate(_currentSetting->spi_d, settings.clock)); + begin(); } void SPIClass::beginTransactionSlave(SPISettings settings) { - #ifdef SPI_DEBUG - Serial.println(F("SPIClass::beginTransactionSlave")); - #endif - setBitOrder(settings.bitOrder); - setDataMode(settings.dataMode); - setDataSize(settings.dataSize); - beginSlave(); + #ifdef SPI_DEBUG + Serial.println(F("SPIClass::beginTransactionSlave")); + #endif + setBitOrder(settings.bitOrder); + setDataMode(settings.dataMode); + setDataSize(settings.dataSize); + beginSlave(); } void SPIClass::endTransaction(void) { - #ifdef SPI_DEBUG - Serial.println("SPIClass::endTransaction"); - #endif - //digitalWrite(_SSPin,HIGH); + #ifdef SPI_DEBUG + Serial.println("SPIClass::endTransaction"); + #endif + //digitalWrite(_SSPin,HIGH); #if false // code from SAM core - uint8_t mode = interruptMode; - if (mode > 0) { - if (mode < 16) { - if (mode & 1) PIOA->PIO_IER = interruptMask[0]; - if (mode & 2) PIOB->PIO_IER = interruptMask[1]; - if (mode & 4) PIOC->PIO_IER = interruptMask[2]; - if (mode & 8) PIOD->PIO_IER = interruptMask[3]; - } else { - if (interruptSave) interrupts(); - } - } + uint8_t mode = interruptMode; + if (mode > 0) { + if (mode < 16) { + if (mode & 1) PIOA->PIO_IER = interruptMask[0]; + if (mode & 2) PIOB->PIO_IER = interruptMask[1]; + if (mode & 4) PIOC->PIO_IER = interruptMask[2]; + if (mode & 8) PIOD->PIO_IER = interruptMask[3]; + } else { + if (interruptSave) interrupts(); + } + } #endif } @@ -318,80 +318,80 @@ void SPIClass::endTransaction(void) uint16 SPIClass::read(void) { - while ( spi_is_rx_nonempty(_currentSetting->spi_d)==0 ) ; - return (uint16)spi_rx_reg(_currentSetting->spi_d); + while ( spi_is_rx_nonempty(_currentSetting->spi_d)==0 ) ; + return (uint16)spi_rx_reg(_currentSetting->spi_d); } void SPIClass::read(uint8 *buf, uint32 len) { - if ( len == 0 ) return; - spi_rx_reg(_currentSetting->spi_d); // clear the RX buffer in case a byte is waiting on it. - spi_reg_map * regs = _currentSetting->spi_d->regs; - // start sequence: write byte 0 - regs->DR = 0x00FF; // write the first byte - // main loop - while ( (--len) ) { - while( !(regs->SR & SPI_SR_TXE) ); // wait for TXE flag - noInterrupts(); // go atomic level - avoid interrupts to surely get the previously received data - regs->DR = 0x00FF; // write the next data item to be transmitted into the SPI_DR register. This clears the TXE flag. - while ( !(regs->SR & SPI_SR_RXNE) ); // wait till data is available in the DR register - *buf++ = (uint8)(regs->DR); // read and store the received byte. This clears the RXNE flag. - interrupts(); // let systick do its job - } - // read remaining last byte - while ( !(regs->SR & SPI_SR_RXNE) ); // wait till data is available in the Rx register - *buf++ = (uint8)(regs->DR); // read and store the received byte + if ( len == 0 ) return; + spi_rx_reg(_currentSetting->spi_d); // clear the RX buffer in case a byte is waiting on it. + spi_reg_map * regs = _currentSetting->spi_d->regs; + // start sequence: write byte 0 + regs->DR = 0x00FF; // write the first byte + // main loop + while ( (--len) ) { + while( !(regs->SR & SPI_SR_TXE) ); // wait for TXE flag + noInterrupts(); // go atomic level - avoid interrupts to surely get the previously received data + regs->DR = 0x00FF; // write the next data item to be transmitted into the SPI_DR register. This clears the TXE flag. + while ( !(regs->SR & SPI_SR_RXNE) ); // wait till data is available in the DR register + *buf++ = (uint8)(regs->DR); // read and store the received byte. This clears the RXNE flag. + interrupts(); // let systick do its job + } + // read remaining last byte + while ( !(regs->SR & SPI_SR_RXNE) ); // wait till data is available in the Rx register + *buf++ = (uint8)(regs->DR); // read and store the received byte } void SPIClass::write(uint16 data) { - /* Added for 16bit data Victor Perez. Roger Clark - * Improved speed by just directly writing the single byte to the SPI data reg and wait for completion, - * by taking the Tx code from transfer(byte) - * This almost doubles the speed of this function. - */ - spi_tx_reg(_currentSetting->spi_d, data); // write the data to be transmitted into the SPI_DR register (this clears the TXE flag) - while (spi_is_tx_empty(_currentSetting->spi_d) == 0); // "5. Wait until TXE=1 ..." - while (spi_is_busy(_currentSetting->spi_d) != 0); // "... and then wait until BSY=0 before disabling the SPI." + /* Added for 16bit data Victor Perez. Roger Clark + * Improved speed by just directly writing the single byte to the SPI data reg and wait for completion, + * by taking the Tx code from transfer(byte) + * This almost doubles the speed of this function. + */ + spi_tx_reg(_currentSetting->spi_d, data); // write the data to be transmitted into the SPI_DR register (this clears the TXE flag) + while (spi_is_tx_empty(_currentSetting->spi_d) == 0); // "5. Wait until TXE=1 ..." + while (spi_is_busy(_currentSetting->spi_d) != 0); // "... and then wait until BSY=0 before disabling the SPI." } void SPIClass::write(uint16 data, uint32 n) { - // Added by stevstrong: Repeatedly send same data by the specified number of times - spi_reg_map * regs = _currentSetting->spi_d->regs; - while ( (n--)>0 ) { - regs->DR = data; // write the data to be transmitted into the SPI_DR register (this clears the TXE flag) - while ( (regs->SR & SPI_SR_TXE)==0 ) ; // wait till Tx empty - } - while ( (regs->SR & SPI_SR_BSY) != 0); // wait until BSY=0 before returning + // Added by stevstrong: Repeatedly send same data by the specified number of times + spi_reg_map * regs = _currentSetting->spi_d->regs; + while ( (n--)>0 ) { + regs->DR = data; // write the data to be transmitted into the SPI_DR register (this clears the TXE flag) + while ( (regs->SR & SPI_SR_TXE)==0 ) ; // wait till Tx empty + } + while ( (regs->SR & SPI_SR_BSY) != 0); // wait until BSY=0 before returning } void SPIClass::write(void *data, uint32 length) { - spi_dev * spi_d = _currentSetting->spi_d; - spi_tx(spi_d, (void*)data, length); // data can be array of bytes or words - while (spi_is_tx_empty(spi_d) == 0); // "5. Wait until TXE=1 ..." - while (spi_is_busy(spi_d) != 0); // "... and then wait until BSY=0 before disabling the SPI." + spi_dev * spi_d = _currentSetting->spi_d; + spi_tx(spi_d, (void*)data, length); // data can be array of bytes or words + while (spi_is_tx_empty(spi_d) == 0); // "5. Wait until TXE=1 ..." + while (spi_is_busy(spi_d) != 0); // "... and then wait until BSY=0 before disabling the SPI." } uint8 SPIClass::transfer(uint8 byte) const { - spi_dev * spi_d = _currentSetting->spi_d; - spi_rx_reg(spi_d); // read any previous data - spi_tx_reg(spi_d, byte); // Write the data item to be transmitted into the SPI_DR register - while (spi_is_tx_empty(spi_d) == 0); // "5. Wait until TXE=1 ..." - while (spi_is_busy(spi_d) != 0); // "... and then wait until BSY=0 before disabling the SPI." - return (uint8)spi_rx_reg(spi_d); // "... and read the last received data." + spi_dev * spi_d = _currentSetting->spi_d; + spi_rx_reg(spi_d); // read any previous data + spi_tx_reg(spi_d, byte); // Write the data item to be transmitted into the SPI_DR register + while (spi_is_tx_empty(spi_d) == 0); // "5. Wait until TXE=1 ..." + while (spi_is_busy(spi_d) != 0); // "... and then wait until BSY=0 before disabling the SPI." + return (uint8)spi_rx_reg(spi_d); // "... and read the last received data." } uint16_t SPIClass::transfer16(uint16_t wr_data) const { - spi_dev * spi_d = _currentSetting->spi_d; - spi_rx_reg(spi_d); // read any previous data - spi_tx_reg(spi_d, wr_data); // "2. Write the first data item to be transmitted into the SPI_DR register (this clears the TXE flag)." - while (spi_is_tx_empty(spi_d) == 0); // "5. Wait until TXE=1 ..." - while (spi_is_busy(spi_d) != 0); // "... and then wait until BSY=0 before disabling the SPI." - return (uint16)spi_rx_reg(spi_d); // "... and read the last received data." + spi_dev * spi_d = _currentSetting->spi_d; + spi_rx_reg(spi_d); // read any previous data + spi_tx_reg(spi_d, wr_data); // "2. Write the first data item to be transmitted into the SPI_DR register (this clears the TXE flag)." + while (spi_is_tx_empty(spi_d) == 0); // "5. Wait until TXE=1 ..." + while (spi_is_busy(spi_d) != 0); // "... and then wait until BSY=0 before disabling the SPI." + return (uint16)spi_rx_reg(spi_d); // "... and read the last received data." } /* Roger Clark and Victor Perez, 2015 @@ -402,54 +402,54 @@ uint16_t SPIClass::transfer16(uint16_t wr_data) const */ void SPIClass::dmaTransferSet(void *transmitBuf, void *receiveBuf) { dma_init(_currentSetting->spiDmaDev); - //spi_rx_dma_enable(_currentSetting->spi_d); - //spi_tx_dma_enable(_currentSetting->spi_d); - dma_xfer_size dma_bit_size = (_currentSetting->dataSize==DATA_SIZE_16BIT) ? DMA_SIZE_16BITS : DMA_SIZE_8BITS; - dma_setup_transfer(_currentSetting->spiDmaDev, _currentSetting->spiRxDmaChannel, &_currentSetting->spi_d->regs->DR, dma_bit_size, + //spi_rx_dma_enable(_currentSetting->spi_d); + //spi_tx_dma_enable(_currentSetting->spi_d); + dma_xfer_size dma_bit_size = (_currentSetting->dataSize==DATA_SIZE_16BIT) ? DMA_SIZE_16BITS : DMA_SIZE_8BITS; + dma_setup_transfer(_currentSetting->spiDmaDev, _currentSetting->spiRxDmaChannel, &_currentSetting->spi_d->regs->DR, dma_bit_size, receiveBuf, dma_bit_size, (DMA_MINC_MODE | DMA_TRNS_CMPLT ));// receive buffer DMA - if (!transmitBuf) { - transmitBuf = &ff; - dma_setup_transfer(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel, &_currentSetting->spi_d->regs->DR, dma_bit_size, + if (!transmitBuf) { + transmitBuf = &ff; + dma_setup_transfer(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel, &_currentSetting->spi_d->regs->DR, dma_bit_size, transmitBuf, dma_bit_size, (DMA_FROM_MEM));// Transmit FF repeatedly - } - else { + } + else { dma_setup_transfer(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel, &_currentSetting->spi_d->regs->DR, dma_bit_size, transmitBuf, dma_bit_size, (DMA_MINC_MODE | DMA_FROM_MEM ));// Transmit buffer DMA - } - dma_set_priority(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel, DMA_PRIORITY_LOW); - dma_set_priority(_currentSetting->spiDmaDev, _currentSetting->spiRxDmaChannel, DMA_PRIORITY_VERY_HIGH); + } + dma_set_priority(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel, DMA_PRIORITY_LOW); + dma_set_priority(_currentSetting->spiDmaDev, _currentSetting->spiRxDmaChannel, DMA_PRIORITY_VERY_HIGH); } uint8 SPIClass::dmaTransferRepeat(uint16 length) { - if (length == 0) return 0; - if (spi_is_rx_nonempty(_currentSetting->spi_d) == 1) spi_rx_reg(_currentSetting->spi_d); - _currentSetting->state = SPI_STATE_TRANSFER; - dma_set_num_transfers(_currentSetting->spiDmaDev, _currentSetting->spiRxDmaChannel, length); - dma_set_num_transfers(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel, length); - dma_enable(_currentSetting->spiDmaDev, _currentSetting->spiRxDmaChannel);// enable receive - dma_enable(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel);// enable transmit - spi_rx_dma_enable(_currentSetting->spi_d); - spi_tx_dma_enable(_currentSetting->spi_d); + if (length == 0) return 0; + if (spi_is_rx_nonempty(_currentSetting->spi_d) == 1) spi_rx_reg(_currentSetting->spi_d); + _currentSetting->state = SPI_STATE_TRANSFER; + dma_set_num_transfers(_currentSetting->spiDmaDev, _currentSetting->spiRxDmaChannel, length); + dma_set_num_transfers(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel, length); + dma_enable(_currentSetting->spiDmaDev, _currentSetting->spiRxDmaChannel);// enable receive + dma_enable(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel);// enable transmit + spi_rx_dma_enable(_currentSetting->spi_d); + spi_tx_dma_enable(_currentSetting->spi_d); if (_currentSetting->receiveCallback){ return 0; } //uint32_t m = millis(); uint8 b = 0; uint32_t m = millis(); - while ((dma_get_isr_bits(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel) & DMA_ISR_TCIF1)==0) { - //Avoid interrupts and just loop waiting for the flag to be set. - if ((millis() - m) > DMA_TIMEOUT) { b = 2; break; } + while ((dma_get_isr_bits(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel) & DMA_ISR_TCIF1)==0) { + //Avoid interrupts and just loop waiting for the flag to be set. + if ((millis() - m) > DMA_TIMEOUT) { b = 2; break; } } - while (spi_is_tx_empty(_currentSetting->spi_d) == 0); // "5. Wait until TXE=1 ..." - while (spi_is_busy(_currentSetting->spi_d) != 0); // "... and then wait until BSY=0 before disabling the SPI." - spi_tx_dma_disable(_currentSetting->spi_d); - spi_rx_dma_disable(_currentSetting->spi_d); + while (spi_is_tx_empty(_currentSetting->spi_d) == 0); // "5. Wait until TXE=1 ..." + while (spi_is_busy(_currentSetting->spi_d) != 0); // "... and then wait until BSY=0 before disabling the SPI." + spi_tx_dma_disable(_currentSetting->spi_d); + spi_rx_dma_disable(_currentSetting->spi_d); dma_disable(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel); - dma_disable(_currentSetting->spiDmaDev, _currentSetting->spiRxDmaChannel); - dma_clear_isr_bits(_currentSetting->spiDmaDev, _currentSetting->spiRxDmaChannel); - dma_clear_isr_bits(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel); - _currentSetting->state = SPI_STATE_READY; + dma_disable(_currentSetting->spiDmaDev, _currentSetting->spiRxDmaChannel); + dma_clear_isr_bits(_currentSetting->spiDmaDev, _currentSetting->spiRxDmaChannel); + dma_clear_isr_bits(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel); + _currentSetting->state = SPI_STATE_READY; return b; } @@ -461,8 +461,8 @@ uint8 SPIClass::dmaTransferRepeat(uint16 length) { */ uint8 SPIClass::dmaTransfer(void *transmitBuf, void *receiveBuf, uint16 length) { - dmaTransferSet(transmitBuf, receiveBuf); - return dmaTransferRepeat(length); + dmaTransferSet(transmitBuf, receiveBuf); + return dmaTransferRepeat(length); } /* Roger Clark and Victor Perez, 2015 @@ -482,29 +482,29 @@ void SPIClass::dmaSendSet(void * transmitBuf, bool minc) { } uint8 SPIClass::dmaSendRepeat(uint16 length) { - if (length == 0) return 0; - dma_clear_isr_bits(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel); - dma_set_num_transfers(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel, length); - _currentSetting->state = SPI_STATE_TRANSMIT; - dma_enable(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel);// enable transmit - spi_tx_dma_enable(_currentSetting->spi_d); - if (_currentSetting->transmitCallback) - { - return 0; - } - uint32_t m = millis(); - uint8 b = 0; - while ((dma_get_isr_bits(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel) & DMA_ISR_TCIF1)==0) { - //Avoid interrupts and just loop waiting for the flag to be set. - if ((millis() - m) > DMA_TIMEOUT) { b = 2; break; } - } - while (spi_is_tx_empty(_currentSetting->spi_d) == 0); // "5. Wait until TXE=1 ..." - while (spi_is_busy(_currentSetting->spi_d) != 0); // "... and then wait until BSY=0 before disabling the SPI." - spi_tx_dma_disable(_currentSetting->spi_d); - dma_disable(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel); - dma_clear_isr_bits(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel); - _currentSetting->state = SPI_STATE_READY; - return b; + if (length == 0) return 0; + dma_clear_isr_bits(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel); + dma_set_num_transfers(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel, length); + _currentSetting->state = SPI_STATE_TRANSMIT; + dma_enable(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel);// enable transmit + spi_tx_dma_enable(_currentSetting->spi_d); + if (_currentSetting->transmitCallback) + { + return 0; + } + uint32_t m = millis(); + uint8 b = 0; + while ((dma_get_isr_bits(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel) & DMA_ISR_TCIF1)==0) { + //Avoid interrupts and just loop waiting for the flag to be set. + if ((millis() - m) > DMA_TIMEOUT) { b = 2; break; } + } + while (spi_is_tx_empty(_currentSetting->spi_d) == 0); // "5. Wait until TXE=1 ..." + while (spi_is_busy(_currentSetting->spi_d) != 0); // "... and then wait until BSY=0 before disabling the SPI." + spi_tx_dma_disable(_currentSetting->spi_d); + dma_disable(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel); + dma_clear_isr_bits(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel); + _currentSetting->state = SPI_STATE_READY; + return b; } uint8 SPIClass::dmaSend(void * transmitBuf, uint16 length, bool minc) { @@ -513,42 +513,42 @@ uint8 SPIClass::dmaSend(void * transmitBuf, uint16 length, bool minc) { } uint8 SPIClass::dmaSendAsync(void * transmitBuf, uint16 length, bool minc) { - uint8 b = 0; + uint8 b = 0; - if (_currentSetting->state != SPI_STATE_READY) - { + if (_currentSetting->state != SPI_STATE_READY) + { - uint32_t m = millis(); - while ((dma_get_isr_bits(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel) & DMA_ISR_TCIF1)==0) {//Avoid interrupts and just loop waiting for the flag to be set. - //delayMicroseconds(10); - if ((millis() - m) > DMA_TIMEOUT) { b = 2; break; } - } - - while (spi_is_tx_empty(_currentSetting->spi_d) == 0); // "5. Wait until TXE=1 ..." - while (spi_is_busy(_currentSetting->spi_d) != 0); // "... and then wait until BSY=0 before disabling the SPI." - spi_tx_dma_disable(_currentSetting->spi_d); - dma_disable(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel); - _currentSetting->state = SPI_STATE_READY; - } + uint32_t m = millis(); + while ((dma_get_isr_bits(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel) & DMA_ISR_TCIF1)==0) {//Avoid interrupts and just loop waiting for the flag to be set. + //delayMicroseconds(10); + if ((millis() - m) > DMA_TIMEOUT) { b = 2; break; } + } + + while (spi_is_tx_empty(_currentSetting->spi_d) == 0); // "5. Wait until TXE=1 ..." + while (spi_is_busy(_currentSetting->spi_d) != 0); // "... and then wait until BSY=0 before disabling the SPI." + spi_tx_dma_disable(_currentSetting->spi_d); + dma_disable(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel); + _currentSetting->state = SPI_STATE_READY; + } - - if (length == 0) return 0; - uint32 flags = ( (DMA_MINC_MODE*minc) | DMA_FROM_MEM | DMA_TRNS_CMPLT); + + if (length == 0) return 0; + uint32 flags = ( (DMA_MINC_MODE*minc) | DMA_FROM_MEM | DMA_TRNS_CMPLT); - - dma_init(_currentSetting->spiDmaDev); - // TX - dma_xfer_size dma_bit_size = (_currentSetting->dataSize==DATA_SIZE_16BIT) ? DMA_SIZE_16BITS : DMA_SIZE_8BITS; - dma_setup_transfer(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel, &_currentSetting->spi_d->regs->DR, dma_bit_size, - transmitBuf, dma_bit_size, flags);// Transmit buffer DMA - dma_set_num_transfers(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel, length); - dma_clear_isr_bits(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel); - dma_enable(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel);// enable transmit - spi_tx_dma_enable(_currentSetting->spi_d); + + dma_init(_currentSetting->spiDmaDev); + // TX + dma_xfer_size dma_bit_size = (_currentSetting->dataSize==DATA_SIZE_16BIT) ? DMA_SIZE_16BITS : DMA_SIZE_8BITS; + dma_setup_transfer(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel, &_currentSetting->spi_d->regs->DR, dma_bit_size, + transmitBuf, dma_bit_size, flags);// Transmit buffer DMA + dma_set_num_transfers(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel, length); + dma_clear_isr_bits(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel); + dma_enable(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel);// enable transmit + spi_tx_dma_enable(_currentSetting->spi_d); - _currentSetting->state = SPI_STATE_TRANSMIT; + _currentSetting->state = SPI_STATE_TRANSMIT; - return b; + return b; } @@ -558,51 +558,51 @@ uint8 SPIClass::dmaSendAsync(void * transmitBuf, uint16 length, bool minc) { */ void SPIClass::onReceive(void(*callback)(void)) { - _currentSetting->receiveCallback = callback; - if (callback){ - switch (_currentSetting->spi_d->clk_id) { - case RCC_SPI1: - dma_attach_interrupt(_currentSetting->spiDmaDev, _currentSetting->spiRxDmaChannel, &SPIClass::_spi1EventCallback); - break; - case RCC_SPI2: - dma_attach_interrupt(_currentSetting->spiDmaDev, _currentSetting->spiRxDmaChannel, &SPIClass::_spi2EventCallback); - break; - #if BOARD_NR_SPI >= 3 - case RCC_SPI3: - dma_attach_interrupt(_currentSetting->spiDmaDev, _currentSetting->spiRxDmaChannel, &SPIClass::_spi3EventCallback); - break; - #endif - default: - ASSERT(0); - } - } - else { - dma_detach_interrupt(_currentSetting->spiDmaDev, _currentSetting->spiRxDmaChannel); - } + _currentSetting->receiveCallback = callback; + if (callback){ + switch (_currentSetting->spi_d->clk_id) { + case RCC_SPI1: + dma_attach_interrupt(_currentSetting->spiDmaDev, _currentSetting->spiRxDmaChannel, &SPIClass::_spi1EventCallback); + break; + case RCC_SPI2: + dma_attach_interrupt(_currentSetting->spiDmaDev, _currentSetting->spiRxDmaChannel, &SPIClass::_spi2EventCallback); + break; + #if BOARD_NR_SPI >= 3 + case RCC_SPI3: + dma_attach_interrupt(_currentSetting->spiDmaDev, _currentSetting->spiRxDmaChannel, &SPIClass::_spi3EventCallback); + break; + #endif + default: + ASSERT(0); + } + } + else { + dma_detach_interrupt(_currentSetting->spiDmaDev, _currentSetting->spiRxDmaChannel); + } } void SPIClass::onTransmit(void(*callback)(void)) { - _currentSetting->transmitCallback = callback; - if (callback){ - switch (_currentSetting->spi_d->clk_id) { - case RCC_SPI1: - dma_attach_interrupt(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel, &SPIClass::_spi1EventCallback); - break; - case RCC_SPI2: - dma_attach_interrupt(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel, &SPIClass::_spi2EventCallback); - break; - #if BOARD_NR_SPI >= 3 - case RCC_SPI3: - dma_attach_interrupt(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel, &SPIClass::_spi3EventCallback); - break; - #endif - default: - ASSERT(0); - } - } - else { - dma_detach_interrupt(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel); - } + _currentSetting->transmitCallback = callback; + if (callback){ + switch (_currentSetting->spi_d->clk_id) { + case RCC_SPI1: + dma_attach_interrupt(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel, &SPIClass::_spi1EventCallback); + break; + case RCC_SPI2: + dma_attach_interrupt(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel, &SPIClass::_spi2EventCallback); + break; + #if BOARD_NR_SPI >= 3 + case RCC_SPI3: + dma_attach_interrupt(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel, &SPIClass::_spi3EventCallback); + break; + #endif + default: + ASSERT(0); + } + } + else { + dma_detach_interrupt(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel); + } } /* @@ -611,44 +611,44 @@ void SPIClass::onTransmit(void(*callback)(void)) { */ void SPIClass::EventCallback() { - while (spi_is_tx_empty(_currentSetting->spi_d) == 0); // "5. Wait until TXE=1 ..." - while (spi_is_busy(_currentSetting->spi_d) != 0); // "... and then wait until BSY=0" - switch (_currentSetting->state) { - case SPI_STATE_TRANSFER: - while (spi_is_rx_nonempty(_currentSetting->spi_d)); - _currentSetting->state = SPI_STATE_READY; - spi_tx_dma_disable(_currentSetting->spi_d); - spi_rx_dma_disable(_currentSetting->spi_d); - //dma_disable(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel); - //dma_disable(_currentSetting->spiDmaDev, _currentSetting->spiRxDmaChannel); + while (spi_is_tx_empty(_currentSetting->spi_d) == 0); // "5. Wait until TXE=1 ..." + while (spi_is_busy(_currentSetting->spi_d) != 0); // "... and then wait until BSY=0" + switch (_currentSetting->state) { + case SPI_STATE_TRANSFER: + while (spi_is_rx_nonempty(_currentSetting->spi_d)); + _currentSetting->state = SPI_STATE_READY; + spi_tx_dma_disable(_currentSetting->spi_d); + spi_rx_dma_disable(_currentSetting->spi_d); + //dma_disable(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel); + //dma_disable(_currentSetting->spiDmaDev, _currentSetting->spiRxDmaChannel); - if (_currentSetting->receiveCallback) - { - _currentSetting->receiveCallback(); - } - break; - case SPI_STATE_TRANSMIT: - _currentSetting->state = SPI_STATE_READY; - spi_tx_dma_disable(_currentSetting->spi_d); - //dma_disable(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel); - if (_currentSetting->transmitCallback) - { - _currentSetting->transmitCallback(); - } + if (_currentSetting->receiveCallback) + { + _currentSetting->receiveCallback(); + } + break; + case SPI_STATE_TRANSMIT: + _currentSetting->state = SPI_STATE_READY; + spi_tx_dma_disable(_currentSetting->spi_d); + //dma_disable(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel); + if (_currentSetting->transmitCallback) + { + _currentSetting->transmitCallback(); + } - break; - default: - // we shouldn't get here, so better to add an assert and fail. - return; - } + break; + default: + // we shouldn't get here, so better to add an assert and fail. + return; + } } void SPIClass::attachInterrupt(void) { - // Should be enableInterrupt() + // Should be enableInterrupt() } void SPIClass::detachInterrupt(void) { - // Should be disableInterrupt() + // Should be disableInterrupt() } /* @@ -699,11 +699,11 @@ void SPIClass::_spi1EventCallback() } void SPIClass::_spi2EventCallback() { - reinterpret_cast(_spi2_this)->EventCallback(); + reinterpret_cast(_spi2_this)->EventCallback(); } #if BOARD_NR_SPI >= 3 void SPIClass::_spi3EventCallback() { - reinterpret_cast(_spi3_this)->EventCallback(); + reinterpret_cast(_spi3_this)->EventCallback(); } #endif /* @@ -711,57 +711,57 @@ void SPIClass::_spi3EventCallback() { */ static const spi_pins* dev_to_spi_pins(spi_dev *dev) { - switch (dev->clk_id) { + switch (dev->clk_id) { #if BOARD_NR_SPI >= 1 - case RCC_SPI1: return board_spi_pins; + case RCC_SPI1: return board_spi_pins; #endif #if BOARD_NR_SPI >= 2 - case RCC_SPI2: return board_spi_pins + 1; + case RCC_SPI2: return board_spi_pins + 1; #endif #if BOARD_NR_SPI >= 3 - case RCC_SPI3: return board_spi_pins + 2; + case RCC_SPI3: return board_spi_pins + 2; #endif - default: return NULL; - } + default: return NULL; + } } static void disable_pwm(const stm32_pin_info *i) { - if (i->timer_device) { - timer_set_mode(i->timer_device, i->timer_channel, TIMER_DISABLED); - } + if (i->timer_device) { + timer_set_mode(i->timer_device, i->timer_channel, TIMER_DISABLED); + } } static void configure_gpios(spi_dev *dev, bool as_master) { - const spi_pins *pins = dev_to_spi_pins(dev); + const spi_pins *pins = dev_to_spi_pins(dev); - if (!pins) { - return; - } + if (!pins) { + return; + } - const stm32_pin_info *nssi = &PIN_MAP[pins->nss]; - const stm32_pin_info *scki = &PIN_MAP[pins->sck]; - const stm32_pin_info *misoi = &PIN_MAP[pins->miso]; - const stm32_pin_info *mosii = &PIN_MAP[pins->mosi]; + const stm32_pin_info *nssi = &PIN_MAP[pins->nss]; + const stm32_pin_info *scki = &PIN_MAP[pins->sck]; + const stm32_pin_info *misoi = &PIN_MAP[pins->miso]; + const stm32_pin_info *mosii = &PIN_MAP[pins->mosi]; - disable_pwm(nssi); - disable_pwm(scki); - disable_pwm(misoi); - disable_pwm(mosii); + disable_pwm(nssi); + disable_pwm(scki); + disable_pwm(misoi); + disable_pwm(mosii); - spi_config_gpios(dev, as_master, nssi->gpio_device, nssi->gpio_bit, - scki->gpio_device, scki->gpio_bit, misoi->gpio_bit, - mosii->gpio_bit); + spi_config_gpios(dev, as_master, nssi->gpio_device, nssi->gpio_bit, + scki->gpio_device, scki->gpio_bit, misoi->gpio_bit, + mosii->gpio_bit); } static const spi_baud_rate baud_rates[8] __FLASH__ = { - SPI_BAUD_PCLK_DIV_2, - SPI_BAUD_PCLK_DIV_4, - SPI_BAUD_PCLK_DIV_8, - SPI_BAUD_PCLK_DIV_16, - SPI_BAUD_PCLK_DIV_32, - SPI_BAUD_PCLK_DIV_64, - SPI_BAUD_PCLK_DIV_128, - SPI_BAUD_PCLK_DIV_256, + SPI_BAUD_PCLK_DIV_2, + SPI_BAUD_PCLK_DIV_4, + SPI_BAUD_PCLK_DIV_8, + SPI_BAUD_PCLK_DIV_16, + SPI_BAUD_PCLK_DIV_32, + SPI_BAUD_PCLK_DIV_64, + SPI_BAUD_PCLK_DIV_128, + SPI_BAUD_PCLK_DIV_256, }; /* @@ -769,22 +769,22 @@ static const spi_baud_rate baud_rates[8] __FLASH__ = { * (CYCLES_PER_MICROSECOND == 72, APB2 at 72MHz, APB1 at 36MHz). */ static spi_baud_rate determine_baud_rate(spi_dev *dev, uint32_t freq) { - uint32_t clock = 0, i; - #ifdef SPI_DEBUG - Serial.print("determine_baud_rate("); Serial.print(freq); Serial.println(")"); - #endif - switch (rcc_dev_clk(dev->clk_id)) - { - case RCC_APB2: clock = STM32_PCLK2; break; // 72 Mhz - case RCC_APB1: clock = STM32_PCLK1; break; // 36 Mhz - } - clock /= 2; - i = 0; - while (i < 7 && freq < clock) { - clock /= 2; - i++; - } - return baud_rates[i]; + uint32_t clock = 0, i; + #ifdef SPI_DEBUG + Serial.print("determine_baud_rate("); Serial.print(freq); Serial.println(")"); + #endif + switch (rcc_dev_clk(dev->clk_id)) + { + case RCC_APB2: clock = STM32_PCLK2; break; // 72 Mhz + case RCC_APB1: clock = STM32_PCLK1; break; // 36 Mhz + } + clock /= 2; + i = 0; + while (i < 7 && freq < clock) { + clock /= 2; + i++; + } + return baud_rates[i]; } SPIClass SPI(1); From 0393be34008f663b99141d46a9919b901e522dac Mon Sep 17 00:00:00 2001 From: Roger Clark Date: Sat, 15 Jul 2017 18:31:02 +1000 Subject: [PATCH 12/12] Added setClock() to Wire and Hardware - only 100000Hz and 400000Hz are supported --- STM32F1/libraries/Wire/HardWire.cpp | 15 +++++++++++++++ STM32F1/libraries/Wire/HardWire.h | 1 + STM32F1/libraries/Wire/Wire.cpp | 26 ++++++++++++++++++++++++-- STM32F1/libraries/Wire/Wire.h | 9 ++++++++- 4 files changed, 48 insertions(+), 3 deletions(-) diff --git a/STM32F1/libraries/Wire/HardWire.cpp b/STM32F1/libraries/Wire/HardWire.cpp index d81f584..51af7ad 100644 --- a/STM32F1/libraries/Wire/HardWire.cpp +++ b/STM32F1/libraries/Wire/HardWire.cpp @@ -84,3 +84,18 @@ void HardWire::end() { i2c_disable(sel_hard); sel_hard = 0; } + +void HardWire::setClock(uint32_t frequencyHz) +{ + switch(frequencyHz) + { + case 400000: + dev_flags |= I2C_FAST_MODE;// set FAST_MODE bit + break; + case 100000: + default: + dev_flags &= ~I2C_FAST_MODE;// clear FAST_MODE bit + break; + } + +} diff --git a/STM32F1/libraries/Wire/HardWire.h b/STM32F1/libraries/Wire/HardWire.h index bf59a2f..4d49e1a 100644 --- a/STM32F1/libraries/Wire/HardWire.h +++ b/STM32F1/libraries/Wire/HardWire.h @@ -66,6 +66,7 @@ public: */ void end(); + void setClock(uint32_t frequencyHz); /* * Disables the I2C device and remove the device address. */ diff --git a/STM32F1/libraries/Wire/Wire.cpp b/STM32F1/libraries/Wire/Wire.cpp index fff850b..712adf4 100644 --- a/STM32F1/libraries/Wire/Wire.cpp +++ b/STM32F1/libraries/Wire/Wire.cpp @@ -56,7 +56,9 @@ void TwoWire::set_scl(bool state) { I2C_DELAY(this->i2c_delay); - digitalWrite(this->scl_pin,state); + + gpio_write_bit(sclDevice,sclBit, state); +// digitalWrite(this->scl_pin,state); //Allow for clock stretching - dangerous currently if (state == HIGH) { while(digitalRead(this->scl_pin) == 0); @@ -65,7 +67,8 @@ void TwoWire::set_scl(bool state) { void TwoWire::set_sda(bool state) { I2C_DELAY(this->i2c_delay); - digitalWrite(this->sda_pin, state); + gpio_write_bit(sdaDevice,sdaBit, state); + //digitalWrite(this->sda_pin, state); } void TwoWire::i2c_start() { @@ -198,6 +201,11 @@ void TwoWire::begin(uint8 self_addr) { rx_buf_len = 0; pinMode(this->scl_pin, OUTPUT_OPEN_DRAIN); pinMode(this->sda_pin, OUTPUT_OPEN_DRAIN); + + sclDevice = PIN_MAP[this->scl_pin].gpio_device; + sclBit = PIN_MAP[this->scl_pin].gpio_bit; + sdaDevice = PIN_MAP[this->sda_pin].gpio_device; + sdaBit = PIN_MAP[this->sda_pin].gpio_bit; set_scl(HIGH); set_sda(HIGH); } @@ -214,6 +222,20 @@ void TwoWire::end() } } +void TwoWire::setClock(uint32_t frequencyHz) +{ + switch(frequencyHz) + { + case 400000: + i2c_delay = SOFT_FAST; + break; + case 100000: + default: + i2c_delay = SOFT_STANDARD; + break; + } +} + TwoWire::~TwoWire() { this->scl_pin=0; this->sda_pin=0; diff --git a/STM32F1/libraries/Wire/Wire.h b/STM32F1/libraries/Wire/Wire.h index df474da..8fbddaa 100644 --- a/STM32F1/libraries/Wire/Wire.h +++ b/STM32F1/libraries/Wire/Wire.h @@ -50,7 +50,7 @@ #define SDA PB7 #define SCL PB6 -#define SOFT_STANDARD 27 +#define SOFT_STANDARD 19 #define SOFT_FAST 0 @@ -126,6 +126,11 @@ class TwoWire : public WireBase { */ uint8 process(uint8); uint8 process(); + private: + gpio_dev *sdaDevice; + uint8 sdaBit; + gpio_dev *sclDevice; + uint8 sclBit; public: /* * Accept pin numbers for SCL and SDA lines. Set the delay needed @@ -139,6 +144,8 @@ class TwoWire : public WireBase { * .begin(uint8) in WireBase */ void begin(uint8 = 0x00); + + void setClock(uint32_t frequencyHz); /* * Sets pins SDA and SCL to INPUT