From f92015b9f41efaf10f2939acec8d1cd7a9f0b0c2 Mon Sep 17 00:00:00 2001 From: Roger Clark Date: Wed, 15 Apr 2015 20:25:00 +1000 Subject: [PATCH] Added provisional support for STM32F103Z series. Note this is a work in progress --- STM32F1/boards.txt | 29 +- .../variants/generic_stm32f103zxx/board.cpp | 431 +++++++++--------- .../generic_stm32f103zxx/board/board.h | 226 ++++----- 3 files changed, 354 insertions(+), 332 deletions(-) diff --git a/STM32F1/boards.txt b/STM32F1/boards.txt index 21bd1a4..2c1e732 100644 --- a/STM32F1/boards.txt +++ b/STM32F1/boards.txt @@ -260,10 +260,9 @@ GenericSTM32F103C.upload.usbID=1EAF:0003 GenericSTM32F103C.upload.auto_reset=true GenericSTM32F103C.build.mcu=cortex-m3 GenericSTM32F103C.build.f_cpu=72000000L -GenericSTM32F103C.build.board=MAPLE_MINI_GENERIC +GenericSTM32F103C.build.board=GENERIC_STM32F103C GenericSTM32F103C.build.common_flags=-mthumb -march=armv7-m -D__STM32F1__ GenericSTM32F103C.build.variant_system_lib=libmaple.a -GenericSTM32F103C.build.density=STM32_MEDIUM_DENSITY GenericSTM32F103C.build.error_led_port=GPIOB GenericSTM32F103C.build.error_led_pin=1 @@ -374,4 +373,28 @@ GenericSTM32F103C.menu.cpu_upload_menu.c8SerialJTAG.upload.maximum_size=64000 GenericSTM32F103C.menu.cpu_upload_menu.c8SerialJTAG.upload.ram.maximum_size=20000 GenericSTM32F103C.menu.cpu_upload_menu.c8SerialJTAG.upload.flash.maximum_size=64000 GenericSTM32F103C.menu.cpu_upload_menu.c8SerialJTAG.upload.altID=1 -GenericSTM32F103C.menu.cpu_upload_menu.c8SerialJTAG.upload.protocol=maple_serial \ No newline at end of file +GenericSTM32F103C.menu.cpu_upload_menu.c8SerialJTAG.upload.protocol=maple_serial + +############################################################## +genericSTM32F103Z.name=Generic STM32F103Z +genericSTM32F103Z.upload.maximum_size=492000 +genericSTM32F103Z.upload.ram.maximum_size=61000 +genericSTM32F103Z.upload.flash.maximum_size=492000 +genericSTM32F103Z.build.error_led_port=GPIOA +genericSTM32F103Z.build.error_led_pin=5 +genericSTM32F103Z.build.variant=generic_stm32f103zxx +genericSTM32F103Z.build.extra_flags=-DMCU_STM32F103ZE -mthumb -march=armv7-m -D__STM32F1__ +genericSTM32F103Z.build.ldscript=ld/jtag.ld + +genericSTM32F103Z.upload.tool=serial_upload +genericSTM32F103Z.upload.protocol=maple_dfu +genericSTM32F103Z.upload.use_1200bps_touch=false +genericSTM32F103Z.upload.file_type=bin +#genericSTM32F103Z.upload.usbID=1EAF:0003 +#genericSTM32F103Z.upload.altID=1 +#genericSTM32F103Z.upload.auto_reset=true +genericSTM32F103Z.build.mcu=cortex-m3 +genericSTM32F103Z.build.f_cpu=72000000L +genericSTM32F103Z.build.board=GENERIC_STM32F103Z +genericSTM32F103Z.build.core=maple +genericSTM32F103Z.build.vect=VECT_TAB_FLASH \ No newline at end of file diff --git a/STM32F1/variants/generic_stm32f103zxx/board.cpp b/STM32F1/variants/generic_stm32f103zxx/board.cpp index 6b2bac9..66791cd 100644 --- a/STM32F1/variants/generic_stm32f103zxx/board.cpp +++ b/STM32F1/variants/generic_stm32f103zxx/board.cpp @@ -1,216 +1,215 @@ -/****************************************************************************** - * The MIT License - * - * Copyright (c) 2011 LeafLabs, LLC. - * - * Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, copy, - * modify, merge, publish, distribute, sublicense, and/or sell copies - * of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS - * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN - * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - *****************************************************************************/ - -/** - * @file wirish/boards/maple/board.cpp - * @author Marti Bolivar - * @brief Maple board file. - */ - -#include // For this board's header file - -#include // For stm32_pin_info and its contents - // (these go into PIN_MAP). - -#include "boards_private.h" // For PMAP_ROW(), which makes - // PIN_MAP easier to read. - -// boardInit(): nothing special to do for Maple. -// -// When defining your own board.cpp, you can put extra code in this -// function if you have anything you want done on reset, before main() -// or setup() are called. -// -// If there's nothing special you need done, feel free to leave this -// function out, as we do here. -/* -void boardInit(void) { -} -*/ - -// Pin map: this lets the basic I/O functions (digitalWrite(), -// analogRead(), pwmWrite()) translate from pin numbers to STM32 -// peripherals. -// -// PMAP_ROW() lets us specify a row (really a struct stm32_pin_info) -// in the pin map. Its arguments are: -// -// - GPIO device for the pin (GPIOA, etc.) -// - GPIO bit for the pin (0 through 15) -// - Timer device, or NULL if none -// - Timer channel (1 to 4, for PWM), or 0 if none -// - ADC device, or NULL if none -// - ADC channel, or ADCx if none - -extern const stm32_pin_info PIN_MAP[BOARD_NR_GPIO_PINS] = { -/* - gpio_dev *gpio_device; GPIO device - timer_dev *timer_device; Pin's timer device, if any. - const adc_dev *adc_device; ADC device, if any. - uint8 gpio_bit; Pin's GPIO port bit. - uint8 timer_channel; Timer channel, or 0 if none. - uint8 adc_channel; Pin ADC channel, or ADCx if none. - uint8 pinMode; mode specific by pinMode call (Roger Clark added to optimize compatibility with Arduino API -*/ - - {GPIOA, TIMER2, ADC1, 0, 1, 0}, /* PA0 */ - {GPIOA, TIMER2, ADC1, 1, 2, 1}, /* PA1 */ - {GPIOA, TIMER2, ADC1, 2, 3, 2}, /* PA2 */ - {GPIOA, TIMER2, ADC1, 3, 4, 3}, /* PA3 */ - {GPIOA, NULL, ADC1, 4, 0, 4}, /* PA4 */ - {GPIOA, NULL, ADC1, 5, 0, 5}, /* PA5 */ - {GPIOA, TIMER3, ADC1, 6, 1, 6}, /* PA6 */ - {GPIOA, TIMER3, ADC1, 7, 2, 7}, /* PA7 */ - {GPIOA, TIMER1, NULL, 8, 1, ADCx}, /* PA8 */ - {GPIOA, TIMER1, NULL, 9, 2, ADCx}, /* PA9 */ - {GPIOA, TIMER1, NULL, 10, 3, ADCx}, /* PA10 */ - {GPIOA, NULL, NULL, 11, 0, ADCx}, /* PA11 */ - {GPIOA, NULL, NULL, 12, 0, ADCx}, /* PA12 */ - {GPIOA, NULL, NULL, 13, 0, ADCx}, /* PA13 */ - {GPIOA, NULL, NULL, 14, 0, ADCx}, /* PA14 */ - {GPIOA, NULL, NULL, 15, 0, ADCx}, /* PA15 */ - - {GPIOB, TIMER3, ADC1, 0, 3, 8}, /* PB0 */ - {GPIOB, TIMER3, ADC1, 1, 4, 9}, /* PB1 */ - /* NOTE PB2 is not included as its Boot 1 */ - {GPIOB, NULL, NULL, 3, 0, ADCx}, /* PB3 */ - {GPIOB, NULL, NULL, 4, 0, ADCx}, /* PB4 */ - {GPIOB, NULL, NULL, 5, 0, ADCx}, /* PB5 */ - {GPIOB, TIMER4, NULL, 6, 1, ADCx}, /* PB6 */ - {GPIOB, TIMER4, NULL, 7, 2, ADCx}, /* PB7 */ - {GPIOB, TIMER4, NULL, 8, 3, ADCx}, /* PB8 */ - {GPIOB, TIMER4, NULL, 9, 4, ADCx}, /* PB9 */ - {GPIOB, NULL, NULL, 10, 0, ADCx}, /* PB10 */ - {GPIOB, NULL, NULL, 11, 0, ADCx}, /* PB11 */ - {GPIOB, NULL, NULL, 12, 0, ADCx}, /* PB12 */ - {GPIOB, NULL, NULL, 13, 0, ADCx}, /* PB13 */ - {GPIOB, NULL, NULL, 14, 0, ADCx}, /* PB14 */ - {GPIOB, NULL, NULL, 15, 0, ADCx}, /* PB15 */ - - - {GPIOC, NULL, ADC1, 0, 0, 10}, /* PC0 */ - {GPIOC, NULL, ADC1, 1, 0, 11}, /* PC1 */ - {GPIOC, NULL, ADC1, 2, 0, 12}, /* PC2 */ - {GPIOC, NULL, ADC1, 3, 0, 13}, /* PC3 */ - {GPIOC, NULL, ADC1, 4, 0, 14}, /* PC4 */ - {GPIOC, NULL, ADC1, 5, 0, 15}, /* PC5 */ - {GPIOC, TIMER8, NULL, 6, 1, ADCx}, /* PC6 */ - {GPIOC, TIMER8, NULL, 7, 2, ADCx}, /* PC7 */ - {GPIOC, TIMER8, NULL, 8, 3, ADCx}, /* PC8 */ - {GPIOC, TIMER8, NULL, 9, 4, ADCx}, /* PC9 */ - {GPIOC, NULL, NULL, 10, 0, ADCx}, /* PC10 UART4_TX/SDIO_D2 */ - {GPIOC, NULL, NULL, 11, 0, ADCx}, /* PC11 UART4_RX/SDIO_D3 */ - {GPIOC, NULL, NULL, 12, 0, ADCx}, /* PC12 UART5_TX/SDIO_CK */ - {GPIOC, NULL, NULL, 13, 0, ADCx}, /* PC13 TAMPER-RTC */ - {GPIOC, NULL, NULL, 14, 0, ADCx}, /* PC14 OSC32_IN */ - {GPIOC, NULL, NULL, 15, 0, ADCx}, /* PC15 OSC32_OUT */ - - {GPIOD, NULL, NULL, 0, 0, ADCx} , /* PD0 OSC_IN */ - {GPIOD, NULL, NULL, 1, 0, ADCx} , /* PD1 OSC_OUT */ - {GPIOD, NULL, NULL, 2, 0, ADCx} , /* PD2 TIM3_ETR/UART5_RX SDIO_CMD */ - - {GPIOD, NULL, NULL, 3, 0, ADCx} , /* PD3 FSMC_CLK */ - {GPIOD, NULL, NULL, 4, 0, ADCx} , /* PD4 FSMC_NOE */ - {GPIOD, NULL, NULL, 5, 0, ADCx} , /* PD5 FSMC_NWE */ - {GPIOD, NULL, NULL, 6, 0, ADCx} , /* PD6 FSMC_NWAIT */ - {GPIOD, NULL, NULL, 7, 0, ADCx} , /* PD7 FSMC_NE1/FSMC_NCE2 */ - {GPIOD, NULL, NULL, 8, 0, ADCx} , /* PD8 FSMC_D13 */ - {GPIOD, NULL, NULL, 9, 0, ADCx} , /* PD9 FSMC_D14 */ - {GPIOD, NULL, NULL, 10, 0, ADCx} , /* PD10 FSMC_D15 */ - {GPIOD, NULL, NULL, 11, 0, ADCx} , /* PD11 FSMC_A16 */ - {GPIOD, NULL, NULL, 12, 0, ADCx} , /* PD12 FSMC_A17 */ - {GPIOD, NULL, NULL, 13, 0, ADCx} , /* PD13 FSMC_A18 */ - {GPIOD, NULL, NULL, 14, 0, ADCx} , /* PD14 FSMC_D0 */ - {GPIOD, NULL, NULL, 15, 0, ADCx} , /* PD15 FSMC_D1 */ - - {GPIOE, NULL, NULL, 0, 0, ADCx} , /* PE0 */ - {GPIOE, NULL, NULL, 1, 0, ADCx} , /* PE1 */ - {GPIOE, NULL, NULL, 2, 0, ADCx} , /* PE2 */ - {GPIOE, NULL, NULL, 3, 0, ADCx} , /* PE3 */ - {GPIOE, NULL, NULL, 4, 0, ADCx} , /* PE4 */ - {GPIOE, NULL, NULL, 5, 0, ADCx} , /* PE5 */ - {GPIOE, NULL, NULL, 6, 0, ADCx} , /* PE6 */ - {GPIOE, NULL, NULL, 7, 0, ADCx} , /* PE7 */ - {GPIOE, NULL, NULL, 8, 0, ADCx} , /* PE8 */ - {GPIOE, NULL, NULL, 9, 0, ADCx} , /* PE9 */ - {GPIOE, NULL, NULL, 10, 0, ADCx} , /* PE10 */ - {GPIOE, NULL, NULL, 11, 0, ADCx} , /* PE11 */ - {GPIOE, NULL, NULL, 12, 0, ADCx} , /* PE12 */ - {GPIOE, NULL, NULL, 13, 0, ADCx} , /* PE13 */ - {GPIOE, NULL, NULL, 14, 0, ADCx} , /* PE14 */ - {GPIOE, NULL, NULL, 15, 0, ADCx} /* PE15 */ - - {GPIOF, NULL, NULL, 0, 0, ADCx} , /* PF0 */ - {GPIOF, NULL, NULL, 1, 0, ADCx} , /* PF1 */ - {GPIOF, NULL, NULL, 2, 0, ADCx} , /* PF2 */ - {GPIOF, NULL, NULL, 3, 0, ADCx} , /* PF3 */ - {GPIOF, NULL, NULL, 4, 0, ADCx} , /* PF4 */ - {GPIOF, NULL, NULL, 5, 0, ADCx} , /* PF5 */ - {GPIOF, NULL, NULL, 6, 0, ADCx} , /* PF6 */ - {GPIOF, NULL, NULL, 7, 0, ADCx} , /* PF7 */ - {GPIOF, NULL, NULL, 8, 0, ADCx} , /* PF8 */ - {GPIOF, NULL, NULL, 9, 0, ADCx} , /* PF9 */ - {GPIOF, NULL, NULL, 10, 0, ADCx} , /* PF10 */ - {GPIOF, NULL, NULL, 11, 0, ADCx} , /* PF11 */ - {GPIOF, NULL, NULL, 12, 0, ADCx} , /* PF12 */ - {GPIOF, NULL, NULL, 13, 0, ADCx} , /* PF13 */ - {GPIOF, NULL, NULL, 14, 0, ADCx} , /* PF14 */ - {GPIOF, NULL, NULL, 15, 0, ADCx} /* PF15 */ - - (GPIOG, NULL, NULL, 0, 0, ADCx} , /* PG0 */ - {GPIOG, NULL, NULL, 1, 0, ADCx} , /* PG1 */ - {GPIOG, NULL, NULL, 2, 0, ADCx} , /* PG2 */ - {GPIOG, NULL, NULL, 3, 0, ADCx} , /* PG3 */ - {GPIOG, NULL, NULL, 4, 0, ADCx} , /* PG4 */ - {GPIOG, NULL, NULL, 5, 0, ADCx} , /* PG5 */ - {GPIOG, NULL, NULL, 6, 0, ADCx} , /* PG6 */ - {GPIOG, NULL, NULL, 7, 0, ADCx} , /* PG7 */ - {GPIOG, NULL, NULL, 8, 0, ADCx} , /* PG8 */ - {GPIOG, NULL, NULL, 9, 0, ADCx} , /* PG9 */ - {GPIOG, NULL, NULL, 10, 0, ADCx} , /* PG10 */ - {GPIOG, NULL, NULL, 11, 0, ADCx} , /* PG11 */ - {GPIOG, NULL, NULL, 12, 0, ADCx} , /* PG12 */ - {GPIOG, NULL, NULL, 13, 0, ADCx} , /* PG13 */ - {GPIOG, NULL, NULL, 14, 0, ADCx} , /* PG14 */ - {GPIOG, NULL, NULL, 15, 0, ADCx} /* PG15 */ - -}; - -/* Basically everything that is defined as having a timer us PWM */ -extern const uint8 boardPWMPins[BOARD_NR_PWM_PINS] __FLASH__ = { - PA0,PA1,PA2,PA3,PA6,PA7,PA8,PA9,PA10,PB0,PB1,PB6,PB7,PB8,PB9,PC6,PC7,PC8,PC9 -}; - -/* Basically everything that is defined having ADC */ -extern const uint8 boardADCPins[BOARD_NR_ADC_PINS] __FLASH__ = { - PA0,PA1,PA2,PA3,PA4,PA5,PA6,PA7,PB0,PB1,PC0,PC1,PC2,PC3,PC4,PC5 -}; - -/* not sure what this us used for */ -extern const uint8 boardUsedPins[BOARD_NR_USED_PINS] __FLASH__ = { - BOARD_LED_PIN, BOARD_BUTTON_PIN, BOARD_JTMS_SWDIO_PIN, - BOARD_JTCK_SWCLK_PIN, BOARD_JTDI_PIN, BOARD_JTDO_PIN, BOARD_NJTRST_PIN -}; +/****************************************************************************** + * The MIT License + * + * Copyright (c) 2011 LeafLabs, LLC. + * + * Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, copy, + * modify, merge, publish, distribute, sublicense, and/or sell copies + * of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS + * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN + * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + *****************************************************************************/ + +/** + * @file wirish/boards/maple/board.cpp + * @author Marti Bolivar + * @brief Maple board file. + */ + +#include // For this board's header file + +#include // For stm32_pin_info and its contents + // (these go into PIN_MAP). + +#include "boards_private.h" // For PMAP_ROW(), which makes + // PIN_MAP easier to read. + +// boardInit(): nothing special to do for Maple. +// +// When defining your own board.cpp, you can put extra code in this +// function if you have anything you want done on reset, before main() +// or setup() are called. +// +// If there's nothing special you need done, feel free to leave this +// function out, as we do here. +/* +void boardInit(void) { +} +*/ + +// Pin map: this lets the basic I/O functions (digitalWrite(), +// analogRead(), pwmWrite()) translate from pin numbers to STM32 +// peripherals. +// +// PMAP_ROW() lets us specify a row (really a struct stm32_pin_info) +// in the pin map. Its arguments are: +// +// - GPIO device for the pin (GPIOA, etc.) +// - GPIO bit for the pin (0 through 15) +// - Timer device, or NULL if none +// - Timer channel (1 to 4, for PWM), or 0 if none +// - ADC device, or NULL if none +// - ADC channel, or ADCx if none + +extern const stm32_pin_info PIN_MAP[BOARD_NR_GPIO_PINS] = { +/* + gpio_dev *gpio_device; GPIO device + timer_dev *timer_device; Pin's timer device, if any. + const adc_dev *adc_device; ADC device, if any. + uint8 gpio_bit; Pin's GPIO port bit. + uint8 timer_channel; Timer channel, or 0 if none. + uint8 adc_channel; Pin ADC channel, or ADCx if none. + uint8 pinMode; mode specific by pinMode call (Roger Clark added to optimize compatibility with Arduino API +*/ + + {GPIOA, TIMER2, ADC1, 0, 1, 0}, /* PA0 */ + {GPIOA, TIMER2, ADC1, 1, 2, 1}, /* PA1 */ + {GPIOA, TIMER2, ADC1, 2, 3, 2}, /* PA2 */ + {GPIOA, TIMER2, ADC1, 3, 4, 3}, /* PA3 */ + {GPIOA, NULL, ADC1, 4, 0, 4}, /* PA4 */ + {GPIOA, NULL, ADC1, 5, 0, 5}, /* PA5 */ + {GPIOA, TIMER3, ADC1, 6, 1, 6}, /* PA6 */ + {GPIOA, TIMER3, ADC1, 7, 2, 7}, /* PA7 */ + {GPIOA, TIMER1, NULL, 8, 1, ADCx}, /* PA8 */ + {GPIOA, TIMER1, NULL, 9, 2, ADCx}, /* PA9 */ + {GPIOA, TIMER1, NULL, 10, 3, ADCx}, /* PA10 */ + {GPIOA, NULL, NULL, 11, 0, ADCx}, /* PA11 */ + {GPIOA, NULL, NULL, 12, 0, ADCx}, /* PA12 */ + {GPIOA, NULL, NULL, 13, 0, ADCx}, /* PA13 */ + {GPIOA, NULL, NULL, 14, 0, ADCx}, /* PA14 */ + {GPIOA, NULL, NULL, 15, 0, ADCx}, /* PA15 */ + + {GPIOB, TIMER3, ADC1, 0, 3, 8}, /* PB0 */ + {GPIOB, TIMER3, ADC1, 1, 4, 9}, /* PB1 */ + {GPIOB, TIMER3, ADC1, 2, 4, 9}, /* PB2 */ + {GPIOB, NULL, NULL, 3, 0, ADCx}, /* PB3 */ + {GPIOB, NULL, NULL, 4, 0, ADCx}, /* PB4 */ + {GPIOB, NULL, NULL, 5, 0, ADCx}, /* PB5 */ + {GPIOB, TIMER4, NULL, 6, 1, ADCx}, /* PB6 */ + {GPIOB, TIMER4, NULL, 7, 2, ADCx}, /* PB7 */ + {GPIOB, TIMER4, NULL, 8, 3, ADCx}, /* PB8 */ + {GPIOB, TIMER4, NULL, 9, 4, ADCx}, /* PB9 */ + {GPIOB, NULL, NULL, 10, 0, ADCx}, /* PB10 */ + {GPIOB, NULL, NULL, 11, 0, ADCx}, /* PB11 */ + {GPIOB, NULL, NULL, 12, 0, ADCx}, /* PB12 */ + {GPIOB, NULL, NULL, 13, 0, ADCx}, /* PB13 */ + {GPIOB, NULL, NULL, 14, 0, ADCx}, /* PB14 */ + {GPIOB, NULL, NULL, 15, 0, ADCx}, /* PB15 */ + + + {GPIOC, NULL, ADC1, 0, 0, 10}, /* PC0 */ + {GPIOC, NULL, ADC1, 1, 0, 11}, /* PC1 */ + {GPIOC, NULL, ADC1, 2, 0, 12}, /* PC2 */ + {GPIOC, NULL, ADC1, 3, 0, 13}, /* PC3 */ + {GPIOC, NULL, ADC1, 4, 0, 14}, /* PC4 */ + {GPIOC, NULL, ADC1, 5, 0, 15}, /* PC5 */ + {GPIOC, TIMER8, NULL, 6, 1, ADCx}, /* PC6 */ + {GPIOC, TIMER8, NULL, 7, 2, ADCx}, /* PC7 */ + {GPIOC, TIMER8, NULL, 8, 3, ADCx}, /* PC8 */ + {GPIOC, TIMER8, NULL, 9, 4, ADCx}, /* PC9 */ + {GPIOC, NULL, NULL, 10, 0, ADCx}, /* PC10 UART4_TX/SDIO_D2 */ + {GPIOC, NULL, NULL, 11, 0, ADCx}, /* PC11 UART4_RX/SDIO_D3 */ + {GPIOC, NULL, NULL, 12, 0, ADCx}, /* PC12 UART5_TX/SDIO_CK */ + {GPIOC, NULL, NULL, 13, 0, ADCx}, /* PC13 TAMPER-RTC */ + {GPIOC, NULL, NULL, 14, 0, ADCx}, /* PC14 OSC32_IN */ + {GPIOC, NULL, NULL, 15, 0, ADCx}, /* PC15 OSC32_OUT */ + + {GPIOD, NULL, NULL, 0, 0, ADCx} , /* PD0 OSC_IN */ + {GPIOD, NULL, NULL, 1, 0, ADCx} , /* PD1 OSC_OUT */ + {GPIOD, NULL, NULL, 2, 0, ADCx} , /* PD2 TIM3_ETR/UART5_RX SDIO_CMD */ + + {GPIOD, NULL, NULL, 3, 0, ADCx} , /* PD3 FSMC_CLK */ + {GPIOD, NULL, NULL, 4, 0, ADCx} , /* PD4 FSMC_NOE */ + {GPIOD, NULL, NULL, 5, 0, ADCx} , /* PD5 FSMC_NWE */ + {GPIOD, NULL, NULL, 6, 0, ADCx} , /* PD6 FSMC_NWAIT */ + {GPIOD, NULL, NULL, 7, 0, ADCx} , /* PD7 FSMC_NE1/FSMC_NCE2 */ + {GPIOD, NULL, NULL, 8, 0, ADCx} , /* PD8 FSMC_D13 */ + {GPIOD, NULL, NULL, 9, 0, ADCx} , /* PD9 FSMC_D14 */ + {GPIOD, NULL, NULL, 10, 0, ADCx} , /* PD10 FSMC_D15 */ + {GPIOD, NULL, NULL, 11, 0, ADCx} , /* PD11 FSMC_A16 */ + {GPIOD, NULL, NULL, 12, 0, ADCx} , /* PD12 FSMC_A17 */ + {GPIOD, NULL, NULL, 13, 0, ADCx} , /* PD13 FSMC_A18 */ + {GPIOD, NULL, NULL, 14, 0, ADCx} , /* PD14 FSMC_D0 */ + {GPIOD, NULL, NULL, 15, 0, ADCx} , /* PD15 FSMC_D1 */ + + {GPIOE, NULL, NULL, 0, 0, ADCx} , /* PE0 */ + {GPIOE, NULL, NULL, 1, 0, ADCx} , /* PE1 */ + {GPIOE, NULL, NULL, 2, 0, ADCx} , /* PE2 */ + {GPIOE, NULL, NULL, 3, 0, ADCx} , /* PE3 */ + {GPIOE, NULL, NULL, 4, 0, ADCx} , /* PE4 */ + {GPIOE, NULL, NULL, 5, 0, ADCx} , /* PE5 */ + {GPIOE, NULL, NULL, 6, 0, ADCx} , /* PE6 */ + {GPIOE, NULL, NULL, 7, 0, ADCx} , /* PE7 */ + {GPIOE, NULL, NULL, 8, 0, ADCx} , /* PE8 */ + {GPIOE, NULL, NULL, 9, 0, ADCx} , /* PE9 */ + {GPIOE, NULL, NULL, 10, 0, ADCx} , /* PE10 */ + {GPIOE, NULL, NULL, 11, 0, ADCx} , /* PE11 */ + {GPIOE, NULL, NULL, 12, 0, ADCx} , /* PE12 */ + {GPIOE, NULL, NULL, 13, 0, ADCx} , /* PE13 */ + {GPIOE, NULL, NULL, 14, 0, ADCx} , /* PE14 */ + {GPIOE, NULL, NULL, 15, 0, ADCx} , /* PE15 */ + + {GPIOF, NULL, NULL, 0, 0, ADCx} , /* PF0 */ + {GPIOF, NULL, NULL, 1, 0, ADCx} , /* PF1 */ + {GPIOF, NULL, NULL, 2, 0, ADCx} , /* PF2 */ + {GPIOF, NULL, NULL, 3, 0, ADCx} , /* PF3 */ + {GPIOF, NULL, NULL, 4, 0, ADCx} , /* PF4 */ + {GPIOF, NULL, NULL, 5, 0, ADCx} , /* PF5 */ + {GPIOF, NULL, NULL, 6, 0, ADCx} , /* PF6 */ + {GPIOF, NULL, NULL, 7, 0, ADCx} , /* PF7 */ + {GPIOF, NULL, NULL, 8, 0, ADCx} , /* PF8 */ + {GPIOF, NULL, NULL, 9, 0, ADCx} , /* PF9 */ + {GPIOF, NULL, NULL, 10, 0, ADCx} , /* PF10 */ + {GPIOF, NULL, NULL, 11, 0, ADCx} , /* PF11 */ + {GPIOF, NULL, NULL, 12, 0, ADCx} , /* PF12 */ + {GPIOF, NULL, NULL, 13, 0, ADCx} , /* PF13 */ + {GPIOF, NULL, NULL, 14, 0, ADCx} , /* PF14 */ + {GPIOF, NULL, NULL, 15, 0, ADCx} , /* PF15 */ + + {GPIOG, NULL, NULL, 0, 0, ADCx} , /* PG0 */ + {GPIOG, NULL, NULL, 1, 0, ADCx} , /* PG1 */ + {GPIOG, NULL, NULL, 2, 0, ADCx} , /* PG2 */ + {GPIOG, NULL, NULL, 3, 0, ADCx} , /* PG3 */ + {GPIOG, NULL, NULL, 4, 0, ADCx} , /* PG4 */ + {GPIOG, NULL, NULL, 5, 0, ADCx} , /* PG5 */ + {GPIOG, NULL, NULL, 6, 0, ADCx} , /* PG6 */ + {GPIOG, NULL, NULL, 7, 0, ADCx} , /* PG7 */ + {GPIOG, NULL, NULL, 8, 0, ADCx} , /* PG8 */ + {GPIOG, NULL, NULL, 9, 0, ADCx} , /* PG9 */ + {GPIOG, NULL, NULL, 10, 0, ADCx} , /* PG10 */ + {GPIOG, NULL, NULL, 11, 0, ADCx} , /* PG11 */ + {GPIOG, NULL, NULL, 12, 0, ADCx} , /* PG12 */ + {GPIOG, NULL, NULL, 13, 0, ADCx} , /* PG13 */ + {GPIOG, NULL, NULL, 14, 0, ADCx} , /* PG14 */ + {GPIOG, NULL, NULL, 15, 0, ADCx} /* PG15 */ +}; + +/* Basically everything that is defined as having a timer us PWM */ +extern const uint8 boardPWMPins[BOARD_NR_PWM_PINS] __FLASH__ = { + PA0,PA1,PA2,PA3,PA6,PA7,PA8,PA9,PA10,PB0,PB1,PB6,PB7,PB8,PB9,PC6,PC7,PC8,PC9 +}; + +/* Basically everything that is defined having ADC */ +extern const uint8 boardADCPins[BOARD_NR_ADC_PINS] __FLASH__ = { + PA0,PA1,PA2,PA3,PA4,PA5,PA6,PA7,PB0,PB1,PC0,PC1,PC2,PC3,PC4,PC5 +}; + +/* not sure what this us used for */ +extern const uint8 boardUsedPins[BOARD_NR_USED_PINS] __FLASH__ = { + BOARD_LED_PIN, BOARD_BUTTON_PIN, BOARD_JTMS_SWDIO_PIN, + BOARD_JTCK_SWCLK_PIN, BOARD_JTDI_PIN, BOARD_JTDO_PIN, BOARD_NJTRST_PIN +}; diff --git a/STM32F1/variants/generic_stm32f103zxx/board/board.h b/STM32F1/variants/generic_stm32f103zxx/board/board.h index 418b2ad..0f12171 100644 --- a/STM32F1/variants/generic_stm32f103zxx/board/board.h +++ b/STM32F1/variants/generic_stm32f103zxx/board/board.h @@ -1,113 +1,113 @@ -/****************************************************************************** - * The MIT License - * - * Copyright (c) 2011 LeafLabs, LLC. - * - * Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, copy, - * modify, merge, publish, distribute, sublicense, and/or sell copies - * of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS - * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN - * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - *****************************************************************************/ - -/** - * @file maple_RET6.h - * @author Marti Bolivar - * @brief Private include file for Maple RET6 Edition in boards.h - * - * See maple.h for more information on these definitions. - */ - -#ifndef _BOARDS_GENERIC_STM32F103Z_H_ -#define _BOARDS_GENERIC_STM32F103Z_H_ - -/* A few of these values will seem strange given that it's a - * high-density board. */ - -#define CYCLES_PER_MICROSECOND 72 -#define SYSTICK_RELOAD_VAL 71999 /* takes a cycle to reload */ - -#define BOARD_BUTTON_PIN 38 -#define BOARD_LED_PIN 13 - -/* Note: UART4 and UART5 have pins which aren't broken out :( */ -#define BOARD_NR_USARTS 3 -#define BOARD_USART1_TX_PIN PA9 -#define BOARD_USART1_RX_PIN PA10 -#define BOARD_USART2_TX_PIN PA2 -#define BOARD_USART2_RX_PIN PA1 -#define BOARD_USART3_TX_PIN PB10 -#define BOARD_USART3_RX_PIN PB11 - -/* Note: - * - * SPI3 is unusable due to pin 43 (PB4) and NRST tie-together :(, but - * leave the definitions so as not to clutter things up. This is only - * OK since RET6 Ed. is specifically advertised as a beta board. */ -#define BOARD_NR_SPI 3 -#define BOARD_SPI1_NSS_PIN PA4 -#define BOARD_SPI1_SCK_PIN PA5 -#define BOARD_SPI1_MISO_PIN PA6 -#define BOARD_SPI1_MOSI_PIN PA7 - - - -#define BOARD_SPI2_NSS_PIN PB12 -#define BOARD_SPI2_SCK_PIN PB13 -#define BOARD_SPI2_MISO_PIN PB14 -#define BOARD_SPI2_MOSI_PIN PB15 - - -#define BOARD_SPI3_NSS_PIN PA15 -#define BOARD_SPI3_SCK_PIN PB3 -#define BOARD_SPI3_MISO_PIN PB4 -#define BOARD_SPI3_MOSI_PIN PB5 - - -/* GPIO A to E = 5 * 16 - BOOT1 not used = 79*/ -#define BOARD_NR_GPIO_PINS 111 -/* Note: NOT 19. The missing one is D38 a.k.a. BOARD_BUTTON_PIN, which - * isn't broken out to a header and is thus unusable for PWM. */ -#define BOARD_NR_PWM_PINS 19 -#define BOARD_NR_ADC_PINS 16 -#define BOARD_NR_USED_PINS 7 - -#define BOARD_JTMS_SWDIO_PIN 39 -#define BOARD_JTCK_SWCLK_PIN 40 -#define BOARD_JTDI_PIN 41 -#define BOARD_JTDO_PIN 42 -#define BOARD_NJTRST_PIN 43 - -/* USB configuration. BOARD_USB_DISC_DEV is the GPIO port containing - * the USB_DISC pin, and BOARD_USB_DISC_BIT is that pin's bit. */ -#define BOARD_USB_DISC_DEV GPIOC -#define BOARD_USB_DISC_BIT 12 - -/* Pin aliases: these give the GPIO port/bit for each pin as an - * enum. These are optional, but recommended. They make it easier to - * write code using low-level GPIO functionality. */ -enum { -PA0,PA1,PA2,PA3,PA4,PA5,PA6,PA7,PA8,PA9,PA10,PA11,PA12,PA13,PA14,PA15, -PB0,PB1,PB3,PB4,PB5,PB6,PB7,PB8,PB9,PB10,PB11,PB12,PB13,PB14,PB15, -PC0,PC1,PC2,PC3,PC4,PC5,PC6,PC7,PC8,PC9,PC10,PC11,PC12,PC13,PC14,PC15, -PD0,PD1,PD2,PD3,PD4,PD5,PD6,PD7,PD8,PD9,PD10,PD11,PD12,PD13,PD14,PD15, -PE0,PE1,PE2,PE3,PE4,PE5,PE6,PE7,PE8,PE9,PE10,PE11,PE12,PE13,PE14,PE15, -PF0,PF1,PF2,PF3,PF4,PF5,PF6,PF7,PF8,PF9,PF10,PF11,PF12,PF13,PF14,PF15, -PG0,PG1,PG2,PG3,PG4,PG5,PG6,PG7,PG8,PG9,PG10,PG11,PG12,PG13,PG14,PG15 -};/* Note PB2 is skipped as this is Boot1 and is not going to be much use as its likely to be pulled permanently low */ - -#endif +/****************************************************************************** + * The MIT License + * + * Copyright (c) 2011 LeafLabs, LLC. + * + * Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, copy, + * modify, merge, publish, distribute, sublicense, and/or sell copies + * of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS + * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN + * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + *****************************************************************************/ + +/** + * @file maple_RET6.h + * @author Marti Bolivar + * @brief Private include file for Maple RET6 Edition in boards.h + * + * See maple.h for more information on these definitions. + */ + +#ifndef _BOARDS_GENERIC_STM32F103Z_H_ +#define _BOARDS_GENERIC_STM32F103Z_H_ + +/* A few of these values will seem strange given that it's a + * high-density board. */ + +#define CYCLES_PER_MICROSECOND 72 +#define SYSTICK_RELOAD_VAL 71999 /* takes a cycle to reload */ + +#define BOARD_BUTTON_PIN 38 +#define BOARD_LED_PIN 13 + +/* Note: UART4 and UART5 have pins which aren't broken out :( */ +#define BOARD_NR_USARTS 3 +#define BOARD_USART1_TX_PIN PA9 +#define BOARD_USART1_RX_PIN PA10 +#define BOARD_USART2_TX_PIN PA2 +#define BOARD_USART2_RX_PIN PA3 +#define BOARD_USART3_TX_PIN PB10 +#define BOARD_USART3_RX_PIN PB11 + +/* Note: + * + * SPI3 is unusable due to pin 43 (PB4) and NRST tie-together :(, but + * leave the definitions so as not to clutter things up. This is only + * OK since RET6 Ed. is specifically advertised as a beta board. */ +#define BOARD_NR_SPI 3 +#define BOARD_SPI1_NSS_PIN PA4 +#define BOARD_SPI1_SCK_PIN PA5 +#define BOARD_SPI1_MISO_PIN PA6 +#define BOARD_SPI1_MOSI_PIN PA7 + + + +#define BOARD_SPI2_NSS_PIN PB12 +#define BOARD_SPI2_SCK_PIN PB13 +#define BOARD_SPI2_MISO_PIN PB14 +#define BOARD_SPI2_MOSI_PIN PB15 + + +#define BOARD_SPI3_NSS_PIN PA15 +#define BOARD_SPI3_SCK_PIN PB3 +#define BOARD_SPI3_MISO_PIN PB4 +#define BOARD_SPI3_MOSI_PIN PB5 + + +/* GPIO A to E = 5 * 16 - BOOT1 not used = 79*/ +#define BOARD_NR_GPIO_PINS 112 +/* Note: NOT 19. The missing one is D38 a.k.a. BOARD_BUTTON_PIN, which + * isn't broken out to a header and is thus unusable for PWM. */ +#define BOARD_NR_PWM_PINS 19 +#define BOARD_NR_ADC_PINS 16 +#define BOARD_NR_USED_PINS 7 + +#define BOARD_JTMS_SWDIO_PIN 39 +#define BOARD_JTCK_SWCLK_PIN 40 +#define BOARD_JTDI_PIN 41 +#define BOARD_JTDO_PIN 42 +#define BOARD_NJTRST_PIN 43 + +/* USB configuration. BOARD_USB_DISC_DEV is the GPIO port containing + * the USB_DISC pin, and BOARD_USB_DISC_BIT is that pin's bit. */ +#define BOARD_USB_DISC_DEV GPIOC +#define BOARD_USB_DISC_BIT 12 + +/* Pin aliases: these give the GPIO port/bit for each pin as an + * enum. These are optional, but recommended. They make it easier to + * write code using low-level GPIO functionality. */ +enum { +PA0,PA1,PA2,PA3,PA4,PA5,PA6,PA7,PA8,PA9,PA10,PA11,PA12,PA13,PA14,PA15, +PB0,PB1,PB2,PB3,PB4,PB5,PB6,PB7,PB8,PB9,PB10,PB11,PB12,PB13,PB14,PB15, +PC0,PC1,PC2,PC3,PC4,PC5,PC6,PC7,PC8,PC9,PC10,PC11,PC12,PC13,PC14,PC15, +PD0,PD1,PD2,PD3,PD4,PD5,PD6,PD7,PD8,PD9,PD10,PD11,PD12,PD13,PD14,PD15, +PE0,PE1,PE2,PE3,PE4,PE5,PE6,PE7,PE8,PE9,PE10,PE11,PE12,PE13,PE14,PE15, +PF0,PF1,PF2,PF3,PF4,PF5,PF6,PF7,PF8,PF9,PF10,PF11,PF12,PF13,PF14,PF15, +PG0,PG1,PG2,PG3,PG4,PG5,PG6,PG7,PG8,PG9,PG10,PG11,PG12,PG13,PG14,PG15 +};/* Note PB2 is skipped as this is Boot1 and is not going to be much use as its likely to be pulled permanently low */ + +#endif