Commit Graph

5 Commits

Author SHA1 Message Date
victorpv ef2f5b53d7
Need to define STM32_HAVE_FSMC as 0
Forgot to include that.
2018-04-05 22:04:28 -05:00
victorpv 21bdc4ad13
Update to fix FSMC inclusion in Rx devices
The FSMC is only available in high density and XL density devices with more than 4 ports.
Basically excluded in the RC/D/E/F/G models, since they dont have enough pins.
Page 11 in the Datasheet references this. The table shows what is present, and shows the FSMC is NOT present in Rx MCUs:
http://www.st.com/content/ccc/resource/technical/document/datasheet/59/f6/fa/84/20/4e/4c/59/CD00191185.pdf/files/CD00191185.pdf/jcr:content/translations/en.CD00191185.pdf

Recent changes to other files highlight this issue during compilation time. The issue was already there, but GPIO E and GPIO F were declared and defined, while they don't actually exist in Rx MCUs, so FSMC was being included for those MCU even though they don't actually have an FSMC device, or at least no external ports to use it. 
With the recent changes GPIO E and F and correctly excluded from the build, but since FSMC was still included and needs GPIO E and F, it was failing to compile. I.e.:
C:/Users/Victor/Documents/Arduino/Hardware/Arduino_STM32/STM32F1/cores/maple/libmaple/fsmc_f1.c:51:19: error: 'GPIOE' undeclared (first use in this function)

Since the FSMC is not available (I suspect the silicon is there, but there is no IO pins to use it), the correct solution is to include FSMC only when using an MCU with more than 4 GPIO ports, which is what matches the datasheet.
2018-04-05 21:54:05 -05:00
Roger Clark 88d2457f30 STM32F1 core: Implemented changes already made to the GD32F1 core to use F_CPU instead of hard coded values for 72000000 and (F_CPU -1) instead of 71999999 and to replace other hard coded values related to the clock freqency. Also updated the code so that the USB clock was disabled in setup_clock_prescalers to allow it to be changed in that function during initialisation, in case altermative prescaler values for USB are required, e.g. for operation at 48Mhz 2015-09-06 07:51:40 +10:00
Roger Clark 61ef2bca74 Started work on new variants and fixed a few other minor issues 2015-03-04 08:27:47 +11:00
Roger Clark 5f83c13285 renamed top level folder STM32F1XX to STM32F1 to correspond to other top level folder names e.g. STM32F3 and STM32F4 2015-02-24 20:13:04 +11:00