250 lines
7.6 KiB
NASM
250 lines
7.6 KiB
NASM
/*;******************** (C) COPYRIGHT 2009 STMicroelectronics ********************
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;* File Name : cr4_fft_64_stm32.s
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;* Author : MCD Application Team
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;* Version : V2.0.0
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;* Date : 04/27/2009
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;* Description : Optimized 64-point radix-4 complex FFT for Cortex-M3
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;********************************************************************************
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;* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
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;* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
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;* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
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;* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
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;* CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
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;* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
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;*******************************************************************************/
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.cpu cortex-m3
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.fpu softvfp
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.syntax unified
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.thumb
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.text
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.global cr4_fft_64_stm32
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.extern TableFFT
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.equ NPT, 64
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/*;*******************************************************************************
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;* Function Name : cr4_fft_64_stm32
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;* Description : complex radix-4 64 points FFT
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;* Input : - R0 = pssOUT: Output array .
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;* - R1 = pssIN: Input array
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;* - R2 = Nbin: =64 number of points, this optimized FFT function
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;* can only convert 64 points.
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;* Output : None
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;* Return : None
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;********************************************************************************/
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.thumb_func
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cr4_fft_64_stm32:
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STMFD SP!, {R4-R11, LR}
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MOV r12, #0
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MOV r3, r0
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MOV r0,#0
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preloop_v7:
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ADD r14, r1, r12, LSR#26
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LDRSH r5, [r14, #2]
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LDRSH r4, [r14],#NPT
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LDRSH r9, [r14, #2]
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LDRSH r8, [r14],#NPT
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LDRSH r7, [r14, #2]
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LDRSH r6, [r14],#NPT
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LDRSH r11, [r14, #2]
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LDRSH r10, [r14],#NPT
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ADD r8, r8, r10
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ADD r9, r9, r11
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SUB r10, r8, r10, LSL#1
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SUB r11, r9, r11, LSL#1
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MOV r4, r4, ASR#2
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MOV r5, r5, ASR#2
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ADD r4, r4, r6, ASR#2
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ADD r5, r5, r7, ASR#2
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SUB r6, r4, r6, ASR#1
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SUB r7, r5, r7, ASR#1
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ADD r4, r4, r8, ASR#2
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ADD r5, r5, r9, ASR#2
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SUB r8, r4, r8, ASR#1
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SUB r9, r5, r9, ASR#1
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ADD r6, r6, r11, ASR#2
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SUB r7, r7, r10, ASR#2
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SUB r11, r6, r11, ASR#1
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ADD r10, r7, r10, ASR#1
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STRH r5, [r3, #2]
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STRH r4, [r3], #4
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STRH r7, [r3, #2]
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STRH r6, [r3], #4
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STRH r9, [r3, #2]
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STRH r8, [r3], #4
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STRH r10, [r3, #2]
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STRH r11, [r3], #4
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ADD r0, r0, #1
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RBIT r12, r0
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CMP r0,#16
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BNE preloop_v7
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SUB r1, r3, r2, LSL#2
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MOV r0, #16
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MOVS r2, r2, LSR#4
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/*;------------------------------------------------------------------------------
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; The FFT coefficients table can be stored into Flash or RAM.
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; The following two lines of code allow selecting the method for coefficients
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; storage.
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; In the case of choosing coefficients in RAM, you have to:
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; 1. Include the file table_fft.h, which is a part of the DSP library,
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; in your main file.
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; 2. Decomment the line LDR.W pssK, =TableFFT and comment the line
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; ADRL pssK, TableFFT_V7
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; 3. Comment all the TableFFT_V7 data.
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;------------------------------------------------------------------------------*/
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ADR r3, TableFFT_V7
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/*LDR.W r3, =TableFFT*/
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passloop_v7:
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STMFD SP!, {r1,r2}
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ADD r12, r0, r0, LSL#1
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ADD r1, r1, r12
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SUB r2, r2, #1<<16
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grouploop_v7:
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ADD r2,r2,r0,LSL#(16-2)
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butterloop_v7:
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LDRSH r5, [r1, #2]
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LDRSH r4, [r1]
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SUB r1, r1, r0
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LDRSH r11, [r3, #2]
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LDRSH r10, [r3]
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ADD r3, r3, #4
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SUB r14, r5, r4
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MUL r12, r14, r11
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ADD r14, r10, r11, LSL#1
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MLA r11, r5, r10, r12
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MLA r10, r4, r14, r12
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LDRSH r5, [r1, #2]
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LDRSH r4, [r1]
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SUB r1, r1, r0
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LDRSH r9, [r3, #2]
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LDRSH r8, [r3]
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ADD r3, r3, #4
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SUB r14, r5, r4
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MUL r12, r14, r9
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ADD r14, r8, r9, LSL#1
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MLA r9, r5, r8, r12
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MLA r8, r4, r14, r12
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LDRSH r5, [r1, #2]
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LDRSH r4, [r1]
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SUB r1, r1, r0
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LDRSH r7, [r3, #2]
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LDRSH r6, [r3]
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ADD r3, r3, #4
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SUB r14, r5, r4
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MUL r12, r14, r7
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ADD r14, r6, r7, LSL#1
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MLA r7, r5, r6, r12
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MLA r6, r4, r14, r12
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LDRSH r5, [r1, #2]
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LDRSH r4, [r1]
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ADD r8, r8, r10
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ADD r9, r9, r11
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SUB r10, r8, r10, LSL#1
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SUB r11, r9, r11, LSL#1
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MOV r4, r4, ASR#2
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MOV r5, r5, ASR#2
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ADD r4, r4, r6, ASR#(2+14)
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ADD r5, r5, r7, ASR#(2+14)
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SUB r6, r4, r6, ASR#(1+14)
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SUB r7, r5, r7, ASR#(1+14)
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ADD r4, r4, r8, ASR#(2+14)
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ADD r5, r5, r9, ASR#(2+14)
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SUB r8, r4, r8, ASR#(1+14)
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SUB r9, r5, r9, ASR#(1+14)
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ADD r6, r6, r11, ASR#(2+14)
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SUB r7, r7, r10, ASR#(2+14)
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SUB r11, r6, r11, ASR#(1+14)
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ADD r10, r7, r10, ASR#(1+14)
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STRH r5, [r1, #2]
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STRH r4, [r1]
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ADD r1, r1, r0
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STRH r7, [r1, #2]
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STRH r6, [r1]
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ADD r1, r1, r0
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STRH r9, [r1, #2]
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STRH r8, [r1]
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ADD r1, r1, r0
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STRH r10, [r1, #2]
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STRH r11, [r1], #4
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SUBS r2,r2, #1<<16
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BGE butterloop_v7
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ADD r12, r0, r0, LSL#1
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ADD r1, r1, r12
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SUB r2, r2, #1
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MOVS r14, r2, LSL#16
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IT ne
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SUBNE r3, r3, r12
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BNE grouploop_v7
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LDMFD sp!, {r1, r2}
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MOV r0,r0,LSL#2
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MOVS r2, r2, LSR#2
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BNE passloop_v7
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LDMFD SP!, {R4-R11, PC}
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TableFFT_V7:
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.short 0x4000,0x0000, 0x4000,0x0000, 0x4000,0x0000
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.short 0xdd5d,0x3b21, 0x22a3,0x187e, 0x0000,0x2d41
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.short 0xa57e,0x2d41, 0x0000,0x2d41, 0xc000,0x4000
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.short 0xdd5d,0xe782, 0xdd5d,0x3b21, 0xa57e,0x2d41
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.short 0x4000,0x0000, 0x4000,0x0000, 0x4000,0x0000
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.short 0x2aaa,0x1294, 0x396b,0x0646, 0x3249,0x0c7c
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.short 0x11a8,0x238e, 0x3249,0x0c7c, 0x22a3,0x187e
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.short 0xf721,0x3179, 0x2aaa,0x1294, 0x11a8,0x238e
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.short 0xdd5d,0x3b21, 0x22a3,0x187e, 0x0000,0x2d41
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.short 0xc695,0x3fb1, 0x1a46,0x1e2b, 0xee58,0x3537
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.short 0xb4be,0x3ec5, 0x11a8,0x238e, 0xdd5d,0x3b21
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.short 0xa963,0x3871, 0x08df,0x289a, 0xcdb7,0x3ec5
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.short 0xa57e,0x2d41, 0x0000,0x2d41, 0xc000,0x4000
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.short 0xa963,0x1e2b, 0xf721,0x3179, 0xb4be,0x3ec5
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.short 0xb4be,0x0c7c, 0xee58,0x3537, 0xac61,0x3b21
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.short 0xc695,0xf9ba, 0xe5ba,0x3871, 0xa73b,0x3537
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.short 0xdd5d,0xe782, 0xdd5d,0x3b21, 0xa57e,0x2d41
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.short 0xf721,0xd766, 0xd556,0x3d3f, 0xa73b,0x238e
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.short 0x11a8,0xcac9, 0xcdb7,0x3ec5, 0xac61,0x187e
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.short 0x2aaa,0xc2c1, 0xc695,0x3fb1, 0xb4be,0x0c7c
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.end
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/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/
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