183 lines
5.3 KiB
C
183 lines
5.3 KiB
C
/******************************************************************************
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* The MIT License
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*
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* Copyright (c) 2010 Perry Hung.
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*
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* Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use, copy,
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* modify, merge, publish, distribute, sublicense, and/or sell copies
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* of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*****************************************************************************/
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/**
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* @file libmaple/include/libmaple/rcc.h
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* @brief Reset and Clock Control (RCC) interface.
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*/
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#ifndef _LIBMAPLE_RCC_H_
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#define _LIBMAPLE_RCC_H_
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#ifdef __cplusplus
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extern "C"{
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#endif
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#include <libmaple/libmaple_types.h>
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/* Put the SYSCLK sources before the series header is included, as it
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* might need them. */
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/**
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* @brief SYSCLK sources
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* @see rcc_switch_sysclk()
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*/
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typedef enum rcc_sysclk_src {
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RCC_CLKSRC_HSI = 0x0,
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RCC_CLKSRC_HSE = 0x1,
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RCC_CLKSRC_PLL = 0x2,
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} rcc_sysclk_src;
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/* Roger clark. Replaced with line below #include <series/rcc.h>*/
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#include "stm32f1/include/series/rcc.h"
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/* Note: Beyond the usual (registers, etc.), it's up to the series
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* header to define the following types:
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*
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* - enum rcc_clk: Available system and secondary clock sources,
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* e.g. RCC_CLK_HSE, RCC_CLK_PLL, RCC_CLK_LSE.
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*
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* Note that the inclusion of secondary clock sources (like LSI and
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* LSE) makes enum rcc_clk different from the SYSCLK sources, which
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* are defined in this header as enum rcc_sysclk_src.
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*
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* IMPORTANT NOTE TO IMPLEMENTORS: If you are adding support for a
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* new STM32 series, see the comment near rcc_clk_reg() in
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* libmaple/rcc.c for information on how to choose these values so
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* that rcc_turn_on_clk() etc. will work on your series.
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*
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* - enum rcc_clk_id: For each available peripheral. These are widely used
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* as unique IDs (TODO extricate from RCC?). Peripherals which are
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* common across STM32 series should use the same token for their
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* rcc_clk_id in each series header.
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*
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* - enum rcc_clk_domain: For each clock domain. This is returned by
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* rcc_dev_clk(). For instance, each AHB and APB is a clock domain.
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*
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* - enum rcc_prescaler: And a suitable set of dividers for
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* rcc_set_prescaler().
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*
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* - enum rcc_pllsrc: For each PLL source. Same source, same token.
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*
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* - A target-dependent type to be pointed to by the data field in a
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* struct rcc_pll_cfg.
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*/
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#ifdef __DOXYGEN__
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/** RCC register map base pointer */
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#define RCC_BASE
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#endif
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/* Clock prescaler management. */
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/**
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* @brief Set the divider on a peripheral prescaler
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* @param prescaler prescaler to set
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* @param divider prescaler divider
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*/
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extern void rcc_set_prescaler(rcc_prescaler prescaler, uint32 divider);
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/* SYSCLK. */
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void rcc_switch_sysclk(rcc_sysclk_src sysclk_src);
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/* PLL configuration */
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/**
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* @brief Specifies a configuration for the main PLL.
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*/
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typedef struct rcc_pll_cfg {
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rcc_pllsrc pllsrc; /**< PLL source */
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/** Series-specific configuration data. */
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void *data;
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} rcc_pll_cfg;
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/**
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* @brief Configure the main PLL.
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*
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* You may only call this function while the PLL is disabled.
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*
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* @param pll_cfg Desired PLL configuration. The contents of this
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* struct depend entirely on the target.
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*/
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extern void rcc_configure_pll(rcc_pll_cfg *pll_cfg);
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/* System and secondary clock sources. */
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void rcc_turn_on_clk(rcc_clk clock);
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void rcc_turn_off_clk(rcc_clk clock);
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int rcc_is_clk_on(rcc_clk clock);
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int rcc_is_clk_ready(rcc_clk clock);
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/* Peripheral clock lines and clock domains. */
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/**
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* @brief Turn on the clock line on a peripheral
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* @param id Clock ID of the peripheral to turn on.
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*/
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extern void rcc_clk_enable(rcc_clk_id id);
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/**
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* @brief Reset a peripheral.
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*
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* Caution: not all rcc_clk_id values refer to a peripheral which can
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* be reset. (Only rcc_clk_ids for peripherals with bits in an RCC
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* reset register can be used here.)
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*
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* @param id Clock ID of the peripheral to reset.
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*/
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extern void rcc_reset_dev(rcc_clk_id id);
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rcc_clk_domain rcc_dev_clk(rcc_clk_id id);
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/* Clock security system */
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/**
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* @brief Enable the clock security system (CSS).
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*/
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static inline void rcc_enable_css() {
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RCC_BASE->CR |= RCC_CR_CSSON;
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}
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/**
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* @brief Disable the clock security system (CSS).
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*/
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static inline void rcc_disable_css() {
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RCC_BASE->CR &= ~RCC_CR_CSSON;
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}
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/**
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* @brief Turn off the clock line on a peripheral
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* @param id Clock ID of the peripheral to turn on.
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*/
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extern void rcc_clk_disable(rcc_clk_id id);
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#ifdef __cplusplus
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} // extern "C"
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#endif
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#endif
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