167 lines
6.0 KiB
C
167 lines
6.0 KiB
C
/******************************************************************************
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* The MIT License
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*
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* Copyright (c) 2010 LeafLabs, LLC.
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*
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* Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use, copy,
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* modify, merge, publish, distribute, sublicense, and/or sell copies
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* of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*****************************************************************************/
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/**
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* @file bkp.h
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* @brief Backup register support.
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*/
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#ifndef _BKP_H_
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#define _BKP_H_
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#include "libmaple.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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#if defined(STM32_MEDIUM_DENSITY)
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#define BKP_NR_DATA_REGS 10
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#elif defined(STM32_HIGH_DENSITY)
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#define BKP_NR_DATA_REGS 42
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#endif
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/** Backup peripheral register map type. */
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typedef struct bkp_reg_map {
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const uint32 RESERVED1; ///< Reserved
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__IO uint32 DR1; ///< Data register 1
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__IO uint32 DR2; ///< Data register 2
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__IO uint32 DR3; ///< Data register 3
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__IO uint32 DR4; ///< Data register 4
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__IO uint32 DR5; ///< Data register 5
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__IO uint32 DR6; ///< Data register 6
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__IO uint32 DR7; ///< Data register 7
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__IO uint32 DR8; ///< Data register 8
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__IO uint32 DR9; ///< Data register 9
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__IO uint32 DR10; ///< Data register 10
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__IO uint32 RTCCR; ///< RTC control register
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__IO uint32 CR; ///< Control register
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__IO uint32 CSR; ///< Control and status register
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#ifdef STM32_HIGH_DENSITY
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const uint32 RESERVED2; ///< Reserved
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const uint32 RESERVED3; ///< Reserved
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__IO uint32 DR11; ///< Data register 11
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__IO uint32 DR12; ///< Data register 12
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__IO uint32 DR13; ///< Data register 13
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__IO uint32 DR14; ///< Data register 14
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__IO uint32 DR15; ///< Data register 15
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__IO uint32 DR16; ///< Data register 16
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__IO uint32 DR17; ///< Data register 17
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__IO uint32 DR18; ///< Data register 18
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__IO uint32 DR19; ///< Data register 19
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__IO uint32 DR20; ///< Data register 20
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__IO uint32 DR21; ///< Data register 21
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__IO uint32 DR22; ///< Data register 22
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__IO uint32 DR23; ///< Data register 23
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__IO uint32 DR24; ///< Data register 24
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__IO uint32 DR25; ///< Data register 25
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__IO uint32 DR26; ///< Data register 26
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__IO uint32 DR27; ///< Data register 27
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__IO uint32 DR28; ///< Data register 28
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__IO uint32 DR29; ///< Data register 29
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__IO uint32 DR30; ///< Data register 30
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__IO uint32 DR31; ///< Data register 31
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__IO uint32 DR32; ///< Data register 32
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__IO uint32 DR33; ///< Data register 33
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__IO uint32 DR34; ///< Data register 34
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__IO uint32 DR35; ///< Data register 35
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__IO uint32 DR36; ///< Data register 36
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__IO uint32 DR37; ///< Data register 37
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__IO uint32 DR38; ///< Data register 38
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__IO uint32 DR39; ///< Data register 39
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__IO uint32 DR40; ///< Data register 40
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__IO uint32 DR41; ///< Data register 41
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__IO uint32 DR42; ///< Data register 42
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#endif
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} bkp_reg_map;
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/** Backup peripheral register map base pointer. */
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#define BKP_BASE ((struct bkp_reg_map*)0x40024000)
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/** Backup peripheral device type. */
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typedef struct bkp_dev {
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bkp_reg_map *regs; /**< Register map */
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} bkp_dev;
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extern const bkp_dev *BKP;
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/*
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* Register bit definitions
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*/
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/* Data Registers */
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#define BKP_DR_D 0xFFFF
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/* RTC Clock Calibration Register */
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#define BKP_RTCCR_ASOS_BIT 9
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#define BKP_RTCCR_ASOE_BIT 8
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#define BKP_RTCCR_CCO_BIT 7
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#define BKP_RTCCR_ASOS BIT(BKP_RTCCR_ASOS_BIT)
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#define BKP_RTCCR_ASOE BIT(BKP_RTCCR_ASOE_BIT)
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#define BKP_RTCCR_CCO BIT(BKP_RTCCR_CCO_BIT)
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#define BKP_RTCCR_CAL 0x7F
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/* Backup control register */
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#define BKP_CR_TPAL_BIT 1
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#define BKP_CR_TPE_BIT 0
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#define BKP_CR_TPAL BIT(BKP_CR_TPAL_BIT)
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#define BKP_CR_TPE BIT(BKP_CR_TPE_BIT)
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/* Backup control/status register */
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#define BKP_CSR_TIF_BIT 9
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#define BKP_CSR_TEF_BIT 8
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#define BKP_CSR_TPIE_BIT 2
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#define BKP_CSR_CTI_BIT 1
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#define BKP_CSR_CTE_BIT 0
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#define BKP_CSR_TIF BIT(BKP_CSR_TIF_BIT)
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#define BKP_CSR_TEF BIT(BKP_CSR_TEF_BIT)
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#define BKP_CSR_TPIE BIT(BKP_CSR_TPIE_BIT)
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#define BKP_CSR_CTI BIT(BKP_CSR_CTI_BIT)
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#define BKP_CSR_CTE BIT(BKP_CSR_CTE_BIT)
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/*
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* Convenience functions
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*/
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void bkp_init(void);
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void bkp_enable_writes(void);
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void bkp_disable_writes(void);
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uint16 bkp_read(uint8 reg);
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void bkp_write(uint8 reg, uint16 val);
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#ifdef __cplusplus
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} /* extern "C" */
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#endif
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#endif
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