130 lines
4.1 KiB
C
130 lines
4.1 KiB
C
/******************************************************************************
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* The MIT License
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*
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* Copyright (c) 2012 LeafLabs, LLC.
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*
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* Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use, copy,
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* modify, merge, publish, distribute, sublicense, and/or sell copies
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* of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*****************************************************************************/
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/**
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* @file libmaple/stm32f1/i2c.c
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* @brief STM32F1 I2C support
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*/
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#include "i2c_private.h"
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#include <libmaple/i2c.h>
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/*
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* Devices
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*/
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static i2c_dev i2c1 = I2C_DEV_OLD(1, &gpiob, 7, 6);
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static i2c_dev i2c2 = I2C_DEV_OLD(2, &gpiob, 11, 10);
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/** STM32F1 I2C device 1 */
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i2c_dev* const I2C1 = &i2c1;
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/** STM32F1 I2C device 2 */
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i2c_dev* const I2C2 = &i2c2;
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/*
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* Routines
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*/
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static int i2c1_wants_remap(const i2c_dev *dev) {
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/* Check if we've got I2C1 configured for SDA/SCL remap on PB9/PB8 */
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return (dev->clk_id == RCC_I2C1) &&
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(scl_port(dev)->clk_id == RCC_GPIOB) &&
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(sda_port(dev)->clk_id == RCC_GPIOB) &&
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(dev->sda_pin == 9) &&
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(dev->scl_pin == 8);
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}
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void i2c_config_gpios(const i2c_dev *dev) {
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if (i2c1_wants_remap(dev)) {
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afio_remap(AFIO_REMAP_I2C1);
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}
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gpio_set_mode(sda_port(dev), dev->sda_pin, GPIO_AF_OUTPUT_OD);
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gpio_set_mode(scl_port(dev), dev->scl_pin, GPIO_AF_OUTPUT_OD);
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}
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void i2c_master_release_bus(const i2c_dev *dev) {
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gpio_write_bit(scl_port(dev), dev->scl_pin, 1);
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gpio_write_bit(sda_port(dev), dev->sda_pin, 1);
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gpio_set_mode(scl_port(dev), dev->scl_pin, GPIO_OUTPUT_OD);
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gpio_set_mode(sda_port(dev), dev->sda_pin, GPIO_OUTPUT_OD);
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}
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/*
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* IRQ handlers
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*/
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__weak void __irq_i2c1_ev(void) {
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_i2c_irq_handler(I2C1);
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}
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__weak void __irq_i2c2_ev(void) {
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_i2c_irq_handler(I2C2);
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}
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__weak void __irq_i2c1_er(void) {
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_i2c_irq_error_handler(I2C1);
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}
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__weak void __irq_i2c2_er(void) {
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_i2c_irq_error_handler(I2C2);
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}
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/*
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* Internal APIs
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*/
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void _i2c_irq_priority_fixup(i2c_dev *dev) {
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/*
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* Important STM32 Errata:
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*
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* See STM32F10xx8 and STM32F10xxB Errata sheet (Doc ID 14574 Rev 8),
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* Section 2.11.1, 2.11.2.
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*
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* 2.11.1:
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* When the EV7, EV7_1, EV6_1, EV6_3, EV2, EV8, and EV3 events are not
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* managed before the current byte is being transferred, problems may be
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* encountered such as receiving an extra byte, reading the same data twice
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* or missing data.
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*
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* 2.11.2:
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* In Master Receiver mode, when closing the communication using
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* method 2, the content of the last read data can be corrupted.
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*
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* If the user software is not able to read the data N-1 before the STOP
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* condition is generated on the bus, the content of the shift register
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* (data N) will be corrupted. (data N is shifted 1-bit to the left).
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*
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* ----------------------------------------------------------------------
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*
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* In order to ensure that events are not missed, the i2c interrupt must
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* not be preempted. We set the i2c interrupt priority to be the highest
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* interrupt in the system (priority level 0). All other interrupts have
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* been initialized to priority level 16. See nvic_init().
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*/
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nvic_irq_set_priority(dev->ev_nvic_line, 0);
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nvic_irq_set_priority(dev->er_nvic_line, 0);
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}
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