220 lines
6.7 KiB
C++
220 lines
6.7 KiB
C++
/******************************************************************************
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*****************************************************************************/
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/**
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* @file libmaple/sdio.c
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* @author stevstrong
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* @brief Secure digital input/output interface.
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*/
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#include <libmaple/sdio.h>
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#include <libmaple/gpio.h>
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#include <boards.h>
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#include "wirish.h"
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//#include <libmaple/libmaple.h>
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//#include <libmaple/rcc.h>
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//#include <series/gpio.h>
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//#include "wirish.h"
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//#include "boards.h"
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//
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#if defined(STM32_HIGH_DENSITY) || defined(STM32_XL_DENSITY)
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sdio_dev * SDIO = SDIO_BASE;
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#define DELAY_LONG 20
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#define DELAY_SHORT 2
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uint8_t dly = DELAY_LONG; // microseconds delay after accessing registers
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/*
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* SDIO convenience routines
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*/
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void sdio_gpios_init(void)
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{
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gpio_set_mode(PIN_MAP[BOARD_SDIO_D0].gpio_device, PIN_MAP[BOARD_SDIO_D0].gpio_bit, GPIO_AF_OUTPUT_PP);
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/* gpio_set_mode(PIN_MAP[BOARD_SDIO_D1].gpio_device, PIN_MAP[BOARD_SDIO_D1].gpio_bit, GPIO_AF_OUTPUT_PP);
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gpio_set_mode(PIN_MAP[BOARD_SDIO_D2].gpio_device, PIN_MAP[BOARD_SDIO_D2].gpio_bit, GPIO_AF_OUTPUT_PP);
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gpio_set_mode(PIN_MAP[BOARD_SDIO_D3].gpio_device, PIN_MAP[BOARD_SDIO_D3].gpio_bit, GPIO_AF_OUTPUT_PP);
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*/
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gpio_set_mode(PIN_MAP[BOARD_SDIO_D1].gpio_device, PIN_MAP[BOARD_SDIO_D1].gpio_bit, GPIO_INPUT_PU);
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gpio_set_mode(PIN_MAP[BOARD_SDIO_D2].gpio_device, PIN_MAP[BOARD_SDIO_D2].gpio_bit, GPIO_INPUT_PU);
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gpio_set_mode(PIN_MAP[BOARD_SDIO_D3].gpio_device, PIN_MAP[BOARD_SDIO_D3].gpio_bit, GPIO_INPUT_PU);
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gpio_set_mode(PIN_MAP[BOARD_SDIO_CLK].gpio_device, PIN_MAP[BOARD_SDIO_CLK].gpio_bit, GPIO_AF_OUTPUT_PP);
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gpio_set_mode(PIN_MAP[BOARD_SDIO_CMD].gpio_device, PIN_MAP[BOARD_SDIO_CMD].gpio_bit, GPIO_AF_OUTPUT_PP);
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/*
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* Todo just remove it, not needed for F1.
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*/
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/*
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gpio_set_af_mode(BOARD_SDIO_D0, 12);
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gpio_set_af_mode(BOARD_SDIO_D1, 12);
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gpio_set_af_mode(BOARD_SDIO_D2, 12);
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gpio_set_af_mode(BOARD_SDIO_D3, 12);
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gpio_set_af_mode(BOARD_SDIO_CLK, 12);
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gpio_set_af_mode(BOARD_SDIO_CMD, 12);
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*/
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}
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void sdio_gpios_deinit(void)
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{
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gpio_set_mode(PIN_MAP[BOARD_SDIO_D0].gpio_device, PIN_MAP[BOARD_SDIO_D0].gpio_bit, GPIO_INPUT_PU);
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gpio_set_mode(PIN_MAP[BOARD_SDIO_D1].gpio_device, PIN_MAP[BOARD_SDIO_D1].gpio_bit, GPIO_INPUT_PU);
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gpio_set_mode(PIN_MAP[BOARD_SDIO_D2].gpio_device, PIN_MAP[BOARD_SDIO_D2].gpio_bit, GPIO_INPUT_PU);
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gpio_set_mode(PIN_MAP[BOARD_SDIO_D3].gpio_device, PIN_MAP[BOARD_SDIO_D3].gpio_bit, GPIO_INPUT_PU);
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gpio_set_mode(PIN_MAP[BOARD_SDIO_CLK].gpio_device, PIN_MAP[BOARD_SDIO_CLK].gpio_bit, GPIO_INPUT_PU);
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gpio_set_mode(PIN_MAP[BOARD_SDIO_CMD].gpio_device, PIN_MAP[BOARD_SDIO_CMD].gpio_bit, GPIO_INPUT_PU);
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/*
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* Todo just remove it, not needed for F1.
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*/
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/*
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gpio_set_af_mode(BOARD_SDIO_D0, 0);
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gpio_set_af_mode(BOARD_SDIO_D1, 0);
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gpio_set_af_mode(BOARD_SDIO_D2, 0);
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gpio_set_af_mode(BOARD_SDIO_D3, 0);
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gpio_set_af_mode(BOARD_SDIO_CLK, 0);
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gpio_set_af_mode(BOARD_SDIO_CMD, 0);
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*/
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}
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/**
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* @brief Initialize and reset the SDIO device.
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*/
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void sdio_init(void)
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{
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rcc_clk_enable(RCC_SDIO);
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rcc_reset_dev(RCC_SDIO);
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}
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void sdio_power_on(void)
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{
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SDIO->POWER = SDIO_POWER_PWRCTRL_ON;
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// After a data write, data cannot be written to this register for three SDIOCLK clock periods
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// plus two PCLK2 clock periods.
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delay_us(DELAY_LONG);
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}
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void sdio_power_off(void)
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{
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SDIO->POWER = SDIO_POWER_PWRCTRL_OFF;
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// After a data write, data cannot be written to this register for three SDIOCLK clock periods
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// plus two PCLK2 clock periods.
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delay_us(DELAY_LONG);
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}
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void sdio_set_clock(uint32_t clk)
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{
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/*
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* limit the SDIO master clock to 8/3 of PCLK2.See RM 22.3
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* Also limited to no more than 48Mhz
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*/
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clk = min(clk,(SDIOCLK/3)*8);
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clk = min(clk,36000000);
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if (clk<1000000) dly = DELAY_LONG;
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else dly = DELAY_SHORT;
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/*
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* round up divider, so we don't run the card over the speed supported.
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*/
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uint32 div = SDIOCLK/clk + (SDIOCLK % clk != 0) - 2;
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sdio_disable();
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//Serial.println(div,DEC);
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SDIO->CLKCR = (SDIO->CLKCR & (~(SDIO_CLKCR_CLKDIV|SDIO_CLKCR_BYPASS))) | SDIO_CLKCR_PWRSAV | SDIO_CLKCR_HWFC_EN | SDIO_CLKCR_CLKEN | (div & SDIO_CLKCR_CLKDIV);
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delay_us(dly);
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}
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void sdio_set_dbus_width(uint16_t bus_w)
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{
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SDIO->CLKCR = (SDIO->CLKCR & (~SDIO_CLKCR_WIDBUS)) | bus_w;
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gpio_set_mode(PIN_MAP[BOARD_SDIO_D1].gpio_device, PIN_MAP[BOARD_SDIO_D1].gpio_bit, GPIO_AF_OUTPUT_PP);
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gpio_set_mode(PIN_MAP[BOARD_SDIO_D2].gpio_device, PIN_MAP[BOARD_SDIO_D2].gpio_bit, GPIO_AF_OUTPUT_PP);
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gpio_set_mode(PIN_MAP[BOARD_SDIO_D3].gpio_device, PIN_MAP[BOARD_SDIO_D3].gpio_bit, GPIO_AF_OUTPUT_PP);
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delay_us(dly);
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}
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void sdio_set_dblock_size(uint8_t dbsize)
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{
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SDIO->DCTRL = (SDIO->DCTRL&(~SDIO_DCTRL_DBLOCKSIZE)) | ((dbsize&0xF)<<4);
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delay_us(dly);
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}
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void sdio_enable(void)
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{
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SDIO->CLKCR |= SDIO_CLKCR_CLKEN;
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delay_us(dly);
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}
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void sdio_disable(void)
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{
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SDIO->CLKCR ^= SDIO_CLKCR_CLKEN;
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delay_us(dly);
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}
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/**
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* @brief Configure and enable the SDIO device.
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*/
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void sdio_begin(void)
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{
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sdio_init();
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sdio_power_on();
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sdio_gpios_init();
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// Set initial SCK rate.
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sdio_set_clock(400000);
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delay_us(200); // generate 80 pulses at 400kHz
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}
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/**
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* @brief Disables the SDIO device.
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*/
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void sdio_end(void)
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{
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while ( sdio_cmd_xfer_ongoing() );
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sdio_disable();
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sdio_gpios_deinit();
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sdio_power_off();
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rcc_clk_disable(RCC_SDIO);
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}
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/**
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* @brief Send command by the SDIO device.
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*/
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uint8_t sdio_cmd_send(uint16_t cmd_index_resp_type, uint32_t arg)
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{
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uint8_t retries = 10; // in case of errors
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do { // retry command if errors detected
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// clear interrupt flags - IMPORTANT!!!
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SDIO->ICR = SDIO_ICR_CMD_FLAGS;
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// write command
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SDIO->ARG = arg;
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SDIO->CMD = (uint32_t)(SDIO_CMD_CPSMEN | cmd_index_resp_type );
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while ( (SDIO->STA&SDIO_STA_CMDACT) ) ; // wait for actual command transfer to finish
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// wait for response, if the case
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if ( cmd_index_resp_type&(SDIO_CMD_WAIT_SHORT_RESP|SDIO_CMD_WAIT_LONG_RESP) ) {
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while ( !(SDIO->STA&(SDIO_STA_CMDREND|SDIO_STA_CMD_ERROR_FLAGS)) ) ;
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} else break; // no response required
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if ( SDIO->STA&(SDIO_STA_CMDREND|SDIO_STA_CTIMEOUT) )
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break; // response received or timeout
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// ignore CRC error for CMD5 and ACMD41
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if ( ((cmd_index_resp_type&SDIO_CMD_CMDINDEX)==5) || ((cmd_index_resp_type&SDIO_CMD_CMDINDEX)==41) )
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break;
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} while ( (--retries) );
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return (uint8_t)retries;
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}
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#endif // defined(STM32_HIGH_DENSITY) || defined(STM32_XL_DENSITY)
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