431 lines
11 KiB
C++
431 lines
11 KiB
C++
/******************************************************************************
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* The MIT License
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*
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* Copyright (c) 2010 Perry Hung.
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*
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* Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use, copy,
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* modify, merge, publish, distribute, sublicense, and/or sell copies
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* of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*****************************************************************************/
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/**
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* @author Marti Bolivar <mbolivar@leaflabs.com>
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* @brief Wirish SPI implementation.
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*/
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#include "HardwareSPI.h"
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#include "timer.h"
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#include "util.h"
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#include "rcc.h"
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#include "wirish.h"
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#include "boards.h"
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struct spi_pins {
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uint8 nss;
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uint8 sck;
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uint8 miso;
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uint8 mosi;
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};
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static const spi_pins* dev_to_spi_pins(spi_dev *dev);
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static void enable_device(spi_dev *dev,
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bool as_master,
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SPIFrequency frequency,
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spi_cfg_flag endianness,
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spi_mode mode);
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static const spi_pins board_spi_pins[] __FLASH__ = {
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{BOARD_SPI1_NSS_PIN,
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BOARD_SPI1_SCK_PIN,
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BOARD_SPI1_MISO_PIN,
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BOARD_SPI1_MOSI_PIN},
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#ifdef BOARD_SPI2_NSS_PIN
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{BOARD_SPI2_NSS_PIN,
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BOARD_SPI2_SCK_PIN,
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BOARD_SPI2_MISO_PIN,
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BOARD_SPI2_MOSI_PIN},
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#endif
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#ifdef STM32_HIGH_DENSITY
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{BOARD_SPI3B_NSS_PIN,
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BOARD_SPI3B_SCK_PIN,
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BOARD_SPI3B_MISO_PIN,
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BOARD_SPI3B_MOSI_PIN},
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#endif
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#ifdef STM32F4
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{BOARD_SPI3B_NSS_PIN,
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BOARD_SPI3B_SCK_PIN,
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BOARD_SPI3B_MISO_PIN,
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BOARD_SPI3B_MOSI_PIN},
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#endif
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};
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/*
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* Constructor
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*/
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HardwareSPI::HardwareSPI(uint32 spi_num) {
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switch (spi_num) {
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case 1:
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this->spi_d = SPI1;
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break;
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case 2:
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this->spi_d = SPI2;
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break;
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#ifdef STM32_HIGH_DENSITY
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case 3:
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this->spi_d = SPI3;
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break;
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#endif
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#ifdef STM32F4
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// case 4:
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// this->spi_d = SPI4;
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// break;
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#endif
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default:
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ASSERT(0);
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}
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}
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/*
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* Set up/tear down
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*/
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void HardwareSPI::begin(SPIFrequency frequency, uint32 bitOrder, uint32 mode) {
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if (mode >= 4) {
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ASSERT(0);
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return;
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}
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spi_cfg_flag end = bitOrder == MSBFIRST ? SPI_FRAME_MSB : SPI_FRAME_LSB;
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spi_mode m = (spi_mode)mode;
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enable_device(this->spi_d, true, frequency, end, m);
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}
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void HardwareSPI::begin(void) {
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this->begin(SPI_1_125MHZ, MSBFIRST, 0);
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}
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void HardwareSPI::beginSlave(uint32 bitOrder, uint32 mode) {
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if (mode >= 4) {
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ASSERT(0);
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return;
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}
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spi_cfg_flag end = bitOrder == MSBFIRST ? SPI_FRAME_MSB : SPI_FRAME_LSB;
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spi_mode m = (spi_mode)mode;
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enable_device(this->spi_d, false, (SPIFrequency)0, end, m);
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}
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void HardwareSPI::beginSlave(void) {
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this->beginSlave(MSBFIRST, 0);
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}
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/*
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void HardwareSPI::beginTransaction(uint8_t pin, SPISettings settings)
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{
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// this->begin(settings.clock, settings.bitOrder, settings.dataMode);
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this->begin(SPI_1_125MHZ, settings.bitOrder, settings.dataMode);
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}
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*/
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void HardwareSPI::end(void) {
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if (!spi_is_enabled(this->spi_d)) {
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return;
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}
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// Follows RM0008's sequence for disabling a SPI in master/slave
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// full duplex mode.
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while (spi_is_rx_nonempty(this->spi_d)) {
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// FIXME [0.1.0] remove this once you have an interrupt based driver
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volatile uint16 rx __attribute__((unused)) = spi_rx_reg(this->spi_d);
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}
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while (!spi_is_tx_empty(this->spi_d))
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;
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while (spi_is_busy(this->spi_d))
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;
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spi_peripheral_disable(this->spi_d);
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}
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/*
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* I/O
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*/
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uint8 HardwareSPI::read(void) {
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uint8 buf[1];
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this->read(buf, 1);
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return buf[0];
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}
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void HardwareSPI::read(uint8 *buf, uint32 len) {
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uint32 rxed = 0;
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while (rxed < len) {
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while (!spi_is_rx_nonempty(this->spi_d))
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;
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buf[rxed++] = (uint8)spi_rx_reg(this->spi_d);
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}
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}
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#if 0
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void HardwareSPI::readMaster(uint8 *buf, uint32 len) {
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uint32 rxed = 0;
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while (rxed < len) {
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spi_tx_reg(this->spi_d, 0xff);
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while (!spi_is_rx_nonempty(this->spi_d))
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;
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buf[rxed++] = (uint8)spi_rx_reg(this->spi_d);
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buf[rxed++] = this->spi_d->regs->DR;
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}
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}
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#endif
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void HardwareSPI::readMaster(uint8 *buf, uint32 len) {
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spi_reg_map *r = this->spi_d->regs;
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uint32 rxed = 0;
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while (rxed < len) {
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r->DR = 0xff;
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while (!(r->SR & SPI_SR_RXNE))
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;
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buf[rxed++] = r->DR;
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}
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}
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void HardwareSPI::waitReady() {
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while (!spi_is_rx_nonempty(this->spi_d))
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;
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}
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void HardwareSPI::write(uint8 byte) {
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this->write(&byte, 1);
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}
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void HardwareSPI::write(const uint8 *data, uint32 length) {
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uint32 txed = 0;
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while (txed < length) {
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txed += spi_tx(this->spi_d, data + txed, length - txed);
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}
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}
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uint8 HardwareSPI::transfer(uint8 byte) {
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this->write(byte);
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return this->read();
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}
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/*
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* Pin accessors
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*/
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uint8 HardwareSPI::misoPin(void) {
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return dev_to_spi_pins(this->spi_d)->miso;
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}
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uint8 HardwareSPI::mosiPin(void) {
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return dev_to_spi_pins(this->spi_d)->mosi;
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}
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uint8 HardwareSPI::sckPin(void) {
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return dev_to_spi_pins(this->spi_d)->sck;
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}
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uint8 HardwareSPI::nssPin(void) {
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return dev_to_spi_pins(this->spi_d)->nss;
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}
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/*
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* Deprecated functions
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*/
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uint8 HardwareSPI::send(uint8 data) {
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uint8 buf[] = {data};
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return this->send(buf, 1);
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}
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#if 1
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uint8 HardwareSPI::send(const uint8 *buf, uint32 len) {
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uint32 txed = 0;
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uint8 ret = 0;
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while (txed < len) {
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this->write(buf[txed++]);
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ret = this->read();
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}
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return ret;
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}
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#else
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// this does not work for an unknown reason
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uint8 HardwareSPI::send(const uint8 *buf, uint32 len) {
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volatile uint32 *dr = &(this->spi_d->regs->DR);
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volatile uint32 *sr = &(this->spi_d->regs->SR);
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uint32 txed = 0;
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uint32 rx=0;
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while (txed < len) {
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//while (!(*sr & SPI_SR_TXE))
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// ;
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//*dr = buf[txed++];
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this->write(buf[txed++]);
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while (!(*sr & SPI_SR_RXNE))
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;
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rx = *dr;
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//rx = this->read();
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}
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return rx;
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}
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#endif
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uint8 HardwareSPI::recv(void) {
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return this->read();
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}
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/*
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* Auxiliary functions
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*/
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static void configure_gpios(spi_dev *dev, bool as_master);
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static spi_baud_rate determine_baud_rate(spi_dev *dev, SPIFrequency freq);
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static const spi_pins* dev_to_spi_pins(spi_dev *dev) {
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switch (dev->clk_id) {
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case RCC_SPI1: return board_spi_pins;
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case RCC_SPI2: return board_spi_pins + 1;
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#ifdef STM32_HIGH_DENSITY
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case RCC_SPI3: return board_spi_pins + 2;
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#endif
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#ifdef STM32F4
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case RCC_SPI4: return board_spi_pins + 3;
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#endif
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default: return NULL;
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}
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}
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/* Enables the device in master or slave full duplex mode. If you
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* change this code, you must ensure that appropriate changes are made
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* to HardwareSPI::end(). */
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static void enable_device(spi_dev *dev,
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bool as_master,
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SPIFrequency freq,
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spi_cfg_flag endianness,
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spi_mode mode) {
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spi_baud_rate baud = determine_baud_rate(dev, freq);
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uint32 cfg_flags = (endianness | SPI_DFF_8_BIT | SPI_SW_SLAVE |
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(as_master ? SPI_SOFT_SS : 0));
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spi_init(dev);
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configure_gpios(dev, as_master);
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if (as_master) {
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spi_master_enable(dev, baud, mode, cfg_flags);
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} else {
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spi_slave_enable(dev, mode, cfg_flags);
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}
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}
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static void disable_pwm(const stm32_pin_info *i) {
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if (i->timer_device) {
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timer_set_mode(i->timer_device, i->timer_channel, TIMER_DISABLED);
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}
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}
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static void configure_gpios(spi_dev *dev, bool as_master) {
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const spi_pins *pins = dev_to_spi_pins(dev);
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if (!pins) {
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return;
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}
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const stm32_pin_info *nssi = (pins->nss >= 0) ? &PIN_MAP[pins->nss] : NULL;
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const stm32_pin_info *scki = &PIN_MAP[pins->sck];
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const stm32_pin_info *misoi = &PIN_MAP[pins->miso];
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const stm32_pin_info *mosii = &PIN_MAP[pins->mosi];
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if(nssi) {
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disable_pwm(nssi);
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}
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disable_pwm(scki);
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disable_pwm(misoi);
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disable_pwm(mosii);
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#ifdef STM32F4
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if(dev->clk_id <= RCC_SPI2) {
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if(nssi) {
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if(!as_master) {
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gpio_set_af_mode(nssi->gpio_device, scki->gpio_bit, 5);
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}
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}
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gpio_set_af_mode(scki->gpio_device, scki->gpio_bit, 5);
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gpio_set_af_mode(misoi->gpio_device, misoi->gpio_bit, 5);
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gpio_set_af_mode(mosii->gpio_device, mosii->gpio_bit, 5);
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} else {
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if(nssi) {
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if(!as_master) {
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gpio_set_af_mode(nssi->gpio_device, scki->gpio_bit, 6);
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}
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}
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gpio_set_af_mode(scki->gpio_device, scki->gpio_bit, 6);
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gpio_set_af_mode(misoi->gpio_device, misoi->gpio_bit, 6);
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gpio_set_af_mode(mosii->gpio_device, mosii->gpio_bit, 6);
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}
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#endif
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if(nssi) {
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spi_gpio_cfg(as_master,
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nssi->gpio_device,
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nssi->gpio_bit,
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scki->gpio_device,
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scki->gpio_bit,
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misoi->gpio_bit,
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mosii->gpio_bit);
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} else {
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spi_gpio_cfg(as_master,
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NULL,
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-1,
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scki->gpio_device,
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scki->gpio_bit,
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misoi->gpio_bit,
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mosii->gpio_bit);
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}
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}
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static const spi_baud_rate baud_rates[MAX_SPI_FREQS] __FLASH__ = {
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SPI_BAUD_PCLK_DIV_2,
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SPI_BAUD_PCLK_DIV_4,
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SPI_BAUD_PCLK_DIV_8,
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SPI_BAUD_PCLK_DIV_16,
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SPI_BAUD_PCLK_DIV_32,
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SPI_BAUD_PCLK_DIV_64,
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SPI_BAUD_PCLK_DIV_128,
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SPI_BAUD_PCLK_DIV_256,
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};
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/*
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* Note: This assumes you're on a LeafLabs-style board
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* (CYCLES_PER_MICROSECOND == 72, APB2 at 72MHz, APB1 at 36MHz).
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*/
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static spi_baud_rate determine_baud_rate(spi_dev *dev, SPIFrequency freq) {
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if (rcc_dev_clk(dev->clk_id) == RCC_APB2 && freq == SPI_140_625KHZ) {
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/* APB2 peripherals are too fast for 140.625 KHz */
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ASSERT(0);
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return (spi_baud_rate)~0;
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}
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return (rcc_dev_clk(dev->clk_id) == RCC_APB2 ?
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baud_rates[freq + 1] :
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baud_rates[freq]);
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}
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