143 lines
5.0 KiB
C
143 lines
5.0 KiB
C
/******************************************************************************
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* The MIT License
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*
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* Copyright (c) 2010 Perry Hung.
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*
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* Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use, copy,
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* modify, merge, publish, distribute, sublicense, and/or sell copies
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* of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*****************************************************************************/
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/**
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* @file flash.h
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* @brief STM32 Medium and high density Flash register map and setup
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* routines
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*/
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#include "libmaple_types.h"
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#ifndef _FLASH_H_
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#define _FLASH_H_
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#ifdef __cplusplus
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extern "C"{
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#endif
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/** Flash register map type */
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typedef struct flash_reg_map {
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__io uint32 ACR; /**< Access control register */
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__io uint32 KEYR; /**< Key register */
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__io uint32 OPTKEYR; /**< OPTKEY register */
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__io uint32 SR; /**< Status register */
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__io uint32 CR; /**< Control register */
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__io uint32 AR; /**< Address register */
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__io uint32 OBR; /**< Option byte register */
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__io uint32 WRPR; /**< Write protection register */
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} flash_reg_map;
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/** Flash register map base pointer */
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#define FLASH_BASE ((struct flash_reg_map*)0x40022000)
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/*
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* Register bit definitions
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*/
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/* Access control register */
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#define FLASH_ACR_PRFTBS_BIT 5
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#define FLASH_ACR_PRFTBE_BIT 4
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#define FLASH_ACR_HLFCYA_BIT 3
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#define FLASH_ACR_PRFTBS BIT(FLASH_ACR_PRFTBS_BIT)
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#define FLASH_ACR_PRFTBE BIT(FLASH_ACR_PRFTBE_BIT)
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#define FLASH_ACR_HLFCYA BIT(FLASH_ACR_HLFCYA_BIT)
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#define FLASH_ACR_LATENCY 0x7
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/* Status register */
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#define FLASH_SR_EOP_BIT 5
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#define FLASH_SR_WRPRTERR_BIT 4
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#define FLASH_SR_PGERR_BIT 2
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#define FLASH_SR_BSY_BIT 0
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#define FLASH_SR_EOP BIT(FLASH_SR_EOP_BIT)
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#define FLASH_SR_WRPRTERR BIT(FLASH_SR_WRPRTERR_BIT)
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#define FLASH_SR_PGERR BIT(FLASH_SR_PGERR_BIT)
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#define FLASH_SR_BSY BIT(FLASH_SR_BSY_BIT)
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/* Control register */
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#define FLASH_CR_EOPIE_BIT 12
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#define FLASH_CR_ERRIE_BIT 10
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#define FLASH_CR_OPTWRE_BIT 9
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#define FLASH_CR_LOCK_BIT 7
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#define FLASH_CR_STRT_BIT 6
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#define FLASH_CR_OPTER_BIT 5
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#define FLASH_CR_OPTPG_BIT 4
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#define FLASH_CR_MER_BIT 2
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#define FLASH_CR_PER_BIT 1
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#define FLASH_CR_PG_BIT 0
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#define FLASH_CR_EOPIE BIT(FLASH_CR_EOPIE_BIT)
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#define FLASH_CR_ERRIE BIT(FLASH_CR_ERRIE_BIT)
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#define FLASH_CR_OPTWRE BIT(FLASH_CR_OPTWRE_BIT)
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#define FLASH_CR_LOCK BIT(FLASH_CR_LOCK_BIT)
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#define FLASH_CR_STRT BIT(FLASH_CR_STRT_BIT)
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#define FLASH_CR_OPTER BIT(FLASH_CR_OPTER_BIT)
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#define FLASH_CR_OPTPG BIT(FLASH_CR_OPTPG_BIT)
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#define FLASH_CR_MER BIT(FLASH_CR_MER_BIT)
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#define FLASH_CR_PER BIT(FLASH_CR_PER_BIT)
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#define FLASH_CR_PG BIT(FLASH_CR_PG_BIT)
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/* Option byte register */
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#define FLASH_OBR_nRST_STDBY_BIT 4
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#define FLASH_OBR_nRST_STOP_BIT 3
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#define FLASH_OBR_WDG_SW_BIT 2
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#define FLASH_OBR_RDPRT_BIT 1
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#define FLASH_OBR_OPTERR_BIT 0
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#define FLASH_OBR_DATA1 (0xFF << 18)
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#define FLASH_OBR_DATA0 (0xFF << 10)
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#define FLASH_OBR_USER 0x3FF
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#define FLASH_OBR_nRST_STDBY BIT(FLASH_OBR_nRST_STDBY_BIT)
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#define FLASH_OBR_nRST_STOP BIT(FLASH_OBR_nRST_STOP_BIT)
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#define FLASH_OBR_WDG_SW BIT(FLASH_OBR_WDG_SW_BIT)
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#define FLASH_OBR_RDPRT BIT(FLASH_OBR_RDPRT_BIT)
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#define FLASH_OBR_OPTERR BIT(FLASH_OBR_OPTERR_BIT)
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/*
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* Setup routines
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*/
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#define FLASH_WAIT_STATE_0 0x0
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#define FLASH_WAIT_STATE_1 0x1
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#define FLASH_WAIT_STATE_2 0x2
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void flash_enable_prefetch(void);
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void flash_set_latency(uint32 wait_states);
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#ifdef __cplusplus
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}
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#endif
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#endif
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