365 lines
12 KiB
C
365 lines
12 KiB
C
/******************************************************************************
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* The MIT License
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*
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* Copyright (c) 2010 Perry Hung.
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*
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* Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use, copy,
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* modify, merge, publish, distribute, sublicense, and/or sell copies
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* of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*****************************************************************************/
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/**
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* @file usart.h
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* @author Marti Bolivar <mbolivar@leaflabs.com>,
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* Perry Hung <perry@leaflabs.com>
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* @brief USART definitions and prototypes
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*/
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#ifndef _USART_H_
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#define _USART_H_
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#include "libmaple_types.h"
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#include "util.h"
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#include "rcc.h"
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#include "nvic.h"
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#include "ring_buffer.h"
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#include "bitband.h"
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#ifdef __cplusplus
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extern "C"{
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#endif
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/*
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* Register maps and devices
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*/
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/** USART register map type */
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typedef struct usart_reg_map {
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__io uint32 SR; /**< Status register */
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__io uint32 DR; /**< Data register */
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__io uint32 BRR; /**< Baud rate register */
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__io uint32 CR1; /**< Control register 1 */
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__io uint32 CR2; /**< Control register 2 */
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__io uint32 CR3; /**< Control register 3 */
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__io uint32 GTPR; /**< Guard time and prescaler register */
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} usart_reg_map;
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/** USART1 register map base pointer */
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#define USART1_BASE ((struct usart_reg_map*)0x40011000)
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/** USART2 register map base pointer */
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#define USART2_BASE ((struct usart_reg_map*)0x40004400)
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/** USART3 register map base pointer */
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#define USART3_BASE ((struct usart_reg_map*)0x40004800)
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#ifdef STM32_HIGH_DENSITY
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/** UART4 register map base pointer */
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#define UART4_BASE ((struct usart_reg_map*)0x40004C00)
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/** UART5 register map base pointer */
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#define UART5_BASE ((struct usart_reg_map*)0x40005000)
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#endif
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/*
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* Register bit definitions
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*/
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/* Status register */
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#define USART_SR_CTS_BIT 9
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#define USART_SR_LBD_BIT 8
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#define USART_SR_TXE_BIT 7
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#define USART_SR_TC_BIT 6
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#define USART_SR_RXNE_BIT 5
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#define USART_SR_IDLE_BIT 4
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#define USART_SR_ORE_BIT 3
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#define USART_SR_NE_BIT 2
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#define USART_SR_FE_BIT 1
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#define USART_SR_PE_BIT 0
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#define USART_SR_CTS BIT(USART_SR_CTS_BIT)
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#define USART_SR_LBD BIT(USART_SR_LBD_BIT)
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#define USART_SR_TXE BIT(USART_SR_TXE_BIT)
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#define USART_SR_TC BIT(USART_SR_TC_BIT)
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#define USART_SR_RXNE BIT(USART_SR_RXNE_BIT)
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#define USART_SR_IDLE BIT(USART_SR_IDLE_BIT)
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#define USART_SR_ORE BIT(USART_SR_ORE_BIT)
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#define USART_SR_NE BIT(USART_SR_NE_BIT)
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#define USART_SR_FE BIT(USART_SR_FE_BIT)
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#define USART_SR_PE BIT(USART_SR_PE_BIT)
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/* Data register */
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#define USART_DR_DR 0xFF
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/* Baud rate register */
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#define USART_BRR_DIV_MANTISSA (0xFFF << 4)
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#define USART_BRR_DIV_FRACTION 0xF
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/* Control register 1 */
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#define USART_CR1_UE_BIT 13
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#define USART_CR1_M_BIT 12
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#define USART_CR1_WAKE_BIT 11
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#define USART_CR1_PCE_BIT 10
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#define USART_CR1_PS_BIT 9
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#define USART_CR1_PEIE_BIT 8
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#define USART_CR1_TXEIE_BIT 7
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#define USART_CR1_TCIE_BIT 6
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#define USART_CR1_RXNEIE_BIT 5
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#define USART_CR1_IDLEIE_BIT 4
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#define USART_CR1_TE_BIT 3
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#define USART_CR1_RE_BIT 2
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#define USART_CR1_RWU_BIT 1
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#define USART_CR1_SBK_BIT 0
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#define USART_CR1_UE BIT(USART_CR1_UE_BIT)
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#define USART_CR1_M BIT(USART_CR1_M_BIT)
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#define USART_CR1_WAKE BIT(USART_CR1_WAKE_BIT)
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#define USART_CR1_WAKE_IDLE (0 << USART_CR1_WAKE_BIT)
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#define USART_CR1_WAKE_ADDR (1 << USART_CR1_WAKE_BIT)
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#define USART_CR1_PCE BIT(USART_CR1_PCE_BIT)
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#define USART_CR1_PS BIT(USART_CR1_PS_BIT)
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#define USART_CR1_PS_EVEN (0 << USART_CR1_PS_BIT)
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#define USART_CR1_PS_ODD (1 << USART_CR1_PS_BIT)
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#define USART_CR1_PEIE BIT(USART_CR1_PEIE_BIT)
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#define USART_CR1_TXEIE BIT(USART_CR1_TXEIE_BIT)
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#define USART_CR1_TCIE BIT(USART_CR1_TCIE_BIT)
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#define USART_CR1_RXNEIE BIT(USART_CR1_RXNEIE_BIT)
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#define USART_CR1_IDLEIE BIT(USART_CR1_IDLEIE_BIT)
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#define USART_CR1_TE BIT(USART_CR1_TE_BIT)
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#define USART_CR1_RE BIT(USART_CR1_RE_BIT)
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#define USART_CR1_RWU BIT(USART_CR1_RWU_BIT)
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#define USART_CR1_RWU_ACTIVE (0 << USART_CR1_RWU_BIT)
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#define USART_CR1_RWU_MUTE (1 << USART_CR1_RWU_BIT)
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#define USART_CR1_SBK BIT(USART_CR1_SBK_BIT)
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/* Control register 2 */
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#define USART_CR2_LINEN_BIT 14
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#define USART_CR2_CLKEN_BIT 11
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#define USART_CR2_CPOL_BIT 10
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#define USART_CR2_CPHA_BIT 9
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#define USART_CR2_LBCL_BIT 8
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#define USART_CR2_LBDIE_BIT 6
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#define USART_CR2_LBDL_BIT 5
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#define USART_CR2_LINEN BIT(USART_CR2_LINEN_BIT)
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#define USART_CR2_STOP (0x3 << 12)
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#define USART_CR2_STOP_BITS_1 (0x0 << 12)
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/* Not on UART4, UART5 */
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#define USART_CR2_STOP_BITS_POINT_5 (0x1 << 12)
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/* Not on UART4, UART5 */
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#define USART_CR2_STOP_BITS_1_POINT_5 (0x3 << 12)
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#define USART_CR2_STOP_BITS_2 (0x2 << 12)
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#define USART_CR2_CLKEN BIT(USART_CR2_CLKEN_BIT)
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/* Not on UART4, UART5 */
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#define USART_CR2_CPOL BIT(USART_CR2_CPOL_BIT)
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#define USART_CR2_CPOL_LOW (0x0 << USART_CR2_CLKEN_BIT)
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#define USART_CR2_CPOL_HIGH (0x1 << USART_CR2_CLKEN_BIT)
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/* Not on UART4, UART5 */
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#define USART_CR2_CPHA BIT(USART_CR2_CPHA_BIT)
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#define USART_CR2_CPHA_FIRST (0x0 << USART_CR2_CPHA_BIT)
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#define USART_CR2_CPHA_SECOND (0x1 << USART_CR2_CPHA_BIT)
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/* Not on UART4, UART5 */
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#define USART_CR2_LBCL BIT(USART_CR2_LBCL_BIT)
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#define USART_CR2_LBDIE BIT(USART_CR2_LBDIE_BIT)
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#define USART_CR2_LBDL BIT(USART_CR2_LBDL_BIT)
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#define USART_CR2_LBDL_10_BIT (0 << USART_CR2_LBDL_BIT)
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#define USART_CR2_LBDL_11_BIT (1 << USART_CR2_LBDL_BIT)
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#define USART_CR2_ADD 0xF
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/* Control register 3 */
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#define USART_CR3_CTSIE_BIT 10
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#define USART_CR3_CTSE_BIT 9
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#define USART_CR3_RTSE_BIT 8
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#define USART_CR3_DMAT_BIT 7
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#define USART_CR3_DMAR_BIT 6
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#define USART_CR3_SCEN_BIT 5
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#define USART_CR3_NACK_BIT 4
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#define USART_CR3_HDSEL_BIT 3
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#define USART_CR3_IRLP_BIT 2
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#define USART_CR3_IREN_BIT 1
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#define USART_CR3_EIE_BIT 0
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/* Not on UART4, UART5 */
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#define USART_CR3_CTSIE BIT(USART_CR3_CTSIE_BIT)
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/* Not on UART4, UART5 */
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#define USART_CR3_CTSE BIT(USART_CR3_CTSE_BIT)
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/* Not on UART4, UART5 */
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#define USART_CR3_RTSE BIT(USART_CR3_RTSE_BIT)
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/* Not on UART5 */
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#define USART_CR3_DMAT BIT(USART_CR3_DMAT_BIT)
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/* Not on UART5 */
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#define USART_CR3_DMAR BIT(USART_CR3_DMAR_BIT)
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/* Not on UART4, UART5 */
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#define USART_CR3_SCEN BIT(USART_CR3_SCEN_BIT)
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/* Not on UART4, UART5 */
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#define USART_CR3_NACK BIT(USART_CR3_NACK_BIT)
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#define USART_CR3_HDSEL BIT(USART_CR3_HDSEL_BIT)
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#define USART_CR3_IRLP BIT(USART_CR3_IRLP_BIT)
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#define USART_CR3_IRLP_NORMAL (0 << USART_CR3_IRLP_BIT)
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#define USART_CR3_IRLP_LOW_POWER (1 << USART_CR3_IRLP_BIT)
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#define USART_CR3_IREN BIT(USART_CR3_IREN_BIT)
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#define USART_CR3_EIE BIT(USART_CR3_EIE_BIT)
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/* Guard time and prescaler register */
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/* Not on UART4, UART5 */
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#define USART_GTPR_GT (0xFF << 8)
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/* Not on UART4, UART5 */
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#define USART_GTPR_PSC 0xFF
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/*
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* Devices
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*/
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#ifndef USART_RX_BUF_SIZE
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#define USART_RX_BUF_SIZE 256
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#endif
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#ifndef USART_TX_BUF_SIZE
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#define USART_TX_BUF_SIZE 256
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#endif
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/** USART device type */
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typedef struct usart_dev {
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usart_reg_map *regs; /**< Register map */
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ring_buffer rbRX; /**< RX ring buffer */
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ring_buffer rbTX; /**< RX ring buffer */
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uint32 max_baud; /**< Maximum baud */
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uint8 rx_buf[USART_RX_BUF_SIZE]; /**< @brief Deprecated.
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* Actual RX buffer used by rb.
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* This field will be removed in
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* a future release. */
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uint8 tx_buf[USART_TX_BUF_SIZE];
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rcc_clk_id clk_id; /**< RCC clock information */
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nvic_irq_num irq_num; /**< USART NVIC interrupt */
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} usart_dev;
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extern usart_dev *USART1;
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extern usart_dev *USART2;
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extern usart_dev *USART3;
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#ifdef STM32_HIGH_DENSITY
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extern usart_dev *UART4;
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extern usart_dev *UART5;
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#endif
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void usart_init(usart_dev *dev);
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void usart_set_baud_rate(usart_dev *dev, uint32 baud);
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void usart_enable(usart_dev *dev);
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void usart_disable(usart_dev *dev);
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void usart_foreach(void (*fn)(usart_dev *dev));
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uint32 usart_tx(usart_dev *dev, const uint8 *buf, uint32 len);
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void usart_putudec(usart_dev *dev, uint32 val);
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/**
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* @brief Disable all serial ports.
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*/
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static inline void usart_disable_all(void) {
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usart_foreach(usart_disable);
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}
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/**
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* @brief Transmit one character on a serial port.
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*
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* This function blocks until the character has been successfully
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* transmitted.
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*
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* @param dev Serial port to send on.
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* @param byte Byte to transmit.
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*/
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static inline void usart_putc(usart_dev* dev, uint8 byte) {
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while (!usart_tx(dev, &byte, 1))
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;
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}
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/**
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* @brief Transmit a character string on a serial port.
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*
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* This function blocks until str is completely transmitted.
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*
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* @param dev Serial port to send on
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* @param str String to send
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*/
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static inline void usart_putstr(usart_dev *dev, const char* str) {
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uint32 i = 0;
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while (str[i] != '\0') {
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usart_putc(dev, str[i++]);
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}
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}
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/**
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* @brief Read one character from a serial port.
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*
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* It's not safe to call this function if the serial port has no data
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* available.
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*
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* @param dev Serial port to read from
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* @return byte read
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* @see usart_data_available()
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*/
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static inline uint8 usart_getc(usart_dev *dev) {
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return rb_remove(&dev->rbRX);
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}
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/*
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* Roger Clark. 20141125,
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* added peek function.
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* @param dev Serial port to read from
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* @return byte read
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*/
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static inline int usart_peek(usart_dev *dev)
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{
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return rb_peek(&dev->rbRX);
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}
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/**
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* @brief Return the amount of data available in a serial port's RX buffer.
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* @param dev Serial port to check
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* @return Number of bytes in dev's RX buffer.
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*/
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static inline uint32 usart_data_available(usart_dev *dev) {
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return rb_full_count(&dev->rbRX);
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}
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/**
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* @brief Return the amount of data available in a serial port's TX buffer.
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* @param dev Serial port to check
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* @return Number of bytes in dev's TX buffer.
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*/
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static inline uint32 usart_data_pending(usart_dev *dev) {
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return rb_full_count(&dev->rbTX);
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}
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/**
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* @brief Discard the contents of a serial port's RX buffer.
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* @param dev Serial port whose buffer to empty.
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*/
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static inline void usart_reset_rx(usart_dev *dev) {
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rb_reset(&dev->rbRX);
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}
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#ifdef __cplusplus
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} // extern "C"
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#endif
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#endif // _USART_H_
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