diff --git a/STM32/libraries/BoardExamples/examples/BlackF407VE/LowLevelHAL/FSMCLCD/FSMCLCD.ino b/STM32/libraries/BoardExamples/examples/BlackF407VE/LowLevelHAL/FSMCLCD/FSMCLCD.ino new file mode 100644 index 0000000..111cf29 --- /dev/null +++ b/STM32/libraries/BoardExamples/examples/BlackF407VE/LowLevelHAL/FSMCLCD/FSMCLCD.ino @@ -0,0 +1,99 @@ +/** + * FSMC on the J1 Header on Black F407VE board + * LCD-style, D0..D15 + A18 + * http://wiki.stm32duino.com/images/5/5c/STM32_F4VE_SCHEMATIC.PDF + * + * Connect a logic analizer to the J1 header pins (check above schematic) + */ + +void setup() { + + GPIO_InitTypeDef GPIO_InitStruct; + + __HAL_RCC_FSMC_CLK_ENABLE(); + + __HAL_RCC_GPIOE_CLK_ENABLE(); + __HAL_RCC_GPIOD_CLK_ENABLE(); + + GPIO_InitStruct.Pin = GPIO_PIN_7|GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10 + |GPIO_PIN_11|GPIO_PIN_12|GPIO_PIN_13|GPIO_PIN_14 + |GPIO_PIN_15; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = GPIO_AF12_FSMC; + HAL_GPIO_Init(GPIOE, &GPIO_InitStruct); + + GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_13 + |GPIO_PIN_14|GPIO_PIN_15|GPIO_PIN_0|GPIO_PIN_1 + |GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_7; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = GPIO_AF12_FSMC; + HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); + + + FSMC_NORSRAM_TimingTypeDef Timing; + + /** Perform the SRAM1 memory initialization sequence + */ + SRAM_HandleTypeDef hsram1; + hsram1.Instance = FSMC_NORSRAM_DEVICE; + hsram1.Extended = FSMC_NORSRAM_EXTENDED_DEVICE; + /* hsram1.Init */ + hsram1.Init.NSBank = FSMC_NORSRAM_BANK1; + hsram1.Init.DataAddressMux = FSMC_DATA_ADDRESS_MUX_DISABLE; + hsram1.Init.MemoryType = FSMC_MEMORY_TYPE_SRAM; + hsram1.Init.MemoryDataWidth = FSMC_NORSRAM_MEM_BUS_WIDTH_16; + hsram1.Init.BurstAccessMode = FSMC_BURST_ACCESS_MODE_DISABLE; + hsram1.Init.WaitSignalPolarity = FSMC_WAIT_SIGNAL_POLARITY_LOW; + hsram1.Init.WrapMode = FSMC_WRAP_MODE_DISABLE; + hsram1.Init.WaitSignalActive = FSMC_WAIT_TIMING_BEFORE_WS; + hsram1.Init.WriteOperation = FSMC_WRITE_OPERATION_ENABLE; + hsram1.Init.WaitSignal = FSMC_WAIT_SIGNAL_DISABLE; + hsram1.Init.ExtendedMode = FSMC_EXTENDED_MODE_DISABLE; + hsram1.Init.AsynchronousWait = FSMC_ASYNCHRONOUS_WAIT_DISABLE; + hsram1.Init.WriteBurst = FSMC_WRITE_BURST_DISABLE; + hsram1.Init.PageSize = FSMC_PAGE_SIZE_NONE; + + /* Timing */ + Timing.AddressSetupTime = 0; + Timing.AddressHoldTime = 1; + Timing.DataSetupTime = 1; + Timing.BusTurnAroundDuration = 15; + Timing.CLKDivision = 16; + Timing.DataLatency = 17; + Timing.AccessMode = FSMC_ACCESS_MODE_A; + + if (HAL_SRAM_Init(&hsram1, &Timing, NULL) != HAL_OK) { + while(1); + } + + pinMode(LED_BUILTIN, OUTPUT); +} + +#define LCD_REG (*((volatile unsigned short *) 0x60000000)) + +#define LCD_RAM (*((volatile unsigned short *) 0x60000000 + (1 << 18))) + +void loop() { + digitalWrite(LED_BUILTIN, LOW); + for(int32_t i=0; i<=UINT16_MAX; i++) { + LCD_REG = i; + } + digitalWrite(LED_BUILTIN, HIGH); + + + delay(200); + + + digitalWrite(LED_BUILTIN, LOW); + for(int32_t i=0; i<=UINT16_MAX; i++) { + LCD_RAM = i; + } + digitalWrite(LED_BUILTIN, HIGH); + + + delay(200); +} diff --git a/STM32/libraries/SPI/src/SPI.cpp b/STM32/libraries/SPI/src/SPI.cpp index 0fae5c0..f68cb58 100644 --- a/STM32/libraries/SPI/src/SPI.cpp +++ b/STM32/libraries/SPI/src/SPI.cpp @@ -14,11 +14,6 @@ static uint8_t spi_ff_buffer = 0XFF; void SPIClass::begin() { - _DMA_Instance_Type *_StreamTX; - _DMA_Instance_Type *_StreamRX; - uint32_t _ChannelTX; - uint32_t _ChannelRX; - apb_freq = stm32GetClockFrequency((void*)spiHandle.Instance); spiHandle.Init.Mode = SPI_MODE_MASTER; @@ -34,86 +29,85 @@ void SPIClass::begin() { #endif - #ifdef SPI1 - if (spiHandle.Instance== SPI1) { - __HAL_RCC_SPI1_CLK_ENABLE(); - _StreamTX = SPIx_DMA(SPI1_StreamTX); - _StreamRX = SPIx_DMA(SPI1_StreamRX); - _ChannelTX = SPI1_ChannelTX; - _ChannelRX = SPI1_ChannelRX; - /* - * Not used yet, still just polling - */ - //_SPISetDmaIRQ(SPI1); - } - #endif - #ifdef SPI2 - else if (spiHandle.Instance == SPI2) { - __HAL_RCC_SPI2_CLK_ENABLE(); - _StreamTX = SPIx_DMA(SPI2_StreamTX); - _StreamRX = SPIx_DMA(SPI2_StreamRX); - _ChannelTX = SPI2_ChannelTX; - _ChannelRX = SPI2_ChannelRX; - /* - * Not used yet, still just polling - */ - //_SPISetDmaIRQ(SPI2); - } - #endif - #ifdef SPI3 - else if (spiHandle.Instance == SPI3) { - __HAL_RCC_SPI3_CLK_ENABLE(); - _StreamTX = SPIx_DMA(SPI3_StreamTX); - _StreamRX = SPIx_DMA(SPI3_StreamRX); - _ChannelTX = SPI3_ChannelTX; - _ChannelRX = SPI3_ChannelRX; - /* - * Not used yet, still just polling - */ - //_SPISetDmaIRQ(SPI3); - } - #endif - #ifdef SPI4 - else if (spiHandle.Instance == SPI4) { - __HAL_RCC_SPI4_CLK_ENABLE(); - _StreamTX = SPIx_DMA(SPI4_StreamTX); - _StreamRX = SPIx_DMA(SPI4_StreamRX); - _ChannelTX = SPI4_ChannelTX; - _ChannelRX = SPI4_ChannelRX; - /* - * Not used yet, still just polling - */ - //_SPISetDmaIRQ(SPI4); - } - #endif - #ifdef SPI5 - else if (spiHandle.Instance == SPI5) { - __HAL_RCC_SPI5_CLK_ENABLE(); - _StreamTX = SPIx_DMA(SPI5_StreamTX); - _StreamRX = SPIx_DMA(SPI5_StreamRX); - _ChannelTX = SPI5_ChannelTX; - _ChannelRX = SPI5_ChannelRX; - /* - * Not used yet, still just polling - */ - //_SPISetDmaIRQ(SPI5); - } - #endif - #ifdef SPI6 - else if (spiHandle.Instance == SPI6) { - __HAL_RCC_SPI6_CLK_ENABLE(); - _StreamTX = SPIx_DMA(SPI6_StreamTX); - _StreamRX = SPIx_DMA(SPI6_StreamRX); - _ChannelTX = SPI6_ChannelTX; - _ChannelRX = SPI6_ChannelRX; - /* - * Not used yet, still just polling - */ - //_SPISetDmaIRQ(SPI6); - } - #endif +#ifdef SPI1 + if (spiHandle.Instance== SPI1) { + __HAL_RCC_SPI1_CLK_ENABLE(); + } + #endif + #ifdef SPI2 + else if (spiHandle.Instance == SPI2) { + __HAL_RCC_SPI2_CLK_ENABLE(); + } + #endif + #ifdef SPI3 + else if (spiHandle.Instance == SPI3) { + __HAL_RCC_SPI3_CLK_ENABLE(); + } + #endif + #ifdef SPI4 + else if (spiHandle.Instance == SPI4) { + __HAL_RCC_SPI4_CLK_ENABLE(); + } + #endif + #ifdef SPI5 + else if (spiHandle.Instance == SPI5) { + __HAL_RCC_SPI5_CLK_ENABLE(); + } + #endif + #ifdef SPI6 + else if (spiHandle.Instance == SPI6) { + __HAL_RCC_SPI6_CLK_ENABLE(); + } + #endif + //////////////// DMA + + #if defined(STM32F1) || defined(STM32F4) + + _DMA_Instance_Type *_StreamTX; + _DMA_Instance_Type *_StreamRX; + uint32_t _ChannelTX; + uint32_t _ChannelRX; + + #ifdef SPI1 + if (spiHandle.Instance== SPI1) { + _StreamTX = SPIx_DMA(SPI1_StreamTX); + _StreamRX = SPIx_DMA(SPI1_StreamRX); + _ChannelTX = SPI1_ChannelTX; + _ChannelRX = SPI1_ChannelRX; + /* + * Not used yet, still just polling + */ + //_SPISetDmaIRQ(SPI1); + } + #endif + #ifdef SPI2 + else if (spiHandle.Instance == SPI2) { + _StreamTX = SPIx_DMA(SPI2_StreamTX); + _StreamRX = SPIx_DMA(SPI2_StreamRX); + _ChannelTX = SPI2_ChannelTX; + _ChannelRX = SPI2_ChannelRX; + /* + * Not used yet, still just polling + */ + //_SPISetDmaIRQ(SPI2); + } + #endif + #ifdef SPI3 + else if (spiHandle.Instance == SPI3) { + _StreamTX = SPIx_DMA(SPI3_StreamTX); + _StreamRX = SPIx_DMA(SPI3_StreamRX); + _ChannelTX = SPI3_ChannelTX; + _ChannelRX = SPI3_ChannelRX; + /* + * Not used yet, still just polling + */ + //_SPISetDmaIRQ(SPI3); + } + #endif + // TODO SPI4/5/6 + hdma_spi_tx.Instance = _StreamTX; hdma_spi_tx.Parent = &spiHandle; _SPISetDMAChannel(hdma_spi_tx, _ChannelTX); @@ -154,6 +148,8 @@ void SPIClass::begin() { hdma_spi_rx.Init.PeriphBurst = DMA_PBURST_SINGLE; */ + #endif + stm32AfSPIInit(spiHandle.Instance, mosiPort, mosiPin, misoPort, misoPin, sckPort, sckPin); } @@ -243,6 +239,9 @@ void SPIClass::stm32SetSCK(uint8_t sck) { void SPIClass::stm32SetInstance(SPI_TypeDef *instance) { spiHandle.Instance = instance; } + +#if defined(STM32F1) || defined(STM32F4) + uint8_t SPIClass::dmaTransfer(uint8_t *transmitBuf, uint8_t *receiveBuf, uint16_t length) { //HAL_SPI_TransmitReceive(&spiHandle, transmitBuf, receiveBuf, length, 1000); // DMA handles configured in Begin. @@ -287,3 +286,5 @@ uint8_t SPIClass::dmaSend(uint8_t *transmitBuf, uint16_t length, bool minc) { spiHandle.State = HAL_SPI_STATE_READY; return 0; } + +#endif