diff --git a/STM32/boards.txt b/STM32/boards.txt
index 96ba55e..2ac05cc 100644
--- a/STM32/boards.txt
+++ b/STM32/boards.txt
@@ -177,7 +177,7 @@ BLACK_F407VE.menu.serial.SerialUART1.build.extra_flags_serial=-DMENU_SERIAL=Seri
################################################################################
# NUCLEO 64 board
-NUCLEO_64.name=Nucleo-64 [BOARD PIN NUMBERS NOT WORKING YET!] (Select board from submenu)
+NUCLEO_64.name=Nucleo-64 boards
NUCLEO_64.vid.0=0x0483
NUCLEO_64.pid.0=0x5711
diff --git a/STM32/cores/arduino/stm32/SerialUART.cpp b/STM32/cores/arduino/stm32/SerialUART.cpp
index a4c0d1f..856206e 100644
--- a/STM32/cores/arduino/stm32/SerialUART.cpp
+++ b/STM32/cores/arduino/stm32/SerialUART.cpp
@@ -137,7 +137,7 @@ size_t SerialUART::write(const uint8_t c) {
txBuffer[txEnd % BUFFER_SIZE] = c;
txEnd++;
- if (txEnd == txStart + 1) {
+ if (txEnd % BUFFER_SIZE == (txStart + 1) % BUFFER_SIZE) {
HAL_UART_Transmit_IT(handle, &txBuffer[txStart % BUFFER_SIZE], 1);
}
return 1;
diff --git a/STM32/cores/arduino/stm32/SerialUART.h b/STM32/cores/arduino/stm32/SerialUART.h
index 79b3359..0c443de 100644
--- a/STM32/cores/arduino/stm32/SerialUART.h
+++ b/STM32/cores/arduino/stm32/SerialUART.h
@@ -44,15 +44,22 @@ class SerialUART : public Stream {
#ifdef USART1
extern SerialUART SerialUART1;
+#define Serial1 SerialUART1
#endif
+
#ifdef USART2
extern SerialUART SerialUART2;
+#define Serial2 SerialUART2
#endif
+
#ifdef USART3
extern SerialUART SerialUART3;
+#define Serial3 SerialUART3
#endif
+
#ifdef USART4
extern SerialUART SerialUART4;
+#define Serial4 SerialUART4
#endif
#endif // _UART_CLASS_
diff --git a/STM32/cores/arduino/stm32/stm32_gpio.c b/STM32/cores/arduino/stm32/stm32_gpio.c
index e7ca552..23ff30b 100644
--- a/STM32/cores/arduino/stm32/stm32_gpio.c
+++ b/STM32/cores/arduino/stm32/stm32_gpio.c
@@ -2,7 +2,7 @@
#include "variant.h"
-void stm32_gpio_clock(GPIO_TypeDef *port) {
+void stm32GpioClock(GPIO_TypeDef *port) {
#ifdef GPIOA
if (port == GPIOA) __HAL_RCC_GPIOA_CLK_ENABLE();
@@ -46,7 +46,7 @@ void pinMode(uint8_t pin, uint8_t mode) {
(*stm32_pwm_disable_callback)(port_pin.port, port_pin.pin_mask);
}
- stm32_gpio_clock(port_pin.port);
+ stm32GpioClock(port_pin.port);
GPIO_InitTypeDef init;
diff --git a/STM32/cores/arduino/stm32/stm32_gpio.h b/STM32/cores/arduino/stm32/stm32_gpio.h
index 35c2bb1..e0fb0c8 100644
--- a/STM32/cores/arduino/stm32/stm32_gpio.h
+++ b/STM32/cores/arduino/stm32/stm32_gpio.h
@@ -38,7 +38,7 @@ extern const stm32_port_pin_type variant_pin_list[NUM_PINS];
/**
* Start clock for the fedined port
*/
-void stm32_gpio_clock_enable(GPIO_TypeDef *port);
+void stm32GpioClockEnable(GPIO_TypeDef *port);
/**
* If PWM is used at least once, this method is set to the PWM disable function in stm32_PWM.c
diff --git a/STM32/cores/arduino/stm32/stm32_gpio_af.c b/STM32/cores/arduino/stm32/stm32_gpio_af.c
index d3e0a4b..0bb88ab 100644
--- a/STM32/cores/arduino/stm32/stm32_gpio_af.c
+++ b/STM32/cores/arduino/stm32/stm32_gpio_af.c
@@ -51,6 +51,16 @@ void stm32AfSPIInit(const SPI_TypeDef *instance,
}
+void stm32AfI2SInit(const SPI_TypeDef *instance,
+ GPIO_TypeDef *sdPort, uint32_t sdPin,
+ GPIO_TypeDef *wsPort, uint32_t wsPin,
+ GPIO_TypeDef *ckPort, uint32_t ckPin) {
+
+ stm32AfInit(chip_af_i2s_sd, sizeof(chip_af_i2s_sd) / sizeof(chip_af_i2s_sd[0]), instance, sdPort, sdPin, GPIO_MODE_AF_PP, GPIO_NOPULL);
+ stm32AfInit(chip_af_i2s_ws, sizeof(chip_af_i2s_ws) / sizeof(chip_af_i2s_ws[0]), instance, wsPort, wsPin, GPIO_MODE_AF_PP, GPIO_NOPULL);
+ stm32AfInit(chip_af_i2s_ck, sizeof(chip_af_i2s_ck) / sizeof(chip_af_i2s_ck[0]), instance, ckPort, ckPin, GPIO_MODE_AF_PP, GPIO_NOPULL);
+}
+
void stm32AfI2CInit(const I2C_TypeDef *instance,
GPIO_TypeDef *sdaPort, uint32_t sdaPin,
GPIO_TypeDef *sclPort, uint32_t sclPin) {
diff --git a/STM32/cores/arduino/stm32/stm32_gpio_af.h b/STM32/cores/arduino/stm32/stm32_gpio_af.h
index 5fb4c61..c906de6 100644
--- a/STM32/cores/arduino/stm32/stm32_gpio_af.h
+++ b/STM32/cores/arduino/stm32/stm32_gpio_af.h
@@ -51,6 +51,11 @@ void stm32AfSPIInit(const SPI_TypeDef *instance,
GPIO_TypeDef *misoPort, uint32_t misoPin,
GPIO_TypeDef *sckPort, uint32_t sckPin);
+void stm32AfI2SInit(const SPI_TypeDef *instance,
+ GPIO_TypeDef *sdPort, uint32_t sdPin,
+ GPIO_TypeDef *wsPort, uint32_t wsPin,
+ GPIO_TypeDef *ckPort, uint32_t ckPin);
+
void stm32AfI2CInit(const I2C_TypeDef *instance,
GPIO_TypeDef *sdaPort, uint32_t sdaPin,
GPIO_TypeDef *sclPort, uint32_t sclPin);
diff --git a/STM32/cores/arduino/stm32/stm32_gpio_af_F0F2F3F4F7L0L1L4.c b/STM32/cores/arduino/stm32/stm32_gpio_af_F0F2F3F4F7L0L1L4.c
index a39bbe0..c3577f5 100644
--- a/STM32/cores/arduino/stm32/stm32_gpio_af_F0F2F3F4F7L0L1L4.c
+++ b/STM32/cores/arduino/stm32/stm32_gpio_af_F0F2F3F4F7L0L1L4.c
@@ -22,7 +22,7 @@ void stm32AfInit(const stm32_af_pin_list_type list[], int size, const void *inst
if (port == NULL) {
port = stm32AfGetDefault(list, size, instance, &pin);
}
- stm32_gpio_clock(port);
+ stm32GpioClock(port);
GPIO_InitTypeDef GPIO_InitStruct;
GPIO_InitStruct.Pin = pin;
diff --git a/STM32/cores/arduino/stm32/stm32_gpio_af_F1.c b/STM32/cores/arduino/stm32/stm32_gpio_af_F1.c
index 5330601..ee35efc 100644
--- a/STM32/cores/arduino/stm32/stm32_gpio_af_F1.c
+++ b/STM32/cores/arduino/stm32/stm32_gpio_af_F1.c
@@ -21,7 +21,7 @@ void stm32AfInit(const stm32_af_pin_list_type list[], int size, const void *inst
if (port == NULL) {
port = stm32AfDefault(list, size, instance, &pin);
}
- stm32_gpio_clock(port);
+ stm32GpioClock(port);
GPIO_InitTypeDef GPIO_InitStruct;
GPIO_InitStruct.Pin = pin;
diff --git a/STM32/cores/arduino/stm32/stm32_gpio_exti.c b/STM32/cores/arduino/stm32/stm32_gpio_exti.c
new file mode 100644
index 0000000..12e1bcb
--- /dev/null
+++ b/STM32/cores/arduino/stm32/stm32_gpio_exti.c
@@ -0,0 +1,94 @@
+#include "stm32_gpio.h"
+
+#define CHANGE 1
+#define FALLING 2
+#define RISING 3
+
+typedef void (*stm32_exti_callback_func)();
+
+#if defined(STM32F0) || defined(STM32L0)
+const uint8_t exti_irq[] = {EXTI0_1_IRQn, EXTI0_1_IRQn, EXTI2_3_IRQn, EXTI2_3_IRQn, EXTI4_15_IRQn,
+ EXTI4_15_IRQn, EXTI4_15_IRQn, EXTI4_15_IRQn, EXTI4_15_IRQn, EXTI4_15_IRQn,
+ EXTI4_15_IRQn, EXTI4_15_IRQn, EXTI4_15_IRQn, EXTI4_15_IRQn, EXTI4_15_IRQn, EXTI4_15_IRQn};
+#else
+const uint8_t exti_irq[] = {EXTI0_IRQn, EXTI1_IRQn, EXTI2_IRQn, EXTI3_IRQn, EXTI4_IRQn,
+ EXTI9_5_IRQn, EXTI9_5_IRQn, EXTI9_5_IRQn, EXTI9_5_IRQn, EXTI9_5_IRQn,
+ EXTI15_10_IRQn, EXTI15_10_IRQn, EXTI15_10_IRQn, EXTI15_10_IRQn, EXTI15_10_IRQn, EXTI15_10_IRQn};
+#endif
+
+stm32_exti_callback_func callbacks[16];
+
+void attachInterrupt(uint8_t pin, stm32_exti_callback_func callback, int mode) {
+ const stm32_port_pin_type port_pin = variant_pin_list[pin];
+
+ uint8_t irq = __builtin_ffs(port_pin.pin_mask) - 1;
+ callbacks[irq] = callback;
+
+ stm32GpioClock(port_pin.port);
+
+ GPIO_InitTypeDef GPIO_InitStruct;
+
+ GPIO_InitStruct.Pin = port_pin.pin_mask;
+ switch(mode) {
+ case RISING:
+ GPIO_InitStruct.Mode = GPIO_MODE_IT_RISING;
+ break;
+
+ case FALLING:
+ GPIO_InitStruct.Mode = GPIO_MODE_IT_FALLING;
+ break;
+
+ case CHANGE:
+ default:
+ GPIO_InitStruct.Mode = GPIO_MODE_IT_RISING_FALLING;
+ }
+
+ GPIO_InitStruct.Pull = GPIO_NOPULL;
+ HAL_GPIO_Init(port_pin.port, &GPIO_InitStruct);
+
+ HAL_NVIC_SetPriority(exti_irq[irq], 6, 0);
+ HAL_NVIC_EnableIRQ(exti_irq[irq]);
+}
+
+void detachInterrupt(uint8_t pin) {
+ callbacks[__builtin_ffs(variant_pin_list[pin].pin_mask) - 1] = NULL;
+}
+
+void EXTI0_IRQHandler(void) {
+ HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_0);
+}
+
+void EXTI1_IRQHandler(void) {
+ HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_1);
+}
+
+void EXTI2_IRQHandler(void) {
+ HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_2);
+}
+
+void EXTI3_IRQHandler(void) {
+ HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_3);
+}
+
+void EXTI4_IRQHandler(void) {
+ HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_4);
+}
+
+void EXTI9_5_IRQHandler(void) {
+ for(uint32_t pin = GPIO_PIN_5; pin <= GPIO_PIN_9; pin=pin<<1) {
+ HAL_GPIO_EXTI_IRQHandler(pin);
+ }
+}
+
+void EXTI15_10_IRQHandler(void) {
+ for(uint32_t pin = GPIO_PIN_10; pin <= GPIO_PIN_15; pin=pin<<1) {
+ HAL_GPIO_EXTI_IRQHandler(pin);
+ }
+}
+
+void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin) {
+ stm32_exti_callback_func callback = callbacks[__builtin_ffs(GPIO_Pin) - 1];
+ if (callback != NULL) {
+ callback();
+ }
+}
diff --git a/STM32/libraries/I2S/src/I2S.cpp b/STM32/libraries/I2S/src/I2S.cpp
new file mode 100644
index 0000000..151e7b8
--- /dev/null
+++ b/STM32/libraries/I2S/src/I2S.cpp
@@ -0,0 +1,104 @@
+#include "I2S.h"
+#include "stm32_gpio_af.h"
+
+I2SClass::I2SClass(SPI_TypeDef *instance) {
+ handle.Instance = instance;
+}
+
+I2SClass::I2SClass(SPI_TypeDef *instance, uint8_t sd, uint8_t ws, uint8_t ck) {
+ handle.Instance = instance;
+
+ this->sdPort = variant_pin_list[sd].port;
+ this->sdPin = variant_pin_list[sd].pin_mask;
+ this->wsPort = variant_pin_list[ws].port;
+ this->wsPin = variant_pin_list[ws].pin_mask;
+ this->ckPort = variant_pin_list[ck].port;
+ this->ckPin = variant_pin_list[ck].pin_mask;
+}
+
+uint8_t I2SClass::begin(i2s_mode_t mode, uint32_t sampleRate, uint8_t bitsPerSample) {
+
+ #ifdef SPI1
+ if (handle.Instance == SPI1) __HAL_RCC_SPI1_CLK_ENABLE();
+ #endif
+ #ifdef SPI2
+ if (handle.Instance == SPI2) __HAL_RCC_SPI2_CLK_ENABLE();
+ #endif
+ #ifdef SPI3
+ if (handle.Instance == SPI3) __HAL_RCC_SPI3_CLK_ENABLE();
+ #endif
+ #ifdef SPI4
+ if (handle.Instance == SPI4) __HAL_RCC_SPI4_CLK_ENABLE();
+ #endif
+ #ifdef SPI5
+ if (handle.Instance == SPI5) __HAL_RCC_SPI5_CLK_ENABLE();
+ #endif
+ #ifdef SPI6
+ if (handle.Instance == SPI6) __HAL_RCC_SPI6_CLK_ENABLE();
+ #endif
+
+ stm32AfI2SInit(handle.Instance, sdPort, sdPin, wsPort, wsPin, ckPort, ckPin);
+
+ if (mode == I2S_PHILIPS_MODE) {
+ handle.Init.Standard = I2S_STANDARD_PHILIPS;
+ } else if (mode == I2S_LEFT_JUSTIFIED_MODE) {
+ handle.Init.Standard = I2S_STANDARD_LSB;
+ } else if (mode == I2S_RIGHT_JUSTIFIED_MODE) {
+ handle.Init.Standard = I2S_STANDARD_MSB;
+ } else {
+ return false;
+ }
+
+ handle.Init.Mode = I2S_MODE_MASTER_TX;
+ handle.Init.MCLKOutput = I2S_MCLKOUTPUT_DISABLE;
+ handle.Init.AudioFreq = I2S_AUDIOFREQ_44K;
+ handle.Init.CPOL = I2S_CPOL_LOW;
+ handle.Init.ClockSource = I2S_CLOCK_PLL;
+ handle.Init.FullDuplexMode = I2S_FULLDUPLEXMODE_DISABLE;
+
+ if (sampleRate >= 96000) {
+ handle.Init.AudioFreq = I2S_AUDIOFREQ_96K;
+ } else if (sampleRate >= 48000) {
+ handle.Init.AudioFreq = I2S_AUDIOFREQ_48K;
+ } else if (sampleRate >= 44000) {
+ handle.Init.AudioFreq = I2S_AUDIOFREQ_44K;
+ } else if (sampleRate >= 32000) {
+ handle.Init.AudioFreq = I2S_AUDIOFREQ_32K;
+ } else if (sampleRate >= 22000) {
+ handle.Init.AudioFreq = I2S_AUDIOFREQ_22K;
+ } else if (sampleRate >= 16000) {
+ handle.Init.AudioFreq = I2S_AUDIOFREQ_16K;
+ } else if (sampleRate >= 11000) {
+ handle.Init.AudioFreq = I2S_AUDIOFREQ_11K;
+ } else {
+ handle.Init.AudioFreq = I2S_AUDIOFREQ_8K;
+ }
+
+ if (bitsPerSample == 16) {
+ handle.Init.DataFormat = I2S_DATAFORMAT_16B;
+ } else if (bitsPerSample == 24) {
+ handle.Init.DataFormat = I2S_DATAFORMAT_24B;
+ } else if (bitsPerSample == 32) {
+ handle.Init.DataFormat = I2S_DATAFORMAT_32B;
+ } else {
+ return false;
+ }
+
+ return HAL_I2S_Init(&handle) == HAL_OK;
+}
+
+void I2SClass::write(uint16_t data) {
+ HAL_I2S_Transmit(&handle, &data, 1, 1000);
+}
+
+void I2SClass::write32(uint32_t data) {
+ HAL_I2S_Transmit(&handle, (uint16_t*)&data, 1, 1000);
+}
+
+void I2SClass::write(uint16_t *data, uint16_t size) {
+ HAL_I2S_Transmit(&handle, data, size, 1000);
+}
+
+void I2SClass::write32(uint32_t *data, uint16_t size) {
+ HAL_I2S_Transmit(&handle, (uint16_t*)data, size, 1000);
+}
diff --git a/STM32/libraries/I2S/src/I2S.h b/STM32/libraries/I2S/src/I2S.h
index 67cb59f..5faf90f 100644
--- a/STM32/libraries/I2S/src/I2S.h
+++ b/STM32/libraries/I2S/src/I2S.h
@@ -1 +1,36 @@
-// TODO implement https://www.arduino.cc/en/Reference/I2S using HAL_I2S_xxx
+#ifndef _I2S_H
+#define _I2S_H
+
+#include "stm32_def.h"
+
+typedef enum {
+ I2S_PHILIPS_MODE,
+ I2S_RIGHT_JUSTIFIED_MODE,
+ I2S_LEFT_JUSTIFIED_MODE
+} i2s_mode_t;
+
+class I2SClass {
+ public:
+ I2SClass(SPI_TypeDef *instance);
+
+ I2SClass(SPI_TypeDef *instance, uint8_t sd, uint8_t ws, uint8_t ck);
+
+ uint8_t begin(i2s_mode_t mode, uint32_t sampleRate, uint8_t bitsPerSample);
+
+ void write(uint16_t data);
+ void write32(uint32_t data);
+
+ void write(uint16_t *data, uint16_t size);
+ void write32(uint32_t *data, uint16_t size);
+
+ I2S_HandleTypeDef handle;
+
+ GPIO_TypeDef *sdPort = NULL;
+ uint32_t sdPin = 0;
+ GPIO_TypeDef *wsPort = NULL;
+ uint32_t wsPin = 0;
+ GPIO_TypeDef *ckPort = NULL;
+ uint32_t ckPin = 0;
+};
+
+#endif
diff --git a/STM32/libraries/STM32_HAL/src/stm32XXxx_hal_i2s_ex.c b/STM32/libraries/I2S/src/stm32XXxx_hal_i2s_ex.c
similarity index 100%
rename from STM32/libraries/STM32_HAL/src/stm32XXxx_hal_i2s_ex.c
rename to STM32/libraries/I2S/src/stm32XXxx_hal_i2s_ex.c
diff --git a/STM32/variants/BLACK_F407VE/systemclock_config.c b/STM32/variants/BLACK_F407VE/systemclock_config.c
index 2b8c0af..89663f0 100644
--- a/STM32/variants/BLACK_F407VE/systemclock_config.c
+++ b/STM32/variants/BLACK_F407VE/systemclock_config.c
@@ -4,6 +4,7 @@
void SystemClock_Config(void) {
RCC_OscInitTypeDef RCC_OscInitStruct;
RCC_ClkInitTypeDef RCC_ClkInitStruct;
+ RCC_PeriphCLKInitTypeDef PeriphClkInitStruct;
__HAL_RCC_PWR_CLK_ENABLE();
@@ -33,6 +34,14 @@ void SystemClock_Config(void) {
Error_Handler();
}
+ PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_I2S;
+ PeriphClkInitStruct.PLLI2S.PLLI2SN = 192;
+ PeriphClkInitStruct.PLLI2S.PLLI2SR = 2;
+ if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
+ {
+ Error_Handler();
+ }
+
HAL_SYSTICK_Config(HAL_RCC_GetHCLKFreq()/1000);
HAL_SYSTICK_CLKSourceConfig(SYSTICK_CLKSOURCE_HCLK);
diff --git a/STM32/variants/DISCOVERY_F407VG/systemclock_config.c b/STM32/variants/DISCOVERY_F407VG/systemclock_config.c
index 2b8c0af..bf23fd0 100644
--- a/STM32/variants/DISCOVERY_F407VG/systemclock_config.c
+++ b/STM32/variants/DISCOVERY_F407VG/systemclock_config.c
@@ -4,6 +4,7 @@
void SystemClock_Config(void) {
RCC_OscInitTypeDef RCC_OscInitStruct;
RCC_ClkInitTypeDef RCC_ClkInitStruct;
+ RCC_PeriphCLKInitTypeDef PeriphClkInitStruct;
__HAL_RCC_PWR_CLK_ENABLE();
@@ -33,6 +34,15 @@ void SystemClock_Config(void) {
Error_Handler();
}
+ PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_I2S;
+ PeriphClkInitStruct.PLLI2S.PLLI2SN = 192;
+ PeriphClkInitStruct.PLLI2S.PLLI2SR = 2;
+ if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
+ {
+ Error_Handler();
+ }
+
+
HAL_SYSTICK_Config(HAL_RCC_GetHCLKFreq()/1000);
HAL_SYSTICK_CLKSourceConfig(SYSTICK_CLKSOURCE_HCLK);
diff --git a/STM32/variants/NUCLEO_F030R8/variant.cpp b/STM32/variants/NUCLEO_F030R8/variant.cpp
index 3faa7ca..e8e38fd 100644
--- a/STM32/variants/NUCLEO_F030R8/variant.cpp
+++ b/STM32/variants/NUCLEO_F030R8/variant.cpp
@@ -2,46 +2,49 @@
#include "stm32_gpio.h"
+extern const int flash_size = 512 * 1024;
+
const stm32_port_pin_type variant_pin_list[] = {
- { GPIOA, GPIO_PIN_0 },
- { GPIOA, GPIO_PIN_1 },
- { GPIOA, GPIO_PIN_2 },
{ GPIOA, GPIO_PIN_3 },
- { GPIOA, GPIO_PIN_4 },
- { GPIOA, GPIO_PIN_5 },
- { GPIOA, GPIO_PIN_6 },
- { GPIOA, GPIO_PIN_7 },
+ { GPIOA, GPIO_PIN_2 },
+ { GPIOA, GPIO_PIN_10},
+ { GPIOB, GPIO_PIN_3 },
+ { GPIOB, GPIO_PIN_5 },
+ { GPIOB, GPIO_PIN_4 },
+ { GPIOB, GPIO_PIN_10},
{ GPIOA, GPIO_PIN_8 },
{ GPIOA, GPIO_PIN_9 },
- { GPIOA, GPIO_PIN_10},
+ { GPIOC, GPIO_PIN_7 },
+ { GPIOB, GPIO_PIN_6 },
+ { GPIOA, GPIO_PIN_7 },
+ { GPIOA, GPIO_PIN_6 },
+ { GPIOA, GPIO_PIN_5 },
+ { GPIOB, GPIO_PIN_9 },
+ { GPIOB, GPIO_PIN_8 },
+ { GPIOA, GPIO_PIN_0 },
+ { GPIOA, GPIO_PIN_1 },
+ { GPIOA, GPIO_PIN_4 },
+ { GPIOB, GPIO_PIN_0 },
+ { GPIOC, GPIO_PIN_1 },
+ { GPIOC, GPIO_PIN_0 },
+
{ GPIOA, GPIO_PIN_11},
{ GPIOA, GPIO_PIN_12},
{ GPIOA, GPIO_PIN_13},
{ GPIOA, GPIO_PIN_14},
{ GPIOA, GPIO_PIN_15},
- { GPIOB, GPIO_PIN_0 },
{ GPIOB, GPIO_PIN_1 },
{ GPIOB, GPIO_PIN_2 },
- { GPIOB, GPIO_PIN_3 },
- { GPIOB, GPIO_PIN_4 },
- { GPIOB, GPIO_PIN_5 },
- { GPIOB, GPIO_PIN_6 },
{ GPIOB, GPIO_PIN_7 },
- { GPIOB, GPIO_PIN_8 },
- { GPIOB, GPIO_PIN_9 },
- { GPIOB, GPIO_PIN_10},
{ GPIOB, GPIO_PIN_12},
{ GPIOB, GPIO_PIN_13},
{ GPIOB, GPIO_PIN_14},
{ GPIOB, GPIO_PIN_15},
- { GPIOC, GPIO_PIN_0 },
- { GPIOC, GPIO_PIN_1 },
{ GPIOC, GPIO_PIN_2 },
{ GPIOC, GPIO_PIN_3 },
{ GPIOC, GPIO_PIN_4 },
{ GPIOC, GPIO_PIN_5 },
{ GPIOC, GPIO_PIN_6 },
- { GPIOC, GPIO_PIN_7 },
{ GPIOC, GPIO_PIN_8 },
{ GPIOC, GPIO_PIN_9 },
{ GPIOC, GPIO_PIN_10},
diff --git a/STM32/variants/NUCLEO_F030R8/variant.h b/STM32/variants/NUCLEO_F030R8/variant.h
index f0d42d2..9ecfb4b 100644
--- a/STM32/variants/NUCLEO_F030R8/variant.h
+++ b/STM32/variants/NUCLEO_F030R8/variant.h
@@ -11,46 +11,54 @@
#define SDA PB9
#define SCL PB8
+#define A0 PA0
+#define A1 PA1
+#define A2 PA4
+#define A3 PB0
+#define A4 PC1
+#define A5 PC0
+
enum {
- PA0 ,
- PA1 ,
- PA2 ,
- PA3 ,
- PA4 ,
- PA5 ,
- PA6 ,
- PA7 ,
- PA8 ,
- PA9 ,
- PA10,
+ PA3 , // D0
+ PA2 , // D1
+ PA10, // D2
+ PB3 , // D3
+ PB5 , // D4
+ PB4 , // D5
+ PB10, // D6
+ PA8 , // D7
+ PA9 , // D8
+ PC7 , // D9
+ PB6 , // D10
+ PA7 , // D11
+ PA6 , // D12
+ PA5 , // D13
+ PB9 , // D14
+ PB8 , // D15
+ PA0 , // D16 / A0
+ PA1 , // D17 / A1
+ PA4 , // D18 / A2
+ PB0 , // D19 / A3
+ PC1 , // D20 / A4
+ PC0 , // D21 / A5
+
PA11,
PA12,
PA13,
PA14,
PA15,
- PB0 ,
PB1 ,
PB2 ,
- PB3 ,
- PB4 ,
- PB5 ,
- PB6 ,
PB7 ,
- PB8 ,
- PB9 ,
- PB10,
PB12,
PB13,
PB14,
PB15,
- PC0 ,
- PC1 ,
PC2 ,
PC3 ,
PC4 ,
PC5 ,
PC6 ,
- PC7 ,
PC8 ,
PC9 ,
PC10,
diff --git a/STM32/variants/NUCLEO_F103RB/variant.cpp b/STM32/variants/NUCLEO_F103RB/variant.cpp
index 3faa7ca..e8e38fd 100644
--- a/STM32/variants/NUCLEO_F103RB/variant.cpp
+++ b/STM32/variants/NUCLEO_F103RB/variant.cpp
@@ -2,46 +2,49 @@
#include "stm32_gpio.h"
+extern const int flash_size = 512 * 1024;
+
const stm32_port_pin_type variant_pin_list[] = {
- { GPIOA, GPIO_PIN_0 },
- { GPIOA, GPIO_PIN_1 },
- { GPIOA, GPIO_PIN_2 },
{ GPIOA, GPIO_PIN_3 },
- { GPIOA, GPIO_PIN_4 },
- { GPIOA, GPIO_PIN_5 },
- { GPIOA, GPIO_PIN_6 },
- { GPIOA, GPIO_PIN_7 },
+ { GPIOA, GPIO_PIN_2 },
+ { GPIOA, GPIO_PIN_10},
+ { GPIOB, GPIO_PIN_3 },
+ { GPIOB, GPIO_PIN_5 },
+ { GPIOB, GPIO_PIN_4 },
+ { GPIOB, GPIO_PIN_10},
{ GPIOA, GPIO_PIN_8 },
{ GPIOA, GPIO_PIN_9 },
- { GPIOA, GPIO_PIN_10},
+ { GPIOC, GPIO_PIN_7 },
+ { GPIOB, GPIO_PIN_6 },
+ { GPIOA, GPIO_PIN_7 },
+ { GPIOA, GPIO_PIN_6 },
+ { GPIOA, GPIO_PIN_5 },
+ { GPIOB, GPIO_PIN_9 },
+ { GPIOB, GPIO_PIN_8 },
+ { GPIOA, GPIO_PIN_0 },
+ { GPIOA, GPIO_PIN_1 },
+ { GPIOA, GPIO_PIN_4 },
+ { GPIOB, GPIO_PIN_0 },
+ { GPIOC, GPIO_PIN_1 },
+ { GPIOC, GPIO_PIN_0 },
+
{ GPIOA, GPIO_PIN_11},
{ GPIOA, GPIO_PIN_12},
{ GPIOA, GPIO_PIN_13},
{ GPIOA, GPIO_PIN_14},
{ GPIOA, GPIO_PIN_15},
- { GPIOB, GPIO_PIN_0 },
{ GPIOB, GPIO_PIN_1 },
{ GPIOB, GPIO_PIN_2 },
- { GPIOB, GPIO_PIN_3 },
- { GPIOB, GPIO_PIN_4 },
- { GPIOB, GPIO_PIN_5 },
- { GPIOB, GPIO_PIN_6 },
{ GPIOB, GPIO_PIN_7 },
- { GPIOB, GPIO_PIN_8 },
- { GPIOB, GPIO_PIN_9 },
- { GPIOB, GPIO_PIN_10},
{ GPIOB, GPIO_PIN_12},
{ GPIOB, GPIO_PIN_13},
{ GPIOB, GPIO_PIN_14},
{ GPIOB, GPIO_PIN_15},
- { GPIOC, GPIO_PIN_0 },
- { GPIOC, GPIO_PIN_1 },
{ GPIOC, GPIO_PIN_2 },
{ GPIOC, GPIO_PIN_3 },
{ GPIOC, GPIO_PIN_4 },
{ GPIOC, GPIO_PIN_5 },
{ GPIOC, GPIO_PIN_6 },
- { GPIOC, GPIO_PIN_7 },
{ GPIOC, GPIO_PIN_8 },
{ GPIOC, GPIO_PIN_9 },
{ GPIOC, GPIO_PIN_10},
diff --git a/STM32/variants/NUCLEO_F103RB/variant.h b/STM32/variants/NUCLEO_F103RB/variant.h
index f0d42d2..9ecfb4b 100644
--- a/STM32/variants/NUCLEO_F103RB/variant.h
+++ b/STM32/variants/NUCLEO_F103RB/variant.h
@@ -11,46 +11,54 @@
#define SDA PB9
#define SCL PB8
+#define A0 PA0
+#define A1 PA1
+#define A2 PA4
+#define A3 PB0
+#define A4 PC1
+#define A5 PC0
+
enum {
- PA0 ,
- PA1 ,
- PA2 ,
- PA3 ,
- PA4 ,
- PA5 ,
- PA6 ,
- PA7 ,
- PA8 ,
- PA9 ,
- PA10,
+ PA3 , // D0
+ PA2 , // D1
+ PA10, // D2
+ PB3 , // D3
+ PB5 , // D4
+ PB4 , // D5
+ PB10, // D6
+ PA8 , // D7
+ PA9 , // D8
+ PC7 , // D9
+ PB6 , // D10
+ PA7 , // D11
+ PA6 , // D12
+ PA5 , // D13
+ PB9 , // D14
+ PB8 , // D15
+ PA0 , // D16 / A0
+ PA1 , // D17 / A1
+ PA4 , // D18 / A2
+ PB0 , // D19 / A3
+ PC1 , // D20 / A4
+ PC0 , // D21 / A5
+
PA11,
PA12,
PA13,
PA14,
PA15,
- PB0 ,
PB1 ,
PB2 ,
- PB3 ,
- PB4 ,
- PB5 ,
- PB6 ,
PB7 ,
- PB8 ,
- PB9 ,
- PB10,
PB12,
PB13,
PB14,
PB15,
- PC0 ,
- PC1 ,
PC2 ,
PC3 ,
PC4 ,
PC5 ,
PC6 ,
- PC7 ,
PC8 ,
PC9 ,
PC10,
diff --git a/STM32/variants/NUCLEO_F303RE/variant.cpp b/STM32/variants/NUCLEO_F303RE/variant.cpp
index 3faa7ca..e8e38fd 100644
--- a/STM32/variants/NUCLEO_F303RE/variant.cpp
+++ b/STM32/variants/NUCLEO_F303RE/variant.cpp
@@ -2,46 +2,49 @@
#include "stm32_gpio.h"
+extern const int flash_size = 512 * 1024;
+
const stm32_port_pin_type variant_pin_list[] = {
- { GPIOA, GPIO_PIN_0 },
- { GPIOA, GPIO_PIN_1 },
- { GPIOA, GPIO_PIN_2 },
{ GPIOA, GPIO_PIN_3 },
- { GPIOA, GPIO_PIN_4 },
- { GPIOA, GPIO_PIN_5 },
- { GPIOA, GPIO_PIN_6 },
- { GPIOA, GPIO_PIN_7 },
+ { GPIOA, GPIO_PIN_2 },
+ { GPIOA, GPIO_PIN_10},
+ { GPIOB, GPIO_PIN_3 },
+ { GPIOB, GPIO_PIN_5 },
+ { GPIOB, GPIO_PIN_4 },
+ { GPIOB, GPIO_PIN_10},
{ GPIOA, GPIO_PIN_8 },
{ GPIOA, GPIO_PIN_9 },
- { GPIOA, GPIO_PIN_10},
+ { GPIOC, GPIO_PIN_7 },
+ { GPIOB, GPIO_PIN_6 },
+ { GPIOA, GPIO_PIN_7 },
+ { GPIOA, GPIO_PIN_6 },
+ { GPIOA, GPIO_PIN_5 },
+ { GPIOB, GPIO_PIN_9 },
+ { GPIOB, GPIO_PIN_8 },
+ { GPIOA, GPIO_PIN_0 },
+ { GPIOA, GPIO_PIN_1 },
+ { GPIOA, GPIO_PIN_4 },
+ { GPIOB, GPIO_PIN_0 },
+ { GPIOC, GPIO_PIN_1 },
+ { GPIOC, GPIO_PIN_0 },
+
{ GPIOA, GPIO_PIN_11},
{ GPIOA, GPIO_PIN_12},
{ GPIOA, GPIO_PIN_13},
{ GPIOA, GPIO_PIN_14},
{ GPIOA, GPIO_PIN_15},
- { GPIOB, GPIO_PIN_0 },
{ GPIOB, GPIO_PIN_1 },
{ GPIOB, GPIO_PIN_2 },
- { GPIOB, GPIO_PIN_3 },
- { GPIOB, GPIO_PIN_4 },
- { GPIOB, GPIO_PIN_5 },
- { GPIOB, GPIO_PIN_6 },
{ GPIOB, GPIO_PIN_7 },
- { GPIOB, GPIO_PIN_8 },
- { GPIOB, GPIO_PIN_9 },
- { GPIOB, GPIO_PIN_10},
{ GPIOB, GPIO_PIN_12},
{ GPIOB, GPIO_PIN_13},
{ GPIOB, GPIO_PIN_14},
{ GPIOB, GPIO_PIN_15},
- { GPIOC, GPIO_PIN_0 },
- { GPIOC, GPIO_PIN_1 },
{ GPIOC, GPIO_PIN_2 },
{ GPIOC, GPIO_PIN_3 },
{ GPIOC, GPIO_PIN_4 },
{ GPIOC, GPIO_PIN_5 },
{ GPIOC, GPIO_PIN_6 },
- { GPIOC, GPIO_PIN_7 },
{ GPIOC, GPIO_PIN_8 },
{ GPIOC, GPIO_PIN_9 },
{ GPIOC, GPIO_PIN_10},
diff --git a/STM32/variants/NUCLEO_F303RE/variant.h b/STM32/variants/NUCLEO_F303RE/variant.h
index f0d42d2..9ecfb4b 100644
--- a/STM32/variants/NUCLEO_F303RE/variant.h
+++ b/STM32/variants/NUCLEO_F303RE/variant.h
@@ -11,46 +11,54 @@
#define SDA PB9
#define SCL PB8
+#define A0 PA0
+#define A1 PA1
+#define A2 PA4
+#define A3 PB0
+#define A4 PC1
+#define A5 PC0
+
enum {
- PA0 ,
- PA1 ,
- PA2 ,
- PA3 ,
- PA4 ,
- PA5 ,
- PA6 ,
- PA7 ,
- PA8 ,
- PA9 ,
- PA10,
+ PA3 , // D0
+ PA2 , // D1
+ PA10, // D2
+ PB3 , // D3
+ PB5 , // D4
+ PB4 , // D5
+ PB10, // D6
+ PA8 , // D7
+ PA9 , // D8
+ PC7 , // D9
+ PB6 , // D10
+ PA7 , // D11
+ PA6 , // D12
+ PA5 , // D13
+ PB9 , // D14
+ PB8 , // D15
+ PA0 , // D16 / A0
+ PA1 , // D17 / A1
+ PA4 , // D18 / A2
+ PB0 , // D19 / A3
+ PC1 , // D20 / A4
+ PC0 , // D21 / A5
+
PA11,
PA12,
PA13,
PA14,
PA15,
- PB0 ,
PB1 ,
PB2 ,
- PB3 ,
- PB4 ,
- PB5 ,
- PB6 ,
PB7 ,
- PB8 ,
- PB9 ,
- PB10,
PB12,
PB13,
PB14,
PB15,
- PC0 ,
- PC1 ,
PC2 ,
PC3 ,
PC4 ,
PC5 ,
PC6 ,
- PC7 ,
PC8 ,
PC9 ,
PC10,
diff --git a/STM32/variants/NUCLEO_F411RE/variant.cpp b/STM32/variants/NUCLEO_F411RE/variant.cpp
index 2779a9c..e8e38fd 100644
--- a/STM32/variants/NUCLEO_F411RE/variant.cpp
+++ b/STM32/variants/NUCLEO_F411RE/variant.cpp
@@ -5,45 +5,46 @@
extern const int flash_size = 512 * 1024;
const stm32_port_pin_type variant_pin_list[] = {
- { GPIOA, GPIO_PIN_0 },
- { GPIOA, GPIO_PIN_1 },
- { GPIOA, GPIO_PIN_2 },
{ GPIOA, GPIO_PIN_3 },
- { GPIOA, GPIO_PIN_4 },
- { GPIOA, GPIO_PIN_5 },
- { GPIOA, GPIO_PIN_6 },
- { GPIOA, GPIO_PIN_7 },
+ { GPIOA, GPIO_PIN_2 },
+ { GPIOA, GPIO_PIN_10},
+ { GPIOB, GPIO_PIN_3 },
+ { GPIOB, GPIO_PIN_5 },
+ { GPIOB, GPIO_PIN_4 },
+ { GPIOB, GPIO_PIN_10},
{ GPIOA, GPIO_PIN_8 },
{ GPIOA, GPIO_PIN_9 },
- { GPIOA, GPIO_PIN_10},
+ { GPIOC, GPIO_PIN_7 },
+ { GPIOB, GPIO_PIN_6 },
+ { GPIOA, GPIO_PIN_7 },
+ { GPIOA, GPIO_PIN_6 },
+ { GPIOA, GPIO_PIN_5 },
+ { GPIOB, GPIO_PIN_9 },
+ { GPIOB, GPIO_PIN_8 },
+ { GPIOA, GPIO_PIN_0 },
+ { GPIOA, GPIO_PIN_1 },
+ { GPIOA, GPIO_PIN_4 },
+ { GPIOB, GPIO_PIN_0 },
+ { GPIOC, GPIO_PIN_1 },
+ { GPIOC, GPIO_PIN_0 },
+
{ GPIOA, GPIO_PIN_11},
{ GPIOA, GPIO_PIN_12},
{ GPIOA, GPIO_PIN_13},
{ GPIOA, GPIO_PIN_14},
{ GPIOA, GPIO_PIN_15},
- { GPIOB, GPIO_PIN_0 },
{ GPIOB, GPIO_PIN_1 },
{ GPIOB, GPIO_PIN_2 },
- { GPIOB, GPIO_PIN_3 },
- { GPIOB, GPIO_PIN_4 },
- { GPIOB, GPIO_PIN_5 },
- { GPIOB, GPIO_PIN_6 },
{ GPIOB, GPIO_PIN_7 },
- { GPIOB, GPIO_PIN_8 },
- { GPIOB, GPIO_PIN_9 },
- { GPIOB, GPIO_PIN_10},
{ GPIOB, GPIO_PIN_12},
{ GPIOB, GPIO_PIN_13},
{ GPIOB, GPIO_PIN_14},
{ GPIOB, GPIO_PIN_15},
- { GPIOC, GPIO_PIN_0 },
- { GPIOC, GPIO_PIN_1 },
{ GPIOC, GPIO_PIN_2 },
{ GPIOC, GPIO_PIN_3 },
{ GPIOC, GPIO_PIN_4 },
{ GPIOC, GPIO_PIN_5 },
{ GPIOC, GPIO_PIN_6 },
- { GPIOC, GPIO_PIN_7 },
{ GPIOC, GPIO_PIN_8 },
{ GPIOC, GPIO_PIN_9 },
{ GPIOC, GPIO_PIN_10},
diff --git a/STM32/variants/NUCLEO_F411RE/variant.h b/STM32/variants/NUCLEO_F411RE/variant.h
index f0d42d2..9ecfb4b 100644
--- a/STM32/variants/NUCLEO_F411RE/variant.h
+++ b/STM32/variants/NUCLEO_F411RE/variant.h
@@ -11,46 +11,54 @@
#define SDA PB9
#define SCL PB8
+#define A0 PA0
+#define A1 PA1
+#define A2 PA4
+#define A3 PB0
+#define A4 PC1
+#define A5 PC0
+
enum {
- PA0 ,
- PA1 ,
- PA2 ,
- PA3 ,
- PA4 ,
- PA5 ,
- PA6 ,
- PA7 ,
- PA8 ,
- PA9 ,
- PA10,
+ PA3 , // D0
+ PA2 , // D1
+ PA10, // D2
+ PB3 , // D3
+ PB5 , // D4
+ PB4 , // D5
+ PB10, // D6
+ PA8 , // D7
+ PA9 , // D8
+ PC7 , // D9
+ PB6 , // D10
+ PA7 , // D11
+ PA6 , // D12
+ PA5 , // D13
+ PB9 , // D14
+ PB8 , // D15
+ PA0 , // D16 / A0
+ PA1 , // D17 / A1
+ PA4 , // D18 / A2
+ PB0 , // D19 / A3
+ PC1 , // D20 / A4
+ PC0 , // D21 / A5
+
PA11,
PA12,
PA13,
PA14,
PA15,
- PB0 ,
PB1 ,
PB2 ,
- PB3 ,
- PB4 ,
- PB5 ,
- PB6 ,
PB7 ,
- PB8 ,
- PB9 ,
- PB10,
PB12,
PB13,
PB14,
PB15,
- PC0 ,
- PC1 ,
PC2 ,
PC3 ,
PC4 ,
PC5 ,
PC6 ,
- PC7 ,
PC8 ,
PC9 ,
PC10,
diff --git a/STM32/variants/NUCLEO_L053R8/variant.cpp b/STM32/variants/NUCLEO_L053R8/variant.cpp
index 3faa7ca..e8e38fd 100644
--- a/STM32/variants/NUCLEO_L053R8/variant.cpp
+++ b/STM32/variants/NUCLEO_L053R8/variant.cpp
@@ -2,46 +2,49 @@
#include "stm32_gpio.h"
+extern const int flash_size = 512 * 1024;
+
const stm32_port_pin_type variant_pin_list[] = {
- { GPIOA, GPIO_PIN_0 },
- { GPIOA, GPIO_PIN_1 },
- { GPIOA, GPIO_PIN_2 },
{ GPIOA, GPIO_PIN_3 },
- { GPIOA, GPIO_PIN_4 },
- { GPIOA, GPIO_PIN_5 },
- { GPIOA, GPIO_PIN_6 },
- { GPIOA, GPIO_PIN_7 },
+ { GPIOA, GPIO_PIN_2 },
+ { GPIOA, GPIO_PIN_10},
+ { GPIOB, GPIO_PIN_3 },
+ { GPIOB, GPIO_PIN_5 },
+ { GPIOB, GPIO_PIN_4 },
+ { GPIOB, GPIO_PIN_10},
{ GPIOA, GPIO_PIN_8 },
{ GPIOA, GPIO_PIN_9 },
- { GPIOA, GPIO_PIN_10},
+ { GPIOC, GPIO_PIN_7 },
+ { GPIOB, GPIO_PIN_6 },
+ { GPIOA, GPIO_PIN_7 },
+ { GPIOA, GPIO_PIN_6 },
+ { GPIOA, GPIO_PIN_5 },
+ { GPIOB, GPIO_PIN_9 },
+ { GPIOB, GPIO_PIN_8 },
+ { GPIOA, GPIO_PIN_0 },
+ { GPIOA, GPIO_PIN_1 },
+ { GPIOA, GPIO_PIN_4 },
+ { GPIOB, GPIO_PIN_0 },
+ { GPIOC, GPIO_PIN_1 },
+ { GPIOC, GPIO_PIN_0 },
+
{ GPIOA, GPIO_PIN_11},
{ GPIOA, GPIO_PIN_12},
{ GPIOA, GPIO_PIN_13},
{ GPIOA, GPIO_PIN_14},
{ GPIOA, GPIO_PIN_15},
- { GPIOB, GPIO_PIN_0 },
{ GPIOB, GPIO_PIN_1 },
{ GPIOB, GPIO_PIN_2 },
- { GPIOB, GPIO_PIN_3 },
- { GPIOB, GPIO_PIN_4 },
- { GPIOB, GPIO_PIN_5 },
- { GPIOB, GPIO_PIN_6 },
{ GPIOB, GPIO_PIN_7 },
- { GPIOB, GPIO_PIN_8 },
- { GPIOB, GPIO_PIN_9 },
- { GPIOB, GPIO_PIN_10},
{ GPIOB, GPIO_PIN_12},
{ GPIOB, GPIO_PIN_13},
{ GPIOB, GPIO_PIN_14},
{ GPIOB, GPIO_PIN_15},
- { GPIOC, GPIO_PIN_0 },
- { GPIOC, GPIO_PIN_1 },
{ GPIOC, GPIO_PIN_2 },
{ GPIOC, GPIO_PIN_3 },
{ GPIOC, GPIO_PIN_4 },
{ GPIOC, GPIO_PIN_5 },
{ GPIOC, GPIO_PIN_6 },
- { GPIOC, GPIO_PIN_7 },
{ GPIOC, GPIO_PIN_8 },
{ GPIOC, GPIO_PIN_9 },
{ GPIOC, GPIO_PIN_10},
diff --git a/STM32/variants/NUCLEO_L053R8/variant.h b/STM32/variants/NUCLEO_L053R8/variant.h
index f0d42d2..9ecfb4b 100644
--- a/STM32/variants/NUCLEO_L053R8/variant.h
+++ b/STM32/variants/NUCLEO_L053R8/variant.h
@@ -11,46 +11,54 @@
#define SDA PB9
#define SCL PB8
+#define A0 PA0
+#define A1 PA1
+#define A2 PA4
+#define A3 PB0
+#define A4 PC1
+#define A5 PC0
+
enum {
- PA0 ,
- PA1 ,
- PA2 ,
- PA3 ,
- PA4 ,
- PA5 ,
- PA6 ,
- PA7 ,
- PA8 ,
- PA9 ,
- PA10,
+ PA3 , // D0
+ PA2 , // D1
+ PA10, // D2
+ PB3 , // D3
+ PB5 , // D4
+ PB4 , // D5
+ PB10, // D6
+ PA8 , // D7
+ PA9 , // D8
+ PC7 , // D9
+ PB6 , // D10
+ PA7 , // D11
+ PA6 , // D12
+ PA5 , // D13
+ PB9 , // D14
+ PB8 , // D15
+ PA0 , // D16 / A0
+ PA1 , // D17 / A1
+ PA4 , // D18 / A2
+ PB0 , // D19 / A3
+ PC1 , // D20 / A4
+ PC0 , // D21 / A5
+
PA11,
PA12,
PA13,
PA14,
PA15,
- PB0 ,
PB1 ,
PB2 ,
- PB3 ,
- PB4 ,
- PB5 ,
- PB6 ,
PB7 ,
- PB8 ,
- PB9 ,
- PB10,
PB12,
PB13,
PB14,
PB15,
- PC0 ,
- PC1 ,
PC2 ,
PC3 ,
PC4 ,
PC5 ,
PC6 ,
- PC7 ,
PC8 ,
PC9 ,
PC10,
diff --git a/STM32/variants/NUCLEO_L152RE/variant.cpp b/STM32/variants/NUCLEO_L152RE/variant.cpp
index 3faa7ca..e8e38fd 100644
--- a/STM32/variants/NUCLEO_L152RE/variant.cpp
+++ b/STM32/variants/NUCLEO_L152RE/variant.cpp
@@ -2,46 +2,49 @@
#include "stm32_gpio.h"
+extern const int flash_size = 512 * 1024;
+
const stm32_port_pin_type variant_pin_list[] = {
- { GPIOA, GPIO_PIN_0 },
- { GPIOA, GPIO_PIN_1 },
- { GPIOA, GPIO_PIN_2 },
{ GPIOA, GPIO_PIN_3 },
- { GPIOA, GPIO_PIN_4 },
- { GPIOA, GPIO_PIN_5 },
- { GPIOA, GPIO_PIN_6 },
- { GPIOA, GPIO_PIN_7 },
+ { GPIOA, GPIO_PIN_2 },
+ { GPIOA, GPIO_PIN_10},
+ { GPIOB, GPIO_PIN_3 },
+ { GPIOB, GPIO_PIN_5 },
+ { GPIOB, GPIO_PIN_4 },
+ { GPIOB, GPIO_PIN_10},
{ GPIOA, GPIO_PIN_8 },
{ GPIOA, GPIO_PIN_9 },
- { GPIOA, GPIO_PIN_10},
+ { GPIOC, GPIO_PIN_7 },
+ { GPIOB, GPIO_PIN_6 },
+ { GPIOA, GPIO_PIN_7 },
+ { GPIOA, GPIO_PIN_6 },
+ { GPIOA, GPIO_PIN_5 },
+ { GPIOB, GPIO_PIN_9 },
+ { GPIOB, GPIO_PIN_8 },
+ { GPIOA, GPIO_PIN_0 },
+ { GPIOA, GPIO_PIN_1 },
+ { GPIOA, GPIO_PIN_4 },
+ { GPIOB, GPIO_PIN_0 },
+ { GPIOC, GPIO_PIN_1 },
+ { GPIOC, GPIO_PIN_0 },
+
{ GPIOA, GPIO_PIN_11},
{ GPIOA, GPIO_PIN_12},
{ GPIOA, GPIO_PIN_13},
{ GPIOA, GPIO_PIN_14},
{ GPIOA, GPIO_PIN_15},
- { GPIOB, GPIO_PIN_0 },
{ GPIOB, GPIO_PIN_1 },
{ GPIOB, GPIO_PIN_2 },
- { GPIOB, GPIO_PIN_3 },
- { GPIOB, GPIO_PIN_4 },
- { GPIOB, GPIO_PIN_5 },
- { GPIOB, GPIO_PIN_6 },
{ GPIOB, GPIO_PIN_7 },
- { GPIOB, GPIO_PIN_8 },
- { GPIOB, GPIO_PIN_9 },
- { GPIOB, GPIO_PIN_10},
{ GPIOB, GPIO_PIN_12},
{ GPIOB, GPIO_PIN_13},
{ GPIOB, GPIO_PIN_14},
{ GPIOB, GPIO_PIN_15},
- { GPIOC, GPIO_PIN_0 },
- { GPIOC, GPIO_PIN_1 },
{ GPIOC, GPIO_PIN_2 },
{ GPIOC, GPIO_PIN_3 },
{ GPIOC, GPIO_PIN_4 },
{ GPIOC, GPIO_PIN_5 },
{ GPIOC, GPIO_PIN_6 },
- { GPIOC, GPIO_PIN_7 },
{ GPIOC, GPIO_PIN_8 },
{ GPIOC, GPIO_PIN_9 },
{ GPIOC, GPIO_PIN_10},
diff --git a/STM32/variants/NUCLEO_L152RE/variant.h b/STM32/variants/NUCLEO_L152RE/variant.h
index f0d42d2..9ecfb4b 100644
--- a/STM32/variants/NUCLEO_L152RE/variant.h
+++ b/STM32/variants/NUCLEO_L152RE/variant.h
@@ -11,46 +11,54 @@
#define SDA PB9
#define SCL PB8
+#define A0 PA0
+#define A1 PA1
+#define A2 PA4
+#define A3 PB0
+#define A4 PC1
+#define A5 PC0
+
enum {
- PA0 ,
- PA1 ,
- PA2 ,
- PA3 ,
- PA4 ,
- PA5 ,
- PA6 ,
- PA7 ,
- PA8 ,
- PA9 ,
- PA10,
+ PA3 , // D0
+ PA2 , // D1
+ PA10, // D2
+ PB3 , // D3
+ PB5 , // D4
+ PB4 , // D5
+ PB10, // D6
+ PA8 , // D7
+ PA9 , // D8
+ PC7 , // D9
+ PB6 , // D10
+ PA7 , // D11
+ PA6 , // D12
+ PA5 , // D13
+ PB9 , // D14
+ PB8 , // D15
+ PA0 , // D16 / A0
+ PA1 , // D17 / A1
+ PA4 , // D18 / A2
+ PB0 , // D19 / A3
+ PC1 , // D20 / A4
+ PC0 , // D21 / A5
+
PA11,
PA12,
PA13,
PA14,
PA15,
- PB0 ,
PB1 ,
PB2 ,
- PB3 ,
- PB4 ,
- PB5 ,
- PB6 ,
PB7 ,
- PB8 ,
- PB9 ,
- PB10,
PB12,
PB13,
PB14,
PB15,
- PC0 ,
- PC1 ,
PC2 ,
PC3 ,
PC4 ,
PC5 ,
PC6 ,
- PC7 ,
PC8 ,
PC9 ,
PC10,
diff --git a/STM32/variants/NUCLEO_L476RG/variant.cpp b/STM32/variants/NUCLEO_L476RG/variant.cpp
index 3faa7ca..e8e38fd 100644
--- a/STM32/variants/NUCLEO_L476RG/variant.cpp
+++ b/STM32/variants/NUCLEO_L476RG/variant.cpp
@@ -2,46 +2,49 @@
#include "stm32_gpio.h"
+extern const int flash_size = 512 * 1024;
+
const stm32_port_pin_type variant_pin_list[] = {
- { GPIOA, GPIO_PIN_0 },
- { GPIOA, GPIO_PIN_1 },
- { GPIOA, GPIO_PIN_2 },
{ GPIOA, GPIO_PIN_3 },
- { GPIOA, GPIO_PIN_4 },
- { GPIOA, GPIO_PIN_5 },
- { GPIOA, GPIO_PIN_6 },
- { GPIOA, GPIO_PIN_7 },
+ { GPIOA, GPIO_PIN_2 },
+ { GPIOA, GPIO_PIN_10},
+ { GPIOB, GPIO_PIN_3 },
+ { GPIOB, GPIO_PIN_5 },
+ { GPIOB, GPIO_PIN_4 },
+ { GPIOB, GPIO_PIN_10},
{ GPIOA, GPIO_PIN_8 },
{ GPIOA, GPIO_PIN_9 },
- { GPIOA, GPIO_PIN_10},
+ { GPIOC, GPIO_PIN_7 },
+ { GPIOB, GPIO_PIN_6 },
+ { GPIOA, GPIO_PIN_7 },
+ { GPIOA, GPIO_PIN_6 },
+ { GPIOA, GPIO_PIN_5 },
+ { GPIOB, GPIO_PIN_9 },
+ { GPIOB, GPIO_PIN_8 },
+ { GPIOA, GPIO_PIN_0 },
+ { GPIOA, GPIO_PIN_1 },
+ { GPIOA, GPIO_PIN_4 },
+ { GPIOB, GPIO_PIN_0 },
+ { GPIOC, GPIO_PIN_1 },
+ { GPIOC, GPIO_PIN_0 },
+
{ GPIOA, GPIO_PIN_11},
{ GPIOA, GPIO_PIN_12},
{ GPIOA, GPIO_PIN_13},
{ GPIOA, GPIO_PIN_14},
{ GPIOA, GPIO_PIN_15},
- { GPIOB, GPIO_PIN_0 },
{ GPIOB, GPIO_PIN_1 },
{ GPIOB, GPIO_PIN_2 },
- { GPIOB, GPIO_PIN_3 },
- { GPIOB, GPIO_PIN_4 },
- { GPIOB, GPIO_PIN_5 },
- { GPIOB, GPIO_PIN_6 },
{ GPIOB, GPIO_PIN_7 },
- { GPIOB, GPIO_PIN_8 },
- { GPIOB, GPIO_PIN_9 },
- { GPIOB, GPIO_PIN_10},
{ GPIOB, GPIO_PIN_12},
{ GPIOB, GPIO_PIN_13},
{ GPIOB, GPIO_PIN_14},
{ GPIOB, GPIO_PIN_15},
- { GPIOC, GPIO_PIN_0 },
- { GPIOC, GPIO_PIN_1 },
{ GPIOC, GPIO_PIN_2 },
{ GPIOC, GPIO_PIN_3 },
{ GPIOC, GPIO_PIN_4 },
{ GPIOC, GPIO_PIN_5 },
{ GPIOC, GPIO_PIN_6 },
- { GPIOC, GPIO_PIN_7 },
{ GPIOC, GPIO_PIN_8 },
{ GPIOC, GPIO_PIN_9 },
{ GPIOC, GPIO_PIN_10},
diff --git a/STM32/variants/NUCLEO_L476RG/variant.h b/STM32/variants/NUCLEO_L476RG/variant.h
index f0d42d2..9ecfb4b 100644
--- a/STM32/variants/NUCLEO_L476RG/variant.h
+++ b/STM32/variants/NUCLEO_L476RG/variant.h
@@ -11,46 +11,54 @@
#define SDA PB9
#define SCL PB8
+#define A0 PA0
+#define A1 PA1
+#define A2 PA4
+#define A3 PB0
+#define A4 PC1
+#define A5 PC0
+
enum {
- PA0 ,
- PA1 ,
- PA2 ,
- PA3 ,
- PA4 ,
- PA5 ,
- PA6 ,
- PA7 ,
- PA8 ,
- PA9 ,
- PA10,
+ PA3 , // D0
+ PA2 , // D1
+ PA10, // D2
+ PB3 , // D3
+ PB5 , // D4
+ PB4 , // D5
+ PB10, // D6
+ PA8 , // D7
+ PA9 , // D8
+ PC7 , // D9
+ PB6 , // D10
+ PA7 , // D11
+ PA6 , // D12
+ PA5 , // D13
+ PB9 , // D14
+ PB8 , // D15
+ PA0 , // D16 / A0
+ PA1 , // D17 / A1
+ PA4 , // D18 / A2
+ PB0 , // D19 / A3
+ PC1 , // D20 / A4
+ PC0 , // D21 / A5
+
PA11,
PA12,
PA13,
PA14,
PA15,
- PB0 ,
PB1 ,
PB2 ,
- PB3 ,
- PB4 ,
- PB5 ,
- PB6 ,
PB7 ,
- PB8 ,
- PB9 ,
- PB10,
PB12,
PB13,
PB14,
PB15,
- PC0 ,
- PC1 ,
PC2 ,
PC3 ,
PC4 ,
PC5 ,
PC6 ,
- PC7 ,
PC8 ,
PC9 ,
PC10,
diff --git a/docs/add_board/index.html b/docs/add_board/index.html
index 776145d..4fba879 100644
--- a/docs/add_board/index.html
+++ b/docs/add_board/index.html
@@ -197,8 +197,6 @@
8. Run the blink example on your new board
- 9. Run the tests on the board to check if it is working
-
@@ -206,17 +204,51 @@
Add your board:
-
TODO explain all steps
1. Create a copy of the STM32/variants/TEMPLATE folder with a name of your choice.
-
TODO make TEMPLATE folder
+
TODO create TEMPLATE, for now just use an existing one
2. Edit the ldscript.ld file
+
+- Change the _estack to point to the end of RAM
+- FLASH LENGTH to be the size of RAM of the microcontroller
+- RAM LENGTH to be the size of RAM of the microcontroller
+
+
TODO CCRAM? SDRAM?
3. Edit the variant.h file
+
+- Copy the
enum {
... from system/STM32XX/stm32_chip/stm32_STM32XXXXXX.h
file.
+- If the board has pin name - pin number assigments (for example arduino headers), rearrange the enum accordingly.
+- Change LED_BUILTIN, MOSI, MISO... macros to point to the primary LED, primary SPI, primary I2C pins.
+- Add board specific macros if the board has extra leds, buttons, SPI CS select lines etc...
+
4. Edit the variant.cpp file
+
+- Copy the
const stm32_port_pin_type variant_pin_list[] = {
from system/STM32XX/stm32_chip/stm32_STM32XXXXXX.h
file.
+- Rearrange to be the same as
enum {
in variant.h
+
5. Edit the systemclock_config.c file
+
+- Run STM32CubeMX, select the chip for your board
+- If the board has external crystal, set RCC HSE to crystal. In clock configuration, set PLL Source to HSE, set HSE to the frequency of the board crystal.
+- Set some peripherals (SPI, I2C, SDIO, USB, ...), so that the clock configuration will generate extra code needed for those peripherals, and bounds check the frequencies.
+- Go to clock configuration, set everything to maximum :), let CubeMX figure out the rest.
+- Click generate. Set toolchain/IDE to SW4STM32. Clik OK
+- From the generated src/main.c, copy
void SystemClock_Config(void) {
into your variant/.../systemclock_config.c
+
6. Edit the boards.txt file
+
TODO create template. For now, copy an existing board
+
+- Rename the board
+- Change
build.mcu=
to your cortex-mX version
+- Change
build.series=
to STM32XX, where XX is the chip series
+- Change
build.extra_flags=-DSTM32XXXXXX
to be the exact chip version
+- Change
upload.maximum_size=
and upload.maximum_data_size=
to the RAM/FLASH size of the chip
+- If the external crystal is not the board default in
system/STM32XX/HAL_SRC/system_stm32XXxx.c
, add -DHSE_VALUE=8000000
to xxx.build.extra_flags
+- TODO explain upload / usb / serial menu options
+
7. Restart
+
Restart Arduino IDE
8. Run the blink example on your new board
-
9. Run the tests on the board to check if it is working
+Run examples / basic / blink