spi: Add DMA settings for L0 / L4
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ce2b0f2869
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@ -42,6 +42,11 @@
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#define SDIO_IRQHandler SDMMC1_IRQHandler
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#endif
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// Fix typo for L4
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#ifndef HAL_SD_CardStateTypeDef
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#define HAL_SD_CardStateTypeDef HAL_SD_CardStateTypedef
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#define HAL_SD_CardStatusTypeDef HAL_SD_CardStatusTypedef
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#endif
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/*
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* Aux function. Doesn't exist in HAL. Allows to pre-erase blocks when the count of blocks to write is known.
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@ -27,6 +27,10 @@
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#include "stm32_dma_F2F4F7.h"
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#elif defined(STM32F0) || defined(STM32F1) || defined(STM32F3) || defined(STM32L1)
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#include "stm32_dma_F0F1F3L1.h"
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#elif defined(STM32L0)
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#include "stm32_dma_L0.h"
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#elif defined(STM32L4)
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#include "stm32_dma_L4.h"
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#else
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#error "Unknown chip"
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#endif
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@ -0,0 +1,34 @@
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#define DMA1_Channel2_IRQn DMA1_Channel2_3_IRQn
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#define DMA1_Channel3_IRQn DMA1_Channel2_3_IRQn
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#define DMA1_Channel4_IRQn DMA1_Channel4_5_6_7_IRQn
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#define DMA1_Channel5_IRQn DMA1_Channel4_5_6_7_IRQn
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#define DMA1_Channel6_IRQn DMA1_Channel4_5_6_7_IRQn
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#define DMA1_Channel7_IRQn DMA1_Channel4_5_6_7_IRQn
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typedef struct {
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void *periphInstance;
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dmaRequest request;
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DMA_Channel_TypeDef *dmaInstance;
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uint8_t dmaHandlesIndex;
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uint8_t requestNumber;
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uint8_t irqN;
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} dma_request_to_instance_t;
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const dma_request_to_instance_t dmaRequestToStream[] = {
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{SPI1, SPI_TX, DMA1_Channel3, 3, 1, DMA1_Channel3_IRQn},
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{SPI1, SPI_RX, DMA1_Channel2, 2, 1, DMA1_Channel2_IRQn},
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#ifdef SPI2
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{SPI2, SPI_TX, DMA1_Channel5, 5, 2, DMA1_Channel5_IRQn},
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{SPI2, SPI_RX, DMA1_Channel4, 4, 2, DMA1_Channel4_IRQn},
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#endif
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};
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inline static void setDmaInstance(DMA_HandleTypeDef *handle, dma_request_to_instance_t dmaRequestToStream) {
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handle->Instance = dmaRequestToStream.dmaInstance;
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handle->Init.Request = dmaRequestToStream.requestNumber;
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}
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@ -0,0 +1,35 @@
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typedef struct {
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void *periphInstance;
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dmaRequest request;
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DMA_Channel_TypeDef *dmaInstance;
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uint8_t dmaHandlesIndex;
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uint8_t requestNumber;
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uint8_t irqN;
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} dma_request_to_instance_t;
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const dma_request_to_instance_t dmaRequestToStream[] = {
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{SPI1, SPI_TX, DMA1_Channel3, 3, 1, DMA1_Channel3_IRQn},
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{SPI1, SPI_RX, DMA1_Channel2, 2, 1, DMA1_Channel2_IRQn},
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#ifdef SPI2
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{SPI2, SPI_TX, DMA1_Channel5, 5, 1, DMA1_Channel5_IRQn},
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{SPI2, SPI_RX, DMA1_Channel4, 4, 1, DMA1_Channel4_IRQn},
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#endif
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#ifdef SPI3
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{SPI3, SPI_TX, DMA2_Channel2, 2 + 8, 3, DMA2_Channel2_IRQn},
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{SPI3, SPI_RX, DMA2_Channel1, 1 + 8, 3, DMA2_Channel1_IRQn},
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#endif
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#if defined(SDMMC1) && defined(SD_InitTypeDef)
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{SDMMC1, SDIO_RXTX, DMA2_Channel4, 6 + 8, 7, DMA2_Channel4_IRQn},
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{SDMMC1, SDIO_RXTX, DMA2_Channel5, 3 + 8, 7, DMA2_Channel5_IRQn},
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#endif
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};
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inline static void setDmaInstance(DMA_HandleTypeDef *handle, dma_request_to_instance_t dmaRequestToStream) {
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handle->Instance = dmaRequestToStream.dmaInstance;
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handle->Init.Request = dmaRequestToStream.requestNumber;
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}
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