documentation: regenerate board documentation

This commit is contained in:
Daniel Fekete 2017-07-16 10:47:15 +02:00
parent f1b0ebeb24
commit da1e5c90b2
50 changed files with 277 additions and 277 deletions

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@ -502,7 +502,7 @@
<tr>
<td>UART4</td>
<td><strong>PA1</strong>, PC11</td>
<td><strong>PC10</strong></td>
<td><strong>PA0</strong>, PC10</td>
<td></td>
</tr>
<tr>
@ -591,7 +591,7 @@
</tr>
<tr>
<td>TIM2</td>
<td><strong>PA5</strong>, PA15</td>
<td><strong>PA0</strong>, PA5, PA15</td>
<td><strong>PA1</strong>, PB3</td>
<td><strong>PA2</strong>, PB10</td>
<td><strong>PA3</strong>, PB11</td>
@ -903,7 +903,7 @@
<tbody>
<tr>
<td>PA0</td>
<td>ADC1_IN0, ADC2_IN0, ADC3_IN0, ETH_CRS, SYS_WKUP, TIM5_CH1, TIM8_ETR</td>
<td>ADC1_IN0, ADC2_IN0, ADC3_IN0, ETH_CRS, SYS_WKUP, TIM2_CH1, TIM2_ETR, TIM5_CH1, TIM8_ETR, UART4_TX, USART2_CTS</td>
<td><strong>USER_BUTTON0</strong></td>
</tr>
<tr>

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@ -502,7 +502,7 @@
<tr>
<td>UART4</td>
<td><strong>PA1</strong>, PC11</td>
<td><strong>PC10</strong></td>
<td><strong>PA0</strong>, PC10</td>
<td></td>
</tr>
<tr>
@ -591,7 +591,7 @@
</tr>
<tr>
<td>TIM2</td>
<td><strong>PA5</strong>, PA15</td>
<td><strong>PA0</strong>, PA5, PA15</td>
<td><strong>PA1</strong>, PB3</td>
<td><strong>PA2</strong>, PB10</td>
<td><strong>PA3</strong>, PB11</td>
@ -943,7 +943,7 @@
<tbody>
<tr>
<td>PA0</td>
<td>ADC1_IN0, ADC2_IN0, ADC3_IN0, ETH_CRS, SYS_WKUP, TIM5_CH1, TIM8_ETR</td>
<td>ADC1_IN0, ADC2_IN0, ADC3_IN0, ETH_CRS, SYS_WKUP, TIM2_CH1, TIM2_ETR, TIM5_CH1, TIM8_ETR, UART4_TX, USART2_CTS</td>
<td></td>
</tr>
<tr>

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@ -502,7 +502,7 @@
<tr>
<td>UART4</td>
<td><strong>PA1</strong>, PC11</td>
<td><strong>PC10</strong></td>
<td><strong>PA0</strong>, PC10</td>
<td></td>
</tr>
<tr>
@ -591,7 +591,7 @@
</tr>
<tr>
<td>TIM2</td>
<td><strong>PA5</strong>, PA15</td>
<td><strong>PA0</strong>, PA5, PA15</td>
<td><strong>PA1</strong>, PB3</td>
<td><strong>PA2</strong>, PB10</td>
<td><strong>PA3</strong>, PB11</td>
@ -943,7 +943,7 @@
<tbody>
<tr>
<td>PA0</td>
<td>ADC1_IN0, ADC2_IN0, ADC3_IN0, ETH_CRS, SYS_WKUP, TIM5_CH1, TIM8_ETR</td>
<td>ADC1_IN0, ADC2_IN0, ADC3_IN0, ETH_CRS, SYS_WKUP, TIM2_CH1, TIM2_ETR, TIM5_CH1, TIM8_ETR, UART4_TX, USART2_CTS</td>
<td></td>
</tr>
<tr>

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@ -579,7 +579,7 @@
</tr>
<tr>
<td>TIM2</td>
<td><strong>PA15</strong></td>
<td><strong>PA0</strong>, PA15</td>
<td><strong>PA1</strong>, PB3</td>
<td><strong>PA2</strong>, PB10</td>
<td><strong>PA3</strong>, PB11</td>
@ -843,7 +843,7 @@
<tbody>
<tr>
<td>PA0</td>
<td>ADC1_IN0, ADC2_IN0, ADC3_IN0, SYS_WKUP, TIM5_CH1, TIM8_ETR</td>
<td>ADC1_IN0, ADC2_IN0, ADC3_IN0, SYS_WKUP, TIM2_CH1, TIM2_ETR, TIM5_CH1, TIM8_ETR, USART2_CTS</td>
<td></td>
</tr>
<tr>

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@ -579,7 +579,7 @@
</tr>
<tr>
<td>TIM2</td>
<td><strong>PA15</strong></td>
<td><strong>PA0</strong>, PA15</td>
<td><strong>PA1</strong>, PB3</td>
<td><strong>PA2</strong>, PB10</td>
<td><strong>PA3</strong>, PB11</td>
@ -868,7 +868,7 @@
<tbody>
<tr>
<td>PA0</td>
<td>ADC1_IN0, ADC2_IN0, ADC3_IN0, SYS_WKUP, TIM5_CH1, TIM8_ETR</td>
<td>ADC1_IN0, ADC2_IN0, ADC3_IN0, SYS_WKUP, TIM2_CH1, TIM2_ETR, TIM5_CH1, TIM8_ETR, USART2_CTS</td>
<td></td>
</tr>
<tr>

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@ -579,7 +579,7 @@
</tr>
<tr>
<td>TIM2</td>
<td><strong>PA15</strong></td>
<td><strong>PA0</strong>, PA15</td>
<td><strong>PA1</strong>, PB3</td>
<td><strong>PA2</strong>, PB10</td>
<td><strong>PA3</strong>, PB11</td>
@ -916,7 +916,7 @@
<tbody>
<tr>
<td>PA0</td>
<td>ADC1_IN0, ADC2_IN0, ADC3_IN0, SYS_WKUP, TIM5_CH1, TIM8_ETR</td>
<td>ADC1_IN0, ADC2_IN0, ADC3_IN0, SYS_WKUP, TIM2_CH1, TIM2_ETR, TIM5_CH1, TIM8_ETR, USART2_CTS</td>
<td></td>
</tr>
<tr>

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@ -527,7 +527,7 @@
</tr>
<tr>
<td>TIM2</td>
<td><strong>PA15</strong></td>
<td><strong>PA0</strong>, PA15</td>
<td><strong>PA1</strong>, PB3</td>
<td><strong>PA2</strong>, PB10</td>
<td><strong>PA3</strong>, PB11</td>
@ -675,7 +675,7 @@
<tbody>
<tr>
<td>PA0</td>
<td>ADC1_IN0, ADC2_IN0, SYS_WKUP, USART2_CTS</td>
<td>ADC1_IN0, ADC2_IN0, SYS_WKUP, TIM2_CH1, TIM2_ETR, USART2_CTS</td>
<td></td>
</tr>
<tr>

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@ -476,8 +476,8 @@
</tr>
<tr>
<td>I2C2</td>
<td><strong>PA10</strong></td>
<td><strong>PA9</strong>, PF6</td>
<td><strong>PA10</strong>, PF0</td>
<td><strong>PA9</strong>, PF1, PF6</td>
<td></td>
</tr>
</tbody>
@ -573,7 +573,7 @@
<td>TIM1</td>
<td><strong>PA8</strong>, PE9, <span style="text-decoration: overline">PA7</span>, <span style="text-decoration: overline">PA11</span>, <span style="text-decoration: overline">PB13</span>, <span style="text-decoration: overline">PC13</span>, <span style="text-decoration: overline">PE8</span></td>
<td><strong>PA9</strong>, PE11, <span style="text-decoration: overline">PA12</span>, <span style="text-decoration: overline">PB0</span>, <span style="text-decoration: overline">PB14</span>, <span style="text-decoration: overline">PE10</span></td>
<td><strong>PA10</strong>, PE13, <span style="text-decoration: overline">PB1</span>, <span style="text-decoration: overline">PB15</span>, <span style="text-decoration: overline">PE12</span></td>
<td><strong>PA10</strong>, PE13, <span style="text-decoration: overline">PB1</span>, <span style="text-decoration: overline">PB15</span>, <span style="text-decoration: overline">PE12</span>, <span style="text-decoration: overline">PF0</span></td>
<td><strong>PA11</strong>, PE14</td>
<td></td>
</tr>
@ -1309,12 +1309,12 @@
</tr>
<tr>
<td>PF0</td>
<td>RCC_OSC_IN</td>
<td>I2C2_SDA, RCC_OSC_IN, TIM1_CH3N</td>
<td></td>
</tr>
<tr>
<td>PF1</td>
<td>RCC_OSC_OUT</td>
<td>I2C2_SCL, RCC_OSC_OUT</td>
<td></td>
</tr>
<tr>

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@ -502,7 +502,7 @@
<tr>
<td>UART4</td>
<td><strong>PA1</strong>, PC11</td>
<td><strong>PC10</strong></td>
<td><strong>PA0</strong>, PC10</td>
<td></td>
</tr>
<tr>
@ -591,7 +591,7 @@
</tr>
<tr>
<td>TIM2</td>
<td><strong>PA5</strong>, PA15</td>
<td><strong>PA0</strong>, PA5, PA15</td>
<td><strong>PA1</strong>, PB3</td>
<td><strong>PA2</strong>, PB10</td>
<td><strong>PA3</strong>, PB11</td>
@ -903,7 +903,7 @@
<tbody>
<tr>
<td>PA0</td>
<td>ADC1_IN0, ADC2_IN0, ADC3_IN0, ETH_CRS, SYS_WKUP, TIM5_CH1, TIM8_ETR</td>
<td>ADC1_IN0, ADC2_IN0, ADC3_IN0, ETH_CRS, SYS_WKUP, TIM2_CH1, TIM2_ETR, TIM5_CH1, TIM8_ETR, UART4_TX, USART2_CTS</td>
<td><strong>USER_BTN</strong></td>
</tr>
<tr>

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@ -436,9 +436,9 @@
<tbody>
<tr>
<td>SPI1</td>
<td>28 (PA7), <strong>39 (PB5)</strong></td>
<td>27 (PA6), <strong>3 (PB4)</strong></td>
<td>26 (PA5), <strong>38 (PB3)</strong></td>
<td>28 (PA7), 39 (PB5)</td>
<td>27 (PA6), 3 (PB4)</td>
<td>26 (PA5), 38 (PB3)</td>
<td></td>
</tr>
<tr>
@ -529,7 +529,7 @@
<tr>
<td>UART4</td>
<td><strong>22 (PA1)</strong>, 55 (PC11)</td>
<td><strong>54 (PC10)</strong></td>
<td><strong>16 (PA0)</strong>, 54 (PC10)</td>
<td></td>
</tr>
<tr>
@ -638,7 +638,7 @@
</tr>
<tr>
<td>TIM2</td>
<td><strong>26 (PA5)</strong>, 9 (PA15)</td>
<td><strong>16 (PA0)</strong>, 26 (PA5), 9 (PA15)</td>
<td><strong>22 (PA1)</strong>, 38 (PB3)</td>
<td><strong>23 (PA2)</strong>, 42 (PB10)</td>
<td><strong>24 (PA3)</strong>, 43 (PB11)</td>
@ -662,7 +662,7 @@
</tr>
<tr>
<td>TIM5</td>
<td><strong>126 (PH10)</strong></td>
<td><strong>16 (PA0)</strong>, 126 (PH10)</td>
<td><strong>22 (PA1)</strong>, 127 (PH11)</td>
<td><strong>23 (PA2)</strong>, 128 (PH12)</td>
<td><strong>24 (PA3)</strong>, 10 (PI0)</td>
@ -1006,7 +1006,7 @@
<tr>
<td>3 (PB4)</td>
<td>I2S2_WS, SPI1_MISO, SPI2_NSS, SPI3_MISO, SYS_JTRST, TIM3_CH1</td>
<td><strong>MISO</strong></td>
<td></td>
</tr>
<tr>
<td>4 (PG7)</td>
@ -1041,22 +1041,22 @@
<tr>
<td>10 (PI0)</td>
<td>DCMI_D13, FMC_D24, I2S2_WS, LTDC_G5, SPI2_NSS, TIM5_CH4</td>
<td></td>
<td><strong>SS</strong></td>
</tr>
<tr>
<td>11 (PB15)</td>
<td>I2S2_SD, RTC_REFIN, SPI2_MOSI, TIM1_CH3N, TIM8_CH3N, TIM12_CH2, USB_OTG_HS_DP</td>
<td></td>
<td><strong>MOSI</strong></td>
</tr>
<tr>
<td>12 (PB14)</td>
<td>SPI2_MISO, TIM1_CH2N, TIM8_CH2N, TIM12_CH1, USART3_DE, USART3_RTS, USB_OTG_HS_DM</td>
<td></td>
<td><strong>MISO</strong></td>
</tr>
<tr>
<td>13 (PI1)</td>
<td>DCMI_D8, FMC_D25, I2S2_CK, LTDC_G6, SPI2_SCK, TIM8_BKIN2</td>
<td><strong>LED_BUILTIN</strong></td>
<td><strong>LED_BUILTIN</strong>, <strong>SCK</strong></td>
</tr>
<tr>
<td>14 (PB9)</td>
@ -1070,33 +1070,33 @@
</tr>
<tr>
<td>16 (PA0)</td>
<td>ADC1_IN0, ADC2_IN0, ADC3_IN0, SYS_WKUP1</td>
<td></td>
<td>ADC1_IN0, ADC2_IN0, ADC3_IN0, ETH_CRS, SAI2_SD_B, SYS_WKUP1, TIM2_CH1, TIM2_ETR, TIM5_CH1, TIM8_ETR, UART4_TX, USART2_CTS</td>
<td><strong>A0</strong></td>
</tr>
<tr>
<td>17 (PF10)</td>
<td>ADC3_IN8, DCMI_D11, LTDC_DE</td>
<td></td>
<td><strong>A1</strong></td>
</tr>
<tr>
<td>18 (PF9)</td>
<td>ADC3_IN7, QUADSPI_BK1_IO1, SAI1_FS_B, SPI5_MOSI, TIM14_CH1, UART7_CTS</td>
<td></td>
<td><strong>A2</strong></td>
</tr>
<tr>
<td>19 (PF8)</td>
<td>ADC3_IN6, QUADSPI_BK1_IO0, SAI1_SCK_B, SPI5_MISO, TIM13_CH1, UART7_DE, UART7_RTS</td>
<td></td>
<td><strong>A3</strong></td>
</tr>
<tr>
<td>20 (PF7)</td>
<td>ADC3_IN5, QUADSPI_BK1_IO2, SAI1_MCLK_B, SPI5_SCK, TIM11_CH1, UART7_TX</td>
<td></td>
<td><strong>A4</strong></td>
</tr>
<tr>
<td>21 (PF6)</td>
<td>ADC3_IN4, QUADSPI_BK1_IO3, SAI1_SD_B, SPI5_NSS, TIM10_CH1, UART7_RX</td>
<td></td>
<td><strong>A5</strong></td>
</tr>
<tr>
<td>22 (PA1)</td>
@ -1116,7 +1116,7 @@
<tr>
<td>25 (PA4)</td>
<td>ADC1_IN4, ADC2_IN4, DAC_OUT1, DCMI_HSYNC, I2S1_WS, I2S3_WS, LTDC_VSYNC, SPI1_NSS, SPI3_NSS, USART2_CK, USB_OTG_HS_SOF</td>
<td><strong>SS</strong></td>
<td></td>
</tr>
<tr>
<td>26 (PA5)</td>
@ -1181,12 +1181,12 @@
<tr>
<td>38 (PB3)</td>
<td>I2S1_CK, I2S3_CK, SPI1_SCK, SPI3_SCK, SYS_JTDO-SWO, TIM2_CH2</td>
<td><strong>SCK</strong></td>
<td></td>
</tr>
<tr>
<td>39 (PB5)</td>
<td>CAN2_RX, DCMI_D10, ETH_PPS_OUT, FMC_SDCKE1, I2C1_SMBA, I2S1_SD, I2S3_SD, SPI1_MOSI, SPI3_MOSI, TIM3_CH2, USB_OTG_HS_ULPI_D7</td>
<td><strong>MOSI</strong></td>
<td></td>
</tr>
<tr>
<td>40 (PB6)</td>

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@ -811,7 +811,7 @@
</tr>
<tr>
<td>PH0</td>
<td>RCC_OSC_IN</td>
<td>CRS_SYNC, RCC_OSC_IN</td>
<td></td>
</tr>
<tr>

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@ -579,7 +579,7 @@
</tr>
<tr>
<td>TIM2</td>
<td><strong>PA15</strong></td>
<td><strong>PA0</strong>, PA15</td>
<td><strong>PA1</strong>, PB3</td>
<td><strong>PA2</strong>, PB10</td>
<td><strong>PA3</strong>, PB11</td>
@ -868,7 +868,7 @@
<tbody>
<tr>
<td>PA0</td>
<td>ADC1_IN0, ADC2_IN0, ADC3_IN0, SYS_WKUP, TIM5_CH1, TIM8_ETR</td>
<td>ADC1_IN0, ADC2_IN0, ADC3_IN0, SYS_WKUP, TIM2_CH1, TIM2_ETR, TIM5_CH1, TIM8_ETR, USART2_CTS</td>
<td></td>
</tr>
<tr>

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@ -579,7 +579,7 @@
</tr>
<tr>
<td>TIM2</td>
<td><strong>PA15</strong></td>
<td><strong>PA0</strong>, PA15</td>
<td><strong>PA1</strong>, PB3</td>
<td><strong>PA2</strong>, PB10</td>
<td><strong>PA3</strong>, PB11</td>
@ -868,7 +868,7 @@
<tbody>
<tr>
<td>PA0</td>
<td>ADC1_IN0, ADC2_IN0, ADC3_IN0, SYS_WKUP, TIM5_CH1, TIM8_ETR</td>
<td>ADC1_IN0, ADC2_IN0, ADC3_IN0, SYS_WKUP, TIM2_CH1, TIM2_ETR, TIM5_CH1, TIM8_ETR, USART2_CTS</td>
<td></td>
</tr>
<tr>

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@ -579,7 +579,7 @@
</tr>
<tr>
<td>TIM2</td>
<td><strong>PA15</strong></td>
<td><strong>PA0</strong>, PA15</td>
<td><strong>PA1</strong>, PB3</td>
<td><strong>PA2</strong>, PB10</td>
<td><strong>PA3</strong>, PB11</td>
@ -916,7 +916,7 @@
<tbody>
<tr>
<td>PA0</td>
<td>ADC1_IN0, ADC2_IN0, ADC3_IN0, SYS_WKUP, TIM5_CH1, TIM8_ETR</td>
<td>ADC1_IN0, ADC2_IN0, ADC3_IN0, SYS_WKUP, TIM2_CH1, TIM2_ETR, TIM5_CH1, TIM8_ETR, USART2_CTS</td>
<td></td>
</tr>
<tr>

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@ -579,7 +579,7 @@
</tr>
<tr>
<td>TIM2</td>
<td><strong>PA15</strong></td>
<td><strong>PA0</strong>, PA15</td>
<td><strong>PA1</strong>, PB3</td>
<td><strong>PA2</strong>, PB10</td>
<td><strong>PA3</strong>, PB11</td>
@ -916,7 +916,7 @@
<tbody>
<tr>
<td>PA0</td>
<td>ADC1_IN0, ADC2_IN0, ADC3_IN0, SYS_WKUP, TIM5_CH1, TIM8_ETR</td>
<td>ADC1_IN0, ADC2_IN0, ADC3_IN0, SYS_WKUP, TIM2_CH1, TIM2_ETR, TIM5_CH1, TIM8_ETR, USART2_CTS</td>
<td></td>
</tr>
<tr>

View File

@ -579,7 +579,7 @@
</tr>
<tr>
<td>TIM2</td>
<td><strong>26 (PA15)</strong></td>
<td><strong>16 (PA0)</strong>, 26 (PA15)</td>
<td><strong>17 (PA1)</strong>, 3 (PB3)</td>
<td><strong>1 (PA2)</strong>, 6 (PB10)</td>
<td><strong>0 (PA3)</strong>, PB11</td>
@ -971,7 +971,7 @@
</tr>
<tr>
<td>16 (PA0)</td>
<td>ADC1_IN0, ADC2_IN0, ADC3_IN0, SYS_WKUP, TIM5_CH1, TIM8_ETR, USART2_CTS</td>
<td>ADC1_IN0, ADC2_IN0, ADC3_IN0, SYS_WKUP, TIM2_CH1, TIM2_ETR, TIM5_CH1, TIM8_ETR, USART2_CTS</td>
<td><strong>A0</strong></td>
</tr>
<tr>

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@ -527,7 +527,7 @@
</tr>
<tr>
<td>TIM2</td>
<td><strong>20 (PA15)</strong></td>
<td><strong>11 (PA0)</strong>, 20 (PA15)</td>
<td><strong>10 (PA1)</strong>, 19 (PB3)</td>
<td><strong>9 (PA2)</strong>, 1 (PB10)</td>
<td><strong>8 (PA3)</strong>, 0 (PB11)</td>
@ -730,7 +730,7 @@
</tr>
<tr>
<td>11 (PA0)</td>
<td>ADC1_IN0, ADC2_IN0, SYS_WKUP, USART2_CTS</td>
<td>ADC1_IN0, ADC2_IN0, SYS_WKUP, TIM2_CH1, TIM2_ETR, USART2_CTS</td>
<td></td>
</tr>
<tr>

View File

@ -527,7 +527,7 @@
</tr>
<tr>
<td>TIM2</td>
<td><strong>26 (PA15)</strong></td>
<td><strong>16 (PA0)</strong>, 26 (PA15)</td>
<td><strong>17 (PA1)</strong>, 3 (PB3)</td>
<td><strong>1 (PA2)</strong>, 6 (PB10)</td>
<td><strong>0 (PA3)</strong>, PB11</td>
@ -815,7 +815,7 @@
</tr>
<tr>
<td>16 (PA0)</td>
<td>ADC1_IN0, ADC2_IN0, SYS_WKUP, USART2_CTS</td>
<td>ADC1_IN0, ADC2_IN0, SYS_WKUP, TIM2_CH1, TIM2_ETR, USART2_CTS</td>
<td><strong>A0</strong></td>
</tr>
<tr>

View File

@ -445,7 +445,7 @@
<td>SPI2</td>
<td><strong>22 (PA11)</strong>, 33 (PB15)</td>
<td><strong>2 (PA10)</strong>, 32 (PB14)</td>
<td><strong>31 (PB13)</strong></td>
<td><strong>31 (PB13)</strong>, PF1</td>
<td></td>
</tr>
<tr>
@ -476,8 +476,8 @@
</tr>
<tr>
<td>I2C2</td>
<td><strong>2 (PA10)</strong></td>
<td><strong>8 (PA9)</strong></td>
<td><strong>2 (PA10)</strong>, PF0</td>
<td><strong>8 (PA9)</strong>, PF1</td>
<td></td>
</tr>
<tr>
@ -546,9 +546,9 @@
<tbody>
<tr>
<td>I2S2</td>
<td><strong>31 (PB13)</strong></td>
<td><strong>31 (PB13)</strong>, PF1</td>
<td><strong>22 (PA11)</strong>, 33 (PB15)</td>
<td><strong>30 (PB12)</strong></td>
<td><strong>30 (PB12)</strong>, PF0</td>
<td><strong>7 (PA8)</strong>, 38 (PC6)</td>
<td></td>
</tr>
@ -579,7 +579,7 @@
<td>TIM1</td>
<td><strong>7 (PA8)</strong>, 21 (PC0), <span style="text-decoration: overline">11 (PA7)</span>, <span style="text-decoration: overline">22 (PA11)</span>, <span style="text-decoration: overline">31 (PB13)</span>, <span style="text-decoration: overline">44 (PC13)</span></td>
<td><strong>8 (PA9)</strong>, 20 (PC1), <span style="text-decoration: overline">23 (PA12)</span>, <span style="text-decoration: overline">19 (PB0)</span>, <span style="text-decoration: overline">32 (PB14)</span></td>
<td><strong>2 (PA10)</strong>, 34 (PC2), <span style="text-decoration: overline">27 (PB1)</span>, <span style="text-decoration: overline">33 (PB15)</span></td>
<td><strong>2 (PA10)</strong>, 34 (PC2), <span style="text-decoration: overline">27 (PB1)</span>, <span style="text-decoration: overline">33 (PB15)</span>, <span style="text-decoration: overline">PF0</span></td>
<td><strong>22 (PA11)</strong>, 35 (PC3)</td>
<td></td>
</tr>

View File

@ -573,7 +573,7 @@
</tr>
<tr>
<td>TIM2</td>
<td><strong>13 (PA5)</strong>, 26 (PA15)</td>
<td><strong>16 (PA0)</strong>, 13 (PA5), 26 (PA15)</td>
<td><strong>17 (PA1)</strong>, 3 (PB3)</td>
<td><strong>1 (PA2)</strong>, 6 (PB10)</td>
<td><strong>0 (PA3)</strong></td>
@ -813,7 +813,7 @@
</tr>
<tr>
<td>16 (PA0)</td>
<td>ADC1_IN0, SYS_WKUP, TIM5_CH1, USART2_CTS</td>
<td>ADC1_IN0, SYS_WKUP, TIM2_CH1, TIM2_ETR, TIM5_CH1, USART2_CTS</td>
<td><strong>A0</strong></td>
</tr>
<tr>

View File

@ -611,7 +611,7 @@
</tr>
<tr>
<td>TIM2</td>
<td><strong>13 (PA5)</strong>, 26 (PA15)</td>
<td><strong>16 (PA0)</strong>, 13 (PA5), 26 (PA15)</td>
<td><strong>17 (PA1)</strong>, 3 (PB3)</td>
<td><strong>1 (PA2)</strong>, 6 (PB10)</td>
<td><strong>0 (PA3)</strong></td>
@ -851,7 +851,7 @@
</tr>
<tr>
<td>16 (PA0)</td>
<td>ADC1_IN0, SYS_WKUP, TIM5_CH1, USART2_CTS</td>
<td>ADC1_IN0, SYS_WKUP, TIM2_CH1, TIM2_ETR, TIM5_CH1, USART2_CTS</td>
<td><strong>A0</strong></td>
</tr>
<tr>

View File

@ -529,7 +529,7 @@
<tr>
<td>UART4</td>
<td><strong>PA1</strong>, PA11, PC11, PD0</td>
<td><strong>PA12</strong>, PC10, PD1</td>
<td><strong>PA0</strong>, PA12, PC10, PD1</td>
<td></td>
</tr>
<tr>
@ -638,7 +638,7 @@
</tr>
<tr>
<td>TIM2</td>
<td><strong>PA5</strong>, PA15</td>
<td><strong>PA0</strong>, PA5, PA15</td>
<td><strong>PA1</strong>, PB3</td>
<td><strong>PA2</strong>, PB10</td>
<td><strong>PA3</strong>, PB11</td>
@ -990,7 +990,7 @@
<tbody>
<tr>
<td>PA0</td>
<td>ADC1_IN0, ADC2_IN0, ADC3_IN0, ETH_CRS, SYS_WKUP1, TIM5_CH1, TIM8_ETR</td>
<td>ADC1_IN0, ADC2_IN0, ADC3_IN0, ETH_CRS, SAI2_SD_B, SYS_WKUP1, TIM2_CH1, TIM2_ETR, TIM5_CH1, TIM8_ETR, UART4_TX, USART2_CTS</td>
<td></td>
</tr>
<tr>

View File

@ -571,7 +571,7 @@
<tbody>
<tr>
<td>TIM2</td>
<td><strong>13 (PA5)</strong>, 26 (PA15)</td>
<td><strong>16 (PA0)</strong>, 13 (PA5), 26 (PA15)</td>
<td><strong>17 (PA1)</strong>, 3 (PB3)</td>
<td><strong>1 (PA2)</strong>, 6 (PB10)</td>
<td><strong>0 (PA3)</strong>, PB11</td>
@ -844,7 +844,7 @@
</tr>
<tr>
<td>16 (PA0)</td>
<td>ADC_IN0, RTC_TAMP2, SYS_WKUP1, TIM2_ETR, TIM5_CH1, TS_G1_IO1, USART2_CTS</td>
<td>ADC_IN0, COMP1_INP, RTC_TAMP2, SYS_WKUP1, TIM2_CH1, TIM2_ETR, TIM5_CH1, TIMX_IC1, TS_G1_IO1, USART2_CTS</td>
<td><strong>A0</strong></td>
</tr>
<tr>
@ -984,17 +984,17 @@
</tr>
<tr>
<td>44 (PC13)</td>
<td>RTC_OUT_ALARM, RTC_OUT_CALIB, RTC_TAMP1, RTC_TS, SYS_WKUP2</td>
<td>RTC_OUT_ALARM, RTC_OUT_CALIB, RTC_TAMP1, RTC_TS, SYS_WKUP2, TIMX_IC2</td>
<td></td>
</tr>
<tr>
<td>45 (PC14)</td>
<td>RCC_OSC32_IN</td>
<td>RCC_OSC32_IN, TIMX_IC3</td>
<td></td>
</tr>
<tr>
<td>46 (PC15)</td>
<td>ADC_EXTI15, RCC_OSC32_OUT</td>
<td>ADC_EXTI15, RCC_OSC32_OUT, TIMX_IC4</td>
<td></td>
</tr>
<tr>

View File

@ -435,8 +435,8 @@
<tr>
<td>SPI1</td>
<td><strong>11 (PA7)</strong>, 4 (PB5)</td>
<td><strong>12 (PA6)</strong></td>
<td><strong>13 (PA5)</strong></td>
<td><strong>12 (PA6)</strong>, 5 (PB4)</td>
<td><strong>13 (PA5)</strong>, 3 (PB3)</td>
<td></td>
</tr>
<tr>
@ -449,8 +449,8 @@
<tr>
<td>SPI3</td>
<td><strong>4 (PB5)</strong>, 43 (PC12)</td>
<td><strong>42 (PC11)</strong></td>
<td><strong>41 (PC10)</strong></td>
<td><strong>5 (PB4)</strong>, 42 (PC11)</td>
<td><strong>3 (PB3)</strong>, 41 (PC10)</td>
<td></td>
</tr>
</tbody>
@ -552,15 +552,15 @@
</tr>
<tr>
<td>TIM2</td>
<td><strong>16 (PA0)</strong>, 13 (PA5)</td>
<td><strong>17 (PA1)</strong></td>
<td><strong>16 (PA0)</strong>, 13 (PA5), 26 (PA15)</td>
<td><strong>17 (PA1)</strong>, 3 (PB3)</td>
<td><strong>1 (PA2)</strong>, 6 (PB10)</td>
<td><strong>0 (PA3)</strong>, PB11</td>
<td></td>
</tr>
<tr>
<td>TIM3</td>
<td><strong>12 (PA6)</strong>, 38 (PC6)</td>
<td><strong>12 (PA6)</strong>, 5 (PB4), 38 (PC6)</td>
<td><strong>11 (PA7)</strong>, 4 (PB5), 9 (PC7)</td>
<td><strong>19 (PB0)</strong>, 39 (PC8)</td>
<td><strong>27 (PB1)</strong>, 40 (PC9)</td>
@ -835,7 +835,7 @@
</tr>
<tr>
<td>3 (PB3)</td>
<td>COMP2_INM, LCD_SEG7, SAI1_SCK_B, SYS_JTDO-SWO</td>
<td>COMP2_INM, LCD_SEG7, SAI1_SCK_B, SPI1_SCK, SPI3_SCK, SYS_JTDO-SWO, TIM2_CH2, USART1_DE, USART1_RTS</td>
<td></td>
</tr>
<tr>
@ -845,7 +845,7 @@
</tr>
<tr>
<td>5 (PB4)</td>
<td>COMP2_INP, LCD_SEG8, SAI1_MCLK_B, SYS_JTRST, TSC_G2_IO1, UART5_DE, UART5_RTS</td>
<td>COMP2_INP, LCD_SEG8, SAI1_MCLK_B, SPI1_MISO, SPI3_MISO, SYS_JTRST, TIM3_CH1, TIM17_BKIN, TSC_G2_IO1, UART5_DE, UART5_RTS, USART1_CTS</td>
<td></td>
</tr>
<tr>
@ -940,7 +940,7 @@
</tr>
<tr>
<td>24 (PA13)</td>
<td>SYS_JTMS-SWDIO</td>
<td>IR_OUT, SYS_JTMS-SWDIO, USB_OTG_FS_NOE</td>
<td></td>
</tr>
<tr>
@ -950,7 +950,7 @@
</tr>
<tr>
<td>26 (PA15)</td>
<td>LCD_SEG17, SAI2_FS_B, SYS_JTDI, TSC_G3_IO1, UART4_DE, UART4_RTS</td>
<td>LCD_SEG17, SAI2_FS_B, SPI1_NSS, SPI3_NSS, SYS_JTDI, TIM2_CH1, TIM2_ETR, TSC_G3_IO1, UART4_DE, UART4_RTS</td>
<td></td>
</tr>
<tr>

File diff suppressed because one or more lines are too long

View File

@ -4,7 +4,7 @@
<url>
<loc>/</loc>
<lastmod>2017-07-15</lastmod>
<lastmod>2017-07-16</lastmod>
<changefreq>daily</changefreq>
</url>
@ -12,7 +12,7 @@
<url>
<loc>/upload/</loc>
<lastmod>2017-07-15</lastmod>
<lastmod>2017-07-16</lastmod>
<changefreq>daily</changefreq>
</url>
@ -21,67 +21,67 @@
<url>
<loc>/menu_options/</loc>
<lastmod>2017-07-15</lastmod>
<lastmod>2017-07-16</lastmod>
<changefreq>daily</changefreq>
</url>
<url>
<loc>/arduino_api/</loc>
<lastmod>2017-07-15</lastmod>
<lastmod>2017-07-16</lastmod>
<changefreq>daily</changefreq>
</url>
<url>
<loc>/spi/</loc>
<lastmod>2017-07-15</lastmod>
<lastmod>2017-07-16</lastmod>
<changefreq>daily</changefreq>
</url>
<url>
<loc>/i2c/</loc>
<lastmod>2017-07-15</lastmod>
<lastmod>2017-07-16</lastmod>
<changefreq>daily</changefreq>
</url>
<url>
<loc>/i2s/</loc>
<lastmod>2017-07-15</lastmod>
<lastmod>2017-07-16</lastmod>
<changefreq>daily</changefreq>
</url>
<url>
<loc>/sdio/</loc>
<lastmod>2017-07-15</lastmod>
<lastmod>2017-07-16</lastmod>
<changefreq>daily</changefreq>
</url>
<url>
<loc>/uart/</loc>
<lastmod>2017-07-15</lastmod>
<lastmod>2017-07-16</lastmod>
<changefreq>daily</changefreq>
</url>
<url>
<loc>/usb_cdc/</loc>
<lastmod>2017-07-15</lastmod>
<lastmod>2017-07-16</lastmod>
<changefreq>daily</changefreq>
</url>
<url>
<loc>/usb_msc/</loc>
<lastmod>2017-07-15</lastmod>
<lastmod>2017-07-16</lastmod>
<changefreq>daily</changefreq>
</url>
<url>
<loc>/stm32_hal/</loc>
<lastmod>2017-07-15</lastmod>
<lastmod>2017-07-16</lastmod>
<changefreq>daily</changefreq>
</url>
<url>
<loc>/build_macros/</loc>
<lastmod>2017-07-15</lastmod>
<lastmod>2017-07-16</lastmod>
<changefreq>daily</changefreq>
</url>
@ -90,7 +90,7 @@
<url>
<loc>/libraries/</loc>
<lastmod>2017-07-15</lastmod>
<lastmod>2017-07-16</lastmod>
<changefreq>daily</changefreq>
</url>
@ -99,19 +99,19 @@
<url>
<loc>/board_MapleMini_F103CB/</loc>
<lastmod>2017-07-15</lastmod>
<lastmod>2017-07-16</lastmod>
<changefreq>daily</changefreq>
</url>
<url>
<loc>/board_BluePill/</loc>
<lastmod>2017-07-15</lastmod>
<lastmod>2017-07-16</lastmod>
<changefreq>daily</changefreq>
</url>
<url>
<loc>/board_Generic103RF/</loc>
<lastmod>2017-07-15</lastmod>
<lastmod>2017-07-16</lastmod>
<changefreq>daily</changefreq>
</url>
@ -147,37 +147,37 @@
<url>
<loc>/board_DISCOVERY_L053C8/</loc>
<lastmod>2017-07-15</lastmod>
<lastmod>2017-07-16</lastmod>
<changefreq>daily</changefreq>
</url>
<url>
<loc>/board_DISCOVERY_F303VC/</loc>
<lastmod>2017-07-15</lastmod>
<lastmod>2017-07-16</lastmod>
<changefreq>daily</changefreq>
</url>
<url>
<loc>/board_DISCOVERY_F407VG/</loc>
<lastmod>2017-07-15</lastmod>
<lastmod>2017-07-16</lastmod>
<changefreq>daily</changefreq>
</url>
<url>
<loc>/board_DISCOVERY_F746NG/</loc>
<lastmod>2017-07-15</lastmod>
<lastmod>2017-07-16</lastmod>
<changefreq>daily</changefreq>
</url>
<url>
<loc>/add_board/</loc>
<lastmod>2017-07-15</lastmod>
<lastmod>2017-07-16</lastmod>
<changefreq>daily</changefreq>
</url>
<url>
<loc>/test/</loc>
<lastmod>2017-07-15</lastmod>
<lastmod>2017-07-16</lastmod>
<changefreq>daily</changefreq>
</url>
@ -186,7 +186,7 @@
<url>
<loc>/about/</loc>
<lastmod>2017-07-15</lastmod>
<lastmod>2017-07-16</lastmod>
<changefreq>daily</changefreq>
</url>

View File

@ -22,7 +22,7 @@ I2C3|**PC9**|**PA8**|
Instance |RX|TX|
-|-|-|
UART4|**PA1**, PC11|**PC10**|
UART4|**PA1**, PC11|**PA0**, PC10|
UART5|**PD2**|**PC12**|
USART1|**PA10**, PB7|**PA9**, PB6|
USART2|**PA3**, PD6|**PA2**, PD5|
@ -41,7 +41,7 @@ I2S3|**PB3**, PC10|**PB5**, PC12|**PA4**, PA15|**PC7**|
Instance |CH1|CH2|CH3|CH4|
-|-|-|-|-|
TIM1|**PA8**, PE9, <span style="text-decoration: overline">PA7</span>, <span style="text-decoration: overline">PB13</span>, <span style="text-decoration: overline">PE8</span>|**PA9**, PE11, <span style="text-decoration: overline">PB0</span>, <span style="text-decoration: overline">PB14</span>, <span style="text-decoration: overline">PE10</span>|**PA10**, PE13, <span style="text-decoration: overline">PB1</span>, <span style="text-decoration: overline">PB15</span>, <span style="text-decoration: overline">PE12</span>|**PA11**, PE14|
TIM2|**PA5**, PA15|**PA1**, PB3|**PA2**, PB10|**PA3**, PB11|
TIM2|**PA0**, PA5, PA15|**PA1**, PB3|**PA2**, PB10|**PA3**, PB11|
TIM3|**PA6**, PB4, PC6|**PA7**, PB5, PC7|**PB0**, PC8|**PB1**, PC9|
TIM4|**PB6**, PD12|**PB7**, PD13|**PB8**, PD14|**PB9**, PD15|
TIM5|**PA0**|**PA1**|**PA2**|**PA3**|
@ -102,7 +102,7 @@ ADC3|IN13|PC3|
Pin | Peripheral signal available on the pin | Board macro
-|-|-
PA0 |ADC1_IN0, ADC2_IN0, ADC3_IN0, ETH_CRS, SYS_WKUP, TIM5_CH1, TIM8_ETR|**USER_BUTTON0**|
PA0 |ADC1_IN0, ADC2_IN0, ADC3_IN0, ETH_CRS, SYS_WKUP, TIM2_CH1, TIM2_ETR, TIM5_CH1, TIM8_ETR, UART4_TX, USART2_CTS|**USER_BUTTON0**|
PA1 |ADC1_IN1, ADC2_IN1, ADC3_IN1, ETH_REF_CLK, ETH_RX_CLK, TIM2_CH2, TIM5_CH2, UART4_RX, USART2_RTS||
PA2 |ADC1_IN2, ADC2_IN2, ADC3_IN2, ETH_MDIO, TIM2_CH3, TIM5_CH3, TIM9_CH1, USART2_TX||
PA3 |ADC1_IN3, ADC2_IN3, ADC3_IN3, ETH_COL, TIM2_CH4, TIM5_CH4, TIM9_CH2, USART2_RX, USB_OTG_HS_ULPI_D0||

View File

@ -22,7 +22,7 @@ I2C3|**PC9**|**PA8**|
Instance |RX|TX|
-|-|-|
UART4|**PA1**, PC11|**PC10**|
UART4|**PA1**, PC11|**PA0**, PC10|
UART5|**PD2**|**PC12**|
USART1|**PA10**, PB7|**PA9**, PB6|
USART2|**PA3**, PD6|**PA2**, PD5|
@ -41,7 +41,7 @@ I2S3|**PB3**, PC10|**PB5**, PC12|**PA4**, PA15|**PC7**|
Instance |CH1|CH2|CH3|CH4|
-|-|-|-|-|
TIM1|**PA8**, PE9, <span style="text-decoration: overline">PA7</span>, <span style="text-decoration: overline">PB13</span>, <span style="text-decoration: overline">PE8</span>|**PA9**, PE11, <span style="text-decoration: overline">PB0</span>, <span style="text-decoration: overline">PB14</span>, <span style="text-decoration: overline">PE10</span>|**PA10**, PE13, <span style="text-decoration: overline">PB1</span>, <span style="text-decoration: overline">PB15</span>, <span style="text-decoration: overline">PE12</span>|**PA11**, PE14|
TIM2|**PA5**, PA15|**PA1**, PB3|**PA2**, PB10|**PA3**, PB11|
TIM2|**PA0**, PA5, PA15|**PA1**, PB3|**PA2**, PB10|**PA3**, PB11|
TIM3|**PA6**, PB4, PC6|**PA7**, PB5, PC7|**PB0**, PC8|**PB1**, PC9|
TIM4|**PB6**, PD12|**PB7**, PD13|**PB8**, PD14|**PB9**, PD15|
TIM5|**PA0**|**PA1**|**PA2**|**PA3**|
@ -110,7 +110,7 @@ ADC3|IN15|PF5|
Pin | Peripheral signal available on the pin | Board macro
-|-|-
PA0 |ADC1_IN0, ADC2_IN0, ADC3_IN0, ETH_CRS, SYS_WKUP, TIM5_CH1, TIM8_ETR||
PA0 |ADC1_IN0, ADC2_IN0, ADC3_IN0, ETH_CRS, SYS_WKUP, TIM2_CH1, TIM2_ETR, TIM5_CH1, TIM8_ETR, UART4_TX, USART2_CTS||
PA1 |ADC1_IN1, ADC2_IN1, ADC3_IN1, ETH_REF_CLK, ETH_RX_CLK, TIM2_CH2, TIM5_CH2, UART4_RX, USART2_RTS||
PA2 |ADC1_IN2, ADC2_IN2, ADC3_IN2, ETH_MDIO, TIM2_CH3, TIM5_CH3, TIM9_CH1, USART2_TX||
PA3 |ADC1_IN3, ADC2_IN3, ADC3_IN3, ETH_COL, TIM2_CH4, TIM5_CH4, TIM9_CH2, USART2_RX, USB_OTG_HS_ULPI_D0||

View File

@ -22,7 +22,7 @@ I2C3|**PC9**|**PA8**|
Instance |RX|TX|
-|-|-|
UART4|**PA1**, PC11|**PC10**|
UART4|**PA1**, PC11|**PA0**, PC10|
UART5|**PD2**|**PC12**|
USART1|**PA10**, PB7|**PA9**, PB6|
USART2|**PA3**, PD6|**PA2**, PD5|
@ -41,7 +41,7 @@ I2S3|**PB3**, PC10|**PB5**, PC12|**PA4**, PA15|**PC7**|
Instance |CH1|CH2|CH3|CH4|
-|-|-|-|-|
TIM1|**PA8**, PE9, <span style="text-decoration: overline">PA7</span>, <span style="text-decoration: overline">PB13</span>, <span style="text-decoration: overline">PE8</span>|**PA9**, PE11, <span style="text-decoration: overline">PB0</span>, <span style="text-decoration: overline">PB14</span>, <span style="text-decoration: overline">PE10</span>|**PA10**, PE13, <span style="text-decoration: overline">PB1</span>, <span style="text-decoration: overline">PB15</span>, <span style="text-decoration: overline">PE12</span>|**PA11**, PE14|
TIM2|**PA5**, PA15|**PA1**, PB3|**PA2**, PB10|**PA3**, PB11|
TIM2|**PA0**, PA5, PA15|**PA1**, PB3|**PA2**, PB10|**PA3**, PB11|
TIM3|**PA6**, PB4, PC6|**PA7**, PB5, PC7|**PB0**, PC8|**PB1**, PC9|
TIM4|**PB6**, PD12|**PB7**, PD13|**PB8**, PD14|**PB9**, PD15|
TIM5|**PA0**|**PA1**|**PA2**|**PA3**|
@ -110,7 +110,7 @@ ADC3|IN15|PF5|
Pin | Peripheral signal available on the pin | Board macro
-|-|-
PA0 |ADC1_IN0, ADC2_IN0, ADC3_IN0, ETH_CRS, SYS_WKUP, TIM5_CH1, TIM8_ETR||
PA0 |ADC1_IN0, ADC2_IN0, ADC3_IN0, ETH_CRS, SYS_WKUP, TIM2_CH1, TIM2_ETR, TIM5_CH1, TIM8_ETR, UART4_TX, USART2_CTS||
PA1 |ADC1_IN1, ADC2_IN1, ADC3_IN1, ETH_REF_CLK, ETH_RX_CLK, TIM2_CH2, TIM5_CH2, UART4_RX, USART2_RTS||
PA2 |ADC1_IN2, ADC2_IN2, ADC3_IN2, ETH_MDIO, TIM2_CH3, TIM5_CH3, TIM9_CH1, USART2_TX||
PA3 |ADC1_IN3, ADC2_IN3, ADC3_IN3, ETH_COL, TIM2_CH4, TIM5_CH4, TIM9_CH2, USART2_RX, USB_OTG_HS_ULPI_D0||

View File

@ -39,7 +39,7 @@ I2S3|**PB3**|**PB5**|**PA15**|**PC7**|
Instance |CH1|CH2|CH3|CH4|
-|-|-|-|-|
TIM1|**PA8**, PE9, <span style="text-decoration: overline">PA7</span>, <span style="text-decoration: overline">PB13</span>, <span style="text-decoration: overline">PE8</span>|**PA9**, PE11, <span style="text-decoration: overline">PB0</span>, <span style="text-decoration: overline">PB14</span>, <span style="text-decoration: overline">PE10</span>|**PA10**, PE13, <span style="text-decoration: overline">PB1</span>, <span style="text-decoration: overline">PB15</span>, <span style="text-decoration: overline">PE12</span>|**PA11**, PE14|
TIM2|**PA15**|**PA1**, PB3|**PA2**, PB10|**PA3**, PB11|
TIM2|**PA0**, PA15|**PA1**, PB3|**PA2**, PB10|**PA3**, PB11|
TIM3|**PA6**, PB4, PC6|**PA7**, PB5, PC7|**PB0**, PC8|**PB1**, PC9|
TIM4|**PB6**, PD12|**PB7**, PD13|**PB8**, PD14|**PB9**, PD15|
TIM5|**PA0**|**PA1**|**PA2**|**PA3**|
@ -94,7 +94,7 @@ ADC3|IN13|PC3|
Pin | Peripheral signal available on the pin | Board macro
-|-|-
PA0 |ADC1_IN0, ADC2_IN0, ADC3_IN0, SYS_WKUP, TIM5_CH1, TIM8_ETR||
PA0 |ADC1_IN0, ADC2_IN0, ADC3_IN0, SYS_WKUP, TIM2_CH1, TIM2_ETR, TIM5_CH1, TIM8_ETR, USART2_CTS||
PA1 |ADC1_IN1, ADC2_IN1, ADC3_IN1, TIM2_CH2, TIM5_CH2, USART2_RTS||
PA2 |ADC1_IN2, ADC2_IN2, ADC3_IN2, TIM2_CH3, TIM5_CH3, USART2_TX||
PA3 |ADC1_IN3, ADC2_IN3, ADC3_IN3, TIM2_CH4, TIM5_CH4, USART2_RX||

View File

@ -39,7 +39,7 @@ I2S3|**PB3**|**PB5**|**PA15**|**PC7**|
Instance |CH1|CH2|CH3|CH4|
-|-|-|-|-|
TIM1|**PA8**, PE9, <span style="text-decoration: overline">PA7</span>, <span style="text-decoration: overline">PB13</span>, <span style="text-decoration: overline">PE8</span>|**PA9**, PE11, <span style="text-decoration: overline">PB0</span>, <span style="text-decoration: overline">PB14</span>, <span style="text-decoration: overline">PE10</span>|**PA10**, PE13, <span style="text-decoration: overline">PB1</span>, <span style="text-decoration: overline">PB15</span>, <span style="text-decoration: overline">PE12</span>|**PA11**, PE14|
TIM2|**PA15**|**PA1**, PB3|**PA2**, PB10|**PA3**, PB11|
TIM2|**PA0**, PA15|**PA1**, PB3|**PA2**, PB10|**PA3**, PB11|
TIM3|**PA6**, PB4, PC6|**PA7**, PB5, PC7|**PB0**, PC8|**PB1**, PC9|
TIM4|**PB6**, PD12|**PB7**, PD13|**PB8**, PD14|**PB9**, PD15|
TIM5|**PA0**|**PA1**|**PA2**|**PA3**|
@ -99,7 +99,7 @@ ADC3|IN13|PC3|
Pin | Peripheral signal available on the pin | Board macro
-|-|-
PA0 |ADC1_IN0, ADC2_IN0, ADC3_IN0, SYS_WKUP, TIM5_CH1, TIM8_ETR||
PA0 |ADC1_IN0, ADC2_IN0, ADC3_IN0, SYS_WKUP, TIM2_CH1, TIM2_ETR, TIM5_CH1, TIM8_ETR, USART2_CTS||
PA1 |ADC1_IN1, ADC2_IN1, ADC3_IN1, TIM2_CH2, TIM5_CH2, USART2_RTS||
PA2 |ADC1_IN2, ADC2_IN2, ADC3_IN2, TIM2_CH3, TIM5_CH3, USART2_TX||
PA3 |ADC1_IN3, ADC2_IN3, ADC3_IN3, TIM2_CH4, TIM5_CH4, USART2_RX||

View File

@ -39,7 +39,7 @@ I2S3|**PB3**|**PB5**|**PA15**|**PC7**|
Instance |CH1|CH2|CH3|CH4|
-|-|-|-|-|
TIM1|**PA8**, PE9, <span style="text-decoration: overline">PA7</span>, <span style="text-decoration: overline">PB13</span>, <span style="text-decoration: overline">PE8</span>|**PA9**, PE11, <span style="text-decoration: overline">PB0</span>, <span style="text-decoration: overline">PB14</span>, <span style="text-decoration: overline">PE10</span>|**PA10**, PE13, <span style="text-decoration: overline">PB1</span>, <span style="text-decoration: overline">PB15</span>, <span style="text-decoration: overline">PE12</span>|**PA11**, PE14|
TIM2|**PA15**|**PA1**, PB3|**PA2**, PB10|**PA3**, PB11|
TIM2|**PA0**, PA15|**PA1**, PB3|**PA2**, PB10|**PA3**, PB11|
TIM3|**PA6**, PB4, PC6|**PA7**, PB5, PC7|**PB0**, PC8|**PB1**, PC9|
TIM4|**PB6**, PD12|**PB7**, PD13|**PB8**, PD14|**PB9**, PD15|
TIM5|**PA0**|**PA1**|**PA2**|**PA3**|
@ -105,7 +105,7 @@ ADC3|IN13|PC3|
Pin | Peripheral signal available on the pin | Board macro
-|-|-
PA0 |ADC1_IN0, ADC2_IN0, ADC3_IN0, SYS_WKUP, TIM5_CH1, TIM8_ETR||
PA0 |ADC1_IN0, ADC2_IN0, ADC3_IN0, SYS_WKUP, TIM2_CH1, TIM2_ETR, TIM5_CH1, TIM8_ETR, USART2_CTS||
PA1 |ADC1_IN1, ADC2_IN1, ADC3_IN1, TIM2_CH2, TIM5_CH2, USART2_RTS||
PA2 |ADC1_IN2, ADC2_IN2, ADC3_IN2, TIM2_CH3, TIM5_CH3, TIM9_CH1, USART2_TX||
PA3 |ADC1_IN3, ADC2_IN3, ADC3_IN3, TIM2_CH4, TIM5_CH4, TIM9_CH2, USART2_RX||

View File

@ -29,7 +29,7 @@ USART3|**PB11**|**PB10**|
Instance |CH1|CH2|CH3|CH4|
-|-|-|-|-|
TIM1|**PA8**, <span style="text-decoration: overline">PA7</span>, <span style="text-decoration: overline">PB13</span>|**PA9**, <span style="text-decoration: overline">PB0</span>, <span style="text-decoration: overline">PB14</span>|**PA10**, <span style="text-decoration: overline">PB1</span>, <span style="text-decoration: overline">PB15</span>|**PA11**|
TIM2|**PA15**|**PA1**, PB3|**PA2**, PB10|**PA3**, PB11|
TIM2|**PA0**, PA15|**PA1**, PB3|**PA2**, PB10|**PA3**, PB11|
TIM3|**PA6**, PB4|**PA7**, PB5|**PB0**|**PB1**|
TIM4|**PB6**|**PB7**|**PB8**|**PB9**|
@ -62,7 +62,7 @@ ADC2|IN9|PB1|
Pin | Peripheral signal available on the pin | Board macro
-|-|-
PA0 |ADC1_IN0, ADC2_IN0, SYS_WKUP, USART2_CTS||
PA0 |ADC1_IN0, ADC2_IN0, SYS_WKUP, TIM2_CH1, TIM2_ETR, USART2_CTS||
PA1 |ADC1_IN1, ADC2_IN1, TIM2_CH2, USART2_RTS||
PA2 |ADC1_IN2, ADC2_IN2, TIM2_CH3, USART2_TX||
PA3 |ADC1_IN3, ADC2_IN3, TIM2_CH4, USART2_RX||

View File

@ -15,7 +15,7 @@ SPI3|**PB5**, PC12|**PB4**, PC11|**PB3**, PC10|
Instance |SDA|SCL|
-|-|-|
I2C1|PA14, PB7, **PB9**|PA15, **PB6**, PB8|
I2C2|**PA10**|**PA9**, PF6|
I2C2|**PA10**, PF0|**PA9**, PF1, PF6|
## USART
@ -38,7 +38,7 @@ I2S3|**PB3**, PC10|**PB5**, PC12|**PA4**, PA15|**PA9**, PC7|
Instance |CH1|CH2|CH3|CH4|
-|-|-|-|-|
TIM1|**PA8**, PE9, <span style="text-decoration: overline">PA7</span>, <span style="text-decoration: overline">PA11</span>, <span style="text-decoration: overline">PB13</span>, <span style="text-decoration: overline">PC13</span>, <span style="text-decoration: overline">PE8</span>|**PA9**, PE11, <span style="text-decoration: overline">PA12</span>, <span style="text-decoration: overline">PB0</span>, <span style="text-decoration: overline">PB14</span>, <span style="text-decoration: overline">PE10</span>|**PA10**, PE13, <span style="text-decoration: overline">PB1</span>, <span style="text-decoration: overline">PB15</span>, <span style="text-decoration: overline">PE12</span>|**PA11**, PE14|
TIM1|**PA8**, PE9, <span style="text-decoration: overline">PA7</span>, <span style="text-decoration: overline">PA11</span>, <span style="text-decoration: overline">PB13</span>, <span style="text-decoration: overline">PC13</span>, <span style="text-decoration: overline">PE8</span>|**PA9**, PE11, <span style="text-decoration: overline">PA12</span>, <span style="text-decoration: overline">PB0</span>, <span style="text-decoration: overline">PB14</span>, <span style="text-decoration: overline">PE10</span>|**PA10**, PE13, <span style="text-decoration: overline">PB1</span>, <span style="text-decoration: overline">PB15</span>, <span style="text-decoration: overline">PE12</span>, <span style="text-decoration: overline">PF0</span>|**PA11**, PE14|
TIM2|**PA0**, PA5, PA15, PD3|**PA1**, PB3, PD4|**PA2**, PA9, PB10, PD7|**PA3**, PA10, PB11, PD6|
TIM3|**PA6**, PB4, PC6, PE2|**PA4**, PA7, PB5, PC7, PE3|**PB0**, PC8, PE4|**PB1**, PB7, PC9, PE5|
TIM4|**PA11**, PB6, PD12|**PA12**, PB7, PD13|**PA13**, PB8, PD14|**PB9**, PD15, PF6|
@ -186,8 +186,8 @@ PE12 |ADC3_IN16, TIM1_CH3N|**LED_BUILTIN4**|
PE13 |ADC3_IN3, TIM1_CH3||
PE14 |ADC4_IN1, TIM1_BKIN2, TIM1_CH4|**LED_BUILTIN6**|
PE15 |ADC4_IN2, TIM1_BKIN, USART3_RX|**LED_BUILTIN7**|
PF0 |RCC_OSC_IN||
PF1 |RCC_OSC_OUT||
PF0 |I2C2_SDA, RCC_OSC_IN, TIM1_CH3N||
PF1 |I2C2_SCL, RCC_OSC_OUT||
PF2 |ADC1_IN10, ADC2_IN10||
PF4 |ADC1_IN5, COMP1_OUT||
PF6 |I2C2_SCL, TIM4_CH4, USART3_DE, USART3_RTS||

View File

@ -22,7 +22,7 @@ I2C3|**PC9**|**PA8**|
Instance |RX|TX|
-|-|-|
UART4|**PA1**, PC11|**PC10**|
UART4|**PA1**, PC11|**PA0**, PC10|
UART5|**PD2**|**PC12**|
USART1|**PA10**, PB7|**PA9**, PB6|
USART2|**PA3**, PD6|**PA2**, PD5|
@ -41,7 +41,7 @@ I2S3|**PB3**, PC10|**PB5**, PC12|**PA4**, PA15|**PC7**|
Instance |CH1|CH2|CH3|CH4|
-|-|-|-|-|
TIM1|**PA8**, PE9, <span style="text-decoration: overline">PA7</span>, <span style="text-decoration: overline">PB13</span>, <span style="text-decoration: overline">PE8</span>|**PA9**, PE11, <span style="text-decoration: overline">PB0</span>, <span style="text-decoration: overline">PB14</span>, <span style="text-decoration: overline">PE10</span>|**PA10**, PE13, <span style="text-decoration: overline">PB1</span>, <span style="text-decoration: overline">PB15</span>, <span style="text-decoration: overline">PE12</span>|**PA11**, PE14|
TIM2|**PA5**, PA15|**PA1**, PB3|**PA2**, PB10|**PA3**, PB11|
TIM2|**PA0**, PA5, PA15|**PA1**, PB3|**PA2**, PB10|**PA3**, PB11|
TIM3|**PA6**, PB4, PC6|**PA7**, PB5, PC7|**PB0**, PC8|**PB1**, PC9|
TIM4|**PB6**, PD12|**PB7**, PD13|**PB8**, PD14|**PB9**, PD15|
TIM5|**PA0**|**PA1**|**PA2**|**PA3**|
@ -102,7 +102,7 @@ ADC3|IN13|PC3|
Pin | Peripheral signal available on the pin | Board macro
-|-|-
PA0 |ADC1_IN0, ADC2_IN0, ADC3_IN0, ETH_CRS, SYS_WKUP, TIM5_CH1, TIM8_ETR|**USER_BTN**|
PA0 |ADC1_IN0, ADC2_IN0, ADC3_IN0, ETH_CRS, SYS_WKUP, TIM2_CH1, TIM2_ETR, TIM5_CH1, TIM8_ETR, UART4_TX, USART2_CTS|**USER_BTN**|
PA1 |ADC1_IN1, ADC2_IN1, ADC3_IN1, ETH_REF_CLK, ETH_RX_CLK, TIM2_CH2, TIM5_CH2, UART4_RX, USART2_RTS||
PA2 |ADC1_IN2, ADC2_IN2, ADC3_IN2, ETH_MDIO, TIM2_CH3, TIM5_CH3, TIM9_CH1, USART2_TX||
PA3 |ADC1_IN3, ADC2_IN3, ADC3_IN3, ETH_COL, TIM2_CH4, TIM5_CH4, TIM9_CH2, USART2_RX, USB_OTG_HS_ULPI_D0||

View File

@ -6,7 +6,7 @@ Below are the pins usable for the peripherals. Pins in **bold** are the default.
Instance |MOSI|MISO|SCK|
-|-|-|-|
SPI1|28 (PA7), **39 (PB5)**|27 (PA6), **3 (PB4)**|26 (PA5), **38 (PB3)**|
SPI1|28 (PA7), 39 (PB5)|27 (PA6), 3 (PB4)|26 (PA5), 38 (PB3)|
SPI2|**11 (PB15)**, 47 (PC1), 49 (PC3), 7 (PI3)|**12 (PB14)**, 48 (PC2), 8 (PI2)|**29 (PA9)**, 42 (PB10), 45 (PB13), 63 (PD3), 13 (PI1)|
SPI3|**37 (PB2)**, 39 (PB5), 56 (PC12), 66 (PD6)|**3 (PB4)**, 55 (PC11)|**38 (PB3)**, 54 (PC10)|
SPI4|**82 (PE6)**, 90 (PE14)|**81 (PE5)**, 89 (PE13)|**78 (PE2)**, 88 (PE12)|
@ -26,7 +26,7 @@ I2C4|**73 (PD13)**, 102 (PF15), 128 (PH12)|**72 (PD12)**, 101 (PF14), 127 (PH11)
Instance |RX|TX|
-|-|-|
UART4|**22 (PA1)**, 55 (PC11)|**54 (PC10)**|
UART4|**22 (PA1)**, 55 (PC11)|**16 (PA0)**, 54 (PC10)|
UART5|**62 (PD2)**|**56 (PC12)**|
UART7|**83 (PE7)**, 21 (PF6)|**84 (PE8)**, 20 (PF7)|
UART8|**76 (PE0)**|**77 (PE1)**|
@ -48,10 +48,10 @@ I2S3|**38 (PB3)**, 54 (PC10)|**37 (PB2)**, 39 (PB5), 56 (PC12), 66 (PD6)|**25 (P
Instance |CH1|CH2|CH3|CH4|
-|-|-|-|-|
TIM1|**5 (PA8)**, 85 (PE9), <span style="text-decoration: overline">28 (PA7)</span>, <span style="text-decoration: overline">45 (PB13)</span>, <span style="text-decoration: overline">84 (PE8)</span>|**29 (PA9)**, 87 (PE11), <span style="text-decoration: overline">35 (PB0)</span>, <span style="text-decoration: overline">12 (PB14)</span>, <span style="text-decoration: overline">86 (PE10)</span>|**30 (PA10)**, 89 (PE13), <span style="text-decoration: overline">36 (PB1)</span>, <span style="text-decoration: overline">11 (PB15)</span>, <span style="text-decoration: overline">88 (PE12)</span>|**31 (PA11)**, 90 (PE14)|
TIM2|**26 (PA5)**, 9 (PA15)|**22 (PA1)**, 38 (PB3)|**23 (PA2)**, 42 (PB10)|**24 (PA3)**, 43 (PB11)|
TIM2|**16 (PA0)**, 26 (PA5), 9 (PA15)|**22 (PA1)**, 38 (PB3)|**23 (PA2)**, 42 (PB10)|**24 (PA3)**, 43 (PB11)|
TIM3|**27 (PA6)**, 3 (PB4), 1 (PC6)|**28 (PA7)**, 39 (PB5), 0 (PC7)|**35 (PB0)**, 52 (PC8)|**36 (PB1)**, 53 (PC9)|
TIM4|**40 (PB6)**, 72 (PD12)|**41 (PB7)**, 73 (PD13)|**15 (PB8)**, 74 (PD14)|**14 (PB9)**, 75 (PD15)|
TIM5|**126 (PH10)**|**22 (PA1)**, 127 (PH11)|**23 (PA2)**, 128 (PH12)|**24 (PA3)**, 10 (PI0)|
TIM5|**16 (PA0)**, 126 (PH10)|**22 (PA1)**, 127 (PH11)|**23 (PA2)**, 128 (PH12)|**24 (PA3)**, 10 (PI0)|
TIM8|**1 (PC6)**, 133 (PI5), <span style="text-decoration: overline">26 (PA5)</span>, <span style="text-decoration: overline">28 (PA7)</span>, <span style="text-decoration: overline">129 (PH13)</span>|**0 (PC7)**, 134 (PI6), <span style="text-decoration: overline">35 (PB0)</span>, <span style="text-decoration: overline">12 (PB14)</span>, <span style="text-decoration: overline">130 (PH14)</span>|**52 (PC8)**, 135 (PI7), <span style="text-decoration: overline">36 (PB1)</span>, <span style="text-decoration: overline">11 (PB15)</span>, <span style="text-decoration: overline">131 (PH15)</span>|**53 (PC9)**, 8 (PI2)|
TIM9|**23 (PA2)**, 81 (PE5)|**24 (PA3)**, 82 (PE6)|||
TIM10|**15 (PB8)**, 21 (PF6)||||
@ -120,29 +120,29 @@ Pin | Peripheral signal available on the pin | Board macro
0 (PC7) |DCMI_D1, I2S3_MCK, LTDC_G6, SDMMC1_D7, TIM3_CH2, TIM8_CH2, USART6_RX||
1 (PC6) |DCMI_D0, I2S2_MCK, LTDC_HSYNC, SDMMC1_D6, TIM3_CH1, TIM8_CH1, USART6_TX||
2 (PG6) |DCMI_D12, LTDC_R7||
3 (PB4) |I2S2_WS, SPI1_MISO, SPI2_NSS, SPI3_MISO, SYS_JTRST, TIM3_CH1|**MISO**|
3 (PB4) |I2S2_WS, SPI1_MISO, SPI2_NSS, SPI3_MISO, SYS_JTRST, TIM3_CH1||
4 (PG7) |DCMI_D13, FMC_INT, LTDC_CLK, USART6_CK||
5 (PA8) |I2C3_SCL, LTDC_R6, RCC_MCO_1, TIM1_CH1, TIM8_BKIN2, USART1_CK, USB_OTG_FS_SOF||
6 (PH6) |DCMI_D8, ETH_RXD2, FMC_SDNE1, I2C2_SMBA, SPI5_SCK, TIM12_CH1||
7 (PI3) |DCMI_D10, FMC_D27, I2S2_SD, SPI2_MOSI, TIM8_ETR||
8 (PI2) |DCMI_D9, FMC_D26, LTDC_G7, SPI2_MISO, TIM8_CH4||
9 (PA15) |CEC, I2S1_WS, I2S3_WS, SPI1_NSS, SPI3_NSS, SYS_JTDI, TIM2_CH1, TIM2_ETR, UART4_DE, UART4_RTS||
10 (PI0) |DCMI_D13, FMC_D24, I2S2_WS, LTDC_G5, SPI2_NSS, TIM5_CH4||
11 (PB15) |I2S2_SD, RTC_REFIN, SPI2_MOSI, TIM1_CH3N, TIM8_CH3N, TIM12_CH2, USB_OTG_HS_DP||
12 (PB14) |SPI2_MISO, TIM1_CH2N, TIM8_CH2N, TIM12_CH1, USART3_DE, USART3_RTS, USB_OTG_HS_DM||
13 (PI1) |DCMI_D8, FMC_D25, I2S2_CK, LTDC_G6, SPI2_SCK, TIM8_BKIN2|**LED_BUILTIN**|
10 (PI0) |DCMI_D13, FMC_D24, I2S2_WS, LTDC_G5, SPI2_NSS, TIM5_CH4|**SS**|
11 (PB15) |I2S2_SD, RTC_REFIN, SPI2_MOSI, TIM1_CH3N, TIM8_CH3N, TIM12_CH2, USB_OTG_HS_DP|**MOSI**|
12 (PB14) |SPI2_MISO, TIM1_CH2N, TIM8_CH2N, TIM12_CH1, USART3_DE, USART3_RTS, USB_OTG_HS_DM|**MISO**|
13 (PI1) |DCMI_D8, FMC_D25, I2S2_CK, LTDC_G6, SPI2_SCK, TIM8_BKIN2|**LED_BUILTIN**, **SCK**|
14 (PB9) |CAN1_TX, DAC_EXTI9, DCMI_D7, I2C1_SDA, I2S2_WS, LTDC_B7, SDMMC1_D5, SPI2_NSS, TIM4_CH4, TIM11_CH1|**SDA**|
15 (PB8) |CAN1_RX, DCMI_D6, ETH_TXD3, I2C1_SCL, LTDC_B6, SDMMC1_D4, TIM4_CH3, TIM10_CH1|**SCL**|
16 (PA0) |ADC1_IN0, ADC2_IN0, ADC3_IN0, SYS_WKUP1||
17 (PF10) |ADC3_IN8, DCMI_D11, LTDC_DE||
18 (PF9) |ADC3_IN7, QUADSPI_BK1_IO1, SAI1_FS_B, SPI5_MOSI, TIM14_CH1, UART7_CTS||
19 (PF8) |ADC3_IN6, QUADSPI_BK1_IO0, SAI1_SCK_B, SPI5_MISO, TIM13_CH1, UART7_DE, UART7_RTS||
20 (PF7) |ADC3_IN5, QUADSPI_BK1_IO2, SAI1_MCLK_B, SPI5_SCK, TIM11_CH1, UART7_TX||
21 (PF6) |ADC3_IN4, QUADSPI_BK1_IO3, SAI1_SD_B, SPI5_NSS, TIM10_CH1, UART7_RX||
16 (PA0) |ADC1_IN0, ADC2_IN0, ADC3_IN0, ETH_CRS, SAI2_SD_B, SYS_WKUP1, TIM2_CH1, TIM2_ETR, TIM5_CH1, TIM8_ETR, UART4_TX, USART2_CTS|**A0**|
17 (PF10) |ADC3_IN8, DCMI_D11, LTDC_DE|**A1**|
18 (PF9) |ADC3_IN7, QUADSPI_BK1_IO1, SAI1_FS_B, SPI5_MOSI, TIM14_CH1, UART7_CTS|**A2**|
19 (PF8) |ADC3_IN6, QUADSPI_BK1_IO0, SAI1_SCK_B, SPI5_MISO, TIM13_CH1, UART7_DE, UART7_RTS|**A3**|
20 (PF7) |ADC3_IN5, QUADSPI_BK1_IO2, SAI1_MCLK_B, SPI5_SCK, TIM11_CH1, UART7_TX|**A4**|
21 (PF6) |ADC3_IN4, QUADSPI_BK1_IO3, SAI1_SD_B, SPI5_NSS, TIM10_CH1, UART7_RX|**A5**|
22 (PA1) |ADC1_IN1, ADC2_IN1, ADC3_IN1, ETH_REF_CLK, ETH_RX_CLK, LTDC_R2, QUADSPI_BK1_IO3, SAI2_MCLK_B, TIM2_CH2, TIM5_CH2, UART4_RX, USART2_DE, USART2_RTS||
23 (PA2) |ADC1_IN2, ADC2_IN2, ADC3_IN2, ETH_MDIO, LTDC_R1, SAI2_SCK_B, SYS_WKUP2, TIM2_CH3, TIM5_CH3, TIM9_CH1, USART2_TX||
24 (PA3) |ADC1_IN3, ADC2_IN3, ADC3_IN3, ETH_COL, LTDC_B5, TIM2_CH4, TIM5_CH4, TIM9_CH2, USART2_RX, USB_OTG_HS_ULPI_D0||
25 (PA4) |ADC1_IN4, ADC2_IN4, DAC_OUT1, DCMI_HSYNC, I2S1_WS, I2S3_WS, LTDC_VSYNC, SPI1_NSS, SPI3_NSS, USART2_CK, USB_OTG_HS_SOF|**SS**|
25 (PA4) |ADC1_IN4, ADC2_IN4, DAC_OUT1, DCMI_HSYNC, I2S1_WS, I2S3_WS, LTDC_VSYNC, SPI1_NSS, SPI3_NSS, USART2_CK, USB_OTG_HS_SOF||
26 (PA5) |ADC1_IN5, ADC2_IN5, DAC_OUT2, I2S1_CK, LTDC_R4, SPI1_SCK, TIM2_CH1, TIM2_ETR, TIM8_CH1N, USB_OTG_HS_ULPI_CK||
27 (PA6) |ADC1_IN6, ADC2_IN6, DCMI_PIXCLK, LTDC_G2, SPI1_MISO, TIM1_BKIN, TIM3_CH1, TIM8_BKIN, TIM13_CH1||
28 (PA7) |ADC1_IN7, ADC2_IN7, ETH_CRS_DV, ETH_RX_DV, FMC_SDNWE, I2S1_SD, SPI1_MOSI, TIM1_CH1N, TIM3_CH2, TIM8_CH1N, TIM14_CH1||
@ -155,8 +155,8 @@ Pin | Peripheral signal available on the pin | Board macro
35 (PB0) |ADC1_IN8, ADC2_IN8, ETH_RXD2, LTDC_R3, TIM1_CH2N, TIM3_CH3, TIM8_CH2N, UART4_CTS, USB_OTG_HS_ULPI_D1||
36 (PB1) |ADC1_IN9, ADC2_IN9, ETH_RXD3, LTDC_R6, TIM1_CH3N, TIM3_CH4, TIM8_CH3N, USB_OTG_HS_ULPI_D2||
37 (PB2) |I2S3_SD, QUADSPI_CLK, SAI1_SD_A, SPI3_MOSI||
38 (PB3) |I2S1_CK, I2S3_CK, SPI1_SCK, SPI3_SCK, SYS_JTDO-SWO, TIM2_CH2|**SCK**|
39 (PB5) |CAN2_RX, DCMI_D10, ETH_PPS_OUT, FMC_SDCKE1, I2C1_SMBA, I2S1_SD, I2S3_SD, SPI1_MOSI, SPI3_MOSI, TIM3_CH2, USB_OTG_HS_ULPI_D7|**MOSI**|
38 (PB3) |I2S1_CK, I2S3_CK, SPI1_SCK, SPI3_SCK, SYS_JTDO-SWO, TIM2_CH2||
39 (PB5) |CAN2_RX, DCMI_D10, ETH_PPS_OUT, FMC_SDCKE1, I2C1_SMBA, I2S1_SD, I2S3_SD, SPI1_MOSI, SPI3_MOSI, TIM3_CH2, USB_OTG_HS_ULPI_D7||
40 (PB6) |CAN2_TX, CEC, DCMI_D5, FMC_SDNE1, I2C1_SCL, QUADSPI_BK1_NCS, TIM4_CH1, USART1_TX||
41 (PB7) |DCMI_VSYNC, FMC_NL, I2C1_SDA, TIM4_CH2, USART1_RX||
42 (PB10) |ETH_RX_ER, I2C2_SCL, I2S2_CK, LTDC_G4, SPI2_SCK, TIM2_CH3, USART3_TX, USB_OTG_HS_ULPI_D3||

View File

@ -91,5 +91,5 @@ PB15 |I2S2_SD, LCD_SEG15, RTC_REFIN, SPI2_MOSI||
PC13 |RTC_TAMP1, RTC_TS, SYS_WKUP2||
PC14 |RCC_OSC32_IN||
PC15 |RCC_OSC32_OUT||
PH0 |RCC_OSC_IN||
PH0 |CRS_SYNC, RCC_OSC_IN||
PH1 |RCC_OSC_OUT||

View File

@ -39,7 +39,7 @@ I2S3|**PB3**|**PB5**|**PA15**|**PC7**|
Instance |CH1|CH2|CH3|CH4|
-|-|-|-|-|
TIM1|**PA8**, PE9, <span style="text-decoration: overline">PA7</span>, <span style="text-decoration: overline">PB13</span>, <span style="text-decoration: overline">PE8</span>|**PA9**, PE11, <span style="text-decoration: overline">PB0</span>, <span style="text-decoration: overline">PB14</span>, <span style="text-decoration: overline">PE10</span>|**PA10**, PE13, <span style="text-decoration: overline">PB1</span>, <span style="text-decoration: overline">PB15</span>, <span style="text-decoration: overline">PE12</span>|**PA11**, PE14|
TIM2|**PA15**|**PA1**, PB3|**PA2**, PB10|**PA3**, PB11|
TIM2|**PA0**, PA15|**PA1**, PB3|**PA2**, PB10|**PA3**, PB11|
TIM3|**PA6**, PB4, PC6|**PA7**, PB5, PC7|**PB0**, PC8|**PB1**, PC9|
TIM4|**PB6**, PD12|**PB7**, PD13|**PB8**, PD14|**PB9**, PD15|
TIM5|**PA0**|**PA1**|**PA2**|**PA3**|
@ -99,7 +99,7 @@ ADC3|IN13|PC3|
Pin | Peripheral signal available on the pin | Board macro
-|-|-
PA0 |ADC1_IN0, ADC2_IN0, ADC3_IN0, SYS_WKUP, TIM5_CH1, TIM8_ETR||
PA0 |ADC1_IN0, ADC2_IN0, ADC3_IN0, SYS_WKUP, TIM2_CH1, TIM2_ETR, TIM5_CH1, TIM8_ETR, USART2_CTS||
PA1 |ADC1_IN1, ADC2_IN1, ADC3_IN1, TIM2_CH2, TIM5_CH2, USART2_RTS||
PA2 |ADC1_IN2, ADC2_IN2, ADC3_IN2, TIM2_CH3, TIM5_CH3, USART2_TX||
PA3 |ADC1_IN3, ADC2_IN3, ADC3_IN3, TIM2_CH4, TIM5_CH4, USART2_RX||

View File

@ -39,7 +39,7 @@ I2S3|**PB3**|**PB5**|**PA15**|**PC7**|
Instance |CH1|CH2|CH3|CH4|
-|-|-|-|-|
TIM1|**PA8**, PE9, <span style="text-decoration: overline">PA7</span>, <span style="text-decoration: overline">PB13</span>, <span style="text-decoration: overline">PE8</span>|**PA9**, PE11, <span style="text-decoration: overline">PB0</span>, <span style="text-decoration: overline">PB14</span>, <span style="text-decoration: overline">PE10</span>|**PA10**, PE13, <span style="text-decoration: overline">PB1</span>, <span style="text-decoration: overline">PB15</span>, <span style="text-decoration: overline">PE12</span>|**PA11**, PE14|
TIM2|**PA15**|**PA1**, PB3|**PA2**, PB10|**PA3**, PB11|
TIM2|**PA0**, PA15|**PA1**, PB3|**PA2**, PB10|**PA3**, PB11|
TIM3|**PA6**, PB4, PC6|**PA7**, PB5, PC7|**PB0**, PC8|**PB1**, PC9|
TIM4|**PB6**, PD12|**PB7**, PD13|**PB8**, PD14|**PB9**, PD15|
TIM5|**PA0**|**PA1**|**PA2**|**PA3**|
@ -99,7 +99,7 @@ ADC3|IN13|PC3|
Pin | Peripheral signal available on the pin | Board macro
-|-|-
PA0 |ADC1_IN0, ADC2_IN0, ADC3_IN0, SYS_WKUP, TIM5_CH1, TIM8_ETR||
PA0 |ADC1_IN0, ADC2_IN0, ADC3_IN0, SYS_WKUP, TIM2_CH1, TIM2_ETR, TIM5_CH1, TIM8_ETR, USART2_CTS||
PA1 |ADC1_IN1, ADC2_IN1, ADC3_IN1, TIM2_CH2, TIM5_CH2, USART2_RTS||
PA2 |ADC1_IN2, ADC2_IN2, ADC3_IN2, TIM2_CH3, TIM5_CH3, USART2_TX||
PA3 |ADC1_IN3, ADC2_IN3, ADC3_IN3, TIM2_CH4, TIM5_CH4, USART2_RX||

View File

@ -39,7 +39,7 @@ I2S3|**PB3**|**PB5**|**PA15**|**PC7**|
Instance |CH1|CH2|CH3|CH4|
-|-|-|-|-|
TIM1|**PA8**, PE9, <span style="text-decoration: overline">PA7</span>, <span style="text-decoration: overline">PB13</span>, <span style="text-decoration: overline">PE8</span>|**PA9**, PE11, <span style="text-decoration: overline">PB0</span>, <span style="text-decoration: overline">PB14</span>, <span style="text-decoration: overline">PE10</span>|**PA10**, PE13, <span style="text-decoration: overline">PB1</span>, <span style="text-decoration: overline">PB15</span>, <span style="text-decoration: overline">PE12</span>|**PA11**, PE14|
TIM2|**PA15**|**PA1**, PB3|**PA2**, PB10|**PA3**, PB11|
TIM2|**PA0**, PA15|**PA1**, PB3|**PA2**, PB10|**PA3**, PB11|
TIM3|**PA6**, PB4, PC6|**PA7**, PB5, PC7|**PB0**, PC8|**PB1**, PC9|
TIM4|**PB6**, PD12|**PB7**, PD13|**PB8**, PD14|**PB9**, PD15|
TIM5|**PA0**|**PA1**|**PA2**|**PA3**|
@ -105,7 +105,7 @@ ADC3|IN13|PC3|
Pin | Peripheral signal available on the pin | Board macro
-|-|-
PA0 |ADC1_IN0, ADC2_IN0, ADC3_IN0, SYS_WKUP, TIM5_CH1, TIM8_ETR||
PA0 |ADC1_IN0, ADC2_IN0, ADC3_IN0, SYS_WKUP, TIM2_CH1, TIM2_ETR, TIM5_CH1, TIM8_ETR, USART2_CTS||
PA1 |ADC1_IN1, ADC2_IN1, ADC3_IN1, TIM2_CH2, TIM5_CH2, USART2_RTS||
PA2 |ADC1_IN2, ADC2_IN2, ADC3_IN2, TIM2_CH3, TIM5_CH3, TIM9_CH1, USART2_TX||
PA3 |ADC1_IN3, ADC2_IN3, ADC3_IN3, TIM2_CH4, TIM5_CH4, TIM9_CH2, USART2_RX||

View File

@ -39,7 +39,7 @@ I2S3|**PB3**|**PB5**|**PA15**|**PC7**|
Instance |CH1|CH2|CH3|CH4|
-|-|-|-|-|
TIM1|**PA8**, PE9, <span style="text-decoration: overline">PA7</span>, <span style="text-decoration: overline">PB13</span>, <span style="text-decoration: overline">PE8</span>|**PA9**, PE11, <span style="text-decoration: overline">PB0</span>, <span style="text-decoration: overline">PB14</span>, <span style="text-decoration: overline">PE10</span>|**PA10**, PE13, <span style="text-decoration: overline">PB1</span>, <span style="text-decoration: overline">PB15</span>, <span style="text-decoration: overline">PE12</span>|**PA11**, PE14|
TIM2|**PA15**|**PA1**, PB3|**PA2**, PB10|**PA3**, PB11|
TIM2|**PA0**, PA15|**PA1**, PB3|**PA2**, PB10|**PA3**, PB11|
TIM3|**PA6**, PB4, PC6|**PA7**, PB5, PC7|**PB0**, PC8|**PB1**, PC9|
TIM4|**PB6**, PD12|**PB7**, PD13|**PB8**, PD14|**PB9**, PD15|
TIM5|**PA0**|**PA1**|**PA2**|**PA3**|
@ -105,7 +105,7 @@ ADC3|IN13|PC3|
Pin | Peripheral signal available on the pin | Board macro
-|-|-
PA0 |ADC1_IN0, ADC2_IN0, ADC3_IN0, SYS_WKUP, TIM5_CH1, TIM8_ETR||
PA0 |ADC1_IN0, ADC2_IN0, ADC3_IN0, SYS_WKUP, TIM2_CH1, TIM2_ETR, TIM5_CH1, TIM8_ETR, USART2_CTS||
PA1 |ADC1_IN1, ADC2_IN1, ADC3_IN1, TIM2_CH2, TIM5_CH2, USART2_RTS||
PA2 |ADC1_IN2, ADC2_IN2, ADC3_IN2, TIM2_CH3, TIM5_CH3, TIM9_CH1, USART2_TX||
PA3 |ADC1_IN3, ADC2_IN3, ADC3_IN3, TIM2_CH4, TIM5_CH4, TIM9_CH2, USART2_RX||

View File

@ -39,7 +39,7 @@ I2S3|**3 (PB3)**|**4 (PB5)**|**26 (PA15)**|**9 (PC7)**|
Instance |CH1|CH2|CH3|CH4|
-|-|-|-|-|
TIM1|**7 (PA8)**, <span style="text-decoration: overline">11 (PA7)</span>, <span style="text-decoration: overline">31 (PB13)</span>|**8 (PA9)**, <span style="text-decoration: overline">19 (PB0)</span>, <span style="text-decoration: overline">32 (PB14)</span>|**2 (PA10)**, <span style="text-decoration: overline">27 (PB1)</span>, <span style="text-decoration: overline">33 (PB15)</span>|**22 (PA11)**|
TIM2|**26 (PA15)**|**17 (PA1)**, 3 (PB3)|**1 (PA2)**, 6 (PB10)|**0 (PA3)**, PB11|
TIM2|**16 (PA0)**, 26 (PA15)|**17 (PA1)**, 3 (PB3)|**1 (PA2)**, 6 (PB10)|**0 (PA3)**, PB11|
TIM3|**12 (PA6)**, 5 (PB4), 38 (PC6)|**11 (PA7)**, 4 (PB5), 9 (PC7)|**19 (PB0)**, 39 (PC8)|**27 (PB1)**, 40 (PC9)|
TIM4|**10 (PB6)**|**29 (PB7)**|**15 (PB8)**|**14 (PB9)**|
TIM5|**16 (PA0)**|**17 (PA1)**|**1 (PA2)**|**0 (PA3)**|
@ -116,7 +116,7 @@ Pin | Peripheral signal available on the pin | Board macro
13 (PA5) |ADC1_IN5, ADC2_IN5, DAC_OUT2, SPI1_SCK|**LED_BUILTIN**, **SCK**|
14 (PB9) |CAN_TX, I2C1_SDA, SDIO_D5, TIM4_CH4, TIM11_CH1|**SDA**|
15 (PB8) |CAN_RX, I2C1_SCL, SDIO_D4, TIM4_CH3, TIM10_CH1|**SCL**|
16 (PA0) |ADC1_IN0, ADC2_IN0, ADC3_IN0, SYS_WKUP, TIM5_CH1, TIM8_ETR, USART2_CTS|**A0**|
16 (PA0) |ADC1_IN0, ADC2_IN0, ADC3_IN0, SYS_WKUP, TIM2_CH1, TIM2_ETR, TIM5_CH1, TIM8_ETR, USART2_CTS|**A0**|
17 (PA1) |ADC1_IN1, ADC2_IN1, ADC3_IN1, TIM2_CH2, TIM5_CH2, USART2_RTS|**A1**|
18 (PA4) |ADC1_IN4, ADC2_IN4, DAC_OUT1, SPI1_NSS, USART2_CK|**A2**, **SS**|
19 (PB0) |ADC1_IN8, ADC2_IN8, TIM1_CH2N, TIM3_CH3, TIM8_CH2N|**A3**|

View File

@ -29,7 +29,7 @@ USART3|**0 (PB11)**|**1 (PB10)**|
Instance |CH1|CH2|CH3|CH4|
-|-|-|-|-|
TIM1|**27 (PA8)**, <span style="text-decoration: overline">4 (PA7)</span>, <span style="text-decoration: overline">30 (PB13)</span>|**26 (PA9)**, <span style="text-decoration: overline">3 (PB0)</span>, <span style="text-decoration: overline">29 (PB14)</span>|**25 (PA10)**, <span style="text-decoration: overline">33 (PB1)</span>, <span style="text-decoration: overline">28 (PB15)</span>|**24 (PA11)**|
TIM2|**20 (PA15)**|**10 (PA1)**, 19 (PB3)|**9 (PA2)**, 1 (PB10)|**8 (PA3)**, 0 (PB11)|
TIM2|**11 (PA0)**, 20 (PA15)|**10 (PA1)**, 19 (PB3)|**9 (PA2)**, 1 (PB10)|**8 (PA3)**, 0 (PB11)|
TIM3|**5 (PA6)**, 18 (PB4)|**4 (PA7)**, 17 (PB5)|**3 (PB0)**|**33 (PB1)**|
TIM4|**16 (PB6)**|**15 (PB7)**|**32 (PB8)**|**34 (PB9)**|
@ -73,7 +73,7 @@ Pin | Peripheral signal available on the pin | Board macro
8 (PA3) |ADC1_IN3, ADC2_IN3, TIM2_CH4, USART2_RX||
9 (PA2) |ADC1_IN2, ADC2_IN2, TIM2_CH3, USART2_TX||
10 (PA1) |ADC1_IN1, ADC2_IN1, TIM2_CH2, USART2_RTS||
11 (PA0) |ADC1_IN0, ADC2_IN0, SYS_WKUP, USART2_CTS||
11 (PA0) |ADC1_IN0, ADC2_IN0, SYS_WKUP, TIM2_CH1, TIM2_ETR, USART2_CTS||
12 (PC15) |ADC1_EXTI15, ADC2_EXTI15, RCC_OSC32_OUT||
13 (PC14) |RCC_OSC32_IN||
14 (PC13) |RTC_OUT, RTC_TAMPER||

View File

@ -29,7 +29,7 @@ USART3|**PB11**, 42 (PC11)|**6 (PB10)**, 41 (PC10)|
Instance |CH1|CH2|CH3|CH4|
-|-|-|-|-|
TIM1|**7 (PA8)**, <span style="text-decoration: overline">11 (PA7)</span>, <span style="text-decoration: overline">31 (PB13)</span>|**8 (PA9)**, <span style="text-decoration: overline">19 (PB0)</span>, <span style="text-decoration: overline">32 (PB14)</span>|**2 (PA10)**, <span style="text-decoration: overline">27 (PB1)</span>, <span style="text-decoration: overline">33 (PB15)</span>|**22 (PA11)**|
TIM2|**26 (PA15)**|**17 (PA1)**, 3 (PB3)|**1 (PA2)**, 6 (PB10)|**0 (PA3)**, PB11|
TIM2|**16 (PA0)**, 26 (PA15)|**17 (PA1)**, 3 (PB3)|**1 (PA2)**, 6 (PB10)|**0 (PA3)**, PB11|
TIM3|**12 (PA6)**, 5 (PB4), 38 (PC6)|**11 (PA7)**, 4 (PB5), 9 (PC7)|**19 (PB0)**, 39 (PC8)|**27 (PB1)**, 40 (PC9)|
TIM4|**10 (PB6)**|**29 (PB7)**|**15 (PB8)**|**14 (PB9)**|
@ -90,7 +90,7 @@ Pin | Peripheral signal available on the pin | Board macro
13 (PA5) |ADC1_IN5, ADC2_IN5, SPI1_SCK|**LED_BUILTIN**, **SCK**|
14 (PB9) |CAN_TX, I2C1_SDA, TIM4_CH4|**SDA**|
15 (PB8) |CAN_RX, I2C1_SCL, TIM4_CH3|**SCL**|
16 (PA0) |ADC1_IN0, ADC2_IN0, SYS_WKUP, USART2_CTS|**A0**|
16 (PA0) |ADC1_IN0, ADC2_IN0, SYS_WKUP, TIM2_CH1, TIM2_ETR, USART2_CTS|**A0**|
17 (PA1) |ADC1_IN1, ADC2_IN1, TIM2_CH2, USART2_RTS|**A1**|
18 (PA4) |ADC1_IN4, ADC2_IN4, SPI1_NSS, USART2_CK|**A2**, **SS**|
19 (PB0) |ADC1_IN8, ADC2_IN8, TIM1_CH2N, TIM3_CH3|**A3**|

View File

@ -7,7 +7,7 @@ Below are the pins usable for the peripherals. Pins in **bold** are the default.
Instance |MOSI|MISO|SCK|
-|-|-|-|
SPI1|**11 (PA7)**, 4 (PB5)|**12 (PA6)**, 5 (PB4)|**13 (PA5)**, 3 (PB3)|
SPI2|**22 (PA11)**, 33 (PB15)|**2 (PA10)**, 32 (PB14)|**31 (PB13)**|
SPI2|**22 (PA11)**, 33 (PB15)|**2 (PA10)**, 32 (PB14)|**31 (PB13)**, PF1|
SPI3|**4 (PB5)**, 43 (PC12)|**5 (PB4)**, 42 (PC11)|**3 (PB3)**, 41 (PC10)|
## I2C
@ -15,7 +15,7 @@ SPI3|**4 (PB5)**, 43 (PC12)|**5 (PB4)**, 42 (PC11)|**3 (PB3)**, 41 (PC10)|
Instance |SDA|SCL|
-|-|-|
I2C1|25 (PA14), 29 (PB7), **14 (PB9)**|26 (PA15), 10 (PB6), **15 (PB8)**|
I2C2|**2 (PA10)**|**8 (PA9)**|
I2C2|**2 (PA10)**, PF0|**8 (PA9)**, PF1|
I2C3|**4 (PB5)**, 40 (PC9)|**7 (PA8)**|
## USART
@ -32,14 +32,14 @@ USART3|**15 (PB8)**, PB11, 42 (PC11)|**14 (PB9)**, 6 (PB10), 41 (PC10)|
Instance |CK|SD|WS|MCK|
-|-|-|-|-|
I2S2|**31 (PB13)**|**22 (PA11)**, 33 (PB15)|**30 (PB12)**|**7 (PA8)**, 38 (PC6)|
I2S2|**31 (PB13)**, PF1|**22 (PA11)**, 33 (PB15)|**30 (PB12)**, PF0|**7 (PA8)**, 38 (PC6)|
I2S3|**3 (PB3)**, 41 (PC10)|**4 (PB5)**, 43 (PC12)|**18 (PA4)**, 26 (PA15)|**8 (PA9)**, 9 (PC7)|
## TIM
Instance |CH1|CH2|CH3|CH4|
-|-|-|-|-|
TIM1|**7 (PA8)**, 21 (PC0), <span style="text-decoration: overline">11 (PA7)</span>, <span style="text-decoration: overline">22 (PA11)</span>, <span style="text-decoration: overline">31 (PB13)</span>, <span style="text-decoration: overline">44 (PC13)</span>|**8 (PA9)**, 20 (PC1), <span style="text-decoration: overline">23 (PA12)</span>, <span style="text-decoration: overline">19 (PB0)</span>, <span style="text-decoration: overline">32 (PB14)</span>|**2 (PA10)**, 34 (PC2), <span style="text-decoration: overline">27 (PB1)</span>, <span style="text-decoration: overline">33 (PB15)</span>|**22 (PA11)**, 35 (PC3)|
TIM1|**7 (PA8)**, 21 (PC0), <span style="text-decoration: overline">11 (PA7)</span>, <span style="text-decoration: overline">22 (PA11)</span>, <span style="text-decoration: overline">31 (PB13)</span>, <span style="text-decoration: overline">44 (PC13)</span>|**8 (PA9)**, 20 (PC1), <span style="text-decoration: overline">23 (PA12)</span>, <span style="text-decoration: overline">19 (PB0)</span>, <span style="text-decoration: overline">32 (PB14)</span>|**2 (PA10)**, 34 (PC2), <span style="text-decoration: overline">27 (PB1)</span>, <span style="text-decoration: overline">33 (PB15)</span>, <span style="text-decoration: overline">PF0</span>|**22 (PA11)**, 35 (PC3)|
TIM2|**16 (PA0)**, 13 (PA5), 26 (PA15)|**17 (PA1)**, 3 (PB3)|**1 (PA2)**, 8 (PA9), 6 (PB10)|**0 (PA3)**, 2 (PA10), PB11|
TIM3|**12 (PA6)**, 5 (PB4), 38 (PC6)|**18 (PA4)**, 11 (PA7), 4 (PB5), 9 (PC7)|**19 (PB0)**, 39 (PC8)|**27 (PB1)**, 29 (PB7), 40 (PC9)|
TIM4|**22 (PA11)**, 10 (PB6)|**23 (PA12)**, 29 (PB7)|**24 (PA13)**, 15 (PB8)|**14 (PB9)**|

View File

@ -38,7 +38,7 @@ I2S3|**3 (PB3)**, 41 (PC10)|**4 (PB5)**, 43 (PC12)|**18 (PA4)**, 26 (PA15)|**9 (
Instance |CH1|CH2|CH3|CH4|
-|-|-|-|-|
TIM1|**7 (PA8)**, <span style="text-decoration: overline">11 (PA7)</span>, <span style="text-decoration: overline">31 (PB13)</span>|**8 (PA9)**, <span style="text-decoration: overline">19 (PB0)</span>, <span style="text-decoration: overline">32 (PB14)</span>|**2 (PA10)**, <span style="text-decoration: overline">27 (PB1)</span>, <span style="text-decoration: overline">33 (PB15)</span>|**22 (PA11)**|
TIM2|**13 (PA5)**, 26 (PA15)|**17 (PA1)**, 3 (PB3)|**1 (PA2)**, 6 (PB10)|**0 (PA3)**|
TIM2|**16 (PA0)**, 13 (PA5), 26 (PA15)|**17 (PA1)**, 3 (PB3)|**1 (PA2)**, 6 (PB10)|**0 (PA3)**|
TIM3|**12 (PA6)**, 5 (PB4), 38 (PC6)|**11 (PA7)**, 4 (PB5), 9 (PC7)|**19 (PB0)**, 39 (PC8)|**27 (PB1)**, 40 (PC9)|
TIM4|**10 (PB6)**|**29 (PB7)**|**15 (PB8)**|**14 (PB9)**|
TIM5|**16 (PA0)**|**17 (PA1)**|**1 (PA2)**|**0 (PA3)**|
@ -87,7 +87,7 @@ Pin | Peripheral signal available on the pin | Board macro
13 (PA5) |ADC1_IN5, SPI1_SCK, TIM2_CH1, TIM2_ETR|**LED_BUILTIN**, **SCK**|
14 (PB9) |I2C1_SDA, I2S2_WS, SDIO_D5, SPI2_NSS, TIM4_CH4, TIM11_CH1|**SDA**|
15 (PB8) |I2C1_SCL, SDIO_D4, TIM4_CH3, TIM10_CH1|**SCL**|
16 (PA0) |ADC1_IN0, SYS_WKUP, TIM5_CH1, USART2_CTS|**A0**|
16 (PA0) |ADC1_IN0, SYS_WKUP, TIM2_CH1, TIM2_ETR, TIM5_CH1, USART2_CTS|**A0**|
17 (PA1) |ADC1_IN1, TIM2_CH2, TIM5_CH2, USART2_RTS|**A1**|
18 (PA4) |ADC1_IN4, I2S3_WS, SPI1_NSS, SPI3_NSS, USART2_CK|**A2**, **SS**|
19 (PB0) |ADC1_IN8, TIM1_CH2N, TIM3_CH3|**A3**|

View File

@ -43,7 +43,7 @@ I2S5|**19 (PB0)**|**2 (PA10)**, 15 (PB8)|**27 (PB1)**||
Instance |CH1|CH2|CH3|CH4|
-|-|-|-|-|
TIM1|**7 (PA8)**, <span style="text-decoration: overline">11 (PA7)</span>, <span style="text-decoration: overline">31 (PB13)</span>|**8 (PA9)**, <span style="text-decoration: overline">19 (PB0)</span>, <span style="text-decoration: overline">32 (PB14)</span>|**2 (PA10)**, <span style="text-decoration: overline">27 (PB1)</span>, <span style="text-decoration: overline">33 (PB15)</span>|**22 (PA11)**|
TIM2|**13 (PA5)**, 26 (PA15)|**17 (PA1)**, 3 (PB3)|**1 (PA2)**, 6 (PB10)|**0 (PA3)**|
TIM2|**16 (PA0)**, 13 (PA5), 26 (PA15)|**17 (PA1)**, 3 (PB3)|**1 (PA2)**, 6 (PB10)|**0 (PA3)**|
TIM3|**12 (PA6)**, 5 (PB4), 38 (PC6)|**11 (PA7)**, 4 (PB5), 9 (PC7)|**19 (PB0)**, 39 (PC8)|**27 (PB1)**, 40 (PC9)|
TIM4|**10 (PB6)**|**29 (PB7)**|**15 (PB8)**|**14 (PB9)**|
TIM5|**16 (PA0)**|**17 (PA1)**|**1 (PA2)**|**0 (PA3)**|
@ -92,7 +92,7 @@ Pin | Peripheral signal available on the pin | Board macro
13 (PA5) |ADC1_IN5, I2S1_CK, SPI1_SCK, TIM2_CH1, TIM2_ETR|**LED_BUILTIN**, **SCK**|
14 (PB9) |I2C1_SDA, I2C2_SDA, I2S2_WS, SDIO_D5, SPI2_NSS, TIM4_CH4, TIM11_CH1|**SDA**|
15 (PB8) |I2C1_SCL, I2C3_SDA, I2S5_SD, SDIO_D4, SPI5_MOSI, TIM4_CH3, TIM10_CH1|**SCL**|
16 (PA0) |ADC1_IN0, SYS_WKUP, TIM5_CH1, USART2_CTS|**A0**|
16 (PA0) |ADC1_IN0, SYS_WKUP, TIM2_CH1, TIM2_ETR, TIM5_CH1, USART2_CTS|**A0**|
17 (PA1) |ADC1_IN1, I2S4_SD, SPI4_MOSI, TIM2_CH2, TIM5_CH2, USART2_RTS|**A1**|
18 (PA4) |ADC1_IN4, I2S1_WS, I2S3_WS, SPI1_NSS, SPI3_NSS, USART2_CK|**A2**, **SS**|
19 (PB0) |ADC1_IN8, I2S5_CK, SPI5_SCK, TIM1_CH2N, TIM3_CH3|**A3**|

View File

@ -26,7 +26,7 @@ I2C4|**PB7**, PB9, PD13, PF15|**PB6**, PB8, PD12, PF14|
Instance |RX|TX|
-|-|-|
UART4|**PA1**, PA11, PC11, PD0|**PA12**, PC10, PD1|
UART4|**PA1**, PA11, PC11, PD0|**PA0**, PA12, PC10, PD1|
UART5|**PB5**, PB8, PB12, PD2|**PB6**, PB9, PB13, PC12|
UART7|**PA8**, PB3, PE7, PF6|**PA15**, PB4, PE8, PF7|
UART8|**PE0**|**PE1**|
@ -48,7 +48,7 @@ I2S3|**PB3**, PC10|**PB2**, PB5, PC12, PD6|**PA4**, PA15|**PC7**|
Instance |CH1|CH2|CH3|CH4|
-|-|-|-|-|
TIM1|**PA8**, PE9, <span style="text-decoration: overline">PA7</span>, <span style="text-decoration: overline">PB13</span>, <span style="text-decoration: overline">PE8</span>|**PA9**, PE11, <span style="text-decoration: overline">PB0</span>, <span style="text-decoration: overline">PB14</span>, <span style="text-decoration: overline">PE10</span>|**PA10**, PE13, <span style="text-decoration: overline">PB1</span>, <span style="text-decoration: overline">PB15</span>, <span style="text-decoration: overline">PE12</span>|**PA11**, PE14|
TIM2|**PA5**, PA15|**PA1**, PB3|**PA2**, PB10|**PA3**, PB11|
TIM2|**PA0**, PA5, PA15|**PA1**, PB3|**PA2**, PB10|**PA3**, PB11|
TIM3|**PA6**, PB4, PC6|**PA7**, PB5, PC7|**PB0**, PC8|**PB1**, PC9|
TIM4|**PB6**, PD12|**PB7**, PD13|**PB8**, PD14|**PB9**, PD15|
TIM5|**PA0**|**PA1**|**PA2**|**PA3**|
@ -117,7 +117,7 @@ ADC3|IN15|PF5|
Pin | Peripheral signal available on the pin | Board macro
-|-|-
PA0 |ADC1_IN0, ADC2_IN0, ADC3_IN0, ETH_CRS, SYS_WKUP1, TIM5_CH1, TIM8_ETR||
PA0 |ADC1_IN0, ADC2_IN0, ADC3_IN0, ETH_CRS, SAI2_SD_B, SYS_WKUP1, TIM2_CH1, TIM2_ETR, TIM5_CH1, TIM8_ETR, UART4_TX, USART2_CTS||
PA1 |ADC1_IN1, ADC2_IN1, ADC3_IN1, ETH_REF_CLK, ETH_RX_CLK, LTDC_R2, QUADSPI_BK1_IO3, SAI2_MCLK_B, TIM2_CH2, TIM5_CH2, UART4_RX, USART2_DE, USART2_RTS||
PA2 |ADC1_IN2, ADC2_IN2, ADC3_IN2, ETH_MDIO, LTDC_R1, MDIOS_MDIO, SAI2_SCK_B, SYS_WKUP2, TIM2_CH3, TIM5_CH3, TIM9_CH1, USART2_TX||
PA3 |ADC1_IN3, ADC2_IN3, ADC3_IN3, ETH_COL, LTDC_B2, LTDC_B5, TIM2_CH4, TIM5_CH4, TIM9_CH2, USART2_RX, USB_OTG_HS_ULPI_D0||

View File

@ -38,7 +38,7 @@ I2S3|**3 (PB3)**, 41 (PC10)|**4 (PB5)**, 43 (PC12)|**18 (PA4)**, 26 (PA15)|**9 (
Instance |CH1|CH2|CH3|CH4|
-|-|-|-|-|
TIM2|**13 (PA5)**, 26 (PA15)|**17 (PA1)**, 3 (PB3)|**1 (PA2)**, 6 (PB10)|**0 (PA3)**, PB11|
TIM2|**16 (PA0)**, 13 (PA5), 26 (PA15)|**17 (PA1)**, 3 (PB3)|**1 (PA2)**, 6 (PB10)|**0 (PA3)**, PB11|
TIM3|**12 (PA6)**, 5 (PB4), 38 (PC6)|**11 (PA7)**, 4 (PB5), 9 (PC7)|**19 (PB0)**, 39 (PC8)|**27 (PB1)**, 40 (PC9)|
TIM4|**10 (PB6)**|**29 (PB7)**|**15 (PB8)**|**14 (PB9)**|
TIM5|**16 (PA0)**|**17 (PA1)**|**1 (PA2)**|**0 (PA3)**|
@ -93,7 +93,7 @@ Pin | Peripheral signal available on the pin | Board macro
13 (PA5) |ADC_IN5, COMP1_INP, DAC_OUT2, SPI1_SCK, TIM2_CH1, TIMX_IC2|**LED_BUILTIN**, **SCK**|
14 (PB9) |I2C1_SDA, LCD_COM3, TIM4_CH4, TIM11_CH1|**SDA**|
15 (PB8) |I2C1_SCL, LCD_SEG16, TIM4_CH3, TIM10_CH1|**SCL**|
16 (PA0) |ADC_IN0, RTC_TAMP2, SYS_WKUP1, TIM2_ETR, TIM5_CH1, TS_G1_IO1, USART2_CTS|**A0**|
16 (PA0) |ADC_IN0, COMP1_INP, RTC_TAMP2, SYS_WKUP1, TIM2_CH1, TIM2_ETR, TIM5_CH1, TIMX_IC1, TS_G1_IO1, USART2_CTS|**A0**|
17 (PA1) |ADC_IN1, COMP1_INP, LCD_SEG0, OPAMP1_VINP, TIM2_CH2, TIM5_CH2, TIMX_IC2, TS_G1_IO2, USART2_RTS|**A1**|
18 (PA4) |ADC_IN4, COMP1_INP, DAC_OUT1, I2S3_WS, SPI1_NSS, SPI3_NSS, TIMX_IC1, USART2_CK|**A2**, **SS**|
19 (PB0) |ADC_IN8, COMP1_INP, LCD_SEG5, OPAMP2_VOUT, SYS_V_REF_OUT, TIM3_CH3, TS_G3_IO1|**A3**|
@ -121,7 +121,7 @@ Pin | Peripheral signal available on the pin | Board macro
41 (PC10) |I2S3_CK, LCD_COM4, LCD_SEG28, LCD_SEG40, SPI3_SCK, TIMX_IC3, UART4_TX, USART3_TX||
42 (PC11) |LCD_COM5, LCD_SEG29, LCD_SEG41, SPI3_MISO, TIMX_IC4, UART4_RX, USART3_RX||
43 (PC12) |I2S3_SD, LCD_COM6, LCD_SEG30, LCD_SEG42, SPI3_MOSI, TIMX_IC1, UART5_TX, USART3_CK||
44 (PC13) |RTC_OUT_ALARM, RTC_OUT_CALIB, RTC_TAMP1, RTC_TS, SYS_WKUP2||
45 (PC14) |RCC_OSC32_IN||
46 (PC15) |ADC_EXTI15, RCC_OSC32_OUT||
44 (PC13) |RTC_OUT_ALARM, RTC_OUT_CALIB, RTC_TAMP1, RTC_TS, SYS_WKUP2, TIMX_IC2||
45 (PC14) |RCC_OSC32_IN, TIMX_IC3||
46 (PC15) |ADC_EXTI15, RCC_OSC32_OUT, TIMX_IC4||
47 (PD2) |LCD_COM7, LCD_SEG31, LCD_SEG43, TIM3_ETR, TIMX_IC3, UART5_RX||

View File

@ -6,9 +6,9 @@ Below are the pins usable for the peripherals. Pins in **bold** are the default.
Instance |MOSI|MISO|SCK|
-|-|-|-|
SPI1|**11 (PA7)**, 4 (PB5)|**12 (PA6)**|**13 (PA5)**|
SPI1|**11 (PA7)**, 4 (PB5)|**12 (PA6)**, 5 (PB4)|**13 (PA5)**, 3 (PB3)|
SPI2|**33 (PB15)**, 35 (PC3)|**32 (PB14)**, 34 (PC2)|**6 (PB10)**, 31 (PB13)|
SPI3|**4 (PB5)**, 43 (PC12)|**42 (PC11)**|**41 (PC10)**|
SPI3|**4 (PB5)**, 43 (PC12)|**5 (PB4)**, 42 (PC11)|**3 (PB3)**, 41 (PC10)|
## I2C
@ -33,8 +33,8 @@ USART3|**PB11**, 37 (PC5), 42 (PC11)|**6 (PB10)**, 36 (PC4), 41 (PC10)|
Instance |CH1|CH2|CH3|CH4|
-|-|-|-|-|
TIM1|**7 (PA8)**, <span style="text-decoration: overline">11 (PA7)</span>, <span style="text-decoration: overline">31 (PB13)</span>|**8 (PA9)**, <span style="text-decoration: overline">19 (PB0)</span>, <span style="text-decoration: overline">32 (PB14)</span>|**2 (PA10)**, <span style="text-decoration: overline">27 (PB1)</span>, <span style="text-decoration: overline">33 (PB15)</span>|**22 (PA11)**|
TIM2|**16 (PA0)**, 13 (PA5)|**17 (PA1)**|**1 (PA2)**, 6 (PB10)|**0 (PA3)**, PB11|
TIM3|**12 (PA6)**, 38 (PC6)|**11 (PA7)**, 4 (PB5), 9 (PC7)|**19 (PB0)**, 39 (PC8)|**27 (PB1)**, 40 (PC9)|
TIM2|**16 (PA0)**, 13 (PA5), 26 (PA15)|**17 (PA1)**, 3 (PB3)|**1 (PA2)**, 6 (PB10)|**0 (PA3)**, PB11|
TIM3|**12 (PA6)**, 5 (PB4), 38 (PC6)|**11 (PA7)**, 4 (PB5), 9 (PC7)|**19 (PB0)**, 39 (PC8)|**27 (PB1)**, 40 (PC9)|
TIM4|**10 (PB6)**|**29 (PB7)**|**15 (PB8)**|**14 (PB9)**|
TIM5|**16 (PA0)**|**17 (PA1)**|**1 (PA2)**|**0 (PA3)**|
TIM8|**38 (PC6)**, <span style="text-decoration: overline">13 (PA5)</span>, <span style="text-decoration: overline">11 (PA7)</span>|**9 (PC7)**, <span style="text-decoration: overline">19 (PB0)</span>, <span style="text-decoration: overline">32 (PB14)</span>|**39 (PC8)**, <span style="text-decoration: overline">27 (PB1)</span>, <span style="text-decoration: overline">33 (PB15)</span>|**40 (PC9)**|
@ -90,9 +90,9 @@ Pin | Peripheral signal available on the pin | Board macro
0 (PA3) |ADC1_IN8, ADC2_IN8, LCD_SEG2, OPAMP1_VOUT, TIM2_CH4, TIM5_CH4, TIM15_CH2, USART2_RX||
1 (PA2) |ADC1_IN7, ADC2_IN7, LCD_SEG1, RCC_LSCO, SAI2_EXTCLK, SYS_WKUP4, TIM2_CH3, TIM5_CH3, TIM15_CH1, USART2_TX||
2 (PA10) |LCD_COM2, TIM1_CH3, TIM17_BKIN, USART1_RX, USB_OTG_FS_ID||
3 (PB3) |COMP2_INM, LCD_SEG7, SAI1_SCK_B, SYS_JTDO-SWO||
3 (PB3) |COMP2_INM, LCD_SEG7, SAI1_SCK_B, SPI1_SCK, SPI3_SCK, SYS_JTDO-SWO, TIM2_CH2, USART1_DE, USART1_RTS||
4 (PB5) |COMP2_OUT, I2C1_SMBA, LCD_SEG9, LPTIM1_IN1, SAI1_SD_B, SPI1_MOSI, SPI3_MOSI, TIM3_CH2, TIM16_BKIN, TSC_G2_IO2, UART5_CTS, USART1_CK||
5 (PB4) |COMP2_INP, LCD_SEG8, SAI1_MCLK_B, SYS_JTRST, TSC_G2_IO1, UART5_DE, UART5_RTS||
5 (PB4) |COMP2_INP, LCD_SEG8, SAI1_MCLK_B, SPI1_MISO, SPI3_MISO, SYS_JTRST, TIM3_CH1, TIM17_BKIN, TSC_G2_IO1, UART5_DE, UART5_RTS, USART1_CTS||
6 (PB10) |COMP1_OUT, DFSDM1_DATIN7, I2C2_SCL, LCD_SEG10, LPUART1_RX, QUADSPI_CLK, SAI1_SCK_A, SPI2_SCK, TIM2_CH3, USART3_TX||
7 (PA8) |LCD_COM0, LPTIM2_OUT, RCC_MCO, TIM1_CH1, USART1_CK, USB_OTG_FS_SOF||
8 (PA9) |LCD_COM1, TIM1_CH2, TIM15_BKIN, USART1_TX, USB_OTG_FS_VBUS||
@ -111,9 +111,9 @@ Pin | Peripheral signal available on the pin | Board macro
21 (PC0) |ADC1_IN1, ADC2_IN1, ADC3_IN1, DFSDM1_DATIN4, I2C3_SCL, LCD_SEG18, LPTIM1_IN1, LPTIM2_IN1, LPUART1_RX|**A5**|
22 (PA11) |CAN1_RX, TIM1_BKIN2, TIM1_BKIN2_COMP1, TIM1_CH4, USART1_CTS, USB_OTG_FS_DM||
23 (PA12) |CAN1_TX, TIM1_ETR, USART1_DE, USART1_RTS, USB_OTG_FS_DP||
24 (PA13) |SYS_JTMS-SWDIO||
24 (PA13) |IR_OUT, SYS_JTMS-SWDIO, USB_OTG_FS_NOE||
25 (PA14) |SYS_JTCK-SWCLK||
26 (PA15) |LCD_SEG17, SAI2_FS_B, SYS_JTDI, TSC_G3_IO1, UART4_DE, UART4_RTS||
26 (PA15) |LCD_SEG17, SAI2_FS_B, SPI1_NSS, SPI3_NSS, SYS_JTDI, TIM2_CH1, TIM2_ETR, TSC_G3_IO1, UART4_DE, UART4_RTS||
27 (PB1) |ADC1_IN16, ADC2_IN16, DFSDM1_DATIN0, LCD_SEG6, LPTIM2_IN1, QUADSPI_BK1_IO0, TIM1_CH3N, TIM3_CH4, TIM8_CH3N, USART3_DE, USART3_RTS||
28 (PB2) |DFSDM1_CKIN0, I2C3_SMBA, LPTIM1_OUT, RTC_OUT_ALARM, RTC_OUT_CALIB||
29 (PB7) |DFSDM1_CKIN5, I2C1_SDA, LCD_SEG21, LPTIM1_IN2, SYS_PVD_IN, TIM4_CH2, TIM8_BKIN, TIM8_BKIN_COMP1, TIM17_CH1N, TSC_G2_IO4, UART4_CTS, USART1_RX||