1383 lines
28 KiB
HTML
1383 lines
28 KiB
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<a href="../board_DISCOVERY_F746NG/">Discovery F746NG</a>
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<li class="main active"><a href="#discovery-f303vc">Discovery F303VC</a></li>
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<li><a href="#spi">SPI</a></li>
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<li><a href="#i2c">I2C</a></li>
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<li><a href="#usart">USART</a></li>
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<li><a href="#i2s">I2S</a></li>
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<li><a href="#tim">TIM</a></li>
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<li><a href="#adc">ADC</a></li>
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<li><a href="#gpio">GPIO</a></li>
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</div></div>
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<div class="col-md-9" role="main">
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<h1 id="discovery-f303vc">Discovery F303VC</h1>
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<p>Below are the pins usable for the peripherals. Pins in <strong>bold</strong> are the default.</p>
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<h2 id="spi">SPI</h2>
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<table>
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<thead>
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<tr>
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<th>Instance</th>
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<th>MOSI</th>
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<th>MISO</th>
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<th>SCK</th>
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<th></th>
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</tr>
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</thead>
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<tbody>
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<tr>
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<td>SPI1</td>
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<td><strong>PA7</strong>, PB5</td>
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<td><strong>PA6</strong>, PB4</td>
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<td><strong>PA5</strong>, PB3</td>
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<td></td>
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</tr>
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<tr>
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<td>SPI2</td>
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<td><strong>PB15</strong></td>
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<td><strong>PB14</strong></td>
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<td><strong>PB13</strong>, PF9, PF10</td>
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<td></td>
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</tr>
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<tr>
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<td>SPI3</td>
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<td><strong>PB5</strong>, PC12</td>
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<td><strong>PB4</strong>, PC11</td>
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<td><strong>PB3</strong>, PC10</td>
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<td></td>
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</tr>
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</tbody>
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</table>
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<h2 id="i2c">I2C</h2>
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<table>
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<thead>
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<tr>
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<th>Instance</th>
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<th>SDA</th>
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<th>SCL</th>
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<th></th>
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</tr>
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</thead>
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<tbody>
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<tr>
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<td>I2C1</td>
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<td>PA14, PB7, <strong>PB9</strong></td>
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<td>PA15, <strong>PB6</strong>, PB8</td>
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<td></td>
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</tr>
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<tr>
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<td>I2C2</td>
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<td><strong>PA10</strong>, PF0</td>
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<td><strong>PA9</strong>, PF1, PF6</td>
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<td></td>
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</tr>
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</tbody>
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</table>
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<h2 id="usart">USART</h2>
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<table>
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<thead>
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<tr>
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<th>Instance</th>
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<th>RX</th>
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<th>TX</th>
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<th></th>
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</tr>
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</thead>
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<tbody>
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<tr>
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<td>UART4</td>
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<td><strong>PC11</strong></td>
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<td><strong>PC10</strong></td>
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<td></td>
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</tr>
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<tr>
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<td>UART5</td>
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<td><strong>PD2</strong></td>
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<td><strong>PC12</strong></td>
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<td></td>
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</tr>
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<tr>
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<td>USART1</td>
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<td><strong>PA10</strong>, PB7, PC5, PE1</td>
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<td><strong>PA9</strong>, PB6, PC4, PE0</td>
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<td></td>
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</tr>
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<tr>
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<td>USART2</td>
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<td><strong>PA3</strong>, PA15, PB4, PD6</td>
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<td><strong>PA2</strong>, PA14, PB3, PD5</td>
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<td></td>
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</tr>
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<tr>
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<td>USART3</td>
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<td><strong>PB11</strong>, PC11, PD9, PE15</td>
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<td><strong>PB10</strong>, PC10, PD8</td>
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<td></td>
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</tr>
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</tbody>
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</table>
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<h2 id="i2s">I2S</h2>
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<table>
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<thead>
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<tr>
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<th>Instance</th>
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<th>CK</th>
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<th>SD</th>
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<th>WS</th>
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<th>MCK</th>
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<th></th>
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</tr>
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</thead>
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<tbody>
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<tr>
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<td>I2S2</td>
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<td><strong>PB13</strong></td>
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<td><strong>PB15</strong></td>
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<td><strong>PB12</strong></td>
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<td><strong>PA8</strong>, PC6</td>
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<td></td>
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</tr>
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<tr>
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<td>I2S3</td>
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<td><strong>PB3</strong>, PC10</td>
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<td><strong>PB5</strong>, PC12</td>
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<td><strong>PA4</strong>, PA15</td>
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<td><strong>PA9</strong>, PC7</td>
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<td></td>
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</tr>
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</tbody>
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</table>
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<h2 id="tim">TIM</h2>
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<table>
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<thead>
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<tr>
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<th>Instance</th>
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<th>CH1</th>
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<th>CH2</th>
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<th>CH3</th>
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<th>CH4</th>
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<th></th>
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</tr>
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</thead>
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<tbody>
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<tr>
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<td>TIM1</td>
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<td><strong>PA8</strong>, PE9, <span style="text-decoration: overline">PA7</span>, <span style="text-decoration: overline">PA11</span>, <span style="text-decoration: overline">PB13</span>, <span style="text-decoration: overline">PC13</span>, <span style="text-decoration: overline">PE8</span></td>
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<td><strong>PA9</strong>, PE11, <span style="text-decoration: overline">PA12</span>, <span style="text-decoration: overline">PB0</span>, <span style="text-decoration: overline">PB14</span>, <span style="text-decoration: overline">PE10</span></td>
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<td><strong>PA10</strong>, PE13, <span style="text-decoration: overline">PB1</span>, <span style="text-decoration: overline">PB15</span>, <span style="text-decoration: overline">PE12</span>, <span style="text-decoration: overline">PF0</span></td>
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<td><strong>PA11</strong>, PE14</td>
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<td></td>
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</tr>
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<tr>
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<td>TIM2</td>
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<td><strong>PA0</strong>, PA5, PA15, PD3</td>
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<td><strong>PA1</strong>, PB3, PD4</td>
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<td><strong>PA2</strong>, PA9, PB10, PD7</td>
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<td><strong>PA3</strong>, PA10, PB11, PD6</td>
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<td></td>
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</tr>
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<tr>
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<td>TIM3</td>
|
|
<td><strong>PA6</strong>, PB4, PC6, PE2</td>
|
|
<td><strong>PA4</strong>, PA7, PB5, PC7, PE3</td>
|
|
<td><strong>PB0</strong>, PC8, PE4</td>
|
|
<td><strong>PB1</strong>, PB7, PC9, PE5</td>
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td>TIM4</td>
|
|
<td><strong>PA11</strong>, PB6, PD12</td>
|
|
<td><strong>PA12</strong>, PB7, PD13</td>
|
|
<td><strong>PA13</strong>, PB8, PD14</td>
|
|
<td><strong>PB9</strong>, PD15, PF6</td>
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td>TIM8</td>
|
|
<td><strong>PA15</strong>, PB6, PC6, <span style="text-decoration: overline">PA7</span>, <span style="text-decoration: overline">PB3</span>, <span style="text-decoration: overline">PC10</span></td>
|
|
<td><strong>PA14</strong>, PB8, PC7, <span style="text-decoration: overline">PB0</span>, <span style="text-decoration: overline">PB4</span>, <span style="text-decoration: overline">PC11</span></td>
|
|
<td><strong>PB9</strong>, PC8, <span style="text-decoration: overline">PB1</span>, <span style="text-decoration: overline">PB5</span>, <span style="text-decoration: overline">PC12</span></td>
|
|
<td><strong>PC9</strong>, PD1</td>
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td>TIM15</td>
|
|
<td><strong>PA2</strong>, PB14, PF9, <span style="text-decoration: overline">PA1</span>, <span style="text-decoration: overline">PB15</span></td>
|
|
<td><strong>PA3</strong>, PB15, PF10</td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td>TIM16</td>
|
|
<td><strong>PA6</strong>, PA12, PB4, PB8, PE0, <span style="text-decoration: overline">PA13</span>, <span style="text-decoration: overline">PB6</span></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td>TIM17</td>
|
|
<td><strong>PA7</strong>, PB5, PB9, PE1, <span style="text-decoration: overline">PB7</span></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
<td></td>
|
|
</tr>
|
|
</tbody>
|
|
</table>
|
|
<h2 id="adc">ADC</h2>
|
|
<table>
|
|
<thead>
|
|
<tr>
|
|
<th>Instance</th>
|
|
<th>Channel</th>
|
|
<th>Pin</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td>ADC1</td>
|
|
<td>IN1</td>
|
|
<td>PA0</td>
|
|
</tr>
|
|
<tr>
|
|
<td>ADC1</td>
|
|
<td>IN2</td>
|
|
<td>PA1</td>
|
|
</tr>
|
|
<tr>
|
|
<td>ADC1</td>
|
|
<td>IN3</td>
|
|
<td>PA2</td>
|
|
</tr>
|
|
<tr>
|
|
<td>ADC1</td>
|
|
<td>IN4</td>
|
|
<td>PA3</td>
|
|
</tr>
|
|
<tr>
|
|
<td>ADC1</td>
|
|
<td>IN5</td>
|
|
<td>PF4</td>
|
|
</tr>
|
|
<tr>
|
|
<td>ADC1</td>
|
|
<td>IN6</td>
|
|
<td>PC0</td>
|
|
</tr>
|
|
<tr>
|
|
<td>ADC1</td>
|
|
<td>IN7</td>
|
|
<td>PC1</td>
|
|
</tr>
|
|
<tr>
|
|
<td>ADC1</td>
|
|
<td>IN8</td>
|
|
<td>PC2</td>
|
|
</tr>
|
|
<tr>
|
|
<td>ADC1</td>
|
|
<td>IN9</td>
|
|
<td>PC3</td>
|
|
</tr>
|
|
<tr>
|
|
<td>ADC1</td>
|
|
<td>IN10</td>
|
|
<td>PF2</td>
|
|
</tr>
|
|
<tr>
|
|
<td>ADC2</td>
|
|
<td>IN1</td>
|
|
<td>PA4</td>
|
|
</tr>
|
|
<tr>
|
|
<td>ADC2</td>
|
|
<td>IN2</td>
|
|
<td>PA5</td>
|
|
</tr>
|
|
<tr>
|
|
<td>ADC2</td>
|
|
<td>IN3</td>
|
|
<td>PA6</td>
|
|
</tr>
|
|
<tr>
|
|
<td>ADC2</td>
|
|
<td>IN4</td>
|
|
<td>PA7</td>
|
|
</tr>
|
|
<tr>
|
|
<td>ADC2</td>
|
|
<td>IN5</td>
|
|
<td>PC4</td>
|
|
</tr>
|
|
<tr>
|
|
<td>ADC2</td>
|
|
<td>IN6</td>
|
|
<td>PC0</td>
|
|
</tr>
|
|
<tr>
|
|
<td>ADC2</td>
|
|
<td>IN7</td>
|
|
<td>PC1</td>
|
|
</tr>
|
|
<tr>
|
|
<td>ADC2</td>
|
|
<td>IN8</td>
|
|
<td>PC2</td>
|
|
</tr>
|
|
<tr>
|
|
<td>ADC2</td>
|
|
<td>IN9</td>
|
|
<td>PC3</td>
|
|
</tr>
|
|
<tr>
|
|
<td>ADC2</td>
|
|
<td>IN10</td>
|
|
<td>PF2</td>
|
|
</tr>
|
|
<tr>
|
|
<td>ADC2</td>
|
|
<td>IN11</td>
|
|
<td>PC5</td>
|
|
</tr>
|
|
<tr>
|
|
<td>ADC2</td>
|
|
<td>IN12</td>
|
|
<td>PB2</td>
|
|
</tr>
|
|
<tr>
|
|
<td>ADC3</td>
|
|
<td>IN1</td>
|
|
<td>PB1</td>
|
|
</tr>
|
|
<tr>
|
|
<td>ADC3</td>
|
|
<td>IN2</td>
|
|
<td>PE9</td>
|
|
</tr>
|
|
<tr>
|
|
<td>ADC3</td>
|
|
<td>IN3</td>
|
|
<td>PE13</td>
|
|
</tr>
|
|
<tr>
|
|
<td>ADC3</td>
|
|
<td>IN5</td>
|
|
<td>PB13</td>
|
|
</tr>
|
|
<tr>
|
|
<td>ADC3</td>
|
|
<td>IN6</td>
|
|
<td>PE8</td>
|
|
</tr>
|
|
<tr>
|
|
<td>ADC3</td>
|
|
<td>IN7</td>
|
|
<td>PD10</td>
|
|
</tr>
|
|
<tr>
|
|
<td>ADC3</td>
|
|
<td>IN8</td>
|
|
<td>PD11</td>
|
|
</tr>
|
|
<tr>
|
|
<td>ADC3</td>
|
|
<td>IN9</td>
|
|
<td>PD12</td>
|
|
</tr>
|
|
<tr>
|
|
<td>ADC3</td>
|
|
<td>IN10</td>
|
|
<td>PD13</td>
|
|
</tr>
|
|
<tr>
|
|
<td>ADC3</td>
|
|
<td>IN11</td>
|
|
<td>PD14</td>
|
|
</tr>
|
|
<tr>
|
|
<td>ADC3</td>
|
|
<td>IN12</td>
|
|
<td>PB0</td>
|
|
</tr>
|
|
<tr>
|
|
<td>ADC3</td>
|
|
<td>IN13</td>
|
|
<td>PE7</td>
|
|
</tr>
|
|
<tr>
|
|
<td>ADC3</td>
|
|
<td>IN14</td>
|
|
<td>PE10</td>
|
|
</tr>
|
|
<tr>
|
|
<td>ADC3</td>
|
|
<td>IN15</td>
|
|
<td>PE11</td>
|
|
</tr>
|
|
<tr>
|
|
<td>ADC3</td>
|
|
<td>IN16</td>
|
|
<td>PE12</td>
|
|
</tr>
|
|
<tr>
|
|
<td>ADC4</td>
|
|
<td>IN1</td>
|
|
<td>PE14</td>
|
|
</tr>
|
|
<tr>
|
|
<td>ADC4</td>
|
|
<td>IN2</td>
|
|
<td>PE15</td>
|
|
</tr>
|
|
<tr>
|
|
<td>ADC4</td>
|
|
<td>IN3</td>
|
|
<td>PB12</td>
|
|
</tr>
|
|
<tr>
|
|
<td>ADC4</td>
|
|
<td>IN4</td>
|
|
<td>PB14</td>
|
|
</tr>
|
|
<tr>
|
|
<td>ADC4</td>
|
|
<td>IN5</td>
|
|
<td>PB15</td>
|
|
</tr>
|
|
<tr>
|
|
<td>ADC4</td>
|
|
<td>IN6</td>
|
|
<td>PE8</td>
|
|
</tr>
|
|
<tr>
|
|
<td>ADC4</td>
|
|
<td>IN7</td>
|
|
<td>PD10</td>
|
|
</tr>
|
|
<tr>
|
|
<td>ADC4</td>
|
|
<td>IN8</td>
|
|
<td>PD11</td>
|
|
</tr>
|
|
<tr>
|
|
<td>ADC4</td>
|
|
<td>IN9</td>
|
|
<td>PD12</td>
|
|
</tr>
|
|
<tr>
|
|
<td>ADC4</td>
|
|
<td>IN10</td>
|
|
<td>PD13</td>
|
|
</tr>
|
|
<tr>
|
|
<td>ADC4</td>
|
|
<td>IN11</td>
|
|
<td>PD14</td>
|
|
</tr>
|
|
<tr>
|
|
<td>ADC4</td>
|
|
<td>IN12</td>
|
|
<td>PD8</td>
|
|
</tr>
|
|
<tr>
|
|
<td>ADC4</td>
|
|
<td>IN13</td>
|
|
<td>PD9</td>
|
|
</tr>
|
|
</tbody>
|
|
</table>
|
|
<h2 id="gpio">GPIO</h2>
|
|
<table>
|
|
<thead>
|
|
<tr>
|
|
<th>Pin</th>
|
|
<th>Peripheral signal available on the pin</th>
|
|
<th>Board macro</th>
|
|
</tr>
|
|
</thead>
|
|
<tbody>
|
|
<tr>
|
|
<td>PA0</td>
|
|
<td>ADC1_IN1, COMP1_INM, COMP1_OUT, RTC_TAMP2, SYS_WKUP1, TIM2_CH1, TIM2_ETR, TIM8_BKIN, TIM8_ETR, TSC_G1_IO1, USART2_CTS</td>
|
|
<td><strong>KEY0_BUILTIN</strong>, <strong>USER_BTN</strong></td>
|
|
</tr>
|
|
<tr>
|
|
<td>PA1</td>
|
|
<td>ADC1_IN2, COMP1_INP, OPAMP1_VINP, OPAMP1_VINP_SEC, OPAMP3_VINP, OPAMP3_VINP_SEC, RTC_REFIN, TIM2_CH2, TIM15_CH1N, TSC_G1_IO2, USART2_DE, USART2_RTS</td>
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td>PA2</td>
|
|
<td>ADC1_IN3, COMP2_INM, COMP2_OUT, OPAMP1_VOUT, TIM2_CH3, TIM15_CH1, TSC_G1_IO3, USART2_TX</td>
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td>PA3</td>
|
|
<td>ADC1_IN4, COMP2_INP, OPAMP1_VINM, OPAMP1_VINM_SEC, TIM2_CH4, TIM15_CH2, TSC_G1_IO4, USART2_RX</td>
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td>PA4</td>
|
|
<td>ADC2_IN1, COMP3_INM, COMP4_INM, COMP5_INM, COMP6_INM, DAC_OUT1, I2S3_WS, OPAMP4_VINP, OPAMP4_VINP_SEC, SPI1_NSS, SPI3_NSS, TIM3_CH2, TSC_G2_IO1, USART2_CK</td>
|
|
<td><strong>SS</strong></td>
|
|
</tr>
|
|
<tr>
|
|
<td>PA5</td>
|
|
<td>ADC2_IN2, DAC_OUT2, OPAMP2_VINM, OPAMP2_VINM_SEC, SPI1_SCK, TIM2_CH1, TIM2_ETR, TSC_G2_IO2</td>
|
|
<td><strong>SCK</strong></td>
|
|
</tr>
|
|
<tr>
|
|
<td>PA6</td>
|
|
<td>ADC2_IN3, COMP1_OUT, OPAMP2_VOUT, SPI1_MISO, TIM1_BKIN, TIM3_CH1, TIM8_BKIN, TIM16_CH1, TSC_G2_IO3</td>
|
|
<td><strong>MISO</strong></td>
|
|
</tr>
|
|
<tr>
|
|
<td>PA7</td>
|
|
<td>ADC2_IN4, COMP2_OUT, OPAMP2_VINP, OPAMP2_VINP_SEC, SPI1_MOSI, TIM1_CH1N, TIM3_CH2, TIM8_CH1N, TIM17_CH1, TSC_G2_IO4</td>
|
|
<td><strong>MOSI</strong></td>
|
|
</tr>
|
|
<tr>
|
|
<td>PA8</td>
|
|
<td>COMP3_OUT, I2C2_SMBA, I2S2_MCK, RCC_MCO, TIM1_CH1, TIM4_ETR, USART1_CK</td>
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td>PA9</td>
|
|
<td>COMP5_OUT, I2C2_SCL, I2S3_MCK, TIM1_CH2, TIM2_CH3, TIM15_BKIN, TSC_G4_IO1, USART1_TX</td>
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td>PA10</td>
|
|
<td>COMP6_OUT, I2C2_SDA, TIM1_CH3, TIM2_CH4, TIM8_BKIN, TIM17_BKIN, TSC_G4_IO2, USART1_RX</td>
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td>PA11</td>
|
|
<td>CAN_RX, COMP1_OUT, TIM1_BKIN2, TIM1_CH1N, TIM1_CH4, TIM4_CH1, USART1_CTS, USB_DM</td>
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td>PA12</td>
|
|
<td>CAN_TX, COMP2_OUT, TIM1_CH2N, TIM1_ETR, TIM4_CH2, TIM16_CH1, USART1_DE, USART1_RTS, USB_DP</td>
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td>PA13</td>
|
|
<td>IR_OUT, SYS_JTMS-SWDIO, TIM4_CH3, TIM16_CH1N, TSC_G4_IO3, USART3_CTS</td>
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td>PA14</td>
|
|
<td>I2C1_SDA, SYS_JTCK-SWCLK, TIM1_BKIN, TIM8_CH2, TSC_G4_IO4, USART2_TX</td>
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td>PA15</td>
|
|
<td>I2C1_SCL, I2S3_WS, SPI1_NSS, SPI3_NSS, SYS_JTDI, TIM1_BKIN, TIM2_CH1, TIM2_ETR, TIM8_CH1, USART2_RX</td>
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td>PB0</td>
|
|
<td>ADC3_IN12, COMP4_INP, TIM1_CH2N, TIM3_CH3, TIM8_CH2N, TSC_G3_IO2</td>
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td>PB1</td>
|
|
<td>ADC3_IN1, COMP4_OUT, OPAMP3_VOUT, TIM1_CH3N, TIM3_CH4, TIM8_CH3N, TSC_G3_IO3</td>
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td>PB2</td>
|
|
<td>ADC2_IN12, OPAMP3_VINM, OPAMP3_VINM_SEC, TSC_G3_IO4</td>
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td>PB3</td>
|
|
<td>I2S3_CK, SPI1_SCK, SPI3_SCK, SYS_JTDO-TRACESWO, TIM2_CH2, TIM3_ETR, TIM4_ETR, TIM8_CH1N, TSC_G5_IO1, USART2_TX</td>
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td>PB4</td>
|
|
<td>I2S3_ext_SD, SPI1_MISO, SPI3_MISO, SYS_NJTRST, TIM3_CH1, TIM8_CH2N, TIM16_CH1, TIM17_BKIN, TSC_G5_IO2, USART2_RX</td>
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td>PB5</td>
|
|
<td>I2C1_SMBA, I2S3_SD, SPI1_MOSI, SPI3_MOSI, TIM3_CH2, TIM8_CH3N, TIM16_BKIN, TIM17_CH1, USART2_CK</td>
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td>PB6</td>
|
|
<td>I2C1_SCL, TIM4_CH1, TIM8_BKIN2, TIM8_CH1, TIM8_ETR, TIM16_CH1N, TSC_G5_IO3, USART1_TX</td>
|
|
<td><strong>SCL</strong></td>
|
|
</tr>
|
|
<tr>
|
|
<td>PB7</td>
|
|
<td>I2C1_SDA, TIM3_CH4, TIM4_CH2, TIM8_BKIN, TIM17_CH1N, TSC_G5_IO4, USART1_RX</td>
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td>PB8</td>
|
|
<td>CAN_RX, COMP1_OUT, I2C1_SCL, TIM1_BKIN, TIM4_CH3, TIM8_CH2, TIM16_CH1, TSC_SYNC</td>
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td>PB9</td>
|
|
<td>CAN_TX, COMP2_OUT, I2C1_SDA, IR_OUT, TIM4_CH4, TIM8_CH3, TIM17_CH1</td>
|
|
<td><strong>SDA</strong></td>
|
|
</tr>
|
|
<tr>
|
|
<td>PB10</td>
|
|
<td>OPAMP4_VINM, OPAMP4_VINM_SEC, TIM2_CH3, TSC_SYNC, USART3_TX</td>
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td>PB11</td>
|
|
<td>COMP6_INP, TIM2_CH4, TSC_G6_IO1, USART3_RX</td>
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td>PB12</td>
|
|
<td>ADC4_IN3, I2C2_SMBA, I2S2_WS, OPAMP4_VOUT, SPI2_NSS, TIM1_BKIN, TSC_G6_IO2, USART3_CK</td>
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td>PB13</td>
|
|
<td>ADC3_IN5, COMP5_INP, I2S2_CK, SPI2_SCK, TIM1_CH1N, TSC_G6_IO3, USART3_CTS</td>
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td>PB14</td>
|
|
<td>ADC4_IN4, COMP3_INP, I2S2_ext_SD, SPI2_MISO, TIM1_CH2N, TIM15_CH1, TSC_G6_IO4, USART3_DE, USART3_RTS</td>
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td>PB15</td>
|
|
<td>ADC4_IN5, I2S2_SD, RTC_REFIN, SPI2_MOSI, TIM1_CH3N, TIM15_CH1N, TIM15_CH2</td>
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td>PC0</td>
|
|
<td>ADC1_IN6, ADC2_IN6, COMP7_INM</td>
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td>PC1</td>
|
|
<td>ADC1_IN7, ADC2_IN7, COMP7_INP</td>
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td>PC2</td>
|
|
<td>ADC1_IN8, ADC2_IN8, COMP7_OUT</td>
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td>PC3</td>
|
|
<td>ADC1_IN9, ADC2_IN9, TIM1_BKIN2</td>
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td>PC4</td>
|
|
<td>ADC2_IN5, USART1_TX</td>
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td>PC5</td>
|
|
<td>ADC2_IN11, TSC_G3_IO1, USART1_RX</td>
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td>PC6</td>
|
|
<td>COMP6_OUT, I2S2_MCK, TIM3_CH1, TIM8_CH1</td>
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td>PC7</td>
|
|
<td>COMP5_OUT, I2S3_MCK, TIM3_CH2, TIM8_CH2</td>
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td>PC8</td>
|
|
<td>COMP3_OUT, TIM3_CH3, TIM8_CH3</td>
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td>PC9</td>
|
|
<td>I2S_CKIN, TIM3_CH4, TIM8_BKIN2, TIM8_CH4</td>
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td>PC10</td>
|
|
<td>I2S3_CK, SPI3_SCK, TIM8_CH1N, UART4_TX, USART3_TX</td>
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td>PC11</td>
|
|
<td>I2S3_ext_SD, SPI3_MISO, TIM8_CH2N, UART4_RX, USART3_RX</td>
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td>PC12</td>
|
|
<td>I2S3_SD, SPI3_MOSI, TIM8_CH3N, UART5_TX, USART3_CK</td>
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td>PC13</td>
|
|
<td>RTC_OUT_ALARM, RTC_OUT_CALIB, RTC_TAMP1, RTC_TS, SYS_WKUP2, TIM1_CH1N</td>
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td>PC14</td>
|
|
<td>RCC_OSC32_IN</td>
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td>PC15</td>
|
|
<td>ADC1_EXTI15, ADC2_EXTI15, RCC_OSC32_OUT</td>
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td>PD0</td>
|
|
<td>CAN_RX</td>
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td>PD1</td>
|
|
<td>CAN_TX, TIM8_BKIN2, TIM8_CH4</td>
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td>PD2</td>
|
|
<td>TIM3_ETR, TIM8_BKIN, UART5_RX</td>
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td>PD3</td>
|
|
<td>TIM2_CH1, TIM2_ETR, USART2_CTS</td>
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td>PD4</td>
|
|
<td>TIM2_CH2, USART2_DE, USART2_RTS</td>
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td>PD5</td>
|
|
<td>USART2_TX</td>
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td>PD6</td>
|
|
<td>TIM2_CH4, USART2_RX</td>
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td>PD7</td>
|
|
<td>TIM2_CH3, USART2_CK</td>
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td>PD8</td>
|
|
<td>ADC4_IN12, USART3_TX</td>
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td>PD9</td>
|
|
<td>ADC4_IN13, USART3_RX</td>
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td>PD10</td>
|
|
<td>ADC3_IN7, ADC4_IN7, USART3_CK</td>
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td>PD11</td>
|
|
<td>ADC3_IN8, ADC4_IN8, USART3_CTS</td>
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td>PD12</td>
|
|
<td>ADC3_IN9, ADC4_IN9, TIM4_CH1, TSC_G8_IO1, USART3_DE, USART3_RTS</td>
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td>PD13</td>
|
|
<td>ADC3_IN10, ADC4_IN10, TIM4_CH2, TSC_G8_IO2</td>
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td>PD14</td>
|
|
<td>ADC3_IN11, ADC4_IN11, TIM4_CH3, TSC_G8_IO3</td>
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td>PD15</td>
|
|
<td>SPI2_NSS, TIM4_CH4, TSC_G8_IO4</td>
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td>PE0</td>
|
|
<td>TIM4_ETR, TIM16_CH1, USART1_TX</td>
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td>PE1</td>
|
|
<td>TIM17_CH1, USART1_RX</td>
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td>PE2</td>
|
|
<td>ADC3_EXTI2, ADC4_EXTI2, SYS_TRACECK, TIM3_CH1, TSC_G7_IO1</td>
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td>PE3</td>
|
|
<td>SYS_TRACED0, TIM3_CH2, TSC_G7_IO2</td>
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td>PE4</td>
|
|
<td>SYS_TRACED1, TIM3_CH3, TSC_G7_IO3</td>
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td>PE5</td>
|
|
<td>SYS_TRACED2, TIM3_CH4, TSC_G7_IO4</td>
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td>PE6</td>
|
|
<td>RTC_TAMP3, SYS_TRACED3, SYS_WKUP3</td>
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td>PE7</td>
|
|
<td>ADC3_IN13, TIM1_ETR</td>
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td>PE8</td>
|
|
<td>ADC3_IN6, ADC4_IN6, TIM1_CH1N</td>
|
|
<td><strong>LED_BUILTIN</strong></td>
|
|
</tr>
|
|
<tr>
|
|
<td>PE9</td>
|
|
<td>ADC3_IN2, TIM1_CH1</td>
|
|
<td><strong>LED_BUILTIN1</strong></td>
|
|
</tr>
|
|
<tr>
|
|
<td>PE10</td>
|
|
<td>ADC3_IN14, TIM1_CH2N</td>
|
|
<td><strong>LED_BUILTIN2</strong></td>
|
|
</tr>
|
|
<tr>
|
|
<td>PE11</td>
|
|
<td>ADC1_EXTI11, ADC2_EXTI11, ADC3_IN15, TIM1_CH2</td>
|
|
<td><strong>LED_BUILTIN3</strong></td>
|
|
</tr>
|
|
<tr>
|
|
<td>PE12</td>
|
|
<td>ADC3_IN16, TIM1_CH3N</td>
|
|
<td><strong>LED_BUILTIN4</strong></td>
|
|
</tr>
|
|
<tr>
|
|
<td>PE13</td>
|
|
<td>ADC3_IN3, TIM1_CH3</td>
|
|
<td><strong>LED_BUILTIN5</strong></td>
|
|
</tr>
|
|
<tr>
|
|
<td>PE14</td>
|
|
<td>ADC4_IN1, TIM1_BKIN2, TIM1_CH4</td>
|
|
<td><strong>LED_BUILTIN6</strong></td>
|
|
</tr>
|
|
<tr>
|
|
<td>PE15</td>
|
|
<td>ADC4_IN2, TIM1_BKIN, USART3_RX</td>
|
|
<td><strong>LED_BUILTIN7</strong></td>
|
|
</tr>
|
|
<tr>
|
|
<td>PF0</td>
|
|
<td>I2C2_SDA, RCC_OSC_IN, TIM1_CH3N</td>
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td>PF1</td>
|
|
<td>I2C2_SCL, RCC_OSC_OUT</td>
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td>PF2</td>
|
|
<td>ADC1_IN10, ADC2_IN10</td>
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td>PF4</td>
|
|
<td>ADC1_IN5, COMP1_OUT</td>
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td>PF6</td>
|
|
<td>I2C2_SCL, TIM4_CH4, USART3_DE, USART3_RTS</td>
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td>PF9</td>
|
|
<td>DAC_EXTI9, SPI2_SCK, TIM15_CH1</td>
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td>PF10</td>
|
|
<td>SPI2_SCK, TIM15_CH2</td>
|
|
<td></td>
|
|
</tr>
|
|
</tbody>
|
|
</table></div>
|
|
</div>
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