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<li class="main active"><a href="#discovery-f746ng">Discovery F746NG</a></li>
<li><a href="#spi">SPI</a></li>
<li><a href="#i2c">I2C</a></li>
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<h1 id="discovery-f746ng">Discovery F746NG</h1>
<p>Below are the pins usable for the peripherals. Pins in <strong>bold</strong> are the default.</p>
<h2 id="spi">SPI</h2>
<table>
<thead>
<tr>
<th>Instance</th>
<th>MOSI</th>
<th>MISO</th>
<th>SCK</th>
<th></th>
</tr>
</thead>
<tbody>
<tr>
<td>SPI1</td>
<td>28 (PA7), 39 (PB5)</td>
<td>27 (PA6), 3 (PB4)</td>
<td>26 (PA5), 38 (PB3)</td>
<td></td>
</tr>
<tr>
<td>SPI2</td>
<td><strong>11 (PB15)</strong>, 47 (PC1), 49 (PC3), 7 (PI3)</td>
<td><strong>12 (PB14)</strong>, 48 (PC2), 8 (PI2)</td>
<td><strong>29 (PA9)</strong>, 42 (PB10), 45 (PB13), 63 (PD3), 13 (PI1)</td>
<td></td>
</tr>
<tr>
<td>SPI3</td>
<td><strong>37 (PB2)</strong>, 39 (PB5), 56 (PC12), 66 (PD6)</td>
<td><strong>3 (PB4)</strong>, 55 (PC11)</td>
<td><strong>38 (PB3)</strong>, 54 (PC10)</td>
<td></td>
</tr>
<tr>
<td>SPI4</td>
<td><strong>82 (PE6)</strong>, 90 (PE14)</td>
<td><strong>81 (PE5)</strong>, 89 (PE13)</td>
<td><strong>78 (PE2)</strong>, 88 (PE12)</td>
<td></td>
</tr>
<tr>
<td>SPI5</td>
<td><strong>18 (PF9)</strong>, 98 (PF11)</td>
<td><strong>19 (PF8)</strong>, 123 (PH7)</td>
<td><strong>20 (PF7)</strong>, 6 (PH6)</td>
<td></td>
</tr>
<tr>
<td>SPI6</td>
<td><strong>115 (PG14)</strong></td>
<td><strong>113 (PG12)</strong></td>
<td><strong>114 (PG13)</strong></td>
<td></td>
</tr>
</tbody>
</table>
<h2 id="i2c">I2C</h2>
<table>
<thead>
<tr>
<th>Instance</th>
<th>SDA</th>
<th>SCL</th>
<th></th>
</tr>
</thead>
<tbody>
<tr>
<td>I2C1</td>
<td>41 (PB7), <strong>14 (PB9)</strong></td>
<td>40 (PB6), <strong>15 (PB8)</strong></td>
<td></td>
</tr>
<tr>
<td>I2C2</td>
<td><strong>43 (PB11)</strong>, 92 (PF0), 122 (PH5)</td>
<td><strong>42 (PB10)</strong>, 93 (PF1), 121 (PH4)</td>
<td></td>
</tr>
<tr>
<td>I2C3</td>
<td><strong>53 (PC9)</strong>, 124 (PH8)</td>
<td><strong>10 (PA8)</strong>, 123 (PH7)</td>
<td></td>
</tr>
<tr>
<td>I2C4</td>
<td><strong>73 (PD13)</strong>, 102 (PF15), 128 (PH12)</td>
<td><strong>72 (PD12)</strong>, 101 (PF14), 127 (PH11)</td>
<td></td>
</tr>
</tbody>
</table>
<h2 id="usart">USART</h2>
<table>
<thead>
<tr>
<th>Instance</th>
<th>RX</th>
<th>TX</th>
<th></th>
</tr>
</thead>
<tbody>
<tr>
<td>UART4</td>
<td><strong>22 (PA1)</strong>, 55 (PC11)</td>
<td><strong>16 (PA0)</strong>, 54 (PC10)</td>
<td></td>
</tr>
<tr>
<td>UART5</td>
<td><strong>62 (PD2)</strong></td>
<td><strong>56 (PC12)</strong></td>
<td></td>
</tr>
<tr>
<td>UART7</td>
<td><strong>83 (PE7)</strong>, 21 (PF6)</td>
<td><strong>84 (PE8)</strong>, 20 (PF7)</td>
<td></td>
</tr>
<tr>
<td>UART8</td>
<td><strong>76 (PE0)</strong></td>
<td><strong>77 (PE1)</strong></td>
<td></td>
</tr>
<tr>
<td>USART1</td>
<td><strong>30 (PA10)</strong>, 41 (PB7)</td>
<td><strong>29 (PA9)</strong>, 40 (PB6)</td>
<td></td>
</tr>
<tr>
<td>USART2</td>
<td><strong>24 (PA3)</strong>, 66 (PD6)</td>
<td><strong>23 (PA2)</strong>, 65 (PD5)</td>
<td></td>
</tr>
<tr>
<td>USART3</td>
<td><strong>43 (PB11)</strong>, 55 (PC11), 69 (PD9)</td>
<td><strong>42 (PB10)</strong>, 54 (PC10), 68 (PD8)</td>
<td></td>
</tr>
<tr>
<td>USART6</td>
<td><strong>0 (PC7)</strong>, 110 (PG9)</td>
<td><strong>1 (PC6)</strong>, 115 (PG14)</td>
<td></td>
</tr>
</tbody>
</table>
<h2 id="i2s">I2S</h2>
<table>
<thead>
<tr>
<th>Instance</th>
<th>CK</th>
<th>SD</th>
<th>WS</th>
<th>MCK</th>
<th></th>
</tr>
</thead>
<tbody>
<tr>
<td>I2S1</td>
<td><strong>26 (PA5)</strong>, 38 (PB3)</td>
<td><strong>28 (PA7)</strong>, 39 (PB5)</td>
<td><strong>25 (PA4)</strong>, 9 (PA15)</td>
<td><strong>50 (PC4)</strong></td>
<td></td>
</tr>
<tr>
<td>I2S2</td>
<td><strong>29 (PA9)</strong>, 42 (PB10), 45 (PB13), 63 (PD3), 13 (PI1)</td>
<td><strong>11 (PB15)</strong>, 47 (PC1), 49 (PC3), 7 (PI3)</td>
<td><strong>3 (PB4)</strong>, 14 (PB9), 44 (PB12), 5 (PI0)</td>
<td><strong>1 (PC6)</strong></td>
<td></td>
</tr>
<tr>
<td>I2S3</td>
<td><strong>38 (PB3)</strong>, 54 (PC10)</td>
<td><strong>37 (PB2)</strong>, 39 (PB5), 56 (PC12), 66 (PD6)</td>
<td><strong>25 (PA4)</strong>, 9 (PA15)</td>
<td><strong>0 (PC7)</strong></td>
<td></td>
</tr>
</tbody>
</table>
<h2 id="tim">TIM</h2>
<table>
<thead>
<tr>
<th>Instance</th>
<th>CH1</th>
<th>CH2</th>
<th>CH3</th>
<th>CH4</th>
<th></th>
</tr>
</thead>
<tbody>
<tr>
<td>TIM1</td>
<td><strong>10 (PA8)</strong>, 85 (PE9), <span style="text-decoration: overline">28 (PA7)</span>, <span style="text-decoration: overline">45 (PB13)</span>, <span style="text-decoration: overline">84 (PE8)</span></td>
<td><strong>29 (PA9)</strong>, 87 (PE11), <span style="text-decoration: overline">35 (PB0)</span>, <span style="text-decoration: overline">12 (PB14)</span>, <span style="text-decoration: overline">86 (PE10)</span></td>
<td><strong>30 (PA10)</strong>, 89 (PE13), <span style="text-decoration: overline">36 (PB1)</span>, <span style="text-decoration: overline">11 (PB15)</span>, <span style="text-decoration: overline">88 (PE12)</span></td>
<td><strong>31 (PA11)</strong>, 90 (PE14)</td>
<td></td>
</tr>
<tr>
<td>TIM2</td>
<td><strong>16 (PA0)</strong>, 26 (PA5), 9 (PA15)</td>
<td><strong>22 (PA1)</strong>, 38 (PB3)</td>
<td><strong>23 (PA2)</strong>, 42 (PB10)</td>
<td><strong>24 (PA3)</strong>, 43 (PB11)</td>
<td></td>
</tr>
<tr>
<td>TIM3</td>
<td><strong>27 (PA6)</strong>, 3 (PB4), 1 (PC6)</td>
<td><strong>28 (PA7)</strong>, 39 (PB5), 0 (PC7)</td>
<td><strong>35 (PB0)</strong>, 52 (PC8)</td>
<td><strong>36 (PB1)</strong>, 53 (PC9)</td>
<td></td>
</tr>
<tr>
<td>TIM4</td>
<td><strong>40 (PB6)</strong>, 72 (PD12)</td>
<td><strong>41 (PB7)</strong>, 73 (PD13)</td>
<td><strong>15 (PB8)</strong>, 74 (PD14)</td>
<td><strong>14 (PB9)</strong>, 75 (PD15)</td>
<td></td>
</tr>
<tr>
<td>TIM5</td>
<td><strong>16 (PA0)</strong>, 126 (PH10)</td>
<td><strong>22 (PA1)</strong>, 127 (PH11)</td>
<td><strong>23 (PA2)</strong>, 128 (PH12)</td>
<td><strong>24 (PA3)</strong>, 5 (PI0)</td>
<td></td>
</tr>
<tr>
<td>TIM8</td>
<td><strong>1 (PC6)</strong>, 133 (PI5), <span style="text-decoration: overline">26 (PA5)</span>, <span style="text-decoration: overline">28 (PA7)</span>, <span style="text-decoration: overline">129 (PH13)</span></td>
<td><strong>0 (PC7)</strong>, 134 (PI6), <span style="text-decoration: overline">35 (PB0)</span>, <span style="text-decoration: overline">12 (PB14)</span>, <span style="text-decoration: overline">130 (PH14)</span></td>
<td><strong>52 (PC8)</strong>, 135 (PI7), <span style="text-decoration: overline">36 (PB1)</span>, <span style="text-decoration: overline">11 (PB15)</span>, <span style="text-decoration: overline">131 (PH15)</span></td>
<td><strong>53 (PC9)</strong>, 8 (PI2)</td>
<td></td>
</tr>
<tr>
<td>TIM9</td>
<td><strong>23 (PA2)</strong>, 81 (PE5)</td>
<td><strong>24 (PA3)</strong>, 82 (PE6)</td>
<td></td>
<td></td>
<td></td>
</tr>
<tr>
<td>TIM10</td>
<td><strong>15 (PB8)</strong>, 21 (PF6)</td>
<td></td>
<td></td>
<td></td>
<td></td>
</tr>
<tr>
<td>TIM11</td>
<td><strong>14 (PB9)</strong>, 20 (PF7)</td>
<td></td>
<td></td>
<td></td>
<td></td>
</tr>
<tr>
<td>TIM12</td>
<td><strong>12 (PB14)</strong>, 6 (PH6)</td>
<td><strong>11 (PB15)</strong>, 125 (PH9)</td>
<td></td>
<td></td>
<td></td>
</tr>
<tr>
<td>TIM13</td>
<td><strong>27 (PA6)</strong>, 19 (PF8)</td>
<td></td>
<td></td>
<td></td>
<td></td>
</tr>
<tr>
<td>TIM14</td>
<td><strong>28 (PA7)</strong>, 18 (PF9)</td>
<td></td>
<td></td>
<td></td>
<td></td>
</tr>
</tbody>
</table>
<h2 id="adc">ADC</h2>
<table>
<thead>
<tr>
<th>Instance</th>
<th>Channel</th>
<th>Pin</th>
</tr>
</thead>
<tbody>
<tr>
<td>ADC1</td>
<td>IN0</td>
<td>16 (PA0)</td>
</tr>
<tr>
<td>ADC1</td>
<td>IN1</td>
<td>22 (PA1)</td>
</tr>
<tr>
<td>ADC1</td>
<td>IN2</td>
<td>23 (PA2)</td>
</tr>
<tr>
<td>ADC1</td>
<td>IN3</td>
<td>24 (PA3)</td>
</tr>
<tr>
<td>ADC1</td>
<td>IN4</td>
<td>25 (PA4)</td>
</tr>
<tr>
<td>ADC1</td>
<td>IN5</td>
<td>26 (PA5)</td>
</tr>
<tr>
<td>ADC1</td>
<td>IN6</td>
<td>27 (PA6)</td>
</tr>
<tr>
<td>ADC1</td>
<td>IN7</td>
<td>28 (PA7)</td>
</tr>
<tr>
<td>ADC1</td>
<td>IN8</td>
<td>35 (PB0)</td>
</tr>
<tr>
<td>ADC1</td>
<td>IN9</td>
<td>36 (PB1)</td>
</tr>
<tr>
<td>ADC1</td>
<td>IN10</td>
<td>46 (PC0)</td>
</tr>
<tr>
<td>ADC1</td>
<td>IN11</td>
<td>47 (PC1)</td>
</tr>
<tr>
<td>ADC1</td>
<td>IN12</td>
<td>48 (PC2)</td>
</tr>
<tr>
<td>ADC1</td>
<td>IN13</td>
<td>49 (PC3)</td>
</tr>
<tr>
<td>ADC1</td>
<td>IN14</td>
<td>50 (PC4)</td>
</tr>
<tr>
<td>ADC1</td>
<td>IN15</td>
<td>51 (PC5)</td>
</tr>
<tr>
<td>ADC2</td>
<td>IN0</td>
<td>16 (PA0)</td>
</tr>
<tr>
<td>ADC2</td>
<td>IN1</td>
<td>22 (PA1)</td>
</tr>
<tr>
<td>ADC2</td>
<td>IN2</td>
<td>23 (PA2)</td>
</tr>
<tr>
<td>ADC2</td>
<td>IN3</td>
<td>24 (PA3)</td>
</tr>
<tr>
<td>ADC2</td>
<td>IN4</td>
<td>25 (PA4)</td>
</tr>
<tr>
<td>ADC2</td>
<td>IN5</td>
<td>26 (PA5)</td>
</tr>
<tr>
<td>ADC2</td>
<td>IN6</td>
<td>27 (PA6)</td>
</tr>
<tr>
<td>ADC2</td>
<td>IN7</td>
<td>28 (PA7)</td>
</tr>
<tr>
<td>ADC2</td>
<td>IN8</td>
<td>35 (PB0)</td>
</tr>
<tr>
<td>ADC2</td>
<td>IN9</td>
<td>36 (PB1)</td>
</tr>
<tr>
<td>ADC2</td>
<td>IN10</td>
<td>46 (PC0)</td>
</tr>
<tr>
<td>ADC2</td>
<td>IN11</td>
<td>47 (PC1)</td>
</tr>
<tr>
<td>ADC2</td>
<td>IN12</td>
<td>48 (PC2)</td>
</tr>
<tr>
<td>ADC2</td>
<td>IN13</td>
<td>49 (PC3)</td>
</tr>
<tr>
<td>ADC2</td>
<td>IN14</td>
<td>50 (PC4)</td>
</tr>
<tr>
<td>ADC2</td>
<td>IN15</td>
<td>51 (PC5)</td>
</tr>
<tr>
<td>ADC3</td>
<td>IN0</td>
<td>16 (PA0)</td>
</tr>
<tr>
<td>ADC3</td>
<td>IN1</td>
<td>22 (PA1)</td>
</tr>
<tr>
<td>ADC3</td>
<td>IN2</td>
<td>23 (PA2)</td>
</tr>
<tr>
<td>ADC3</td>
<td>IN3</td>
<td>24 (PA3)</td>
</tr>
<tr>
<td>ADC3</td>
<td>IN4</td>
<td>21 (PF6)</td>
</tr>
<tr>
<td>ADC3</td>
<td>IN5</td>
<td>20 (PF7)</td>
</tr>
<tr>
<td>ADC3</td>
<td>IN6</td>
<td>19 (PF8)</td>
</tr>
<tr>
<td>ADC3</td>
<td>IN7</td>
<td>18 (PF9)</td>
</tr>
<tr>
<td>ADC3</td>
<td>IN8</td>
<td>17 (PF10)</td>
</tr>
<tr>
<td>ADC3</td>
<td>IN9</td>
<td>95 (PF3)</td>
</tr>
<tr>
<td>ADC3</td>
<td>IN10</td>
<td>46 (PC0)</td>
</tr>
<tr>
<td>ADC3</td>
<td>IN11</td>
<td>47 (PC1)</td>
</tr>
<tr>
<td>ADC3</td>
<td>IN12</td>
<td>48 (PC2)</td>
</tr>
<tr>
<td>ADC3</td>
<td>IN13</td>
<td>49 (PC3)</td>
</tr>
<tr>
<td>ADC3</td>
<td>IN14</td>
<td>96 (PF4)</td>
</tr>
<tr>
<td>ADC3</td>
<td>IN15</td>
<td>97 (PF5)</td>
</tr>
</tbody>
</table>
<h2 id="gpio">GPIO</h2>
<table>
<thead>
<tr>
<th>Pin</th>
<th>Peripheral signal available on the pin</th>
<th>Board macro</th>
</tr>
</thead>
<tbody>
<tr>
<td>0 (PC7)</td>
<td>DCMI_D1, I2S3_MCK, LTDC_G6, SDMMC1_D7, TIM3_CH2, TIM8_CH2, USART6_RX</td>
<td></td>
</tr>
<tr>
<td>1 (PC6)</td>
<td>DCMI_D0, I2S2_MCK, LTDC_HSYNC, SDMMC1_D6, TIM3_CH1, TIM8_CH1, USART6_TX</td>
<td></td>
</tr>
<tr>
<td>2 (PG6)</td>
<td>DCMI_D12, LTDC_R7</td>
<td></td>
</tr>
<tr>
<td>3 (PB4)</td>
<td>I2S2_WS, SPI1_MISO, SPI2_NSS, SPI3_MISO, SYS_JTRST, TIM3_CH1</td>
<td></td>
</tr>
<tr>
<td>4 (PG7)</td>
<td>DCMI_D13, FMC_INT, LTDC_CLK, USART6_CK</td>
<td></td>
</tr>
<tr>
<td>5 (PI0)</td>
<td>DCMI_D13, FMC_D24, I2S2_WS, LTDC_G5, SPI2_NSS, TIM5_CH4</td>
<td><strong>SS</strong></td>
</tr>
<tr>
<td>6 (PH6)</td>
<td>DCMI_D8, ETH_RXD2, FMC_SDNE1, I2C2_SMBA, SPI5_SCK, TIM12_CH1</td>
<td></td>
</tr>
<tr>
<td>7 (PI3)</td>
<td>DCMI_D10, FMC_D27, I2S2_SD, SPI2_MOSI, TIM8_ETR</td>
<td></td>
</tr>
<tr>
<td>8 (PI2)</td>
<td>DCMI_D9, FMC_D26, LTDC_G7, SPI2_MISO, TIM8_CH4</td>
<td></td>
</tr>
<tr>
<td>9 (PA15)</td>
<td>CEC, I2S1_WS, I2S3_WS, SPI1_NSS, SPI3_NSS, SYS_JTDI, TIM2_CH1, TIM2_ETR, UART4_DE, UART4_RTS</td>
<td></td>
</tr>
<tr>
<td>10 (PA8)</td>
<td>I2C3_SCL, LTDC_R6, RCC_MCO_1, TIM1_CH1, TIM8_BKIN2, USART1_CK, USB_OTG_FS_SOF</td>
<td></td>
</tr>
<tr>
<td>11 (PB15)</td>
<td>I2S2_SD, RTC_REFIN, SPI2_MOSI, TIM1_CH3N, TIM8_CH3N, TIM12_CH2, USB_OTG_HS_DP</td>
<td><strong>MOSI</strong></td>
</tr>
<tr>
<td>12 (PB14)</td>
<td>SPI2_MISO, TIM1_CH2N, TIM8_CH2N, TIM12_CH1, USART3_DE, USART3_RTS, USB_OTG_HS_DM</td>
<td><strong>MISO</strong></td>
</tr>
<tr>
<td>13 (PI1)</td>
<td>DCMI_D8, FMC_D25, I2S2_CK, LTDC_G6, SPI2_SCK, TIM8_BKIN2</td>
<td><strong>LED_BUILTIN</strong>, <strong>SCK</strong></td>
</tr>
<tr>
<td>14 (PB9)</td>
<td>CAN1_TX, DAC_EXTI9, DCMI_D7, I2C1_SDA, I2S2_WS, LTDC_B7, SDMMC1_D5, SPI2_NSS, TIM4_CH4, TIM11_CH1</td>
<td><strong>SDA</strong></td>
</tr>
<tr>
<td>15 (PB8)</td>
<td>CAN1_RX, DCMI_D6, ETH_TXD3, I2C1_SCL, LTDC_B6, SDMMC1_D4, TIM4_CH3, TIM10_CH1</td>
<td><strong>SCL</strong></td>
</tr>
<tr>
<td>16 (PA0)</td>
<td>ADC1_IN0, ADC2_IN0, ADC3_IN0, ETH_CRS, SAI2_SD_B, SYS_WKUP1, TIM2_CH1, TIM2_ETR, TIM5_CH1, TIM8_ETR, UART4_TX, USART2_CTS</td>
<td><strong>A0</strong></td>
</tr>
<tr>
<td>17 (PF10)</td>
<td>ADC3_IN8, DCMI_D11, LTDC_DE</td>
<td><strong>A1</strong></td>
</tr>
<tr>
<td>18 (PF9)</td>
<td>ADC3_IN7, QUADSPI_BK1_IO1, SAI1_FS_B, SPI5_MOSI, TIM14_CH1, UART7_CTS</td>
<td><strong>A2</strong></td>
</tr>
<tr>
<td>19 (PF8)</td>
<td>ADC3_IN6, QUADSPI_BK1_IO0, SAI1_SCK_B, SPI5_MISO, TIM13_CH1, UART7_DE, UART7_RTS</td>
<td><strong>A3</strong></td>
</tr>
<tr>
<td>20 (PF7)</td>
<td>ADC3_IN5, QUADSPI_BK1_IO2, SAI1_MCLK_B, SPI5_SCK, TIM11_CH1, UART7_TX</td>
<td><strong>A4</strong></td>
</tr>
<tr>
<td>21 (PF6)</td>
<td>ADC3_IN4, QUADSPI_BK1_IO3, SAI1_SD_B, SPI5_NSS, TIM10_CH1, UART7_RX</td>
<td><strong>A5</strong></td>
</tr>
<tr>
<td>22 (PA1)</td>
<td>ADC1_IN1, ADC2_IN1, ADC3_IN1, ETH_REF_CLK, ETH_RX_CLK, LTDC_R2, QUADSPI_BK1_IO3, SAI2_MCLK_B, TIM2_CH2, TIM5_CH2, UART4_RX, USART2_DE, USART2_RTS</td>
<td></td>
</tr>
<tr>
<td>23 (PA2)</td>
<td>ADC1_IN2, ADC2_IN2, ADC3_IN2, ETH_MDIO, LTDC_R1, SAI2_SCK_B, SYS_WKUP2, TIM2_CH3, TIM5_CH3, TIM9_CH1, USART2_TX</td>
<td></td>
</tr>
<tr>
<td>24 (PA3)</td>
<td>ADC1_IN3, ADC2_IN3, ADC3_IN3, ETH_COL, LTDC_B5, TIM2_CH4, TIM5_CH4, TIM9_CH2, USART2_RX, USB_OTG_HS_ULPI_D0</td>
<td></td>
</tr>
<tr>
<td>25 (PA4)</td>
<td>ADC1_IN4, ADC2_IN4, DAC_OUT1, DCMI_HSYNC, I2S1_WS, I2S3_WS, LTDC_VSYNC, SPI1_NSS, SPI3_NSS, USART2_CK, USB_OTG_HS_SOF</td>
<td></td>
</tr>
<tr>
<td>26 (PA5)</td>
<td>ADC1_IN5, ADC2_IN5, DAC_OUT2, I2S1_CK, LTDC_R4, SPI1_SCK, TIM2_CH1, TIM2_ETR, TIM8_CH1N, USB_OTG_HS_ULPI_CK</td>
<td></td>
</tr>
<tr>
<td>27 (PA6)</td>
<td>ADC1_IN6, ADC2_IN6, DCMI_PIXCLK, LTDC_G2, SPI1_MISO, TIM1_BKIN, TIM3_CH1, TIM8_BKIN, TIM13_CH1</td>
<td></td>
</tr>
<tr>
<td>28 (PA7)</td>
<td>ADC1_IN7, ADC2_IN7, ETH_CRS_DV, ETH_RX_DV, FMC_SDNWE, I2S1_SD, SPI1_MOSI, TIM1_CH1N, TIM3_CH2, TIM8_CH1N, TIM14_CH1</td>
<td></td>
</tr>
<tr>
<td>29 (PA9)</td>
<td>DCMI_D0, I2C3_SMBA, I2S2_CK, SPI2_SCK, TIM1_CH2, USART1_TX, USB_OTG_FS_VBUS</td>
<td></td>
</tr>
<tr>
<td>30 (PA10)</td>
<td>DCMI_D1, TIM1_CH3, USART1_RX, USB_OTG_FS_ID</td>
<td></td>
</tr>
<tr>
<td>31 (PA11)</td>
<td>CAN1_RX, LTDC_R4, TIM1_CH4, USART1_CTS, USB_OTG_FS_DM</td>
<td></td>
</tr>
<tr>
<td>32 (PA12)</td>
<td>CAN1_TX, LTDC_R5, SAI2_FS_B, TIM1_ETR, USART1_DE, USART1_RTS, USB_OTG_FS_DP</td>
<td></td>
</tr>
<tr>
<td>33 (PA13)</td>
<td>SYS_JTMS-SWDIO</td>
<td></td>
</tr>
<tr>
<td>34 (PA14)</td>
<td>SYS_JTCK-SWCLK</td>
<td></td>
</tr>
<tr>
<td>35 (PB0)</td>
<td>ADC1_IN8, ADC2_IN8, ETH_RXD2, LTDC_R3, TIM1_CH2N, TIM3_CH3, TIM8_CH2N, UART4_CTS, USB_OTG_HS_ULPI_D1</td>
<td></td>
</tr>
<tr>
<td>36 (PB1)</td>
<td>ADC1_IN9, ADC2_IN9, ETH_RXD3, LTDC_R6, TIM1_CH3N, TIM3_CH4, TIM8_CH3N, USB_OTG_HS_ULPI_D2</td>
<td></td>
</tr>
<tr>
<td>37 (PB2)</td>
<td>I2S3_SD, QUADSPI_CLK, SAI1_SD_A, SPI3_MOSI</td>
<td></td>
</tr>
<tr>
<td>38 (PB3)</td>
<td>I2S1_CK, I2S3_CK, SPI1_SCK, SPI3_SCK, SYS_JTDO-SWO, TIM2_CH2</td>
<td></td>
</tr>
<tr>
<td>39 (PB5)</td>
<td>CAN2_RX, DCMI_D10, ETH_PPS_OUT, FMC_SDCKE1, I2C1_SMBA, I2S1_SD, I2S3_SD, SPI1_MOSI, SPI3_MOSI, TIM3_CH2, USB_OTG_HS_ULPI_D7</td>
<td></td>
</tr>
<tr>
<td>40 (PB6)</td>
<td>CAN2_TX, CEC, DCMI_D5, FMC_SDNE1, I2C1_SCL, QUADSPI_BK1_NCS, TIM4_CH1, USART1_TX</td>
<td></td>
</tr>
<tr>
<td>41 (PB7)</td>
<td>DCMI_VSYNC, FMC_NL, I2C1_SDA, TIM4_CH2, USART1_RX</td>
<td></td>
</tr>
<tr>
<td>42 (PB10)</td>
<td>ETH_RX_ER, I2C2_SCL, I2S2_CK, LTDC_G4, SPI2_SCK, TIM2_CH3, USART3_TX, USB_OTG_HS_ULPI_D3</td>
<td></td>
</tr>
<tr>
<td>43 (PB11)</td>
<td>ETH_TX_EN, I2C2_SDA, LTDC_G5, TIM2_CH4, USART3_RX, USB_OTG_HS_ULPI_D4</td>
<td></td>
</tr>
<tr>
<td>44 (PB12)</td>
<td>CAN2_RX, ETH_TXD0, I2C2_SMBA, I2S2_WS, SPI2_NSS, TIM1_BKIN, USART3_CK, USB_OTG_HS_ID, USB_OTG_HS_ULPI_D5</td>
<td></td>
</tr>
<tr>
<td>45 (PB13)</td>
<td>CAN2_TX, ETH_TXD1, I2S2_CK, SPI2_SCK, TIM1_CH1N, USART3_CTS, USB_OTG_HS_ULPI_D6, USB_OTG_HS_VBUS</td>
<td></td>
</tr>
<tr>
<td>46 (PC0)</td>
<td>ADC1_IN10, ADC2_IN10, ADC3_IN10, FMC_SDNWE, LTDC_R5, SAI2_FS_B, USB_OTG_HS_ULPI_STP</td>
<td></td>
</tr>
<tr>
<td>47 (PC1)</td>
<td>ADC1_IN11, ADC2_IN11, ADC3_IN11, ETH_MDC, I2S2_SD, RTC_TAMP3, SAI1_SD_A, SPI2_MOSI, SYS_TRACED0, SYS_WKUP3</td>
<td></td>
</tr>
<tr>
<td>48 (PC2)</td>
<td>ADC1_IN12, ADC2_IN12, ADC3_IN12, ETH_TXD2, FMC_SDNE0, SPI2_MISO, USB_OTG_HS_ULPI_DIR</td>
<td></td>
</tr>
<tr>
<td>49 (PC3)</td>
<td>ADC1_IN13, ADC2_IN13, ADC3_IN13, ETH_TX_CLK, FMC_SDCKE0, I2S2_SD, SPI2_MOSI, USB_OTG_HS_ULPI_NXT</td>
<td></td>
</tr>
<tr>
<td>50 (PC4)</td>
<td>ADC1_IN14, ADC2_IN14, ETH_RXD0, FMC_SDNE0, I2S1_MCK, SPDIFRX_IN2</td>
<td></td>
</tr>
<tr>
<td>51 (PC5)</td>
<td>ADC1_IN15, ADC2_IN15, ETH_RXD1, FMC_SDCKE0, SPDIFRX_IN3</td>
<td></td>
</tr>
<tr>
<td>52 (PC8)</td>
<td>DCMI_D2, SDMMC1_D0, SYS_TRACED1, TIM3_CH3, TIM8_CH3, UART5_DE, UART5_RTS, USART6_CK</td>
<td></td>
</tr>
<tr>
<td>53 (PC9)</td>
<td>DCMI_D3, I2C3_SDA, I2S_CKIN, QUADSPI_BK1_IO0, RCC_MCO_2, SDMMC1_D1, TIM3_CH4, TIM8_CH4, UART5_CTS</td>
<td></td>
</tr>
<tr>
<td>54 (PC10)</td>
<td>DCMI_D8, I2S3_CK, LTDC_R2, QUADSPI_BK1_IO1, SDMMC1_D2, SPI3_SCK, UART4_TX, USART3_TX</td>
<td></td>
</tr>
<tr>
<td>55 (PC11)</td>
<td>DCMI_D4, QUADSPI_BK2_NCS, SDMMC1_D3, SPI3_MISO, UART4_RX, USART3_RX</td>
<td></td>
</tr>
<tr>
<td>56 (PC12)</td>
<td>DCMI_D9, I2S3_SD, SDMMC1_CK, SPI3_MOSI, SYS_TRACED3, UART5_TX, USART3_CK</td>
<td></td>
</tr>
<tr>
<td>57 (PC13)</td>
<td>RTC_OUT_ALARM, RTC_OUT_CALIB, RTC_TAMP1, SYS_WKUP4</td>
<td></td>
</tr>
<tr>
<td>58 (PC14)</td>
<td>RCC_OSC32_IN</td>
<td></td>
</tr>
<tr>
<td>59 (PC15)</td>
<td>RCC_OSC32_OUT</td>
<td></td>
</tr>
<tr>
<td>60 (PD0)</td>
<td>CAN1_RX, FMC_D2, FMC_DA2</td>
<td></td>
</tr>
<tr>
<td>61 (PD1)</td>
<td>CAN1_TX, FMC_D3, FMC_DA3</td>
<td></td>
</tr>
<tr>
<td>62 (PD2)</td>
<td>DCMI_D11, SDMMC1_CMD, SYS_TRACED2, TIM3_ETR, UART5_RX</td>
<td></td>
</tr>
<tr>
<td>63 (PD3)</td>
<td>DCMI_D5, FMC_CLK, I2S2_CK, LTDC_G7, SPI2_SCK, USART2_CTS</td>
<td></td>
</tr>
<tr>
<td>64 (PD4)</td>
<td>FMC_NOE, USART2_DE, USART2_RTS</td>
<td></td>
</tr>
<tr>
<td>65 (PD5)</td>
<td>FMC_NWE, USART2_TX</td>
<td></td>
</tr>
<tr>
<td>66 (PD6)</td>
<td>DCMI_D10, FMC_NWAIT, I2S3_SD, LTDC_B2, SAI1_SD_A, SPI3_MOSI, USART2_RX</td>
<td></td>
</tr>
<tr>
<td>67 (PD7)</td>
<td>FMC_NE1, SPDIFRX_IN0, USART2_CK</td>
<td></td>
</tr>
<tr>
<td>68 (PD8)</td>
<td>FMC_D13, FMC_DA13, SPDIFRX_IN1, USART3_TX</td>
<td></td>
</tr>
<tr>
<td>69 (PD9)</td>
<td>FMC_D14, FMC_DA14, USART3_RX</td>
<td></td>
</tr>
<tr>
<td>70 (PD10)</td>
<td>FMC_D15, FMC_DA15, LTDC_B3, USART3_CK</td>
<td></td>
</tr>
<tr>
<td>71 (PD11)</td>
<td>FMC_A16, FMC_CLE, I2C4_SMBA, QUADSPI_BK1_IO0, SAI2_SD_A, USART3_CTS</td>
<td></td>
</tr>
<tr>
<td>72 (PD12)</td>
<td>FMC_A17, FMC_ALE, I2C4_SCL, LPTIM1_IN1, QUADSPI_BK1_IO1, SAI2_FS_A, TIM4_CH1, USART3_DE, USART3_RTS</td>
<td></td>
</tr>
<tr>
<td>73 (PD13)</td>
<td>FMC_A18, I2C4_SDA, LPTIM1_OUT, QUADSPI_BK1_IO3, SAI2_SCK_A, TIM4_CH2</td>
<td></td>
</tr>
<tr>
<td>74 (PD14)</td>
<td>FMC_D0, FMC_DA0, TIM4_CH3, UART8_CTS</td>
<td></td>
</tr>
<tr>
<td>75 (PD15)</td>
<td>FMC_D1, FMC_DA1, TIM4_CH4, UART8_DE, UART8_RTS</td>
<td></td>
</tr>
<tr>
<td>76 (PE0)</td>
<td>DCMI_D2, FMC_NBL0, LPTIM1_ETR, SAI2_MCLK_A, TIM4_ETR, UART8_RX</td>
<td></td>
</tr>
<tr>
<td>77 (PE1)</td>
<td>DCMI_D3, FMC_NBL1, LPTIM1_IN2, UART8_TX</td>
<td></td>
</tr>
<tr>
<td>78 (PE2)</td>
<td>ETH_TXD3, FMC_A23, QUADSPI_BK1_IO2, SAI1_MCLK_A, SPI4_SCK, SYS_TRACECLK</td>
<td></td>
</tr>
<tr>
<td>79 (PE3)</td>
<td>FMC_A19, SAI1_SD_B, SYS_TRACED0</td>
<td></td>
</tr>
<tr>
<td>80 (PE4)</td>
<td>DCMI_D4, FMC_A20, LTDC_B0, SAI1_FS_A, SPI4_NSS, SYS_TRACED1</td>
<td></td>
</tr>
<tr>
<td>81 (PE5)</td>
<td>DCMI_D6, FMC_A21, LTDC_G0, SAI1_SCK_A, SPI4_MISO, SYS_TRACED2, TIM9_CH1</td>
<td></td>
</tr>
<tr>
<td>82 (PE6)</td>
<td>DCMI_D7, FMC_A22, LTDC_G1, SAI1_SD_A, SAI2_MCLK_B, SPI4_MOSI, SYS_TRACED3, TIM1_BKIN2, TIM9_CH2</td>
<td></td>
</tr>
<tr>
<td>83 (PE7)</td>
<td>FMC_D4, FMC_DA4, QUADSPI_BK2_IO0, TIM1_ETR, UART7_RX</td>
<td></td>
</tr>
<tr>
<td>84 (PE8)</td>
<td>FMC_D5, FMC_DA5, QUADSPI_BK2_IO1, TIM1_CH1N, UART7_TX</td>
<td></td>
</tr>
<tr>
<td>85 (PE9)</td>
<td>FMC_D6, FMC_DA6, QUADSPI_BK2_IO2, TIM1_CH1, UART7_DE, UART7_RTS</td>
<td></td>
</tr>
<tr>
<td>86 (PE10)</td>
<td>FMC_D7, FMC_DA7, QUADSPI_BK2_IO3, TIM1_CH2N, UART7_CTS</td>
<td></td>
</tr>
<tr>
<td>87 (PE11)</td>
<td>FMC_D8, FMC_DA8, LTDC_G3, SAI2_SD_B, SPI4_NSS, TIM1_CH2</td>
<td></td>
</tr>
<tr>
<td>88 (PE12)</td>
<td>FMC_D9, FMC_DA9, LTDC_B4, SAI2_SCK_B, SPI4_SCK, TIM1_CH3N</td>
<td></td>
</tr>
<tr>
<td>89 (PE13)</td>
<td>FMC_D10, FMC_DA10, LTDC_DE, SAI2_FS_B, SPI4_MISO, TIM1_CH3</td>
<td></td>
</tr>
<tr>
<td>90 (PE14)</td>
<td>FMC_D11, FMC_DA11, LTDC_CLK, SAI2_MCLK_B, SPI4_MOSI, TIM1_CH4</td>
<td></td>
</tr>
<tr>
<td>91 (PE15)</td>
<td>FMC_D12, FMC_DA12, LTDC_R7, TIM1_BKIN</td>
<td></td>
</tr>
<tr>
<td>92 (PF0)</td>
<td>FMC_A0, I2C2_SDA</td>
<td></td>
</tr>
<tr>
<td>93 (PF1)</td>
<td>FMC_A1, I2C2_SCL</td>
<td></td>
</tr>
<tr>
<td>94 (PF2)</td>
<td>FMC_A2, I2C2_SMBA</td>
<td></td>
</tr>
<tr>
<td>95 (PF3)</td>
<td>ADC3_IN9, FMC_A3</td>
<td></td>
</tr>
<tr>
<td>96 (PF4)</td>
<td>ADC3_IN14, FMC_A4</td>
<td></td>
</tr>
<tr>
<td>97 (PF5)</td>
<td>ADC3_IN15, FMC_A5</td>
<td></td>
</tr>
<tr>
<td>98 (PF11)</td>
<td>DCMI_D12, FMC_SDNRAS, SAI2_SD_B, SPI5_MOSI</td>
<td></td>
</tr>
<tr>
<td>99 (PF12)</td>
<td>FMC_A6</td>
<td></td>
</tr>
<tr>
<td>100 (PF13)</td>
<td>FMC_A7, I2C4_SMBA</td>
<td></td>
</tr>
<tr>
<td>101 (PF14)</td>
<td>FMC_A8, I2C4_SCL</td>
<td></td>
</tr>
<tr>
<td>102 (PF15)</td>
<td>FMC_A9, I2C4_SDA</td>
<td></td>
</tr>
<tr>
<td>103 (PG0)</td>
<td>FMC_A10</td>
<td></td>
</tr>
<tr>
<td>104 (PG1)</td>
<td>FMC_A11</td>
<td></td>
</tr>
<tr>
<td>105 (PG2)</td>
<td>FMC_A12</td>
<td></td>
</tr>
<tr>
<td>106 (PG3)</td>
<td>FMC_A13</td>
<td></td>
</tr>
<tr>
<td>107 (PG4)</td>
<td>FMC_A14, FMC_BA0</td>
<td></td>
</tr>
<tr>
<td>108 (PG5)</td>
<td>FMC_A15, FMC_BA1</td>
<td></td>
</tr>
<tr>
<td>109 (PG8)</td>
<td>ETH_PPS_OUT, FMC_SDCLK, SPDIFRX_IN2, SPI6_NSS, USART6_DE, USART6_RTS</td>
<td></td>
</tr>
<tr>
<td>110 (PG9)</td>
<td>DCMI_VSYNC, FMC_NCE, FMC_NE2, QUADSPI_BK2_IO2, SAI2_FS_B, SPDIFRX_IN3, USART6_RX</td>
<td></td>
</tr>
<tr>
<td>111 (PG10)</td>
<td>DCMI_D2, FMC_NE3, LTDC_B2, LTDC_G3, SAI2_SD_B</td>
<td></td>
</tr>
<tr>
<td>112 (PG11)</td>
<td>ADC1_EXTI11, ADC2_EXTI11, ADC3_EXTI11, DCMI_D3, ETH_TX_EN, LTDC_B3, SPDIFRX_IN0</td>
<td></td>
</tr>
<tr>
<td>113 (PG12)</td>
<td>FMC_NE4, LPTIM1_IN1, LTDC_B1, LTDC_B4, SPDIFRX_IN1, SPI6_MISO, USART6_DE, USART6_RTS</td>
<td></td>
</tr>
<tr>
<td>114 (PG13)</td>
<td>ETH_TXD0, FMC_A24, LPTIM1_OUT, LTDC_R0, SPI6_SCK, SYS_TRACED0, USART6_CTS</td>
<td></td>
</tr>
<tr>
<td>115 (PG14)</td>
<td>ETH_TXD1, FMC_A25, LPTIM1_ETR, LTDC_B0, QUADSPI_BK2_IO3, SPI6_MOSI, SYS_TRACED1, USART6_TX</td>
<td></td>
</tr>
<tr>
<td>116 (PG15)</td>
<td>DCMI_D13, FMC_SDNCAS, USART6_CTS</td>
<td></td>
</tr>
<tr>
<td>117 (PH0)</td>
<td>RCC_OSC_IN</td>
<td></td>
</tr>
<tr>
<td>118 (PH1)</td>
<td>RCC_OSC_OUT</td>
<td></td>
</tr>
<tr>
<td>119 (PH2)</td>
<td>ETH_CRS, FMC_SDCKE0, LPTIM1_IN2, LTDC_R0, QUADSPI_BK2_IO0, SAI2_SCK_B</td>
<td></td>
</tr>
<tr>
<td>120 (PH3)</td>
<td>ETH_COL, FMC_SDNE0, LTDC_R1, QUADSPI_BK2_IO1, SAI2_MCLK_B</td>
<td></td>
</tr>
<tr>
<td>121 (PH4)</td>
<td>I2C2_SCL, USB_OTG_HS_ULPI_NXT</td>
<td></td>
</tr>
<tr>
<td>122 (PH5)</td>
<td>FMC_SDNWE, I2C2_SDA, SPI5_NSS</td>
<td></td>
</tr>
<tr>
<td>123 (PH7)</td>
<td>DCMI_D9, ETH_RXD3, FMC_SDCKE1, I2C3_SCL, SPI5_MISO</td>
<td></td>
</tr>
<tr>
<td>124 (PH8)</td>
<td>DCMI_HSYNC, FMC_D16, I2C3_SDA, LTDC_R2</td>
<td></td>
</tr>
<tr>
<td>125 (PH9)</td>
<td>DCMI_D0, FMC_D17, I2C3_SMBA, LTDC_R3, TIM12_CH2</td>
<td></td>
</tr>
<tr>
<td>126 (PH10)</td>
<td>DCMI_D1, FMC_D18, I2C4_SMBA, LTDC_R4, TIM5_CH1</td>
<td></td>
</tr>
<tr>
<td>127 (PH11)</td>
<td>DCMI_D2, FMC_D19, I2C4_SCL, LTDC_R5, TIM5_CH2</td>
<td></td>
</tr>
<tr>
<td>128 (PH12)</td>
<td>DCMI_D3, FMC_D20, I2C4_SDA, LTDC_R6, TIM5_CH3</td>
<td></td>
</tr>
<tr>
<td>129 (PH13)</td>
<td>CAN1_TX, FMC_D21, LTDC_G2, TIM8_CH1N</td>
<td></td>
</tr>
<tr>
<td>130 (PH14)</td>
<td>DCMI_D4, FMC_D22, LTDC_G3, TIM8_CH2N</td>
<td></td>
</tr>
<tr>
<td>131 (PH15)</td>
<td>DCMI_D11, FMC_D23, LTDC_G4, TIM8_CH3N</td>
<td></td>
</tr>
<tr>
<td>132 (PI4)</td>
<td>DCMI_D5, FMC_NBL2, LTDC_B4, SAI2_MCLK_A, TIM8_BKIN</td>
<td></td>
</tr>
<tr>
<td>133 (PI5)</td>
<td>DCMI_VSYNC, FMC_NBL3, LTDC_B5, SAI2_SCK_A, TIM8_CH1</td>
<td></td>
</tr>
<tr>
<td>134 (PI6)</td>
<td>DCMI_D6, FMC_D28, LTDC_B6, SAI2_SD_A, TIM8_CH2</td>
<td></td>
</tr>
<tr>
<td>135 (PI7)</td>
<td>DCMI_D7, FMC_D29, LTDC_B7, SAI2_FS_A, TIM8_CH3</td>
<td></td>
</tr>
<tr>
<td>136 (PI8)</td>
<td>RTC_TAMP2, RTC_TS, SYS_WKUP5</td>
<td></td>
</tr>
<tr>
<td>137 (PI9)</td>
<td>CAN1_RX, FMC_D30, LTDC_VSYNC</td>
<td></td>
</tr>
<tr>
<td>138 (PI10)</td>
<td>ETH_RX_ER, FMC_D31, LTDC_HSYNC</td>
<td></td>
</tr>
<tr>
<td>139 (PI11)</td>
<td>SYS_WKUP6, USB_OTG_HS_ULPI_DIR</td>
<td></td>
</tr>
<tr>
<td>140 (PI12)</td>
<td>LTDC_HSYNC</td>
<td></td>
</tr>
<tr>
<td>141 (PI13)</td>
<td>LTDC_VSYNC</td>
<td></td>
</tr>
<tr>
<td>142 (PI14)</td>
<td>LTDC_CLK</td>
<td></td>
</tr>
<tr>
<td>143 (PI15)</td>
<td>LTDC_R0</td>
<td></td>
</tr>
<tr>
<td>144 (PJ0)</td>
<td>LTDC_R1</td>
<td></td>
</tr>
<tr>
<td>145 (PJ1)</td>
<td>LTDC_R2</td>
<td></td>
</tr>
<tr>
<td>146 (PJ2)</td>
<td>LTDC_R3</td>
<td></td>
</tr>
<tr>
<td>147 (PJ3)</td>
<td>LTDC_R4</td>
<td></td>
</tr>
<tr>
<td>148 (PJ4)</td>
<td>LTDC_R5</td>
<td></td>
</tr>
<tr>
<td>149 (PJ5)</td>
<td>LTDC_R6</td>
<td></td>
</tr>
<tr>
<td>150 (PJ6)</td>
<td>LTDC_R7</td>
<td></td>
</tr>
<tr>
<td>151 (PJ7)</td>
<td>LTDC_G0</td>
<td></td>
</tr>
<tr>
<td>152 (PJ8)</td>
<td>LTDC_G1</td>
<td></td>
</tr>
<tr>
<td>153 (PJ9)</td>
<td>LTDC_G2</td>
<td></td>
</tr>
<tr>
<td>154 (PJ10)</td>
<td>LTDC_G3</td>
<td></td>
</tr>
<tr>
<td>155 (PJ11)</td>
<td>LTDC_G4</td>
<td></td>
</tr>
<tr>
<td>156 (PJ12)</td>
<td>LTDC_B0</td>
<td></td>
</tr>
<tr>
<td>157 (PJ13)</td>
<td>LTDC_B1</td>
<td></td>
</tr>
<tr>
<td>158 (PJ14)</td>
<td>LTDC_B2</td>
<td></td>
</tr>
<tr>
<td>159 (PJ15)</td>
<td>LTDC_B3</td>
<td></td>
</tr>
<tr>
<td>160 (PK0)</td>
<td>LTDC_G5</td>
<td></td>
</tr>
<tr>
<td>161 (PK1)</td>
<td>LTDC_G6</td>
<td></td>
</tr>
<tr>
<td>162 (PK2)</td>
<td>LTDC_G7</td>
<td></td>
</tr>
<tr>
<td>163 (PK3)</td>
<td>LTDC_B4</td>
<td></td>
</tr>
<tr>
<td>164 (PK4)</td>
<td>LTDC_B5</td>
<td></td>
</tr>
<tr>
<td>165 (PK5)</td>
<td>LTDC_B6</td>
<td></td>
</tr>
<tr>
<td>166 (PK6)</td>
<td>LTDC_B7</td>
<td></td>
</tr>
<tr>
<td>167 (PK7)</td>
<td>LTDC_DE</td>
<td></td>
</tr>
</tbody>
</table></div>
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