Expand page 2 to 128 bytes in size
This commit is contained in:
Josh Stewart
parent
5b3df5ac4d
commit
1cd2a0f296
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@ -99,7 +99,7 @@
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endianness = little
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nPages = 10
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;pageSize = 288, 64, 288, 64, 288, 64, 64, 160, 192, 128, 192
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pageSize = 288, 64, 288, 64, 288, 128, 160, 192, 128, 192
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pageSize = 288, 128, 288, 64, 288, 128, 160, 192, 128, 192
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;burnCommand = "B"
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;pageActivate = "P\001", "P\002", "P\003", "P\004", "P\005", "P\006", "P\007", "P\010", "P\011", "P\012", "P\013"
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@ -256,6 +256,7 @@ page = 2
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iacCLmaxDuty = scalar, U08, 62, "%", 1.0, 0.0, 0.0, 100.0, 0
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boostMinDuty = scalar, U08, 63, "%", 1.0, 0.0, 0.0, 100.0, 0 ; Minimum and maximum duty cycles for boost control
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unused2-64 = array, U08, 64, [64], "%", 1.0, 0.0, 0.0, 255, 0
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;--------------------------------------------------
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@ -352,7 +353,7 @@ page = 4
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ignBypassPin = bits , U08, 63, [1:6], "INVALID", "INVALID", "INVALID", "3", "4", "5", "6", "7", "8", "9", "10", "11", "12", "13", "14", "15", "16", "17", "18", "19", "20", "21", "22", "23", "24", "25", "26", "27", "28", "29", "30", "31", "32", "33", "34", "35", "36", "37", "38", "39", "40", "41", "42", "43", "44", "45", "46", "47", "48", "49", "50", "51", "52", "53", "54", "INVALID", "INVALID", "INVALID", "INVALID", "INVALID", "INVALID", "INVALID", "INVALID", "INVALID"
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ignBypassHiLo = bits, U08, 63, [7:7], "LOW", "HIGH"
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;unused4-64 = array, U08, 64, [64], "%", 1.0, 0.0, 0.0, 255, 0
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;--------------------------------------------------
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;Start AFR page
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;--------------------------------------------------
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@ -140,7 +140,7 @@ const char TSfirmwareVersion[] = "Speeduino 2016.09";
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const byte data_structure_version = 2; //This identifies the data structure when reading / writing.
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//const byte page_size = 64;
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const int npage_size[11] = {0,288,64,288,64,288,128,160,192,128,192};
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const int npage_size[11] = {0,288,128,288,64,288,128,160,192,128,192};
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//const byte page11_size = 128;
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#define MAP_PAGE_SIZE 288
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@ -381,6 +381,8 @@ struct config1 {
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byte iacCLmaxDuty;
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byte boostMinDuty;
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byte unused2_64[64];
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#if defined(CORE_AVR)
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};
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#else
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@ -69,57 +69,57 @@ Current layout of EEPROM data (Version 3) is as follows (All sizes are in bytes)
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#define EEPROM_CONFIG1_XBINS 259
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#define EEPROM_CONFIG1_YBINS 275
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#define EEPROM_CONFIG2_START 291
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#define EEPROM_CONFIG2_END 355 // +64 131
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#define EEPROM_CONFIG3_XSIZE 355
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#define EEPROM_CONFIG3_YSIZE 356
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#define EEPROM_CONFIG3_MAP 357
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#define EEPROM_CONFIG3_XBINS 613
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#define EEPROM_CONFIG3_YBINS 629
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#define EEPROM_CONFIG4_START 645
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#define EEPROM_CONFIG4_END 709
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#define EEPROM_CONFIG5_XSIZE 709
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#define EEPROM_CONFIG5_YSIZE 710
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#define EEPROM_CONFIG5_MAP 711
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#define EEPROM_CONFIG5_XBINS 967
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#define EEPROM_CONFIG5_YBINS 983
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#define EEPROM_CONFIG6_START 999
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#define EEPROM_CONFIG6_END 1127
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#define EEPROM_CONFIG8_XSIZE1 1127
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#define EEPROM_CONFIG8_YSIZE1 1128
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#define EEPROM_CONFIG8_MAP1 1129
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#define EEPROM_CONFIG8_XBINS1 1193
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#define EEPROM_CONFIG8_YBINS1 1201
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#define EEPROM_CONFIG8_XSIZE2 1209
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#define EEPROM_CONFIG8_YSIZE2 1210
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#define EEPROM_CONFIG8_MAP2 1211
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#define EEPROM_CONFIG8_XBINS2 1275
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#define EEPROM_CONFIG8_YBINS2 1283
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#define EEPROM_CONFIG8_END 1291
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#define EEPROM_CONFIG2_END 419
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#define EEPROM_CONFIG3_XSIZE 419
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#define EEPROM_CONFIG3_YSIZE 420
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#define EEPROM_CONFIG3_MAP 421
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#define EEPROM_CONFIG3_XBINS 677
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#define EEPROM_CONFIG3_YBINS 693
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#define EEPROM_CONFIG4_START 709
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#define EEPROM_CONFIG4_END 773
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#define EEPROM_CONFIG5_XSIZE 773
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#define EEPROM_CONFIG5_YSIZE 774
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#define EEPROM_CONFIG5_MAP 775
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#define EEPROM_CONFIG5_XBINS 1031
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#define EEPROM_CONFIG5_YBINS 1047
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#define EEPROM_CONFIG6_START 1063
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#define EEPROM_CONFIG6_END 1191
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#define EEPROM_CONFIG8_XSIZE1 1191
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#define EEPROM_CONFIG8_YSIZE1 1192
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#define EEPROM_CONFIG8_MAP1 1193
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#define EEPROM_CONFIG8_XBINS1 1257
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#define EEPROM_CONFIG8_YBINS1 1265
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#define EEPROM_CONFIG8_XSIZE2 1273
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#define EEPROM_CONFIG8_YSIZE2 1274
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#define EEPROM_CONFIG8_MAP2 1275
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#define EEPROM_CONFIG8_XBINS2 1339
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#define EEPROM_CONFIG8_YBINS2 1347
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#define EEPROM_CONFIG8_END 1355
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#define EEPROM_CONFIG9_XSIZE1 1291
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#define EEPROM_CONFIG9_YSIZE1 1292
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#define EEPROM_CONFIG9_MAP1 1293
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#define EEPROM_CONFIG9_XBINS1 1329
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#define EEPROM_CONFIG9_YBINS1 1335
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#define EEPROM_CONFIG9_XSIZE2 1341
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#define EEPROM_CONFIG9_YSIZE2 1342
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#define EEPROM_CONFIG9_MAP2 1343
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#define EEPROM_CONFIG9_XBINS2 1379
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#define EEPROM_CONFIG9_YBINS2 1385
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#define EEPROM_CONFIG9_XSIZE3 1391
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#define EEPROM_CONFIG9_YSIZE3 1392
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#define EEPROM_CONFIG9_MAP3 1393
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#define EEPROM_CONFIG9_XBINS3 1429
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#define EEPROM_CONFIG9_YBINS3 1435
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#define EEPROM_CONFIG9_XSIZE4 1441
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#define EEPROM_CONFIG9_YSIZE4 1442
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#define EEPROM_CONFIG9_MAP4 1443
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#define EEPROM_CONFIG9_XBINS4 1479
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#define EEPROM_CONFIG9_YBINS4 1485
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#define EEPROM_CONFIG10_START 1500
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#define EEPROM_CONFIG10_END 1628
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#define EEPROM_CONFIG11_START 1628
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#define EEPROM_CONFIG11_END 1820
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#define EEPROM_CONFIG9_XSIZE1 1355
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#define EEPROM_CONFIG9_YSIZE1 1356
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#define EEPROM_CONFIG9_MAP1 1357
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#define EEPROM_CONFIG9_XBINS1 1393
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#define EEPROM_CONFIG9_YBINS1 1399
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#define EEPROM_CONFIG9_XSIZE2 1405
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#define EEPROM_CONFIG9_YSIZE2 1406
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#define EEPROM_CONFIG9_MAP2 1407
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#define EEPROM_CONFIG9_XBINS2 1443
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#define EEPROM_CONFIG9_YBINS2 1449
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#define EEPROM_CONFIG9_XSIZE3 1455
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#define EEPROM_CONFIG9_YSIZE3 1456
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#define EEPROM_CONFIG9_MAP3 1457
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#define EEPROM_CONFIG9_XBINS3 1493
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#define EEPROM_CONFIG9_YBINS3 1499
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#define EEPROM_CONFIG9_XSIZE4 1505
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#define EEPROM_CONFIG9_YSIZE4 1506
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#define EEPROM_CONFIG9_MAP4 1507
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#define EEPROM_CONFIG9_XBINS4 1543
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#define EEPROM_CONFIG9_YBINS4 1549
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#define EEPROM_CONFIG10_START 1564
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#define EEPROM_CONFIG10_END 1692
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#define EEPROM_CONFIG11_START 1692
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#define EEPROM_CONFIG11_END 1884
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//Calibration data is stored at the end of the EEPROM (This is in case any further calibration tables are needed as they are large blocks)
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#define EEPROM_LAST_BARO 2558
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