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speeduino-personal
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Expand page 2 to 128 bytes in size

This commit is contained in:
Josh Stewart 2017-09-19 15:09:32 +10:00
parent 5b3df5ac4d
commit 1cd2a0f296
3 changed files with 56 additions and 53 deletions
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5
reference/speeduino.ini
View File

@ -99,7 +99,7 @@
endianness = little endianness = little
nPages = 10 nPages = 10
;pageSize = 288, 64, 288, 64, 288, 64, 64, 160, 192, 128, 192 ;pageSize = 288, 64, 288, 64, 288, 64, 64, 160, 192, 128, 192
pageSize = 288, 64, 288, 64, 288, 128, 160, 192, 128, 192 pageSize = 288, 128, 288, 64, 288, 128, 160, 192, 128, 192
;burnCommand = "B" ;burnCommand = "B"
;pageActivate = "P\001", "P\002", "P\003", "P\004", "P\005", "P\006", "P\007", "P\010", "P\011", "P\012", "P\013" ;pageActivate = "P\001", "P\002", "P\003", "P\004", "P\005", "P\006", "P\007", "P\010", "P\011", "P\012", "P\013"
@ -256,6 +256,7 @@ page = 2
iacCLmaxDuty = scalar, U08, 62, "%", 1.0, 0.0, 0.0, 100.0, 0 iacCLmaxDuty = scalar, U08, 62, "%", 1.0, 0.0, 0.0, 100.0, 0
boostMinDuty = scalar, U08, 63, "%", 1.0, 0.0, 0.0, 100.0, 0 ; Minimum and maximum duty cycles for boost control boostMinDuty = scalar, U08, 63, "%", 1.0, 0.0, 0.0, 100.0, 0 ; Minimum and maximum duty cycles for boost control
unused2-64 = array, U08, 64, [64], "%", 1.0, 0.0, 0.0, 255, 0
;-------------------------------------------------- ;--------------------------------------------------
@ -352,7 +353,7 @@ page = 4
ignBypassPin = bits , U08, 63, [1:6], "INVALID", "INVALID", "INVALID", "3", "4", "5", "6", "7", "8", "9", "10", "11", "12", "13", "14", "15", "16", "17", "18", "19", "20", "21", "22", "23", "24", "25", "26", "27", "28", "29", "30", "31", "32", "33", "34", "35", "36", "37", "38", "39", "40", "41", "42", "43", "44", "45", "46", "47", "48", "49", "50", "51", "52", "53", "54", "INVALID", "INVALID", "INVALID", "INVALID", "INVALID", "INVALID", "INVALID", "INVALID", "INVALID" ignBypassPin = bits , U08, 63, [1:6], "INVALID", "INVALID", "INVALID", "3", "4", "5", "6", "7", "8", "9", "10", "11", "12", "13", "14", "15", "16", "17", "18", "19", "20", "21", "22", "23", "24", "25", "26", "27", "28", "29", "30", "31", "32", "33", "34", "35", "36", "37", "38", "39", "40", "41", "42", "43", "44", "45", "46", "47", "48", "49", "50", "51", "52", "53", "54", "INVALID", "INVALID", "INVALID", "INVALID", "INVALID", "INVALID", "INVALID", "INVALID", "INVALID"
ignBypassHiLo = bits, U08, 63, [7:7], "LOW", "HIGH" ignBypassHiLo = bits, U08, 63, [7:7], "LOW", "HIGH"
;unused4-64 = array, U08, 64, [64], "%", 1.0, 0.0, 0.0, 255, 0
;-------------------------------------------------- ;--------------------------------------------------
;Start AFR page ;Start AFR page
;-------------------------------------------------- ;--------------------------------------------------

4
speeduino/globals.h
View File

@ -140,7 +140,7 @@ const char TSfirmwareVersion[] = "Speeduino 2016.09";
const byte data_structure_version = 2; //This identifies the data structure when reading / writing. const byte data_structure_version = 2; //This identifies the data structure when reading / writing.
//const byte page_size = 64; //const byte page_size = 64;
const int npage_size[11] = {0,288,64,288,64,288,128,160,192,128,192}; const int npage_size[11] = {0,288,128,288,64,288,128,160,192,128,192};
//const byte page11_size = 128; //const byte page11_size = 128;
#define MAP_PAGE_SIZE 288 #define MAP_PAGE_SIZE 288
@ -381,6 +381,8 @@ struct config1 {
byte iacCLmaxDuty; byte iacCLmaxDuty;
byte boostMinDuty; byte boostMinDuty;
byte unused2_64[64];
#if defined(CORE_AVR) #if defined(CORE_AVR)
}; };
#else #else

100
speeduino/storage.h
View File

@ -69,57 +69,57 @@ Current layout of EEPROM data (Version 3) is as follows (All sizes are in bytes)
#define EEPROM_CONFIG1_XBINS 259 #define EEPROM_CONFIG1_XBINS 259
#define EEPROM_CONFIG1_YBINS 275 #define EEPROM_CONFIG1_YBINS 275
#define EEPROM_CONFIG2_START 291 #define EEPROM_CONFIG2_START 291
#define EEPROM_CONFIG2_END 355 // +64 131 #define EEPROM_CONFIG2_END 419
#define EEPROM_CONFIG3_XSIZE 355 #define EEPROM_CONFIG3_XSIZE 419
#define EEPROM_CONFIG3_YSIZE 356 #define EEPROM_CONFIG3_YSIZE 420
#define EEPROM_CONFIG3_MAP 357 #define EEPROM_CONFIG3_MAP 421
#define EEPROM_CONFIG3_XBINS 613 #define EEPROM_CONFIG3_XBINS 677
#define EEPROM_CONFIG3_YBINS 629 #define EEPROM_CONFIG3_YBINS 693
#define EEPROM_CONFIG4_START 645 #define EEPROM_CONFIG4_START 709
#define EEPROM_CONFIG4_END 709 #define EEPROM_CONFIG4_END 773
#define EEPROM_CONFIG5_XSIZE 709 #define EEPROM_CONFIG5_XSIZE 773
#define EEPROM_CONFIG5_YSIZE 710 #define EEPROM_CONFIG5_YSIZE 774
#define EEPROM_CONFIG5_MAP 711 #define EEPROM_CONFIG5_MAP 775
#define EEPROM_CONFIG5_XBINS 967 #define EEPROM_CONFIG5_XBINS 1031
#define EEPROM_CONFIG5_YBINS 983 #define EEPROM_CONFIG5_YBINS 1047
#define EEPROM_CONFIG6_START 999 #define EEPROM_CONFIG6_START 1063
#define EEPROM_CONFIG6_END 1127 #define EEPROM_CONFIG6_END 1191
#define EEPROM_CONFIG8_XSIZE1 1127 #define EEPROM_CONFIG8_XSIZE1 1191
#define EEPROM_CONFIG8_YSIZE1 1128 #define EEPROM_CONFIG8_YSIZE1 1192
#define EEPROM_CONFIG8_MAP1 1129 #define EEPROM_CONFIG8_MAP1 1193
#define EEPROM_CONFIG8_XBINS1 1193 #define EEPROM_CONFIG8_XBINS1 1257
#define EEPROM_CONFIG8_YBINS1 1201 #define EEPROM_CONFIG8_YBINS1 1265
#define EEPROM_CONFIG8_XSIZE2 1209 #define EEPROM_CONFIG8_XSIZE2 1273
#define EEPROM_CONFIG8_YSIZE2 1210 #define EEPROM_CONFIG8_YSIZE2 1274
#define EEPROM_CONFIG8_MAP2 1211 #define EEPROM_CONFIG8_MAP2 1275
#define EEPROM_CONFIG8_XBINS2 1275 #define EEPROM_CONFIG8_XBINS2 1339
#define EEPROM_CONFIG8_YBINS2 1283 #define EEPROM_CONFIG8_YBINS2 1347
#define EEPROM_CONFIG8_END 1291 #define EEPROM_CONFIG8_END 1355
#define EEPROM_CONFIG9_XSIZE1 1291 #define EEPROM_CONFIG9_XSIZE1 1355
#define EEPROM_CONFIG9_YSIZE1 1292 #define EEPROM_CONFIG9_YSIZE1 1356
#define EEPROM_CONFIG9_MAP1 1293 #define EEPROM_CONFIG9_MAP1 1357
#define EEPROM_CONFIG9_XBINS1 1329 #define EEPROM_CONFIG9_XBINS1 1393
#define EEPROM_CONFIG9_YBINS1 1335 #define EEPROM_CONFIG9_YBINS1 1399
#define EEPROM_CONFIG9_XSIZE2 1341 #define EEPROM_CONFIG9_XSIZE2 1405
#define EEPROM_CONFIG9_YSIZE2 1342 #define EEPROM_CONFIG9_YSIZE2 1406
#define EEPROM_CONFIG9_MAP2 1343 #define EEPROM_CONFIG9_MAP2 1407
#define EEPROM_CONFIG9_XBINS2 1379 #define EEPROM_CONFIG9_XBINS2 1443
#define EEPROM_CONFIG9_YBINS2 1385 #define EEPROM_CONFIG9_YBINS2 1449
#define EEPROM_CONFIG9_XSIZE3 1391 #define EEPROM_CONFIG9_XSIZE3 1455
#define EEPROM_CONFIG9_YSIZE3 1392 #define EEPROM_CONFIG9_YSIZE3 1456
#define EEPROM_CONFIG9_MAP3 1393 #define EEPROM_CONFIG9_MAP3 1457
#define EEPROM_CONFIG9_XBINS3 1429 #define EEPROM_CONFIG9_XBINS3 1493
#define EEPROM_CONFIG9_YBINS3 1435 #define EEPROM_CONFIG9_YBINS3 1499
#define EEPROM_CONFIG9_XSIZE4 1441 #define EEPROM_CONFIG9_XSIZE4 1505
#define EEPROM_CONFIG9_YSIZE4 1442 #define EEPROM_CONFIG9_YSIZE4 1506
#define EEPROM_CONFIG9_MAP4 1443 #define EEPROM_CONFIG9_MAP4 1507
#define EEPROM_CONFIG9_XBINS4 1479 #define EEPROM_CONFIG9_XBINS4 1543
#define EEPROM_CONFIG9_YBINS4 1485 #define EEPROM_CONFIG9_YBINS4 1549
#define EEPROM_CONFIG10_START 1500 #define EEPROM_CONFIG10_START 1564
#define EEPROM_CONFIG10_END 1628 #define EEPROM_CONFIG10_END 1692
#define EEPROM_CONFIG11_START 1628 #define EEPROM_CONFIG11_START 1692
#define EEPROM_CONFIG11_END 1820 #define EEPROM_CONFIG11_END 1884
//Calibration data is stored at the end of the EEPROM (This is in case any further calibration tables are needed as they are large blocks) //Calibration data is stored at the end of the EEPROM (This is in case any further calibration tables are needed as they are large blocks)
#define EEPROM_LAST_BARO 2558 #define EEPROM_LAST_BARO 2558