From 4d4b2a87f7dfb4c82dbb09246091d2a8d507a71a Mon Sep 17 00:00:00 2001 From: Josh Stewart Date: Wed, 6 Dec 2023 13:39:32 +1100 Subject: [PATCH] Disable ADC ISR after each full cycle and re-enable every 5ms (200Hz) --- speeduino/globals.h | 1 + speeduino/sensors.cpp | 2 ++ speeduino/speeduino.ino | 5 +++++ speeduino/timers.cpp | 21 ++++++++++++++++++++- 4 files changed, 28 insertions(+), 1 deletion(-) diff --git a/speeduino/globals.h b/speeduino/globals.h index d72ba1d2..0546455c 100644 --- a/speeduino/globals.h +++ b/speeduino/globals.h @@ -176,6 +176,7 @@ #define BIT_TIMER_10HZ 2 #define BIT_TIMER_15HZ 3 #define BIT_TIMER_30HZ 4 +#define BIT_TIMER_200HZ 6 #define BIT_TIMER_1KHZ 7 #define BIT_STATUS3_RESET_PREVENT 0 //Indicates whether reset prevention is enabled diff --git a/speeduino/sensors.cpp b/speeduino/sensors.cpp index 78645c9b..93d98382 100644 --- a/speeduino/sensors.cpp +++ b/speeduino/sensors.cpp @@ -64,6 +64,8 @@ ISR(ADC_vect) { ADMUX = ADMUX_DEFAULT_CONFIG; //channel 0 ADCSRB = 0x00; //clear MUX5 bit + + BIT_CLEAR(ADCSRA,ADIE); //Disable interrupt as we're at the end of a full ADC cycle. This will be re-enabled in the main loop } else if (nChannel == 7) //channel 7 { diff --git a/speeduino/speeduino.ino b/speeduino/speeduino.ino index 1347095e..ec532194 100644 --- a/speeduino/speeduino.ino +++ b/speeduino/speeduino.ino @@ -197,6 +197,11 @@ void loop(void) BIT_CLEAR(TIMER_mask, BIT_TIMER_1KHZ); readMAP(); } + if(BIT_CHECK(LOOP_TIMER, BIT_TIMER_200HZ)) + { + BIT_CLEAR(TIMER_mask, BIT_TIMER_200HZ); + BIT_SET(ADCSRA,ADIE); //Enable ADC + } if (BIT_CHECK(LOOP_TIMER, BIT_TIMER_15HZ)) //Every 32 loops { diff --git a/speeduino/timers.cpp b/speeduino/timers.cpp index 65d7ab2f..35a0426a 100644 --- a/speeduino/timers.cpp +++ b/speeduino/timers.cpp @@ -26,6 +26,7 @@ Timers are typically low resolution (Compared to Schedulers), with maximum frequ #endif volatile uint16_t lastRPM_100ms; //Need to record this for rpmDOT calculation +volatile byte loop5ms; volatile byte loop33ms; volatile byte loop66ms; volatile byte loop100ms; @@ -51,6 +52,7 @@ volatile uint8_t testIgnitionPulseCount = 0; void initialiseTimers(void) { lastRPM_100ms = 0; + loop5ms = 0; loop33ms = 0; loop66ms = 0; loop100ms = 0; @@ -79,6 +81,7 @@ void oneMSInterval(void) //Most ARM chips can simply call a function ms_counter++; //Increment Loop Counters + loop5ms++; loop33ms++; loop66ms++; loop100ms++; @@ -88,12 +91,21 @@ void oneMSInterval(void) //Most ARM chips can simply call a function //Overdwell check uint32_t targetOverdwellTime = micros() - dwellLimit_uS; //Set a target time in the past that all coil charging must have begun after. If the coil charge began before this time, it's been running too long bool isCrankLocked = configPage4.ignCranklock && (currentStatus.RPM < currentStatus.crankRPM); //Dwell limiter is disabled during cranking on setups using the locked cranking timing. WE HAVE to do the RPM check here as relying on the engine cranking bit can be potentially too slow in updating - if ((configPage4.useDwellLim == 1) && (isCrankLocked != true)) { + if ((configPage4.useDwellLim == 1) && (isCrankLocked != true)) + { applyOverDwellCheck(ignitionSchedule1, targetOverdwellTime); +#if IGN_CHANNELS >= 2 applyOverDwellCheck(ignitionSchedule2, targetOverdwellTime); +#endif +#if IGN_CHANNELS >= 3 applyOverDwellCheck(ignitionSchedule3, targetOverdwellTime); +#endif +#if IGN_CHANNELS >= 4 applyOverDwellCheck(ignitionSchedule4, targetOverdwellTime); +#endif +#if IGN_CHANNELS >= 5 applyOverDwellCheck(ignitionSchedule5, targetOverdwellTime); +#endif #if IGN_CHANNELS >= 6 applyOverDwellCheck(ignitionSchedule6, targetOverdwellTime); #endif @@ -152,6 +164,13 @@ void oneMSInterval(void) //Most ARM chips can simply call a function TACHO_PULSE_HIGH(); tachoOutputFlag = TACHO_INACTIVE; } + } + + //200Hz loop + if (loop5ms == 5) + { + loop5ms = 0; //Reset counter + BIT_SET(TIMER_mask, BIT_TIMER_200HZ); } //30Hz loop