working on stm32F407, sequential setting not completly correct yet
This commit is contained in:
hoogendijkta
parent
cc6d3e4147
commit
8577ef0a15
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@ -2,61 +2,88 @@
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#define STM32_H
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#if defined(CORE_STM32) && !defined(ARDUINO_BLACK_F407VE)
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#if defined(STM32F4)
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//These should really be in the stm32GENERIC libs, but for somereason they only have timers 1-4
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// #include <stm32_TIM_variant_11.h>
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// #include "src/HardwareTimers/HardwareTimer.h"
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// HardwareTimer Timer5(TIM5, chip_tim5, sizeof(chip_tim5) / sizeof(chip_tim5[0]));
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// HardwareTimer Timer8(TIM8, chip_tim8, sizeof(chip_tim8) / sizeof(chip_tim8[0]));
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#else
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#include "HardwareTimer.h"
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#endif
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/*
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***********************************************************************************************************
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* General
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*/
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#define PORT_TYPE uint8_t
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#define micros_safe() micros() //timer5 method is not used on anything but AVR, the micros_safe() macro is simply an alias for the normal micros()
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#define USE_SERIAL3
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void initBoard();
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uint16_t freeRam();
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// extern void oneMSIntervalIRQ(stimer_t *Timer);
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extern void EmptyIRQCallback(stimer_t *Timer, uint32_t channel);
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#if defined(USE_STM32GENERIC)
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#define Serial Serial1
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#endif
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/*
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//Much of the below is not correct, but included to allow compilation
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//STM32F1/variants/.../board.cpp
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#if defined (STM32F4)
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#define A0 PA0
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#define A1 PA1
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#define A2 PA2
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#define A3 PA3
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#define A4 PA4
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#define A5 PA5
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#define A6 PA6
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#define A7 PA7
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#define A8 PB0
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#define A9 PB1
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#define A10 PC0
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#define A11 PC1
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#define A12 PC2
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#define A13 PC3
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#define A14 PC4
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#define A15 PC5
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#else
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#define A0 PB0
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#define A1 PA7
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#define A2 PA6
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#define A3 PA5
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#define A4 PA4
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#define A5 PA3
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#define A6 PA2
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#define A7 PA1
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#define A8 PA0
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//STM32F1 have only 9 12bit adc
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#define A9 PB0
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#define A10 PA7
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#define A11 PA6
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#define A12 PA5
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#define A13 PA4
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#define A14 PA3
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#define A15 PA2
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#endif
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/*
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***********************************************************************************************************
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* Schedules
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*/
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#define MAX_TIMER_PERIOD 65535 //The longest period of time (in uS) that the timer can permit (IN this case it is 65535 * 2, as each timer tick is 2uS)
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#define MAX_TIMER_PERIOD_SLOW 65535 //The longest period of time (in uS) that the timer can permit (IN this case it is 65535 * 2, as each timer tick is 2uS)
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#define uS_TO_TIMER_COMPARE(uS) (uS ) //Converts a given number of uS into the required number of timer ticks until that time has passed.
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#define uS_TO_TIMER_COMPARE_SLOW(uS) (uS ) //Converts a given number of uS into the required number of timer ticks until that time has passed.
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#define MAX_TIMER_PERIOD 131070 //The longest period of time (in uS) that the timer can permit (IN this case it is 65535 * 2, as each timer tick is 2uS)
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#define MAX_TIMER_PERIOD_SLOW 131070 //The longest period of time (in uS) that the timer can permit (IN this case it is 65535 * 2, as each timer tick is 2uS)
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#define uS_TO_TIMER_COMPARE(uS) (uS >> 1) //Converts a given number of uS into the required number of timer ticks until that time has passed.
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#define uS_TO_TIMER_COMPARE_SLOW(uS) (uS >> 1) //Converts a given number of uS into the required number of timer ticks until that time has passed.
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#if defined(ARDUINO_ARCH_STM32) // STM32GENERIC core
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#define FUEL1_COUNTER (TIM2)->CNT
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#define FUEL2_COUNTER (TIM2)->CNT
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#define FUEL3_COUNTER (TIM2)->CNT
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#define FUEL4_COUNTER (TIM2)->CNT
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#define FUEL1_COUNTER (TIM3)->CNT
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#define FUEL2_COUNTER (TIM3)->CNT
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#define FUEL3_COUNTER (TIM3)->CNT
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#define FUEL4_COUNTER (TIM3)->CNT
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#define FUEL1_COMPARE (TIM2)->CCR1
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#define FUEL2_COMPARE (TIM2)->CCR2
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#define FUEL3_COMPARE (TIM2)->CCR3
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#define FUEL4_COMPARE (TIM2)->CCR4
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#define FUEL1_COMPARE (TIM3)->CCR1
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#define FUEL2_COMPARE (TIM3)->CCR2
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#define FUEL3_COMPARE (TIM3)->CCR3
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#define FUEL4_COMPARE (TIM3)->CCR4
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#define IGN1_COUNTER (TIM3)->CNT
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#define IGN2_COUNTER (TIM3)->CNT
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#define IGN3_COUNTER (TIM3)->CNT
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#define IGN4_COUNTER (TIM3)->CNT
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#define IGN1_COUNTER (TIM2)->CNT
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#define IGN2_COUNTER (TIM2)->CNT
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#define IGN3_COUNTER (TIM2)->CNT
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#define IGN4_COUNTER (TIM2)->CNT
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#define IGN1_COMPARE (TIM2)->CCR1
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#define IGN2_COMPARE (TIM2)->CCR2
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#define IGN3_COMPARE (TIM2)->CCR3
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#define IGN4_COMPARE (TIM2)->CCR4
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#define IGN1_COMPARE (TIM3)->CCR1
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#define IGN2_COMPARE (TIM3)->CCR2
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#define IGN3_COMPARE (TIM3)->CCR3
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#define IGN4_COMPARE (TIM3)->CCR4
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#ifndef SMALL_FLASH_MODE
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#define FUEL5_COUNTER (TIM5)->CNT
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@ -78,27 +105,27 @@
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#define IGN6_COMPARE (TIM4)->CCR2
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#define IGN7_COMPARE (TIM4)->CCR3
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#define IGN8_COMPARE (TIM4)->CCR4
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#endif
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#endif
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//https://github.com/rogerclarkmelbourne/Arduino_STM32/blob/754bc2969921f1ef262bd69e7faca80b19db7524/STM32F1/system/libmaple/include/libmaple/timer.h#L444
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#define FUEL1_TIMER_ENABLE() (TIM3)->CCER |= TIM_CCER_CC1E
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#define FUEL2_TIMER_ENABLE() (TIM3)->CCER |= TIM_CCER_CC2E
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#define FUEL3_TIMER_ENABLE() (TIM3)->CCER |= TIM_CCER_CC3E
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#define FUEL4_TIMER_ENABLE() (TIM3)->CCER |= TIM_CCER_CC4E
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#define FUEL1_TIMER_ENABLE() (TIM2)->CCER |= TIM_CCER_CC1E
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#define FUEL2_TIMER_ENABLE() (TIM2)->CCER |= TIM_CCER_CC2E
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#define FUEL3_TIMER_ENABLE() (TIM2)->CCER |= TIM_CCER_CC3E
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#define FUEL4_TIMER_ENABLE() (TIM2)->CCER |= TIM_CCER_CC4E
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#define FUEL1_TIMER_DISABLE() (TIM3)->CCER &= ~TIM_CCER_CC1E
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#define FUEL2_TIMER_DISABLE() (TIM3)->CCER &= ~TIM_CCER_CC2E
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#define FUEL3_TIMER_DISABLE() (TIM3)->CCER &= ~TIM_CCER_CC3E
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#define FUEL4_TIMER_DISABLE() (TIM3)->CCER &= ~TIM_CCER_CC4E
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#define FUEL1_TIMER_DISABLE() (TIM2)->CCER &= ~TIM_CCER_CC1E
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#define FUEL2_TIMER_DISABLE() (TIM2)->CCER &= ~TIM_CCER_CC2E
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#define FUEL3_TIMER_DISABLE() (TIM2)->CCER &= ~TIM_CCER_CC3E
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#define FUEL4_TIMER_DISABLE() (TIM2)->CCER &= ~TIM_CCER_CC4E
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#define IGN1_TIMER_ENABLE() (TIM2)->CCER |= TIM_CCER_CC1E
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#define IGN2_TIMER_ENABLE() (TIM2)->CCER |= TIM_CCER_CC2E
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#define IGN3_TIMER_ENABLE() (TIM2)->CCER |= TIM_CCER_CC3E
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#define IGN4_TIMER_ENABLE() (TIM2)->CCER |= TIM_CCER_CC4E
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#define IGN1_TIMER_ENABLE() (TIM3)->CCER |= TIM_CCER_CC1E
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#define IGN2_TIMER_ENABLE() (TIM3)->CCER |= TIM_CCER_CC2E
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#define IGN3_TIMER_ENABLE() (TIM3)->CCER |= TIM_CCER_CC3E
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#define IGN4_TIMER_ENABLE() (TIM3)->CCER |= TIM_CCER_CC4E
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#define IGN1_TIMER_DISABLE() (TIM2)->CCER &= ~TIM_CCER_CC1E
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#define IGN2_TIMER_DISABLE() (TIM2)->CCER &= ~TIM_CCER_CC2E
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#define IGN3_TIMER_DISABLE() (TIM2)->CCER &= ~TIM_CCER_CC3E
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#define IGN4_TIMER_DISABLE() (TIM2)->CCER &= ~TIM_CCER_CC4E
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#define IGN1_TIMER_DISABLE() (TIM3)->CCER &= ~TIM_CCER_CC1E
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#define IGN2_TIMER_DISABLE() (TIM3)->CCER &= ~TIM_CCER_CC2E
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#define IGN3_TIMER_DISABLE() (TIM3)->CCER &= ~TIM_CCER_CC3E
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#define IGN4_TIMER_DISABLE() (TIM3)->CCER &= ~TIM_CCER_CC4E
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#ifndef SMALL_FLASH_MODE
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#define FUEL5_TIMER_ENABLE() (TIM5)->CCER |= TIM_CCER_CC1E
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@ -121,8 +148,91 @@
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#define IGN7_TIMER_DISABLE() (TIM4)->CCER &= ~TIM_CCER_CC3E
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#define IGN8_TIMER_DISABLE() (TIM4)->CCER &= ~TIM_CCER_CC4E
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#endif
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#else //libmaple core aka STM32DUINO
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#define FUEL1_COUNTER (TIMER2->regs).gen->CNT
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#define FUEL2_COUNTER (TIMER2->regs).gen->CNT
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#define FUEL3_COUNTER (TIMER2->regs).gen->CNT
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#define FUEL4_COUNTER (TIMER2->regs).gen->CNT
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#define FUEL1_COMPARE (TIMER2->regs).gen->CCR1
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#define FUEL2_COMPARE (TIMER2->regs).gen->CCR2
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#define FUEL3_COMPARE (TIMER2->regs).gen->CCR3
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#define FUEL4_COMPARE (TIMER2->regs).gen->CCR4
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#define IGN1_COUNTER (TIMER3->regs).gen->CNT
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#define IGN2_COUNTER (TIMER3->regs).gen->CNT
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#define IGN3_COUNTER (TIMER3->regs).gen->CNT
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#define IGN4_COUNTER (TIMER3->regs).gen->CNT
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#define IGN1_COMPARE (TIMER3->regs).gen->CCR1
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#define IGN2_COMPARE (TIMER3->regs).gen->CCR2
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#define IGN3_COMPARE (TIMER3->regs).gen->CCR3
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#define IGN4_COMPARE (TIMER3->regs).gen->CCR4
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#ifndef SMALL_FLASH_MODE
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#define FUEL5_COUNTER (TIMER5->regs).gen->CNT
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#define FUEL6_COUNTER (TIMER5->regs).gen->CNT
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#define FUEL7_COUNTER (TIMER5->regs).gen->CNT
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#define FUEL8_COUNTER (TIMER5->regs).gen->CNT
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#define FUEL5_COMPARE (TIMER5->regs).gen->CCR1
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#define FUEL6_COMPARE (TIMER5->regs).gen->CCR2
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#define FUEL7_COMPARE (TIMER5->regs).gen->CCR3
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#define FUEL8_COMPARE (TIMER5->regs).gen->CCR4
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#define IGN5_COUNTER (TIMER4->regs).gen->CNT
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#define IGN6_COUNTER (TIMER4->regs).gen->CNT
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#define IGN7_COUNTER (TIMER4->regs).gen->CNT
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#define IGN8_COUNTER (TIMER4->regs).gen->CNT
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#define IGN5_COMPARE (TIMER4->regs).gen->CCR1
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#define IGN6_COMPARE (TIMER4->regs).gen->CCR2
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#define IGN7_COMPARE (TIMER4->regs).gen->CCR3
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#define IGN8_COMPARE (TIMER4->regs).gen->CCR4
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#endif
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//https://github.com/rogerclarkmelbourne/Arduino_STM32/blob/754bc2969921f1ef262bd69e7faca80b19db7524/STM32F1/system/libmaple/include/libmaple/timer.h#L444
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#define FUEL1_TIMER_ENABLE() (TIMER2->regs).gen->CCER |= TIMER_CCER_CC1E
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#define FUEL2_TIMER_ENABLE() (TIMER2->regs).gen->CCER |= TIMER_CCER_CC2E
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#define FUEL3_TIMER_ENABLE() (TIMER2->regs).gen->CCER |= TIMER_CCER_CC3E
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#define FUEL4_TIMER_ENABLE() (TIMER2->regs).gen->CCER |= TIMER_CCER_CC4E
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#define FUEL1_TIMER_DISABLE() (TIMER2->regs).gen->CCER &= ~TIMER_CCER_CC1E
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#define FUEL2_TIMER_DISABLE() (TIMER2->regs).gen->CCER &= ~TIMER_CCER_CC2E
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#define FUEL3_TIMER_DISABLE() (TIMER2->regs).gen->CCER &= ~TIMER_CCER_CC3E
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#define FUEL4_TIMER_DISABLE() (TIMER2->regs).gen->CCER &= ~TIMER_CCER_CC4E
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#define IGN1_TIMER_DISABLE() (TIMER3->regs).gen->CCER &= ~TIMER_CCER_CC1E
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#define IGN2_TIMER_DISABLE() (TIMER3->regs).gen->CCER &= ~TIMER_CCER_CC2E
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#define IGN3_TIMER_DISABLE() (TIMER3->regs).gen->CCER &= ~TIMER_CCER_CC3E
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#define IGN4_TIMER_DISABLE() (TIMER3->regs).gen->CCER &= ~TIMER_CCER_CC4E
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#define IGN1_TIMER_ENABLE() (TIMER3->regs).gen->CCER |= TIMER_CCER_CC1E
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#define IGN2_TIMER_ENABLE() (TIMER3->regs).gen->CCER |= TIMER_CCER_CC2E
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#define IGN3_TIMER_ENABLE() (TIMER3->regs).gen->CCER |= TIMER_CCER_CC3E
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#define IGN4_TIMER_ENABLE() (TIMER3->regs).gen->CCER |= TIMER_CCER_CC4E
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#ifndef SMALL_FLASH_MODE
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#define FUEL5_TIMER_ENABLE() (TIMER5->regs).gen->CCER |= TIMER_CCER_CC1E
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#define FUEL6_TIMER_ENABLE() (TIMER5->regs).gen->CCER |= TIMER_CCER_CC2E
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#define FUEL7_TIMER_ENABLE() (TIMER5->regs).gen->CCER |= TIMER_CCER_CC3E
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#define FUEL8_TIMER_ENABLE() (TIMER5->regs).gen->CCER |= TIMER_CCER_CC4E
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#define IGN5_TIMER_ENABLE() (TIMER4->regs).gen->CCER |= TIMER_CCER_CC1E
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#define IGN6_TIMER_ENABLE() (TIMER4->regs).gen->CCER |= TIMER_CCER_CC2E
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#define IGN7_TIMER_ENABLE() (TIMER4->regs).gen->CCER |= TIMER_CCER_CC3E
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#define IGN8_TIMER_ENABLE() (TIMER4->regs).gen->CCER |= TIMER_CCER_CC4E
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#define FUEL5_TIMER_DISABLE() (TIMER5->regs).gen->CCER &= ~TIMER_CCER_CC1E
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#define FUEL6_TIMER_DISABLE() (TIMER5->regs).gen->CCER &= ~TIMER_CCER_CC2E
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#define FUEL7_TIMER_DISABLE() (TIMER5->regs).gen->CCER &= ~TIMER_CCER_CC3E
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#define FUEL8_TIMER_DISABLE() (TIMER5->regs).gen->CCER &= ~TIMER_CCER_CC4E
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#define IGN5_TIMER_DISABLE() (TIMER4->regs).gen->CCER &= ~TIMER_CCER_CC1E
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#define IGN6_TIMER_DISABLE() (TIMER4->regs).gen->CCER &= ~TIMER_CCER_CC2E
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#define IGN7_TIMER_DISABLE() (TIMER4->regs).gen->CCER &= ~TIMER_CCER_CC3E
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#define IGN8_TIMER_DISABLE() (TIMER4->regs).gen->CCER &= ~TIMER_CCER_CC4E
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#endif
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#endif
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/*
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***********************************************************************************************************
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@ -182,4 +292,4 @@
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*/
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#endif //CORE_STM32
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#endif //STM32_H
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#endif //STM32_H
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@ -4,51 +4,22 @@
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#include "auxiliaries.h"
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#include "idle.h"
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#include "scheduler.h"
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#include "HardwareTimer.h"
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#if defined(STM32F4)
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#define NR_OFF_TIMERS 9
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//stimer_t HardwareTimers[NR_OFF_TIMERS + 1];
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stimer_t HardwareTimers_1;
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stimer_t HardwareTimers_2;
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stimer_t HardwareTimers_3;
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stimer_t HardwareTimers_4;
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stimer_t HardwareTimers_5;
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stimer_t HardwareTimers_8;
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#define LED_BUILTIN PA7
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//These should really be in the stm32GENERIC libs, but for somereason they only have timers 1-4
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// #include <stm32_TIM_variant_11.h>
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// #include "src/HardwareTimers/HardwareTimer.h"
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// HardwareTimer Timer5(TIM5, chip_tim5, sizeof(chip_tim5) / sizeof(chip_tim5[0]));
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// HardwareTimer Timer8(TIM8, chip_tim8, sizeof(chip_tim8) / sizeof(chip_tim8[0]));
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#else
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#include "HardwareTimer.h"
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#include <stm32_TIM_variant_11.h>
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HardwareTimer Timer5(TIM5, chip_tim5, sizeof(chip_tim5) / sizeof(chip_tim5[0]));
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HardwareTimer Timer8(TIM8, chip_tim8, sizeof(chip_tim8) / sizeof(chip_tim8[0]));
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#endif
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extern void oneMSIntervalIRQ(stimer_t *Timer){oneMSInterval();}
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extern void EmptyIRQCallback(stimer_t *Timer, uint32_t channel){}
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void initBoard()
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{
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/*
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* Initialize timers
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*/
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HardwareTimers_1.timer = TIM1;
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HardwareTimers_2.timer = TIM2;
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HardwareTimers_3.timer = TIM3;
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HardwareTimers_4.timer = TIM4;
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HardwareTimers_5.timer = TIM5;
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HardwareTimers_8.timer = TIM8;
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/*
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***********************************************************************************************************
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* General
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*/
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#define FLASH_LENGTH 8192
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#define FLASH_LENGTH 8192
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/*
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***********************************************************************************************************
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@ -60,13 +31,10 @@ void initBoard()
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}
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//This must happen at the end of the idle init
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TimerPulseInit(&HardwareTimers_1, 0xFFFF, 0, EmptyIRQCallback);
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setTimerPrescalerRegister(&HardwareTimers_1, (uint32_t)(getTimerClkFreq(HardwareTimers_1.timer) / (500000)) - 1);
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if(idle_pwm_max_count > 0) { attachIntHandleOC(&HardwareTimers_1, idleInterrupt, 4, 0);} //on first flash the configPage4.iacAlgorithm is invalid
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//Timer1.setMode(4, TIMER_OUTPUT_COMPARE);
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Timer1.setMode(4, TIMER_OUTPUT_COMPARE);
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//timer_set_mode(TIMER1, 4, TIMER_OUTPUT_COMPARE;
|
||||
//if(idle_pwm_max_count > 0) { Timer1.attachInterrupt(4, idleInterrupt);} //on first flash the configPage4.iacAlgorithm is invalid
|
||||
//Timer1.resume();
|
||||
if(idle_pwm_max_count > 0) { Timer1.attachInterrupt(4, idleInterrupt);} //on first flash the configPage4.iacAlgorithm is invalid
|
||||
Timer1.resume();
|
||||
|
||||
|
||||
/*
|
||||
|
|
@ -74,8 +42,10 @@ void initBoard()
|
|||
* Timers
|
||||
*/
|
||||
#if defined(ARDUINO_BLACK_F407VE) || defined(STM32F4) || defined(_STM32F4_)
|
||||
TimerHandleInit(&HardwareTimers_8, 1000, 168);
|
||||
attachIntHandle(&HardwareTimers_8, oneMSIntervalIRQ);
|
||||
Timer8.setPeriod(1000); // Set up period
|
||||
Timer8.setMode(1, TIMER_OUTPUT_COMPARE);
|
||||
Timer8.attachInterrupt(1, oneMSInterval);
|
||||
Timer8.resume(); //Start Timer
|
||||
#else
|
||||
Timer4.setPeriod(1000); // Set up period
|
||||
Timer4.setMode(1, TIMER_OUTPUT_COMPARE);
|
||||
|
|
@ -93,69 +63,102 @@ void initBoard()
|
|||
vvt_pwm_max_count = 1000000L / (2 * configPage6.vvtFreq * 2); //Converts the frequency in Hz to the number of ticks (at 2uS) it takes to complete 1 cycle
|
||||
|
||||
//Need to be initialised last due to instant interrupt
|
||||
// Timer1.setMode(2, TIMER_OUTPUT_COMPARE);
|
||||
// Timer1.setMode(3, TIMER_OUTPUT_COMPARE);
|
||||
// if(boost_pwm_max_count > 0) { Timer1.attachInterrupt(2, boostInterrupt);}
|
||||
// if(vvt_pwm_max_count > 0) { Timer1.attachInterrupt(3, vvtInterrupt);}
|
||||
if(idle_pwm_max_count > 0) { attachIntHandleOC(&HardwareTimers_1, boostInterrupt, 2, 0);}
|
||||
if(vvt_pwm_max_count > 0) { attachIntHandleOC(&HardwareTimers_1, vvtInterrupt, 3, 0);}
|
||||
// Timer1.resume();
|
||||
|
||||
TimerPulseInit(&HardwareTimers_3, 0xFFFF, 0, EmptyIRQCallback);
|
||||
setTimerPrescalerRegister(&HardwareTimers_3, (uint32_t)(getTimerClkFreq(HardwareTimers_3.timer) / (1000000)) - 1);
|
||||
attachIntHandleOC(&HardwareTimers_3, fuelSchedule1Interrupt, 1, 0);
|
||||
attachIntHandleOC(&HardwareTimers_3, fuelSchedule2Interrupt, 2, 0);
|
||||
attachIntHandleOC(&HardwareTimers_3, fuelSchedule3Interrupt, 3, 0);
|
||||
attachIntHandleOC(&HardwareTimers_3, fuelSchedule4Interrupt, 4, 0);
|
||||
Timer1.setMode(2, TIMER_OUTPUT_COMPARE);
|
||||
Timer1.setMode(3, TIMER_OUTPUT_COMPARE);
|
||||
if(boost_pwm_max_count > 0) { Timer1.attachInterrupt(2, boostInterrupt);}
|
||||
if(vvt_pwm_max_count > 0) { Timer1.attachInterrupt(3, vvtInterrupt);}
|
||||
Timer1.resume();
|
||||
|
||||
/*
|
||||
***********************************************************************************************************
|
||||
* Schedules
|
||||
*/
|
||||
#if defined(ARDUINO_ARCH_STM32) // STM32GENERIC core
|
||||
//see https://github.com/rogerclarkmelbourne/Arduino_STM32/blob/754bc2969921f1ef262bd69e7faca80b19db7524/STM32F1/system/libmaple/include/libmaple/timer.h#L444
|
||||
Timer1.setPrescaleFactor((HAL_RCC_GetHCLKFreq() * 2U)-1); //2us resolution
|
||||
Timer2.setPrescaleFactor((HAL_RCC_GetHCLKFreq() * 2U)-1); //2us resolution
|
||||
Timer3.setPrescaleFactor((HAL_RCC_GetHCLKFreq() * 2U)-1); //2us resolution
|
||||
#else //libmaple core aka STM32DUINO
|
||||
//see https://github.com/rogerclarkmelbourne/Arduino_STM32/blob/754bc2969921f1ef262bd69e7faca80b19db7524/STM32F1/system/libmaple/include/libmaple/timer.h#L444
|
||||
#if defined (STM32F1) || defined(__STM32F1__)
|
||||
//(CYCLES_PER_MICROSECOND == 72, APB2 at 72MHz, APB1 at 36MHz).
|
||||
//Timer2 to 4 is on APB1, Timer1 on APB2. http://www.st.com/resource/en/datasheet/stm32f103cb.pdf sheet 12
|
||||
Timer1.setPrescaleFactor((72 * 2U)-1); //2us resolution
|
||||
Timer2.setPrescaleFactor((36 * 2U)-1); //2us resolution
|
||||
Timer3.setPrescaleFactor((36 * 2U)-1); //2us resolution
|
||||
#elif defined(STM32F4)
|
||||
//(CYCLES_PER_MICROSECOND == 168, APB2 at 84MHz, APB1 at 42MHz).
|
||||
//Timer2 to 14 is on APB1, Timers 1, 8, 9 and 10 on APB2. http://www.st.com/resource/en/datasheet/stm32f407vg.pdf sheet 120
|
||||
Timer1.setPrescaleFactor((84 * 2U)-1); //2us resolution
|
||||
Timer2.setPrescaleFactor((42 * 2U)-1); //2us resolution
|
||||
Timer3.setPrescaleFactor((42 * 2U)-1); //2us resolution
|
||||
#endif
|
||||
#endif
|
||||
Timer2.setMode(1, TIMER_OUTPUT_COMPARE);
|
||||
Timer2.setMode(2, TIMER_OUTPUT_COMPARE);
|
||||
Timer2.setMode(3, TIMER_OUTPUT_COMPARE);
|
||||
Timer2.setMode(4, TIMER_OUTPUT_COMPARE);
|
||||
|
||||
Timer3.setMode(1, TIMER_OUTPUT_COMPARE);
|
||||
Timer3.setMode(2, TIMER_OUTPUT_COMPARE);
|
||||
Timer3.setMode(3, TIMER_OUTPUT_COMPARE);
|
||||
Timer3.setMode(4, TIMER_OUTPUT_COMPARE);
|
||||
Timer1.setMode(1, TIMER_OUTPUT_COMPARE);
|
||||
|
||||
TimerPulseInit(&HardwareTimers_2, 0xFFFF, 0, EmptyIRQCallback);
|
||||
setTimerPrescalerRegister(&HardwareTimers_2, (uint32_t)(getTimerClkFreq(HardwareTimers_2.timer) / (1000000)) - 1);
|
||||
attachIntHandleOC(&HardwareTimers_2, ignitionSchedule1Interrupt, 1, 0);
|
||||
attachIntHandleOC(&HardwareTimers_2, ignitionSchedule2Interrupt, 2, 0);
|
||||
attachIntHandleOC(&HardwareTimers_2, ignitionSchedule3Interrupt, 3, 0);
|
||||
attachIntHandleOC(&HardwareTimers_2, ignitionSchedule4Interrupt, 4, 0);
|
||||
|
||||
//Attach interupt functions
|
||||
//Injection
|
||||
|
||||
TimerPulseInit(&HardwareTimers_5, 0xFFFF, 0, EmptyIRQCallback);
|
||||
setTimerPrescalerRegister(&HardwareTimers_5, (uint32_t)(getTimerClkFreq(HardwareTimers_5.timer) / (1000000)) - 1);
|
||||
Timer2.attachInterrupt(1, fuelSchedule1Interrupt);
|
||||
Timer2.attachInterrupt(2, fuelSchedule2Interrupt);
|
||||
Timer2.attachInterrupt(3, fuelSchedule3Interrupt);
|
||||
Timer2.attachInterrupt(4, fuelSchedule4Interrupt);
|
||||
#if (INJ_CHANNELS >= 5)
|
||||
attachIntHandleOC(&HardwareTimers_5, fuelSchedule5Interrupt, 1, 0);
|
||||
//Timer5.attachInterrupt(1, fuelSchedule5Interrupt);
|
||||
Timer5.attachInterrupt(1, fuelSchedule5Interrupt);
|
||||
#endif
|
||||
#if (INJ_CHANNELS >= 6)
|
||||
attachIntHandleOC(&HardwareTimers_5, fuelSchedule6Interrupt, 2, 0);
|
||||
//Timer5.attachInterrupt(2, fuelSchedule6Interrupt);
|
||||
Timer5.attachInterrupt(2, fuelSchedule6Interrupt);
|
||||
#endif
|
||||
#if (INJ_CHANNELS >= 7)
|
||||
attachIntHandleOC(&HardwareTimers_5, fuelSchedule7Interrupt, 3, 0);
|
||||
//Timer5.attachInterrupt(3, fuelSchedule7Interrupt);
|
||||
Timer5.attachInterrupt(3, fuelSchedule7Interrupt);
|
||||
#endif
|
||||
#if (INJ_CHANNELS >= 8)
|
||||
attachIntHandleOC(&HardwareTimers_5, fuelSchedule8Interrupt, 4, 0);
|
||||
//Timer5.attachInterrupt(4, fuelSchedule8Interrupt);
|
||||
Timer5.attachInterrupt(4, fuelSchedule8Interrupt);
|
||||
#endif
|
||||
|
||||
TimerPulseInit(&HardwareTimers_4, 0xFFFF, 0, EmptyIRQCallback);
|
||||
setTimerPrescalerRegister(&HardwareTimers_4, (uint32_t)(getTimerClkFreq(HardwareTimers_4.timer) / (1000000)) - 1);
|
||||
//Ignition
|
||||
#if (IGN_CHANNELS >= 1)
|
||||
Timer3.attachInterrupt(1, ignitionSchedule1Interrupt);
|
||||
#endif
|
||||
#if (IGN_CHANNELS >= 2)
|
||||
Timer3.attachInterrupt(2, ignitionSchedule2Interrupt);
|
||||
#endif
|
||||
#if (IGN_CHANNELS >= 3)
|
||||
Timer3.attachInterrupt(3, ignitionSchedule3Interrupt);
|
||||
#endif
|
||||
#if (IGN_CHANNELS >= 4)
|
||||
Timer3.attachInterrupt(4, ignitionSchedule4Interrupt);
|
||||
#endif
|
||||
#if (IGN_CHANNELS >= 5)
|
||||
attachIntHandleOC(&HardwareTimers_4, ignitionSchedule5Interrupt, 1, 0);
|
||||
//Timer4.attachInterrupt(1, ignitionSchedule5Interrupt);
|
||||
Timer4.attachInterrupt(1, ignitionSchedule5Interrupt);
|
||||
#endif
|
||||
#if (IGN_CHANNELS >= 6)
|
||||
attachIntHandleOC(&HardwareTimers_4, ignitionSchedule6Interrupt, 2, 0);
|
||||
//Timer4.attachInterrupt(2, ignitionSchedule6Interrupt);
|
||||
Timer4.attachInterrupt(2, ignitionSchedule6Interrupt);
|
||||
#endif
|
||||
#if (IGN_CHANNELS >= 7)
|
||||
attachIntHandleOC(&HardwareTimers_4, ignitionSchedule7Interrupt, 3, 0);
|
||||
//Timer4.attachInterrupt(3, ignitionSchedule7Interrupt);
|
||||
Timer4.attachInterrupt(3, ignitionSchedule7Interrupt);
|
||||
#endif
|
||||
#if (IGN_CHANNELS >= 8)
|
||||
attachIntHandleOC(&HardwareTimers_4, ignitionSchedule8Interrupt, 4, 0);
|
||||
//Timer4.attachInterrupt(4, ignitionSchedule8Interrupt);
|
||||
Timer4.attachInterrupt(4, ignitionSchedule8Interrupt);
|
||||
#endif
|
||||
|
||||
Timer1.resume();
|
||||
Timer2.resume();
|
||||
Timer3.resume();
|
||||
#if (IGN_CHANNELS >= 5)
|
||||
Timer4.resume();
|
||||
#endif
|
||||
#if (INJ_CHANNELS >= 5)
|
||||
Timer5.resume();
|
||||
#endif
|
||||
}
|
||||
|
||||
uint16_t freeRam()
|
||||
|
|
@ -163,7 +166,6 @@ uint16_t freeRam()
|
|||
char top = 't';
|
||||
return &top - reinterpret_cast<char*>(sbrk(0));
|
||||
}
|
||||
|
||||
//pinmapping the STM32F407 for different boards, at this moment no board is desgined.
|
||||
//All boards are set to the default just to be sure.
|
||||
void setPinMapping(byte boardID)
|
||||
|
|
@ -895,4 +897,4 @@ void setPinMapping(byte boardID)
|
|||
digitalWrite(pinTPS, LOW);
|
||||
|
||||
}
|
||||
#endif
|
||||
#endif
|
||||
|
|
@ -15,100 +15,96 @@
|
|||
// extern void oneMSIntervalIRQ(stimer_t *Timer);
|
||||
|
||||
extern void EmptyIRQCallback(stimer_t *Timer, uint32_t channel);
|
||||
#if defined(USE_STM32GENERIC)
|
||||
#define Serial Serial1
|
||||
#endif
|
||||
|
||||
/*
|
||||
***********************************************************************************************************
|
||||
* Schedules
|
||||
*/
|
||||
#define MAX_TIMER_PERIOD 65535 //The longest period of time (in uS) that the timer can permit (IN this case it is 65535 * 2, as each timer tick is 2uS)
|
||||
#define MAX_TIMER_PERIOD_SLOW 65535 //The longest period of time (in uS) that the timer can permit (IN this case it is 65535 * 2, as each timer tick is 2uS)
|
||||
#define uS_TO_TIMER_COMPARE(uS) (uS ) //Converts a given number of uS into the required number of timer ticks until that time has passed.
|
||||
#define uS_TO_TIMER_COMPARE_SLOW(uS) (uS ) //Converts a given number of uS into the required number of timer ticks until that time has passed.
|
||||
#define MAX_TIMER_PERIOD 65535*2 //The longest period of time (in uS) that the timer can permit (IN this case it is 65535 * 2, as each timer tick is 2uS)
|
||||
#define MAX_TIMER_PERIOD_SLOW 65535*2//The longest period of time (in uS) that the timer can permit (IN this case it is 65535 * 2, as each timer tick is 2uS)
|
||||
#define uS_TO_TIMER_COMPARE(uS) (uS ) //Converts a given number of uS into the required number of timer ticks until that time has passed.
|
||||
#define uS_TO_TIMER_COMPARE_SLOW(uS) (uS ) //Converts a given number of uS into the required number of timer ticks until that time has passed.
|
||||
|
||||
#define FUEL1_COUNTER (TIM3)->CNT
|
||||
#define FUEL2_COUNTER (TIM3)->CNT
|
||||
#define FUEL3_COUNTER (TIM3)->CNT
|
||||
#define FUEL4_COUNTER (TIM3)->CNT
|
||||
#define FUEL1_COUNTER (TIM3)->CNT
|
||||
#define FUEL2_COUNTER (TIM3)->CNT
|
||||
#define FUEL3_COUNTER (TIM3)->CNT
|
||||
#define FUEL4_COUNTER (TIM3)->CNT
|
||||
|
||||
#define FUEL1_COMPARE (TIM3)->CCR1
|
||||
#define FUEL2_COMPARE (TIM3)->CCR2
|
||||
#define FUEL3_COMPARE (TIM3)->CCR3
|
||||
#define FUEL4_COMPARE (TIM3)->CCR4
|
||||
#define FUEL1_COMPARE (TIM3)->CCR1
|
||||
#define FUEL2_COMPARE (TIM3)->CCR2
|
||||
#define FUEL3_COMPARE (TIM3)->CCR3
|
||||
#define FUEL4_COMPARE (TIM3)->CCR4
|
||||
|
||||
#define IGN1_COUNTER (TIM2)->CNT
|
||||
#define IGN2_COUNTER (TIM2)->CNT
|
||||
#define IGN3_COUNTER (TIM2)->CNT
|
||||
#define IGN4_COUNTER (TIM2)->CNT
|
||||
#define IGN1_COUNTER (TIM2)->CNT
|
||||
#define IGN2_COUNTER (TIM2)->CNT
|
||||
#define IGN3_COUNTER (TIM2)->CNT
|
||||
#define IGN4_COUNTER (TIM2)->CNT
|
||||
|
||||
#define IGN1_COMPARE (TIM2)->CCR1
|
||||
#define IGN2_COMPARE (TIM2)->CCR2
|
||||
#define IGN3_COMPARE (TIM2)->CCR3
|
||||
#define IGN4_COMPARE (TIM2)->CCR4
|
||||
#define IGN1_COMPARE (TIM2)->CCR1
|
||||
#define IGN2_COMPARE (TIM2)->CCR2
|
||||
#define IGN3_COMPARE (TIM2)->CCR3
|
||||
#define IGN4_COMPARE (TIM2)->CCR4
|
||||
|
||||
#define FUEL5_COUNTER (TIM5)->CNT
|
||||
#define FUEL6_COUNTER (TIM5)->CNT
|
||||
#define FUEL7_COUNTER (TIM5)->CNT
|
||||
#define FUEL8_COUNTER (TIM5)->CNT
|
||||
#define FUEL5_COUNTER (TIM5)->CNT
|
||||
#define FUEL6_COUNTER (TIM5)->CNT
|
||||
#define FUEL7_COUNTER (TIM5)->CNT
|
||||
#define FUEL8_COUNTER (TIM5)->CNT
|
||||
|
||||
#define FUEL5_COMPARE (TIM5)->CCR1
|
||||
#define FUEL6_COMPARE (TIM5)->CCR2
|
||||
#define FUEL7_COMPARE (TIM5)->CCR3
|
||||
#define FUEL8_COMPARE (TIM5)->CCR4
|
||||
#define FUEL5_COMPARE (TIM5)->CCR1
|
||||
#define FUEL6_COMPARE (TIM5)->CCR2
|
||||
#define FUEL7_COMPARE (TIM5)->CCR3
|
||||
#define FUEL8_COMPARE (TIM5)->CCR4
|
||||
|
||||
#define IGN5_COUNTER (TIM4)->CNT
|
||||
#define IGN6_COUNTER (TIM4)->CNT
|
||||
#define IGN7_COUNTER (TIM4)->CNT
|
||||
#define IGN8_COUNTER (TIM4)->CNT
|
||||
#define IGN5_COUNTER (TIM4)->CNT
|
||||
#define IGN6_COUNTER (TIM4)->CNT
|
||||
#define IGN7_COUNTER (TIM4)->CNT
|
||||
#define IGN8_COUNTER (TIM4)->CNT
|
||||
|
||||
#define IGN5_COMPARE (TIM4)->CCR1
|
||||
#define IGN6_COMPARE (TIM4)->CCR2
|
||||
#define IGN7_COMPARE (TIM4)->CCR3
|
||||
#define IGN8_COMPARE (TIM4)->CCR4
|
||||
#define IGN5_COMPARE (TIM4)->CCR1
|
||||
#define IGN6_COMPARE (TIM4)->CCR2
|
||||
#define IGN7_COMPARE (TIM4)->CCR3
|
||||
#define IGN8_COMPARE (TIM4)->CCR4
|
||||
|
||||
//https://github.com/rogerclarkmelbourne/Arduino_STM32/blob/754bc2969921f1ef262bd69e7faca80b19db7524/STM32F1/system/libmaple/include/libmaple/timer.h#L444
|
||||
#define FUEL1_TIMER_ENABLE() (TIM3)->CCER |= TIM_CCER_CC1E
|
||||
#define FUEL2_TIMER_ENABLE() (TIM3)->CCER |= TIM_CCER_CC2E
|
||||
#define FUEL3_TIMER_ENABLE() (TIM3)->CCER |= TIM_CCER_CC3E
|
||||
#define FUEL4_TIMER_ENABLE() (TIM3)->CCER |= TIM_CCER_CC4E
|
||||
|
||||
#define FUEL1_TIMER_ENABLE() (TIM3)->CCER |= TIM_CCER_CC1E
|
||||
#define FUEL2_TIMER_ENABLE() (TIM3)->CCER |= TIM_CCER_CC2E
|
||||
#define FUEL3_TIMER_ENABLE() (TIM3)->CCER |= TIM_CCER_CC3E
|
||||
#define FUEL4_TIMER_ENABLE() (TIM3)->CCER |= TIM_CCER_CC4E
|
||||
|
||||
#define FUEL1_TIMER_DISABLE() (TIM3)->CCER &= ~TIM_CCER_CC1E
|
||||
#define FUEL2_TIMER_DISABLE() (TIM3)->CCER &= ~TIM_CCER_CC2E
|
||||
#define FUEL3_TIMER_DISABLE() (TIM3)->CCER &= ~TIM_CCER_CC3E
|
||||
#define FUEL4_TIMER_DISABLE() (TIM3)->CCER &= ~TIM_CCER_CC4E
|
||||
#define FUEL1_TIMER_DISABLE() (TIM3)->CCER &= ~TIM_CCER_CC1E
|
||||
#define FUEL2_TIMER_DISABLE() (TIM3)->CCER &= ~TIM_CCER_CC2E
|
||||
#define FUEL3_TIMER_DISABLE() (TIM3)->CCER &= ~TIM_CCER_CC3E
|
||||
#define FUEL4_TIMER_DISABLE() (TIM3)->CCER &= ~TIM_CCER_CC4E
|
||||
|
||||
#define IGN1_TIMER_ENABLE() (TIM2)->CCER |= TIM_CCER_CC1E
|
||||
#define IGN2_TIMER_ENABLE() (TIM2)->CCER |= TIM_CCER_CC2E
|
||||
#define IGN3_TIMER_ENABLE() (TIM2)->CCER |= TIM_CCER_CC3E
|
||||
#define IGN4_TIMER_ENABLE() (TIM2)->CCER |= TIM_CCER_CC4E
|
||||
#define IGN1_TIMER_ENABLE() (TIM2)->CCER |= TIM_CCER_CC1E
|
||||
#define IGN2_TIMER_ENABLE() (TIM2)->CCER |= TIM_CCER_CC2E
|
||||
#define IGN3_TIMER_ENABLE() (TIM2)->CCER |= TIM_CCER_CC3E
|
||||
#define IGN4_TIMER_ENABLE() (TIM2)->CCER |= TIM_CCER_CC4E
|
||||
|
||||
#define IGN1_TIMER_DISABLE() (TIM2)->CCER &= ~TIM_CCER_CC1E
|
||||
#define IGN2_TIMER_DISABLE() (TIM2)->CCER &= ~TIM_CCER_CC2E
|
||||
#define IGN3_TIMER_DISABLE() (TIM2)->CCER &= ~TIM_CCER_CC3E
|
||||
#define IGN4_TIMER_DISABLE() (TIM2)->CCER &= ~TIM_CCER_CC4E
|
||||
#define IGN1_TIMER_DISABLE() (TIM2)->CCER &= ~TIM_CCER_CC1E
|
||||
#define IGN2_TIMER_DISABLE() (TIM2)->CCER &= ~TIM_CCER_CC2E
|
||||
#define IGN3_TIMER_DISABLE() (TIM2)->CCER &= ~TIM_CCER_CC3E
|
||||
#define IGN4_TIMER_DISABLE() (TIM2)->CCER &= ~TIM_CCER_CC4E
|
||||
|
||||
|
||||
#define FUEL5_TIMER_ENABLE() (TIM5)->CCER |= TIM_CCER_CC1E
|
||||
#define FUEL6_TIMER_ENABLE() (TIM5)->CCER |= TIM_CCER_CC2E
|
||||
#define FUEL7_TIMER_ENABLE() (TIM5)->CCER |= TIM_CCER_CC3E
|
||||
#define FUEL8_TIMER_ENABLE() (TIM5)->CCER |= TIM_CCER_CC4E
|
||||
#define FUEL5_TIMER_ENABLE() (TIM5)->CCER |= TIM_CCER_CC1E
|
||||
#define FUEL6_TIMER_ENABLE() (TIM5)->CCER |= TIM_CCER_CC2E
|
||||
#define FUEL7_TIMER_ENABLE() (TIM5)->CCER |= TIM_CCER_CC3E
|
||||
#define FUEL8_TIMER_ENABLE() (TIM5)->CCER |= TIM_CCER_CC4E
|
||||
|
||||
#define FUEL5_TIMER_DISABLE() (TIM5)->CCER &= ~TIM_CCER_CC1E
|
||||
#define FUEL6_TIMER_DISABLE() (TIM5)->CCER &= ~TIM_CCER_CC2E
|
||||
#define FUEL7_TIMER_DISABLE() (TIM5)->CCER &= ~TIM_CCER_CC3E
|
||||
#define FUEL8_TIMER_DISABLE() (TIM5)->CCER &= ~TIM_CCER_CC4E
|
||||
#define FUEL5_TIMER_DISABLE() (TIM5)->CCER &= ~TIM_CCER_CC1E
|
||||
#define FUEL6_TIMER_DISABLE() (TIM5)->CCER &= ~TIM_CCER_CC2E
|
||||
#define FUEL7_TIMER_DISABLE() (TIM5)->CCER &= ~TIM_CCER_CC3E
|
||||
#define FUEL8_TIMER_DISABLE() (TIM5)->CCER &= ~TIM_CCER_CC4E
|
||||
|
||||
#define IGN5_TIMER_ENABLE() (TIM4)->CCER |= TIM_CCER_CC1E
|
||||
#define IGN6_TIMER_ENABLE() (TIM4)->CCER |= TIM_CCER_CC2E
|
||||
#define IGN7_TIMER_ENABLE() (TIM4)->CCER |= TIM_CCER_CC3E
|
||||
#define IGN8_TIMER_ENABLE() (TIM4)->CCER |= TIM_CCER_CC4E
|
||||
#define IGN5_TIMER_ENABLE() (TIM4)->CCER |= TIM_CCER_CC1E
|
||||
#define IGN6_TIMER_ENABLE() (TIM4)->CCER |= TIM_CCER_CC2E
|
||||
#define IGN7_TIMER_ENABLE() (TIM4)->CCER |= TIM_CCER_CC3E
|
||||
#define IGN8_TIMER_ENABLE() (TIM4)->CCER |= TIM_CCER_CC4E
|
||||
|
||||
#define IGN5_TIMER_DISABLE() (TIM4)->CCER &= ~TIM_CCER_CC1E
|
||||
#define IGN6_TIMER_DISABLE() (TIM4)->CCER &= ~TIM_CCER_CC2E
|
||||
#define IGN7_TIMER_DISABLE() (TIM4)->CCER &= ~TIM_CCER_CC3E
|
||||
#define IGN8_TIMER_DISABLE() (TIM4)->CCER &= ~TIM_CCER_CC4E
|
||||
#define IGN5_TIMER_DISABLE() (TIM4)->CCER &= ~TIM_CCER_CC1E
|
||||
#define IGN6_TIMER_DISABLE() (TIM4)->CCER &= ~TIM_CCER_CC2E
|
||||
#define IGN7_TIMER_DISABLE() (TIM4)->CCER &= ~TIM_CCER_CC3E
|
||||
#define IGN8_TIMER_DISABLE() (TIM4)->CCER &= ~TIM_CCER_CC4E
|
||||
|
||||
|
||||
|
||||
|
|
@ -117,26 +113,26 @@
|
|||
***********************************************************************************************************
|
||||
* Auxilliaries
|
||||
*/
|
||||
#define ENABLE_BOOST_TIMER() (TIM1)->CCER |= TIM_CCER_CC2E
|
||||
#define DISABLE_BOOST_TIMER() (TIM1)->CCER &= ~TIM_CCER_CC2E
|
||||
#define ENABLE_BOOST_TIMER() (TIM1)->CCER |= TIM_CCER_CC2E
|
||||
#define DISABLE_BOOST_TIMER() (TIM1)->CCER &= ~TIM_CCER_CC2E
|
||||
|
||||
#define ENABLE_VVT_TIMER() (TIM1)->CCER |= TIM_CCER_CC3E
|
||||
#define DISABLE_VVT_TIMER() (TIM1)->CCER &= ~TIM_CCER_CC3E
|
||||
#define ENABLE_VVT_TIMER() (TIM1)->CCER |= TIM_CCER_CC3E
|
||||
#define DISABLE_VVT_TIMER() (TIM1)->CCER &= ~TIM_CCER_CC3E
|
||||
|
||||
#define BOOST_TIMER_COMPARE (TIM1)->CCR2
|
||||
#define BOOST_TIMER_COUNTER (TIM1)->CNT
|
||||
#define VVT_TIMER_COMPARE (TIM1)->CCR3
|
||||
#define VVT_TIMER_COUNTER (TIM1)->CNT
|
||||
#define BOOST_TIMER_COMPARE (TIM1)->CCR2
|
||||
#define BOOST_TIMER_COUNTER (TIM1)->CNT
|
||||
#define VVT_TIMER_COMPARE (TIM1)->CCR3
|
||||
#define VVT_TIMER_COUNTER (TIM1)->CNT
|
||||
|
||||
/*
|
||||
***********************************************************************************************************
|
||||
* Idle
|
||||
*/
|
||||
#define IDLE_COUNTER (TIM1)->CNT
|
||||
#define IDLE_COMPARE (TIM1)->CCR4
|
||||
#define IDLE_COUNTER (TIM1)->CNT
|
||||
#define IDLE_COMPARE (TIM1)->CCR4
|
||||
|
||||
#define IDLE_TIMER_ENABLE() (TIM1)->CCER |= TIM_CCER_CC4E
|
||||
#define IDLE_TIMER_DISABLE() (TIM1)->CCER &= ~TIM_CCER_CC4E
|
||||
#define IDLE_TIMER_ENABLE() (TIM1)->CCER |= TIM_CCER_CC4E
|
||||
#define IDLE_TIMER_DISABLE() (TIM1)->CCER &= ~TIM_CCER_CC4E
|
||||
|
||||
/*
|
||||
***********************************************************************************************************
|
||||
|
|
@ -148,6 +144,7 @@
|
|||
***********************************************************************************************************
|
||||
* CAN / Second serial
|
||||
*/
|
||||
HardwareSerial CANSerial(PD6,PD5);
|
||||
|
||||
#endif //CORE_STM32
|
||||
#endif //STM32_H
|
||||
|
|
|
|||
|
|
@ -61,7 +61,7 @@ void initBoard()
|
|||
|
||||
//This must happen at the end of the idle init
|
||||
TimerPulseInit(&HardwareTimers_1, 0xFFFF, 0, EmptyIRQCallback);
|
||||
setTimerPrescalerRegister(&HardwareTimers_1, (uint32_t)(getTimerClkFreq(HardwareTimers_1.timer) / (500000)) - 1);
|
||||
//setTimerPrescalerRegister(&HardwareTimers_1, (uint32_t)(getTimerClkFreq(HardwareTimers_1.timer) / (500000)) - 1);
|
||||
if(idle_pwm_max_count > 0) { attachIntHandleOC(&HardwareTimers_1, idleInterrupt, 4, 0);} //on first flash the configPage4.iacAlgorithm is invalid
|
||||
//Timer1.setMode(4, TIMER_OUTPUT_COMPARE);
|
||||
//timer_set_mode(TIMER1, 4, TIMER_OUTPUT_COMPARE;
|
||||
|
|
@ -102,14 +102,14 @@ void initBoard()
|
|||
// Timer1.resume();
|
||||
|
||||
TimerPulseInit(&HardwareTimers_3, 0xFFFF, 0, EmptyIRQCallback);
|
||||
setTimerPrescalerRegister(&HardwareTimers_3, (uint32_t)(getTimerClkFreq(HardwareTimers_3.timer) / (1000000)) - 1);
|
||||
setTimerPrescalerRegister(&HardwareTimers_3, (uint32_t)(getTimerClkFreq(HardwareTimers_3.timer) / (500000)) - 1);
|
||||
attachIntHandleOC(&HardwareTimers_3, fuelSchedule1Interrupt, 1, 0);
|
||||
attachIntHandleOC(&HardwareTimers_3, fuelSchedule2Interrupt, 2, 0);
|
||||
attachIntHandleOC(&HardwareTimers_3, fuelSchedule3Interrupt, 3, 0);
|
||||
attachIntHandleOC(&HardwareTimers_3, fuelSchedule4Interrupt, 4, 0);
|
||||
|
||||
TimerPulseInit(&HardwareTimers_2, 0xFFFF, 0, EmptyIRQCallback);
|
||||
setTimerPrescalerRegister(&HardwareTimers_2, (uint32_t)(getTimerClkFreq(HardwareTimers_2.timer) / (1000000)) - 1);
|
||||
setTimerPrescalerRegister(&HardwareTimers_2, (uint32_t)(getTimerClkFreq(HardwareTimers_2.timer) / (500000)) - 1);
|
||||
attachIntHandleOC(&HardwareTimers_2, ignitionSchedule1Interrupt, 1, 0);
|
||||
attachIntHandleOC(&HardwareTimers_2, ignitionSchedule2Interrupt, 2, 0);
|
||||
attachIntHandleOC(&HardwareTimers_2, ignitionSchedule3Interrupt, 3, 0);
|
||||
|
|
@ -119,7 +119,7 @@ void initBoard()
|
|||
//Injection
|
||||
|
||||
TimerPulseInit(&HardwareTimers_5, 0xFFFF, 0, EmptyIRQCallback);
|
||||
setTimerPrescalerRegister(&HardwareTimers_5, (uint32_t)(getTimerClkFreq(HardwareTimers_5.timer) / (1000000)) - 1);
|
||||
//setTimerPrescalerRegister(&HardwareTimers_5, (uint32_t)(getTimerClkFreq(HardwareTimers_5.timer) / (1000000)) - 1);
|
||||
#if (INJ_CHANNELS >= 5)
|
||||
attachIntHandleOC(&HardwareTimers_5, fuelSchedule5Interrupt, 1, 0);
|
||||
//Timer5.attachInterrupt(1, fuelSchedule5Interrupt);
|
||||
|
|
@ -138,7 +138,7 @@ void initBoard()
|
|||
#endif
|
||||
|
||||
TimerPulseInit(&HardwareTimers_4, 0xFFFF, 0, EmptyIRQCallback);
|
||||
setTimerPrescalerRegister(&HardwareTimers_4, (uint32_t)(getTimerClkFreq(HardwareTimers_4.timer) / (1000000)) - 1);
|
||||
//setTimerPrescalerRegister(&HardwareTimers_4, (uint32_t)(getTimerClkFreq(HardwareTimers_4.timer) / (1000000)) - 1);
|
||||
#if (IGN_CHANNELS >= 5)
|
||||
attachIntHandleOC(&HardwareTimers_4, ignitionSchedule5Interrupt, 1, 0);
|
||||
//Timer4.attachInterrupt(1, ignitionSchedule5Interrupt);
|
||||
|
|
|
|||
|
|
@ -1006,4 +1006,5 @@ void setPinMapping(byte boardID)
|
|||
digitalWrite(pinTPS, LOW);
|
||||
#endif
|
||||
}
|
||||
|
||||
#endif
|
||||
|
|
@ -14,10 +14,9 @@ uint8_t Glow, Ghigh;
|
|||
|
||||
#if defined(__AVR_ATmega1280__) || defined(__AVR_ATmega2560__)
|
||||
HardwareSerial &CANSerial = Serial3;
|
||||
#elif defined(CORE_STM32)
|
||||
#elif defined(CORE_STM32) && !defined(ARDUINO_BLACK_F407VE)
|
||||
#if defined(ARDUINO_ARCH_STM32) // STM32GENERIC core
|
||||
HardwareSerial CANSerial(PD6,PD5);
|
||||
//SerialUART &CANSerial = Serial2;
|
||||
SerialUART &CANSerial = Serial2;
|
||||
#else //libmaple core aka STM32DUINO
|
||||
HardwareSerial &CANSerial = Serial2;
|
||||
#endif
|
||||
|
|
|
|||
Loading…
Reference in New Issue