Teensy idle code
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@ -18,6 +18,22 @@ struct StepperIdle
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volatile unsigned long stepStartTime; //The time the curren
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};
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#if defined(__AVR_ATmega1280__) || defined(__AVR_ATmega2560__) || defined(__AVR_ATmega2561__)
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#define IDLE_COUNTER TCNT4
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#define IDLE_COMPARE OCR4C
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#define IDLE_TIMER_ENABLE() TIMSK4 |= (1 << OCIE4C)
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#define IDLE_TIMER_DISABLE() TIMSK4 &= ~(1 << OCIE4C)
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#elif defined(CORE_TEENSY)
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#define IDLE_COUNTER FTM2_CNT
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#define IDLE_COMPARE FTM2_C0V
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#define IDLE_TIMER_ENABLE() FTM2_C0SC |= FTM_CSC_CHIE
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#define IDLE_TIMER_DISABLE() FTM2_C0SC &= ~FTM_CSC_CHIE
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#endif
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struct table2D iacClosedLoopTable;
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struct table2D iacPWMTable;
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struct table2D iacStepTable;
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@ -17,10 +17,65 @@ integerPID idlePID(¤tStatus.longRPM, &idle_pwm_target_value, &idle_cl_targ
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void initialiseIdle()
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{
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//By default, turn off the PWM interrupt (It gets turned on below if needed)
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#if defined(__AVR_ATmega1280__) || defined(__AVR_ATmega2560__)
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TIMSK4 &= ~(1 << OCIE4C); // Disable timer channel for idle
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#endif
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//By default, turn off the PWM interrupt (It gets turned on below if needed)
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IDLE_TIMER_DISABLE();
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#if defined(__AVR_ATmega1280__) || defined(__AVR_ATmega2560__) || defined(__AVR_ATmega2561__) //AVR chips use the ISR for this
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//No timer work required for AVRs. Timer is shared with the schedules and setup in there.
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#elif defined (CORE_TEENSY)
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//FlexTimer 2 is used for idle
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FTM2_MODE |= FTM_MODE_WPDIS; // Write Protection Disable
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FTM2_MODE |= FTM_MODE_FTMEN; //Flex Timer module enable
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FTM2_MODE |= FTM_MODE_INIT;
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FTM2_SC = 0x00; // Set this to zero before changing the modulus
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FTM2_CNTIN = 0x0000; //Shouldn't be needed, but just in case
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FTM2_CNT = 0x0000; // Reset the count to zero
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FTM2_MOD = 0xFFFF; // max modulus = 65535
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/*
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* Enable the clock for FTM0/1
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* 00 No clock selected. Disables the FTM counter.
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* 01 System clock
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* 10 Fixed frequency clock (32kHz)
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* 11 External clock
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*/
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FTM2_SC |= FTM_SC_CLKS(0b10);
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/*
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* Trim the slow clock from 32kHz down to 31.25kHz (The slowest it will go)
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* This is somewhat imprecise and documentation is not good.
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* I poked the chip until I figured out the values associated with 31.25kHz
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*/
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MCG_C3 = 0x9B;
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/*
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* Set Prescaler
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* This is the slowest that the timer can be clocked (Without used the slow timer, which is too slow). It results in ticks of 2.13333uS on the teensy 3.5:
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* 32000 Hz = F_BUS
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* 128 * 1000000uS / F_BUS = 2.133uS
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*
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* 000 = Divide by 1
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* 001 Divide by 2
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* 010 Divide by 4
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* 011 Divide by 8
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* 100 Divide by 16
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* 101 Divide by 32
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* 110 Divide by 64
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* 111 Divide by 128
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*/
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FTM2_SC |= FTM_SC_PS(0b0); //No prescaler
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//Setup the channels (See Pg 1014 of K64 DS).
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FTM2_C0SC &= ~FTM_CSC_MSB; //According to Pg 965 of the K64 datasheet, this should not be needed as MSB is reset to 0 upon reset, but the channel interrupt fails to fire without it
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FTM2_C0SC |= FTM_CSC_MSA; //Enable Compare mode
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FTM2_C0SC |= FTM_CSC_CHIE; //Enable channel compare interrupt
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// enable IRQ Interrupt
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NVIC_ENABLE_IRQ(IRQ_FTM2);
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#endif
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//Initialising comprises of setting the 2D tables with the relevant values from the config pages
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switch(configPage4.iacAlgorithm)
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@ -255,12 +310,10 @@ void homeStepper()
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idleStepper.stepperStatus = SOFF;
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}
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//The interrupt to turn off the idle pwm
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#if defined(__AVR_ATmega1280__) || defined(__AVR_ATmega2560__)
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//This function simply turns off the idle PWM and sets the pin low
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static inline void disableIdle()
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{
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TIMSK4 &= ~(1 << OCIE4C); //Turn off interrupt
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IDLE_TIMER_DISABLE();
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digitalWrite(pinIdle1, LOW);
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}
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@ -268,10 +321,14 @@ static inline void disableIdle()
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//Typically this is enabling the PWM interrupt
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static inline void enableIdle()
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{
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TIMSK4 |= (1 << OCIE4C); //Turn on the C compare unit (ie turn on the interrupt)
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IDLE_TIMER_ENABLE();
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}
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#if defined(__AVR_ATmega1280__) || defined(__AVR_ATmega2560__) || defined(__AVR_ATmega2561__) //AVR chips use the ISR for this
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ISR(TIMER4_COMPC_vect)
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#elif defined (CORE_TEENSY)
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static inline void idleInterrupt() //Most ARM chips can simply call a function
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#endif
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{
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if (idle_pwm_state)
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{
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@ -287,7 +344,7 @@ ISR(TIMER4_COMPC_vect)
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*idle_pin_port |= (idle_pin_mask); // Switch pin high
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if(configPage4.iacChannels) { *idle2_pin_port &= ~(idle2_pin_mask); } //If 2 idle channels are in use, flip idle2 to be the opposite of idle1
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}
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OCR4C = TCNT4 + (idle_pwm_max_count - idle_pwm_cur_value);
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IDLE_COMPARE = IDLE_COUNTER + (idle_pwm_max_count - idle_pwm_cur_value);
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idle_pwm_state = false;
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}
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else
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@ -304,18 +361,9 @@ ISR(TIMER4_COMPC_vect)
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*idle_pin_port &= ~(idle_pin_mask); // Switch pin to low (1 pin mode)
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if(configPage4.iacChannels) { *idle2_pin_port |= (idle2_pin_mask); } //If 2 idle channels are in use, flip idle2 to be the opposite of idle1
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}
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OCR4C = TCNT4 + idle_pwm_target_value;
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IDLE_COMPARE = IDLE_COUNTER + idle_pwm_target_value;
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idle_pwm_cur_value = idle_pwm_target_value;
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idle_pwm_state = true;
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}
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}
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#elif defined (CORE_TEENSY)
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//This function simply turns off the idle PWM and sets the pin low
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static inline void disableIdle()
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{
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digitalWrite(pinIdle1, LOW);
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}
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static inline void enableIdle() { }
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#endif
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