Cleanup of old crud with the new modular boards
This commit is contained in:
Josh Stewart
parent
e24d32e111
commit
bafbbd3fc3
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@ -22,4 +22,4 @@ reference/hardware/v0.4/gerbers/Archive.zip
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.vscode/c_cpp_properties.json
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.vscode/launch.json
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.vscode/.browse.c_cpp.db*
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speeduino/*samd21.*
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speeduino/board_samd21*
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@ -1,160 +0,0 @@
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#ifndef SAMD21_H
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#define SAMD21_H
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#if defined(CORE_SAMD21)
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#include "sam.h"
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/*
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***********************************************************************************************************
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* General
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*/
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#define PORT_TYPE uint32_t //Size of the port variables (Eg inj1_pin_port). Most systems use a byte, but SAMD21 is a 32-bit unsigned int
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#define BOARD_NR_GPIO_PINS 52 //Not sure this is correct
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#define BOARD_DIGITAL_GPIO_PINS 52 //Pretty sure this isn't right
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void initBoard();
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//Additional analog pins (These won't work without other changes)
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#define PIN_A6 (8ul)
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#define PIN_A7 (9ul)
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#define PIN_A8 (10ul)
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#define PIN_A9 (11ul)
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//These don't work:
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#define PIN_A13 (9ul)
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#define PIN_A14 (9ul)
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#define PIN_A15 (9ul)
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static const uint8_t A6 = PIN_A6;
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static const uint8_t A7 = PIN_A7;
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static const uint8_t A8 = PIN_A8;
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static const uint8_t A9 = PIN_A9;
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static const uint8_t A13 = PIN_A13;
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static const uint8_t A14 = PIN_A14;
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static const uint8_t A15 = PIN_A15;
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/*
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***********************************************************************************************************
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* Schedules
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*/
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//See : https://electronics.stackexchange.com/questions/325159/the-value-of-the-tcc-counter-on-an-atsam-controller-always-reads-as-zero
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#define FUEL1_COUNTER TCC0->COUNT.reg
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#define FUEL2_COUNTER TCC0->COUNT.reg
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#define FUEL3_COUNTER TCC0->COUNT.reg
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#define FUEL4_COUNTER TCC0->COUNT.reg
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//The below are NOT YET RIGHT!
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#define FUEL5_COUNTER TCC0->COUNT.reg
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#define FUEL6_COUNTER TCC0->COUNT.reg
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#define FUEL7_COUNTER TCC0->COUNT.reg
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#define FUEL8_COUNTER TCC0->COUNT.reg
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#define IGN1_COUNTER TCC1->COUNT.reg
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#define IGN2_COUNTER TCC1->COUNT.reg
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#define IGN3_COUNTER TCC2->COUNT.reg
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#define IGN4_COUNTER TCC2->COUNT.reg
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//The below are NOT YET RIGHT!
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#define IGN5_COUNTER TCC1->COUNT.reg
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#define IGN6_COUNTER TCC1->COUNT.reg
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#define IGN7_COUNTER TCC2->COUNT.reg
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#define IGN8_COUNTER TCC2->COUNT.reg
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#define FUEL1_COMPARE TCC0->CC[0].bit.CC
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#define FUEL2_COMPARE TCC0->CC[1].bit.CC
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#define FUEL3_COMPARE TCC0->CC[2].bit.CC
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#define FUEL4_COMPARE TCC0->CC[3].bit.CC
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//The below are NOT YET RIGHT!
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#define FUEL5_COMPARE TCC0->CC0
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#define FUEL6_COMPARE TCC0->CC1
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#define FUEL7_COMPARE TCC0->CC2
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#define FUEL8_COMPARE TCC0->CC3
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#define IGN1_COMPARE TCC1->CC[0].bit.CC
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#define IGN2_COMPARE TCC1->CC[1].bit.CC
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#define IGN3_COMPARE TCC2->CC[0].bit.CC
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#define IGN4_COMPARE TCC2->CC[1].bit.CC
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//The below are NOT YET RIGHT!
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#define IGN5_COMPARE TCC1->CC[0].bit.CC
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#define IGN6_COMPARE TCC1->CC[1].bit.CC
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#define IGN7_COMPARE TCC2->CC[0].bit.CC
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#define IGN8_COMPARE TCC2->CC[1].bit.CC
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#define FUEL1_TIMER_ENABLE() TCC0->INTENSET.bit.MC0 = 0x1
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#define FUEL2_TIMER_ENABLE() TCC0->INTENSET.bit.MC1 = 0x1
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#define FUEL3_TIMER_ENABLE() TCC0->INTENSET.bit.MC2 = 0x1
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#define FUEL4_TIMER_ENABLE() TCC0->INTENSET.bit.MC3 = 0x1
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//The below are NOT YET RIGHT!
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#define FUEL5_TIMER_ENABLE() TCC0->INTENSET.bit.MC0 = 0x1
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#define FUEL6_TIMER_ENABLE() TCC0->INTENSET.bit.MC1 = 0x1
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#define FUEL7_TIMER_ENABLE() TCC0->INTENSET.bit.MC2 = 0x1
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#define FUEL8_TIMER_ENABLE() TCC0->INTENSET.bit.MC3 = 0x1
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#define FUEL1_TIMER_DISABLE() TCC0->INTENSET.bit.MC0 = 0x0
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#define FUEL2_TIMER_DISABLE() TCC0->INTENSET.bit.MC0 = 0x0
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#define FUEL3_TIMER_DISABLE() TCC0->INTENSET.bit.MC0 = 0x0
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#define FUEL4_TIMER_DISABLE() TCC0->INTENSET.bit.MC0 = 0x0
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//The below are NOT YET RIGHT!
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#define FUEL5_TIMER_DISABLE() TCC0->INTENSET.bit.MC0 = 0x0
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#define FUEL6_TIMER_DISABLE() TCC0->INTENSET.bit.MC0 = 0x0
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#define FUEL7_TIMER_DISABLE() TCC0->INTENSET.bit.MC0 = 0x0
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#define FUEL8_TIMER_DISABLE() TCC0->INTENSET.bit.MC0 = 0x0
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#define IGN1_TIMER_ENABLE() TCC1->INTENSET.bit.MC0 = 0x1
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#define IGN2_TIMER_ENABLE() TCC1->INTENSET.bit.MC1 = 0x1
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#define IGN3_TIMER_ENABLE() TCC2->INTENSET.bit.MC0 = 0x1
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#define IGN4_TIMER_ENABLE() TCC2->INTENSET.bit.MC1 = 0x1
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//The below are NOT YET RIGHT!
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#define IGN5_TIMER_ENABLE() TCC1->INTENSET.bit.MC0 = 0x1
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#define IGN6_TIMER_ENABLE() TCC1->INTENSET.bit.MC1 = 0x1
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#define IGN7_TIMER_ENABLE() TCC2->INTENSET.bit.MC0 = 0x1
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#define IGN8_TIMER_ENABLE() TCC2->INTENSET.bit.MC1 = 0x1
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#define IGN1_TIMER_DISABLE() TCC1->INTENSET.bit.MC0 = 0x0
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#define IGN2_TIMER_DISABLE() TCC1->INTENSET.bit.MC1 = 0x0
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#define IGN3_TIMER_DISABLE() TCC2->INTENSET.bit.MC0 = 0x0
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#define IGN4_TIMER_DISABLE() TCC2->INTENSET.bit.MC1 = 0x0
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//The below are NOT YET RIGHT!
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#define IGN5_TIMER_DISABLE() TCC1->INTENSET.bit.MC0 = 0x0
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#define IGN6_TIMER_DISABLE() TCC1->INTENSET.bit.MC1 = 0x0
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#define IGN7_TIMER_DISABLE() TCC2->INTENSET.bit.MC0 = 0x0
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#define IGN8_TIMER_DISABLE() TCC2->INTENSET.bit.MC1 = 0x0
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#define MAX_TIMER_PERIOD 139808 // 2.13333333uS * 65535
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#define MAX_TIMER_PERIOD_SLOW 139808
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#define uS_TO_TIMER_COMPARE(uS) ((uS * 15) >> 5) //Converts a given number of uS into the required number of timer ticks until that time has passed.
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//Hack compatibility with AVR timers that run at different speeds
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#define uS_TO_TIMER_COMPARE_SLOW(uS) ((uS * 15) >> 5)
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/*
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***********************************************************************************************************
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* Auxilliaries
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*/
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//Uses the 2nd TC
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//The 2nd TC is referred to as TC4
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#define ENABLE_BOOST_TIMER() TC4->COUNT16.INTENSET.bit.MC0 = 0x1 // Enable match interrupts on compare channel 0
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#define DISABLE_BOOST_TIMER() TC4->COUNT16.INTENSET.bit.MC0 = 0x0
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#define ENABLE_VVT_TIMER() TC4->COUNT16.INTENSET.bit.MC1 = 0x1
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#define DISABLE_VVT_TIMER() TC4->COUNT16.INTENSET.bit.MC1 = 0x0
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#define BOOST_TIMER_COMPARE TC4->COUNT16.CC[0].reg
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#define BOOST_TIMER_COUNTER TC4->COUNT16.COUNT.bit.COUNT
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#define VVT_TIMER_COMPARE TC4->COUNT16.CC[1].reg
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#define VVT_TIMER_COUNTER TC4->COUNT16.COUNT.bit.COUNT
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/*
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***********************************************************************************************************
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* Idle
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*/
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//3rd TC is aliased as TC5
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#define IDLE_COUNTER TC5->COUNT16.COUNT.bit.COUNT
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#define IDLE_COMPARE TC5->COUNT16.CC[0].reg
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#define IDLE_TIMER_ENABLE() TC5->COUNT16.INTENSET.bit.MC0 = 0x1
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#define IDLE_TIMER_DISABLE() TC5->COUNT16.INTENSET.bit.MC0 = 0x0
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/*
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***********************************************************************************************************
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* CAN / Second serial
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*/
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Uart CANSerial (&sercom3, 0, 1, SERCOM_RX_PAD_1, UART_TX_PAD_0);
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#endif //CORE_SAMD21
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#endif //SAMD21_H
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@ -1,11 +0,0 @@
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#include "globals.h"
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#if defined(CORE_SAMD21)
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void initBoard()
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{
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}
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#endif
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@ -1,159 +0,0 @@
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#ifndef SAMD21_H
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#define SAMD21_H
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#if defined(CORE_SAMD21)
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#include "sam.h"
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/*
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***********************************************************************************************************
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* General
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*/
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#define PORT_TYPE uint32_t //Size of the port variables (Eg inj1_pin_port). Most systems use a byte, but SAMD21 is a 32-bit unsigned int
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#define BOARD_NR_GPIO_PINS 52 //Not sure this is correct
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#define BOARD_DIGITAL_GPIO_PINS 52 //Pretty sure this isn't right
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void initBoard();
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//Additional analog pins (These won't work without other changes)
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#define PIN_A6 (8ul)
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#define PIN_A7 (9ul)
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#define PIN_A8 (10ul)
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#define PIN_A9 (11ul)
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#define PIN_A13 (9ul)
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#define PIN_A14 (9ul)
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#define PIN_A15 (9ul)
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static const uint8_t A6 = PIN_A6;
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static const uint8_t A7 = PIN_A7;
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static const uint8_t A8 = PIN_A8;
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static const uint8_t A9 = PIN_A9;
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static const uint8_t A13 = PIN_A13;
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static const uint8_t A14 = PIN_A14;
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static const uint8_t A15 = PIN_A15;
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/*
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***********************************************************************************************************
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* Schedules
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*/
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//See : https://electronics.stackexchange.com/questions/325159/the-value-of-the-tcc-counter-on-an-atsam-controller-always-reads-as-zero
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#define FUEL1_COUNTER TCC0->COUNT.reg
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#define FUEL2_COUNTER TCC0->COUNT.reg
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#define FUEL3_COUNTER TCC0->COUNT.reg
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#define FUEL4_COUNTER TCC0->COUNT.reg
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//The below are NOT YET RIGHT!
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#define FUEL5_COUNTER TCC0->COUNT.reg
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#define FUEL6_COUNTER TCC0->COUNT.reg
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#define FUEL7_COUNTER TCC0->COUNT.reg
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#define FUEL8_COUNTER TCC0->COUNT.reg
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#define IGN1_COUNTER TCC1->COUNT.reg
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#define IGN2_COUNTER TCC1->COUNT.reg
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#define IGN3_COUNTER TCC2->COUNT.reg
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#define IGN4_COUNTER TCC2->COUNT.reg
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//The below are NOT YET RIGHT!
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#define IGN5_COUNTER TCC1->COUNT.reg
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#define IGN6_COUNTER TCC1->COUNT.reg
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#define IGN7_COUNTER TCC2->COUNT.reg
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#define IGN8_COUNTER TCC2->COUNT.reg
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#define FUEL1_COMPARE TCC0->CC[0].bit.CC
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#define FUEL2_COMPARE TCC0->CC[1].bit.CC
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#define FUEL3_COMPARE TCC0->CC[2].bit.CC
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#define FUEL4_COMPARE TCC0->CC[3].bit.CC
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//The below are NOT YET RIGHT!
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#define FUEL5_COMPARE TCC0->CC0
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#define FUEL6_COMPARE TCC0->CC1
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#define FUEL7_COMPARE TCC0->CC2
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#define FUEL8_COMPARE TCC0->CC3
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#define IGN1_COMPARE TCC1->CC[0].bit.CC
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#define IGN2_COMPARE TCC1->CC[1].bit.CC
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#define IGN3_COMPARE TCC2->CC[0].bit.CC
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#define IGN4_COMPARE TCC2->CC[1].bit.CC
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//The below are NOT YET RIGHT!
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#define IGN5_COMPARE TCC1->CC[0].bit.CC
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#define IGN6_COMPARE TCC1->CC[1].bit.CC
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#define IGN7_COMPARE TCC2->CC[0].bit.CC
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#define IGN8_COMPARE TCC2->CC[1].bit.CC
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#define FUEL1_TIMER_ENABLE() TCC0->INTENSET.bit.MC0 = 0x1
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#define FUEL2_TIMER_ENABLE() TCC0->INTENSET.bit.MC1 = 0x1
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#define FUEL3_TIMER_ENABLE() TCC0->INTENSET.bit.MC2 = 0x1
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#define FUEL4_TIMER_ENABLE() TCC0->INTENSET.bit.MC3 = 0x1
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//The below are NOT YET RIGHT!
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#define FUEL5_TIMER_ENABLE() TCC0->INTENSET.bit.MC0 = 0x1
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#define FUEL6_TIMER_ENABLE() TCC0->INTENSET.bit.MC1 = 0x1
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#define FUEL7_TIMER_ENABLE() TCC0->INTENSET.bit.MC2 = 0x1
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#define FUEL8_TIMER_ENABLE() TCC0->INTENSET.bit.MC3 = 0x1
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#define FUEL1_TIMER_DISABLE() TCC0->INTENSET.bit.MC0 = 0x0
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#define FUEL2_TIMER_DISABLE() TCC0->INTENSET.bit.MC0 = 0x0
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#define FUEL3_TIMER_DISABLE() TCC0->INTENSET.bit.MC0 = 0x0
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#define FUEL4_TIMER_DISABLE() TCC0->INTENSET.bit.MC0 = 0x0
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//The below are NOT YET RIGHT!
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#define FUEL5_TIMER_DISABLE() TCC0->INTENSET.bit.MC0 = 0x0
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#define FUEL6_TIMER_DISABLE() TCC0->INTENSET.bit.MC0 = 0x0
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#define FUEL7_TIMER_DISABLE() TCC0->INTENSET.bit.MC0 = 0x0
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#define FUEL8_TIMER_DISABLE() TCC0->INTENSET.bit.MC0 = 0x0
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#define IGN1_TIMER_ENABLE() TCC1->INTENSET.bit.MC0 = 0x1
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#define IGN2_TIMER_ENABLE() TCC1->INTENSET.bit.MC1 = 0x1
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#define IGN3_TIMER_ENABLE() TCC2->INTENSET.bit.MC0 = 0x1
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#define IGN4_TIMER_ENABLE() TCC2->INTENSET.bit.MC1 = 0x1
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//The below are NOT YET RIGHT!
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#define IGN5_TIMER_ENABLE() TCC1->INTENSET.bit.MC0 = 0x1
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#define IGN6_TIMER_ENABLE() TCC1->INTENSET.bit.MC1 = 0x1
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#define IGN7_TIMER_ENABLE() TCC2->INTENSET.bit.MC0 = 0x1
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#define IGN8_TIMER_ENABLE() TCC2->INTENSET.bit.MC1 = 0x1
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#define IGN1_TIMER_DISABLE() TCC1->INTENSET.bit.MC0 = 0x0
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#define IGN2_TIMER_DISABLE() TCC1->INTENSET.bit.MC1 = 0x0
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#define IGN3_TIMER_DISABLE() TCC2->INTENSET.bit.MC0 = 0x0
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#define IGN4_TIMER_DISABLE() TCC2->INTENSET.bit.MC1 = 0x0
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//The below are NOT YET RIGHT!
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#define IGN5_TIMER_DISABLE() TCC1->INTENSET.bit.MC0 = 0x0
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#define IGN6_TIMER_DISABLE() TCC1->INTENSET.bit.MC1 = 0x0
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#define IGN7_TIMER_DISABLE() TCC2->INTENSET.bit.MC0 = 0x0
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#define IGN8_TIMER_DISABLE() TCC2->INTENSET.bit.MC1 = 0x0
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#define MAX_TIMER_PERIOD 139808 // 2.13333333uS * 65535
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#define MAX_TIMER_PERIOD_SLOW 139808
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#define uS_TO_TIMER_COMPARE(uS) ((uS * 15) >> 5) //Converts a given number of uS into the required number of timer ticks until that time has passed.
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//Hack compatibility with AVR timers that run at different speeds
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#define uS_TO_TIMER_COMPARE_SLOW(uS) ((uS * 15) >> 5)
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/*
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***********************************************************************************************************
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* Auxilliaries
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*/
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//Uses the 2nd TC
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//The 2nd TC is referred to as TC4
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#define ENABLE_BOOST_TIMER() TC4->COUNT16.INTENSET.bit.MC0 = 0x1 // Enable match interrupts on compare channel 0
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#define DISABLE_BOOST_TIMER() TC4->COUNT16.INTENSET.bit.MC0 = 0x0
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#define ENABLE_VVT_TIMER() TC4->COUNT16.INTENSET.bit.MC1 = 0x1
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#define DISABLE_VVT_TIMER() TC4->COUNT16.INTENSET.bit.MC1 = 0x0
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#define BOOST_TIMER_COMPARE TC4->COUNT16.CC[0].reg
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#define BOOST_TIMER_COUNTER TC4->COUNT16.COUNT.bit.COUNT
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#define VVT_TIMER_COMPARE TC4->COUNT16.CC[1].reg
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#define VVT_TIMER_COUNTER TC4->COUNT16.COUNT.bit.COUNT
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/*
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***********************************************************************************************************
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* Idle
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*/
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//3rd TC is aliased as TC5
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#define IDLE_COUNTER TC5->COUNT16.COUNT.bit.COUNT
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#define IDLE_COMPARE TC5->COUNT16.CC[0].reg
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#define IDLE_TIMER_ENABLE() TC5->COUNT16.INTENSET.bit.MC0 = 0x1
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#define IDLE_TIMER_DISABLE() TC5->COUNT16.INTENSET.bit.MC0 = 0x0
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/*
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***********************************************************************************************************
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* CAN / Second serial
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*/
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Uart CANSerial (&sercom3, 0, 1, SERCOM_RX_PAD_1, UART_TX_PAD_0);
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#endif //CORE_SAMD21
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#endif //SAMD21_H
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