mirror of https://github.com/rusefi/8Ch-EGT.git
Updated most recent files
This commit is contained in:
parent
25bffa889e
commit
07945d5bd2
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@ -8,7 +8,7 @@
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; Please visit documentation for the other options and examples
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; https://docs.platformio.org/page/projectconf.html
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[env:genericSTM32F103C8]
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[env:EGT-8-STM32F103C6]
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platform = ststm32
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board = genericSTM32F103C8
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framework = arduino
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@ -18,4 +18,18 @@ build_flags =
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-DSERIAL_UART_INSTANCE=1
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-DPIN_SERIAL_RX=PA10
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-DPIN_SERIAL_TX=PA9
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-D HSE_VALUE=8000000U
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-D HSE_VALUE=8000000U
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[env:EGT-8-STM32F103C6-debug]
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platform = ststm32
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board = genericSTM32F103C8
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framework = arduino
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upload_protocol = serial
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monitor_speed = 115200
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build_flags =
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-DSERIAL_UART_INSTANCE=1
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-DPIN_SERIAL_RX=PA10
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-DPIN_SERIAL_TX=PA9
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-D HSE_VALUE=8000000U
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-D DEBUG=1
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@ -1,7 +1,7 @@
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#include <Arduino.h>
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#include "MAX31855.h"
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#define DEBUG 1
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//#define DEBUG 1
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#ifndef DEBUG
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#define DEBUG 0
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@ -37,20 +37,22 @@ typedef struct {
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uint8_t len;
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} CAN_msg_t;
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typedef const struct {
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uint8_t TS2;
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uint8_t TS1;
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uint8_t BRP;
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} CAN_bit_timing_config_t;
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//typedef const struct {
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// uint8_t TS2;
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// uint8_t TS1;
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// uint8_t BRP;
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//} CAN_bit_timing_config_t;
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//
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//CAN_bit_timing_config_t can_configs[6] = {{2, 13, 45}, {2, 15, 20}, {2, 13, 18}, {2, 13, 9}, {2, 15, 4}, {2, 15, 2}};
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CAN_bit_timing_config_t can_configs[6] = {{2, 13, 45}, {2, 15, 20}, {2, 13, 18}, {2, 13, 9}, {2, 15, 4}, {2, 15, 2}};
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CAN_msg_t CAN_msg_14; // data from egt 1-4 that will be sent to CAN bus
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CAN_msg_t CAN_msg_58; // data from egt 5-8 that will be sent to CAN bus
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uint16_t canAddress;
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uint8_t canin_channel;
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extern CAN_bit_timing_config_t can_configs[6];
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//extern CAN_bit_timing_config_t can_configs[6];
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uint8_t cs[8] = { PA0, PA1, PA2, PA3, PB0, PB1, PB13, PB12 }; //chip select pins for the MAX31855 chips
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int32_t rawData[8] = { 0 }; //raw data from all 8 MAX31855 chips
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@ -104,6 +106,164 @@ IdAddrCan pins[ID_CAN_SIZE] = {
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{ ID_PIN4, 10 },
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};
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/* Real speed for bit rate of CAN message */
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uint32_t SPEED[6] = {50*1000, 100*1000, 125*1000, 250*1000, 500*1000, 1000*1000};
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typedef struct
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{
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uint16_t baud_rate_prescaler; /// [1 to 1024]
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uint8_t time_segment_1; /// [1 to 16]
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uint8_t time_segment_2; /// [1 to 8]
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uint8_t resynchronization_jump_width; /// [1 to 4] (recommended value is 1)
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} CAN_bit_timing_config_t;
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#define CAN_STM32_ERROR_UNSUPPORTED_BIT_RATE 1000
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#define CAN_STM32_ERROR_MSR_INAK_NOT_SET 1001
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#define CAN_STM32_ERROR_MSR_INAK_NOT_CLEARED 1002
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#define CAN_STM32_ERROR_UNSUPPORTED_FRAME_FORMAT 1003
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/*
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* Calculation of bit timing dependent on peripheral clock rate
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*/
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int16_t ComputeCANTimings(const uint32_t peripheral_clock_rate,
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const uint32_t target_bitrate,
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CAN_bit_timing_config_t* out_timings)
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{
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if (target_bitrate < 1000)
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{
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return -CAN_STM32_ERROR_UNSUPPORTED_BIT_RATE;
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}
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//assert(out_timings != NULL); // NOLINT
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memset(out_timings, 0, sizeof(*out_timings));
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/*
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* Hardware configuration
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*/
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static const uint8_t MaxBS1 = 16;
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static const uint8_t MaxBS2 = 8;
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/*
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* Ref. "Automatic Baudrate Detection in CANopen Networks", U. Koppe, MicroControl GmbH & Co. KG
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* CAN in Automation, 2003
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*
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* According to the source, optimal quanta per bit are:
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* Bitrate Optimal Maximum
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* 1000 kbps 8 10
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* 500 kbps 16 17
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* 250 kbps 16 17
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* 125 kbps 16 17
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*/
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const uint8_t max_quanta_per_bit = (uint8_t)((target_bitrate >= 1000000) ? 10 : 17); // NOLINT
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//assert(max_quanta_per_bit <= (MaxBS1 + MaxBS2));
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static const uint16_t MaxSamplePointLocationPermill = 900;
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/*
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* Computing (prescaler * BS):
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* BITRATE = 1 / (PRESCALER * (1 / PCLK) * (1 + BS1 + BS2)) -- See the Reference Manual
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* BITRATE = PCLK / (PRESCALER * (1 + BS1 + BS2)) -- Simplified
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* let:
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* BS = 1 + BS1 + BS2 -- Number of time quanta per bit
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* PRESCALER_BS = PRESCALER * BS
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* ==>
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* PRESCALER_BS = PCLK / BITRATE
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*/
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const uint32_t prescaler_bs = peripheral_clock_rate / target_bitrate;
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/*
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* Searching for such prescaler value so that the number of quanta per bit is highest.
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*/
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uint8_t bs1_bs2_sum = (uint8_t)(max_quanta_per_bit - 1); // NOLINT
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while ((prescaler_bs % (1U + bs1_bs2_sum)) != 0)
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{
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if (bs1_bs2_sum <= 2)
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{
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return -CAN_STM32_ERROR_UNSUPPORTED_BIT_RATE; // No solution
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}
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bs1_bs2_sum--;
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}
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const uint32_t prescaler = prescaler_bs / (1U + bs1_bs2_sum);
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if ((prescaler < 1U) || (prescaler > 1024U))
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{
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return -CAN_STM32_ERROR_UNSUPPORTED_BIT_RATE; // No solution
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}
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/*
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* Now we have a constraint: (BS1 + BS2) == bs1_bs2_sum.
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* We need to find such values so that the sample point is as close as possible to the optimal value,
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* which is 87.5%, which is 7/8.
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*
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* Solve[(1 + bs1)/(1 + bs1 + bs2) == 7/8, bs2] (* Where 7/8 is 0.875, the recommended sample point location *)
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* {{bs2 -> (1 + bs1)/7}}
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*
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* Hence:
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* bs2 = (1 + bs1) / 7
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* bs1 = (7 * bs1_bs2_sum - 1) / 8
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*
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* Sample point location can be computed as follows:
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* Sample point location = (1 + bs1) / (1 + bs1 + bs2)
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*
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* Since the optimal solution is so close to the maximum, we prepare two solutions, and then pick the best one:
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* - With rounding to nearest
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* - With rounding to zero
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*/
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uint8_t bs1 = (uint8_t)(((7 * bs1_bs2_sum - 1) + 4) / 8); // Trying rounding to nearest first // NOLINT
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uint8_t bs2 = (uint8_t)(bs1_bs2_sum - bs1); // NOLINT
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//assert(bs1_bs2_sum > bs1);
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{
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const uint16_t sample_point_permill = (uint16_t)(1000U * (1U + bs1) / (1U + bs1 + bs2)); // NOLINT
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if (sample_point_permill > MaxSamplePointLocationPermill) // Strictly more!
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{
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bs1 = (uint8_t)((7 * bs1_bs2_sum - 1) / 8); // Nope, too far; now rounding to zero
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bs2 = (uint8_t)(bs1_bs2_sum - bs1);
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}
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}
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const bool valid = (bs1 >= 1) && (bs1 <= MaxBS1) && (bs2 >= 1) && (bs2 <= MaxBS2);
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/*
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* Final validation
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* Helpful Python:
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* def sample_point_from_btr(x):
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* assert 0b0011110010000000111111000000000 & x == 0
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* ts2,ts1,brp = (x>>20)&7, (x>>16)&15, x&511
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* return (1+ts1+1)/(1+ts1+1+ts2+1)
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*/
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if ((target_bitrate != (peripheral_clock_rate / (prescaler * (1U + bs1 + bs2)))) ||
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!valid)
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{
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// This actually means that the algorithm has a logic error, hence assert(0).
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//assert(0); // NOLINT
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return -CAN_STM32_ERROR_UNSUPPORTED_BIT_RATE;
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}
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out_timings->baud_rate_prescaler = (uint16_t) prescaler;
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out_timings->resynchronization_jump_width = 1; // One is recommended by UAVCAN, CANOpen, and DeviceNet
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out_timings->time_segment_1 = bs1;
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out_timings->time_segment_2 = bs2;
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if (DEBUG) {
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Serial.print("target_bitrate=");
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Serial.println(target_bitrate);
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Serial.print("peripheral_clock_rate=");
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Serial.println(peripheral_clock_rate);
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Serial.print("timings.baud_rate_prescaler=");
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Serial.println(out_timings->baud_rate_prescaler);
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Serial.print("timings.time_segment_1=");
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Serial.println(out_timings->time_segment_1);
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Serial.print("timings.time_segment_2=");
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Serial.println(out_timings->time_segment_2);
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Serial.print("timings.resynchronization_jump_width=");
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Serial.println(out_timings->resynchronization_jump_width);
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}
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return 0;
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}
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void canInit(enum BitRate bitrate) {
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RCC->APB1ENR |= 0x2000000UL; // Enable CAN clock
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RCC->APB2ENR |= 0x1UL; // Enable AFIO clock
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@ -113,15 +273,29 @@ void canInit(enum BitRate bitrate) {
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RCC->APB2ENR |= 0x4UL; // Enable GPIOA clock (bit2 to 1)
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GPIOA->CRH &= 0xFFF00FFF;
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GPIOA->CRH |= 0xB8000UL; // Configure PA11 and PA12
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GPIOA->ODR |= 0x1000UL;
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GPIOA->ODR |= 0x1800UL;
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CAN1->MCR = 0x51UL; // Set CAN to initialization mode
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while ((CAN1->MSR & CAN_MSR_INAK) == 0U);
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// Set bit rates
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CAN1->BTR &= ~(((0x03) << 24) | ((0x07) << 20) | ((0x0F) << 16) | (0x1FF));
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CAN1->BTR |= (((can_configs[bitrate].TS2-1) & 0x07) << 20) | (((can_configs[bitrate].TS1-1) & 0x0F) << 16) | ((can_configs[bitrate].BRP-1) & 0x1FF);
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CAN_bit_timing_config_t timings;
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Serial.print("bitrate=");
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Serial.println(bitrate);
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uint32_t target_bitrate = SPEED[bitrate];
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Serial.print("target_bitrate=");
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Serial.println(target_bitrate);
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int result = ComputeCANTimings(HAL_RCC_GetPCLK1Freq(), target_bitrate, &timings);
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if (result) while(true);
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CAN1->BTR = (((timings.resynchronization_jump_width - 1U) & 3U) << 24U) |
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(((timings.time_segment_1 - 1U) & 15U) << 16U) |
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(((timings.time_segment_2 - 1U) & 7U) << 20U) |
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((timings.baud_rate_prescaler - 1U) & 1023U);
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//// Set bit rates
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//CAN1->BTR &= ~(((0x03) << 24) | ((0x07) << 20) | ((0x0F) << 16) | (0x1FF));
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//CAN1->BTR |= (((can_configs[bitrate].TS2-1) & 0x07) << 20) | (((can_configs[bitrate].TS1-1) & 0x0F) << 16) | ((can_configs[bitrate].BRP-1) & 0x1FF);
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// Configure Filters to default values
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CAN1->FMR |= 0x1UL; // Set to filter initialization mode
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@ -232,6 +406,7 @@ void checkDataRequest() {
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void canSend(CAN_msg_t* CAN_tx_msg, uint8_t mbx = 0) {
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volatile uint32_t count = 0;
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CAN1->sTxMailBox[mbx].TIR = 0;
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CAN1->sTxMailBox[mbx].TIR = (CAN_tx_msg->id) << 21;
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CAN1->sTxMailBox[mbx].TDTR &= ~(0xF);
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@ -269,7 +444,7 @@ void loop() {
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switch(MAX31855_chips[i].detectThermocouple(rawData[i])) {
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case MAX31855_THERMOCOUPLE_OK:
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//egt[i] = (MAX31855_chips[i].getTemperature(rawData[i]));
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egt[i] = (rawData[i] >> 18)/4;
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egt[i] = (rawData[i] >> 20);
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LOG_D("Temp: %6d \n\r", egt[i]);
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break;
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case MAX31855_THERMOCOUPLE_SHORT_TO_VCC:
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Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
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@ -0,0 +1,145 @@
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newmtl mtl1
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Ka 0.62 0.62 0.36
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Kd 0.62 0.62 0.36
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Ks 0.00 0.00 0.00
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endmtl
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newmtl mtl2
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Ka 0.21 0.21 0.21
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Kd 0.21 0.21 0.21
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Ks 0.02 0.02 0.02
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endmtl
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newmtl mtl3
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Ka 0.35 0.35 0.35
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Kd 0.35 0.35 0.35
|
||||
Ks 0.02 0.02 0.02
|
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endmtl
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newmtl mtl4
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Ka 0.67 0.67 0.67
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||||
Kd 0.67 0.67 0.67
|
||||
Ks 0.47 0.47 0.47
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endmtl
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newmtl mtl5
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Ka 1.00 1.00 1.00
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Kd 1.00 1.00 1.00
|
||||
Ks 0.88 0.88 0.88
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endmtl
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newmtl mtl6
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Ka 0.59 0.46 0.00
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||||
Kd 0.59 0.46 0.00
|
||||
Ks 0.29 0.23 0.00
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endmtl
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newmtl mtl7
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Ka 0.85 0.85 0.85
|
||||
Kd 0.85 0.85 0.85
|
||||
Ks 0.43 0.43 0.43
|
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endmtl
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||||
newmtl mtl8
|
||||
Ka 0.22 0.22 0.22
|
||||
Kd 0.22 0.22 0.22
|
||||
Ks 0.11 0.11 0.11
|
||||
endmtl
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||||
newmtl mtl9
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Ka 0.85 0.85 0.85
|
||||
Kd 0.85 0.85 0.85
|
||||
Ks 0.42 0.42 0.42
|
||||
endmtl
|
||||
newmtl mtl10
|
||||
Ka 1.00 0.98 0.94
|
||||
Kd 1.00 0.98 0.94
|
||||
Ks 0.50 0.49 0.47
|
||||
endmtl
|
||||
newmtl mtl11
|
||||
Ka 0.75 0.75 0.75
|
||||
Kd 0.75 0.75 0.75
|
||||
Ks 0.38 0.38 0.38
|
||||
endmtl
|
||||
newmtl mtl12
|
||||
Ka 0.50 0.50 0.50
|
||||
Kd 0.50 0.50 0.50
|
||||
Ks 0.25 0.25 0.25
|
||||
endmtl
|
||||
newmtl mtl13
|
||||
Ka 0.70 0.65 0.09
|
||||
Kd 0.70 0.65 0.09
|
||||
Ks 0.05 0.05 0.01
|
||||
endmtl
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||||
newmtl mtl14
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||||
Ka 0.77 0.77 0.77
|
||||
Kd 0.77 0.77 0.77
|
||||
Ks 0.62 0.62 0.62
|
||||
endmtl
|
||||
newmtl mtl15
|
||||
Ka 0.25 0.25 0.25
|
||||
Kd 0.25 0.25 0.25
|
||||
Ks 0.07 0.07 0.07
|
||||
endmtl
|
||||
newmtl mtl16
|
||||
Ka 0.41 0.41 0.41
|
||||
Kd 0.41 0.41 0.41
|
||||
Ks 0.20 0.20 0.20
|
||||
endmtl
|
||||
newmtl mtl17
|
||||
Ka 0.15 0.15 0.15
|
||||
Kd 0.15 0.15 0.15
|
||||
Ks 0.04 0.04 0.04
|
||||
endmtl
|
||||
newmtl mtl18
|
||||
Ka 0.65 0.65 0.65
|
||||
Kd 0.65 0.65 0.65
|
||||
Ks 0.20 0.20 0.20
|
||||
endmtl
|
||||
newmtl mtl19
|
||||
Ka 0.45 0.43 0.42
|
||||
Kd 0.45 0.43 0.42
|
||||
Ks 0.03 0.03 0.03
|
||||
endmtl
|
||||
newmtl mtl20
|
||||
Ka 0.63 0.63 0.63
|
||||
Kd 0.63 0.63 0.63
|
||||
Ks 0.04 0.04 0.04
|
||||
endmtl
|
||||
newmtl mtl21
|
||||
Ka 0.25 0.25 0.25
|
||||
Kd 0.25 0.25 0.25
|
||||
Ks 0.13 0.13 0.13
|
||||
endmtl
|
||||
newmtl mtl22
|
||||
Ka 1.00 0.65 0.00
|
||||
Kd 1.00 0.65 0.00
|
||||
Ks 0.50 0.33 0.00
|
||||
endmtl
|
||||
newmtl mtl23
|
||||
Ka 0.00 0.00 0.00
|
||||
Kd 0.00 0.00 0.00
|
||||
Ks 0.00 0.00 0.00
|
||||
endmtl
|
||||
newmtl mtl24
|
||||
Ka 0.83 0.67 0.13
|
||||
Kd 0.83 0.67 0.13
|
||||
Ks 0.83 0.67 0.13
|
||||
endmtl
|
||||
newmtl mtl25
|
||||
Ka 0.97 0.88 0.60
|
||||
Kd 0.97 0.88 0.60
|
||||
Ks 0.68 0.62 0.42
|
||||
endmtl
|
||||
newmtl mtl26
|
||||
Ka 1.00 1.00 1.00
|
||||
Kd 1.00 1.00 1.00
|
||||
Ks 0.50 0.50 0.50
|
||||
endmtl
|
||||
newmtl mtl27
|
||||
Ka 0.50 0.25 0.00
|
||||
Kd 0.50 0.25 0.00
|
||||
Ks 0.44 0.22 0.00
|
||||
endmtl
|
||||
newmtl mtl28
|
||||
Ka 0.39 0.51 0.70
|
||||
Kd 0.39 0.51 0.70
|
||||
Ks 0.03 0.04 0.05
|
||||
endmtl
|
||||
newmtl mtl29
|
||||
Ka 0.79 0.82 0.93
|
||||
Kd 0.79 0.82 0.93
|
||||
Ks 0.40 0.41 0.47
|
||||
endmtl
|
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Reference in New Issue