diff --git a/AT32F435_437_periph_lib_V2.0.8.chm b/AT32F435_437_periph_lib_V2.0.9.chm similarity index 75% rename from AT32F435_437_periph_lib_V2.0.8.chm rename to AT32F435_437_periph_lib_V2.0.9.chm index c39264dd..6d84e1ff 100644 Binary files a/AT32F435_437_periph_lib_V2.0.8.chm and b/AT32F435_437_periph_lib_V2.0.9.chm differ diff --git a/document/AT32F435_437固件库BSP&Pack应用指南.pdf b/document/AT32F435_437固件库BSP&Pack应用指南.pdf index a7703446..1d5168ac 100644 Binary files a/document/AT32F435_437固件库BSP&Pack应用指南.pdf and b/document/AT32F435_437固件库BSP&Pack应用指南.pdf differ diff --git a/document/ReleaseNotes_AT32F435_437_Firmware_Library.pdf b/document/ReleaseNotes_AT32F435_437_Firmware_Library.pdf index 32f2f69d..6e708007 100644 Binary files a/document/ReleaseNotes_AT32F435_437_Firmware_Library.pdf and b/document/ReleaseNotes_AT32F435_437_Firmware_Library.pdf differ diff --git a/libraries/cmsis/cm4/device_support/at32f435_437.h b/libraries/cmsis/cm4/device_support/at32f435_437.h index c1791fc5..782d8301 100644 --- a/libraries/cmsis/cm4/device_support/at32f435_437.h +++ b/libraries/cmsis/cm4/device_support/at32f435_437.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 header file ************************************************************************** * Copyright notice & Disclaimer @@ -100,7 +100,7 @@ extern "C" { */ #define __AT32F435_437_LIBRARY_VERSION_MAJOR (0x02) /*!< [31:24] major version */ #define __AT32F435_437_LIBRARY_VERSION_MIDDLE (0x00) /*!< [23:16] middle version */ -#define __AT32F435_437_LIBRARY_VERSION_MINOR (0x08) /*!< [15:8] minor version */ +#define __AT32F435_437_LIBRARY_VERSION_MINOR (0x09) /*!< [15:8] minor version */ #define __AT32F435_437_LIBRARY_VERSION_RC (0x00) /*!< [7:0] release candidate */ #define __AT32F435_437_LIBRARY_VERSION ((__AT32F435_437_LIBRARY_VERSION_MAJOR << 24) | \ (__AT32F435_437_LIBRARY_VERSION_MIDDLE << 16) | \ diff --git a/libraries/cmsis/cm4/device_support/at32f435_437_conf_template.h b/libraries/cmsis/cm4/device_support/at32f435_437_conf_template.h index f117d2f9..b9f6bf61 100644 --- a/libraries/cmsis/cm4/device_support/at32f435_437_conf_template.h +++ b/libraries/cmsis/cm4/device_support/at32f435_437_conf_template.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/libraries/cmsis/cm4/device_support/startup/gcc/startup_at32f435_437.s b/libraries/cmsis/cm4/device_support/startup/gcc/startup_at32f435_437.s index 7b16d524..a55c89df 100644 --- a/libraries/cmsis/cm4/device_support/startup/gcc/startup_at32f435_437.s +++ b/libraries/cmsis/cm4/device_support/startup/gcc/startup_at32f435_437.s @@ -1,8 +1,8 @@ /** ****************************************************************************** * @file startup_at32f435_437.s - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 devices vector table for gcc toolchain. * this module performs: * - set the initial sp diff --git a/libraries/cmsis/cm4/device_support/startup/iar/startup_at32f435_437.s b/libraries/cmsis/cm4/device_support/startup/iar/startup_at32f435_437.s index 64af9a4d..2235ce72 100644 --- a/libraries/cmsis/cm4/device_support/startup/iar/startup_at32f435_437.s +++ b/libraries/cmsis/cm4/device_support/startup/iar/startup_at32f435_437.s @@ -1,7 +1,7 @@ ;************************************************************************** ;* @file startup_at32f435_437.s -;* @version v2.0.8 -;* @date 2022-04-25 +;* @version v2.0.9 +;* @date 2022-06-28 ;* @brief at32f435_437 startup file for IAR Systems ;************************************************************************** ; diff --git a/libraries/cmsis/cm4/device_support/startup/mdk/startup_at32f435_437.s b/libraries/cmsis/cm4/device_support/startup/mdk/startup_at32f435_437.s index e477842a..49bb2973 100644 --- a/libraries/cmsis/cm4/device_support/startup/mdk/startup_at32f435_437.s +++ b/libraries/cmsis/cm4/device_support/startup/mdk/startup_at32f435_437.s @@ -1,7 +1,7 @@ ;************************************************************************** ;* @file startup_at32f435_437.s -;* @version v2.0.8 -;* @date 2022-04-25 +;* @version v2.0.9 +;* @date 2022-06-28 ;* @brief at32f435_437 startup file for keil ;************************************************************************** ; diff --git a/libraries/cmsis/cm4/device_support/system_at32f435_437.c b/libraries/cmsis/cm4/device_support/system_at32f435_437.c index ef12a7c3..749f81a9 100644 --- a/libraries/cmsis/cm4/device_support/system_at32f435_437.c +++ b/libraries/cmsis/cm4/device_support/system_at32f435_437.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file system_at32f435_437.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief contains all the functions for cmsis cortex-m4 system source file ************************************************************************** * Copyright notice & Disclaimer @@ -81,12 +81,12 @@ void SystemInit (void) /* wait sclk switch status */ while(CRM->cfg_bit.sclksts != CRM_SCLK_HICK); - /* reset cfg register, include sclk switch, ahbdiv, apb1div, apb2div, adcdiv, clkout bits */ - CRM->cfg = 0; - /* reset hexten, hextbyps, cfden and pllen bits */ CRM->ctrl &= ~(0x010D0000U); + /* reset cfg register, include sclk switch, ahbdiv, apb1div, apb2div, adcdiv, clkout bits */ + CRM->cfg = 0; + /* reset pllms pllns pllfr pllrcs bits */ CRM->pllcfg = 0x00033002U; diff --git a/libraries/cmsis/cm4/device_support/system_at32f435_437.h b/libraries/cmsis/cm4/device_support/system_at32f435_437.h index 3d3ebaf1..90cdc524 100644 --- a/libraries/cmsis/cm4/device_support/system_at32f435_437.h +++ b/libraries/cmsis/cm4/device_support/system_at32f435_437.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file system_at32f435_437.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief cmsis cortex-m4 system header file. ************************************************************************** * Copyright notice & Disclaimer @@ -39,6 +39,8 @@ extern "C" { * @{ */ +#define SystemCoreClock system_core_clock + /** @defgroup AT32F435_437_system_exported_variables * @{ */ diff --git a/libraries/cmsis/dsp/PrivateInclude/arm_sorting.h b/libraries/cmsis/dsp/PrivateInclude/arm_sorting.h index e4f26a11..434024c5 100644 --- a/libraries/cmsis/dsp/PrivateInclude/arm_sorting.h +++ b/libraries/cmsis/dsp/PrivateInclude/arm_sorting.h @@ -1,7 +1,7 @@ /****************************************************************************** * @file arm_sorting.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief Private header file for CMSIS DSP Library ******************************************************************************/ /* diff --git a/libraries/cmsis/dsp/PrivateInclude/arm_vec_fft.h b/libraries/cmsis/dsp/PrivateInclude/arm_vec_fft.h index a7929ce2..bd1ebade 100644 --- a/libraries/cmsis/dsp/PrivateInclude/arm_vec_fft.h +++ b/libraries/cmsis/dsp/PrivateInclude/arm_vec_fft.h @@ -1,7 +1,7 @@ /****************************************************************************** * @file arm_vec_fft.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief Private header file for CMSIS DSP Library ******************************************************************************/ /* diff --git a/libraries/cmsis/dsp/PrivateInclude/arm_vec_filtering.h b/libraries/cmsis/dsp/PrivateInclude/arm_vec_filtering.h index fc014860..1e536f0c 100644 --- a/libraries/cmsis/dsp/PrivateInclude/arm_vec_filtering.h +++ b/libraries/cmsis/dsp/PrivateInclude/arm_vec_filtering.h @@ -1,7 +1,7 @@ /****************************************************************************** * @file arm_vec_filtering.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief Private header file for CMSIS DSP Library ******************************************************************************/ /* diff --git a/libraries/cmsis/dsp/include/arm_math.h b/libraries/cmsis/dsp/include/arm_math.h index 466e3e15..5f59e926 100644 --- a/libraries/cmsis/dsp/include/arm_math.h +++ b/libraries/cmsis/dsp/include/arm_math.h @@ -1,7 +1,7 @@ /****************************************************************************** * @file arm_math.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief Public header file for CMSIS DSP Library ******************************************************************************/ /* diff --git a/libraries/cmsis/dsp/include/arm_vec_math.h b/libraries/cmsis/dsp/include/arm_vec_math.h index 3404d1b6..e2876310 100644 --- a/libraries/cmsis/dsp/include/arm_vec_math.h +++ b/libraries/cmsis/dsp/include/arm_vec_math.h @@ -1,7 +1,7 @@ /****************************************************************************** * @file arm_vec_math.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief Public header file for CMSIS DSP Library ******************************************************************************/ /* diff --git a/libraries/drivers/inc/at32f435_437_acc.h b/libraries/drivers/inc/at32f435_437_acc.h index dabc1ee1..450d7b3b 100644 --- a/libraries/drivers/inc/at32f435_437_acc.h +++ b/libraries/drivers/inc/at32f435_437_acc.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_acc.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 acc header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/libraries/drivers/inc/at32f435_437_adc.h b/libraries/drivers/inc/at32f435_437_adc.h index 4bf8eb4f..be55c9a5 100644 --- a/libraries/drivers/inc/at32f435_437_adc.h +++ b/libraries/drivers/inc/at32f435_437_adc.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_adc.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 adc header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/libraries/drivers/inc/at32f435_437_can.h b/libraries/drivers/inc/at32f435_437_can.h index e8fe5a6b..56dc4bf6 100644 --- a/libraries/drivers/inc/at32f435_437_can.h +++ b/libraries/drivers/inc/at32f435_437_can.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_can.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 can header file ************************************************************************** * Copyright notice & Disclaimer @@ -352,7 +352,7 @@ typedef struct */ typedef struct { - uint16_t baudrate_div; /*!< baudrate division,this parameter can be 0x001~0x400.*/ + uint16_t baudrate_div; /*!< baudrate division,this parameter can be 0x001~0x1000.*/ can_rsaw_type rsaw_size; /*!< resynchronization adjust width */ diff --git a/libraries/drivers/inc/at32f435_437_crc.h b/libraries/drivers/inc/at32f435_437_crc.h index e7537a30..a6f8d9cb 100644 --- a/libraries/drivers/inc/at32f435_437_crc.h +++ b/libraries/drivers/inc/at32f435_437_crc.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_crc.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 crc header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/libraries/drivers/inc/at32f435_437_crm.h b/libraries/drivers/inc/at32f435_437_crm.h index eade8c8b..4dce78d5 100644 --- a/libraries/drivers/inc/at32f435_437_crm.h +++ b/libraries/drivers/inc/at32f435_437_crm.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_crm.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 crm header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/libraries/drivers/inc/at32f435_437_dac.h b/libraries/drivers/inc/at32f435_437_dac.h index deee7ccc..b26769cc 100644 --- a/libraries/drivers/inc/at32f435_437_dac.h +++ b/libraries/drivers/inc/at32f435_437_dac.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_dac.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 dac header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/libraries/drivers/inc/at32f435_437_debug.h b/libraries/drivers/inc/at32f435_437_debug.h index 9f685b56..00d189a7 100644 --- a/libraries/drivers/inc/at32f435_437_debug.h +++ b/libraries/drivers/inc/at32f435_437_debug.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_mcudbg.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 mcudbg header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/libraries/drivers/inc/at32f435_437_def.h b/libraries/drivers/inc/at32f435_437_def.h index c3a3f3ca..0f79450e 100644 --- a/libraries/drivers/inc/at32f435_437_def.h +++ b/libraries/drivers/inc/at32f435_437_def.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_def.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 macros header file ************************************************************************** * Copyright notice & Disclaimer @@ -62,6 +62,8 @@ extern "C" { #endif #endif +#define UNUSED(x) (void)x /* to avoid gcc/g++ warnings */ + #ifdef __cplusplus } #endif diff --git a/libraries/drivers/inc/at32f435_437_dma.h b/libraries/drivers/inc/at32f435_437_dma.h index 49769726..f690f741 100644 --- a/libraries/drivers/inc/at32f435_437_dma.h +++ b/libraries/drivers/inc/at32f435_437_dma.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_dma.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 dma header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/libraries/drivers/inc/at32f435_437_dvp.h b/libraries/drivers/inc/at32f435_437_dvp.h index 36f72262..a93f6f1e 100644 --- a/libraries/drivers/inc/at32f435_437_dvp.h +++ b/libraries/drivers/inc/at32f435_437_dvp.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_dvp.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 dvp header file ************************************************************************** * Copyright notice & Disclaimer @@ -204,17 +204,17 @@ typedef enum { DVP_STATUS_HSYN = 0x00, DVP_STATUS_VSYN = 0x01, - DVP_STATUS_OFS = 0x02 + DVP_STATUS_OFNE = 0x02 } dvp_status_basic_type; /** - * @brief dvp pcdse type + * @brief dvp pcdes type */ typedef enum { - DVP_PCDSE_CAP_FIRST = 0x00, - DVP_PCDSE_DROP_FIRST = 0x01 -} dvp_pcdse_type; + DVP_PCDES_CAP_FIRST = 0x00, + DVP_PCDES_DROP_FIRST = 0x01 +} dvp_pcdes_type; /** * @brief dvp efdf type @@ -224,18 +224,18 @@ typedef enum DVP_EFDF_BYPASS = 0x00, DVP_EFDF_YUV422_UYVY = 0x04, DVP_EFDF_YUV422_YUYV = 0x05, - DVP_EFDF_YUV444 = 0x06, + DVP_EFDF_RGB565_555 = 0x06, DVP_EFDF_Y8 = 0x07 } dvp_efdf_type; /** - * @brief dvp iduc type + * @brief dvp idus type */ typedef enum { - DVP_IDUC_MSB = 0x00, - DVP_IDUC_LSB = 0x01 -} dvp_iduc_type; + DVP_IDUS_MSB = 0x00, + DVP_IDUS_LSB = 0x01 +} dvp_idus_type; /** * @brief dvp dmabt type @@ -247,22 +247,22 @@ typedef enum } dvp_dmabt_type; /** - * @brief dvp hseis type + * @brief dvp hseid type */ typedef enum { - DVP_HSEIS_LINE_END = 0x00, - DVP_HSEIS_LINE_START = 0x01 -} dvp_hseis_type; + DVP_HSEID_LINE_END = 0x00, + DVP_HSEID_LINE_START = 0x01 +} dvp_hseid_type; /** - * @brief dvp vseis type + * @brief dvp vseid type */ typedef enum { - DVP_VSEIS_FRAME_END = 0x00, - DVP_VSEIS_FRMAE_START = 0x01 -} dvp_vseis_type; + DVP_VSEID_FRAME_END = 0x00, + DVP_VSEID_FRMAE_START = 0x01 +} dvp_vseid_type; /** * @brief dvp idun type */ @@ -315,7 +315,7 @@ typedef struct { __IO uint32_t hsyn : 1; /* [0] */ __IO uint32_t vsyn : 1; /* [1] */ - __IO uint32_t ofs : 1; /* [2] */ + __IO uint32_t ofne : 1; /* [2] */ __IO uint32_t reserved1 : 29;/* [31:3] */ } sts_bit; }; @@ -479,18 +479,18 @@ typedef struct __IO uint32_t eisre : 1; /* [0] */ __IO uint32_t efrce : 1; /* [1] */ __IO uint32_t mibe : 1; /* [2] */ - __IO uint32_t pcdse : 1; /* [3] */ + __IO uint32_t pcdes : 1; /* [3] */ __IO uint32_t efdf : 3; /* [6:4] */ __IO uint32_t reserved1 : 1; /* [7] */ __IO uint32_t idun : 2; /* [9:8] */ - __IO uint32_t iduc : 1; /* [10] */ + __IO uint32_t idus : 1; /* [10] */ __IO uint32_t reserved2 : 1; /* [11] */ __IO uint32_t dmabt : 1; /* [12] */ __IO uint32_t reserved3 : 1; /* [13] */ __IO uint32_t reserved4 : 1; /* [14] */ __IO uint32_t reserved5 : 1; /* [15] */ - __IO uint32_t hseis : 1; /* [16] */ - __IO uint32_t vseis : 1; /* [17] */ + __IO uint32_t hseid : 1; /* [16] */ + __IO uint32_t vseid : 1; /* [17] */ __IO uint32_t reserved6 : 1; /* [18] */ __IO uint32_t reserved7 : 2; /* [20:19] */ __IO uint32_t reserved8 : 11;/* [31:21] */ @@ -540,9 +540,9 @@ typedef struct __IO uint32_t frf; struct { - __IO uint32_t efrcfm : 5; /* [4:0] */ + __IO uint32_t efrcsf : 5; /* [4:0] */ __IO uint32_t reserved1 : 3; /* [7:5] */ - __IO uint32_t efrcfn : 5; /* [12:8] */ + __IO uint32_t efrctf : 5; /* [12:8] */ __IO uint32_t reserved2 : 19;/* [31:13] */ } frf_bit; }; @@ -572,10 +572,12 @@ typedef struct * @{ */ +void dvp_reset(void); +void dvp_capture_enable(confirm_state new_state); void dvp_capture_enable(confirm_state new_state); void dvp_capture_mode_set(dvp_cfm_type cap_mode); void dvp_window_crop_enable(confirm_state new_state); -void dvp_window_crop_set(uint16_t crop_x, uint16_t crop_y, uint16_t crop_w, uint16_t crop_h); +void dvp_window_crop_set(uint16_t crop_x, uint16_t crop_y, uint16_t crop_w, uint16_t crop_h, uint8_t bytes); void dvp_jpeg_enable(confirm_state new_state); void dvp_sync_mode_set(dvp_sm_type sync_mode); void dvp_sync_code_set(uint8_t fmsc, uint8_t fmec, uint8_t lnsc, uint8_t lnec); @@ -586,7 +588,7 @@ void dvp_vsync_polarity_set(dvp_vsp_type vsync_pol); void dvp_basic_frame_rate_control_set(dvp_bfrc_type dvp_bfrc); void dvp_pixel_data_length_set(dvp_pdl_type dvp_pdl); void dvp_enable(confirm_state new_state); -void dvp_zoomout_select(dvp_pcdse_type dvp_pcdse); +void dvp_zoomout_select(dvp_pcdes_type dvp_pcdes); void dvp_zoomout_set(dvp_pcdc_type dvp_pcdc, dvp_pcds_type dvp_pcds, dvp_lcdc_type dvp_lcdc, dvp_lcds_type dvp_lcds); flag_status dvp_basic_status_get(dvp_status_basic_type dvp_status_basic); void dvp_interrupt_enable(uint32_t dvp_int, confirm_state new_state); @@ -594,12 +596,12 @@ flag_status dvp_flag_get(uint32_t flag); void dvp_flag_clear(uint32_t flag); void dvp_enhanced_scaling_resize_enable(confirm_state new_state); void dvp_enhanced_scaling_resize_set(uint16_t src_w, uint16_t des_w, uint16_t src_h, uint16_t des_h); -void dvp_enhanced_framerate_set(uint16_t efrcfm, uint16_t efrcfn, confirm_state new_state); +void dvp_enhanced_framerate_set(uint16_t efrcsf, uint16_t efrctf, confirm_state new_state); void dvp_monochrome_image_binarization_set(uint8_t mibthd, confirm_state new_state); void dvp_enhanced_data_format_set(dvp_efdf_type dvp_efdf); -void dvp_input_data_unused_set(dvp_iduc_type dvp_iduc, dvp_idun_type dvp_idun); +void dvp_input_data_unused_set(dvp_idus_type dvp_idus, dvp_idun_type dvp_idun); void dvp_dma_burst_set(dvp_dmabt_type dvp_dmabt); -void dvp_sync_event_interrupt_set(dvp_hseis_type dvp_hseis, dvp_vseis_type dvp_vseis); +void dvp_sync_event_interrupt_set(dvp_hseid_type dvp_hseid, dvp_vseid_type dvp_vseid); /** * @} diff --git a/libraries/drivers/inc/at32f435_437_edma.h b/libraries/drivers/inc/at32f435_437_edma.h index 42933c8e..a373ff44 100644 --- a/libraries/drivers/inc/at32f435_437_edma.h +++ b/libraries/drivers/inc/at32f435_437_edma.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_edma.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 edma header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/libraries/drivers/inc/at32f435_437_emac.h b/libraries/drivers/inc/at32f435_437_emac.h index aad7f5af..a5d6120e 100644 --- a/libraries/drivers/inc/at32f435_437_emac.h +++ b/libraries/drivers/inc/at32f435_437_emac.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_emac.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 eth header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/libraries/drivers/inc/at32f435_437_ertc.h b/libraries/drivers/inc/at32f435_437_ertc.h index 19d854d8..35d9a5c2 100644 --- a/libraries/drivers/inc/at32f435_437_ertc.h +++ b/libraries/drivers/inc/at32f435_437_ertc.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_ertc.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 ertc header file ************************************************************************** * Copyright notice & Disclaimer @@ -90,6 +90,16 @@ extern "C" { #define ERTC_ALARM_MASK_DATE_WEEK ((uint32_t)0x80000000) /*!< ertc alarm don't match date or week */ #define ERTC_ALARM_MASK_ALL ((uint32_t)0x80808080) /*!< ertc alarm don't match all */ +/** + * @} + */ + +/** + * @brief compatible with older versions + */ +#define ERTC_WAT_CLK_CK_A_16BITS ERTC_WAT_CLK_CK_B_16BITS +#define ERTC_WAT_CLK_CK_A_17BITS ERTC_WAT_CLK_CK_B_17BITS + /** * @} */ @@ -167,8 +177,8 @@ typedef enum ERTC_WAT_CLK_ERTCCLK_DIV8 = 0x01, /*!< the wake up timer clock is ERTC_CLK / 8 */ ERTC_WAT_CLK_ERTCCLK_DIV4 = 0x02, /*!< the wake up timer clock is ERTC_CLK / 4 */ ERTC_WAT_CLK_ERTCCLK_DIV2 = 0x03, /*!< the wake up timer clock is ERTC_CLK / 2 */ - ERTC_WAT_CLK_CK_A_16BITS = 0x04, /*!< the wake up timer clock is CK_A, wakeup counter = ERTC_WAT */ - ERTC_WAT_CLK_CK_A_17BITS = 0x06 /*!< the wake up timer clock is CK_A, wakeup counter = ERTC_WAT + 65535 */ + ERTC_WAT_CLK_CK_B_16BITS = 0x04, /*!< the wake up timer clock is CK_B, wakeup counter = ERTC_WAT */ + ERTC_WAT_CLK_CK_B_17BITS = 0x06 /*!< the wake up timer clock is CK_B, wakeup counter = ERTC_WAT + 65535 */ } ertc_wakeup_clock_type; /** diff --git a/libraries/drivers/inc/at32f435_437_exint.h b/libraries/drivers/inc/at32f435_437_exint.h index 7b2a53fa..b2356215 100644 --- a/libraries/drivers/inc/at32f435_437_exint.h +++ b/libraries/drivers/inc/at32f435_437_exint.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_exint.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 exint header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/libraries/drivers/inc/at32f435_437_flash.h b/libraries/drivers/inc/at32f435_437_flash.h index 5076f1a9..862ba8c4 100644 --- a/libraries/drivers/inc/at32f435_437_flash.h +++ b/libraries/drivers/inc/at32f435_437_flash.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_flash.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 flash header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/libraries/drivers/inc/at32f435_437_gpio.h b/libraries/drivers/inc/at32f435_437_gpio.h index 56b4e3ef..17f0903e 100644 --- a/libraries/drivers/inc/at32f435_437_gpio.h +++ b/libraries/drivers/inc/at32f435_437_gpio.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_gpio.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 gpio header file ************************************************************************** * Copyright notice & Disclaimer @@ -541,7 +541,7 @@ uint16_t gpio_output_data_read(gpio_type *gpio_x); void gpio_bits_set(gpio_type *gpio_x, uint16_t pins); void gpio_bits_reset(gpio_type *gpio_x, uint16_t pins); void gpio_bits_write(gpio_type *gpio_x, uint16_t pins, confirm_state bit_state); -void gpio_port_wirte(gpio_type *gpio_x, uint16_t port_value); +void gpio_port_write(gpio_type *gpio_x, uint16_t port_value); void gpio_pin_wp_config(gpio_type *gpio_x, uint16_t pins); void gpio_pins_huge_driven_config(gpio_type *gpio_x, uint16_t pins, confirm_state new_state); void gpio_pin_mux_config(gpio_type *gpio_x, gpio_pins_source_type gpio_pin_source, gpio_mux_sel_type gpio_mux); diff --git a/libraries/drivers/inc/at32f435_437_i2c.h b/libraries/drivers/inc/at32f435_437_i2c.h index d8b35d68..10bdae1d 100644 --- a/libraries/drivers/inc/at32f435_437_i2c.h +++ b/libraries/drivers/inc/at32f435_437_i2c.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_i2c.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 i2c header file ************************************************************************** * Copyright notice & Disclaimer @@ -176,14 +176,14 @@ typedef enum } i2c_reload_stop_mode_type; /** - * @brief i2c start stop mode + * @brief i2c start mode */ typedef enum { I2C_WITHOUT_START = 0x00000000, /*!< transfer data without start condition */ I2C_GEN_START_READ = 0x00002400, /*!< read data and generate start */ I2C_GEN_START_WRITE = 0x00002000 /*!< send data and generate start */ -} i2c_start_stop_mode_type; +} i2c_start_mode_type; /** * @brief type define i2c register all @@ -452,7 +452,7 @@ void i2c_ext_timeout_enable(i2c_type *i2c_x, confirm_state new_state); void i2c_interrupt_enable(i2c_type *i2c_x, uint32_t source, confirm_state new_state); flag_status i2c_interrupt_get(i2c_type *i2c_x, uint16_t source); void i2c_dma_enable(i2c_type *i2c_x, i2c_dma_request_type dma_req, confirm_state new_state); -void i2c_transmit_set(i2c_type *i2c_x, uint16_t address, uint8_t cnt, i2c_reload_stop_mode_type rld_stop, i2c_start_stop_mode_type start_stop); +void i2c_transmit_set(i2c_type *i2c_x, uint16_t address, uint8_t cnt, i2c_reload_stop_mode_type rld_stop, i2c_start_mode_type start); void i2c_start_generate(i2c_type *i2c_x); void i2c_stop_generate(i2c_type *i2c_x); void i2c_data_send(i2c_type *i2c_x, uint8_t data); diff --git a/libraries/drivers/inc/at32f435_437_misc.h b/libraries/drivers/inc/at32f435_437_misc.h index 478acea4..f10ab892 100644 --- a/libraries/drivers/inc/at32f435_437_misc.h +++ b/libraries/drivers/inc/at32f435_437_misc.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_misc.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 misc header file ************************************************************************** * Copyright notice & Disclaimer @@ -76,9 +76,9 @@ typedef enum */ typedef enum { - NVIC_LP_SLEEPONEXIT = 0x02, /*!< send event on pending */ + NVIC_LP_SLEEPONEXIT = 0x02, /*!< enable sleep-on-exit feature */ NVIC_LP_SLEEPDEEP = 0x04, /*!< enable sleep-deep output signal when entering sleep mode */ - NVIC_LP_SEVONPEND = 0x10 /*!< enable sleep-on-exit feature */ + NVIC_LP_SEVONPEND = 0x10 /*!< send event on pending */ } nvic_lowpower_mode_type; /** diff --git a/libraries/drivers/inc/at32f435_437_pwc.h b/libraries/drivers/inc/at32f435_437_pwc.h index c09f8f5d..5fa67ed6 100644 --- a/libraries/drivers/inc/at32f435_437_pwc.h +++ b/libraries/drivers/inc/at32f435_437_pwc.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_pwc.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 pwr header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/libraries/drivers/inc/at32f435_437_qspi.h b/libraries/drivers/inc/at32f435_437_qspi.h index cee6edc5..3acb5110 100644 --- a/libraries/drivers/inc/at32f435_437_qspi.h +++ b/libraries/drivers/inc/at32f435_437_qspi.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_qspi.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 qspi header file ************************************************************************** * Copyright notice & Disclaimer @@ -517,12 +517,12 @@ typedef struct */ void qspi_encryption_enable(qspi_type* qspi_x, confirm_state new_state); -void qspi_sck_mode_set( qspi_type* qspi_x, qspi_clk_mode_type new_mode); +void qspi_sck_mode_set(qspi_type* qspi_x, qspi_clk_mode_type new_mode); void qspi_clk_division_set(qspi_type* qspi_x, qspi_clk_div_type new_clkdiv); void qspi_xip_cache_bypass_set(qspi_type* qspi_x, confirm_state new_state); void qspi_interrupt_enable(qspi_type* qspi_x, confirm_state new_state); flag_status qspi_flag_get(qspi_type* qspi_x, uint32_t flag); -void qspi_flag_clear( qspi_type* qspi_x, uint32_t flag); +void qspi_flag_clear(qspi_type* qspi_x, uint32_t flag); void qspi_dma_rx_threshold_set(qspi_type* qspi_x, qspi_dma_fifo_thod_type new_threshold); void qspi_dma_tx_threshold_set(qspi_type* qspi_x, qspi_dma_fifo_thod_type new_threshold); void qspi_dma_enable(qspi_type* qspi_x, confirm_state new_state); diff --git a/libraries/drivers/inc/at32f435_437_scfg.h b/libraries/drivers/inc/at32f435_437_scfg.h index b322e681..507a0b59 100644 --- a/libraries/drivers/inc/at32f435_437_scfg.h +++ b/libraries/drivers/inc/at32f435_437_scfg.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_scfg.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 system config header file ************************************************************************** * Copyright notice & Disclaimer @@ -57,9 +57,9 @@ extern "C" { typedef enum { SCFG_XMC_SWAP_NONE = 0x00, /* no swap */ - SCFG_XMC_SWAP_MODE1 = 0x01, /* sdram nor psram sram nand2 swap */ - SCFG_XMC_SWAP_MODE2 = 0x02, /* nand3 qspi2 swap */ - SCFG_XMC_SWAP_MODE3 = 0x03 /* sdram nor psram sram nand2 nand3 qspi2 swap */ + SCFG_XMC_SWAP_MODE1 = 0x01, /* sdram 0x60000000 and 0x70000000, nor psram sram nand2 0xC00000000 and 0xD0000000 */ + SCFG_XMC_SWAP_MODE2 = 0x02, /* qspi2 0x80000000, nand3 0xB0000000 */ + SCFG_XMC_SWAP_MODE3 = 0x03 /* sdram 0x60000000 and 0x70000000, nor psram sram nand2 0xC00000000 and 0xD0000000, qspi2 0x80000000, nand3 0xB0000000 */ } scfg_xmc_swap_type; /** diff --git a/libraries/drivers/inc/at32f435_437_sdio.h b/libraries/drivers/inc/at32f435_437_sdio.h index 7aa974f5..2577e5f5 100644 --- a/libraries/drivers/inc/at32f435_437_sdio.h +++ b/libraries/drivers/inc/at32f435_437_sdio.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_sdio.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 sdio header file ************************************************************************** * Copyright notice & Disclaimer @@ -578,7 +578,7 @@ typedef struct void sdio_reset(sdio_type *sdio_x); void sdio_power_set(sdio_type *sdio_x, sdio_power_state_type power_state); -flag_status sdio_power_status_get(sdio_type *sdio_x); +sdio_power_state_type sdio_power_status_get(sdio_type *sdio_x); void sdio_clock_config(sdio_type *sdio_x, uint16_t clk_div, sdio_edge_phase_type clk_edg); void sdio_bus_width_config(sdio_type *sdio_x, sdio_bus_width_type width); void sdio_clock_bypass(sdio_type *sdio_x, confirm_state new_state); diff --git a/libraries/drivers/inc/at32f435_437_spi.h b/libraries/drivers/inc/at32f435_437_spi.h index 3b6061d9..136288b5 100644 --- a/libraries/drivers/inc/at32f435_437_spi.h +++ b/libraries/drivers/inc/at32f435_437_spi.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_spi.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 spi header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/libraries/drivers/inc/at32f435_437_tmr.h b/libraries/drivers/inc/at32f435_437_tmr.h index e51ef35f..2da8c850 100644 --- a/libraries/drivers/inc/at32f435_437_tmr.h +++ b/libraries/drivers/inc/at32f435_437_tmr.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_tmr.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 tmr header file ************************************************************************** * Copyright notice & Disclaimer @@ -54,6 +54,7 @@ extern "C" { #define TMR_C2_FLAG ((uint32_t)0x000004) /*!< tmr flag channel 2 */ #define TMR_C3_FLAG ((uint32_t)0x000008) /*!< tmr flag channel 3 */ #define TMR_C4_FLAG ((uint32_t)0x000010) /*!< tmr flag channel 4 */ +#define TMR_C5_FLAG ((uint32_t)0x010000) /*!< tmr flag channel 5 */ #define TMR_HALL_FLAG ((uint32_t)0x000020) /*!< tmr flag hall */ #define TMR_TRIGGER_FLAG ((uint32_t)0x000040) /*!< tmr flag trigger */ #define TMR_BRK_FLAG ((uint32_t)0x000080) /*!< tmr flag brake */ @@ -291,17 +292,6 @@ typedef enum TMR_BRK_SWTRIG = 0x00000080 /*!< tmr event triggered by software of brake */ }tmr_event_trigger_type; -/** - * @brief tmr channel output fast type - */ -typedef enum -{ - TMR_CHANNEL1_OUTPUT_FAST = MAKE_VALUE(0x18, 2), /*!< tmr channel 1 output fast mode */ - TMR_CHANNEL2_OUTPUT_FAST = MAKE_VALUE(0x18, 10), /*!< tmr channel 2 output fast mode */ - TMR_CHANNEL3_OUTPUT_FAST = MAKE_VALUE(0x1c, 2), /*!< tmr channel 3 output fast mode */ - TMR_CHANNEL4_OUTPUT_FAST = MAKE_VALUE(0x1c, 10) /*!< tmr channel 4 output fast mode */ -}tmr_channel_output_fast_type; - /** * @brief tmr polarity active type */ @@ -962,7 +952,7 @@ void tmr_input_channel_filter_set(tmr_type *tmr_x, tmr_channel_select_type tmr_c uint16_t filter_value); void tmr_pwm_input_config(tmr_type *tmr_x, tmr_input_config_type *input_struct, \ tmr_channel_input_divider_type divider_factor); -void tmr_channel1_input_select(tmr_type *tmr_x, tmr_channel1_input_connected_type ti1_connect); +void tmr_channel1_input_select(tmr_type *tmr_x, tmr_channel1_input_connected_type ch1_connect); void tmr_input_channel_divider_set(tmr_type *tmr_x, tmr_channel_select_type tmr_channel, \ tmr_channel_input_divider_type divider_factor); void tmr_primary_mode_select(tmr_type *tmr_x, tmr_primary_select_type primary_mode); @@ -980,7 +970,6 @@ void tmr_flag_clear(tmr_type *tmr_x, uint32_t tmr_flag); void tmr_event_sw_trigger(tmr_type *tmr_x, tmr_event_trigger_type tmr_event); void tmr_output_enable(tmr_type *tmr_x, confirm_state new_state); void tmr_internal_clock_set(tmr_type *tmr_x); -void tmr_output_channel_fast_set(tmr_type *tmr_x, tmr_channel_output_fast_type oc_fast); void tmr_output_channel_polarity_set(tmr_type *tmr_x, tmr_channel_select_type tmr_channel, \ tmr_polarity_active_type oc_polarity); void tmr_external_clock_config(tmr_type *tmr_x, tmr_external_signal_divider_type es_divide, \ diff --git a/libraries/drivers/inc/at32f435_437_usart.h b/libraries/drivers/inc/at32f435_437_usart.h index c1562035..036d4512 100644 --- a/libraries/drivers/inc/at32f435_437_usart.h +++ b/libraries/drivers/inc/at32f435_437_usart.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_usart.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 usart header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/libraries/drivers/inc/at32f435_437_usb.h b/libraries/drivers/inc/at32f435_437_usb.h index 59ce6bad..7cb94f11 100644 --- a/libraries/drivers/inc/at32f435_437_usb.h +++ b/libraries/drivers/inc/at32f435_437_usb.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_usb.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 usb header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/libraries/drivers/inc/at32f435_437_wdt.h b/libraries/drivers/inc/at32f435_437_wdt.h index ebe80ad1..4c98906e 100644 --- a/libraries/drivers/inc/at32f435_437_wdt.h +++ b/libraries/drivers/inc/at32f435_437_wdt.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_wdt.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 wdt header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/libraries/drivers/inc/at32f435_437_wwdt.h b/libraries/drivers/inc/at32f435_437_wwdt.h index 5a766a63..314869d8 100644 --- a/libraries/drivers/inc/at32f435_437_wwdt.h +++ b/libraries/drivers/inc/at32f435_437_wwdt.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_wwdt.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 wwdt header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/libraries/drivers/inc/at32f435_437_xmc.h b/libraries/drivers/inc/at32f435_437_xmc.h index 45566dc7..0958369b 100644 --- a/libraries/drivers/inc/at32f435_437_xmc.h +++ b/libraries/drivers/inc/at32f435_437_xmc.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_xmc.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 xmc header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/libraries/drivers/src/at32f435_437_acc.c b/libraries/drivers/src/at32f435_437_acc.c index 011a9f63..3f85a5c5 100644 --- a/libraries/drivers/src/at32f435_437_acc.c +++ b/libraries/drivers/src/at32f435_437_acc.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_acc.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief contains all the functions for the acc firmware library ************************************************************************** * Copyright notice & Disclaimer diff --git a/libraries/drivers/src/at32f435_437_adc.c b/libraries/drivers/src/at32f435_437_adc.c index e73807af..cf47d7e8 100644 --- a/libraries/drivers/src/at32f435_437_adc.c +++ b/libraries/drivers/src/at32f435_437_adc.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_adc.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief contains all the functions for the adc firmware library ************************************************************************** * Copyright notice & Disclaimer diff --git a/libraries/drivers/src/at32f435_437_can.c b/libraries/drivers/src/at32f435_437_can.c index cd54e109..b963adda 100644 --- a/libraries/drivers/src/at32f435_437_can.c +++ b/libraries/drivers/src/at32f435_437_can.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_can.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief contains all the functions for the can firmware library ************************************************************************** * Copyright notice & Disclaimer diff --git a/libraries/drivers/src/at32f435_437_crc.c b/libraries/drivers/src/at32f435_437_crc.c index b34a0123..b5fa987c 100644 --- a/libraries/drivers/src/at32f435_437_crc.c +++ b/libraries/drivers/src/at32f435_437_crc.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_crc.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief contains all the functions for the crc firmware library ************************************************************************** * Copyright notice & Disclaimer diff --git a/libraries/drivers/src/at32f435_437_crm.c b/libraries/drivers/src/at32f435_437_crm.c index 9fed8601..75d7f5d9 100644 --- a/libraries/drivers/src/at32f435_437_crm.c +++ b/libraries/drivers/src/at32f435_437_crm.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_crm.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief contains all the functions for the crm firmware library ************************************************************************** * Copyright notice & Disclaimer @@ -61,12 +61,12 @@ void crm_reset(void) /* wait sclk switch status */ while(CRM->cfg_bit.sclksts != CRM_SCLK_HICK); - /* reset cfg register, include sclk switch, ahbdiv, apb1div, apb2div, adcdiv, clkout bits */ - CRM->cfg = 0; - /* reset hexten, hextbyps, cfden and pllen bits */ CRM->ctrl &= ~(0x010D0000U); + /* reset cfg register, include sclk switch, ahbdiv, apb1div, apb2div, adcdiv, clkout bits */ + CRM->cfg = 0; + /* reset pllms pllns pllfr pllrcs bits */ CRM->pllcfg = 0x00033002U; @@ -367,6 +367,7 @@ void crm_flag_clear(uint32_t flag) case CRM_LOWPOWER_RESET_FLAG: case CRM_ALL_RESET_FLAG: CRM->ctrlsts_bit.rstfc = TRUE; + while(CRM->ctrlsts_bit.rstfc == TRUE); break; case CRM_LICK_READY_INT_FLAG: CRM->clkint_bit.lickstblfc = TRUE; diff --git a/libraries/drivers/src/at32f435_437_dac.c b/libraries/drivers/src/at32f435_437_dac.c index 63f0c810..b0b0d19f 100644 --- a/libraries/drivers/src/at32f435_437_dac.c +++ b/libraries/drivers/src/at32f435_437_dac.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_dac.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief contains all the functions for the dac firmware library ************************************************************************** * Copyright notice & Disclaimer diff --git a/libraries/drivers/src/at32f435_437_debug.c b/libraries/drivers/src/at32f435_437_debug.c index 96610e21..b8689e54 100644 --- a/libraries/drivers/src/at32f435_437_debug.c +++ b/libraries/drivers/src/at32f435_437_debug.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_mcudbg.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief contains all the functions for the mcudbg firmware library ************************************************************************** * Copyright notice & Disclaimer diff --git a/libraries/drivers/src/at32f435_437_dma.c b/libraries/drivers/src/at32f435_437_dma.c index b1cb9662..f521c977 100644 --- a/libraries/drivers/src/at32f435_437_dma.c +++ b/libraries/drivers/src/at32f435_437_dma.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_dma.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief contains all the functions for the dma firmware library ************************************************************************** * Copyright notice & Disclaimer diff --git a/libraries/drivers/src/at32f435_437_dvp.c b/libraries/drivers/src/at32f435_437_dvp.c index 4a1b5a8d..ad278d65 100644 --- a/libraries/drivers/src/at32f435_437_dvp.c +++ b/libraries/drivers/src/at32f435_437_dvp.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_dvp.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief contains all the functions for the dvp firmware library ************************************************************************** * Copyright notice & Disclaimer @@ -41,6 +41,17 @@ * @{ */ +/** + * @brief reset the dvp register + * @param none + * @retval none + */ +void dvp_reset(void) +{ + crm_periph_reset(CRM_DVP_PERIPH_RESET, TRUE); + crm_periph_reset(CRM_DVP_PERIPH_RESET, FALSE); +} + /** * @brief enable or disable dvp capture * @param new_state (TRUE or FALSE) @@ -76,16 +87,18 @@ void dvp_window_crop_enable(confirm_state new_state) /** * @brief set dvp cropping window configuration - * @param crop_x(0x0000~0x3FFF): cropping window horizontal start pixel - * @param crop_y(0x0000~0x1FFF): cropping window vertical start pixel - * @param crop_w(0x0001~0x3FFF): cropping window horizontal pixel number - * @param crop_h(0x0001~0x3FFF): cropping window vertical pixel number + * @param crop_x: cropping window horizontal start pixel + * @param crop_y: cropping window vertical start line + * @param crop_w: cropping window horizontal pixel number + * @param crop_h: cropping window vertical line number + * @param bytes: the number of bytes corresponding to one pixel + * eg. y8:bytes = 1, rgb565:bytes = 2 * @retval none */ -void dvp_window_crop_set(uint16_t crop_x, uint16_t crop_y, uint16_t crop_w, uint16_t crop_h) +void dvp_window_crop_set(uint16_t crop_x, uint16_t crop_y, uint16_t crop_w, uint16_t crop_h, uint8_t bytes) { - DVP->cwst = ((crop_x * 2) | (crop_y << 16)); - DVP->cwsz = ((crop_w * 2 - 1) | ((crop_h - 1) << 16)); + DVP->cwst = ((crop_x * bytes) | (crop_y << 16)); + DVP->cwsz = ((crop_w * bytes - 1) | ((crop_h - 1) << 16)); } /** @@ -218,15 +231,15 @@ void dvp_enable(confirm_state new_state) /** * @brief set dvp zoomout select - * @param dvp_pcdse: pixel capture/drop selection extension (Only work when pcdc = 2) + * @param dvp_pcdes: pixel capture/drop selection extension (Only work when pcdc = 2) * this parameter can be one of the following values: - * - DVP_PCDSE_CAP_FIRST - * - DVP_PCDSE_DROP_FIRST + * - DVP_PCDES_CAP_FIRST + * - DVP_PCDES_DROP_FIRST * @retval none */ -void dvp_zoomout_select(dvp_pcdse_type dvp_pcdse) +void dvp_zoomout_select(dvp_pcdes_type dvp_pcdes) { - DVP->actrl_bit.pcdse = dvp_pcdse; + DVP->actrl_bit.pcdes = dvp_pcdes; } /** @@ -265,7 +278,7 @@ void dvp_zoomout_set(dvp_pcdc_type dvp_pcdc, dvp_pcds_type dvp_pcds, dvp_lcdc_ty * this parameter can be one of the following values: * - DVP_STATUS_HSYN * - DVP_STATUS_VSYN - * - DVP_STATUS_OFS + * - DVP_STATUS_OFNE * @retval flag_status (SET or RESET) */ flag_status dvp_basic_status_get(dvp_status_basic_type dvp_status_basic) @@ -406,16 +419,16 @@ void dvp_enhanced_scaling_resize_set(uint16_t src_w, uint16_t des_w, uint16_t sr /** * @brief set enhanced frame rate control configuration - * @param efrcfm(0x00~0x1F): original frame rate contorl factor - * @param efrcfn(0x00~0x1F): enhanced frame rate contorl factor + * @param efrcsf(0x00~0x1F): original frame rate contorl factor + * @param efrctf(0x00~0x1F): enhanced frame rate contorl factor * @param new_state (TRUE or FALSE) * @retval none */ -void dvp_enhanced_framerate_set(uint16_t efrcfm, uint16_t efrcfn, confirm_state new_state) +void dvp_enhanced_framerate_set(uint16_t efrcsf, uint16_t efrctf, confirm_state new_state) { - if((!DVP->ctrl_bit.cfm) && (!DVP->ctrl_bit.bfrc) && (efrcfn <= efrcfm)) + if((!DVP->ctrl_bit.cfm) && (!DVP->ctrl_bit.bfrc) && (efrctf <= efrcsf)) { - DVP->frf = (efrcfm | (efrcfn << 8)); + DVP->frf = (efrcsf | (efrctf << 8)); } DVP->actrl_bit.efrce = new_state; @@ -440,7 +453,7 @@ void dvp_monochrome_image_binarization_set(uint8_t mibthd, confirm_state new_sta * - DVP_EFDF_BYPASS * - DVP_EFDF_YUV422_UYVY * - DVP_EFDF_YUV422_YUYV - * - DVP_EFDF_YUV444 + * - DVP_EFDF_RGB565_555 * - DVP_EFDF_Y8 * @retval none */ @@ -451,10 +464,10 @@ void dvp_enhanced_data_format_set(dvp_efdf_type dvp_efdf) /** * @brief set dvp input data un-used condition/number configuration - * @param dvp_iduc: input data un-used condition + * @param dvp_idus: input data un-used condition * this parameter can be one of the following values: - * - DVP_IDUC_MSB - * - DVP_IDUC_LSB + * - DVP_IDUS_MSB + * - DVP_IDUS_LSB * @param dvp_idun: input data un-used number * this parameter can be one of the following values: * - DVP_IDUN_0 @@ -463,9 +476,9 @@ void dvp_enhanced_data_format_set(dvp_efdf_type dvp_efdf) * - DVP_IDUN_6 * @retval none */ -void dvp_input_data_unused_set(dvp_iduc_type dvp_iduc, dvp_idun_type dvp_idun) +void dvp_input_data_unused_set(dvp_idus_type dvp_idus, dvp_idun_type dvp_idun) { - DVP->actrl_bit.iduc = dvp_iduc; + DVP->actrl_bit.idus = dvp_idus; DVP->actrl_bit.idun = dvp_idun; } @@ -484,20 +497,20 @@ void dvp_dma_burst_set(dvp_dmabt_type dvp_dmabt) /** * @brief set dvp hsync/vsync event interrupt strategy configuration - * @param dvp_hseis: hsync event interrupt strategy + * @param dvp_hseid: hsync event interrupt strategy * this parameter can be one of the following values: - * - DVP_HSEIS_LINE_END - * - DVP_HSEIS_LINE_START - * @param dvp_vseis: vsync event interrupt strategy + * - DVP_HSEID_LINE_END + * - DVP_HSEID_LINE_START + * @param dvp_vseid: vsync event interrupt strategy * this parameter can be one of the following values: - * - DVP_VSEIS_FRAME_END - * - DVP_VSEIS_FRMAE_START + * - DVP_VSEID_FRAME_END + * - DVP_VSEID_FRMAE_START * @retval none */ -void dvp_sync_event_interrupt_set(dvp_hseis_type dvp_hseis, dvp_vseis_type dvp_vseis) +void dvp_sync_event_interrupt_set(dvp_hseid_type dvp_hseid, dvp_vseid_type dvp_vseid) { - DVP->actrl_bit.hseis = dvp_hseis; - DVP->actrl_bit.vseis = dvp_vseis; + DVP->actrl_bit.hseid = dvp_hseid; + DVP->actrl_bit.vseid = dvp_vseid; } /** diff --git a/libraries/drivers/src/at32f435_437_edma.c b/libraries/drivers/src/at32f435_437_edma.c index d7544661..96423074 100644 --- a/libraries/drivers/src/at32f435_437_edma.c +++ b/libraries/drivers/src/at32f435_437_edma.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_edma.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief contains all the functions for the edma firmware library ************************************************************************** * Copyright notice & Disclaimer diff --git a/libraries/drivers/src/at32f435_437_emac.c b/libraries/drivers/src/at32f435_437_emac.c index 4815258d..435b69b0 100644 --- a/libraries/drivers/src/at32f435_437_emac.c +++ b/libraries/drivers/src/at32f435_437_emac.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_emac.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief contains all the functions for the emac firmware library ************************************************************************** * Copyright notice & Disclaimer diff --git a/libraries/drivers/src/at32f435_437_ertc.c b/libraries/drivers/src/at32f435_437_ertc.c index cb3a1a96..a4589087 100644 --- a/libraries/drivers/src/at32f435_437_ertc.c +++ b/libraries/drivers/src/at32f435_437_ertc.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_ertc.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief contains all the functions for the ertc firmware library ************************************************************************** * Copyright notice & Disclaimer @@ -406,7 +406,7 @@ void ertc_calendar_get(ertc_time_type* time) ertc_reg_time_type reg_tm; ertc_reg_date_type reg_dt; - (void) (ERTC->sts); + UNUSED(ERTC->sts); reg_tm.time = ERTC->time; reg_dt.date = ERTC->date; @@ -724,8 +724,8 @@ uint32_t ertc_alarm_sub_second_get(ertc_alarm_type alarm_x) * - ERTC_WAT_CLK_ERTCCLK_DIV8: ERTC_CLK / 8. * - ERTC_WAT_CLK_ERTCCLK_DIV4: ERTC_CLK / 4. * - ERTC_WAT_CLK_ERTCCLK_DIV2: ERTC_CLK / 2. - * - ERTC_WAT_CLK_CK_A_16BITS: CK_A, wakeup counter = ERTC_WAT - * - ERTC_WAT_CLK_CK_A_17BITS: CK_A, wakeup counter = ERTC_WAT + 65535. + * - ERTC_WAT_CLK_CK_B_16BITS: CK_B, wakeup counter = ERTC_WAT + * - ERTC_WAT_CLK_CK_B_17BITS: CK_B, wakeup counter = ERTC_WAT + 65535. * @retval none. */ void ertc_wakeup_clock_set(ertc_wakeup_clock_type clock) diff --git a/libraries/drivers/src/at32f435_437_exint.c b/libraries/drivers/src/at32f435_437_exint.c index a88a8520..dfb10526 100644 --- a/libraries/drivers/src/at32f435_437_exint.c +++ b/libraries/drivers/src/at32f435_437_exint.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_exint.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief contains all the functions for the exint firmware library ************************************************************************** * Copyright notice & Disclaimer diff --git a/libraries/drivers/src/at32f435_437_flash.c b/libraries/drivers/src/at32f435_437_flash.c index 837407c3..8819746e 100644 --- a/libraries/drivers/src/at32f435_437_flash.c +++ b/libraries/drivers/src/at32f435_437_flash.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_flash.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief contains all the functions for the flash firmware library ************************************************************************** * Copyright notice & Disclaimer @@ -359,41 +359,27 @@ flash_status_type flash_sector_erase(uint32_t sector_address) flash_status_type status = FLASH_OPERATE_DONE; if((sector_address >= FLASH_BANK1_START_ADDR) && (sector_address <= FLASH_BANK1_END_ADDR)) { - /* wait for last operation to be completed */ + FLASH->ctrl_bit.secers = TRUE; + FLASH->addr = sector_address; + FLASH->ctrl_bit.erstr = TRUE; + + /* wait for operation to be completed */ status = flash_bank1_operation_wait_for(ERASE_TIMEOUT); - if(status == FLASH_OPERATE_DONE) - { - /* if the previous operation is completed, continue to erase the sector */ - FLASH->ctrl_bit.secers = TRUE; - FLASH->addr = sector_address; - FLASH->ctrl_bit.erstr = TRUE; - - /* wait for operation to be completed */ - status = flash_bank1_operation_wait_for(ERASE_TIMEOUT); - - /* disable the secers bit */ - FLASH->ctrl_bit.secers = FALSE; - } + /* disable the secers bit */ + FLASH->ctrl_bit.secers = FALSE; } else if((sector_address >= FLASH_BANK2_START_ADDR) && (sector_address <= FLASH_BANK2_END_ADDR)) { - /* wait for last operation to be completed */ + FLASH->ctrl2_bit.secers = TRUE; + FLASH->addr2 = sector_address; + FLASH->ctrl2_bit.erstr = TRUE; + + /* wait for operation to be completed */ status = flash_bank2_operation_wait_for(ERASE_TIMEOUT); - if(status == FLASH_OPERATE_DONE) - { - /* if the previous operation is completed, continue to erase the sector */ - FLASH->ctrl2_bit.secers = TRUE; - FLASH->addr2 = sector_address; - FLASH->ctrl2_bit.erstr = TRUE; - - /* wait for operation to be completed */ - status = flash_bank2_operation_wait_for(ERASE_TIMEOUT); - - /* disable the secers bit */ - FLASH->ctrl2_bit.secers = FALSE; - } + /* disable the secers bit */ + FLASH->ctrl2_bit.secers = FALSE; } /* return the erase status */ @@ -411,41 +397,27 @@ flash_status_type flash_block_erase(uint32_t block_address) flash_status_type status = FLASH_OPERATE_DONE; if((block_address >= FLASH_BANK1_START_ADDR) && (block_address <= FLASH_BANK1_END_ADDR)) { - /* wait for last operation to be completed */ + FLASH->ctrl_bit.blkers = TRUE; + FLASH->addr = block_address; + FLASH->ctrl_bit.erstr = TRUE; + + /* wait for operation to be completed */ status = flash_bank1_operation_wait_for(ERASE_TIMEOUT); - if(status == FLASH_OPERATE_DONE) - { - /* if the previous operation is completed, continue to erase the blkers */ - FLASH->ctrl_bit.blkers = TRUE; - FLASH->addr = block_address; - FLASH->ctrl_bit.erstr = TRUE; - - /* wait for operation to be completed */ - status = flash_bank1_operation_wait_for(ERASE_TIMEOUT); - - /* disable the blkers bit */ - FLASH->ctrl_bit.blkers = FALSE; - } + /* disable the blkers bit */ + FLASH->ctrl_bit.blkers = FALSE; } else if((block_address >= FLASH_BANK2_START_ADDR) && (block_address <= FLASH_BANK2_END_ADDR)) { - /* wait for last operation to be completed */ + FLASH->ctrl2_bit.blkers = TRUE; + FLASH->addr2 = block_address; + FLASH->ctrl2_bit.erstr = TRUE; + + /* wait for operation to be completed */ status = flash_bank2_operation_wait_for(ERASE_TIMEOUT); - if(status == FLASH_OPERATE_DONE) - { - /* if the previous operation is completed, continue to erase the blkers */ - FLASH->ctrl2_bit.blkers = TRUE; - FLASH->addr2 = block_address; - FLASH->ctrl2_bit.erstr = TRUE; - - /* wait for operation to be completed */ - status = flash_bank2_operation_wait_for(ERASE_TIMEOUT); - - /* disable the blkers bit */ - FLASH->ctrl2_bit.blkers = FALSE; - } + /* disable the blkers bit */ + FLASH->ctrl2_bit.blkers = FALSE; } /* return the erase status */ @@ -461,21 +433,16 @@ flash_status_type flash_block_erase(uint32_t block_address) flash_status_type flash_internal_all_erase(void) { flash_status_type status = FLASH_OPERATE_DONE; - /* wait for last operation to be completed */ + + FLASH->ctrl_bit.bankers = TRUE; + FLASH->ctrl_bit.erstr = TRUE; + + /* wait for operation to be completed */ status = flash_bank1_operation_wait_for(ERASE_TIMEOUT); - if(status == FLASH_OPERATE_DONE) - { - /* if the previous operation is completed, continue to erase bank1 */ - FLASH->ctrl_bit.bankers = TRUE; - FLASH->ctrl_bit.erstr = TRUE; + /* disable the bankers bit */ + FLASH->ctrl_bit.bankers = FALSE; - /* wait for operation to be completed */ - status = flash_bank1_operation_wait_for(ERASE_TIMEOUT); - - /* disable the bankers bit */ - FLASH->ctrl_bit.bankers = FALSE; - } if(status == FLASH_OPERATE_DONE) { /* if the previous operation is completed, continue to erase bank2 */ @@ -501,21 +468,16 @@ flash_status_type flash_internal_all_erase(void) flash_status_type flash_bank1_erase(void) { flash_status_type status = FLASH_OPERATE_DONE; - /* wait for last operation to be completed */ + + FLASH->ctrl_bit.bankers = TRUE; + FLASH->ctrl_bit.erstr = TRUE; + + /* wait for operation to be completed */ status = flash_bank1_operation_wait_for(ERASE_TIMEOUT); - if(status == FLASH_OPERATE_DONE) - { - /* if the previous operation is completed, continue to erase bank1 */ - FLASH->ctrl_bit.bankers = TRUE; - FLASH->ctrl_bit.erstr = TRUE; + /* disable the bankers bit */ + FLASH->ctrl_bit.bankers = FALSE; - /* wait for operation to be completed */ - status = flash_bank1_operation_wait_for(ERASE_TIMEOUT); - - /* disable the bankers bit */ - FLASH->ctrl_bit.bankers = FALSE; - } /* return the erase status */ return status; } @@ -529,21 +491,16 @@ flash_status_type flash_bank1_erase(void) flash_status_type flash_bank2_erase(void) { flash_status_type status = FLASH_OPERATE_DONE; - /* wait for last operation to be completed */ + + FLASH->ctrl2_bit.bankers = TRUE; + FLASH->ctrl2_bit.erstr = TRUE; + + /* wait for operation to be completed */ status = flash_bank2_operation_wait_for(ERASE_TIMEOUT); - if(status == FLASH_OPERATE_DONE) - { - /* if the previous operation is completed, continue to erase bank2 */ - FLASH->ctrl2_bit.bankers = TRUE; - FLASH->ctrl2_bit.erstr = TRUE; + /* disable the bankers bit */ + FLASH->ctrl2_bit.bankers = FALSE; - /* wait for operation to be completed */ - status = flash_bank2_operation_wait_for(ERASE_TIMEOUT); - - /* disable the bankers bit */ - FLASH->ctrl2_bit.bankers = FALSE; - } /* return the erase status */ return status; } @@ -566,41 +523,36 @@ flash_status_type flash_user_system_data_erase(void) fap_val = 0x0000; } - /* wait for last operation to be completed */ + /* unlock the user system data */ + FLASH->usd_unlock = FLASH_UNLOCK_KEY1; + FLASH->usd_unlock = FLASH_UNLOCK_KEY2; + while(FLASH->ctrl_bit.usdulks==RESET); + + /* erase the user system data */ + FLASH->ctrl_bit.usders = TRUE; + FLASH->ctrl_bit.erstr = TRUE; + + /* wait for operation to be completed */ status = flash_operation_wait_for(ERASE_TIMEOUT); - if(status == FLASH_OPERATE_DONE) - { - /* unlock the user system data */ - FLASH->usd_unlock = FLASH_UNLOCK_KEY1; - FLASH->usd_unlock = FLASH_UNLOCK_KEY2; - while(FLASH->ctrl_bit.usdulks==RESET); + /* disable the usders bit */ + FLASH->ctrl_bit.usders = FALSE; - /* erase the user system data */ - FLASH->ctrl_bit.usders = TRUE; - FLASH->ctrl_bit.erstr = TRUE; + if((status == FLASH_OPERATE_DONE) && (fap_val == FAP_RELIEVE_KEY)) + { + /* enable the user system data programming operation */ + FLASH->ctrl_bit.usdprgm = TRUE; + + /* restore the last flash access protection value */ + USD->fap = (uint16_t)fap_val; /* wait for operation to be completed */ - status = flash_operation_wait_for(ERASE_TIMEOUT); + status = flash_operation_wait_for(PROGRAMMING_TIMEOUT); - /* disable the usders bit */ - FLASH->ctrl_bit.usders = FALSE; - - if((status == FLASH_OPERATE_DONE) && (fap_val == FAP_RELIEVE_KEY)) - { - /* enable the user system data programming operation */ - FLASH->ctrl_bit.usdprgm = TRUE; - - /* restore the last flash access protection value */ - USD->fap = (uint16_t)fap_val; - - /* wait for operation to be completed */ - status = flash_operation_wait_for(PROGRAMMING_TIMEOUT); - - /*disable the usdprgm bit */ - FLASH->ctrl_bit.usdprgm = FALSE; - } + /*disable the usdprgm bit */ + FLASH->ctrl_bit.usdprgm = FALSE; } + /* return the status */ return status; } @@ -625,28 +577,23 @@ flash_status_type flash_eopb0_config(flash_usd_eopb0_type data) { flash_status_type status = FLASH_OPERATE_DONE; - /* wait for last operation to be completed */ - status = flash_operation_wait_for(ERASE_TIMEOUT); + /* unlock the user system data */ + FLASH->usd_unlock = FLASH_UNLOCK_KEY1; + FLASH->usd_unlock = FLASH_UNLOCK_KEY2; + while(FLASH->ctrl_bit.usdulks==RESET); - if(status == FLASH_OPERATE_DONE) - { - /* unlock the user system data */ - FLASH->usd_unlock = FLASH_UNLOCK_KEY1; - FLASH->usd_unlock = FLASH_UNLOCK_KEY2; - while(FLASH->ctrl_bit.usdulks==RESET); + /* enable the user system data programming operation */ + FLASH->ctrl_bit.usdprgm = TRUE; - /* enable the user system data programming operation */ - FLASH->ctrl_bit.usdprgm = TRUE; + /* restore the default eopb0 value */ + USD->eopb0 = (uint16_t)data; - /* restore the default eopb0 value */ - USD->eopb0 = (uint16_t)data; + /* wait for operation to be completed */ + status = flash_operation_wait_for(PROGRAMMING_TIMEOUT); - /* wait for operation to be completed */ - status = flash_operation_wait_for(PROGRAMMING_TIMEOUT); + /*disable the usdprgm bit */ + FLASH->ctrl_bit.usdprgm = FALSE; - /*disable the usdprgm bit */ - FLASH->ctrl_bit.usdprgm = FALSE; - } /* return the status */ return status; } @@ -663,35 +610,23 @@ flash_status_type flash_word_program(uint32_t address, uint32_t data) flash_status_type status = FLASH_OPERATE_DONE; if((address >= FLASH_BANK1_START_ADDR) && (address <= FLASH_BANK1_END_ADDR)) { - /* wait for last operation to be completed */ + FLASH->ctrl_bit.fprgm = TRUE; + *(__IO uint32_t*)address = data; + /* wait for operation to be completed */ status = flash_bank1_operation_wait_for(PROGRAMMING_TIMEOUT); - if(status == FLASH_OPERATE_DONE) - { - FLASH->ctrl_bit.fprgm = TRUE; - *(__IO uint32_t*)address = data; - /* wait for operation to be completed */ - status = flash_bank1_operation_wait_for(PROGRAMMING_TIMEOUT); - - /* disable the fprgm bit */ - FLASH->ctrl_bit.fprgm = FALSE; - } + /* disable the fprgm bit */ + FLASH->ctrl_bit.fprgm = FALSE; } else if((address >= FLASH_BANK2_START_ADDR) && (address <= FLASH_BANK2_END_ADDR)) { - /* wait for last operation to be completed */ + FLASH->ctrl2_bit.fprgm = TRUE; + *(__IO uint32_t*)address = data; + /* wait for operation to be completed */ status = flash_bank2_operation_wait_for(PROGRAMMING_TIMEOUT); - if(status == FLASH_OPERATE_DONE) - { - FLASH->ctrl2_bit.fprgm = TRUE; - *(__IO uint32_t*)address = data; - /* wait for operation to be completed */ - status = flash_bank2_operation_wait_for(PROGRAMMING_TIMEOUT); - - /* disable the fprgm bit */ - FLASH->ctrl2_bit.fprgm = FALSE; - } + /* disable the fprgm bit */ + FLASH->ctrl2_bit.fprgm = FALSE; } /* return the program status */ @@ -710,35 +645,23 @@ flash_status_type flash_halfword_program(uint32_t address, uint16_t data) flash_status_type status = FLASH_OPERATE_DONE; if((address >= FLASH_BANK1_START_ADDR) && (address <= FLASH_BANK1_END_ADDR)) { - /* wait for last operation to be completed */ + FLASH->ctrl_bit.fprgm = TRUE; + *(__IO uint16_t*)address = data; + /* wait for operation to be completed */ status = flash_bank1_operation_wait_for(PROGRAMMING_TIMEOUT); - if(status == FLASH_OPERATE_DONE) - { - FLASH->ctrl_bit.fprgm = TRUE; - *(__IO uint16_t*)address = data; - /* wait for operation to be completed */ - status = flash_bank1_operation_wait_for(PROGRAMMING_TIMEOUT); - - /* disable the fprgm bit */ - FLASH->ctrl_bit.fprgm = FALSE; - } + /* disable the fprgm bit */ + FLASH->ctrl_bit.fprgm = FALSE; } else if((address >= FLASH_BANK2_START_ADDR) && (address <= FLASH_BANK2_END_ADDR)) { - /* wait for last operation to be completed */ + FLASH->ctrl2_bit.fprgm = TRUE; + *(__IO uint16_t*)address = data; + /* wait for operation to be completed */ status = flash_bank2_operation_wait_for(PROGRAMMING_TIMEOUT); - if(status == FLASH_OPERATE_DONE) - { - FLASH->ctrl2_bit.fprgm = TRUE; - *(__IO uint16_t*)address = data; - /* wait for operation to be completed */ - status = flash_bank2_operation_wait_for(PROGRAMMING_TIMEOUT); - - /* disable the fprgm bit */ - FLASH->ctrl2_bit.fprgm = FALSE; - } + /* disable the fprgm bit */ + FLASH->ctrl2_bit.fprgm = FALSE; } /* return the program status */ @@ -758,35 +681,23 @@ flash_status_type flash_byte_program(uint32_t address, uint8_t data) flash_status_type status = FLASH_OPERATE_DONE; if((address >= FLASH_BANK1_START_ADDR) && (address <= FLASH_BANK1_END_ADDR)) { - /* wait for last operation to be completed */ + FLASH->ctrl_bit.fprgm = TRUE; + *(__IO uint8_t*)address = data; + /* wait for operation to be completed */ status = flash_bank1_operation_wait_for(PROGRAMMING_TIMEOUT); - if(status == FLASH_OPERATE_DONE) - { - FLASH->ctrl_bit.fprgm = TRUE; - *(__IO uint8_t*)address = data; - /* wait for operation to be completed */ - status = flash_bank1_operation_wait_for(PROGRAMMING_TIMEOUT); - - /* disable the fprgm bit */ - FLASH->ctrl_bit.fprgm = FALSE; - } + /* disable the fprgm bit */ + FLASH->ctrl_bit.fprgm = FALSE; } else if((address >= FLASH_BANK2_START_ADDR) && (address <= FLASH_BANK2_END_ADDR)) { - /* wait for last operation to be completed */ + FLASH->ctrl2_bit.fprgm = TRUE; + *(__IO uint8_t*)address = data; + /* wait for operation to be completed */ status = flash_bank2_operation_wait_for(PROGRAMMING_TIMEOUT); - if(status == FLASH_OPERATE_DONE) - { - FLASH->ctrl2_bit.fprgm = TRUE; - *(__IO uint8_t*)address = data; - /* wait for operation to be completed */ - status = flash_bank2_operation_wait_for(PROGRAMMING_TIMEOUT); - - /* disable the fprgm bit */ - FLASH->ctrl2_bit.fprgm = FALSE; - } + /* disable the fprgm bit */ + FLASH->ctrl2_bit.fprgm = FALSE; } /* return the program status */ return status; @@ -802,24 +713,28 @@ flash_status_type flash_byte_program(uint32_t address, uint8_t data) flash_status_type flash_user_system_data_program(uint32_t address, uint8_t data) { flash_status_type status = FLASH_OPERATE_DONE; - status = flash_operation_wait_for(PROGRAMMING_TIMEOUT); - if(status == FLASH_OPERATE_DONE) + + if(address == USD_BASE) { - /* unlock the user system data */ - FLASH->usd_unlock = FLASH_UNLOCK_KEY1; - FLASH->usd_unlock = FLASH_UNLOCK_KEY2; - while(FLASH->ctrl_bit.usdulks==RESET); - - /* enable the user system data programming operation */ - FLASH->ctrl_bit.usdprgm = TRUE; - *(__IO uint16_t*)address = data; - - /* wait for operation to be completed */ - status = flash_operation_wait_for(PROGRAMMING_TIMEOUT); - - /* disable the usdprgm bit */ - FLASH->ctrl_bit.usdprgm = FALSE; + if(data != 0xA5) + return FLASH_OPERATE_DONE; } + + /* unlock the user system data */ + FLASH->usd_unlock = FLASH_UNLOCK_KEY1; + FLASH->usd_unlock = FLASH_UNLOCK_KEY2; + while(FLASH->ctrl_bit.usdulks==RESET); + + /* enable the user system data programming operation */ + FLASH->ctrl_bit.usdprgm = TRUE; + *(__IO uint16_t*)address = data; + + /* wait for operation to be completed */ + status = flash_operation_wait_for(PROGRAMMING_TIMEOUT); + + /* disable the usdprgm bit */ + FLASH->ctrl_bit.usdprgm = FALSE; + /* return the user system data program status */ return status; } @@ -842,73 +757,69 @@ flash_status_type flash_epp_set(uint32_t *sector_bits) epp_data[1] = (uint16_t)((sector_bits[0] >> 8) & 0xFF); epp_data[2] = (uint16_t)((sector_bits[0] >> 16) & 0xFF); epp_data[3] = (uint16_t)((sector_bits[0] >> 24) & 0xFF); - /* wait for last operation to be completed */ + + /* unlock the user system data */ + FLASH->usd_unlock = FLASH_UNLOCK_KEY1; + FLASH->usd_unlock = FLASH_UNLOCK_KEY2; + while(FLASH->ctrl_bit.usdulks==RESET); + + FLASH->ctrl_bit.usdprgm = TRUE; + USD->epp0 = epp_data[0]; + /* wait for operation to be completed */ status = flash_operation_wait_for(PROGRAMMING_TIMEOUT); if(status == FLASH_OPERATE_DONE) { - /* unlock the user system data */ - FLASH->usd_unlock = FLASH_UNLOCK_KEY1; - FLASH->usd_unlock = FLASH_UNLOCK_KEY2; - while(FLASH->ctrl_bit.usdulks==RESET); - - FLASH->ctrl_bit.usdprgm = TRUE; - USD->epp0 = epp_data[0]; + USD->epp1 = epp_data[1]; /* wait for operation to be completed */ status = flash_operation_wait_for(PROGRAMMING_TIMEOUT); - - if(status == FLASH_OPERATE_DONE) - { - USD->epp1 = epp_data[1]; - /* wait for operation to be completed */ - status = flash_operation_wait_for(PROGRAMMING_TIMEOUT); - } - if(status == FLASH_OPERATE_DONE) - { - USD->epp2 = epp_data[2]; - /* wait for operation to be completed */ - status = flash_operation_wait_for(PROGRAMMING_TIMEOUT); - } - if(status == FLASH_OPERATE_DONE) - { - USD->epp3 = epp_data[3]; - /* wait for operation to be completed */ - status = flash_operation_wait_for(PROGRAMMING_TIMEOUT); - } - - sector_bits[1] = (uint32_t)(~sector_bits[1]); - epp_data[0] = (uint16_t)((sector_bits[1] >> 0) & 0xFF); - epp_data[1] = (uint16_t)((sector_bits[1] >> 8) & 0xFF); - epp_data[2] = (uint16_t)((sector_bits[1] >> 16) & 0xFF); - epp_data[3] = (uint16_t)((sector_bits[1] >> 24) & 0xFF); - if(status == FLASH_OPERATE_DONE) - { - USD->epp4 = epp_data[0]; - /* wait for operation to be completed */ - status = flash_operation_wait_for(PROGRAMMING_TIMEOUT); - } - if(status == FLASH_OPERATE_DONE) - { - USD->epp5 = epp_data[1]; - /* wait for operation to be completed */ - status = flash_operation_wait_for(PROGRAMMING_TIMEOUT); - } - if(status == FLASH_OPERATE_DONE) - { - USD->epp6 = epp_data[2]; - /* wait for operation to be completed */ - status = flash_operation_wait_for(PROGRAMMING_TIMEOUT); - } - if(status == FLASH_OPERATE_DONE) - { - USD->epp7 = epp_data[3]; - /* wait for operation to be completed */ - status = flash_operation_wait_for(PROGRAMMING_TIMEOUT); - } - - /* disable the usdprgm bit */ - FLASH->ctrl_bit.usdprgm = FALSE; } + if(status == FLASH_OPERATE_DONE) + { + USD->epp2 = epp_data[2]; + /* wait for operation to be completed */ + status = flash_operation_wait_for(PROGRAMMING_TIMEOUT); + } + if(status == FLASH_OPERATE_DONE) + { + USD->epp3 = epp_data[3]; + /* wait for operation to be completed */ + status = flash_operation_wait_for(PROGRAMMING_TIMEOUT); + } + + sector_bits[1] = (uint32_t)(~sector_bits[1]); + epp_data[0] = (uint16_t)((sector_bits[1] >> 0) & 0xFF); + epp_data[1] = (uint16_t)((sector_bits[1] >> 8) & 0xFF); + epp_data[2] = (uint16_t)((sector_bits[1] >> 16) & 0xFF); + epp_data[3] = (uint16_t)((sector_bits[1] >> 24) & 0xFF); + if(status == FLASH_OPERATE_DONE) + { + USD->epp4 = epp_data[0]; + /* wait for operation to be completed */ + status = flash_operation_wait_for(PROGRAMMING_TIMEOUT); + } + if(status == FLASH_OPERATE_DONE) + { + USD->epp5 = epp_data[1]; + /* wait for operation to be completed */ + status = flash_operation_wait_for(PROGRAMMING_TIMEOUT); + } + if(status == FLASH_OPERATE_DONE) + { + USD->epp6 = epp_data[2]; + /* wait for operation to be completed */ + status = flash_operation_wait_for(PROGRAMMING_TIMEOUT); + } + if(status == FLASH_OPERATE_DONE) + { + USD->epp7 = epp_data[3]; + /* wait for operation to be completed */ + status = flash_operation_wait_for(PROGRAMMING_TIMEOUT); + } + + /* disable the usdprgm bit */ + FLASH->ctrl_bit.usdprgm = FALSE; + /* return the erase/program protection operation status */ return status; } @@ -937,43 +848,41 @@ void flash_epp_status_get(uint32_t *sector_bits) flash_status_type flash_fap_enable(confirm_state new_state) { flash_status_type status = FLASH_OPERATE_DONE; + + /* unlock the user system data */ + FLASH->usd_unlock = FLASH_UNLOCK_KEY1; + FLASH->usd_unlock = FLASH_UNLOCK_KEY2; + while(FLASH->ctrl_bit.usdulks==RESET); + + FLASH->ctrl_bit.usders = TRUE; + FLASH->ctrl_bit.erstr = TRUE; + /* wait for operation to be completed */ status = flash_operation_wait_for(ERASE_TIMEOUT); + + /* disable the usders bit */ + FLASH->ctrl_bit.usders = FALSE; + if(status == FLASH_OPERATE_DONE) { - /* unlock the user system data */ - FLASH->usd_unlock = FLASH_UNLOCK_KEY1; - FLASH->usd_unlock = FLASH_UNLOCK_KEY2; - while(FLASH->ctrl_bit.usdulks==RESET); + /* enable the user system data programming operation */ + FLASH->ctrl_bit.usdprgm = TRUE; - FLASH->ctrl_bit.usders = TRUE; - FLASH->ctrl_bit.erstr = TRUE; - /* wait for operation to be completed */ + /* restore the default eopb0 value */ + USD->eopb0 = (uint16_t)0x0002; + + /* Wait for operation to be completed */ status = flash_operation_wait_for(ERASE_TIMEOUT); - /* disable the usders bit */ - FLASH->ctrl_bit.usders = FALSE; - - if(status == FLASH_OPERATE_DONE) + if(new_state == FALSE) { - /* enable the user system data programming operation */ - FLASH->ctrl_bit.usdprgm = TRUE; - - /* restore the default eopb0 value */ - USD->eopb0 = (uint16_t)0x0002; - + USD->fap = FAP_RELIEVE_KEY; /* Wait for operation to be completed */ status = flash_operation_wait_for(ERASE_TIMEOUT); - - if(new_state == FALSE) - { - USD->fap = FAP_RELIEVE_KEY; - /* Wait for operation to be completed */ - status = flash_operation_wait_for(ERASE_TIMEOUT); - } - /* disable the usdprgm bit */ - FLASH->ctrl_bit.usdprgm = FALSE; } + /* disable the usdprgm bit */ + FLASH->ctrl_bit.usdprgm = FALSE; } + /* return the flash access protection operation status */ return status; } @@ -1022,26 +931,22 @@ flag_status flash_fap_status_get(void) flash_status_type flash_ssb_set(uint8_t usd_ssb) { flash_status_type status = FLASH_OPERATE_DONE; - /* wait for last operation to be completed */ + + /* unlock the user system data */ + FLASH->usd_unlock = FLASH_UNLOCK_KEY1; + FLASH->usd_unlock = FLASH_UNLOCK_KEY2; + while(FLASH->ctrl_bit.usdulks==RESET); + + /* enable the user system data programming operation */ + FLASH->ctrl_bit.usdprgm = TRUE; + + USD->ssb = usd_ssb; + /* wait for operation to be completed */ status = flash_operation_wait_for(PROGRAMMING_TIMEOUT); - if(status == FLASH_OPERATE_DONE) - { - /* unlock the user system data */ - FLASH->usd_unlock = FLASH_UNLOCK_KEY1; - FLASH->usd_unlock = FLASH_UNLOCK_KEY2; - while(FLASH->ctrl_bit.usdulks==RESET); + /* disable the usdprgm bit */ + FLASH->ctrl_bit.usdprgm = FALSE; - /* enable the user system data programming operation */ - FLASH->ctrl_bit.usdprgm = TRUE; - - USD->ssb = usd_ssb; - /* wait for operation to be completed */ - status = flash_operation_wait_for(PROGRAMMING_TIMEOUT); - - /* disable the usdprgm bit */ - FLASH->ctrl_bit.usdprgm = FALSE; - } /* return the user system data program status */ return status; } @@ -1097,30 +1002,32 @@ flash_status_type flash_slib_enable(uint32_t pwd, uint16_t start_sector, uint16_ { uint32_t slib_range; flash_status_type status = FLASH_OPERATE_DONE; - /* wait for last operation to be completed */ - status = flash_operation_wait_for(PROGRAMMING_TIMEOUT); /*check range param limits*/ if((start_sector>=inst_start_sector) || ((inst_start_sector > end_sector) && \ (inst_start_sector != 0xFFFF)) || (start_sector > end_sector)) return FLASH_PROGRAM_ERROR; + /* unlock slib cfg register */ + FLASH->slib_unlock = SLIB_UNLOCK_KEY; + while(FLASH->slib_misc_sts_bit.slib_ulkf==RESET); + + /* configure slib, set pwd and range */ + FLASH->slib_set_pwd = pwd; + status = flash_operation_wait_for(PROGRAMMING_TIMEOUT); if(status == FLASH_OPERATE_DONE) { - /* unlock slib cfg register */ - FLASH->slib_unlock = SLIB_UNLOCK_KEY; - while(FLASH->slib_misc_sts_bit.slib_ulkf==RESET); - - /* configure slib, set pwd and range */ - FLASH->slib_set_pwd = pwd; - status = flash_operation_wait_for(PROGRAMMING_TIMEOUT); slib_range = ((uint32_t)(end_sector << 16) & FLASH_SLIB_END_SECTOR) | (start_sector & FLASH_SLIB_START_SECTOR); FLASH->slib_set_range0 = slib_range; status = flash_operation_wait_for(PROGRAMMING_TIMEOUT); - slib_range = (inst_start_sector & FLASH_SLIB_INST_START_SECTOR) | 0x80000000; - FLASH->slib_set_range1 = slib_range; - status = flash_operation_wait_for(PROGRAMMING_TIMEOUT); + if(status == FLASH_OPERATE_DONE) + { + slib_range = (inst_start_sector & FLASH_SLIB_INST_START_SECTOR) | 0x80000000; + FLASH->slib_set_range1 = slib_range; + status = flash_operation_wait_for(PROGRAMMING_TIMEOUT); + } } + return status; } diff --git a/libraries/drivers/src/at32f435_437_gpio.c b/libraries/drivers/src/at32f435_437_gpio.c index 7c26e392..56647467 100644 --- a/libraries/drivers/src/at32f435_437_gpio.c +++ b/libraries/drivers/src/at32f435_437_gpio.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_gpio.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief contains all the functions for the gpio firmware library ************************************************************************** * Copyright notice & Disclaimer @@ -357,7 +357,7 @@ void gpio_bits_write(gpio_type *gpio_x, uint16_t pins, confirm_state bit_state) * @param port_value: specifies the value to be written to the port output data register. * @retval none */ -void gpio_port_wirte(gpio_type *gpio_x, uint16_t port_value) +void gpio_port_write(gpio_type *gpio_x, uint16_t port_value) { gpio_x->odt = port_value; } diff --git a/libraries/drivers/src/at32f435_437_i2c.c b/libraries/drivers/src/at32f435_437_i2c.c index d8749340..97d1f3ae 100644 --- a/libraries/drivers/src/at32f435_437_i2c.c +++ b/libraries/drivers/src/at32f435_437_i2c.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_i2c.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief contains all the functions for the i2c firmware library ************************************************************************** * Copyright notice & Disclaimer @@ -271,11 +271,13 @@ void i2c_transfer_dir_set(i2c_type *i2c_x, i2c_transfer_dir_type i2c_direction) } /** - * @brief get the i2c slave received direction. + * @brief slave get the i2c transfer direction. * @param i2c_x: to select the i2c peripheral. * this parameter can be one of the following values: * I2C1, I2C2, I2C3. - * @retval the value of the received direction. + * @retval the value of the slave direction + * - I2C_DIR_TRANSMIT: master request a write transfer, slave enters receiver mode. + * - I2C_DIR_RECEIVE: master request a read transfer, slave enters transmitter mode. */ i2c_transfer_dir_type i2c_transfer_dir_get(i2c_type *i2c_x) { @@ -595,14 +597,14 @@ void i2c_dma_enable(i2c_type *i2c_x, i2c_dma_request_type dma_req, confirm_state * - I2C_AUTO_STOP_MODE: auto generate stop mode. * - I2C_SOFT_STOP_MODE: soft generate stop mode. * - I2C_RELOAD_MODE: reload mode. - * @param start_stop: config gen start condition mode. + * @param start: config gen start condition mode. * this parameter can be one of the following values: * - I2C_WITHOUT_START: transfer data without start condition. * - I2C_GEN_START_READ: read data and generate start. * - I2C_GEN_START_WRITE: send data and generate start. * @retval none */ -void i2c_transmit_set(i2c_type *i2c_x, uint16_t address, uint8_t cnt, i2c_reload_stop_mode_type rld_stop, i2c_start_stop_mode_type start_stop) +void i2c_transmit_set(i2c_type *i2c_x, uint16_t address, uint8_t cnt, i2c_reload_stop_mode_type rld_stop, i2c_start_mode_type start) { uint32_t temp; @@ -613,7 +615,7 @@ void i2c_transmit_set(i2c_type *i2c_x, uint16_t address, uint8_t cnt, i2c_reload temp &= ~0x03FF67FF; /* transfer mode and address set */ - temp |= address | rld_stop | start_stop; + temp |= address | rld_stop | start; /* transfer counter set */ temp |= (uint32_t)cnt << 16; diff --git a/libraries/drivers/src/at32f435_437_misc.c b/libraries/drivers/src/at32f435_437_misc.c index fb6f2fa5..9aa52396 100644 --- a/libraries/drivers/src/at32f435_437_misc.c +++ b/libraries/drivers/src/at32f435_437_misc.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_misc.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief contains all the functions for the misc firmware library ************************************************************************** * Copyright notice & Disclaimer diff --git a/libraries/drivers/src/at32f435_437_pwc.c b/libraries/drivers/src/at32f435_437_pwc.c index 8f44637f..2b8e7d8a 100644 --- a/libraries/drivers/src/at32f435_437_pwc.c +++ b/libraries/drivers/src/at32f435_437_pwc.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_pwc.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief contains all the functions for the pwc firmware library ************************************************************************** * Copyright notice & Disclaimer diff --git a/libraries/drivers/src/at32f435_437_qspi.c b/libraries/drivers/src/at32f435_437_qspi.c index 181bdd65..d084a74a 100644 --- a/libraries/drivers/src/at32f435_437_qspi.c +++ b/libraries/drivers/src/at32f435_437_qspi.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_qspi.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief contain all the functions for qspi firmware library ************************************************************************** * Copyright notice & Disclaimer @@ -67,7 +67,7 @@ void qspi_encryption_enable(qspi_type* qspi_x, confirm_state new_state) * - QSPI_SCK_MODE_3 * @retval none */ -void qspi_sck_mode_set( qspi_type* qspi_x, qspi_clk_mode_type new_mode) +void qspi_sck_mode_set(qspi_type* qspi_x, qspi_clk_mode_type new_mode) { qspi_x->ctrl_bit.sckmode = new_mode; } @@ -165,7 +165,7 @@ flag_status qspi_flag_get(qspi_type* qspi_x, uint32_t flag) * - QSPI_CMDSTS_FLAG * @retval none */ -void qspi_flag_clear( qspi_type* qspi_x, uint32_t flag) +void qspi_flag_clear(qspi_type* qspi_x, uint32_t flag) { qspi_x->cmdsts = QSPI_CMDSTS_FLAG; } diff --git a/libraries/drivers/src/at32f435_437_scfg.c b/libraries/drivers/src/at32f435_437_scfg.c index 40533d2b..ca5c0c99 100644 --- a/libraries/drivers/src/at32f435_437_scfg.c +++ b/libraries/drivers/src/at32f435_437_scfg.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_scfg.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief contains all the functions for the system config firmware library ************************************************************************** * Copyright notice & Disclaimer diff --git a/libraries/drivers/src/at32f435_437_sdio.c b/libraries/drivers/src/at32f435_437_sdio.c index a5154cab..aa0710d5 100644 --- a/libraries/drivers/src/at32f435_437_sdio.c +++ b/libraries/drivers/src/at32f435_437_sdio.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_sdio.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief contains all the functions for the sdio firmware library ************************************************************************** * Copyright notice & Disclaimer @@ -82,22 +82,11 @@ void sdio_power_set(sdio_type *sdio_x, sdio_power_state_type power_state) * @param sdio_x: to select the sdio peripheral. * this parameter can be one of the following values: * SDIO1, SDIO2. - * @retval flag_status (SET or RESET) + * @retval sdio_power_state_type (SDIO_POWER_ON or SDIO_POWER_OFF) */ -flag_status sdio_power_status_get(sdio_type *sdio_x) +sdio_power_state_type sdio_power_status_get(sdio_type *sdio_x) { - flag_status flag = RESET; - - if(sdio_x->pwrctrl_bit.ps == SDIO_POWER_ON) - { - flag = SET; - } - else if(sdio_x->pwrctrl_bit.ps == SDIO_POWER_OFF) - { - flag = RESET; - } - - return flag; + return (sdio_power_state_type)(sdio_x->pwrctrl_bit.ps); } /** diff --git a/libraries/drivers/src/at32f435_437_spi.c b/libraries/drivers/src/at32f435_437_spi.c index d1db9efc..6e33c6e8 100644 --- a/libraries/drivers/src/at32f435_437_spi.c +++ b/libraries/drivers/src/at32f435_437_spi.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_spi.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief contains all the functions for the spi firmware library ************************************************************************** * Copyright notice & Disclaimer @@ -615,25 +615,23 @@ flag_status spi_i2s_flag_get(spi_type* spi_x, uint32_t spi_i2s_flag) */ void spi_i2s_flag_clear(spi_type* spi_x, uint32_t spi_i2s_flag) { - volatile uint32_t temp = 0; - temp = temp; if(spi_i2s_flag == SPI_CCERR_FLAG) spi_x->sts = ~SPI_CCERR_FLAG; else if(spi_i2s_flag == SPI_I2S_RDBF_FLAG) - temp = REG32(&spi_x->dt); + UNUSED(spi_x->dt); else if(spi_i2s_flag == I2S_TUERR_FLAG) - temp = REG32(&spi_x->sts); + UNUSED(spi_x->sts); else if(spi_i2s_flag == SPI_CSPAS_FLAG) - temp = REG32(&spi_x->sts); + UNUSED(spi_x->sts); else if(spi_i2s_flag == SPI_MMERR_FLAG) { - temp = REG32(&spi_x->sts); + UNUSED(spi_x->sts); spi_x->ctrl1 = spi_x->ctrl1; } else if(spi_i2s_flag == SPI_I2S_ROERR_FLAG) { - temp = REG32(&spi_x->dt); - temp = REG32(&spi_x->sts); + UNUSED(spi_x->dt); + UNUSED(spi_x->sts); } } diff --git a/libraries/drivers/src/at32f435_437_tmr.c b/libraries/drivers/src/at32f435_437_tmr.c index 827bbae5..80048273 100644 --- a/libraries/drivers/src/at32f435_437_tmr.c +++ b/libraries/drivers/src/at32f435_437_tmr.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_tmr.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief contains all the functions for the tmr firmware library ************************************************************************** * Copyright notice & Disclaimer @@ -1141,15 +1141,15 @@ void tmr_pwm_input_config(tmr_type *tmr_x, tmr_input_config_type *input_struct, * @param tmr_x: select the tmr peripheral. * this parameter can be one of the following values: * TMR1, TMR2, TMR3, TMR4, TMR5, TMR8, TMR20 - * @param ti1_connect + * @param ch1_connect * this parameter can be one of the following values: * - TMR_CHANEL1_CONNECTED_C1IRAW * - TMR_CHANEL1_2_3_CONNECTED_C1IRAW_XOR * @retval none */ -void tmr_channel1_input_select(tmr_type *tmr_x, tmr_channel1_input_connected_type ti1_connect) +void tmr_channel1_input_select(tmr_type *tmr_x, tmr_channel1_input_connected_type ch1_connect) { - tmr_x->ctrl2_bit.c1insel = ti1_connect; + tmr_x->ctrl2_bit.c1insel = ch1_connect; } /** @@ -1411,6 +1411,7 @@ void tmr_interrupt_enable(tmr_type *tmr_x, uint32_t tmr_interrupt, confirm_state * - TMR_C2_FLAG * - TMR_C3_FLAG * - TMR_C4_FLAG + * - TMR_C5_FLAG * - TMR_HALL_FLAG * - TMR_TRIGGER_FLAG * - TMR_BRK_FLAG @@ -1449,6 +1450,7 @@ flag_status tmr_flag_get(tmr_type *tmr_x, uint32_t tmr_flag) * - TMR_C2_FLAG * - TMR_C3_FLAG * - TMR_C4_FLAG + * - TMR_C5_FLAG * - TMR_HALL_FLAG * - TMR_TRIGGER_FLAG * - TMR_BRK_FLAG @@ -1511,25 +1513,6 @@ void tmr_internal_clock_set(tmr_type *tmr_x) tmr_x->stctrl_bit.smsel = TMR_SUB_MODE_DIABLE; } -/** - * @brief set tmr output channel fast - * @param tmr_x: select the tmr peripheral. - * this parameter can be one of the following values: - * TMR1, TMR2, TMR3, TMR4, TMR5, TMR8, TMR9, TMR10, - * TMR11, TMR12, TMR13, TMR14, TMR20 - * @param oc_fast - * this parameter can be one of the following values: - * - TMR_CHANNEL1_OUTPUT_FAST - * - TMR_CHANNEL2_OUTPUT_FAST - * - TMR_CHANNEL3_OUTPUT_FAST - * - TMR_CHANNEL4_OUTPUT_FAST - * @retval none - */ -void tmr_output_channel_fast_set(tmr_type *tmr_x, tmr_channel_output_fast_type oc_fast) -{ - PERIPH_REG((uint32_t)(tmr_x), oc_fast) |= PERIPH_REG_BIT(oc_fast); -} - /** * @brief set tmr output channel polarity * @param tmr_x: select the tmr peripheral. diff --git a/libraries/drivers/src/at32f435_437_usart.c b/libraries/drivers/src/at32f435_437_usart.c index 339627a6..d5c39189 100644 --- a/libraries/drivers/src/at32f435_437_usart.c +++ b/libraries/drivers/src/at32f435_437_usart.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_usart.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief contains all the functions for the usart firmware library ************************************************************************** * Copyright notice & Disclaimer @@ -618,6 +618,11 @@ flag_status usart_flag_get(usart_type* usart_x, uint32_t flag) * - USART_BFF_FLAG: * - USART_TDC_FLAG: * - USART_RDBF_FLAG: + * - USART_PERR_FLAG: + * - USART_FERR_FLAG: + * - USART_NERR_FLAG: + * - USART_ROERR_FLAG: + * - USART_IDLEF_FLAG: * @note * - USART_PERR_FLAG, USART_FERR_FLAG, USART_NERR_FLAG, USART_ROERR_FLAG and USART_IDLEF_FLAG are cleared by software * sequence: a read operation to usart sts register (usart_flag_get()) @@ -630,7 +635,15 @@ flag_status usart_flag_get(usart_type* usart_x, uint32_t flag) */ void usart_flag_clear(usart_type* usart_x, uint32_t flag) { - usart_x->sts = ~flag; + if(flag & (USART_PERR_FLAG | USART_FERR_FLAG | USART_NERR_FLAG | USART_ROERR_FLAG | USART_IDLEF_FLAG)) + { + UNUSED(usart_x->sts); + UNUSED(usart_x->dt); + } + else + { + usart_x->sts = ~flag; + } } /** diff --git a/libraries/drivers/src/at32f435_437_usb.c b/libraries/drivers/src/at32f435_437_usb.c index 0d8c2aa9..80bffbaf 100644 --- a/libraries/drivers/src/at32f435_437_usb.c +++ b/libraries/drivers/src/at32f435_437_usb.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_usb.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief contains all the functions for the usb firmware library ************************************************************************** * Copyright notice & Disclaimer diff --git a/libraries/drivers/src/at32f435_437_wdt.c b/libraries/drivers/src/at32f435_437_wdt.c index c8fb405f..e7526e6c 100644 --- a/libraries/drivers/src/at32f435_437_wdt.c +++ b/libraries/drivers/src/at32f435_437_wdt.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_wdt.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief contains all the functions for the wdt firmware library ************************************************************************** * Copyright notice & Disclaimer diff --git a/libraries/drivers/src/at32f435_437_wwdt.c b/libraries/drivers/src/at32f435_437_wwdt.c index caae27fa..a1c414da 100644 --- a/libraries/drivers/src/at32f435_437_wwdt.c +++ b/libraries/drivers/src/at32f435_437_wwdt.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_wwdt.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief contains all the functions for the wwdt firmware library ************************************************************************** * Copyright notice & Disclaimer diff --git a/libraries/drivers/src/at32f435_437_xmc.c b/libraries/drivers/src/at32f435_437_xmc.c index 5ba5d1a2..663823f8 100644 --- a/libraries/drivers/src/at32f435_437_xmc.c +++ b/libraries/drivers/src/at32f435_437_xmc.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_xmc.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief contains all the functions for the xmc firmware library ************************************************************************** * Copyright notice & Disclaimer diff --git a/middlewares/i2c_application_library/i2c_application.c b/middlewares/i2c_application_library/i2c_application.c index 8281197a..b04a1f8f 100644 --- a/middlewares/i2c_application_library/i2c_application.c +++ b/middlewares/i2c_application_library/i2c_application.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file i2c_application.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief the driver library of the i2c peripheral ************************************************************************** * Copyright notice & Disclaimer @@ -182,11 +182,28 @@ i2c_status_type i2c_wait_end(i2c_handle_type* hi2c, uint32_t timeout) } /** - * @brief wait for the flag. + * @brief wait for the flag to be set or reset, only BUSYF flag + * is waiting to be reset, and other flags are waiting to be set * @param hi2c: the handle points to the operation information. - * @param flag: flag to wait. - * @param status: status to wait. - * @param event_check: flag to check while waiting for the flag. + * @param flag: specifies the flag to check. + * this parameter can be one of the following values: + * - I2C_TDBE_FLAG: transmit data buffer empty flag. + * - I2C_TDIS_FLAG: send interrupt status. + * - I2C_RDBF_FLAG: receive data buffer full flag. + * - I2C_ADDRF_FLAG: 0~7 bit address match flag. + * - I2C_ACKFAIL_FLAG: acknowledge failure flag. + * - I2C_STOPF_FLAG: stop condition generation complete flag. + * - I2C_TDC_FLAG: transmit data complete flag. + * - I2C_TCRLD_FLAG: transmission is complete, waiting to load data. + * - I2C_BUSERR_FLAG: bus error flag. + * - I2C_ARLOST_FLAG: arbitration lost flag. + * - I2C_OUF_FLAG: overflow or underflow flag. + * - I2C_PECERR_FLAG: pec receive error flag. + * - I2C_TMOUT_FLAG: smbus timeout flag. + * - I2C_ALERTF_FLAG: smbus alert flag. + * - I2C_BUSYF_FLAG: bus busy flag transmission mode. + * - I2C_SDIR_FLAG: slave data transmit direction. + * @param event_check: check other error flags while waiting for the flag. * parameter as following values: * - I2C_EVENT_CHECK_NONE * - I2C_EVENT_CHECK_ACKFAIL @@ -194,46 +211,62 @@ i2c_status_type i2c_wait_end(i2c_handle_type* hi2c, uint32_t timeout) * @param timeout: maximum waiting time. * @retval i2c status. */ -i2c_status_type i2c_wait_flag(i2c_handle_type* hi2c, uint32_t flag, flag_status status, uint32_t event_check, uint32_t timeout) +i2c_status_type i2c_wait_flag(i2c_handle_type* hi2c, uint32_t flag, uint32_t event_check, uint32_t timeout) { - while(i2c_flag_get(hi2c->i2cx, flag) == status) + if(flag == I2C_BUSYF_FLAG) { - /* check the ack fail flag */ - if(event_check & I2C_EVENT_CHECK_ACKFAIL) + while(i2c_flag_get(hi2c->i2cx, flag) != RESET) { - if(hi2c->i2cx->sts & I2C_ACKFAIL_FLAG) + /* check timeout */ + if((timeout--) == 0) { - /* clear ack fail flag */ - i2c_flag_clear(hi2c->i2cx, I2C_ACKFAIL_FLAG); + hi2c->error_code = I2C_ERR_TIMEOUT; - hi2c->error_code = I2C_ERR_ACKFAIL; - - return I2C_ERR_ACKFAIL; + return I2C_ERR_TIMEOUT; } } - - /* check the stop flag */ - if(event_check & I2C_EVENT_CHECK_STOP) + } + else + { + while(i2c_flag_get(hi2c->i2cx, flag) == RESET) { - if(hi2c->i2cx->sts & I2C_STOPF_FLAG) + /* check the ack fail flag */ + if(event_check & I2C_EVENT_CHECK_ACKFAIL) { - /* clear stop flag */ - i2c_flag_clear(hi2c->i2cx, I2C_STOPF_FLAG); + if(i2c_flag_get(hi2c->i2cx, I2C_ACKFAIL_FLAG) != RESET) + { + /* clear ack fail flag */ + i2c_flag_clear(hi2c->i2cx, I2C_ACKFAIL_FLAG); - i2c_reset_ctrl2_register(hi2c); + hi2c->error_code = I2C_ERR_ACKFAIL; - hi2c->error_code = I2C_ERR_STOP; - - return I2C_ERR_STOP; + return I2C_ERR_ACKFAIL; + } } - } - /* check timeout */ - if((timeout--) == 0) - { - hi2c->error_code = I2C_ERR_TIMEOUT; + /* check the stop flag */ + if(event_check & I2C_EVENT_CHECK_STOP) + { + if(i2c_flag_get(hi2c->i2cx, I2C_STOPF_FLAG) != RESET) + { + /* clear stop flag */ + i2c_flag_clear(hi2c->i2cx, I2C_STOPF_FLAG); - return I2C_ERR_TIMEOUT; + i2c_reset_ctrl2_register(hi2c); + + hi2c->error_code = I2C_ERR_STOP; + + return I2C_ERR_STOP; + } + } + + /* check timeout */ + if((timeout--) == 0) + { + hi2c->error_code = I2C_ERR_TIMEOUT; + + return I2C_ERR_TIMEOUT; + } } } @@ -274,26 +307,26 @@ void i2c_dma_config(i2c_handle_type* hi2c, dma_channel_type* dma_channel, uint8_ * @brief start transfer in poll mode or interrupt mode. * @param hi2c: the handle points to the operation information. * @param address: slave address. - * @param start_stop: config gen start condition mode. + * @param start: config gen start condition mode. * parameter as following values: * - I2C_WITHOUT_START: transfer data without start condition. * - I2C_GEN_START_READ: read data and generate start. * - I2C_GEN_START_WRITE: send data and generate start. * @retval i2c status. */ -void i2c_start_transfer(i2c_handle_type* hi2c, uint16_t address, i2c_start_stop_mode_type start_stop) +void i2c_start_transfer(i2c_handle_type* hi2c, uint16_t address, i2c_start_mode_type start) { if (hi2c->pcount > MAX_TRANSFER_CNT) { hi2c->psize = MAX_TRANSFER_CNT; - i2c_transmit_set(hi2c->i2cx, address, hi2c->psize, I2C_RELOAD_MODE, start_stop); + i2c_transmit_set(hi2c->i2cx, address, hi2c->psize, I2C_RELOAD_MODE, start); } else { hi2c->psize = hi2c->pcount; - i2c_transmit_set(hi2c->i2cx, address, hi2c->psize, I2C_AUTO_STOP_MODE, start_stop); + i2c_transmit_set(hi2c->i2cx, address, hi2c->psize, I2C_AUTO_STOP_MODE, start); } } @@ -301,14 +334,14 @@ void i2c_start_transfer(i2c_handle_type* hi2c, uint16_t address, i2c_start_stop_ * @brief start transfer in dma mode. * @param hi2c: the handle points to the operation information. * @param address: slave address. - * @param start_stop: config gen start condition mode. + * @param start: config gen start condition mode. * parameter as following values: * - I2C_WITHOUT_START: transfer data without start condition. * - I2C_GEN_START_READ: read data and generate start. * - I2C_GEN_START_WRITE: send data and generate start. * @retval i2c status. */ -void i2c_start_transfer_dma(i2c_handle_type* hi2c, dma_channel_type* dma_channelx, uint16_t address, i2c_start_stop_mode_type start_stop) +void i2c_start_transfer_dma(i2c_handle_type* hi2c, dma_channel_type* dma_channelx, uint16_t address, i2c_start_mode_type start) { if (hi2c->pcount > MAX_TRANSFER_CNT) { @@ -317,7 +350,7 @@ void i2c_start_transfer_dma(i2c_handle_type* hi2c, dma_channel_type* dma_channel /* config dma */ i2c_dma_config(hi2c, dma_channelx, hi2c->pbuff, hi2c->psize); - i2c_transmit_set(hi2c->i2cx, address, hi2c->psize, I2C_RELOAD_MODE, start_stop); + i2c_transmit_set(hi2c->i2cx, address, hi2c->psize, I2C_RELOAD_MODE, start); } else { @@ -326,7 +359,7 @@ void i2c_start_transfer_dma(i2c_handle_type* hi2c, dma_channel_type* dma_channel /* config dma */ i2c_dma_config(hi2c, dma_channelx, hi2c->pbuff, hi2c->psize); - i2c_transmit_set(hi2c->i2cx, address, hi2c->psize, I2C_AUTO_STOP_MODE, start_stop); + i2c_transmit_set(hi2c->i2cx, address, hi2c->psize, I2C_AUTO_STOP_MODE, start); } } @@ -347,8 +380,8 @@ i2c_status_type i2c_master_transmit(i2c_handle_type* hi2c, uint16_t address, uin hi2c->error_code = I2C_OK; - /* wait for the busy falg to be reset */ - if (i2c_wait_flag(hi2c, I2C_BUSYF_FLAG, SET, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK) + /* wait for the busy flag to be reset */ + if (i2c_wait_flag(hi2c, I2C_BUSYF_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK) { return I2C_ERR_STEP_1; } @@ -358,8 +391,8 @@ i2c_status_type i2c_master_transmit(i2c_handle_type* hi2c, uint16_t address, uin while (hi2c->pcount > 0) { - /* wait for the tdis falg to be set */ - if(i2c_wait_flag(hi2c, I2C_TDIS_FLAG, RESET, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK) + /* wait for the tdis flag to be set */ + if(i2c_wait_flag(hi2c, I2C_TDIS_FLAG, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK) { return I2C_ERR_STEP_2; } @@ -371,8 +404,8 @@ i2c_status_type i2c_master_transmit(i2c_handle_type* hi2c, uint16_t address, uin if ((hi2c->psize == 0) && (hi2c->pcount != 0)) { - /* wait for the tcrld falg to be set */ - if (i2c_wait_flag(hi2c, I2C_TCRLD_FLAG, RESET, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK) + /* wait for the tcrld flag to be set */ + if (i2c_wait_flag(hi2c, I2C_TCRLD_FLAG, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK) { return I2C_ERR_STEP_3; } @@ -382,8 +415,8 @@ i2c_status_type i2c_master_transmit(i2c_handle_type* hi2c, uint16_t address, uin } } - /* wait for the stop falg to be set */ - if(i2c_wait_flag(hi2c, I2C_STOPF_FLAG, RESET, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK) + /* wait for the stop flag to be set */ + if(i2c_wait_flag(hi2c, I2C_STOPF_FLAG, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK) { return I2C_ERR_STEP_4; } @@ -413,8 +446,8 @@ i2c_status_type i2c_slave_receive(i2c_handle_type* hi2c, uint8_t* pdata, uint16_ hi2c->error_code = I2C_OK; - /* wait for the busy falg to be reset */ - if(i2c_wait_flag(hi2c, I2C_BUSYF_FLAG, SET, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK) + /* wait for the busy flag to be reset */ + if(i2c_wait_flag(hi2c, I2C_BUSYF_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK) { return I2C_ERR_STEP_1; } @@ -422,8 +455,8 @@ i2c_status_type i2c_slave_receive(i2c_handle_type* hi2c, uint8_t* pdata, uint16_ /* enable acknowledge */ i2c_ack_enable(hi2c->i2cx, TRUE); - /* wait for the addr falg to be set */ - if (i2c_wait_flag(hi2c, I2C_ADDRF_FLAG, RESET, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK) + /* wait for the addr flag to be set */ + if (i2c_wait_flag(hi2c, I2C_ADDRF_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK) { return I2C_ERR_STEP_2; } @@ -431,19 +464,10 @@ i2c_status_type i2c_slave_receive(i2c_handle_type* hi2c, uint8_t* pdata, uint16_ /* clear addr flag */ i2c_flag_clear(hi2c->i2cx, I2C_ADDRF_FLAG); - /* wait for the dir falg to be reset */ - if (i2c_wait_flag(hi2c, I2C_SDIR_FLAG, SET, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK) - { - /* disable acknowledge */ - i2c_ack_enable(hi2c->i2cx, FALSE); - - return I2C_ERR_STEP_3; - } - while (hi2c->pcount > 0) { - /* wait for the rdbf falg to be set */ - if(i2c_wait_flag(hi2c, I2C_RDBF_FLAG, RESET, I2C_EVENT_CHECK_STOP, timeout) != I2C_OK) + /* wait for the rdbf flag to be set */ + if(i2c_wait_flag(hi2c, I2C_RDBF_FLAG, I2C_EVENT_CHECK_STOP, timeout) != I2C_OK) { /* disable acknowledge */ i2c_ack_enable(hi2c->i2cx, FALSE); @@ -464,8 +488,8 @@ i2c_status_type i2c_slave_receive(i2c_handle_type* hi2c, uint8_t* pdata, uint16_ hi2c->pcount--; } - /* wait for the stop falg to be set */ - if(i2c_wait_flag(hi2c, I2C_STOPF_FLAG, RESET, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK) + /* wait for the stop flag to be set */ + if(i2c_wait_flag(hi2c, I2C_STOPF_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK) { /* disable acknowledge */ i2c_ack_enable(hi2c->i2cx, FALSE); @@ -476,8 +500,8 @@ i2c_status_type i2c_slave_receive(i2c_handle_type* hi2c, uint8_t* pdata, uint16_ /* clear stop flag */ i2c_flag_clear(hi2c->i2cx, I2C_STOPF_FLAG); - /* wait for the busy falg to be reset */ - if (i2c_wait_flag(hi2c, I2C_BUSYF_FLAG, SET, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK) + /* wait for the busy flag to be reset */ + if (i2c_wait_flag(hi2c, I2C_BUSYF_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK) { /* disable acknowledge */ i2c_ack_enable(hi2c->i2cx, FALSE); @@ -505,8 +529,8 @@ i2c_status_type i2c_master_receive(i2c_handle_type* hi2c, uint16_t address, uint hi2c->error_code = I2C_OK; - /* wait for the busy falg to be reset */ - if (i2c_wait_flag(hi2c, I2C_BUSYF_FLAG, SET, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK) + /* wait for the busy flag to be reset */ + if (i2c_wait_flag(hi2c, I2C_BUSYF_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK) { return I2C_ERR_STEP_1; } @@ -516,8 +540,8 @@ i2c_status_type i2c_master_receive(i2c_handle_type* hi2c, uint16_t address, uint while (hi2c->pcount > 0) { - /* wait for the rdbf falg to be set */ - if(i2c_wait_flag(hi2c, I2C_RDBF_FLAG, RESET, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK) + /* wait for the rdbf flag to be set */ + if(i2c_wait_flag(hi2c, I2C_RDBF_FLAG, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK) { return I2C_ERR_STEP_2; } @@ -529,8 +553,8 @@ i2c_status_type i2c_master_receive(i2c_handle_type* hi2c, uint16_t address, uint if ((hi2c->psize == 0) && (hi2c->pcount != 0)) { - /* wait for the tcrld falg to be set */ - if (i2c_wait_flag(hi2c, I2C_TCRLD_FLAG, RESET, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK) + /* wait for the tcrld flag to be set */ + if (i2c_wait_flag(hi2c, I2C_TCRLD_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK) { return I2C_ERR_STEP_3; } @@ -540,8 +564,8 @@ i2c_status_type i2c_master_receive(i2c_handle_type* hi2c, uint16_t address, uint } } - /* wait for the stop falg to be set */ - if(i2c_wait_flag(hi2c, I2C_STOPF_FLAG, RESET, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK) + /* wait for the stop flag to be set */ + if(i2c_wait_flag(hi2c, I2C_STOPF_FLAG, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK) { return I2C_ERR_STEP_4; } @@ -571,8 +595,8 @@ i2c_status_type i2c_slave_transmit(i2c_handle_type* hi2c, uint8_t* pdata, uint16 hi2c->error_code = I2C_OK; - /* wait for the busy falg to be reset */ - if(i2c_wait_flag(hi2c, I2C_BUSYF_FLAG, SET, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK) + /* wait for the busy flag to be reset */ + if(i2c_wait_flag(hi2c, I2C_BUSYF_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK) { return I2C_ERR_STEP_1; } @@ -580,8 +604,8 @@ i2c_status_type i2c_slave_transmit(i2c_handle_type* hi2c, uint8_t* pdata, uint16 /* enable acknowledge */ i2c_ack_enable(hi2c->i2cx, TRUE); - /* wait for the addr falg to be set */ - if (i2c_wait_flag(hi2c, I2C_ADDRF_FLAG, RESET, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK) + /* wait for the addr flag to be set */ + if (i2c_wait_flag(hi2c, I2C_ADDRF_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK) { /* disable acknowledge */ i2c_ack_enable(hi2c->i2cx, FALSE); @@ -594,8 +618,8 @@ i2c_status_type i2c_slave_transmit(i2c_handle_type* hi2c, uint8_t* pdata, uint16 /* if 10-bit address mode is used */ if (hi2c->i2cx->ctrl2_bit.addr10 != RESET) { - /* wait for the addr falg to be set */ - if (i2c_wait_flag(hi2c, I2C_ADDRF_FLAG, RESET, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK) + /* wait for the addr flag to be set */ + if (i2c_wait_flag(hi2c, I2C_ADDRF_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK) { /* disable acknowledge */ i2c_ack_enable(hi2c->i2cx, FALSE); @@ -607,19 +631,10 @@ i2c_status_type i2c_slave_transmit(i2c_handle_type* hi2c, uint8_t* pdata, uint16 i2c_flag_clear(hi2c->i2cx, I2C_ADDRF_FLAG); } - /* wait for the dir falg to be set */ - if (i2c_wait_flag(hi2c, I2C_SDIR_FLAG, RESET, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK) - { - /* disable acknowledge */ - i2c_ack_enable(hi2c->i2cx, FALSE); - - return I2C_ERR_STEP_4; - } - while (hi2c->pcount > 0) { - /* wait for the tdis falg to be set */ - if(i2c_wait_flag(hi2c, I2C_TDIS_FLAG, RESET, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK) + /* wait for the tdis flag to be set */ + if(i2c_wait_flag(hi2c, I2C_TDIS_FLAG, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK) { /* disable acknowledge */ i2c_ack_enable(hi2c->i2cx, FALSE); @@ -632,8 +647,8 @@ i2c_status_type i2c_slave_transmit(i2c_handle_type* hi2c, uint8_t* pdata, uint16 hi2c->pcount--; } - /* wait for the ackfail falg to be set */ - if(i2c_wait_flag(hi2c, I2C_ACKFAIL_FLAG, RESET, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK) + /* wait for the ackfail flag to be set */ + if(i2c_wait_flag(hi2c, I2C_ACKFAIL_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK) { return I2C_ERR_STEP_6; } @@ -641,8 +656,8 @@ i2c_status_type i2c_slave_transmit(i2c_handle_type* hi2c, uint8_t* pdata, uint16 /* clear ack fail flag */ i2c_flag_clear(hi2c->i2cx, I2C_ACKFAIL_FLAG); - /* wait for the stop falg to be set */ - if(i2c_wait_flag(hi2c, I2C_STOPF_FLAG, RESET, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK) + /* wait for the stop flag to be set */ + if(i2c_wait_flag(hi2c, I2C_STOPF_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK) { /* disable acknowledge */ i2c_ack_enable(hi2c->i2cx, FALSE); @@ -653,8 +668,8 @@ i2c_status_type i2c_slave_transmit(i2c_handle_type* hi2c, uint8_t* pdata, uint16 /* clear stop flag */ i2c_flag_clear(hi2c->i2cx, I2C_STOPF_FLAG); - /* wait for the busy falg to be reset */ - if (i2c_wait_flag(hi2c, I2C_BUSYF_FLAG, SET, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK) + /* wait for the busy flag to be reset */ + if (i2c_wait_flag(hi2c, I2C_BUSYF_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK) { /* disable acknowledge */ i2c_ack_enable(hi2c->i2cx, FALSE); @@ -688,8 +703,8 @@ i2c_status_type i2c_master_transmit_int(i2c_handle_type* hi2c, uint16_t address, hi2c->error_code = I2C_OK; - /* wait for the busy falg to be reset */ - if (i2c_wait_flag(hi2c, I2C_BUSYF_FLAG, SET, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK) + /* wait for the busy flag to be reset */ + if (i2c_wait_flag(hi2c, I2C_BUSYF_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK) { return I2C_ERR_STEP_1; } @@ -722,8 +737,8 @@ i2c_status_type i2c_slave_receive_int(i2c_handle_type* hi2c, uint8_t* pdata, uin hi2c->error_code = I2C_OK; - /* wait for the busy falg to be reset */ - if (i2c_wait_flag(hi2c, I2C_BUSYF_FLAG, SET, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK) + /* wait for the busy flag to be reset */ + if (i2c_wait_flag(hi2c, I2C_BUSYF_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK) { return I2C_ERR_STEP_1; } @@ -757,8 +772,8 @@ i2c_status_type i2c_master_receive_int(i2c_handle_type* hi2c, uint16_t address, hi2c->error_code = I2C_OK; - /* wait for the busy falg to be reset */ - if (i2c_wait_flag(hi2c, I2C_BUSYF_FLAG, SET, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK) + /* wait for the busy flag to be reset */ + if (i2c_wait_flag(hi2c, I2C_BUSYF_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK) { return I2C_ERR_STEP_1; } @@ -791,8 +806,8 @@ i2c_status_type i2c_slave_transmit_int(i2c_handle_type* hi2c, uint8_t* pdata, ui hi2c->error_code = I2C_OK; - /* wait for the busy falg to be reset */ - if (i2c_wait_flag(hi2c, I2C_BUSYF_FLAG, SET, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK) + /* wait for the busy flag to be reset */ + if (i2c_wait_flag(hi2c, I2C_BUSYF_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK) { return I2C_ERR_STEP_1; } @@ -828,8 +843,8 @@ i2c_status_type i2c_master_transmit_dma(i2c_handle_type* hi2c, uint16_t address, hi2c->error_code = I2C_OK; - /* wait for the busy falg to be reset */ - if(i2c_wait_flag(hi2c, I2C_BUSYF_FLAG, SET, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK) + /* wait for the busy flag to be reset */ + if(i2c_wait_flag(hi2c, I2C_BUSYF_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK) { return I2C_ERR_STEP_1; } @@ -868,8 +883,8 @@ i2c_status_type i2c_slave_receive_dma(i2c_handle_type* hi2c, uint8_t* pdata, uin hi2c->error_code = I2C_OK; - /* wait for the busy falg to be reset */ - if(i2c_wait_flag(hi2c, I2C_BUSYF_FLAG, SET, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK) + /* wait for the busy flag to be reset */ + if(i2c_wait_flag(hi2c, I2C_BUSYF_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK) { return I2C_ERR_STEP_1; } @@ -912,8 +927,8 @@ i2c_status_type i2c_master_receive_dma(i2c_handle_type* hi2c, uint16_t address, hi2c->error_code = I2C_OK; - /* wait for the busy falg to be reset */ - if(i2c_wait_flag(hi2c, I2C_BUSYF_FLAG, SET, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK) + /* wait for the busy flag to be reset */ + if(i2c_wait_flag(hi2c, I2C_BUSYF_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK) { return I2C_ERR_STEP_1; } @@ -952,8 +967,8 @@ i2c_status_type i2c_slave_transmit_dma(i2c_handle_type* hi2c, uint8_t* pdata, ui hi2c->error_code = I2C_OK; - /* wait for the busy falg to be reset */ - if(i2c_wait_flag(hi2c, I2C_BUSYF_FLAG, SET, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK) + /* wait for the busy flag to be reset */ + if(i2c_wait_flag(hi2c, I2C_BUSYF_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK) { return I2C_ERR_STEP_1; } @@ -994,8 +1009,8 @@ i2c_status_type i2c_memory_write(i2c_handle_type* hi2c, uint16_t address, uint16 hi2c->error_code = I2C_OK; - /* wait for the busy falg to be reset */ - if (i2c_wait_flag(hi2c, I2C_BUSYF_FLAG, SET, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK) + /* wait for the busy flag to be reset */ + if (i2c_wait_flag(hi2c, I2C_BUSYF_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK) { return I2C_ERR_STEP_1; } @@ -1003,8 +1018,8 @@ i2c_status_type i2c_memory_write(i2c_handle_type* hi2c, uint16_t address, uint16 /* start transfer */ i2c_start_transfer(hi2c, address, I2C_GEN_START_WRITE); - /* wait for the tdis falg to be set */ - if(i2c_wait_flag(hi2c, I2C_TDIS_FLAG, RESET, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK) + /* wait for the tdis flag to be set */ + if(i2c_wait_flag(hi2c, I2C_TDIS_FLAG, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK) { return I2C_ERR_STEP_2; } @@ -1017,8 +1032,8 @@ i2c_status_type i2c_memory_write(i2c_handle_type* hi2c, uint16_t address, uint16 while (hi2c->pcount > 0) { - /* wait for the tdis falg to be set */ - if(i2c_wait_flag(hi2c, I2C_TDIS_FLAG, RESET, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK) + /* wait for the tdis flag to be set */ + if(i2c_wait_flag(hi2c, I2C_TDIS_FLAG, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK) { return I2C_ERR_STEP_3; } @@ -1030,8 +1045,8 @@ i2c_status_type i2c_memory_write(i2c_handle_type* hi2c, uint16_t address, uint16 if ((hi2c->psize == 0) && (hi2c->pcount != 0)) { - /* wait for the tcrld falg to be set */ - if (i2c_wait_flag(hi2c, I2C_TCRLD_FLAG, RESET, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK) + /* wait for the tcrld flag to be set */ + if (i2c_wait_flag(hi2c, I2C_TCRLD_FLAG, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK) { return I2C_ERR_STEP_4; } @@ -1041,8 +1056,8 @@ i2c_status_type i2c_memory_write(i2c_handle_type* hi2c, uint16_t address, uint16 } } - /* wait for the stop falg to be set */ - if(i2c_wait_flag(hi2c, I2C_STOPF_FLAG, RESET, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK) + /* wait for the stop flag to be set */ + if(i2c_wait_flag(hi2c, I2C_STOPF_FLAG, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK) { return I2C_ERR_STEP_5; } @@ -1074,8 +1089,8 @@ i2c_status_type i2c_memory_read(i2c_handle_type* hi2c, uint16_t address, uint16_ hi2c->error_code = I2C_OK; - /* wait for the busy falg to be reset */ - if(i2c_wait_flag(hi2c, I2C_BUSYF_FLAG, SET, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK) + /* wait for the busy flag to be reset */ + if(i2c_wait_flag(hi2c, I2C_BUSYF_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK) { return I2C_ERR_STEP_1; } @@ -1083,8 +1098,8 @@ i2c_status_type i2c_memory_read(i2c_handle_type* hi2c, uint16_t address, uint16_ /* start transfer */ i2c_transmit_set(hi2c->i2cx, address, 1, I2C_SOFT_STOP_MODE, I2C_GEN_START_WRITE); - /* wait for the tdis falg to be set */ - if(i2c_wait_flag(hi2c, I2C_TDIS_FLAG, RESET, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK) + /* wait for the tdis flag to be set */ + if(i2c_wait_flag(hi2c, I2C_TDIS_FLAG, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK) { return I2C_ERR_STEP_2; } @@ -1092,8 +1107,8 @@ i2c_status_type i2c_memory_read(i2c_handle_type* hi2c, uint16_t address, uint16_ /* send memory address */ i2c_data_send(hi2c->i2cx, mem_address); - /* wait for the tdc falg to be set */ - if (i2c_wait_flag(hi2c, I2C_TDC_FLAG, RESET, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK) + /* wait for the tdc flag to be set */ + if (i2c_wait_flag(hi2c, I2C_TDC_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK) { return I2C_ERR_STEP_3; } @@ -1103,8 +1118,8 @@ i2c_status_type i2c_memory_read(i2c_handle_type* hi2c, uint16_t address, uint16_ while (hi2c->pcount > 0) { - /* wait for the rdbf falg to be set */ - if (i2c_wait_flag(hi2c, I2C_RDBF_FLAG, RESET, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK) + /* wait for the rdbf flag to be set */ + if (i2c_wait_flag(hi2c, I2C_RDBF_FLAG, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK) { return I2C_ERR_STEP_4; } @@ -1116,8 +1131,8 @@ i2c_status_type i2c_memory_read(i2c_handle_type* hi2c, uint16_t address, uint16_ if ((hi2c->psize == 0) && (hi2c->pcount != 0)) { - /* wait for the tcrld falg to be set */ - if (i2c_wait_flag(hi2c, I2C_TCRLD_FLAG, RESET, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK) + /* wait for the tcrld flag to be set */ + if (i2c_wait_flag(hi2c, I2C_TCRLD_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK) { return I2C_ERR_STEP_5; } @@ -1127,8 +1142,8 @@ i2c_status_type i2c_memory_read(i2c_handle_type* hi2c, uint16_t address, uint16_ } } - /* wait for the stop falg to be set */ - if (i2c_wait_flag(hi2c, I2C_STOPF_FLAG, RESET, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK) + /* wait for the stop flag to be set */ + if (i2c_wait_flag(hi2c, I2C_STOPF_FLAG, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK) { return I2C_ERR_STEP_6; } @@ -1163,8 +1178,8 @@ i2c_status_type i2c_memory_write_int(i2c_handle_type* hi2c, uint16_t address, ui hi2c->error_code = I2C_OK; - /* wait for the busy falg to be reset */ - if (i2c_wait_flag(hi2c, I2C_BUSYF_FLAG, SET, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK) + /* wait for the busy flag to be reset */ + if (i2c_wait_flag(hi2c, I2C_BUSYF_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK) { return I2C_ERR_STEP_1; } @@ -1172,8 +1187,8 @@ i2c_status_type i2c_memory_write_int(i2c_handle_type* hi2c, uint16_t address, ui /* start transfer */ i2c_start_transfer(hi2c, address, I2C_GEN_START_WRITE); - /* wait for the tdis falg to be set */ - if(i2c_wait_flag(hi2c, I2C_TDIS_FLAG, RESET, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK) + /* wait for the tdis flag to be set */ + if(i2c_wait_flag(hi2c, I2C_TDIS_FLAG, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK) { return I2C_ERR_STEP_2; } @@ -1210,8 +1225,8 @@ i2c_status_type i2c_memory_read_int(i2c_handle_type* hi2c, uint16_t address, uin hi2c->error_code = I2C_OK; - /* wait for the busy falg to be reset */ - if(i2c_wait_flag(hi2c, I2C_BUSYF_FLAG, SET, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK) + /* wait for the busy flag to be reset */ + if(i2c_wait_flag(hi2c, I2C_BUSYF_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK) { return I2C_ERR_STEP_1; } @@ -1219,8 +1234,8 @@ i2c_status_type i2c_memory_read_int(i2c_handle_type* hi2c, uint16_t address, uin /* start transfer */ i2c_transmit_set(hi2c->i2cx, address, 1, I2C_SOFT_STOP_MODE, I2C_GEN_START_WRITE); - /* wait for the tdis falg to be set */ - if(i2c_wait_flag(hi2c, I2C_TDIS_FLAG, RESET, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK) + /* wait for the tdis flag to be set */ + if(i2c_wait_flag(hi2c, I2C_TDIS_FLAG, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK) { return I2C_ERR_STEP_2; } @@ -1228,8 +1243,8 @@ i2c_status_type i2c_memory_read_int(i2c_handle_type* hi2c, uint16_t address, uin /* send memory address */ i2c_data_send(hi2c->i2cx, mem_address); - /* wait for the tdc falg to be set */ - if (i2c_wait_flag(hi2c, I2C_TDC_FLAG, RESET, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK) + /* wait for the tdc flag to be set */ + if (i2c_wait_flag(hi2c, I2C_TDC_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK) { return I2C_ERR_STEP_3; } @@ -1267,8 +1282,8 @@ i2c_status_type i2c_memory_write_dma(i2c_handle_type* hi2c, uint16_t address, ui /* disable dma request */ i2c_dma_enable(hi2c->i2cx, I2C_DMA_REQUEST_TX, FALSE); - /* wait for the busy falg to be reset */ - if(i2c_wait_flag(hi2c, I2C_BUSYF_FLAG, SET, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK) + /* wait for the busy flag to be reset */ + if(i2c_wait_flag(hi2c, I2C_BUSYF_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK) { return I2C_ERR_STEP_1; } @@ -1276,8 +1291,8 @@ i2c_status_type i2c_memory_write_dma(i2c_handle_type* hi2c, uint16_t address, ui /* transfer config */ i2c_transmit_set(hi2c->i2cx, address, 1, I2C_RELOAD_MODE, I2C_GEN_START_WRITE); - /* wait for the tdis falg to be set */ - if(i2c_wait_flag(hi2c, I2C_TDIS_FLAG, RESET, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK) + /* wait for the tdis flag to be set */ + if(i2c_wait_flag(hi2c, I2C_TDIS_FLAG, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK) { return I2C_ERR_STEP_2; } @@ -1285,8 +1300,8 @@ i2c_status_type i2c_memory_write_dma(i2c_handle_type* hi2c, uint16_t address, ui /* send memory address */ i2c_data_send(hi2c->i2cx, mem_address); - /* wait for the tcrld falg to be set */ - if (i2c_wait_flag(hi2c, I2C_TCRLD_FLAG, RESET, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK) + /* wait for the tcrld flag to be set */ + if (i2c_wait_flag(hi2c, I2C_TCRLD_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK) { return I2C_ERR_STEP_3; } @@ -1324,8 +1339,8 @@ i2c_status_type i2c_memory_read_dma(i2c_handle_type* hi2c, uint16_t address, uin hi2c->error_code = I2C_OK; - /* wait for the busy falg to be reset */ - if(i2c_wait_flag(hi2c, I2C_BUSYF_FLAG, SET, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK) + /* wait for the busy flag to be reset */ + if(i2c_wait_flag(hi2c, I2C_BUSYF_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK) { return I2C_ERR_STEP_1; } @@ -1333,8 +1348,8 @@ i2c_status_type i2c_memory_read_dma(i2c_handle_type* hi2c, uint16_t address, uin /* start transfer */ i2c_transmit_set(hi2c->i2cx, address, 1, I2C_SOFT_STOP_MODE, I2C_GEN_START_WRITE); - /* wait for the tdis falg to be set */ - if(i2c_wait_flag(hi2c, I2C_TDIS_FLAG, RESET, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK) + /* wait for the tdis flag to be set */ + if(i2c_wait_flag(hi2c, I2C_TDIS_FLAG, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK) { return I2C_ERR_STEP_2; } @@ -1342,8 +1357,8 @@ i2c_status_type i2c_memory_read_dma(i2c_handle_type* hi2c, uint16_t address, uin /* send memory address */ i2c_data_send(hi2c->i2cx, mem_address); - /* wait for the tdc falg to be set */ - if (i2c_wait_flag(hi2c, I2C_TDC_FLAG, RESET, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK) + /* wait for the tdc flag to be set */ + if (i2c_wait_flag(hi2c, I2C_TDC_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK) { return I2C_ERR_STEP_3; } @@ -1380,8 +1395,8 @@ i2c_status_type i2c_smbus_master_transmit(i2c_handle_type* hi2c, uint16_t addres hi2c->error_code = I2C_OK; - /* wait for the busy falg to be reset */ - if (i2c_wait_flag(hi2c, I2C_BUSYF_FLAG, SET, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK) + /* wait for the busy flag to be reset */ + if (i2c_wait_flag(hi2c, I2C_BUSYF_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK) { return I2C_ERR_STEP_1; } @@ -1399,8 +1414,8 @@ i2c_status_type i2c_smbus_master_transmit(i2c_handle_type* hi2c, uint16_t addres while (hi2c->pcount > 0) { - /* wait for the tdis falg to be set */ - if(i2c_wait_flag(hi2c, I2C_TDIS_FLAG, RESET, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK) + /* wait for the tdis flag to be set */ + if(i2c_wait_flag(hi2c, I2C_TDIS_FLAG, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK) { return I2C_ERR_STEP_2; } @@ -1412,8 +1427,8 @@ i2c_status_type i2c_smbus_master_transmit(i2c_handle_type* hi2c, uint16_t addres if ((hi2c->psize == 0) && (hi2c->pcount != 0)) { - /* wait for the tcrld falg to be set */ - if (i2c_wait_flag(hi2c, I2C_TCRLD_FLAG, RESET, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK) + /* wait for the tcrld flag to be set */ + if (i2c_wait_flag(hi2c, I2C_TCRLD_FLAG, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK) { return I2C_ERR_STEP_3; } @@ -1423,8 +1438,8 @@ i2c_status_type i2c_smbus_master_transmit(i2c_handle_type* hi2c, uint16_t addres } } - /* wait for the stop falg to be set */ - if(i2c_wait_flag(hi2c, I2C_STOPF_FLAG, RESET, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK) + /* wait for the stop flag to be set */ + if(i2c_wait_flag(hi2c, I2C_STOPF_FLAG, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK) { return I2C_ERR_STEP_4; } @@ -1463,8 +1478,8 @@ i2c_status_type i2c_smbus_slave_receive(i2c_handle_type* hi2c, uint8_t* pdata, u /* enable acknowledge */ i2c_ack_enable(hi2c->i2cx, TRUE); - /* wait for the addr falg to be set */ - if (i2c_wait_flag(hi2c, I2C_ADDRF_FLAG, RESET, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK) + /* wait for the addr flag to be set */ + if (i2c_wait_flag(hi2c, I2C_ADDRF_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK) { return I2C_ERR_STEP_1; } @@ -1478,19 +1493,10 @@ i2c_status_type i2c_smbus_slave_receive(i2c_handle_type* hi2c, uint8_t* pdata, u /* clear addr flag */ i2c_flag_clear(hi2c->i2cx, I2C_ADDRF_FLAG); - /* wait for the dir falg to be reset */ - if (i2c_wait_flag(hi2c, I2C_SDIR_FLAG, SET, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK) - { - /* disable acknowledge */ - i2c_ack_enable(hi2c->i2cx, FALSE); - - return I2C_ERR_STEP_2; - } - while (hi2c->pcount > 0) { - /* wait for the rdbf falg to be set */ - if(i2c_wait_flag(hi2c, I2C_RDBF_FLAG, RESET, I2C_EVENT_CHECK_STOP, timeout) != I2C_OK) + /* wait for the rdbf flag to be set */ + if(i2c_wait_flag(hi2c, I2C_RDBF_FLAG, I2C_EVENT_CHECK_STOP, timeout) != I2C_OK) { /* disable acknowledge */ i2c_ack_enable(hi2c->i2cx, FALSE); @@ -1511,8 +1517,8 @@ i2c_status_type i2c_smbus_slave_receive(i2c_handle_type* hi2c, uint8_t* pdata, u hi2c->pcount--; } - /* wait for the stop falg to be set */ - if(i2c_wait_flag(hi2c, I2C_STOPF_FLAG, RESET, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK) + /* wait for the stop flag to be set */ + if(i2c_wait_flag(hi2c, I2C_STOPF_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK) { /* disable acknowledge */ i2c_ack_enable(hi2c->i2cx, FALSE); @@ -1523,8 +1529,8 @@ i2c_status_type i2c_smbus_slave_receive(i2c_handle_type* hi2c, uint8_t* pdata, u /* clear stop flag */ i2c_flag_clear(hi2c->i2cx, I2C_STOPF_FLAG); - /* wait for the busy falg to be reset */ - if (i2c_wait_flag(hi2c, I2C_BUSYF_FLAG, SET, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK) + /* wait for the busy flag to be reset */ + if (i2c_wait_flag(hi2c, I2C_BUSYF_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK) { /* disable acknowledge */ i2c_ack_enable(hi2c->i2cx, FALSE); @@ -1555,8 +1561,8 @@ i2c_status_type i2c_smbus_master_receive(i2c_handle_type* hi2c, uint16_t address hi2c->error_code = I2C_OK; - /* wait for the busy falg to be reset */ - if (i2c_wait_flag(hi2c, I2C_BUSYF_FLAG, SET, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK) + /* wait for the busy flag to be reset */ + if (i2c_wait_flag(hi2c, I2C_BUSYF_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK) { return I2C_ERR_STEP_1; } @@ -1572,8 +1578,8 @@ i2c_status_type i2c_smbus_master_receive(i2c_handle_type* hi2c, uint16_t address while (hi2c->pcount > 0) { - /* wait for the rdbf falg to be set */ - if(i2c_wait_flag(hi2c, I2C_RDBF_FLAG, RESET, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK) + /* wait for the rdbf flag to be set */ + if(i2c_wait_flag(hi2c, I2C_RDBF_FLAG, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK) { return I2C_ERR_STEP_2; } @@ -1585,8 +1591,8 @@ i2c_status_type i2c_smbus_master_receive(i2c_handle_type* hi2c, uint16_t address if ((hi2c->psize == 0) && (hi2c->pcount != 0)) { - /* wait for the tcrld falg to be set */ - if (i2c_wait_flag(hi2c, I2C_TCRLD_FLAG, RESET, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK) + /* wait for the tcrld flag to be set */ + if (i2c_wait_flag(hi2c, I2C_TCRLD_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK) { return I2C_ERR_STEP_3; } @@ -1596,8 +1602,8 @@ i2c_status_type i2c_smbus_master_receive(i2c_handle_type* hi2c, uint16_t address } } - /* wait for the stop falg to be set */ - if(i2c_wait_flag(hi2c, I2C_STOPF_FLAG, RESET, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK) + /* wait for the stop flag to be set */ + if(i2c_wait_flag(hi2c, I2C_STOPF_FLAG, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK) { return I2C_ERR_STEP_4; } @@ -1636,8 +1642,8 @@ i2c_status_type i2c_smbus_slave_transmit(i2c_handle_type* hi2c, uint8_t* pdata, /* enable acknowledge */ i2c_ack_enable(hi2c->i2cx, TRUE); - /* wait for the addr falg to be set */ - if (i2c_wait_flag(hi2c, I2C_ADDRF_FLAG, RESET, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK) + /* wait for the addr flag to be set */ + if (i2c_wait_flag(hi2c, I2C_ADDRF_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK) { /* disable acknowledge */ i2c_ack_enable(hi2c->i2cx, FALSE); @@ -1660,8 +1666,8 @@ i2c_status_type i2c_smbus_slave_transmit(i2c_handle_type* hi2c, uint8_t* pdata, /* if 10-bit address mode is used */ if (hi2c->i2cx->ctrl2_bit.addr10 != RESET) { - /* wait for the addr falg to be set */ - if (i2c_wait_flag(hi2c, I2C_ADDRF_FLAG, RESET, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK) + /* wait for the addr flag to be set */ + if (i2c_wait_flag(hi2c, I2C_ADDRF_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK) { /* disable acknowledge */ i2c_ack_enable(hi2c->i2cx, FALSE); @@ -1679,21 +1685,12 @@ i2c_status_type i2c_smbus_slave_transmit(i2c_handle_type* hi2c, uint8_t* pdata, i2c_flag_clear(hi2c->i2cx, I2C_ADDRF_FLAG); } - /* wait for the dir falg to be set */ - if (i2c_wait_flag(hi2c, I2C_SDIR_FLAG, RESET, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK) - { - /* disable acknowledge */ - i2c_ack_enable(hi2c->i2cx, FALSE); - - return I2C_ERR_STEP_3; - } - hi2c->pcount--; while (hi2c->pcount > 0) { - /* wait for the tdis falg to be set */ - if(i2c_wait_flag(hi2c, I2C_TDIS_FLAG, RESET, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK) + /* wait for the tdis flag to be set */ + if(i2c_wait_flag(hi2c, I2C_TDIS_FLAG, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK) { /* disable acknowledge */ i2c_ack_enable(hi2c->i2cx, FALSE); @@ -1706,8 +1703,8 @@ i2c_status_type i2c_smbus_slave_transmit(i2c_handle_type* hi2c, uint8_t* pdata, hi2c->pcount--; } - /* wait for the ackfail falg to be set */ - if(i2c_wait_flag(hi2c, I2C_ACKFAIL_FLAG, RESET, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK) + /* wait for the ackfail flag to be set */ + if(i2c_wait_flag(hi2c, I2C_ACKFAIL_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK) { return I2C_ERR_STEP_5; } @@ -1715,8 +1712,8 @@ i2c_status_type i2c_smbus_slave_transmit(i2c_handle_type* hi2c, uint8_t* pdata, /* clear ack fail flag */ i2c_flag_clear(hi2c->i2cx, I2C_ACKFAIL_FLAG); - /* wait for the stop falg to be set */ - if(i2c_wait_flag(hi2c, I2C_STOPF_FLAG, RESET, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK) + /* wait for the stop flag to be set */ + if(i2c_wait_flag(hi2c, I2C_STOPF_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK) { /* disable acknowledge */ i2c_ack_enable(hi2c->i2cx, FALSE); @@ -1727,8 +1724,8 @@ i2c_status_type i2c_smbus_slave_transmit(i2c_handle_type* hi2c, uint8_t* pdata, /* clear stop flag */ i2c_flag_clear(hi2c->i2cx, I2C_STOPF_FLAG); - /* wait for the busy falg to be reset */ - if (i2c_wait_flag(hi2c, I2C_BUSYF_FLAG, SET, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK) + /* wait for the busy flag to be reset */ + if (i2c_wait_flag(hi2c, I2C_BUSYF_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK) { /* disable acknowledge */ i2c_ack_enable(hi2c->i2cx, FALSE); diff --git a/middlewares/i2c_application_library/i2c_application.h b/middlewares/i2c_application_library/i2c_application.h index dc6f8b56..08798d0e 100644 --- a/middlewares/i2c_application_library/i2c_application.h +++ b/middlewares/i2c_application_library/i2c_application.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file i2c_application.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief i2c application libray header file ************************************************************************** * Copyright notice & Disclaimer @@ -134,7 +134,7 @@ void i2c_config (i2c_handle_type* hi2c); void i2c_lowlevel_init (i2c_handle_type* hi2c); void i2c_reset_ctrl2_register (i2c_handle_type* hi2c); i2c_status_type i2c_wait_end (i2c_handle_type* hi2c, uint32_t timeout); -i2c_status_type i2c_wait_flag (i2c_handle_type* hi2c, uint32_t flag, flag_status status, uint32_t event_check, uint32_t timeout); +i2c_status_type i2c_wait_flag (i2c_handle_type* hi2c, uint32_t flag, uint32_t event_check, uint32_t timeout); i2c_status_type i2c_master_transmit (i2c_handle_type* hi2c, uint16_t address, uint8_t* pdata, uint16_t size, uint32_t timeout); i2c_status_type i2c_master_receive (i2c_handle_type* hi2c, uint16_t address, uint8_t* pdata, uint16_t size, uint32_t timeout); diff --git a/middlewares/usb_drivers/inc/usb_core.h b/middlewares/usb_drivers/inc/usb_core.h index a1abbb8f..aa0826dd 100644 --- a/middlewares/usb_drivers/inc/usb_core.h +++ b/middlewares/usb_drivers/inc/usb_core.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file usb_core.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb core header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/middlewares/usb_drivers/inc/usb_std.h b/middlewares/usb_drivers/inc/usb_std.h index df10e43e..06a0a03f 100644 --- a/middlewares/usb_drivers/inc/usb_std.h +++ b/middlewares/usb_drivers/inc/usb_std.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file usb_std.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb standard header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/middlewares/usb_drivers/inc/usbd_core.h b/middlewares/usb_drivers/inc/usbd_core.h index 7587de2a..916eb154 100644 --- a/middlewares/usb_drivers/inc/usbd_core.h +++ b/middlewares/usb_drivers/inc/usbd_core.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file usbd_core.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb device core header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/middlewares/usb_drivers/inc/usbd_int.h b/middlewares/usb_drivers/inc/usbd_int.h index eafccedd..83e16bc5 100644 --- a/middlewares/usb_drivers/inc/usbd_int.h +++ b/middlewares/usb_drivers/inc/usbd_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file usbd_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb interrupt header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/middlewares/usb_drivers/inc/usbd_sdr.h b/middlewares/usb_drivers/inc/usbd_sdr.h index c78275f0..b1ba67ba 100644 --- a/middlewares/usb_drivers/inc/usbd_sdr.h +++ b/middlewares/usb_drivers/inc/usbd_sdr.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file usb_sdr.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/middlewares/usb_drivers/inc/usbh_core.h b/middlewares/usb_drivers/inc/usbh_core.h index 43a8003f..a7cc2fb3 100644 --- a/middlewares/usb_drivers/inc/usbh_core.h +++ b/middlewares/usb_drivers/inc/usbh_core.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file usbh_core.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb host core header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/middlewares/usb_drivers/inc/usbh_ctrl.h b/middlewares/usb_drivers/inc/usbh_ctrl.h index de66a54a..2ffea3df 100644 --- a/middlewares/usb_drivers/inc/usbh_ctrl.h +++ b/middlewares/usb_drivers/inc/usbh_ctrl.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file usbh_ctrl.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/middlewares/usb_drivers/inc/usbh_int.h b/middlewares/usb_drivers/inc/usbh_int.h index 8b4cb78b..13b1095e 100644 --- a/middlewares/usb_drivers/inc/usbh_int.h +++ b/middlewares/usb_drivers/inc/usbh_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file usbh_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/middlewares/usb_drivers/src/usb_core.c b/middlewares/usb_drivers/src/usb_core.c index b4fdfff7..4c9ea7ca 100644 --- a/middlewares/usb_drivers/src/usb_core.c +++ b/middlewares/usb_drivers/src/usb_core.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file usb_core.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb driver ************************************************************************** * Copyright notice & Disclaimer diff --git a/middlewares/usb_drivers/src/usbd_core.c b/middlewares/usb_drivers/src/usbd_core.c index 60f48b57..86f2bc06 100644 --- a/middlewares/usb_drivers/src/usbd_core.c +++ b/middlewares/usb_drivers/src/usbd_core.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file usbd_core.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb device driver ************************************************************************** * Copyright notice & Disclaimer diff --git a/middlewares/usb_drivers/src/usbd_int.c b/middlewares/usb_drivers/src/usbd_int.c index eb6021ca..6d39fbac 100644 --- a/middlewares/usb_drivers/src/usbd_int.c +++ b/middlewares/usb_drivers/src/usbd_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file usbd_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb interrupt request ************************************************************************** * Copyright notice & Disclaimer diff --git a/middlewares/usb_drivers/src/usbd_sdr.c b/middlewares/usb_drivers/src/usbd_sdr.c index 52177beb..53bc7bda 100644 --- a/middlewares/usb_drivers/src/usbd_sdr.c +++ b/middlewares/usb_drivers/src/usbd_sdr.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file usbd_sdr.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb standard device request ************************************************************************** * Copyright notice & Disclaimer diff --git a/middlewares/usb_drivers/src/usbh_core.c b/middlewares/usb_drivers/src/usbh_core.c index fcd0dbce..8eea88df 100644 --- a/middlewares/usb_drivers/src/usbh_core.c +++ b/middlewares/usb_drivers/src/usbh_core.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file usbh_core.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb host driver ************************************************************************** * Copyright notice & Disclaimer diff --git a/middlewares/usb_drivers/src/usbh_ctrl.c b/middlewares/usb_drivers/src/usbh_ctrl.c index 020b397b..ed6d0fa5 100644 --- a/middlewares/usb_drivers/src/usbh_ctrl.c +++ b/middlewares/usb_drivers/src/usbh_ctrl.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file usbh_ctrl.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb host control request ************************************************************************** * Copyright notice & Disclaimer diff --git a/middlewares/usb_drivers/src/usbh_int.c b/middlewares/usb_drivers/src/usbh_int.c index 370dd0a3..55ef5ed7 100644 --- a/middlewares/usb_drivers/src/usbh_int.c +++ b/middlewares/usb_drivers/src/usbh_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file usbh_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb host interrupt request ************************************************************************** * Copyright notice & Disclaimer diff --git a/middlewares/usbd_class/audio/audio_class.c b/middlewares/usbd_class/audio/audio_class.c index bc4a833f..297ae03b 100644 --- a/middlewares/usbd_class/audio/audio_class.c +++ b/middlewares/usbd_class/audio/audio_class.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file audio_class.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb audio class type ************************************************************************** * Copyright notice & Disclaimer diff --git a/middlewares/usbd_class/audio/audio_class.h b/middlewares/usbd_class/audio/audio_class.h index b6fe7e0d..8137ff43 100644 --- a/middlewares/usbd_class/audio/audio_class.h +++ b/middlewares/usbd_class/audio/audio_class.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file audio_class.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb audio class file ************************************************************************** * Copyright notice & Disclaimer diff --git a/middlewares/usbd_class/audio/audio_conf.h b/middlewares/usbd_class/audio/audio_conf.h index 7dc097a4..53e37986 100644 --- a/middlewares/usbd_class/audio/audio_conf.h +++ b/middlewares/usbd_class/audio/audio_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file audio_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb audio config ************************************************************************** * Copyright notice & Disclaimer diff --git a/middlewares/usbd_class/audio/audio_desc.c b/middlewares/usbd_class/audio/audio_desc.c index affa8070..d81886e5 100644 --- a/middlewares/usbd_class/audio/audio_desc.c +++ b/middlewares/usbd_class/audio/audio_desc.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file audio_desc.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb audio device descriptor ************************************************************************** * Copyright notice & Disclaimer diff --git a/middlewares/usbd_class/audio/audio_desc.h b/middlewares/usbd_class/audio/audio_desc.h index 83456a9d..9d7e6e1f 100644 --- a/middlewares/usbd_class/audio/audio_desc.h +++ b/middlewares/usbd_class/audio/audio_desc.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file audio_desc.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb audio descriptor header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/middlewares/usbd_class/audio_hid/audio_conf.h b/middlewares/usbd_class/audio_hid/audio_conf.h index 9a736e77..3f7884f2 100644 --- a/middlewares/usbd_class/audio_hid/audio_conf.h +++ b/middlewares/usbd_class/audio_hid/audio_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file audio_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb audio config ************************************************************************** * Copyright notice & Disclaimer diff --git a/middlewares/usbd_class/audio_hid/audio_hid_class.c b/middlewares/usbd_class/audio_hid/audio_hid_class.c index 5499ad82..6b9572fb 100644 --- a/middlewares/usbd_class/audio_hid/audio_hid_class.c +++ b/middlewares/usbd_class/audio_hid/audio_hid_class.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file audio_class.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb audio class type ************************************************************************** * Copyright notice & Disclaimer diff --git a/middlewares/usbd_class/audio_hid/audio_hid_class.h b/middlewares/usbd_class/audio_hid/audio_hid_class.h index 61a0ba88..21ff9784 100644 --- a/middlewares/usbd_class/audio_hid/audio_hid_class.h +++ b/middlewares/usbd_class/audio_hid/audio_hid_class.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file audio_class.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb audio class file ************************************************************************** * Copyright notice & Disclaimer diff --git a/middlewares/usbd_class/audio_hid/audio_hid_desc.c b/middlewares/usbd_class/audio_hid/audio_hid_desc.c index 095b0bb0..c93ee3f2 100644 --- a/middlewares/usbd_class/audio_hid/audio_hid_desc.c +++ b/middlewares/usbd_class/audio_hid/audio_hid_desc.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file audio_desc.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb audio device descriptor ************************************************************************** * Copyright notice & Disclaimer diff --git a/middlewares/usbd_class/audio_hid/audio_hid_desc.h b/middlewares/usbd_class/audio_hid/audio_hid_desc.h index 1e978f7c..a93f2e3f 100644 --- a/middlewares/usbd_class/audio_hid/audio_hid_desc.h +++ b/middlewares/usbd_class/audio_hid/audio_hid_desc.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file audio_desc.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb audio descriptor header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/middlewares/usbd_class/cdc/cdc_class.c b/middlewares/usbd_class/cdc/cdc_class.c index 78a83bd9..3d2fdf7c 100644 --- a/middlewares/usbd_class/cdc/cdc_class.c +++ b/middlewares/usbd_class/cdc/cdc_class.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file cdc_class.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb cdc class type ************************************************************************** * Copyright notice & Disclaimer diff --git a/middlewares/usbd_class/cdc/cdc_class.h b/middlewares/usbd_class/cdc/cdc_class.h index 8cdf35ed..bc355902 100644 --- a/middlewares/usbd_class/cdc/cdc_class.h +++ b/middlewares/usbd_class/cdc/cdc_class.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file cdc_class.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb cdc class file ************************************************************************** * Copyright notice & Disclaimer diff --git a/middlewares/usbd_class/cdc/cdc_desc.c b/middlewares/usbd_class/cdc/cdc_desc.c index f9d17043..f856c081 100644 --- a/middlewares/usbd_class/cdc/cdc_desc.c +++ b/middlewares/usbd_class/cdc/cdc_desc.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file cdc_desc.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb cdc device descriptor ************************************************************************** * Copyright notice & Disclaimer diff --git a/middlewares/usbd_class/cdc/cdc_desc.h b/middlewares/usbd_class/cdc/cdc_desc.h index f6d07689..2cc45e07 100644 --- a/middlewares/usbd_class/cdc/cdc_desc.h +++ b/middlewares/usbd_class/cdc/cdc_desc.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file cdc_desc.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb cdc descriptor header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/middlewares/usbd_class/composite_cdc_keyboard/cdc_keyboard_class.c b/middlewares/usbd_class/composite_cdc_keyboard/cdc_keyboard_class.c index f5d3355a..ff18dcd6 100644 --- a/middlewares/usbd_class/composite_cdc_keyboard/cdc_keyboard_class.c +++ b/middlewares/usbd_class/composite_cdc_keyboard/cdc_keyboard_class.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file cdc_keyboard_class.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb cdc and keyboard class type ************************************************************************** * Copyright notice & Disclaimer diff --git a/middlewares/usbd_class/composite_cdc_keyboard/cdc_keyboard_class.h b/middlewares/usbd_class/composite_cdc_keyboard/cdc_keyboard_class.h index a602acb9..b95d08d0 100644 --- a/middlewares/usbd_class/composite_cdc_keyboard/cdc_keyboard_class.h +++ b/middlewares/usbd_class/composite_cdc_keyboard/cdc_keyboard_class.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file cdc_keyboard_class.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb cdc and keyboard class file ************************************************************************** * Copyright notice & Disclaimer diff --git a/middlewares/usbd_class/composite_cdc_keyboard/cdc_keyboard_desc.c b/middlewares/usbd_class/composite_cdc_keyboard/cdc_keyboard_desc.c index 3ad56186..bc7031df 100644 --- a/middlewares/usbd_class/composite_cdc_keyboard/cdc_keyboard_desc.c +++ b/middlewares/usbd_class/composite_cdc_keyboard/cdc_keyboard_desc.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file cdc_keyboard_desc.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb cdc and keyboard device descriptor ************************************************************************** * Copyright notice & Disclaimer diff --git a/middlewares/usbd_class/composite_cdc_keyboard/cdc_keyboard_desc.h b/middlewares/usbd_class/composite_cdc_keyboard/cdc_keyboard_desc.h index 74dc8f95..676f3c7f 100644 --- a/middlewares/usbd_class/composite_cdc_keyboard/cdc_keyboard_desc.h +++ b/middlewares/usbd_class/composite_cdc_keyboard/cdc_keyboard_desc.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file cdc_keyboard_desc.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb cdc and keyboard descriptor header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/middlewares/usbd_class/composite_cdc_msc/cdc_msc_class.c b/middlewares/usbd_class/composite_cdc_msc/cdc_msc_class.c new file mode 100644 index 00000000..9f6d2f01 --- /dev/null +++ b/middlewares/usbd_class/composite_cdc_msc/cdc_msc_class.c @@ -0,0 +1,578 @@ +/** + ************************************************************************** + * @file cdc_msc_class.c + * @version v2.0.9 + * @date 2022-06-28 + * @brief usb cdc class type + ************************************************************************** + * Copyright notice & Disclaimer + * + * The software Board Support Package (BSP) that is made available to + * download from Artery official website is the copyrighted work of Artery. + * Artery authorizes customers to use, copy, and distribute the BSP + * software and its related documentation for the purpose of design and + * development in conjunction with Artery microcontrollers. Use of the + * software is governed by this copyright notice and the following disclaimer. + * + * THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, + * GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, + * TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR + * STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, + * INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. + * + ************************************************************************** + */ +#include "usbd_core.h" +#include "cdc_msc_class.h" +#include "cdc_msc_desc.h" + +/** @addtogroup AT32F435_437_middlewares_usbd_class + * @{ + */ + +/** @defgroup USB_cdc_msc_class + * @brief usb device class cdc msc demo + * @{ + */ + +/** @defgroup USB_cdc_class_private_functions + * @{ + */ + +static usb_sts_type class_init_handler(void *udev); +static usb_sts_type class_clear_handler(void *udev); +static usb_sts_type class_setup_handler(void *udev, usb_setup_type *setup); +static usb_sts_type class_ept0_tx_handler(void *udev); +static usb_sts_type class_ept0_rx_handler(void *udev); +static usb_sts_type class_in_handler(void *udev, uint8_t ept_num); +static usb_sts_type class_out_handler(void *udev, uint8_t ept_num); +static usb_sts_type class_sof_handler(void *udev); +static usb_sts_type class_event_handler(void *udev, usbd_event_type event); + +static usb_sts_type cdc_struct_init(cdc_msc_struct_type *pcdc); +extern void usb_usart_config( linecoding_type linecoding); +static void usb_vcp_cmd_process(void *udev, uint8_t cmd, uint8_t *buff, uint16_t len); + +static usb_sts_type cdc_class_setup_handler(void *udev, usb_setup_type *setup); +static usb_sts_type msc_class_setup_handler(void *udev, usb_setup_type *setup); + +linecoding_type linecoding = +{ + 115200, + 0, + 0, + 8 +}; + +/* cdc data struct */ +cdc_msc_struct_type cdc_msc_struct; + +/* usb device class handler */ +usbd_class_handler cdc_msc_class_handler = +{ + class_init_handler, + class_clear_handler, + class_setup_handler, + class_ept0_tx_handler, + class_ept0_rx_handler, + class_in_handler, + class_out_handler, + class_sof_handler, + class_event_handler, + &cdc_msc_struct //cdc_struct +}; +/** + * @brief initialize usb custom hid endpoint + * @param udev: to the structure of usbd_core_type + * @retval status of usb_sts_type + */ +static usb_sts_type class_init_handler(void *udev) +{ + usb_sts_type status = USB_OK; + usbd_core_type *pudev = (usbd_core_type *)udev; + cdc_msc_struct_type *pcdcmsc = (cdc_msc_struct_type *)pudev->class_handler->pdata; + + /* init cdc struct */ + cdc_struct_init(pcdcmsc); + + /* open in endpoint */ + usbd_ept_open(pudev, USBD_CDC_INT_EPT, EPT_INT_TYPE, USBD_CDC_CMD_MAXPACKET_SIZE); + + /* open in endpoint */ + usbd_ept_open(pudev, USBD_CDC_BULK_IN_EPT, EPT_BULK_TYPE, USBD_CDC_MSC_IN_MAXPACKET_SIZE); + + /* open out endpoint */ + usbd_ept_open(pudev, USBD_CDC_BULK_OUT_EPT, EPT_BULK_TYPE, USBD_CDC_MSC_OUT_MAXPACKET_SIZE); + + /* set out endpoint to receive status */ + usbd_ept_recv(pudev, USBD_CDC_BULK_OUT_EPT, pcdcmsc->g_rx_buff, USBD_CDC_MSC_OUT_MAXPACKET_SIZE); + + /* open in endpoint */ + usbd_ept_open(pudev, USBD_MSC_BULK_IN_EPT, EPT_BULK_TYPE, USBD_CDC_MSC_IN_MAXPACKET_SIZE); + + /* open out endpoint */ + usbd_ept_open(pudev, USBD_MSC_BULK_OUT_EPT, EPT_BULK_TYPE, USBD_CDC_MSC_OUT_MAXPACKET_SIZE); + + bot_scsi_init(udev); + + return status; +} + +/** + * @brief clear endpoint or other state + * @param udev: to the structure of usbd_core_type + * @retval status of usb_sts_type + */ +static usb_sts_type class_clear_handler(void *udev) +{ + usb_sts_type status = USB_OK; + usbd_core_type *pudev = (usbd_core_type *)udev; + + /* close in endpoint */ + usbd_ept_close(pudev, USBD_CDC_INT_EPT); + + /* close in endpoint */ + usbd_ept_close(pudev, USBD_CDC_BULK_IN_EPT); + + /* close out endpoint */ + usbd_ept_close(pudev, USBD_CDC_BULK_OUT_EPT); + + /* close in endpoint */ + usbd_ept_close(pudev, USBD_MSC_BULK_IN_EPT); + + /* close out endpoint */ + usbd_ept_close(pudev, USBD_MSC_BULK_OUT_EPT); + + return status; +} + +/** + * @brief usb device class setup request handler + * @param udev: to the structure of usbd_core_type + * @param setup: setup packet + * @retval status of usb_sts_type + */ +static usb_sts_type class_setup_handler(void *udev, usb_setup_type *setup) +{ + usb_sts_type status = USB_OK; + usbd_core_type *pudev = (usbd_core_type *)udev; + switch(setup->bmRequestType & USB_REQ_RECIPIENT_MASK) + { + case USB_REQ_RECIPIENT_INTERFACE: + if(setup->wIndex == VCPMSC_MSC_INTERFACE) + { + msc_class_setup_handler(udev, setup); + } + else + { + cdc_class_setup_handler(pudev, setup); + } + break; + case USB_REQ_RECIPIENT_ENDPOINT: + if(setup->wIndex == (USBD_MSC_BULK_IN_EPT | USBD_MSC_BULK_OUT_EPT)) + { + msc_class_setup_handler(udev, setup); + } + else + { + cdc_class_setup_handler(pudev, setup); + } + break; + + } + return status; +} + +/** + * @brief usb device class setup request handler + * @param udev: to the structure of usbd_core_type + * @param setup: setup packet + * @retval status of usb_sts_type + */ +static usb_sts_type cdc_class_setup_handler(void *udev, usb_setup_type *setup) +{ + usb_sts_type status = USB_OK; + usbd_core_type *pudev = (usbd_core_type *)udev; + cdc_msc_struct_type *pcdc = (cdc_msc_struct_type *)pudev->class_handler->pdata; + + switch(setup->bmRequestType & USB_REQ_TYPE_RESERVED) + { + /* class request */ + case USB_REQ_TYPE_CLASS: + if(setup->wLength) + { + if(setup->bmRequestType & USB_REQ_DIR_DTH) + { + usb_vcp_cmd_process(udev, setup->bRequest, pcdc->g_cmd, setup->wLength); + usbd_ctrl_send(pudev, pcdc->g_cmd, setup->wLength); + } + else + { + pcdc->g_req = setup->bRequest; + pcdc->g_len = setup->wLength; + usbd_ctrl_recv(pudev, pcdc->g_cmd, pcdc->g_len); + + } + } + break; + /* standard request */ + case USB_REQ_TYPE_STANDARD: + switch(setup->bRequest) + { + case USB_STD_REQ_GET_DESCRIPTOR: + usbd_ctrl_unsupport(pudev); + break; + case USB_STD_REQ_GET_INTERFACE: + usbd_ctrl_send(pudev, (uint8_t *)&pcdc->alt_setting, 1); + break; + case USB_STD_REQ_SET_INTERFACE: + pcdc->alt_setting = setup->wValue; + break; + default: + break; + } + break; + default: + usbd_ctrl_unsupport(pudev); + break; + } + return status; +} + +/** + * @brief usb device class setup request handler + * @param udev: to the structure of usbd_core_type + * @param setup: setup packet + * @retval status of usb_sts_type + */ +static usb_sts_type msc_class_setup_handler(void *udev, usb_setup_type *setup) +{ + usb_sts_type status = USB_OK; + usbd_core_type *pudev = (usbd_core_type *)udev; + cdc_msc_struct_type *pmsc = (cdc_msc_struct_type *)pudev->class_handler->pdata; + switch(setup->bmRequestType & USB_REQ_TYPE_RESERVED) + { + /* class request */ + case USB_REQ_TYPE_CLASS: + + switch(setup->bRequest) + { + case MSC_REQ_GET_MAX_LUN: + usbd_ctrl_send(pudev, (uint8_t *)&cdc_msc_struct.max_lun, 1); + break; + case MSC_REQ_BO_RESET: + bot_scsi_reset(udev); + usbd_ctrl_send_status(pudev); + break; + default: + usbd_ctrl_unsupport(pudev); + break; + + } + break; + /* standard request */ + case USB_REQ_TYPE_STANDARD: + + switch(setup->bRequest) + { + case USB_STD_REQ_GET_DESCRIPTOR: + usbd_ctrl_unsupport(pudev); + break; + case USB_STD_REQ_GET_INTERFACE: + usbd_ctrl_send(pudev, (uint8_t *)&pmsc->alt_setting, 1); + break; + case USB_STD_REQ_SET_INTERFACE: + pmsc->alt_setting = setup->wValue; + break; + case USB_STD_REQ_CLEAR_FEATURE: + usbd_ept_close(pudev, (uint8_t)setup->wIndex); + + if((setup->wIndex & 0x80) == 0x80) + { + usbd_flush_tx_fifo(pudev, setup->wIndex & 0x7F); + usbd_ept_open(pudev, (uint8_t)setup->wIndex, EPT_BULK_TYPE, USBD_CDC_MSC_IN_MAXPACKET_SIZE); + } + else + { + usbd_ept_open(pudev, (uint8_t)setup->wIndex, EPT_BULK_TYPE, USBD_CDC_MSC_OUT_MAXPACKET_SIZE); + } + bot_scsi_clear_feature(udev, setup->wIndex); + break; + default: + break; + } + break; + default: + usbd_ctrl_unsupport(pudev); + break; + } + return status; +} + +/** + * @brief usb device endpoint 0 in status stage complete + * @param udev: to the structure of usbd_core_type + * @retval status of usb_sts_type + */ +static usb_sts_type class_ept0_tx_handler(void *udev) +{ + usb_sts_type status = USB_OK; + + /* ...user code... */ + + return status; +} + +/** + * @brief usb device endpoint 0 out status stage complete + * @param udev: usb device core handler type + * @retval status of usb_sts_type + */ +static usb_sts_type class_ept0_rx_handler(void *udev) +{ + usb_sts_type status = USB_OK; + usbd_core_type *pudev = (usbd_core_type *)udev; + cdc_msc_struct_type *pcdc = (cdc_msc_struct_type *)pudev->class_handler->pdata; + uint32_t recv_len = usbd_get_recv_len(pudev, 0); + /* ...user code... */ + if( pcdc->g_req == SET_LINE_CODING) + { + /* class process */ + usb_vcp_cmd_process(udev, pcdc->g_req, pcdc->g_cmd, recv_len); + } + + return status; +} + +/** + * @brief usb device transmision complete handler + * @param udev: to the structure of usbd_core_type + * @param ept_num: endpoint number + * @retval status of usb_sts_type + */ +static usb_sts_type class_in_handler(void *udev, uint8_t ept_num) +{ + usbd_core_type *pudev = (usbd_core_type *)udev; + cdc_msc_struct_type *pcdcmsc = (cdc_msc_struct_type *)pudev->class_handler->pdata; + usb_sts_type status = USB_OK; + + /* ...user code... + trans next packet data + */ + usbd_flush_tx_fifo(pudev, ept_num); + + if((ept_num & 0x7F) == (USBD_CDC_BULK_IN_EPT & 0x7F)) + { + pcdcmsc->g_tx_completed = 1; + } + if((ept_num & 0x7F) == (USBD_MSC_BULK_IN_EPT & 0x7F)) + { + bot_scsi_datain_handler(udev, ept_num); + } + + return status; +} + +/** + * @brief usb device endpoint receive data + * @param udev: to the structure of usbd_core_type + * @param ept_num: endpoint number + * @retval status of usb_sts_type + */ +static usb_sts_type class_out_handler(void *udev, uint8_t ept_num) +{ + usb_sts_type status = USB_OK; + usbd_core_type *pudev = (usbd_core_type *)udev; + cdc_msc_struct_type *pcdcmsc = (cdc_msc_struct_type *)pudev->class_handler->pdata; + + + + if((ept_num & 0x7F) == (USBD_CDC_BULK_OUT_EPT & 0x7F)) + { + /* get endpoint receive data length */ + pcdcmsc->g_rxlen = usbd_get_recv_len(pudev, ept_num); + + /*set recv flag*/ + pcdcmsc->g_rx_completed = 1; + } + if((ept_num & 0x7F) == (USBD_MSC_BULK_OUT_EPT & 0x7F)) + { + bot_scsi_dataout_handler(udev, ept_num); + } + + return status; +} + +/** + * @brief usb device sof handler + * @param udev: to the structure of usbd_core_type + * @retval status of usb_sts_type + */ +static usb_sts_type class_sof_handler(void *udev) +{ + usb_sts_type status = USB_OK; + + /* ...user code... */ + + return status; +} + +/** + * @brief usb device event handler + * @param udev: to the structure of usbd_core_type + * @param event: usb device event + * @retval status of usb_sts_type + */ +static usb_sts_type class_event_handler(void *udev, usbd_event_type event) +{ + usb_sts_type status = USB_OK; + switch(event) + { + case USBD_RESET_EVENT: + + /* ...user code... */ + + break; + case USBD_SUSPEND_EVENT: + + /* ...user code... */ + + break; + case USBD_WAKEUP_EVENT: + /* ...user code... */ + + break; + case USBD_INISOINCOM_EVENT: + break; + case USBD_OUTISOINCOM_EVENT: + break; + + default: + break; + } + return status; +} + +/** + * @brief usb device cdc init + * @param pcdc: to the structure of cdc_struct + * @retval status of usb_sts_type + */ +static usb_sts_type cdc_struct_init(cdc_msc_struct_type *pcdc) +{ + pcdc->g_tx_completed = 1; + pcdc->g_rx_completed = 0; + pcdc->alt_setting = 0; + pcdc->linecoding.bitrate = linecoding.bitrate; + pcdc->linecoding.data = linecoding.data; + pcdc->linecoding.format = linecoding.format; + pcdc->linecoding.parity = linecoding.parity; + return USB_OK; +} + +/** + * @brief usb device class rx data process + * @param udev: to the structure of usbd_core_type + * @param recv_data: receive buffer + * @retval receive data len + */ +uint16_t usb_vcp_get_rxdata(void *udev, uint8_t *recv_data) +{ + uint16_t i_index = 0; + uint16_t tmp_len = 0; + usbd_core_type *pudev = (usbd_core_type *)udev; + cdc_msc_struct_type *pcdc = (cdc_msc_struct_type *)pudev->class_handler->pdata; + + if(pcdc->g_rx_completed == 0) + { + return 0; + } + pcdc->g_rx_completed = 0; + tmp_len = pcdc->g_rxlen; + for(i_index = 0; i_index < pcdc->g_rxlen; i_index ++) + { + recv_data[i_index] = pcdc->g_rx_buff[i_index]; + } + + usbd_ept_recv(pudev, USBD_CDC_BULK_OUT_EPT, pcdc->g_rx_buff, USBD_CDC_MSC_OUT_MAXPACKET_SIZE); + + return tmp_len; +} + +/** + * @brief usb device class send data + * @param udev: to the structure of usbd_core_type + * @param send_data: send data buffer + * @param len: send length + * @retval error status + */ +error_status usb_vcp_send_data(void *udev, uint8_t *send_data, uint16_t len) +{ + error_status status = SUCCESS; + usbd_core_type *pudev = (usbd_core_type *)udev; + cdc_msc_struct_type *pcdc = (cdc_msc_struct_type *)pudev->class_handler->pdata; + if(pcdc->g_tx_completed) + { + pcdc->g_tx_completed = 0; + usbd_ept_send(pudev, USBD_CDC_BULK_IN_EPT, send_data, len); + } + else + { + status = ERROR; + } + return status; +} + +/** + * @brief usb device function + * @param udev: to the structure of usbd_core_type + * @param cmd: request number + * @param buff: request buffer + * @param len: buffer length + * @retval none + */ +static void usb_vcp_cmd_process(void *udev, uint8_t cmd, uint8_t *buff, uint16_t len) +{ + usbd_core_type *pudev = (usbd_core_type *)udev; + cdc_msc_struct_type *pcdc = (cdc_msc_struct_type *)pudev->class_handler->pdata; + switch(cmd) + { + case SET_LINE_CODING: + pcdc->linecoding.bitrate = (uint32_t)(buff[0] | (buff[1] << 8) | (buff[2] << 16) | (buff[3] <<24)); + pcdc->linecoding.format = buff[4]; + pcdc->linecoding.parity = buff[5]; + pcdc->linecoding.data = buff[6]; +#ifdef USB_VIRTUAL_COMPORT + /* set hardware usart */ + usb_usart_config(pcdc->linecoding); +#endif + break; + + case GET_LINE_CODING: + buff[0] = (uint8_t)pcdc->linecoding.bitrate; + buff[1] = (uint8_t)(pcdc->linecoding.bitrate >> 8); + buff[2] = (uint8_t)(pcdc->linecoding.bitrate >> 16); + buff[3] = (uint8_t)(pcdc->linecoding.bitrate >> 24); + buff[4] = (uint8_t)(pcdc->linecoding.format); + buff[5] = (uint8_t)(pcdc->linecoding.parity); + buff[6] = (uint8_t)(pcdc->linecoding.data); + break; + + default: + break; + } +} + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + diff --git a/middlewares/usbd_class/composite_cdc_msc/cdc_msc_class.h b/middlewares/usbd_class/composite_cdc_msc/cdc_msc_class.h new file mode 100644 index 00000000..ec57aa5b --- /dev/null +++ b/middlewares/usbd_class/composite_cdc_msc/cdc_msc_class.h @@ -0,0 +1,338 @@ +/** + ************************************************************************** + * @file cdc_msc_class.h + * @version v2.0.9 + * @date 2022-06-28 + * @brief usb cdc class file + ************************************************************************** + * Copyright notice & Disclaimer + * + * The software Board Support Package (BSP) that is made available to + * download from Artery official website is the copyrighted work of Artery. + * Artery authorizes customers to use, copy, and distribute the BSP + * software and its related documentation for the purpose of design and + * development in conjunction with Artery microcontrollers. Use of the + * software is governed by this copyright notice and the following disclaimer. + * + * THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, + * GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, + * TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR + * STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, + * INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. + * + ************************************************************************** + */ + + /* define to prevent recursive inclusion -------------------------------------*/ +#ifndef __CDC_MSC_CLASS_H +#define __CDC_MSC_CLASS_H + +#ifdef __cplusplus +extern "C" { +#endif + +#include "usb_std.h" +#include "usbd_core.h" + +/** @addtogroup AT32F435_437_middlewares_usbd_class + * @{ + */ + +/** @addtogroup USB_cdc_msc_class + * @{ + */ + +/** @defgroup USB_cdc_class_definition + * @{ + */ + +/** + * @brief usb cdc use endpoint define + */ +#define USBD_CDC_INT_EPT 0x82 +#define USBD_CDC_BULK_IN_EPT 0x83 +#define USBD_CDC_BULK_OUT_EPT 0x02 + +#define USBD_MSC_BULK_IN_EPT 0x81 +#define USBD_MSC_BULK_OUT_EPT 0x01 + +/** + * @brief usb cdc in and out max packet size define + */ +#define USBD_CDC_MSC_IN_MAXPACKET_SIZE 0x40 + +#define USBD_CDC_MSC_OUT_MAXPACKET_SIZE 0x40 +#define USBD_CDC_CMD_MAXPACKET_SIZE 0x08 + + + + +/** + * @} + */ + +/** @defgroup USB_cdc_class_exported_types + * @{ + */ + +/** @defgroup USB_msc_bot_scsi_definition + * @{ + */ + +#define MSC_SUPPORT_MAX_LUN 1 +#define MSC_MAX_DATA_BUF_LEN 4096 + +#define MSC_CMD_FORMAT_UNIT 0x04 +#define MSC_CMD_INQUIRY 0x12 +#define MSC_CMD_START_STOP 0x1B +#define MSC_CMD_MODE_SENSE6 0x1A +#define MSC_CMD_MODE_SENSE10 0x5A +#define MSC_CMD_ALLOW_MEDIUM_REMOVAL 0x1E +#define MSC_CMD_READ_10 0x28 +#define MSC_CMD_READ_12 0xA8 +#define MSC_CMD_READ_CAPACITY 0x25 +#define MSC_CMD_READ_FORMAT_CAPACITY 0x23 +#define MSC_CMD_REQUEST_SENSE 0x03 +#define MSC_CMD_TEST_UNIT 0x00 +#define MSC_CMD_VERIFY 0x2F +#define MSC_CMD_WRITE_10 0x2A +#define MSC_CMD_WRITE_12 0xAA +#define MSC_CMD_WRITE_VERIFY 0x2E + +#define MSC_REQ_GET_MAX_LUN 0xFE /*!< get max lun */ +#define MSC_REQ_BO_RESET 0xFF /*!< bulk only mass storage reset */ + +#define SET_LINE_CODING 0x20 +#define GET_LINE_CODING 0x21 + +#define CBW_CMD_LENGTH 31 +#define CBW_DCBWSIGNATURE 0x43425355 +#define CBW_BMCBWFLAGS_DIR_OUT 0x00 +#define CBW_BMCBWFLAGS_DIR_IN 0x80 + +#define CSW_CMD_LENGTH 13 +#define CSW_DCSWSIGNATURE 0x53425355 +#define CSW_BCSWSTATUS_PASS 0x00 +#define CSW_BCSWSTATUS_FAILED 0x01 +#define CSW_BCSWSTATUS_PHASE_ERR 0x02 + +#define MSC_STATE_MACHINE_CMD 0x00 +#define MSC_STATE_MACHINE_DATA_IN 0x01 +#define MSC_STATE_MACHINE_DATA_OUT 0x02 +#define MSC_STATE_MACHINE_SEND_DATA 0x03 +#define MSC_STATE_MACHINE_LAST_DATA 0x04 +#define MSC_STATE_MACHINE_STATUS 0x05 +#define MSC_STATE_MACHINE_FAILED 0x06 +#define MSC_STATE_MACHINE_IDLE 0x07 + +#define MSC_BOT_STATE_IDLE 0x00 +#define MSC_BOT_STATE_RECOVERY 0x01 +#define MSC_BOT_STATE_ERROR 0x02 + +#define REQ_SENSE_STANDARD_DATA_LEN 0x12 +#define SENSE_KEY_NO_SENSE 0x00 +#define SENSE_KEY_RECOVERED_ERROR 0x01 +#define SENSE_KEY_NOT_READY 0x02 +#define SENSE_KEY_MEDIUM_ERROR 0x03 +#define SENSE_KEY_HARDWARE_ERROR 0x04 +#define SENSE_KEY_ILLEGAL_REQUEST 0x05 +#define SENSE_KEY_UNIT_ATTENTION 0x06 +#define SENSE_KEY_DATA_PROTECT 0x07 +#define SENSE_KEY_BLANK_CHECK 0x08 +#define SENSE_KEY_VENDERO_SPECIFIC 0x09 +#define SENSE_KEY_ABORTED_COMMAND 0x0B +#define SENSE_KEY_VOLUME_OVERFLOW 0x0D +#define SENSE_KEY_MISCOMPARE 0x0E + + +#define INVALID_COMMAND 0x20 +#define INVALID_FIELED_IN_COMMAND 0x24 +#define PARAMETER_LIST_LENGTH_ERROR 0x1A +#define INVALID_FIELD_IN_PARAMETER_LIST 0x26 +#define ADDRESS_OUT_OF_RANGE 0x21 +#define MEDIUM_NOT_PRESENT 0x3A +#define MEDIUM_HAVE_CHANGED 0x28 + +#define SCSI_INQUIRY_DATA_LENGTH 36 + +/** + * @brief typical command block description + */ +typedef struct +{ + uint8_t opcode; + uint8_t lun; + uint32_t address; + uint8_t reserved1; + uint32_t alloc_length; + uint16_t reserved2; +}cbd_typical_type; + +/** + * @brief extended command block description + */ +typedef struct +{ + uint8_t opcode; + uint8_t lun; + uint32_t address; + uint8_t reserved1; + uint32_t alloc_length; + uint16_t reserved2; +}cbd_extended_type; + +/** + * @brief command block wrapper + */ +typedef struct +{ + uint32_t dCBWSignature; + uint32_t dCBWTage; + uint32_t dCBWDataTransferLength; + uint8_t bmCBWFlags; + uint8_t bCBWLUN; + uint8_t bCBWCBLength; + uint8_t CBWCB[16]; +}cbw_type; + +/** + * @brief command block wrapper + */ +typedef struct +{ + uint32_t dCSWSignature; + uint32_t dCSWTag; + uint32_t dCSWDataResidue; + uint32_t bCSWStatus; +}csw_type; + +/** + * @brief request sense standard data + */ +typedef struct +{ + uint8_t err_code; + uint8_t reserved1; + uint8_t sense_key; + uint32_t information; + uint8_t as_length; + uint32_t reserved2; + uint8_t asc; + uint8_t ascq; + uint32_t reserved3; +}sense_type; + + +typedef struct +{ + uint8_t msc_state; + uint8_t bot_status; + uint32_t max_lun; + + uint32_t blk_nbr[MSC_SUPPORT_MAX_LUN]; + uint32_t blk_size[MSC_SUPPORT_MAX_LUN]; + + uint32_t blk_addr; + uint32_t blk_len; + + uint32_t data_len; + uint8_t data[MSC_MAX_DATA_BUF_LEN]; + + uint32_t alt_setting; + + cbw_type cbw_struct; + csw_type csw_struct; + +}msc_type; + +/** + * @brief usb cdc class struct + */ +typedef struct +{ + //used for CDC + uint32_t alt_setting; + uint8_t g_rx_buff[USBD_CDC_MSC_OUT_MAXPACKET_SIZE]; + uint8_t g_cmd[USBD_CDC_CMD_MAXPACKET_SIZE]; + uint8_t g_req; + uint16_t g_len, g_rxlen; + __IO uint8_t g_tx_completed, g_rx_completed; + linecoding_type linecoding; + + //used for MSC + uint8_t msc_state; + uint8_t bot_status; + uint32_t max_lun; + + uint32_t blk_nbr[MSC_SUPPORT_MAX_LUN]; + uint32_t blk_size[MSC_SUPPORT_MAX_LUN]; + + uint32_t blk_addr; + uint32_t blk_len; + + uint32_t data_len; + uint8_t data[MSC_MAX_DATA_BUF_LEN]; + + cbw_type cbw_struct; + csw_type csw_struct; +}cdc_msc_struct_type; //cdc_struct_type; + + +/** + * @} + */ + +/** @defgroup USB_cdc_msc_class_exported_functions + * @{ + */ +extern usbd_class_handler cdc_msc_class_handler; //cdc_class_handler; +uint16_t usb_vcp_get_rxdata(void *udev, uint8_t *recv_data); +error_status usb_vcp_send_data(void *udev, uint8_t *send_data, uint16_t len); + +void bot_scsi_init(void *udev); +void bot_scsi_reset(void *udev); +void bot_scsi_datain_handler(void *pudev, uint8_t ept_num); +void bot_scsi_dataout_handler(void *pudev, uint8_t ept_num); +void bot_cbw_decode(void *udev); +void bot_scsi_send_data(void *udev, uint8_t *buffer, uint32_t len); +void bot_scsi_send_csw(void *udev, uint8_t status); +void bot_scsi_sense_code(void *udev, uint8_t sense_key, uint8_t asc); +usb_sts_type bot_scsi_check_address(void *udev, uint8_t lun, uint32_t blk_offset, uint32_t blk_count); +void bot_scsi_stall(void *udev); +usb_sts_type bot_scsi_cmd_process(void *udev); + +usb_sts_type bot_scsi_test_unit(void *udev, uint8_t lun); +usb_sts_type bot_scsi_inquiry(void *udev, uint8_t lun); +usb_sts_type bot_scsi_start_stop(void *udev, uint8_t lun); +usb_sts_type bot_scsi_allow_medium_removal(void *udev, uint8_t lun); +usb_sts_type bot_scsi_mode_sense6(void *udev, uint8_t lun); +usb_sts_type bot_scsi_mode_sense10(void *udev, uint8_t lun); +usb_sts_type bot_scsi_read10(void *udev, uint8_t lun); +usb_sts_type bot_scsi_capacity(void *udev, uint8_t lun); +usb_sts_type bot_scsi_format_capacity(void *udev, uint8_t lun); +usb_sts_type bot_scsi_request_sense(void *udev, uint8_t lun); +usb_sts_type bot_scsi_verify(void *udev, uint8_t lun); +usb_sts_type bot_scsi_write10(void *udev, uint8_t lun); +void bot_scsi_clear_feature(void *udev, uint8_t ept_num); + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ +#ifdef __cplusplus +} +#endif + +#endif + + + + diff --git a/middlewares/usbd_class/composite_cdc_msc/cdc_msc_desc.c b/middlewares/usbd_class/composite_cdc_msc/cdc_msc_desc.c new file mode 100644 index 00000000..6b6e22bf --- /dev/null +++ b/middlewares/usbd_class/composite_cdc_msc/cdc_msc_desc.c @@ -0,0 +1,498 @@ +/** + ************************************************************************** + * @file cdc_msc_desc.c + * @version v2.0.9 + * @date 2022-06-28 + * @brief usb cdc device descriptor + ************************************************************************** + * Copyright notice & Disclaimer + * + * The software Board Support Package (BSP) that is made available to + * download from Artery official website is the copyrighted work of Artery. + * Artery authorizes customers to use, copy, and distribute the BSP + * software and its related documentation for the purpose of design and + * development in conjunction with Artery microcontrollers. Use of the + * software is governed by this copyright notice and the following disclaimer. + * + * THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, + * GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, + * TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR + * STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, + * INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. + * + ************************************************************************** + */ +#include "stdio.h" +#include "usb_std.h" +#include "usbd_sdr.h" +#include "usbd_core.h" +#include "cdc_msc_desc.h" + +/** @addtogroup AT32F435_437_middlewares_usbd_class + * @{ + */ + +/** @defgroup USB_cdc_msc_desc + * @brief usb device cdc msc descriptor + * @{ + */ + +/** @defgroup USB_cdc_msc_desc_private_functions + * @{ + */ + +#define USB_INTERFACE_ASSOCIATION_TYPE 0x0B + +static usbd_desc_t *get_device_descriptor(void); +static usbd_desc_t *get_device_qualifier(void); +static usbd_desc_t *get_device_configuration(void); +static usbd_desc_t *get_device_other_speed(void); +static usbd_desc_t *get_device_lang_id(void); +static usbd_desc_t *get_device_manufacturer_string(void); +static usbd_desc_t *get_device_product_string(void); +static usbd_desc_t *get_device_serial_string(void); +static usbd_desc_t *get_device_interface_string(void); +static usbd_desc_t *get_device_config_string(void); + +static uint16_t usbd_unicode_convert(uint8_t *string, uint8_t *unicode_buf); +static void usbd_int_to_unicode (uint32_t value , uint8_t *pbuf , uint8_t len); +static void get_serial_num(void); +static uint8_t g_usbd_desc_buffer[256]; + +/** + * @brief device descriptor handler structure + */ +usbd_desc_handler cdc_msc_desc_handler = +{ + get_device_descriptor, + get_device_qualifier, + get_device_configuration, + get_device_other_speed, + get_device_lang_id, + get_device_manufacturer_string, + get_device_product_string, + get_device_serial_string, + get_device_interface_string, + get_device_config_string, +}; + +/** + * @brief usb device standard descriptor + */ +#if defined ( __ICCARM__ ) /* iar compiler */ + #pragma data_alignment=4 +#endif +ALIGNED_HEAD static uint8_t g_usbd_descriptor[USB_DEVICE_DESC_LEN] ALIGNED_TAIL = +{ + USB_DEVICE_DESC_LEN, /* bLength */ + USB_DESCIPTOR_TYPE_DEVICE, /* bDescriptorType */ + 0x00, /* bcdUSB */ + 0x02, + 0xEF, /* bDeviceClass */ + 0x02, /* bDeviceSubClass */ + 0x01, /* bDeviceProtocol */ + USB_MAX_EP0_SIZE, /* bMaxPacketSize */ + LBYTE(USBD_CDC_MSC_VENDOR_ID), /* idVendor */ + HBYTE(USBD_CDC_MSC_VENDOR_ID), /* idVendor */ + LBYTE(USBD_CDC_MSC_PRODUCT_ID), /* idProduct */ + HBYTE(USBD_CDC_MSC_PRODUCT_ID), /* idProduct */ + 0x00, /* bcdDevice rel. 2.00 */ + 0x02, + USB_MFC_STRING, /* Index of manufacturer string */ + USB_PRODUCT_STRING, /* Index of product string */ + USB_SERIAL_STRING, /* Index of serial number string */ + 1 /* bNumConfigurations */ +}; + +/** + * @brief usb configuration standard descriptor + */ +#if defined ( __ICCARM__ ) /* iar compiler */ + #pragma data_alignment=4 +#endif +ALIGNED_HEAD static uint8_t g_usbd_configuration[USBD_CDC_MSC_CONFIG_DESC_SIZE] ALIGNED_TAIL = +{ + USB_DEVICE_CFG_DESC_LEN, /* bLength: configuration descriptor size */ + USB_DESCIPTOR_TYPE_CONFIGURATION, /* bDescriptorType: configuration */ + LBYTE(USBD_CDC_MSC_CONFIG_DESC_SIZE), /* wTotalLength: bytes returned */ + HBYTE(USBD_CDC_MSC_CONFIG_DESC_SIZE), /* wTotalLength: bytes returned */ + 0x03, /* bNumInterfaces: 3 interface */ + 0x01, /* bConfigurationValue: configuration value */ + 0x00, /* iConfiguration: index of string descriptor describing + the configuration */ + 0xC0, /* bmAttributes: self powered */ + 0x32, /* MaxPower 100 mA: this current is used for detecting vbus */ + + // IAD (Interface Association Descriptor) for MSC + 0x08, /* bLength */ + USB_INTERFACE_ASSOCIATION_TYPE, /* bDescriptorType */ + 0x00, /* bFirstInterface */ + 0x01, /* bInterfaceCount */ + 0x08, /* bFunctionClass */ + 0x06, /* bFunctionSubClass */ + 0x50, /* bFunctionProtocol */ + 0x00, /* iFunction (Index of string descriptor describing this function) */ + + // Configuration Descriptor for MSC + USB_DEVICE_IF_DESC_LEN, /* bLength: interface descriptor size */ + USB_DESCIPTOR_TYPE_INTERFACE, /* bDescriptorType: interface descriptor type */ + VCPMSC_MSC_INTERFACE, /* bInterfaceNumber: number of interface */ + 0x00, /* bAlternateSetting: alternate set */ + 0x02, /* bNumEndpoints: number of endpoints */ + USB_CLASS_CODE_MSC, /* bInterfaceClass: msc class code */ + 0x06, /* bInterfaceSubClass: subclass code scsi */ + 0x50, /* bInterfaceProtocol: protocol code BBB */ + 0x00, /* iInterface: index of string descriptor */ + + USB_DEVICE_EPT_LEN, /* bLength: size of endpoint descriptor in bytes */ + USB_DESCIPTOR_TYPE_ENDPOINT, /* bDescriptorType: endpoint descriptor type */ + USBD_MSC_BULK_IN_EPT, /* bEndpointAddress: the address of endpoint on usb device described by this descriptor */ + USB_EPT_DESC_BULK, /* bmAttributes: endpoint attributes */ + LBYTE(USBD_CDC_MSC_IN_MAXPACKET_SIZE), + HBYTE(USBD_CDC_MSC_IN_MAXPACKET_SIZE), /* wMaxPacketSize: maximum packe size this endpoint */ + 0x00, /* bInterval: interval for polling endpoint for data transfers */ + + USB_DEVICE_EPT_LEN, /* bLength: size of endpoint descriptor in bytes */ + USB_DESCIPTOR_TYPE_ENDPOINT, /* bDescriptorType: endpoint descriptor type */ + USBD_MSC_BULK_OUT_EPT, /* bEndpointAddress: the address of endpoint on usb device described by this descriptor */ + USB_EPT_DESC_BULK, /* bmAttributes: endpoint attributes */ + LBYTE(USBD_CDC_MSC_OUT_MAXPACKET_SIZE), + HBYTE(USBD_CDC_MSC_OUT_MAXPACKET_SIZE), /* wMaxPacketSize: maximum packe size this endpoint */ + 0x00, /* bInterval: interval for polling endpoint for data transfers */ + + // IAD (Interface Association Descriptor) for CDC + 0x08, /* bLength */ + USB_INTERFACE_ASSOCIATION_TYPE, /* bDescriptorType */ + 0x01, /* bFirstInterface */ + 0x02, /* bInterfaceCount */ + USB_CLASS_CODE_CDC, /* bFunctionClass */ + 0x02, /* bFunctionSubClass */ + 0x01, /* bFunctionProtocol */ + 0x00, /* iFunction (Index of string descriptor describing this function) */ + + // Configuration Descriptor for CDC + USB_DEVICE_IF_DESC_LEN, /* bLength: interface descriptor size */ + USB_DESCIPTOR_TYPE_INTERFACE, /* bDescriptorType: interface descriptor type */ + VCPMSC_CDC_INTERFACE, /* bInterfaceNumber: number of interface */ + 0x00, /* bAlternateSetting: alternate set */ + 0x01, /* bNumEndpoints: number of endpoints */ + USB_CLASS_CODE_CDC, /* bInterfaceClass: CDC class code */ + 0x02, /* bInterfaceSubClass: subclass code, Abstract Control Model*/ + 0x01, /* bInterfaceProtocol: protocol code, AT Command */ + 0x00, /* iInterface: index of string descriptor */ + + 0x05, /* bFunctionLength: size of this descriptor in bytes */ + USBD_CDC_CS_INTERFACE, /* bDescriptorType: CDC interface descriptor type */ + USBD_CDC_SUBTYPE_HEADER, /* bDescriptorSubtype: Header function Descriptor 0x00*/ + LBYTE(CDC_BCD_NUM), + HBYTE(CDC_BCD_NUM), /* bcdCDC: USB class definitions for communications */ + + 0x05, /* bFunctionLength: size of this descriptor in bytes */ + USBD_CDC_CS_INTERFACE, /* bDescriptorType: CDC interface descriptor type */ + USBD_CDC_SUBTYPE_CMF, /* bDescriptorSubtype: Call Management function descriptor subtype 0x01 */ + 0x00, /* bmCapabilities: 0x00*/ + 0x01, /* bDataInterface: interface number of data class interface optionally used for call management */ + + 0x04, /* bFunctionLength: size of this descriptor in bytes */ + USBD_CDC_CS_INTERFACE, /* bDescriptorType: CDC interface descriptor type */ + USBD_CDC_SUBTYPE_ACM, /* bDescriptorSubtype: Abstract Control Management functional descriptor subtype 0x02 */ + 0x02, /* bmCapabilities: Support Set_Line_Coding and Get_Line_Coding 0x02 */ + + 0x05, /* bFunctionLength: size of this descriptor in bytes */ + USBD_CDC_CS_INTERFACE, /* bDescriptorType: CDC interface descriptor type */ + USBD_CDC_SUBTYPE_UFD, /* bDescriptorSubtype: Union Function Descriptor subtype 0x06 */ + 0x00, /* bControlInterface: The interface number of the communications or data class interface 0x00 */ + 0x01, /* bSubordinateInterface0: interface number of first subordinate interface in the union */ + + USB_DEVICE_EPT_LEN, /* bLength: size of endpoint descriptor in bytes */ + USB_DESCIPTOR_TYPE_ENDPOINT, /* bDescriptorType: endpoint descriptor type */ + USBD_CDC_INT_EPT, /* bEndpointAddress: the address of endpoint on usb device described by this descriptor */ + USB_EPT_DESC_INTERRUPT, /* bmAttributes: endpoint attributes */ + LBYTE(USBD_CDC_CMD_MAXPACKET_SIZE), + HBYTE(USBD_CDC_CMD_MAXPACKET_SIZE), /* wMaxPacketSize: maximum packe size this endpoint */ + CDC_HID_BINTERVAL_TIME, /* bInterval: interval for polling endpoint for data transfers */ + + + USB_DEVICE_IF_DESC_LEN, /* bLength: interface descriptor size */ + USB_DESCIPTOR_TYPE_INTERFACE, /* bDescriptorType: interface descriptor type */ + VCPMSC_CDC_DATA_INTERFACE, /* bInterfaceNumber: number of interface */ + 0x00, /* bAlternateSetting: alternate set */ + 0x02, /* bNumEndpoints: number of endpoints */ + USB_CLASS_CODE_CDCDATA, /* bInterfaceClass: CDC-data class code */ + 0x00, /* bInterfaceSubClass: Data interface subclass code 0x00*/ + 0x00, /* bInterfaceProtocol: data class protocol code 0x00 */ + 0x00, /* iInterface: index of string descriptor */ + + USB_DEVICE_EPT_LEN, /* bLength: size of endpoint descriptor in bytes */ + USB_DESCIPTOR_TYPE_ENDPOINT, /* bDescriptorType: endpoint descriptor type */ + USBD_CDC_BULK_IN_EPT, /* bEndpointAddress: the address of endpoint on usb device described by this descriptor */ + USB_EPT_DESC_BULK, /* bmAttributes: endpoint attributes */ + LBYTE(USBD_CDC_MSC_IN_MAXPACKET_SIZE), + HBYTE(USBD_CDC_MSC_IN_MAXPACKET_SIZE), /* wMaxPacketSize: maximum packe size this endpoint */ + 0x00, /* bInterval: interval for polling endpoint for data transfers */ + + USB_DEVICE_EPT_LEN, /* bLength: size of endpoint descriptor in bytes */ + USB_DESCIPTOR_TYPE_ENDPOINT, /* bDescriptorType: endpoint descriptor type */ + USBD_CDC_BULK_OUT_EPT, /* bEndpointAddress: the address of endpoint on usb device described by this descriptor */ + USB_EPT_DESC_BULK, /* bmAttributes: endpoint attributes */ + LBYTE(USBD_CDC_MSC_OUT_MAXPACKET_SIZE), + HBYTE(USBD_CDC_MSC_OUT_MAXPACKET_SIZE),/* wMaxPacketSize: maximum packe size this endpoint */ + 0x00, /* bInterval: interval for polling endpoint for data transfers */ + + +}; + +/** + * @brief usb string lang id + */ +#if defined ( __ICCARM__ ) /* iar compiler */ + #pragma data_alignment=4 +#endif +ALIGNED_HEAD static uint8_t g_string_lang_id[USBD_CDC_SIZ_STRING_LANGID] ALIGNED_TAIL = +{ + USBD_CDC_SIZ_STRING_LANGID, + USB_DESCIPTOR_TYPE_STRING, + 0x09, + 0x04, +}; + +/** + * @brief usb string serial + */ +#if defined ( __ICCARM__ ) /* iar compiler */ + #pragma data_alignment=4 +#endif +ALIGNED_HEAD static uint8_t g_string_serial[USBD_CDC_SIZ_STRING_SERIAL] ALIGNED_TAIL = +{ + USBD_CDC_SIZ_STRING_SERIAL, + USB_DESCIPTOR_TYPE_STRING, +}; + + +/* device descriptor */ +static usbd_desc_t device_descriptor = +{ + USB_DEVICE_DESC_LEN, + g_usbd_descriptor +}; + +/* config descriptor */ +static usbd_desc_t config_descriptor = +{ + USBD_CDC_MSC_CONFIG_DESC_SIZE, + g_usbd_configuration +}; + +/* langid descriptor */ +static usbd_desc_t langid_descriptor = +{ + USBD_CDC_SIZ_STRING_LANGID, + g_string_lang_id +}; + +/* serial descriptor */ +static usbd_desc_t serial_descriptor = +{ + USBD_CDC_SIZ_STRING_SERIAL, + g_string_serial +}; + +static usbd_desc_t vp_desc; + +/** + * @brief standard usb unicode convert + * @param string: source string + * @param unicode_buf: unicode buffer + * @retval length + */ +static uint16_t usbd_unicode_convert(uint8_t *string, uint8_t *unicode_buf) +{ + uint16_t str_len = 0, id_pos = 2; + uint8_t *tmp_str = string; + + while(*tmp_str != '\0') + { + str_len ++; + unicode_buf[id_pos ++] = *tmp_str ++; + unicode_buf[id_pos ++] = 0x00; + } + + str_len = str_len * 2 + 2; + unicode_buf[0] = (uint8_t)str_len; + unicode_buf[1] = USB_DESCIPTOR_TYPE_STRING; + + return str_len; +} + +/** + * @brief usb int convert to unicode + * @param value: int value + * @param pbus: unicode buffer + * @param len: length + * @retval none + */ +static void usbd_int_to_unicode (uint32_t value , uint8_t *pbuf , uint8_t len) +{ + uint8_t idx = 0; + + for( idx = 0 ; idx < len ; idx ++) + { + if( ((value >> 28)) < 0xA ) + { + pbuf[ 2 * idx] = (value >> 28) + '0'; + } + else + { + pbuf[2 * idx] = (value >> 28) + 'A' - 10; + } + + value = value << 4; + + pbuf[2 * idx + 1] = 0; + } +} + +/** + * @brief usb get serial number + * @param none + * @retval none + */ +static void get_serial_num(void) +{ + uint32_t serial0, serial1, serial2; + + serial0 = *(uint32_t*)MCU_ID1; + serial1 = *(uint32_t*)MCU_ID2; + serial2 = *(uint32_t*)MCU_ID3; + + serial0 += serial2; + + if (serial0 != 0) + { + usbd_int_to_unicode (serial0, &g_string_serial[2] ,8); + usbd_int_to_unicode (serial1, &g_string_serial[18] ,4); + } +} + +/** + * @brief get device descriptor + * @param none + * @retval usbd_desc + */ +static usbd_desc_t *get_device_descriptor(void) +{ + return &device_descriptor; +} + +/** + * @brief get device qualifier + * @param none + * @retval usbd_desc + */ +static usbd_desc_t * get_device_qualifier(void) +{ + return NULL; +} + +/** + * @brief get config descriptor + * @param none + * @retval usbd_desc + */ +static usbd_desc_t *get_device_configuration(void) +{ + return &config_descriptor; +} + +/** + * @brief get other speed descriptor + * @param none + * @retval usbd_desc + */ +static usbd_desc_t *get_device_other_speed(void) +{ + return NULL; +} + +/** + * @brief get lang id descriptor + * @param none + * @retval usbd_desc + */ +static usbd_desc_t *get_device_lang_id(void) +{ + return &langid_descriptor; +} + + +/** + * @brief get manufacturer descriptor + * @param none + * @retval usbd_desc + */ +static usbd_desc_t *get_device_manufacturer_string(void) +{ + vp_desc.length = usbd_unicode_convert((uint8_t *)USBD_CDC_DESC_MANUFACTURER_STRING, g_usbd_desc_buffer); + vp_desc.descriptor = g_usbd_desc_buffer; + return &vp_desc; +} + +/** + * @brief get product descriptor + * @param none + * @retval usbd_desc + */ +static usbd_desc_t *get_device_product_string(void) +{ + vp_desc.length = usbd_unicode_convert((uint8_t *)USBD_CDC_DESC_PRODUCT_STRING, g_usbd_desc_buffer); + vp_desc.descriptor = g_usbd_desc_buffer; + return &vp_desc; +} + +/** + * @brief get serial descriptor + * @param none + * @retval usbd_desc + */ +static usbd_desc_t *get_device_serial_string(void) +{ + get_serial_num(); + return &serial_descriptor; +} + +/** + * @brief get interface descriptor + * @param none + * @retval usbd_desc + */ +static usbd_desc_t *get_device_interface_string(void) +{ + vp_desc.length = usbd_unicode_convert((uint8_t *)USBD_CDC_DESC_INTERFACE_STRING, g_usbd_desc_buffer); + vp_desc.descriptor = g_usbd_desc_buffer; + return &vp_desc; +} + +/** + * @brief get device config descriptor + * @param none + * @retval usbd_desc + */ +static usbd_desc_t *get_device_config_string(void) +{ + vp_desc.length = usbd_unicode_convert((uint8_t *)USBD_CDC_DESC_CONFIGURATION_STRING, g_usbd_desc_buffer); + vp_desc.descriptor = g_usbd_desc_buffer; + return &vp_desc; +} + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ diff --git a/middlewares/usbd_class/composite_cdc_msc/cdc_msc_desc.h b/middlewares/usbd_class/composite_cdc_msc/cdc_msc_desc.h new file mode 100644 index 00000000..dbecff77 --- /dev/null +++ b/middlewares/usbd_class/composite_cdc_msc/cdc_msc_desc.h @@ -0,0 +1,113 @@ +/** + ************************************************************************** + * @file cdc_msc_desc.h + * @version v2.0.9 + * @date 2022-06-28 + * @brief usb cdc descriptor header file + ************************************************************************** + * Copyright notice & Disclaimer + * + * The software Board Support Package (BSP) that is made available to + * download from Artery official website is the copyrighted work of Artery. + * Artery authorizes customers to use, copy, and distribute the BSP + * software and its related documentation for the purpose of design and + * development in conjunction with Artery microcontrollers. Use of the + * software is governed by this copyright notice and the following disclaimer. + * + * THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, + * GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, + * TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR + * STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, + * INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. + * + ************************************************************************** + */ + +/* define to prevent recursive inclusion -------------------------------------*/ +#ifndef __CDC_MSC_DESC_H +#define __CDC_MSC_DESC_H + +#ifdef __cplusplus +extern "C" { +#endif + +#include "cdc_msc_class.h" +#include "usbd_core.h" + +/** @addtogroup AT32F435_437_middlewares_usbd_class + * @{ + */ + +/** @addtogroup USB_cdc_msc_desc + * @{ + */ + +/** @defgroup USB_cdc_desc_definition + * @{ + */ +/** + * @brief usb bcd number define + */ +#define CDC_BCD_NUM 0x0110 + +/** + * @brief usb vendor id and product id define + */ +#define USBD_CDC_MSC_VENDOR_ID 0x2E3C +#define USBD_CDC_MSC_PRODUCT_ID 0x5760 + +/** + * @brief usb descriptor size define + */ + +#define USBD_CDC_MSC_CONFIG_DESC_SIZE 106 +#define USBD_CDC_SIZ_STRING_LANGID 4 +#define USBD_CDC_SIZ_STRING_SERIAL 0x1A + +/** + * @brief usb string define(vendor, product configuration, interface) + */ +#define USBD_CDC_DESC_MANUFACTURER_STRING "Artery" +#define USBD_CDC_DESC_PRODUCT_STRING "AT32 Composite VCP and MSC " +#define USBD_CDC_DESC_CONFIGURATION_STRING "Composite VCP and MSC Config" +#define USBD_CDC_DESC_INTERFACE_STRING "Composite VCP and MSC Interface" + +/** + * @brief usb endpoint interval define + */ +#define CDC_HID_BINTERVAL_TIME 0xFF + +/** + * @brief usb interface define + */ +#define VCPMSC_MSC_INTERFACE 0x00 +#define VCPMSC_CDC_INTERFACE 0x01 +#define VCPMSC_CDC_DATA_INTERFACE 0x02 + + +/** + * @brief usb mcu id address deine + */ +#define MCU_ID1 (0x1FFFF7E8) +#define MCU_ID2 (0x1FFFF7EC) +#define MCU_ID3 (0x1FFFF7F0) +/** + * @} + */ + +extern usbd_desc_handler cdc_msc_desc_handler; + + +/** + * @} + */ + +/** + * @} + */ +#ifdef __cplusplus +} +#endif + +#endif diff --git a/middlewares/usbd_class/composite_cdc_msc/msc_bot_scsi.c b/middlewares/usbd_class/composite_cdc_msc/msc_bot_scsi.c new file mode 100644 index 00000000..0ba48f2d --- /dev/null +++ b/middlewares/usbd_class/composite_cdc_msc/msc_bot_scsi.c @@ -0,0 +1,826 @@ +/** + ************************************************************************** + * @file msc_bot_scsi.c + * @version v2.0.9 + * @date 2022-06-28 + * @brief usb mass storage bulk-only transport and scsi command + ************************************************************************** + * Copyright notice & Disclaimer + * + * The software Board Support Package (BSP) that is made available to + * download from Artery official website is the copyrighted work of Artery. + * Artery authorizes customers to use, copy, and distribute the BSP + * software and its related documentation for the purpose of design and + * development in conjunction with Artery microcontrollers. Use of the + * software is governed by this copyright notice and the following disclaimer. + * + * THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, + * GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, + * TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR + * STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, + * INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. + * + ************************************************************************** + */ +#include "cdc_msc_class.h" +#include "msc_diskio.h" + +/** @addtogroup AT32F435_437_middlewares_usbd_class + * @{ + */ + +/** @defgroup USB_msc_bot_scsi + * @brief usb device class mass storage demo + * @{ + */ + +/** @defgroup USB_msc_bot_functions + * @{ + */ + + +#if defined ( __ICCARM__ ) /* iar compiler */ + #pragma data_alignment=4 +#endif +ALIGNED_HEAD uint8_t page00_inquiry_data[] ALIGNED_TAIL = { + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + +}; +#if defined ( __ICCARM__ ) /* iar compiler */ + #pragma data_alignment=4 +#endif +ALIGNED_HEAD sense_type sense_data ALIGNED_TAIL = +{ + 0x70, + 0x00, + SENSE_KEY_ILLEGAL_REQUEST, + 0x00000000, + 0x0A, + 0x00000000, + 0x20, + 0x00, + 0x00000000 +}; + +#if defined ( __ICCARM__ ) /* iar compiler */ + #pragma data_alignment=4 +#endif +ALIGNED_HEAD uint8_t mode_sense6_data[8] ALIGNED_TAIL = +{ + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00 +}; + +#if defined ( __ICCARM__ ) /* iar compiler */ + #pragma data_alignment=4 +#endif +ALIGNED_HEAD uint8_t mode_sense10_data[8] ALIGNED_TAIL = +{ + 0x00, + 0x06, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00 +}; +/** + * @brief initialize bulk-only transport and scsi + * @param udev: to the structure of usbd_core_type + * @retval none + */ +void bot_scsi_init(void *udev) +{ + usbd_core_type *pudev = (usbd_core_type *)udev; + cdc_msc_struct_type *pmsc = (cdc_msc_struct_type *)pudev->class_handler->pdata; + pmsc->msc_state = MSC_STATE_MACHINE_IDLE; + pmsc->bot_status = MSC_BOT_STATE_IDLE; + pmsc->max_lun = MSC_SUPPORT_MAX_LUN - 1; + + pmsc->csw_struct.dCSWSignature = CSW_DCSWSIGNATURE; + pmsc->csw_struct.dCSWDataResidue = 0; + pmsc->csw_struct.dCSWSignature = 0; + pmsc->csw_struct.dCSWTag = CSW_BCSWSTATUS_PASS; + + usbd_flush_tx_fifo(pudev, USBD_MSC_BULK_IN_EPT&0x7F); + + /* set out endpoint to receive status */ + usbd_ept_recv(pudev, USBD_MSC_BULK_OUT_EPT, (uint8_t *)&pmsc->cbw_struct, CBW_CMD_LENGTH); +} + +/** + * @brief reset bulk-only transport and scsi + * @param udev: to the structure of usbd_core_type + * @retval none + */ +void bot_scsi_reset(void *udev) +{ + usbd_core_type *pudev = (usbd_core_type *)udev; + cdc_msc_struct_type *pmsc = (cdc_msc_struct_type *)pudev->class_handler->pdata; + pmsc->msc_state = MSC_STATE_MACHINE_IDLE; + pmsc->bot_status = MSC_BOT_STATE_RECOVERY; + pmsc->max_lun = MSC_SUPPORT_MAX_LUN - 1; + usbd_flush_tx_fifo(pudev, USBD_MSC_BULK_IN_EPT&0x7F); + + /* set out endpoint to receive status */ + usbd_ept_recv(pudev, USBD_MSC_BULK_OUT_EPT, (uint8_t *)&pmsc->cbw_struct, CBW_CMD_LENGTH); +} + +/** + * @brief bulk-only transport data in handler + * @param udev: to the structure of usbd_core_type + * @param ept_num: endpoint number + * @retval none + */ +void bot_scsi_datain_handler(void *udev, uint8_t ept_num) +{ + usbd_core_type *pudev = (usbd_core_type *)udev; + cdc_msc_struct_type *pmsc = (cdc_msc_struct_type *)pudev->class_handler->pdata; + switch(pmsc->msc_state) + { + case MSC_STATE_MACHINE_DATA_IN: + if(bot_scsi_cmd_process(udev) != USB_OK) + { + bot_scsi_send_csw(udev, CSW_BCSWSTATUS_FAILED); + } + break; + + case MSC_STATE_MACHINE_LAST_DATA: + case MSC_STATE_MACHINE_SEND_DATA: + bot_scsi_send_csw(udev, CSW_BCSWSTATUS_PASS); + break; + + default: + break; + } +} + +/** + * @brief bulk-only transport data out handler + * @param udev: to the structure of usbd_core_type + * @param ept_num: endpoint number + * @retval none + */ +void bot_scsi_dataout_handler(void *udev, uint8_t ept_num) +{ + usbd_core_type *pudev = (usbd_core_type *)udev; + cdc_msc_struct_type *pmsc = (cdc_msc_struct_type *)pudev->class_handler->pdata; + switch(pmsc->msc_state) + { + case MSC_STATE_MACHINE_IDLE: + bot_cbw_decode(udev); + break; + + case MSC_STATE_MACHINE_DATA_OUT: + if(bot_scsi_cmd_process(udev) != USB_OK) + { + bot_scsi_send_csw(udev, CSW_BCSWSTATUS_FAILED); + } + break; + } +} + +/** + * @brief bulk-only cbw decode + * @param udev: to the structure of usbd_core_type + * @retval none + */ +void bot_cbw_decode(void *udev) +{ + usbd_core_type *pudev = (usbd_core_type *)udev; + cdc_msc_struct_type *pmsc = (cdc_msc_struct_type *)pudev->class_handler->pdata; + + pmsc->csw_struct.dCSWTag = pmsc->cbw_struct.dCBWTage; + pmsc->csw_struct.dCSWDataResidue = pmsc->cbw_struct.dCBWDataTransferLength; + + /* check param */ + if((pmsc->cbw_struct.dCBWSignature != CBW_DCBWSIGNATURE) || + (usbd_get_recv_len(pudev, USBD_MSC_BULK_OUT_EPT) != CBW_CMD_LENGTH) + || (pmsc->cbw_struct.bCBWLUN > MSC_SUPPORT_MAX_LUN) || + (pmsc->cbw_struct.bCBWCBLength < 1) || (pmsc->cbw_struct.bCBWCBLength > 16)) + { + bot_scsi_sense_code(udev, SENSE_KEY_ILLEGAL_REQUEST, INVALID_COMMAND); + pmsc->bot_status = MSC_BOT_STATE_ERROR; + bot_scsi_stall(udev); + } + else + { + if(bot_scsi_cmd_process(udev) != USB_OK) + { + bot_scsi_stall(udev); + } + else if((pmsc->msc_state != MSC_STATE_MACHINE_DATA_IN) && + (pmsc->msc_state != MSC_STATE_MACHINE_DATA_OUT) && + (pmsc->msc_state != MSC_STATE_MACHINE_LAST_DATA)) + { + if(pmsc->data_len == 0) + { + bot_scsi_send_csw(udev, CSW_BCSWSTATUS_PASS); + } + else if(pmsc->data_len > 0) + { + bot_scsi_send_data(udev, pmsc->data, pmsc->data_len); + } + } + } +} + +/** + * @brief send bot data + * @param udev: to the structure of usbd_core_type + * @param buffer: data buffer + * @param len: data len + * @retval none + */ +void bot_scsi_send_data(void *udev, uint8_t *buffer, uint32_t len) +{ + usbd_core_type *pudev = (usbd_core_type *)udev; + cdc_msc_struct_type *pmsc = (cdc_msc_struct_type *)pudev->class_handler->pdata; + uint32_t data_len = MIN(len, pmsc->cbw_struct.dCBWDataTransferLength); + + pmsc->csw_struct.dCSWDataResidue -= data_len; + pmsc->csw_struct.bCSWStatus = CSW_BCSWSTATUS_PASS; + + pmsc->msc_state = MSC_STATE_MACHINE_SEND_DATA; + + usbd_ept_send(pudev, USBD_MSC_BULK_IN_EPT, + buffer, data_len); +} + +/** + * @brief send command status + * @param udev: to the structure of usbd_core_type + * @param status: csw status + * @retval none + */ +void bot_scsi_send_csw(void *udev, uint8_t status) +{ + usbd_core_type *pudev = (usbd_core_type *)udev; + cdc_msc_struct_type *pmsc = (cdc_msc_struct_type *)pudev->class_handler->pdata; + + pmsc->csw_struct.bCSWStatus = status; + pmsc->csw_struct.dCSWSignature = CSW_DCSWSIGNATURE; + pmsc->msc_state = MSC_STATE_MACHINE_IDLE; + + usbd_ept_send(pudev, USBD_MSC_BULK_IN_EPT, + (uint8_t *)&pmsc->csw_struct, CSW_CMD_LENGTH); + + usbd_ept_recv(pudev, USBD_MSC_BULK_OUT_EPT, + (uint8_t *)&pmsc->cbw_struct, CBW_CMD_LENGTH); +} + + +/** + * @brief send scsi sense code + * @param udev: to the structure of usbd_core_type + * @param sense_key: sense key + * @param asc: asc + * @retval none + */ +void bot_scsi_sense_code(void *udev, uint8_t sense_key, uint8_t asc) +{ + sense_data.sense_key = sense_key; + sense_data.asc = asc; +} + + +/** + * @brief check address + * @param udev: to the structure of usbd_core_type + * @param lun: logical units number + * @param blk_offset: blk offset address + * @param blk_count: blk number + * @retval usb_sts_type + */ +usb_sts_type bot_scsi_check_address(void *udev, uint8_t lun, uint32_t blk_offset, uint32_t blk_count) +{ + usbd_core_type *pudev = (usbd_core_type *)udev; + cdc_msc_struct_type *pmsc = (cdc_msc_struct_type *)pudev->class_handler->pdata; + if((blk_offset + blk_count) > pmsc->blk_nbr[lun]) + { + bot_scsi_sense_code(udev, SENSE_KEY_ILLEGAL_REQUEST, ADDRESS_OUT_OF_RANGE); + return USB_FAIL; + } + return USB_OK; +} + +/** + * @brief bot endpoint stall + * @param udev: to the structure of usbd_core_type + * @retval none + */ +void bot_scsi_stall(void *udev) +{ + usbd_core_type *pudev = (usbd_core_type *)udev; + cdc_msc_struct_type *pmsc = (cdc_msc_struct_type *)pudev->class_handler->pdata; + + if((pmsc->cbw_struct.dCBWDataTransferLength != 0) && + (pmsc->cbw_struct.bmCBWFlags == 0) && + pmsc->bot_status == MSC_BOT_STATE_IDLE) + { + usbd_set_stall(pudev, USBD_MSC_BULK_OUT_EPT); + } + usbd_set_stall(pudev, USBD_MSC_BULK_IN_EPT); + + if(pmsc->bot_status == MSC_BOT_STATE_ERROR) + { + usbd_ept_recv(pudev, USBD_MSC_BULK_OUT_EPT, + (uint8_t *)&pmsc->cbw_struct, CBW_CMD_LENGTH); + } +} + +/** + * @brief bulk-only transport scsi command test unit + * @param udev: to the structure of usbd_core_type + * @param lun: logical units number + * @retval status of usb_sts_type + */ +usb_sts_type bot_scsi_test_unit(void *udev, uint8_t lun) +{ + usb_sts_type status = USB_OK; + usbd_core_type *pudev = (usbd_core_type *)udev; + cdc_msc_struct_type *pmsc = (cdc_msc_struct_type *)pudev->class_handler->pdata; + + if(pmsc->cbw_struct.dCBWDataTransferLength != 0) + { + bot_scsi_sense_code(udev, SENSE_KEY_ILLEGAL_REQUEST, INVALID_COMMAND); + return USB_FAIL; + } + + pmsc->data_len = 0; + return status; +} + +/** + * @brief bulk-only transport scsi command inquiry + * @param udev: to the structure of usbd_core_type + * @param lun: logical units number + * @retval status of usb_sts_type + */ +usb_sts_type bot_scsi_inquiry(void *udev, uint8_t lun) +{ + uint8_t *pdata; + uint32_t trans_len = 0; + usb_sts_type status = USB_OK; + usbd_core_type *pudev = (usbd_core_type *)udev; + cdc_msc_struct_type *pmsc = (cdc_msc_struct_type *)pudev->class_handler->pdata; + + if(pmsc->cbw_struct.CBWCB[1] & 0x01) + { + pdata = page00_inquiry_data; + trans_len = 5; + } + else + { + pdata = get_inquiry(lun); + if(pmsc->cbw_struct.dCBWDataTransferLength < SCSI_INQUIRY_DATA_LENGTH) + { + trans_len = pmsc->cbw_struct.dCBWDataTransferLength; + } + else + { + trans_len = SCSI_INQUIRY_DATA_LENGTH; + } + } + + pmsc->data_len = trans_len; + while(trans_len) + { + trans_len --; + pmsc->data[trans_len] = pdata[trans_len]; + } + return status; +} + +/** + * @brief bulk-only transport scsi command start stop + * @param udev: to the structure of usbd_core_type + * @param lun: logical units number + * @retval status of usb_sts_type + */ +usb_sts_type bot_scsi_start_stop(void *udev, uint8_t lun) +{ + usbd_core_type *pudev = (usbd_core_type *)udev; + cdc_msc_struct_type *pmsc = (cdc_msc_struct_type *)pudev->class_handler->pdata; + pmsc->data_len = 0; + return USB_OK; +} + +/** + * @brief bulk-only transport scsi command meidum removal + * @param udev: to the structure of usbd_core_type + * @param lun: logical units number + * @retval status of usb_sts_type + */ +usb_sts_type bot_scsi_allow_medium_removal(void *udev, uint8_t lun) +{ + usbd_core_type *pudev = (usbd_core_type *)udev; + cdc_msc_struct_type *pmsc = (cdc_msc_struct_type *)pudev->class_handler->pdata; + pmsc->data_len = 0; + return USB_OK; +} + +/** + * @brief bulk-only transport scsi command mode sense6 + * @param udev: to the structure of usbd_core_type + * @param lun: logical units number + * @retval status of usb_sts_type + */ +usb_sts_type bot_scsi_mode_sense6(void *udev, uint8_t lun) +{ + uint8_t data_len = 8; + usbd_core_type *pudev = (usbd_core_type *)udev; + cdc_msc_struct_type *pmsc = (cdc_msc_struct_type *)pudev->class_handler->pdata; + pmsc->data_len = 8; + while(data_len) + { + data_len --; + pmsc->data[data_len] = mode_sense6_data[data_len]; + }; + return USB_OK; +} + +/** + * @brief bulk-only transport scsi command mode sense10 + * @param udev: to the structure of usbd_core_type + * @param lun: logical units number + * @retval status of usb_sts_type + */ +usb_sts_type bot_scsi_mode_sense10(void *udev, uint8_t lun) +{ + uint8_t data_len = 8; + usbd_core_type *pudev = (usbd_core_type *)udev; + cdc_msc_struct_type *pmsc = (cdc_msc_struct_type *)pudev->class_handler->pdata; + pmsc->data_len = 8; + while(data_len) + { + data_len --; + pmsc->data[data_len] = mode_sense10_data[data_len]; + }; + return USB_OK; +} + +/** + * @brief bulk-only transport scsi command capacity + * @param udev: to the structure of usbd_core_type + * @param lun: logical units number + * @retval status of usb_sts_type + */ +usb_sts_type bot_scsi_capacity(void *udev, uint8_t lun) +{ + usbd_core_type *pudev = (usbd_core_type *)udev; + cdc_msc_struct_type *pmsc = (cdc_msc_struct_type *)pudev->class_handler->pdata; + uint8_t *pdata = pmsc->data; + msc_disk_capacity(lun, &pmsc->blk_nbr[lun], &pmsc->blk_size[lun]); + + pdata[0] = (uint8_t)((pmsc->blk_nbr[lun] - 1) >> 24); + pdata[1] = (uint8_t)((pmsc->blk_nbr[lun] - 1) >> 16); + pdata[2] = (uint8_t)((pmsc->blk_nbr[lun] - 1) >> 8); + pdata[3] = (uint8_t)((pmsc->blk_nbr[lun] - 1)); + + pdata[4] = (uint8_t)((pmsc->blk_size[lun]) >> 24); + pdata[5] = (uint8_t)((pmsc->blk_size[lun]) >> 16); + pdata[6] = (uint8_t)((pmsc->blk_size[lun]) >> 8); + pdata[7] = (uint8_t)((pmsc->blk_size[lun])); + + pmsc->data_len = 8; + return USB_OK; +} + +/** + * @brief bulk-only transport scsi command format capacity + * @param udev: to the structure of usbd_core_type + * @param lun: logical units number + * @retval status of usb_sts_type + */ +usb_sts_type bot_scsi_format_capacity(void *udev, uint8_t lun) +{ + usbd_core_type *pudev = (usbd_core_type *)udev; + cdc_msc_struct_type *pmsc = (cdc_msc_struct_type *)pudev->class_handler->pdata; + uint8_t *pdata = pmsc->data; + + pdata[0] = 0; + pdata[1] = 0; + pdata[2] = 0; + pdata[3] = 0x08; + + msc_disk_capacity(lun, &pmsc->blk_nbr[lun], &pmsc->blk_size[lun]); + + pdata[4] = (uint8_t)((pmsc->blk_nbr[lun] - 1) >> 24); + pdata[5] = (uint8_t)((pmsc->blk_nbr[lun] - 1) >> 16); + pdata[6] = (uint8_t)((pmsc->blk_nbr[lun] - 1) >> 8); + pdata[7] = (uint8_t)((pmsc->blk_nbr[lun] - 1)); + + pdata[8] = 0x02; + + pdata[9] = (uint8_t)((pmsc->blk_size[lun]) >> 16); + pdata[10] = (uint8_t)((pmsc->blk_size[lun]) >> 8); + pdata[11] = (uint8_t)((pmsc->blk_size[lun])); + + pmsc->data_len = 12; + + return USB_OK; +} + +/** + * @brief bulk-only transport scsi command request sense + * @param udev: to the structure of usbd_core_type + * @param lun: logical units number + * @retval status of usb_sts_type + */ +usb_sts_type bot_scsi_request_sense(void *udev, uint8_t lun) +{ + uint32_t trans_len = 0x12; + usbd_core_type *pudev = (usbd_core_type *)udev; + cdc_msc_struct_type *pmsc = (cdc_msc_struct_type *)pudev->class_handler->pdata; + uint8_t *pdata = pmsc->data; + uint8_t *sdata = (uint8_t *)&sense_data; + + while(trans_len) + { + trans_len --; + pdata[trans_len] = sdata[trans_len]; + } + + if(pmsc->cbw_struct.dCBWDataTransferLength < REQ_SENSE_STANDARD_DATA_LEN) + { + pmsc->data_len = pmsc->cbw_struct.dCBWDataTransferLength; + } + else + { + pmsc->data_len = REQ_SENSE_STANDARD_DATA_LEN; + } + return USB_OK; +} + +/** + * @brief bulk-only transport scsi command verify + * @param udev: to the structure of usbd_core_type + * @param lun: logical units number + * @retval status of usb_sts_type + */ +usb_sts_type bot_scsi_verify(void *udev, uint8_t lun) +{ + usbd_core_type *pudev = (usbd_core_type *)udev; + cdc_msc_struct_type *pmsc = (cdc_msc_struct_type *)pudev->class_handler->pdata; + uint8_t *cmd = pmsc->cbw_struct.CBWCB; + if((pmsc->cbw_struct.CBWCB[1] & 0x02) == 0x02) + { + bot_scsi_sense_code(udev, SENSE_KEY_ILLEGAL_REQUEST, INVALID_FIELED_IN_COMMAND); + return USB_FAIL; + } + + pmsc->blk_addr = cmd[2] << 24 | cmd[3] << 16 | cmd[4] << 8 | cmd[5]; + pmsc->blk_len = cmd[7] << 8 | cmd[8]; + + if(bot_scsi_check_address(udev, lun, pmsc->blk_addr, pmsc->blk_len) != USB_OK) + { + return USB_FAIL; + } + pmsc->data_len = 0; + return USB_OK; +} + +/** + * @brief bulk-only transport scsi command read10 + * @param udev: to the structure of usbd_core_type + * @param lun: logical units number + * @retval status of usb_sts_type + */ +usb_sts_type bot_scsi_read10(void *udev, uint8_t lun) +{ + usbd_core_type *pudev = (usbd_core_type *)udev; + cdc_msc_struct_type *pmsc = (cdc_msc_struct_type *)pudev->class_handler->pdata; + uint8_t *cmd = pmsc->cbw_struct.CBWCB; + uint32_t len; + + if(pmsc->msc_state == MSC_STATE_MACHINE_IDLE) + { + if((pmsc->cbw_struct.bmCBWFlags & 0x80) != 0x80) + { + bot_scsi_sense_code(udev, SENSE_KEY_ILLEGAL_REQUEST, INVALID_COMMAND); + return USB_FAIL; + } + + pmsc->blk_addr = cmd[2] << 24 | cmd[3] << 16 | cmd[4] << 8 | cmd[5]; + pmsc->blk_len = cmd[7] << 8 | cmd[8]; + + if(bot_scsi_check_address(udev, lun, pmsc->blk_addr, pmsc->blk_len) != USB_OK) + { + return USB_FAIL; + } + + pmsc->blk_addr *= pmsc->blk_size[lun]; + pmsc->blk_len *= pmsc->blk_size[lun]; + + if(pmsc->cbw_struct.dCBWDataTransferLength != pmsc->blk_len) + { + bot_scsi_sense_code(udev, SENSE_KEY_ILLEGAL_REQUEST, INVALID_COMMAND); + return USB_FAIL; + } + pmsc->msc_state = MSC_STATE_MACHINE_DATA_IN; + } + pmsc->data_len = MSC_MAX_DATA_BUF_LEN; + + len = MIN(pmsc->blk_len, MSC_MAX_DATA_BUF_LEN); + if( msc_disk_read(lun, pmsc->blk_addr, pmsc->data, len) != USB_OK) + { + bot_scsi_sense_code(udev, SENSE_KEY_HARDWARE_ERROR, MEDIUM_NOT_PRESENT); + return USB_FAIL; + } + usbd_ept_send(pudev, USBD_MSC_BULK_IN_EPT, pmsc->data, len); + pmsc->blk_addr += len; + pmsc->blk_len -= len; + + pmsc->csw_struct.dCSWDataResidue -= len; + if(pmsc->blk_len == 0) + { + pmsc->msc_state = MSC_STATE_MACHINE_LAST_DATA; + } + + return USB_OK; +} + + +/** + * @brief bulk-only transport scsi command write10 + * @param udev: to the structure of usbd_core_type + * @param lun: logical units number + * @retval status of usb_sts_type + */ +usb_sts_type bot_scsi_write10(void *udev, uint8_t lun) +{ + usbd_core_type *pudev = (usbd_core_type *)udev; + cdc_msc_struct_type *pmsc = (cdc_msc_struct_type *)pudev->class_handler->pdata; + uint8_t *cmd = pmsc->cbw_struct.CBWCB; + uint32_t len; + + if(pmsc->msc_state == MSC_STATE_MACHINE_IDLE) + { + if((pmsc->cbw_struct.bmCBWFlags & 0x80) == 0x80) + { + bot_scsi_sense_code(udev, SENSE_KEY_ILLEGAL_REQUEST, INVALID_COMMAND); + return USB_FAIL; + } + + pmsc->blk_addr = cmd[2] << 24 | cmd[3] << 16 | cmd[4] << 8 | cmd[5]; + pmsc->blk_len = cmd[7] << 8 | cmd[8]; + + if(bot_scsi_check_address(udev, lun, pmsc->blk_addr, pmsc->blk_len) != USB_OK) + { + return USB_FAIL; + } + + pmsc->blk_addr *= pmsc->blk_size[lun]; + pmsc->blk_len *= pmsc->blk_size[lun]; + + if(pmsc->cbw_struct.dCBWDataTransferLength != pmsc->blk_len) + { + bot_scsi_sense_code(udev, SENSE_KEY_ILLEGAL_REQUEST, INVALID_COMMAND); + return USB_FAIL; + } + + pmsc->msc_state = MSC_STATE_MACHINE_DATA_OUT; + len = MIN(pmsc->blk_len, MSC_MAX_DATA_BUF_LEN); + usbd_ept_recv(pudev, USBD_MSC_BULK_OUT_EPT, (uint8_t *)pmsc->data, len); + + } + else + { + len = MIN(pmsc->blk_len, MSC_MAX_DATA_BUF_LEN); + if(msc_disk_write(lun, pmsc->blk_addr, pmsc->data, len) != USB_OK) + { + bot_scsi_sense_code(udev, SENSE_KEY_HARDWARE_ERROR, MEDIUM_NOT_PRESENT); + return USB_FAIL; + } + + pmsc->blk_addr += len; + pmsc->blk_len -= len; + + pmsc->csw_struct.dCSWDataResidue -= len; + + if(pmsc->blk_len == 0) + { + bot_scsi_send_csw(udev, CSW_BCSWSTATUS_PASS); + } + else + { + len = MIN(pmsc->blk_len, MSC_MAX_DATA_BUF_LEN); + usbd_ept_recv(pudev, USBD_MSC_BULK_OUT_EPT, (uint8_t *)pmsc->data, len); + } + } + return USB_OK; +} + +/** + * @brief clear feature + * @param udev: to the structure of usbd_core_type + * @param etp_num: endpoint number + * @retval status of usb_sts_type + */ +void bot_scsi_clear_feature(void *udev, uint8_t ept_num) +{ + usbd_core_type *pudev = (usbd_core_type *)udev; + cdc_msc_struct_type *pmsc = (cdc_msc_struct_type *)pudev->class_handler->pdata; + if(pmsc->bot_status == MSC_BOT_STATE_ERROR) + { + usbd_set_stall(pudev, USBD_MSC_BULK_IN_EPT); + pmsc->bot_status = MSC_BOT_STATE_IDLE; + } + else if(((ept_num & 0x80) == 0x80) && (pmsc->bot_status != MSC_BOT_STATE_RECOVERY)) + { + bot_scsi_send_csw(udev, CSW_BCSWSTATUS_FAILED); + } +} + +/** + * @brief bulk-only transport scsi command process + * @param udev: to the structure of usbd_core_type + * @retval status of usb_sts_type + */ +usb_sts_type bot_scsi_cmd_process(void *udev) +{ + usb_sts_type status = USB_FAIL; + usbd_core_type *pudev = (usbd_core_type *)udev; + cdc_msc_struct_type *pmsc = (cdc_msc_struct_type *)pudev->class_handler->pdata; + switch(pmsc->cbw_struct.CBWCB[0]) + { + case MSC_CMD_INQUIRY: + status = bot_scsi_inquiry(udev, pmsc->cbw_struct.bCBWLUN); + break; + + case MSC_CMD_START_STOP: + status = bot_scsi_start_stop(udev, pmsc->cbw_struct.bCBWLUN); + break; + + case MSC_CMD_MODE_SENSE6: + status = bot_scsi_mode_sense6(udev, pmsc->cbw_struct.bCBWLUN); + break; + + case MSC_CMD_MODE_SENSE10: + status = bot_scsi_mode_sense10(udev, pmsc->cbw_struct.bCBWLUN); + break; + + case MSC_CMD_ALLOW_MEDIUM_REMOVAL: + status = bot_scsi_allow_medium_removal(udev, pmsc->cbw_struct.bCBWLUN); + break; + + case MSC_CMD_READ_10: + status = bot_scsi_read10(udev, pmsc->cbw_struct.bCBWLUN); + break; + + case MSC_CMD_READ_CAPACITY: + status = bot_scsi_capacity(udev, pmsc->cbw_struct.bCBWLUN); + break; + + case MSC_CMD_REQUEST_SENSE: + status = bot_scsi_request_sense(udev, pmsc->cbw_struct.bCBWLUN); + break; + + case MSC_CMD_TEST_UNIT: + status = bot_scsi_test_unit(udev, pmsc->cbw_struct.bCBWLUN); + break; + + case MSC_CMD_VERIFY: + status = bot_scsi_verify(udev, pmsc->cbw_struct.bCBWLUN); + break; + + case MSC_CMD_WRITE_10: + status = bot_scsi_write10(udev, pmsc->cbw_struct.bCBWLUN); + break; + + case MSC_CMD_READ_FORMAT_CAPACITY: + status = bot_scsi_format_capacity(udev, pmsc->cbw_struct.bCBWLUN); + break; + + default: + bot_scsi_sense_code(udev, SENSE_KEY_ILLEGAL_REQUEST, INVALID_COMMAND); + status = USB_FAIL; + break; + } + return status; +} + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ diff --git a/middlewares/usbd_class/custom_hid/custom_hid_class.c b/middlewares/usbd_class/custom_hid/custom_hid_class.c index 315db555..453cb6b7 100644 --- a/middlewares/usbd_class/custom_hid/custom_hid_class.c +++ b/middlewares/usbd_class/custom_hid/custom_hid_class.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file custom_hid_class.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb custom hid class type ************************************************************************** * Copyright notice & Disclaimer diff --git a/middlewares/usbd_class/custom_hid/custom_hid_class.h b/middlewares/usbd_class/custom_hid/custom_hid_class.h index fa2029ff..d5773e0b 100644 --- a/middlewares/usbd_class/custom_hid/custom_hid_class.h +++ b/middlewares/usbd_class/custom_hid/custom_hid_class.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file custom_hid_class.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb hid header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/middlewares/usbd_class/custom_hid/custom_hid_desc.c b/middlewares/usbd_class/custom_hid/custom_hid_desc.c index 6c550939..35bba052 100644 --- a/middlewares/usbd_class/custom_hid/custom_hid_desc.c +++ b/middlewares/usbd_class/custom_hid/custom_hid_desc.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file custom_hid_desc.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb hid device descriptor ************************************************************************** * Copyright notice & Disclaimer diff --git a/middlewares/usbd_class/custom_hid/custom_hid_desc.h b/middlewares/usbd_class/custom_hid/custom_hid_desc.h index 62107002..2172c8da 100644 --- a/middlewares/usbd_class/custom_hid/custom_hid_desc.h +++ b/middlewares/usbd_class/custom_hid/custom_hid_desc.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file custom_hid_desc.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb custom hid descriptor header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/middlewares/usbd_class/hid_iap/hid_iap_class.c b/middlewares/usbd_class/hid_iap/hid_iap_class.c index 3a8f0f40..483d159f 100644 --- a/middlewares/usbd_class/hid_iap/hid_iap_class.c +++ b/middlewares/usbd_class/hid_iap/hid_iap_class.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file hid_iap_class.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb hid iap class type ************************************************************************** * Copyright notice & Disclaimer diff --git a/middlewares/usbd_class/hid_iap/hid_iap_class.h b/middlewares/usbd_class/hid_iap/hid_iap_class.h index 5de2d822..0195c75b 100644 --- a/middlewares/usbd_class/hid_iap/hid_iap_class.h +++ b/middlewares/usbd_class/hid_iap/hid_iap_class.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file hid_iap_class.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb hid iap header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/middlewares/usbd_class/hid_iap/hid_iap_desc.c b/middlewares/usbd_class/hid_iap/hid_iap_desc.c index 8ce94184..b5d8bdd4 100644 --- a/middlewares/usbd_class/hid_iap/hid_iap_desc.c +++ b/middlewares/usbd_class/hid_iap/hid_iap_desc.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file hid_iap_desc.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb hid iap device descriptor ************************************************************************** * Copyright notice & Disclaimer diff --git a/middlewares/usbd_class/hid_iap/hid_iap_desc.h b/middlewares/usbd_class/hid_iap/hid_iap_desc.h index 3ea06c3e..9cd09951 100644 --- a/middlewares/usbd_class/hid_iap/hid_iap_desc.h +++ b/middlewares/usbd_class/hid_iap/hid_iap_desc.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file hid_iap_desc.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb hid iap descriptor header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/middlewares/usbd_class/keyboard/keyboard_class.c b/middlewares/usbd_class/keyboard/keyboard_class.c index 13510e30..6d0d665b 100644 --- a/middlewares/usbd_class/keyboard/keyboard_class.c +++ b/middlewares/usbd_class/keyboard/keyboard_class.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file keyboard_class.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb hid keyboard class type ************************************************************************** * Copyright notice & Disclaimer diff --git a/middlewares/usbd_class/keyboard/keyboard_class.h b/middlewares/usbd_class/keyboard/keyboard_class.h index bebc72bb..c3382501 100644 --- a/middlewares/usbd_class/keyboard/keyboard_class.h +++ b/middlewares/usbd_class/keyboard/keyboard_class.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file keyboard_class.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb hid keyboard header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/middlewares/usbd_class/keyboard/keyboard_desc.c b/middlewares/usbd_class/keyboard/keyboard_desc.c index 4e0a4b7d..e2be6487 100644 --- a/middlewares/usbd_class/keyboard/keyboard_desc.c +++ b/middlewares/usbd_class/keyboard/keyboard_desc.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file keyboard_desc.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb hid keyboard device descriptor ************************************************************************** * Copyright notice & Disclaimer diff --git a/middlewares/usbd_class/keyboard/keyboard_desc.h b/middlewares/usbd_class/keyboard/keyboard_desc.h index 3608fa77..9958bb07 100644 --- a/middlewares/usbd_class/keyboard/keyboard_desc.h +++ b/middlewares/usbd_class/keyboard/keyboard_desc.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file keyboard_desc.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb keyboard descriptor header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/middlewares/usbd_class/mouse/mouse_class.c b/middlewares/usbd_class/mouse/mouse_class.c index 47c402f6..ce9898ed 100644 --- a/middlewares/usbd_class/mouse/mouse_class.c +++ b/middlewares/usbd_class/mouse/mouse_class.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file mouse_class.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb hid mouse class type ************************************************************************** * Copyright notice & Disclaimer diff --git a/middlewares/usbd_class/mouse/mouse_class.h b/middlewares/usbd_class/mouse/mouse_class.h index a706f836..1afdc90f 100644 --- a/middlewares/usbd_class/mouse/mouse_class.h +++ b/middlewares/usbd_class/mouse/mouse_class.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file mouse_class.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb hid mouse header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/middlewares/usbd_class/mouse/mouse_desc.c b/middlewares/usbd_class/mouse/mouse_desc.c index 57441a75..5a225304 100644 --- a/middlewares/usbd_class/mouse/mouse_desc.c +++ b/middlewares/usbd_class/mouse/mouse_desc.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file mouse_desc.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb hid mouse device descriptor ************************************************************************** * Copyright notice & Disclaimer diff --git a/middlewares/usbd_class/mouse/mouse_desc.h b/middlewares/usbd_class/mouse/mouse_desc.h index 8d77a68f..ef9e4f1a 100644 --- a/middlewares/usbd_class/mouse/mouse_desc.h +++ b/middlewares/usbd_class/mouse/mouse_desc.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file mouse_desc.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb mouse descriptor header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/middlewares/usbd_class/msc/msc_bot_scsi.c b/middlewares/usbd_class/msc/msc_bot_scsi.c index 8704ae00..e6ced631 100644 --- a/middlewares/usbd_class/msc/msc_bot_scsi.c +++ b/middlewares/usbd_class/msc/msc_bot_scsi.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file msc_bot_scsi.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb mass storage bulk-only transport and scsi command ************************************************************************** * Copyright notice & Disclaimer diff --git a/middlewares/usbd_class/msc/msc_bot_scsi.h b/middlewares/usbd_class/msc/msc_bot_scsi.h index 95c31b54..cf8cdbae 100644 --- a/middlewares/usbd_class/msc/msc_bot_scsi.h +++ b/middlewares/usbd_class/msc/msc_bot_scsi.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file msc_bot_scsi.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb mass storage bulk-only transport and scsi command header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/middlewares/usbd_class/msc/msc_class.c b/middlewares/usbd_class/msc/msc_class.c index 8acbec86..a9464d61 100644 --- a/middlewares/usbd_class/msc/msc_class.c +++ b/middlewares/usbd_class/msc/msc_class.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file msc_class.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb msc class type ************************************************************************** * Copyright notice & Disclaimer diff --git a/middlewares/usbd_class/msc/msc_class.h b/middlewares/usbd_class/msc/msc_class.h index fedb43e8..f73167bb 100644 --- a/middlewares/usbd_class/msc/msc_class.h +++ b/middlewares/usbd_class/msc/msc_class.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file msc_class.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb msc class file ************************************************************************** * Copyright notice & Disclaimer diff --git a/middlewares/usbd_class/msc/msc_desc.c b/middlewares/usbd_class/msc/msc_desc.c index b5e7c064..8ca40d79 100644 --- a/middlewares/usbd_class/msc/msc_desc.c +++ b/middlewares/usbd_class/msc/msc_desc.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file msc_desc.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb msc device descriptor ************************************************************************** * Copyright notice & Disclaimer diff --git a/middlewares/usbd_class/msc/msc_desc.h b/middlewares/usbd_class/msc/msc_desc.h index 1ab1f595..96441b64 100644 --- a/middlewares/usbd_class/msc/msc_desc.h +++ b/middlewares/usbd_class/msc/msc_desc.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file msc_desc.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb msc descriptor header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/middlewares/usbd_class/printer/printer_class.c b/middlewares/usbd_class/printer/printer_class.c index b34d039a..93550d52 100644 --- a/middlewares/usbd_class/printer/printer_class.c +++ b/middlewares/usbd_class/printer/printer_class.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file printer_class.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb printer class type ************************************************************************** * Copyright notice & Disclaimer diff --git a/middlewares/usbd_class/printer/printer_class.h b/middlewares/usbd_class/printer/printer_class.h index 2d55a1f6..b5409f4d 100644 --- a/middlewares/usbd_class/printer/printer_class.h +++ b/middlewares/usbd_class/printer/printer_class.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file printer_class.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb cdc class file ************************************************************************** * Copyright notice & Disclaimer diff --git a/middlewares/usbd_class/printer/printer_desc.c b/middlewares/usbd_class/printer/printer_desc.c index c021850b..75869e2b 100644 --- a/middlewares/usbd_class/printer/printer_desc.c +++ b/middlewares/usbd_class/printer/printer_desc.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file printer_desc.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb printer device descriptor ************************************************************************** * Copyright notice & Disclaimer diff --git a/middlewares/usbd_class/printer/printer_desc.h b/middlewares/usbd_class/printer/printer_desc.h index 6dafa91d..fd0f5805 100644 --- a/middlewares/usbd_class/printer/printer_desc.h +++ b/middlewares/usbd_class/printer/printer_desc.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file printer_desc.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb printer descriptor header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/middlewares/usbh_class/usbh_hid/usbh_hid_class.c b/middlewares/usbh_class/usbh_hid/usbh_hid_class.c index 6da906c9..732744e8 100644 --- a/middlewares/usbh_class/usbh_hid/usbh_hid_class.c +++ b/middlewares/usbh_class/usbh_hid/usbh_hid_class.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file usbh_hid_class.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb host hid class type ************************************************************************** * Copyright notice & Disclaimer diff --git a/middlewares/usbh_class/usbh_hid/usbh_hid_class.h b/middlewares/usbh_class/usbh_hid/usbh_hid_class.h index 1da42c5c..1ad05f6f 100644 --- a/middlewares/usbh_class/usbh_hid/usbh_hid_class.h +++ b/middlewares/usbh_class/usbh_hid/usbh_hid_class.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file usbh_hid_class.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb host hid class header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/middlewares/usbh_class/usbh_hid/usbh_hid_keyboard.c b/middlewares/usbh_class/usbh_hid/usbh_hid_keyboard.c index f8c826a6..6e04eaee 100644 --- a/middlewares/usbh_class/usbh_hid/usbh_hid_keyboard.c +++ b/middlewares/usbh_class/usbh_hid/usbh_hid_keyboard.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file usbh_hid_keyboard.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb host hid keyboard type ************************************************************************** * Copyright notice & Disclaimer diff --git a/middlewares/usbh_class/usbh_hid/usbh_hid_keyboard.h b/middlewares/usbh_class/usbh_hid/usbh_hid_keyboard.h index f8dc5d05..6ff803e3 100644 --- a/middlewares/usbh_class/usbh_hid/usbh_hid_keyboard.h +++ b/middlewares/usbh_class/usbh_hid/usbh_hid_keyboard.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file usbh_hid_keyboard.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb host hid keyboard header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/middlewares/usbh_class/usbh_hid/usbh_hid_mouse.c b/middlewares/usbh_class/usbh_hid/usbh_hid_mouse.c index fcd08da8..b3bfe275 100644 --- a/middlewares/usbh_class/usbh_hid/usbh_hid_mouse.c +++ b/middlewares/usbh_class/usbh_hid/usbh_hid_mouse.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file usbh_hid_mouse.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb host hid mouse type ************************************************************************** * Copyright notice & Disclaimer diff --git a/middlewares/usbh_class/usbh_hid/usbh_hid_mouse.h b/middlewares/usbh_class/usbh_hid/usbh_hid_mouse.h index f4653044..9825f176 100644 --- a/middlewares/usbh_class/usbh_hid/usbh_hid_mouse.h +++ b/middlewares/usbh_class/usbh_hid/usbh_hid_mouse.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file usbh_hid_mouse.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb host hid mouse header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/middlewares/usbh_class/usbh_msc/usbh_msc_bot_scsi.c b/middlewares/usbh_class/usbh_msc/usbh_msc_bot_scsi.c index 0e742ef8..6a36fd48 100644 --- a/middlewares/usbh_class/usbh_msc/usbh_msc_bot_scsi.c +++ b/middlewares/usbh_class/usbh_msc/usbh_msc_bot_scsi.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file usbh_msc_bot_scsi.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb host msc bulk-only transfer and scsi type ************************************************************************** * Copyright notice & Disclaimer @@ -405,6 +405,7 @@ usb_sts_type usbh_msc_bot_scsi_get_inquiry(void *uhost, msc_bot_trans_type *bot { case CMD_STATE_SEND: usbh_bot_cbw(&bot_trans->cbw, MSC_INQUIRY_DATA_LEN, MSC_INQUIRY_CMD_LEN, MSC_CBW_FLAG_IN); + bot_trans->cbw.bCBWLUN = lun; usbh_cmd_inquiry(bot_trans, bot_trans->cbw.CBWCB, lun); bot_trans->cmd_state = CMD_STATE_WAIT; bot_trans->bot_state = BOT_STATE_SEND_CBW; @@ -443,6 +444,7 @@ usb_sts_type usbh_msc_bot_scsi_capacity(void *uhost, msc_bot_trans_type *bot_tra { case CMD_STATE_SEND: usbh_bot_cbw(&bot_trans->cbw, MSC_CAPACITY10_DATA_LEN, MSC_CAPACITY10_CMD_LEN, MSC_CBW_FLAG_IN); + bot_trans->cbw.bCBWLUN = lun; usbh_cmd_capacity10(bot_trans, bot_trans->cbw.CBWCB, lun); bot_trans->cmd_state = CMD_STATE_WAIT; bot_trans->bot_state = BOT_STATE_SEND_CBW; @@ -484,6 +486,7 @@ usb_sts_type usbh_msc_bot_scsi_test_unit_ready(void *uhost, msc_bot_trans_type * case CMD_STATE_SEND: usbh_bot_cbw(&bot_trans->cbw, MSC_TEST_UNIT_READY_DATA_LEN, MSC_TEST_UNIT_READY_CMD_LEN, MSC_CBW_FLAG_OUT); + bot_trans->cbw.bCBWLUN = lun; usbh_cmd_test_unit_ready(bot_trans, bot_trans->cbw.CBWCB, lun); bot_trans->cmd_state = CMD_STATE_WAIT; bot_trans->bot_state = BOT_STATE_SEND_CBW; @@ -522,6 +525,7 @@ usb_sts_type usbh_msc_bot_scsi_request_sense(void *uhost, msc_bot_trans_type *bo case CMD_STATE_SEND: usbh_bot_cbw(&bot_trans->cbw, MSC_REQUEST_SENSE_DATA_LEN, MSC_REQUEST_SENSE_CMD_LEN, MSC_CBW_FLAG_IN); + bot_trans->cbw.bCBWLUN = lun; usbh_cmd_requset_sense(bot_trans, bot_trans->cbw.CBWCB, lun); bot_trans->cmd_state = CMD_STATE_WAIT; bot_trans->bot_state = BOT_STATE_SEND_CBW; @@ -564,6 +568,7 @@ usb_sts_type usbh_msc_bot_scsi_write(void *uhost, msc_bot_trans_type *bot_trans, case CMD_STATE_SEND: usbh_bot_cbw(&bot_trans->cbw, write_len * 512, MSC_WRITE_CMD_LEN, MSC_CBW_FLAG_OUT); + bot_trans->cbw.bCBWLUN = lun; usbh_cmd_write(bot_trans, bot_trans->cbw.CBWCB, lun, write_len, address, write_data); bot_trans->cmd_state = CMD_STATE_WAIT; bot_trans->bot_state = BOT_STATE_SEND_CBW; @@ -606,6 +611,7 @@ usb_sts_type usbh_msc_bot_scsi_read(void *uhost, msc_bot_trans_type *bot_trans, case CMD_STATE_SEND: usbh_bot_cbw(&bot_trans->cbw, read_len * 512, MSC_READ_CMD_LEN, MSC_CBW_FLAG_IN); + bot_trans->cbw.bCBWLUN = lun; usbh_cmd_read(bot_trans, bot_trans->cbw.CBWCB, lun, read_len, address, read_data); bot_trans->cmd_state = CMD_STATE_WAIT; bot_trans->bot_state = BOT_STATE_SEND_CBW; diff --git a/middlewares/usbh_class/usbh_msc/usbh_msc_bot_scsi.h b/middlewares/usbh_class/usbh_msc/usbh_msc_bot_scsi.h index b4397cdd..ca90c2ce 100644 --- a/middlewares/usbh_class/usbh_msc/usbh_msc_bot_scsi.h +++ b/middlewares/usbh_class/usbh_msc/usbh_msc_bot_scsi.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file usbh_msc_bot_scsi.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb host msc bulk-only transfer and scsi header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/middlewares/usbh_class/usbh_msc/usbh_msc_class.c b/middlewares/usbh_class/usbh_msc/usbh_msc_class.c index 340a0494..863ec5db 100644 --- a/middlewares/usbh_class/usbh_msc/usbh_msc_class.c +++ b/middlewares/usbh_class/usbh_msc/usbh_msc_class.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file usbh_msc_class.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb host msc class type ************************************************************************** * Copyright notice & Disclaimer @@ -261,7 +261,6 @@ static usb_sts_type uhost_process_handler(void *uhost) USBH_DEBUG("Block num: %d ", pmsc->l_unit_n[pmsc->cur_lun].capacity.blk_nbr); USBH_DEBUG("Block size: %d Byte", pmsc->l_unit_n[pmsc->cur_lun].capacity.blk_size); pmsc->l_unit_n[pmsc->cur_lun].state = USBH_MSC_IDLE; - pmsc->state = USBH_MSC_IDLE; pmsc->cur_lun ++; } else if(status == USB_FAIL) @@ -289,6 +288,11 @@ static usb_sts_type uhost_process_handler(void *uhost) default: break; } + + } + else + { + pmsc->state = USBH_MSC_IDLE; } break; case USBH_MSC_IDLE: diff --git a/middlewares/usbh_class/usbh_msc/usbh_msc_class.h b/middlewares/usbh_class/usbh_msc/usbh_msc_class.h index 5d98add7..8fabff2f 100644 --- a/middlewares/usbh_class/usbh_msc/usbh_msc_class.h +++ b/middlewares/usbh_class/usbh_msc/usbh_msc_class.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file usbh_msc_class.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb host msc class header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at32f435_437_board/at32f435_437_board.c b/project/at32f435_437_board/at32f435_437_board.c index b3fca309..a6db156b 100644 --- a/project/at32f435_437_board/at32f435_437_board.c +++ b/project/at32f435_437_board/at32f435_437_board.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_board.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief set of firmware functions to manage leds and push-button. * initialize delay function. ************************************************************************** @@ -269,7 +269,7 @@ void at32_led_off(led_type led) } /** - * @brief turns selected led tooggle. + * @brief turns selected led toggle. * @param led: specifies the led to be set off. * this parameter can be one of following parameters: * @arg LED2 diff --git a/project/at32f435_437_board/at32f435_437_board.h b/project/at32f435_437_board/at32f435_437_board.h index 9fb7e887..67cd1ac3 100644 --- a/project/at32f435_437_board/at32f435_437_board.h +++ b/project/at32f435_437_board/at32f435_437_board.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_board.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file for at-start board. set of firmware functions to * manage leds and push-button. initialize delay function. ************************************************************************** diff --git a/project/at_start_f435/examples/acc/calibration/inc/at32f435_437_clock.h b/project/at_start_f435/examples/acc/calibration/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/acc/calibration/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/acc/calibration/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/acc/calibration/inc/at32f435_437_conf.h b/project/at_start_f435/examples/acc/calibration/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/acc/calibration/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/acc/calibration/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/acc/calibration/inc/at32f435_437_int.h b/project/at_start_f435/examples/acc/calibration/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/acc/calibration/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/acc/calibration/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/acc/calibration/inc/usb_conf.h b/project/at_start_f435/examples/acc/calibration/inc/usb_conf.h index ae04b5ec..2bb88c19 100644 --- a/project/at_start_f435/examples/acc/calibration/inc/usb_conf.h +++ b/project/at_start_f435/examples/acc/calibration/inc/usb_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file usb_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/acc/calibration/readme.txt b/project/at_start_f435/examples/acc/calibration/readme.txt index 315171ac..277fe419 100644 --- a/project/at_start_f435/examples/acc/calibration/readme.txt +++ b/project/at_start_f435/examples/acc/calibration/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c b/project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/acc/calibration/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c b/project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c index 882b3a07..ac403413 100644 --- a/project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/acc/calibration/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/acc/calibration/src/main.c b/project/at_start_f435/examples/acc/calibration/src/main.c index a1738aa4..9e196c2a 100644 --- a/project/at_start_f435/examples/acc/calibration/src/main.c +++ b/project/at_start_f435/examples/acc/calibration/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/inc/at32f435_437_clock.h b/project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/inc/at32f435_437_conf.h b/project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/inc/at32f435_437_int.h b/project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/readme.txt b/project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/readme.txt index 6c8f148b..279a85bc 100644 --- a/project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/readme.txt +++ b/project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/src/at32f435_437_clock.c b/project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/src/at32f435_437_int.c b/project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/src/at32f435_437_int.c index 86479fef..f4b30cf8 100644 --- a/project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/src/main.c b/project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/src/main.c index 687449a0..d09dc766 100644 --- a/project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/src/main.c +++ b/project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma3/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma4/inc/at32f435_437_clock.h b/project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma4/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma4/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma4/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma4/inc/at32f435_437_conf.h b/project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma4/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma4/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma4/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma4/inc/at32f435_437_int.h b/project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma4/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma4/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma4/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma4/readme.txt b/project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma4/readme.txt index fdf718d3..84a7528e 100644 --- a/project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma4/readme.txt +++ b/project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma4/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma4/src/at32f435_437_clock.c b/project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma4/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma4/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma4/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma4/src/at32f435_437_int.c b/project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma4/src/at32f435_437_int.c index 92b499e6..c2032b54 100644 --- a/project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma4/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma4/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma4/src/main.c b/project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma4/src/main.c index 411bf4f3..df7618e9 100644 --- a/project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma4/src/main.c +++ b/project/at_start_f435/examples/adc/combine_mode_ordinary_shift_twoslave_dma4/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_oneslave_dma2/inc/at32f435_437_clock.h b/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_oneslave_dma2/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_oneslave_dma2/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_oneslave_dma2/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_oneslave_dma2/inc/at32f435_437_conf.h b/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_oneslave_dma2/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_oneslave_dma2/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_oneslave_dma2/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_oneslave_dma2/inc/at32f435_437_int.h b/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_oneslave_dma2/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_oneslave_dma2/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_oneslave_dma2/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_oneslave_dma2/readme.txt b/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_oneslave_dma2/readme.txt index 311254cf..ad59b326 100644 --- a/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_oneslave_dma2/readme.txt +++ b/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_oneslave_dma2/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_oneslave_dma2/src/at32f435_437_clock.c b/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_oneslave_dma2/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_oneslave_dma2/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_oneslave_dma2/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_oneslave_dma2/src/at32f435_437_int.c b/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_oneslave_dma2/src/at32f435_437_int.c index ff585327..06aeb35a 100644 --- a/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_oneslave_dma2/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_oneslave_dma2/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_oneslave_dma2/src/main.c b/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_oneslave_dma2/src/main.c index 26215b88..f8e7f086 100644 --- a/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_oneslave_dma2/src/main.c +++ b/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_oneslave_dma2/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_oneslave_edma/inc/at32f435_437_clock.h b/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_oneslave_edma/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_oneslave_edma/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_oneslave_edma/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_oneslave_edma/inc/at32f435_437_conf.h b/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_oneslave_edma/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_oneslave_edma/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_oneslave_edma/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_oneslave_edma/inc/at32f435_437_int.h b/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_oneslave_edma/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_oneslave_edma/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_oneslave_edma/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_oneslave_edma/readme.txt b/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_oneslave_edma/readme.txt index 65e34094..d0453750 100644 --- a/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_oneslave_edma/readme.txt +++ b/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_oneslave_edma/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_oneslave_edma/src/at32f435_437_clock.c b/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_oneslave_edma/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_oneslave_edma/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_oneslave_edma/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_oneslave_edma/src/at32f435_437_int.c b/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_oneslave_edma/src/at32f435_437_int.c index 4654c7c8..01f7d45c 100644 --- a/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_oneslave_edma/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_oneslave_edma/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_oneslave_edma/src/main.c b/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_oneslave_edma/src/main.c index 8a663443..6943c57e 100644 --- a/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_oneslave_edma/src/main.c +++ b/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_oneslave_edma/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_twoslave_dma1/inc/at32f435_437_clock.h b/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_twoslave_dma1/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_twoslave_dma1/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_twoslave_dma1/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_twoslave_dma1/inc/at32f435_437_conf.h b/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_twoslave_dma1/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_twoslave_dma1/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_twoslave_dma1/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_twoslave_dma1/inc/at32f435_437_int.h b/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_twoslave_dma1/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_twoslave_dma1/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_twoslave_dma1/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_twoslave_dma1/readme.txt b/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_twoslave_dma1/readme.txt index b02347d7..53bfc429 100644 --- a/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_twoslave_dma1/readme.txt +++ b/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_twoslave_dma1/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_twoslave_dma1/src/at32f435_437_clock.c b/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_twoslave_dma1/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_twoslave_dma1/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_twoslave_dma1/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_twoslave_dma1/src/at32f435_437_int.c b/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_twoslave_dma1/src/at32f435_437_int.c index 8db16998..1acdbcb1 100644 --- a/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_twoslave_dma1/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_twoslave_dma1/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_twoslave_dma1/src/main.c b/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_twoslave_dma1/src/main.c index 9478455b..0e3ba615 100644 --- a/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_twoslave_dma1/src/main.c +++ b/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_twoslave_dma1/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_twoslave_dma5/inc/at32f435_437_clock.h b/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_twoslave_dma5/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_twoslave_dma5/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_twoslave_dma5/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_twoslave_dma5/inc/at32f435_437_conf.h b/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_twoslave_dma5/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_twoslave_dma5/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_twoslave_dma5/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_twoslave_dma5/inc/at32f435_437_int.h b/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_twoslave_dma5/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_twoslave_dma5/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_twoslave_dma5/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_twoslave_dma5/readme.txt b/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_twoslave_dma5/readme.txt index fae4f823..8818354f 100644 --- a/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_twoslave_dma5/readme.txt +++ b/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_twoslave_dma5/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_twoslave_dma5/src/at32f435_437_clock.c b/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_twoslave_dma5/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_twoslave_dma5/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_twoslave_dma5/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_twoslave_dma5/src/at32f435_437_int.c b/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_twoslave_dma5/src/at32f435_437_int.c index ea0d233d..09818521 100644 --- a/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_twoslave_dma5/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_twoslave_dma5/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_twoslave_dma5/src/main.c b/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_twoslave_dma5/src/main.c index 11577af1..560dc054 100644 --- a/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_twoslave_dma5/src/main.c +++ b/project/at_start_f435/examples/adc/combine_mode_ordinary_smlt_twoslave_dma5/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/combine_mode_preempt_interltrig_twoslave/inc/at32f435_437_clock.h b/project/at_start_f435/examples/adc/combine_mode_preempt_interltrig_twoslave/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/adc/combine_mode_preempt_interltrig_twoslave/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/adc/combine_mode_preempt_interltrig_twoslave/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/combine_mode_preempt_interltrig_twoslave/inc/at32f435_437_conf.h b/project/at_start_f435/examples/adc/combine_mode_preempt_interltrig_twoslave/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/adc/combine_mode_preempt_interltrig_twoslave/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/adc/combine_mode_preempt_interltrig_twoslave/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/combine_mode_preempt_interltrig_twoslave/inc/at32f435_437_int.h b/project/at_start_f435/examples/adc/combine_mode_preempt_interltrig_twoslave/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/adc/combine_mode_preempt_interltrig_twoslave/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/adc/combine_mode_preempt_interltrig_twoslave/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/combine_mode_preempt_interltrig_twoslave/readme.txt b/project/at_start_f435/examples/adc/combine_mode_preempt_interltrig_twoslave/readme.txt index 416b1a8b..be60ae31 100644 --- a/project/at_start_f435/examples/adc/combine_mode_preempt_interltrig_twoslave/readme.txt +++ b/project/at_start_f435/examples/adc/combine_mode_preempt_interltrig_twoslave/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/adc/combine_mode_preempt_interltrig_twoslave/src/at32f435_437_clock.c b/project/at_start_f435/examples/adc/combine_mode_preempt_interltrig_twoslave/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/adc/combine_mode_preempt_interltrig_twoslave/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/adc/combine_mode_preempt_interltrig_twoslave/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/combine_mode_preempt_interltrig_twoslave/src/at32f435_437_int.c b/project/at_start_f435/examples/adc/combine_mode_preempt_interltrig_twoslave/src/at32f435_437_int.c index 1a10123d..8d982369 100644 --- a/project/at_start_f435/examples/adc/combine_mode_preempt_interltrig_twoslave/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/adc/combine_mode_preempt_interltrig_twoslave/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/combine_mode_preempt_interltrig_twoslave/src/main.c b/project/at_start_f435/examples/adc/combine_mode_preempt_interltrig_twoslave/src/main.c index 57c4b855..8d349a66 100644 --- a/project/at_start_f435/examples/adc/combine_mode_preempt_interltrig_twoslave/src/main.c +++ b/project/at_start_f435/examples/adc/combine_mode_preempt_interltrig_twoslave/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/conversion_abort/inc/at32f435_437_clock.h b/project/at_start_f435/examples/adc/conversion_abort/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/adc/conversion_abort/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/adc/conversion_abort/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/conversion_abort/inc/at32f435_437_conf.h b/project/at_start_f435/examples/adc/conversion_abort/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/adc/conversion_abort/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/adc/conversion_abort/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/conversion_abort/inc/at32f435_437_int.h b/project/at_start_f435/examples/adc/conversion_abort/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/adc/conversion_abort/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/adc/conversion_abort/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/conversion_abort/readme.txt b/project/at_start_f435/examples/adc/conversion_abort/readme.txt index bc271141..47c7e44c 100644 --- a/project/at_start_f435/examples/adc/conversion_abort/readme.txt +++ b/project/at_start_f435/examples/adc/conversion_abort/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/adc/conversion_abort/src/at32f435_437_clock.c b/project/at_start_f435/examples/adc/conversion_abort/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/adc/conversion_abort/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/adc/conversion_abort/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/conversion_abort/src/at32f435_437_int.c b/project/at_start_f435/examples/adc/conversion_abort/src/at32f435_437_int.c index 2848b4fe..4dcf2ae6 100644 --- a/project/at_start_f435/examples/adc/conversion_abort/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/adc/conversion_abort/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/conversion_abort/src/main.c b/project/at_start_f435/examples/adc/conversion_abort/src/main.c index dfb090ef..923085d2 100644 --- a/project/at_start_f435/examples/adc/conversion_abort/src/main.c +++ b/project/at_start_f435/examples/adc/conversion_abort/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/current_vref_value_check/inc/at32f435_437_clock.h b/project/at_start_f435/examples/adc/current_vref_value_check/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/adc/current_vref_value_check/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/adc/current_vref_value_check/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/current_vref_value_check/inc/at32f435_437_conf.h b/project/at_start_f435/examples/adc/current_vref_value_check/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/adc/current_vref_value_check/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/adc/current_vref_value_check/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/current_vref_value_check/inc/at32f435_437_int.h b/project/at_start_f435/examples/adc/current_vref_value_check/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/adc/current_vref_value_check/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/adc/current_vref_value_check/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/current_vref_value_check/readme.txt b/project/at_start_f435/examples/adc/current_vref_value_check/readme.txt index 8597dd4b..6f117861 100644 --- a/project/at_start_f435/examples/adc/current_vref_value_check/readme.txt +++ b/project/at_start_f435/examples/adc/current_vref_value_check/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/adc/current_vref_value_check/src/at32f435_437_clock.c b/project/at_start_f435/examples/adc/current_vref_value_check/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/adc/current_vref_value_check/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/adc/current_vref_value_check/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/current_vref_value_check/src/at32f435_437_int.c b/project/at_start_f435/examples/adc/current_vref_value_check/src/at32f435_437_int.c index f55e3439..85e9754e 100644 --- a/project/at_start_f435/examples/adc/current_vref_value_check/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/adc/current_vref_value_check/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/current_vref_value_check/src/main.c b/project/at_start_f435/examples/adc/current_vref_value_check/src/main.c index c3f55031..5b1ea3a0 100644 --- a/project/at_start_f435/examples/adc/current_vref_value_check/src/main.c +++ b/project/at_start_f435/examples/adc/current_vref_value_check/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/edma_double_buffer/inc/at32f435_437_clock.h b/project/at_start_f435/examples/adc/edma_double_buffer/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/adc/edma_double_buffer/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/adc/edma_double_buffer/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/edma_double_buffer/inc/at32f435_437_conf.h b/project/at_start_f435/examples/adc/edma_double_buffer/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/adc/edma_double_buffer/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/adc/edma_double_buffer/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/edma_double_buffer/inc/at32f435_437_int.h b/project/at_start_f435/examples/adc/edma_double_buffer/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/adc/edma_double_buffer/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/adc/edma_double_buffer/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/edma_double_buffer/readme.txt b/project/at_start_f435/examples/adc/edma_double_buffer/readme.txt index 4cf9f643..f5f838f6 100644 --- a/project/at_start_f435/examples/adc/edma_double_buffer/readme.txt +++ b/project/at_start_f435/examples/adc/edma_double_buffer/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/adc/edma_double_buffer/src/at32f435_437_clock.c b/project/at_start_f435/examples/adc/edma_double_buffer/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/adc/edma_double_buffer/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/adc/edma_double_buffer/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/edma_double_buffer/src/at32f435_437_int.c b/project/at_start_f435/examples/adc/edma_double_buffer/src/at32f435_437_int.c index 9ea45d63..3ea27399 100644 --- a/project/at_start_f435/examples/adc/edma_double_buffer/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/adc/edma_double_buffer/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/edma_double_buffer/src/main.c b/project/at_start_f435/examples/adc/edma_double_buffer/src/main.c index f900fb88..cbaac464 100644 --- a/project/at_start_f435/examples/adc/edma_double_buffer/src/main.c +++ b/project/at_start_f435/examples/adc/edma_double_buffer/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/exint_trigger_partitioned/inc/at32f435_437_clock.h b/project/at_start_f435/examples/adc/exint_trigger_partitioned/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/adc/exint_trigger_partitioned/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/adc/exint_trigger_partitioned/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/exint_trigger_partitioned/inc/at32f435_437_conf.h b/project/at_start_f435/examples/adc/exint_trigger_partitioned/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/adc/exint_trigger_partitioned/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/adc/exint_trigger_partitioned/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/exint_trigger_partitioned/inc/at32f435_437_int.h b/project/at_start_f435/examples/adc/exint_trigger_partitioned/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/adc/exint_trigger_partitioned/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/adc/exint_trigger_partitioned/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/exint_trigger_partitioned/readme.txt b/project/at_start_f435/examples/adc/exint_trigger_partitioned/readme.txt index 76286184..cc25086e 100644 --- a/project/at_start_f435/examples/adc/exint_trigger_partitioned/readme.txt +++ b/project/at_start_f435/examples/adc/exint_trigger_partitioned/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/adc/exint_trigger_partitioned/src/at32f435_437_clock.c b/project/at_start_f435/examples/adc/exint_trigger_partitioned/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/adc/exint_trigger_partitioned/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/adc/exint_trigger_partitioned/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/exint_trigger_partitioned/src/at32f435_437_int.c b/project/at_start_f435/examples/adc/exint_trigger_partitioned/src/at32f435_437_int.c index dd808f63..f34e0693 100644 --- a/project/at_start_f435/examples/adc/exint_trigger_partitioned/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/adc/exint_trigger_partitioned/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/exint_trigger_partitioned/src/main.c b/project/at_start_f435/examples/adc/exint_trigger_partitioned/src/main.c index 27ddb64a..25ca1d98 100644 --- a/project/at_start_f435/examples/adc/exint_trigger_partitioned/src/main.c +++ b/project/at_start_f435/examples/adc/exint_trigger_partitioned/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/internal_temperature_sensor/inc/at32f435_437_clock.h b/project/at_start_f435/examples/adc/internal_temperature_sensor/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/adc/internal_temperature_sensor/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/adc/internal_temperature_sensor/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/internal_temperature_sensor/inc/at32f435_437_conf.h b/project/at_start_f435/examples/adc/internal_temperature_sensor/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/adc/internal_temperature_sensor/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/adc/internal_temperature_sensor/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/internal_temperature_sensor/inc/at32f435_437_int.h b/project/at_start_f435/examples/adc/internal_temperature_sensor/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/adc/internal_temperature_sensor/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/adc/internal_temperature_sensor/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/internal_temperature_sensor/readme.txt b/project/at_start_f435/examples/adc/internal_temperature_sensor/readme.txt index 0ae52cd0..ac962ee7 100644 --- a/project/at_start_f435/examples/adc/internal_temperature_sensor/readme.txt +++ b/project/at_start_f435/examples/adc/internal_temperature_sensor/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/adc/internal_temperature_sensor/src/at32f435_437_clock.c b/project/at_start_f435/examples/adc/internal_temperature_sensor/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/adc/internal_temperature_sensor/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/adc/internal_temperature_sensor/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/internal_temperature_sensor/src/at32f435_437_int.c b/project/at_start_f435/examples/adc/internal_temperature_sensor/src/at32f435_437_int.c index 1d53de32..b75c1642 100644 --- a/project/at_start_f435/examples/adc/internal_temperature_sensor/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/adc/internal_temperature_sensor/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/internal_temperature_sensor/src/main.c b/project/at_start_f435/examples/adc/internal_temperature_sensor/src/main.c index 46af5498..37bb026e 100644 --- a/project/at_start_f435/examples/adc/internal_temperature_sensor/src/main.c +++ b/project/at_start_f435/examples/adc/internal_temperature_sensor/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/ordinary_preempt_oversampling/inc/at32f435_437_clock.h b/project/at_start_f435/examples/adc/ordinary_preempt_oversampling/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/adc/ordinary_preempt_oversampling/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/adc/ordinary_preempt_oversampling/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/ordinary_preempt_oversampling/inc/at32f435_437_conf.h b/project/at_start_f435/examples/adc/ordinary_preempt_oversampling/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/adc/ordinary_preempt_oversampling/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/adc/ordinary_preempt_oversampling/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/ordinary_preempt_oversampling/inc/at32f435_437_int.h b/project/at_start_f435/examples/adc/ordinary_preempt_oversampling/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/adc/ordinary_preempt_oversampling/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/adc/ordinary_preempt_oversampling/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/ordinary_preempt_oversampling/readme.txt b/project/at_start_f435/examples/adc/ordinary_preempt_oversampling/readme.txt index 3b25bd60..7aed0fc7 100644 --- a/project/at_start_f435/examples/adc/ordinary_preempt_oversampling/readme.txt +++ b/project/at_start_f435/examples/adc/ordinary_preempt_oversampling/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/adc/ordinary_preempt_oversampling/src/at32f435_437_clock.c b/project/at_start_f435/examples/adc/ordinary_preempt_oversampling/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/adc/ordinary_preempt_oversampling/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/adc/ordinary_preempt_oversampling/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/ordinary_preempt_oversampling/src/at32f435_437_int.c b/project/at_start_f435/examples/adc/ordinary_preempt_oversampling/src/at32f435_437_int.c index d948fd0b..6b1e972b 100644 --- a/project/at_start_f435/examples/adc/ordinary_preempt_oversampling/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/adc/ordinary_preempt_oversampling/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/ordinary_preempt_oversampling/src/main.c b/project/at_start_f435/examples/adc/ordinary_preempt_oversampling/src/main.c index fd244c2e..fc118278 100644 --- a/project/at_start_f435/examples/adc/ordinary_preempt_oversampling/src/main.c +++ b/project/at_start_f435/examples/adc/ordinary_preempt_oversampling/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/resolution_6bit/inc/at32f435_437_clock.h b/project/at_start_f435/examples/adc/resolution_6bit/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/adc/resolution_6bit/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/adc/resolution_6bit/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/resolution_6bit/inc/at32f435_437_conf.h b/project/at_start_f435/examples/adc/resolution_6bit/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/adc/resolution_6bit/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/adc/resolution_6bit/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/resolution_6bit/inc/at32f435_437_int.h b/project/at_start_f435/examples/adc/resolution_6bit/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/adc/resolution_6bit/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/adc/resolution_6bit/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/resolution_6bit/readme.txt b/project/at_start_f435/examples/adc/resolution_6bit/readme.txt index 032d171f..003a3576 100644 --- a/project/at_start_f435/examples/adc/resolution_6bit/readme.txt +++ b/project/at_start_f435/examples/adc/resolution_6bit/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/adc/resolution_6bit/src/at32f435_437_clock.c b/project/at_start_f435/examples/adc/resolution_6bit/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/adc/resolution_6bit/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/adc/resolution_6bit/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/resolution_6bit/src/at32f435_437_int.c b/project/at_start_f435/examples/adc/resolution_6bit/src/at32f435_437_int.c index 0481e0c7..4e924a96 100644 --- a/project/at_start_f435/examples/adc/resolution_6bit/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/adc/resolution_6bit/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/resolution_6bit/src/main.c b/project/at_start_f435/examples/adc/resolution_6bit/src/main.c index 45402533..502bffe1 100644 --- a/project/at_start_f435/examples/adc/resolution_6bit/src/main.c +++ b/project/at_start_f435/examples/adc/resolution_6bit/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/software_trigger_repeat/inc/at32f435_437_clock.h b/project/at_start_f435/examples/adc/software_trigger_repeat/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/adc/software_trigger_repeat/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/adc/software_trigger_repeat/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/software_trigger_repeat/inc/at32f435_437_conf.h b/project/at_start_f435/examples/adc/software_trigger_repeat/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/adc/software_trigger_repeat/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/adc/software_trigger_repeat/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/software_trigger_repeat/inc/at32f435_437_int.h b/project/at_start_f435/examples/adc/software_trigger_repeat/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/adc/software_trigger_repeat/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/adc/software_trigger_repeat/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/software_trigger_repeat/readme.txt b/project/at_start_f435/examples/adc/software_trigger_repeat/readme.txt index fc4a3169..b8a810e0 100644 --- a/project/at_start_f435/examples/adc/software_trigger_repeat/readme.txt +++ b/project/at_start_f435/examples/adc/software_trigger_repeat/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_clock.c b/project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c b/project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c index 0481e0c7..4e924a96 100644 --- a/project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/adc/software_trigger_repeat/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/software_trigger_repeat/src/main.c b/project/at_start_f435/examples/adc/software_trigger_repeat/src/main.c index 8ad1438f..dec04faa 100644 --- a/project/at_start_f435/examples/adc/software_trigger_repeat/src/main.c +++ b/project/at_start_f435/examples/adc/software_trigger_repeat/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/tmr_trigger_automatic_preempted/inc/at32f435_437_clock.h b/project/at_start_f435/examples/adc/tmr_trigger_automatic_preempted/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/adc/tmr_trigger_automatic_preempted/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/adc/tmr_trigger_automatic_preempted/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/tmr_trigger_automatic_preempted/inc/at32f435_437_conf.h b/project/at_start_f435/examples/adc/tmr_trigger_automatic_preempted/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/adc/tmr_trigger_automatic_preempted/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/adc/tmr_trigger_automatic_preempted/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/tmr_trigger_automatic_preempted/inc/at32f435_437_int.h b/project/at_start_f435/examples/adc/tmr_trigger_automatic_preempted/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/adc/tmr_trigger_automatic_preempted/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/adc/tmr_trigger_automatic_preempted/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/tmr_trigger_automatic_preempted/readme.txt b/project/at_start_f435/examples/adc/tmr_trigger_automatic_preempted/readme.txt index 429f7eaa..8d9b5f61 100644 --- a/project/at_start_f435/examples/adc/tmr_trigger_automatic_preempted/readme.txt +++ b/project/at_start_f435/examples/adc/tmr_trigger_automatic_preempted/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/adc/tmr_trigger_automatic_preempted/src/at32f435_437_clock.c b/project/at_start_f435/examples/adc/tmr_trigger_automatic_preempted/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/adc/tmr_trigger_automatic_preempted/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/adc/tmr_trigger_automatic_preempted/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/tmr_trigger_automatic_preempted/src/at32f435_437_int.c b/project/at_start_f435/examples/adc/tmr_trigger_automatic_preempted/src/at32f435_437_int.c index f0b6b6f1..05b49553 100644 --- a/project/at_start_f435/examples/adc/tmr_trigger_automatic_preempted/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/adc/tmr_trigger_automatic_preempted/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/tmr_trigger_automatic_preempted/src/main.c b/project/at_start_f435/examples/adc/tmr_trigger_automatic_preempted/src/main.c index b0c5364f..478af317 100644 --- a/project/at_start_f435/examples/adc/tmr_trigger_automatic_preempted/src/main.c +++ b/project/at_start_f435/examples/adc/tmr_trigger_automatic_preempted/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/use_polling_get_conversion_data/inc/at32f435_437_clock.h b/project/at_start_f435/examples/adc/use_polling_get_conversion_data/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/adc/use_polling_get_conversion_data/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/adc/use_polling_get_conversion_data/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/use_polling_get_conversion_data/inc/at32f435_437_conf.h b/project/at_start_f435/examples/adc/use_polling_get_conversion_data/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/adc/use_polling_get_conversion_data/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/adc/use_polling_get_conversion_data/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/use_polling_get_conversion_data/inc/at32f435_437_int.h b/project/at_start_f435/examples/adc/use_polling_get_conversion_data/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/adc/use_polling_get_conversion_data/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/adc/use_polling_get_conversion_data/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/use_polling_get_conversion_data/readme.txt b/project/at_start_f435/examples/adc/use_polling_get_conversion_data/readme.txt index 10a006de..e4f6424b 100644 --- a/project/at_start_f435/examples/adc/use_polling_get_conversion_data/readme.txt +++ b/project/at_start_f435/examples/adc/use_polling_get_conversion_data/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/adc/use_polling_get_conversion_data/src/at32f435_437_clock.c b/project/at_start_f435/examples/adc/use_polling_get_conversion_data/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/adc/use_polling_get_conversion_data/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/adc/use_polling_get_conversion_data/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/use_polling_get_conversion_data/src/at32f435_437_int.c b/project/at_start_f435/examples/adc/use_polling_get_conversion_data/src/at32f435_437_int.c index 0be5ff56..c5347827 100644 --- a/project/at_start_f435/examples/adc/use_polling_get_conversion_data/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/adc/use_polling_get_conversion_data/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/use_polling_get_conversion_data/src/main.c b/project/at_start_f435/examples/adc/use_polling_get_conversion_data/src/main.c index 9a2e4aff..902156af 100644 --- a/project/at_start_f435/examples/adc/use_polling_get_conversion_data/src/main.c +++ b/project/at_start_f435/examples/adc/use_polling_get_conversion_data/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer @@ -35,8 +35,8 @@ * @{ */ -__IO uint16_t adc1_ordinary_valuetab[4][3] = {0}; -__IO uint16_t *p_adc1_ordinary = adc1_ordinary_valuetab[0]; +__IO uint16_t adc1_ordinary_valuetab[3] = {0}; +__IO uint16_t *p_adc1_ordinary = adc1_ordinary_valuetab; __IO uint32_t adc1_overflow_flag = 0; static void gpio_config(void); @@ -78,7 +78,7 @@ static void adc_config(void) adc_common_struct.combine_mode = ADC_INDEPENDENT_MODE; /* config division,adcclk is division by hclk */ - adc_common_struct.div = ADC_HCLK_DIV_17; + adc_common_struct.div = ADC_HCLK_DIV_4; /* config common dma mode,it's not useful in independent mode */ adc_common_struct.common_dma_mode = ADC_COMMON_DMAMODE_DISABLE; @@ -99,7 +99,7 @@ static void adc_config(void) adc_base_default_para_init(&adc_base_struct); adc_base_struct.sequence_mode = TRUE; - adc_base_struct.repeat_mode = TRUE; + adc_base_struct.repeat_mode = FALSE; adc_base_struct.data_align = ADC_RIGHT_ALIGNMENT; adc_base_struct.ordinary_channel_length = 3; adc_base_config(ADC1, &adc_base_struct); @@ -154,7 +154,7 @@ int main(void) at32_led_off(LED2); at32_led_off(LED3); at32_led_off(LED4); - p_adc1_ordinary = adc1_ordinary_valuetab[0]; + p_adc1_ordinary = adc1_ordinary_valuetab; uart_print_init(115200); gpio_config(); adc_config(); @@ -174,18 +174,16 @@ int main(void) printf("adc1_overflow_flag = %d\r\n",adc1_overflow_flag); while(1); } - if(index > 29) + if(index%3 == 0) { - /* printf data when conversion end without error */ printf("conversion end without error\r\n"); - for(index = 0; index < 10; index++) - { - printf("adc1_ordinary_valuetab[%d][0] = 0x%x\r\n",index, adc1_ordinary_valuetab[index][0]); - printf("adc1_ordinary_valuetab[%d][1] = 0x%x\r\n",index, adc1_ordinary_valuetab[index][1]); - printf("adc1_ordinary_valuetab[%d][2] = 0x%x\r\n",index, adc1_ordinary_valuetab[index][2]); - printf("\r\n"); - } - while(1); + printf("adc1_ordinary_valuetab[0] = 0x%x\r\n", adc1_ordinary_valuetab[0]); + printf("adc1_ordinary_valuetab[1] = 0x%x\r\n", adc1_ordinary_valuetab[1]); + printf("adc1_ordinary_valuetab[2] = 0x%x\r\n", adc1_ordinary_valuetab[2]); + printf("\r\n"); + delay_sec(1); + p_adc1_ordinary = adc1_ordinary_valuetab; + adc_ordinary_software_trigger_enable(ADC1, TRUE); } } } diff --git a/project/at_start_f435/examples/adc/vbat_monitor/inc/at32f435_437_clock.h b/project/at_start_f435/examples/adc/vbat_monitor/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/adc/vbat_monitor/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/adc/vbat_monitor/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/vbat_monitor/inc/at32f435_437_conf.h b/project/at_start_f435/examples/adc/vbat_monitor/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/adc/vbat_monitor/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/adc/vbat_monitor/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/vbat_monitor/inc/at32f435_437_int.h b/project/at_start_f435/examples/adc/vbat_monitor/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/adc/vbat_monitor/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/adc/vbat_monitor/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/vbat_monitor/readme.txt b/project/at_start_f435/examples/adc/vbat_monitor/readme.txt index 1cb3efce..fc462a6c 100644 --- a/project/at_start_f435/examples/adc/vbat_monitor/readme.txt +++ b/project/at_start_f435/examples/adc/vbat_monitor/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/adc/vbat_monitor/src/at32f435_437_clock.c b/project/at_start_f435/examples/adc/vbat_monitor/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/adc/vbat_monitor/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/adc/vbat_monitor/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/vbat_monitor/src/at32f435_437_int.c b/project/at_start_f435/examples/adc/vbat_monitor/src/at32f435_437_int.c index 2c8a905a..4e04e7d7 100644 --- a/project/at_start_f435/examples/adc/vbat_monitor/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/adc/vbat_monitor/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/vbat_monitor/src/main.c b/project/at_start_f435/examples/adc/vbat_monitor/src/main.c index d8392508..7a597d56 100644 --- a/project/at_start_f435/examples/adc/vbat_monitor/src/main.c +++ b/project/at_start_f435/examples/adc/vbat_monitor/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/voltage_monitoring/inc/at32f435_437_clock.h b/project/at_start_f435/examples/adc/voltage_monitoring/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/adc/voltage_monitoring/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/adc/voltage_monitoring/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/voltage_monitoring/inc/at32f435_437_conf.h b/project/at_start_f435/examples/adc/voltage_monitoring/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/adc/voltage_monitoring/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/adc/voltage_monitoring/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/voltage_monitoring/inc/at32f435_437_int.h b/project/at_start_f435/examples/adc/voltage_monitoring/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/adc/voltage_monitoring/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/adc/voltage_monitoring/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/voltage_monitoring/readme.txt b/project/at_start_f435/examples/adc/voltage_monitoring/readme.txt index ce1d95b5..aa2a35f1 100644 --- a/project/at_start_f435/examples/adc/voltage_monitoring/readme.txt +++ b/project/at_start_f435/examples/adc/voltage_monitoring/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/adc/voltage_monitoring/src/at32f435_437_clock.c b/project/at_start_f435/examples/adc/voltage_monitoring/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/adc/voltage_monitoring/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/adc/voltage_monitoring/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/voltage_monitoring/src/at32f435_437_int.c b/project/at_start_f435/examples/adc/voltage_monitoring/src/at32f435_437_int.c index 6883c066..1cfd19fe 100644 --- a/project/at_start_f435/examples/adc/voltage_monitoring/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/adc/voltage_monitoring/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/adc/voltage_monitoring/src/main.c b/project/at_start_f435/examples/adc/voltage_monitoring/src/main.c index 888b2ce5..e5694974 100644 --- a/project/at_start_f435/examples/adc/voltage_monitoring/src/main.c +++ b/project/at_start_f435/examples/adc/voltage_monitoring/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/can/communication_mode/inc/at32f435_437_clock.h b/project/at_start_f435/examples/can/communication_mode/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/can/communication_mode/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/can/communication_mode/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/can/communication_mode/inc/at32f435_437_conf.h b/project/at_start_f435/examples/can/communication_mode/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/can/communication_mode/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/can/communication_mode/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/can/communication_mode/inc/at32f435_437_int.h b/project/at_start_f435/examples/can/communication_mode/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/can/communication_mode/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/can/communication_mode/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/can/communication_mode/readme.txt b/project/at_start_f435/examples/can/communication_mode/readme.txt index 3e0ad015..1f874b16 100644 --- a/project/at_start_f435/examples/can/communication_mode/readme.txt +++ b/project/at_start_f435/examples/can/communication_mode/readme.txt @@ -1,16 +1,16 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ - this demo is based on the at-start board, in this demo, shows how to use - the can normal mode. every 1s transmit one message and the led4 blink,if - receive a message, les2 blink(message id is 0x400) or led3 blink(message id - is not equal to 0x400). + this demo is based on the at-start board and at32-comm-ev, in this demo, + shows how to use the can communication mode. every 1s transmit one message + and the led4 blink, if receive a message, led2 blink(message id is 0x400) or led3 + blink(message id is not equal to 0x400). set-up - can tx ---> pb9 - can rx ---> pb8 diff --git a/project/at_start_f435/examples/can/communication_mode/src/at32f435_437_clock.c b/project/at_start_f435/examples/can/communication_mode/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/can/communication_mode/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/can/communication_mode/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/can/communication_mode/src/at32f435_437_int.c b/project/at_start_f435/examples/can/communication_mode/src/at32f435_437_int.c index 695d298a..e087cfdd 100644 --- a/project/at_start_f435/examples/can/communication_mode/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/can/communication_mode/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/can/communication_mode/src/main.c b/project/at_start_f435/examples/can/communication_mode/src/main.c index b28d80bc..059fc623 100644 --- a/project/at_start_f435/examples/can/communication_mode/src/main.c +++ b/project/at_start_f435/examples/can/communication_mode/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/can/filter/inc/at32f435_437_clock.h b/project/at_start_f435/examples/can/filter/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/can/filter/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/can/filter/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/can/filter/inc/at32f435_437_conf.h b/project/at_start_f435/examples/can/filter/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/can/filter/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/can/filter/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/can/filter/inc/at32f435_437_int.h b/project/at_start_f435/examples/can/filter/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/can/filter/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/can/filter/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/can/filter/readme.txt b/project/at_start_f435/examples/can/filter/readme.txt index 822ea113..acabe7a8 100644 --- a/project/at_start_f435/examples/can/filter/readme.txt +++ b/project/at_start_f435/examples/can/filter/readme.txt @@ -1,17 +1,17 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ - this demo is based on the at-start board, in this demo, shows how to use - the can filter funciton. the can tool transmit 6 specified messages in total - (3 extended-id messages and 3 standard-id messages), when mcu receive one - expect id message, test_result will add one, if test success, only 4 filter - messages will be received, the three leds will toggle. + this demo is based on the at-start board and at32-comm-ev, in this demo, + shows how to use the can filter funciton. the can tool transmit 6 specified + messages in total (3 extended-id messages and 3 standard-id messages), + when mcu receive one expect id message, test_result will add one, if test + success, only 4 filter messages will be received, the three leds will toggle. set-up - can tx ---> pb9 - can rx ---> pb8 diff --git a/project/at_start_f435/examples/can/filter/src/at32f435_437_clock.c b/project/at_start_f435/examples/can/filter/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/can/filter/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/can/filter/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/can/filter/src/at32f435_437_int.c b/project/at_start_f435/examples/can/filter/src/at32f435_437_int.c index 21cf8831..49fae778 100644 --- a/project/at_start_f435/examples/can/filter/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/can/filter/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/can/filter/src/main.c b/project/at_start_f435/examples/can/filter/src/main.c index de5e7c9a..a80e3acc 100644 --- a/project/at_start_f435/examples/can/filter/src/main.c +++ b/project/at_start_f435/examples/can/filter/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/can/loopback_mode/inc/at32f435_437_clock.h b/project/at_start_f435/examples/can/loopback_mode/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/can/loopback_mode/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/can/loopback_mode/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/can/loopback_mode/inc/at32f435_437_conf.h b/project/at_start_f435/examples/can/loopback_mode/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/can/loopback_mode/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/can/loopback_mode/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/can/loopback_mode/inc/at32f435_437_int.h b/project/at_start_f435/examples/can/loopback_mode/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/can/loopback_mode/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/can/loopback_mode/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/can/loopback_mode/readme.txt b/project/at_start_f435/examples/can/loopback_mode/readme.txt index 53010af1..3c737130 100644 --- a/project/at_start_f435/examples/can/loopback_mode/readme.txt +++ b/project/at_start_f435/examples/can/loopback_mode/readme.txt @@ -1,15 +1,15 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ - this demo is based on the at-start board, in this demo, shows how to use - the can loopback mode. every 1s transmit one message and the led4 blink, if - the message can be received, led2 blink. + this demo is based on the at-start board and at32-comm-ev, in this demo, + shows how to use the can loopback mode. every 1s transmit one message + and the led4 blink, if the message can be received, led2 blink. set-up - can tx ---> pb9 - can rx ---> pb8 diff --git a/project/at_start_f435/examples/can/loopback_mode/src/at32f435_437_clock.c b/project/at_start_f435/examples/can/loopback_mode/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/can/loopback_mode/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/can/loopback_mode/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/can/loopback_mode/src/at32f435_437_int.c b/project/at_start_f435/examples/can/loopback_mode/src/at32f435_437_int.c index 5ab6eaeb..c3dacf5d 100644 --- a/project/at_start_f435/examples/can/loopback_mode/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/can/loopback_mode/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/can/loopback_mode/src/main.c b/project/at_start_f435/examples/can/loopback_mode/src/main.c index fe9bd835..6105e52b 100644 --- a/project/at_start_f435/examples/can/loopback_mode/src/main.c +++ b/project/at_start_f435/examples/can/loopback_mode/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/cortex_m4/bit_band/inc/at32f435_437_clock.h b/project/at_start_f435/examples/cortex_m4/bit_band/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/cortex_m4/bit_band/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/cortex_m4/bit_band/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/cortex_m4/bit_band/inc/at32f435_437_conf.h b/project/at_start_f435/examples/cortex_m4/bit_band/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/cortex_m4/bit_band/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/cortex_m4/bit_band/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/cortex_m4/bit_band/inc/at32f435_437_int.h b/project/at_start_f435/examples/cortex_m4/bit_band/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/cortex_m4/bit_band/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/cortex_m4/bit_band/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/cortex_m4/bit_band/readme.txt b/project/at_start_f435/examples/cortex_m4/bit_band/readme.txt index 294b98f0..b65dafb4 100644 --- a/project/at_start_f435/examples/cortex_m4/bit_band/readme.txt +++ b/project/at_start_f435/examples/cortex_m4/bit_band/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/cortex_m4/bit_band/src/at32f435_437_clock.c b/project/at_start_f435/examples/cortex_m4/bit_band/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/cortex_m4/bit_band/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/cortex_m4/bit_band/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/cortex_m4/bit_band/src/at32f435_437_int.c b/project/at_start_f435/examples/cortex_m4/bit_band/src/at32f435_437_int.c index 230c3115..c0d694b3 100644 --- a/project/at_start_f435/examples/cortex_m4/bit_band/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/cortex_m4/bit_band/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/cortex_m4/bit_band/src/main.c b/project/at_start_f435/examples/cortex_m4/bit_band/src/main.c index 9eab2240..2ffed950 100644 --- a/project/at_start_f435/examples/cortex_m4/bit_band/src/main.c +++ b/project/at_start_f435/examples/cortex_m4/bit_band/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/cortex_m4/cmsis_dsp/inc/at32f435_437_clock.h b/project/at_start_f435/examples/cortex_m4/cmsis_dsp/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/cortex_m4/cmsis_dsp/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/cortex_m4/cmsis_dsp/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/cortex_m4/cmsis_dsp/inc/at32f435_437_conf.h b/project/at_start_f435/examples/cortex_m4/cmsis_dsp/inc/at32f435_437_conf.h index c050e1ff..6b437f9d 100644 --- a/project/at_start_f435/examples/cortex_m4/cmsis_dsp/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/cortex_m4/cmsis_dsp/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/cortex_m4/cmsis_dsp/inc/at32f435_437_int.h b/project/at_start_f435/examples/cortex_m4/cmsis_dsp/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/cortex_m4/cmsis_dsp/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/cortex_m4/cmsis_dsp/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Listings/cmsis_dsp.map b/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Listings/cmsis_dsp.map index 36b91aaf..2555c3a3 100644 --- a/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Listings/cmsis_dsp.map +++ b/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Listings/cmsis_dsp.map @@ -274,7 +274,7 @@ Section Cross References at32f435_437_gpio.o(.ARM.exidx.text.gpio_bits_set) refers to at32f435_437_gpio.o(.text.gpio_bits_set) for [Anonymous Symbol] at32f435_437_gpio.o(.ARM.exidx.text.gpio_bits_reset) refers to at32f435_437_gpio.o(.text.gpio_bits_reset) for [Anonymous Symbol] at32f435_437_gpio.o(.ARM.exidx.text.gpio_bits_write) refers to at32f435_437_gpio.o(.text.gpio_bits_write) for [Anonymous Symbol] - at32f435_437_gpio.o(.ARM.exidx.text.gpio_port_wirte) refers to at32f435_437_gpio.o(.text.gpio_port_wirte) for [Anonymous Symbol] + at32f435_437_gpio.o(.ARM.exidx.text.gpio_port_write) refers to at32f435_437_gpio.o(.text.gpio_port_write) for [Anonymous Symbol] at32f435_437_gpio.o(.ARM.exidx.text.gpio_pin_wp_config) refers to at32f435_437_gpio.o(.text.gpio_pin_wp_config) for [Anonymous Symbol] at32f435_437_gpio.o(.ARM.exidx.text.gpio_pins_huge_driven_config) refers to at32f435_437_gpio.o(.text.gpio_pins_huge_driven_config) for [Anonymous Symbol] at32f435_437_gpio.o(.ARM.exidx.text.gpio_pin_mux_config) refers to at32f435_437_gpio.o(.text.gpio_pin_mux_config) for [Anonymous Symbol] @@ -1801,7 +1801,7 @@ Removing Unused input sections from the image. Removing at32f435_437_crm.o(.text.crm_periph_lowpower_mode_enable), (40 bytes). Removing at32f435_437_crm.o(.ARM.exidx.text.crm_periph_lowpower_mode_enable), (8 bytes). Removing at32f435_437_crm.o(.ARM.exidx.text.crm_clock_source_enable), (8 bytes). - Removing at32f435_437_crm.o(.text.crm_flag_clear), (108 bytes). + Removing at32f435_437_crm.o(.text.crm_flag_clear), (172 bytes). Removing at32f435_437_crm.o(.ARM.exidx.text.crm_flag_clear), (8 bytes). Removing at32f435_437_crm.o(.text.crm_ertc_clock_select), (30 bytes). Removing at32f435_437_crm.o(.ARM.exidx.text.crm_ertc_clock_select), (8 bytes). @@ -1860,8 +1860,8 @@ Removing Unused input sections from the image. Removing at32f435_437_gpio.o(.ARM.exidx.text.gpio_bits_reset), (8 bytes). Removing at32f435_437_gpio.o(.text.gpio_bits_write), (12 bytes). Removing at32f435_437_gpio.o(.ARM.exidx.text.gpio_bits_write), (8 bytes). - Removing at32f435_437_gpio.o(.text.gpio_port_wirte), (4 bytes). - Removing at32f435_437_gpio.o(.ARM.exidx.text.gpio_port_wirte), (8 bytes). + Removing at32f435_437_gpio.o(.text.gpio_port_write), (4 bytes). + Removing at32f435_437_gpio.o(.ARM.exidx.text.gpio_port_write), (8 bytes). Removing at32f435_437_gpio.o(.text.gpio_pin_wp_config), (16 bytes). Removing at32f435_437_gpio.o(.ARM.exidx.text.gpio_pin_wp_config), (8 bytes). Removing at32f435_437_gpio.o(.text.gpio_pins_huge_driven_config), (16 bytes). @@ -1948,7 +1948,7 @@ Removing Unused input sections from the image. Removing at32f435_437_usart.o(.text.usart_hardware_flow_control_set), (66 bytes). Removing at32f435_437_usart.o(.ARM.exidx.text.usart_hardware_flow_control_set), (8 bytes). Removing at32f435_437_usart.o(.ARM.exidx.text.usart_flag_get), (8 bytes). - Removing at32f435_437_usart.o(.text.usart_flag_clear), (6 bytes). + Removing at32f435_437_usart.o(.text.usart_flag_clear), (16 bytes). Removing at32f435_437_usart.o(.ARM.exidx.text.usart_flag_clear), (8 bytes). Removing at32f435_437_usart.o(.text.usart_rs485_delay_time_config), (34 bytes). Removing at32f435_437_usart.o(.ARM.exidx.text.usart_rs485_delay_time_config), (8 bytes). @@ -2955,7 +2955,7 @@ Removing Unused input sections from the image. Removing transformfunctions.o(.text.arm_split_rfft_q31), (274 bytes). Removing transformfunctions.o(.ARM.exidx.text.arm_split_rfft_q31), (8 bytes). -1226 unused section(s) (total 1042467 bytes) removed from the image. +1226 unused section(s) (total 1042541 bytes) removed from the image. ============================================================================== @@ -3203,81 +3203,81 @@ Image Symbol Table [Anonymous Symbol] 0x08000b1c Section 0 at32f435_437_int.o(.text.SVC_Handler) [Anonymous Symbol] 0x08000b20 Section 0 at32f435_437_int.o(.text.SysTick_Handler) [Anonymous Symbol] 0x08000b24 Section 0 system_at32f435_437.o(.text.SystemInit) - [Anonymous Symbol] 0x08000b90 Section 0 at32f435_437_int.o(.text.UsageFault_Handler) - [Anonymous Symbol] 0x08000b94 Section 0 at32f435_437_board.o(.text._sys_exit) - [Anonymous Symbol] 0x08000b98 Section 0 matrixfunctions.o(.text.arm_mat_mult_f32) - [Anonymous Symbol] 0x08000cf0 Section 0 statisticsfunctions.o(.text.arm_max_f32) - [Anonymous Symbol] 0x08000dc0 Section 0 statisticsfunctions.o(.text.arm_mean_f32) - [Anonymous Symbol] 0x08000e40 Section 0 statisticsfunctions.o(.text.arm_min_f32) - [Anonymous Symbol] 0x08000f10 Section 0 statisticsfunctions.o(.text.arm_std_f32) - [Anonymous Symbol] 0x08000f60 Section 0 statisticsfunctions.o(.text.arm_var_f32) - [Anonymous Symbol] 0x0800108c Section 0 at32f435_437_crm.o(.text.crm_ahb_div_set) - [Anonymous Symbol] 0x080010a8 Section 0 at32f435_437_crm.o(.text.crm_apb1_div_set) - [Anonymous Symbol] 0x080010c4 Section 0 at32f435_437_crm.o(.text.crm_apb2_div_set) - [Anonymous Symbol] 0x080010e0 Section 0 at32f435_437_crm.o(.text.crm_auto_step_mode_enable) - [Anonymous Symbol] 0x080010fc Section 0 at32f435_437_crm.o(.text.crm_clock_source_enable) - [Anonymous Symbol] 0x08001178 Section 0 at32f435_437_crm.o(.text.crm_clocks_freq_get) - crm_clocks_freq_get.pll_fr_table 0x08001204 Number 0 at32f435_437_crm.o(.text.crm_clocks_freq_get) - crm_clocks_freq_get.sclk_ahb_div_table 0x0800120c Number 0 at32f435_437_crm.o(.text.crm_clocks_freq_get) - crm_clocks_freq_get.ahb_apb1_div_table 0x0800121c Number 0 at32f435_437_crm.o(.text.crm_clocks_freq_get) - crm_clocks_freq_get.ahb_apb2_div_table 0x0800121c Number 0 at32f435_437_crm.o(.text.crm_clocks_freq_get) - [Anonymous Symbol] 0x08001224 Section 0 at32f435_437_crm.o(.text.crm_flag_get) - [Anonymous Symbol] 0x08001240 Section 0 at32f435_437_crm.o(.text.crm_hext_stable_wait) - [Anonymous Symbol] 0x08001268 Section 0 at32f435_437_crm.o(.text.crm_periph_clock_enable) - [Anonymous Symbol] 0x08001290 Section 0 at32f435_437_crm.o(.text.crm_pll_config) - [Anonymous Symbol] 0x080012dc Section 0 at32f435_437_crm.o(.text.crm_reset) - [Anonymous Symbol] 0x0800132c Section 0 at32f435_437_crm.o(.text.crm_sysclk_switch) - [Anonymous Symbol] 0x08001340 Section 0 at32f435_437_crm.o(.text.crm_sysclk_switch_status_get) - [Anonymous Symbol] 0x08001350 Section 0 at32f435_437_board.o(.text.fputc) - [Anonymous Symbol] 0x08001374 Section 0 at32f435_437_gpio.o(.text.gpio_default_para_init) - [Anonymous Symbol] 0x08001384 Section 0 at32f435_437_gpio.o(.text.gpio_init) - [Anonymous Symbol] 0x08001408 Section 0 at32f435_437_gpio.o(.text.gpio_pin_mux_config) - [Anonymous Symbol] 0x08001438 Section 0 main.o(.text.main) - [Anonymous Symbol] 0x08001584 Section 0 at32f435_437_clock.o(.text.system_clock_config) - [Anonymous Symbol] 0x08001618 Section 0 system_at32f435_437.o(.text.system_core_clock_update) - system_core_clock_update.pll_fr_table 0x0800168c Number 0 system_at32f435_437.o(.text.system_core_clock_update) - system_core_clock_update.sys_ahb_div_table 0x08001694 Number 0 system_at32f435_437.o(.text.system_core_clock_update) - [Anonymous Symbol] 0x080016a4 Section 0 at32f435_437_board.o(.text.uart_print_init) - [Anonymous Symbol] 0x08001714 Section 0 at32f435_437_usart.o(.text.usart_data_transmit) - [Anonymous Symbol] 0x0800171c Section 0 at32f435_437_usart.o(.text.usart_enable) - [Anonymous Symbol] 0x08001730 Section 0 at32f435_437_usart.o(.text.usart_flag_get) - [Anonymous Symbol] 0x0800173c Section 0 at32f435_437_usart.o(.text.usart_init) - [Anonymous Symbol] 0x080017e4 Section 0 at32f435_437_usart.o(.text.usart_transmitter_enable) - CL$$btod_d2e 0x080017f6 Section 62 btod.o(CL$$btod_d2e) - CL$$btod_d2e_denorm_low 0x08001834 Section 70 btod.o(CL$$btod_d2e_denorm_low) - CL$$btod_d2e_norm_op1 0x0800187a Section 96 btod.o(CL$$btod_d2e_norm_op1) - CL$$btod_div_common 0x080018da Section 824 btod.o(CL$$btod_div_common) - CL$$btod_e2e 0x08001c12 Section 220 btod.o(CL$$btod_e2e) - CL$$btod_ediv 0x08001cee Section 42 btod.o(CL$$btod_ediv) - CL$$btod_emul 0x08001d18 Section 42 btod.o(CL$$btod_emul) - CL$$btod_mult_common 0x08001d42 Section 580 btod.o(CL$$btod_mult_common) - i.__ARM_fpclassify 0x08001f86 Section 0 fpclassify.o(i.__ARM_fpclassify) - i.__hardfp_sqrtf 0x08001fb6 Section 0 sqrtf.o(i.__hardfp_sqrtf) - locale$$code 0x08001ff0 Section 44 lc_numeric_c.o(locale$$code) - $v0 0x0800201c Number 0 dretinf.o(x$fpl$dretinf) - x$fpl$dretinf 0x0800201c Section 12 dretinf.o(x$fpl$dretinf) - $v0 0x08002028 Number 0 f2d.o(x$fpl$f2d) - x$fpl$f2d 0x08002028 Section 86 f2d.o(x$fpl$f2d) - $v0 0x0800207e Number 0 fnaninf.o(x$fpl$fnaninf) - x$fpl$fnaninf 0x0800207e Section 140 fnaninf.o(x$fpl$fnaninf) - $v0 0x0800210a Number 0 fpinit.o(x$fpl$fpinit) - x$fpl$fpinit 0x0800210a Section 26 fpinit.o(x$fpl$fpinit) - $v0 0x08002124 Number 0 printf1.o(x$fpl$printf1) - x$fpl$printf1 0x08002124 Section 4 printf1.o(x$fpl$printf1) - tenpwrs_x 0x08002128 Data 60 bigflt0.o(.constdata) - .constdata 0x08002128 Section 148 bigflt0.o(.constdata) - x$fpl$usenofp 0x08002128 Section 0 usenofp.o(x$fpl$usenofp) - tenpwrs_i 0x08002164 Data 64 bigflt0.o(.constdata) - .L__const.main.dstC 0x080021c0 Data 8 main.o(.rodata..L__const.main.dstC) - .L__const.main.srcA 0x080021c8 Data 8 main.o(.rodata..L__const.main.srcA) - .L__const.main.srcB 0x080021d0 Data 8 main.o(.rodata..L__const.main.srcB) - locale$$data 0x08002348 Section 28 lc_numeric_c.o(locale$$data) - __lcnum_c_name 0x0800234c Data 2 lc_numeric_c.o(locale$$data) - __lcnum_c_start 0x08002354 Data 0 lc_numeric_c.o(locale$$data) - __lcnum_c_point 0x08002360 Data 0 lc_numeric_c.o(locale$$data) - __lcnum_c_thousands 0x08002362 Data 0 lc_numeric_c.o(locale$$data) - __lcnum_c_grouping 0x08002363 Data 0 lc_numeric_c.o(locale$$data) - __lcnum_c_end 0x08002364 Data 0 lc_numeric_c.o(locale$$data) + [Anonymous Symbol] 0x08000b8c Section 0 at32f435_437_int.o(.text.UsageFault_Handler) + [Anonymous Symbol] 0x08000b90 Section 0 at32f435_437_board.o(.text._sys_exit) + [Anonymous Symbol] 0x08000b94 Section 0 matrixfunctions.o(.text.arm_mat_mult_f32) + [Anonymous Symbol] 0x08000cec Section 0 statisticsfunctions.o(.text.arm_max_f32) + [Anonymous Symbol] 0x08000dbc Section 0 statisticsfunctions.o(.text.arm_mean_f32) + [Anonymous Symbol] 0x08000e3c Section 0 statisticsfunctions.o(.text.arm_min_f32) + [Anonymous Symbol] 0x08000f0c Section 0 statisticsfunctions.o(.text.arm_std_f32) + [Anonymous Symbol] 0x08000f5c Section 0 statisticsfunctions.o(.text.arm_var_f32) + [Anonymous Symbol] 0x08001088 Section 0 at32f435_437_crm.o(.text.crm_ahb_div_set) + [Anonymous Symbol] 0x080010a4 Section 0 at32f435_437_crm.o(.text.crm_apb1_div_set) + [Anonymous Symbol] 0x080010c0 Section 0 at32f435_437_crm.o(.text.crm_apb2_div_set) + [Anonymous Symbol] 0x080010dc Section 0 at32f435_437_crm.o(.text.crm_auto_step_mode_enable) + [Anonymous Symbol] 0x080010f8 Section 0 at32f435_437_crm.o(.text.crm_clock_source_enable) + [Anonymous Symbol] 0x08001174 Section 0 at32f435_437_crm.o(.text.crm_clocks_freq_get) + crm_clocks_freq_get.pll_fr_table 0x08001200 Number 0 at32f435_437_crm.o(.text.crm_clocks_freq_get) + crm_clocks_freq_get.sclk_ahb_div_table 0x08001208 Number 0 at32f435_437_crm.o(.text.crm_clocks_freq_get) + crm_clocks_freq_get.ahb_apb1_div_table 0x08001218 Number 0 at32f435_437_crm.o(.text.crm_clocks_freq_get) + crm_clocks_freq_get.ahb_apb2_div_table 0x08001218 Number 0 at32f435_437_crm.o(.text.crm_clocks_freq_get) + [Anonymous Symbol] 0x08001220 Section 0 at32f435_437_crm.o(.text.crm_flag_get) + [Anonymous Symbol] 0x0800123c Section 0 at32f435_437_crm.o(.text.crm_hext_stable_wait) + [Anonymous Symbol] 0x08001264 Section 0 at32f435_437_crm.o(.text.crm_periph_clock_enable) + [Anonymous Symbol] 0x0800128c Section 0 at32f435_437_crm.o(.text.crm_pll_config) + [Anonymous Symbol] 0x080012d8 Section 0 at32f435_437_crm.o(.text.crm_reset) + [Anonymous Symbol] 0x08001328 Section 0 at32f435_437_crm.o(.text.crm_sysclk_switch) + [Anonymous Symbol] 0x0800133c Section 0 at32f435_437_crm.o(.text.crm_sysclk_switch_status_get) + [Anonymous Symbol] 0x0800134c Section 0 at32f435_437_board.o(.text.fputc) + [Anonymous Symbol] 0x08001370 Section 0 at32f435_437_gpio.o(.text.gpio_default_para_init) + [Anonymous Symbol] 0x08001380 Section 0 at32f435_437_gpio.o(.text.gpio_init) + [Anonymous Symbol] 0x08001404 Section 0 at32f435_437_gpio.o(.text.gpio_pin_mux_config) + [Anonymous Symbol] 0x08001434 Section 0 main.o(.text.main) + [Anonymous Symbol] 0x08001580 Section 0 at32f435_437_clock.o(.text.system_clock_config) + [Anonymous Symbol] 0x08001614 Section 0 system_at32f435_437.o(.text.system_core_clock_update) + system_core_clock_update.pll_fr_table 0x08001688 Number 0 system_at32f435_437.o(.text.system_core_clock_update) + system_core_clock_update.sys_ahb_div_table 0x08001690 Number 0 system_at32f435_437.o(.text.system_core_clock_update) + [Anonymous Symbol] 0x080016a0 Section 0 at32f435_437_board.o(.text.uart_print_init) + [Anonymous Symbol] 0x08001710 Section 0 at32f435_437_usart.o(.text.usart_data_transmit) + [Anonymous Symbol] 0x08001718 Section 0 at32f435_437_usart.o(.text.usart_enable) + [Anonymous Symbol] 0x0800172c Section 0 at32f435_437_usart.o(.text.usart_flag_get) + [Anonymous Symbol] 0x08001738 Section 0 at32f435_437_usart.o(.text.usart_init) + [Anonymous Symbol] 0x080017e0 Section 0 at32f435_437_usart.o(.text.usart_transmitter_enable) + CL$$btod_d2e 0x080017f2 Section 62 btod.o(CL$$btod_d2e) + CL$$btod_d2e_denorm_low 0x08001830 Section 70 btod.o(CL$$btod_d2e_denorm_low) + CL$$btod_d2e_norm_op1 0x08001876 Section 96 btod.o(CL$$btod_d2e_norm_op1) + CL$$btod_div_common 0x080018d6 Section 824 btod.o(CL$$btod_div_common) + CL$$btod_e2e 0x08001c0e Section 220 btod.o(CL$$btod_e2e) + CL$$btod_ediv 0x08001cea Section 42 btod.o(CL$$btod_ediv) + CL$$btod_emul 0x08001d14 Section 42 btod.o(CL$$btod_emul) + CL$$btod_mult_common 0x08001d3e Section 580 btod.o(CL$$btod_mult_common) + i.__ARM_fpclassify 0x08001f82 Section 0 fpclassify.o(i.__ARM_fpclassify) + i.__hardfp_sqrtf 0x08001fb2 Section 0 sqrtf.o(i.__hardfp_sqrtf) + locale$$code 0x08001fec Section 44 lc_numeric_c.o(locale$$code) + $v0 0x08002018 Number 0 dretinf.o(x$fpl$dretinf) + x$fpl$dretinf 0x08002018 Section 12 dretinf.o(x$fpl$dretinf) + $v0 0x08002024 Number 0 f2d.o(x$fpl$f2d) + x$fpl$f2d 0x08002024 Section 86 f2d.o(x$fpl$f2d) + $v0 0x0800207a Number 0 fnaninf.o(x$fpl$fnaninf) + x$fpl$fnaninf 0x0800207a Section 140 fnaninf.o(x$fpl$fnaninf) + $v0 0x08002106 Number 0 fpinit.o(x$fpl$fpinit) + x$fpl$fpinit 0x08002106 Section 26 fpinit.o(x$fpl$fpinit) + $v0 0x08002120 Number 0 printf1.o(x$fpl$printf1) + x$fpl$printf1 0x08002120 Section 4 printf1.o(x$fpl$printf1) + tenpwrs_x 0x08002124 Data 60 bigflt0.o(.constdata) + .constdata 0x08002124 Section 148 bigflt0.o(.constdata) + x$fpl$usenofp 0x08002124 Section 0 usenofp.o(x$fpl$usenofp) + tenpwrs_i 0x08002160 Data 64 bigflt0.o(.constdata) + .L__const.main.dstC 0x080021b8 Data 8 main.o(.rodata..L__const.main.dstC) + .L__const.main.srcA 0x080021c0 Data 8 main.o(.rodata..L__const.main.srcA) + .L__const.main.srcB 0x080021c8 Data 8 main.o(.rodata..L__const.main.srcB) + locale$$data 0x08002340 Section 28 lc_numeric_c.o(locale$$data) + __lcnum_c_name 0x08002344 Data 2 lc_numeric_c.o(locale$$data) + __lcnum_c_start 0x0800234c Data 0 lc_numeric_c.o(locale$$data) + __lcnum_c_point 0x08002358 Data 0 lc_numeric_c.o(locale$$data) + __lcnum_c_thousands 0x0800235a Data 0 lc_numeric_c.o(locale$$data) + __lcnum_c_grouping 0x0800235b Data 0 lc_numeric_c.o(locale$$data) + __lcnum_c_end 0x0800235c Data 0 lc_numeric_c.o(locale$$data) .bss 0x20000008 Section 96 libspace.o(.bss) testOutput 0x200000d0 Data 320 main.o(.bss.testOutput) [Anonymous Symbol] 0x200000d0 Section 0 main.o(.bss.testOutput) @@ -3511,65 +3511,65 @@ Image Symbol Table PendSV_Handler 0x08000b19 Thumb Code 2 at32f435_437_int.o(.text.PendSV_Handler) SVC_Handler 0x08000b1d Thumb Code 2 at32f435_437_int.o(.text.SVC_Handler) SysTick_Handler 0x08000b21 Thumb Code 2 at32f435_437_int.o(.text.SysTick_Handler) - SystemInit 0x08000b25 Thumb Code 108 system_at32f435_437.o(.text.SystemInit) - UsageFault_Handler 0x08000b91 Thumb Code 2 at32f435_437_int.o(.text.UsageFault_Handler) - _sys_exit 0x08000b95 Thumb Code 2 at32f435_437_board.o(.text._sys_exit) - arm_mat_mult_f32 0x08000b99 Thumb Code 344 matrixfunctions.o(.text.arm_mat_mult_f32) - arm_max_f32 0x08000cf1 Thumb Code 206 statisticsfunctions.o(.text.arm_max_f32) - arm_mean_f32 0x08000dc1 Thumb Code 128 statisticsfunctions.o(.text.arm_mean_f32) - arm_min_f32 0x08000e41 Thumb Code 206 statisticsfunctions.o(.text.arm_min_f32) - arm_std_f32 0x08000f11 Thumb Code 80 statisticsfunctions.o(.text.arm_std_f32) - arm_var_f32 0x08000f61 Thumb Code 300 statisticsfunctions.o(.text.arm_var_f32) - crm_ahb_div_set 0x0800108d Thumb Code 26 at32f435_437_crm.o(.text.crm_ahb_div_set) - crm_apb1_div_set 0x080010a9 Thumb Code 26 at32f435_437_crm.o(.text.crm_apb1_div_set) - crm_apb2_div_set 0x080010c5 Thumb Code 26 at32f435_437_crm.o(.text.crm_apb2_div_set) - crm_auto_step_mode_enable 0x080010e1 Thumb Code 26 at32f435_437_crm.o(.text.crm_auto_step_mode_enable) - crm_clock_source_enable 0x080010fd Thumb Code 122 at32f435_437_crm.o(.text.crm_clock_source_enable) - crm_clocks_freq_get 0x08001179 Thumb Code 172 at32f435_437_crm.o(.text.crm_clocks_freq_get) - crm_flag_get 0x08001225 Thumb Code 26 at32f435_437_crm.o(.text.crm_flag_get) - crm_hext_stable_wait 0x08001241 Thumb Code 40 at32f435_437_crm.o(.text.crm_hext_stable_wait) - crm_periph_clock_enable 0x08001269 Thumb Code 40 at32f435_437_crm.o(.text.crm_periph_clock_enable) - crm_pll_config 0x08001291 Thumb Code 76 at32f435_437_crm.o(.text.crm_pll_config) - crm_reset 0x080012dd Thumb Code 80 at32f435_437_crm.o(.text.crm_reset) - crm_sysclk_switch 0x0800132d Thumb Code 18 at32f435_437_crm.o(.text.crm_sysclk_switch) - crm_sysclk_switch_status_get 0x08001341 Thumb Code 16 at32f435_437_crm.o(.text.crm_sysclk_switch_status_get) - fputc 0x08001351 Thumb Code 36 at32f435_437_board.o(.text.fputc) - gpio_default_para_init 0x08001375 Thumb Code 14 at32f435_437_gpio.o(.text.gpio_default_para_init) - gpio_init 0x08001385 Thumb Code 132 at32f435_437_gpio.o(.text.gpio_init) - gpio_pin_mux_config 0x08001409 Thumb Code 46 at32f435_437_gpio.o(.text.gpio_pin_mux_config) - main 0x08001439 Thumb Code 332 main.o(.text.main) - system_clock_config 0x08001585 Thumb Code 148 at32f435_437_clock.o(.text.system_clock_config) - system_core_clock_update 0x08001619 Thumb Code 140 system_at32f435_437.o(.text.system_core_clock_update) - uart_print_init 0x080016a5 Thumb Code 110 at32f435_437_board.o(.text.uart_print_init) - usart_data_transmit 0x08001715 Thumb Code 8 at32f435_437_usart.o(.text.usart_data_transmit) - usart_enable 0x0800171d Thumb Code 18 at32f435_437_usart.o(.text.usart_enable) - usart_flag_get 0x08001731 Thumb Code 10 at32f435_437_usart.o(.text.usart_flag_get) - usart_init 0x0800173d Thumb Code 166 at32f435_437_usart.o(.text.usart_init) - usart_transmitter_enable 0x080017e5 Thumb Code 18 at32f435_437_usart.o(.text.usart_transmitter_enable) - _btod_d2e 0x080017f7 Thumb Code 62 btod.o(CL$$btod_d2e) - _d2e_denorm_low 0x08001835 Thumb Code 70 btod.o(CL$$btod_d2e_denorm_low) - _d2e_norm_op1 0x0800187b Thumb Code 96 btod.o(CL$$btod_d2e_norm_op1) - __btod_div_common 0x080018db Thumb Code 696 btod.o(CL$$btod_div_common) - _e2e 0x08001c13 Thumb Code 220 btod.o(CL$$btod_e2e) - _btod_ediv 0x08001cef Thumb Code 42 btod.o(CL$$btod_ediv) - _btod_emul 0x08001d19 Thumb Code 42 btod.o(CL$$btod_emul) - __btod_mult_common 0x08001d43 Thumb Code 580 btod.o(CL$$btod_mult_common) - __ARM_fpclassify 0x08001f87 Thumb Code 48 fpclassify.o(i.__ARM_fpclassify) - __hardfp_sqrtf 0x08001fb7 Thumb Code 58 sqrtf.o(i.__hardfp_sqrtf) - _get_lc_numeric 0x08001ff1 Thumb Code 44 lc_numeric_c.o(locale$$code) - __fpl_dretinf 0x0800201d Thumb Code 12 dretinf.o(x$fpl$dretinf) - __aeabi_f2d 0x08002029 Thumb Code 0 f2d.o(x$fpl$f2d) - _f2d 0x08002029 Thumb Code 86 f2d.o(x$fpl$f2d) - __fpl_fnaninf 0x0800207f Thumb Code 140 fnaninf.o(x$fpl$fnaninf) - _fp_init 0x0800210b Thumb Code 26 fpinit.o(x$fpl$fpinit) - __fplib_config_fpu_vfp 0x08002123 Thumb Code 0 fpinit.o(x$fpl$fpinit) - __fplib_config_pureend_doubles 0x08002123 Thumb Code 0 fpinit.o(x$fpl$fpinit) - _printf_fp_dec 0x08002125 Thumb Code 4 printf1.o(x$fpl$printf1) - __I$use$fp 0x08002128 Number 0 usenofp.o(x$fpl$usenofp) - testMarks_f32 0x080021d8 Data 320 main.o(.rodata.testMarks_f32) - testUnity_f32 0x08002318 Data 16 main.o(.rodata.testUnity_f32) - Region$$Table$$Base 0x08002328 Number 0 anon$$obj.o(Region$$Table) - Region$$Table$$Limit 0x08002348 Number 0 anon$$obj.o(Region$$Table) + SystemInit 0x08000b25 Thumb Code 104 system_at32f435_437.o(.text.SystemInit) + UsageFault_Handler 0x08000b8d Thumb Code 2 at32f435_437_int.o(.text.UsageFault_Handler) + _sys_exit 0x08000b91 Thumb Code 2 at32f435_437_board.o(.text._sys_exit) + arm_mat_mult_f32 0x08000b95 Thumb Code 344 matrixfunctions.o(.text.arm_mat_mult_f32) + arm_max_f32 0x08000ced Thumb Code 206 statisticsfunctions.o(.text.arm_max_f32) + arm_mean_f32 0x08000dbd Thumb Code 128 statisticsfunctions.o(.text.arm_mean_f32) + arm_min_f32 0x08000e3d Thumb Code 206 statisticsfunctions.o(.text.arm_min_f32) + arm_std_f32 0x08000f0d Thumb Code 80 statisticsfunctions.o(.text.arm_std_f32) + arm_var_f32 0x08000f5d Thumb Code 300 statisticsfunctions.o(.text.arm_var_f32) + crm_ahb_div_set 0x08001089 Thumb Code 26 at32f435_437_crm.o(.text.crm_ahb_div_set) + crm_apb1_div_set 0x080010a5 Thumb Code 26 at32f435_437_crm.o(.text.crm_apb1_div_set) + crm_apb2_div_set 0x080010c1 Thumb Code 26 at32f435_437_crm.o(.text.crm_apb2_div_set) + crm_auto_step_mode_enable 0x080010dd Thumb Code 26 at32f435_437_crm.o(.text.crm_auto_step_mode_enable) + crm_clock_source_enable 0x080010f9 Thumb Code 122 at32f435_437_crm.o(.text.crm_clock_source_enable) + crm_clocks_freq_get 0x08001175 Thumb Code 172 at32f435_437_crm.o(.text.crm_clocks_freq_get) + crm_flag_get 0x08001221 Thumb Code 26 at32f435_437_crm.o(.text.crm_flag_get) + crm_hext_stable_wait 0x0800123d Thumb Code 40 at32f435_437_crm.o(.text.crm_hext_stable_wait) + crm_periph_clock_enable 0x08001265 Thumb Code 40 at32f435_437_crm.o(.text.crm_periph_clock_enable) + crm_pll_config 0x0800128d Thumb Code 76 at32f435_437_crm.o(.text.crm_pll_config) + crm_reset 0x080012d9 Thumb Code 80 at32f435_437_crm.o(.text.crm_reset) + crm_sysclk_switch 0x08001329 Thumb Code 18 at32f435_437_crm.o(.text.crm_sysclk_switch) + crm_sysclk_switch_status_get 0x0800133d Thumb Code 16 at32f435_437_crm.o(.text.crm_sysclk_switch_status_get) + fputc 0x0800134d Thumb Code 36 at32f435_437_board.o(.text.fputc) + gpio_default_para_init 0x08001371 Thumb Code 14 at32f435_437_gpio.o(.text.gpio_default_para_init) + gpio_init 0x08001381 Thumb Code 132 at32f435_437_gpio.o(.text.gpio_init) + gpio_pin_mux_config 0x08001405 Thumb Code 46 at32f435_437_gpio.o(.text.gpio_pin_mux_config) + main 0x08001435 Thumb Code 332 main.o(.text.main) + system_clock_config 0x08001581 Thumb Code 148 at32f435_437_clock.o(.text.system_clock_config) + system_core_clock_update 0x08001615 Thumb Code 140 system_at32f435_437.o(.text.system_core_clock_update) + uart_print_init 0x080016a1 Thumb Code 110 at32f435_437_board.o(.text.uart_print_init) + usart_data_transmit 0x08001711 Thumb Code 8 at32f435_437_usart.o(.text.usart_data_transmit) + usart_enable 0x08001719 Thumb Code 18 at32f435_437_usart.o(.text.usart_enable) + usart_flag_get 0x0800172d Thumb Code 10 at32f435_437_usart.o(.text.usart_flag_get) + usart_init 0x08001739 Thumb Code 166 at32f435_437_usart.o(.text.usart_init) + usart_transmitter_enable 0x080017e1 Thumb Code 18 at32f435_437_usart.o(.text.usart_transmitter_enable) + _btod_d2e 0x080017f3 Thumb Code 62 btod.o(CL$$btod_d2e) + _d2e_denorm_low 0x08001831 Thumb Code 70 btod.o(CL$$btod_d2e_denorm_low) + _d2e_norm_op1 0x08001877 Thumb Code 96 btod.o(CL$$btod_d2e_norm_op1) + __btod_div_common 0x080018d7 Thumb Code 696 btod.o(CL$$btod_div_common) + _e2e 0x08001c0f Thumb Code 220 btod.o(CL$$btod_e2e) + _btod_ediv 0x08001ceb Thumb Code 42 btod.o(CL$$btod_ediv) + _btod_emul 0x08001d15 Thumb Code 42 btod.o(CL$$btod_emul) + __btod_mult_common 0x08001d3f Thumb Code 580 btod.o(CL$$btod_mult_common) + __ARM_fpclassify 0x08001f83 Thumb Code 48 fpclassify.o(i.__ARM_fpclassify) + __hardfp_sqrtf 0x08001fb3 Thumb Code 58 sqrtf.o(i.__hardfp_sqrtf) + _get_lc_numeric 0x08001fed Thumb Code 44 lc_numeric_c.o(locale$$code) + __fpl_dretinf 0x08002019 Thumb Code 12 dretinf.o(x$fpl$dretinf) + __aeabi_f2d 0x08002025 Thumb Code 0 f2d.o(x$fpl$f2d) + _f2d 0x08002025 Thumb Code 86 f2d.o(x$fpl$f2d) + __fpl_fnaninf 0x0800207b Thumb Code 140 fnaninf.o(x$fpl$fnaninf) + _fp_init 0x08002107 Thumb Code 26 fpinit.o(x$fpl$fpinit) + __fplib_config_fpu_vfp 0x0800211f Thumb Code 0 fpinit.o(x$fpl$fpinit) + __fplib_config_pureend_doubles 0x0800211f Thumb Code 0 fpinit.o(x$fpl$fpinit) + _printf_fp_dec 0x08002121 Thumb Code 4 printf1.o(x$fpl$printf1) + __I$use$fp 0x08002124 Number 0 usenofp.o(x$fpl$usenofp) + testMarks_f32 0x080021d0 Data 320 main.o(.rodata.testMarks_f32) + testUnity_f32 0x08002310 Data 16 main.o(.rodata.testUnity_f32) + Region$$Table$$Base 0x08002320 Number 0 anon$$obj.o(Region$$Table) + Region$$Table$$Limit 0x08002340 Number 0 anon$$obj.o(Region$$Table) numStudents 0x20000000 Data 4 main.o(.data.numStudents) system_core_clock 0x20000004 Data 4 system_at32f435_437.o(.data.system_core_clock) __libspace_start 0x20000008 Data 96 libspace.o(.bss) @@ -3590,9 +3590,9 @@ Memory Map of the image Image Entry point : 0x0800020d - Load Region LR_IROM1 (Base: 0x08000000, Size: 0x00002370, Max: 0x003f0000, ABSOLUTE) + Load Region LR_IROM1 (Base: 0x08000000, Size: 0x00002368, Max: 0x003f0000, ABSOLUTE) - Execution Region ER_IROM1 (Exec base: 0x08000000, Load base: 0x08000000, Size: 0x00002364, Max: 0x003f0000, ABSOLUTE) + Execution Region ER_IROM1 (Exec base: 0x08000000, Load base: 0x08000000, Size: 0x0000235c, Max: 0x003f0000, ABSOLUTE) Exec Addr Load Addr Size Type Attr Idx E Section Name Object @@ -3688,92 +3688,91 @@ Memory Map of the image 0x08000b1e 0x08000b1e 0x00000002 PAD 0x08000b20 0x08000b20 0x00000002 Code RO 41 .text.SysTick_Handler at32f435_437_int.o 0x08000b22 0x08000b22 0x00000002 PAD - 0x08000b24 0x08000b24 0x0000006c Code RO 105 .text.SystemInit system_at32f435_437.o - 0x08000b90 0x08000b90 0x00000002 Code RO 33 .text.UsageFault_Handler at32f435_437_int.o + 0x08000b24 0x08000b24 0x00000068 Code RO 105 .text.SystemInit system_at32f435_437.o + 0x08000b8c 0x08000b8c 0x00000002 Code RO 33 .text.UsageFault_Handler at32f435_437_int.o + 0x08000b8e 0x08000b8e 0x00000002 PAD + 0x08000b90 0x08000b90 0x00000002 Code RO 58 .text._sys_exit at32f435_437_board.o 0x08000b92 0x08000b92 0x00000002 PAD - 0x08000b94 0x08000b94 0x00000002 Code RO 58 .text._sys_exit at32f435_437_board.o - 0x08000b96 0x08000b96 0x00000002 PAD - 0x08000b98 0x08000b98 0x00000158 Code RO 1032 .text.arm_mat_mult_f32 matrixfunctions.o - 0x08000cf0 0x08000cf0 0x000000ce Code RO 1106 .text.arm_max_f32 statisticsfunctions.o - 0x08000dbe 0x08000dbe 0x00000002 PAD - 0x08000dc0 0x08000dc0 0x00000080 Code RO 1116 .text.arm_mean_f32 statisticsfunctions.o - 0x08000e40 0x08000e40 0x000000ce Code RO 1124 .text.arm_min_f32 statisticsfunctions.o - 0x08000f0e 0x08000f0e 0x00000002 PAD - 0x08000f10 0x08000f10 0x00000050 Code RO 1146 .text.arm_std_f32 statisticsfunctions.o - 0x08000f60 0x08000f60 0x0000012c Code RO 1148 .text.arm_var_f32 statisticsfunctions.o - 0x0800108c 0x0800108c 0x0000001a Code RO 155 .text.crm_ahb_div_set at32f435_437_crm.o - 0x080010a6 0x080010a6 0x00000002 PAD - 0x080010a8 0x080010a8 0x0000001a Code RO 157 .text.crm_apb1_div_set at32f435_437_crm.o - 0x080010c2 0x080010c2 0x00000002 PAD - 0x080010c4 0x080010c4 0x0000001a Code RO 159 .text.crm_apb2_div_set at32f435_437_crm.o - 0x080010de 0x080010de 0x00000002 PAD - 0x080010e0 0x080010e0 0x0000001a Code RO 167 .text.crm_auto_step_mode_enable at32f435_437_crm.o - 0x080010fa 0x080010fa 0x00000002 PAD - 0x080010fc 0x080010fc 0x0000007a Code RO 147 .text.crm_clock_source_enable at32f435_437_crm.o - 0x08001176 0x08001176 0x00000002 PAD - 0x08001178 0x08001178 0x000000ac Code RO 183 .text.crm_clocks_freq_get at32f435_437_crm.o - 0x08001224 0x08001224 0x0000001a Code RO 133 .text.crm_flag_get at32f435_437_crm.o - 0x0800123e 0x0800123e 0x00000002 PAD - 0x08001240 0x08001240 0x00000028 Code RO 135 .text.crm_hext_stable_wait at32f435_437_crm.o - 0x08001268 0x08001268 0x00000028 Code RO 141 .text.crm_periph_clock_enable at32f435_437_crm.o - 0x08001290 0x08001290 0x0000004c Code RO 177 .text.crm_pll_config at32f435_437_crm.o - 0x080012dc 0x080012dc 0x00000050 Code RO 127 .text.crm_reset at32f435_437_crm.o - 0x0800132c 0x0800132c 0x00000012 Code RO 179 .text.crm_sysclk_switch at32f435_437_crm.o - 0x0800133e 0x0800133e 0x00000002 PAD - 0x08001340 0x08001340 0x00000010 Code RO 181 .text.crm_sysclk_switch_status_get at32f435_437_crm.o - 0x08001350 0x08001350 0x00000024 Code RO 62 .text.fputc at32f435_437_board.o - 0x08001374 0x08001374 0x0000000e Code RO 209 .text.gpio_default_para_init at32f435_437_gpio.o - 0x08001382 0x08001382 0x00000002 PAD - 0x08001384 0x08001384 0x00000084 Code RO 207 .text.gpio_init at32f435_437_gpio.o - 0x08001408 0x08001408 0x0000002e Code RO 231 .text.gpio_pin_mux_config at32f435_437_gpio.o - 0x08001436 0x08001436 0x00000002 PAD - 0x08001438 0x08001438 0x0000014c Code RO 2 .text.main main.o - 0x08001584 0x08001584 0x00000094 Code RO 50 .text.system_clock_config at32f435_437_clock.o - 0x08001618 0x08001618 0x0000008c Code RO 107 .text.system_core_clock_update system_at32f435_437.o - 0x080016a4 0x080016a4 0x0000006e Code RO 64 .text.uart_print_init at32f435_437_board.o - 0x08001712 0x08001712 0x00000002 PAD - 0x08001714 0x08001714 0x00000008 Code RO 309 .text.usart_data_transmit at32f435_437_usart.o - 0x0800171c 0x0800171c 0x00000012 Code RO 283 .text.usart_enable at32f435_437_usart.o - 0x0800172e 0x0800172e 0x00000002 PAD - 0x08001730 0x08001730 0x0000000a Code RO 331 .text.usart_flag_get at32f435_437_usart.o - 0x0800173a 0x0800173a 0x00000002 PAD - 0x0800173c 0x0800173c 0x000000a6 Code RO 279 .text.usart_init at32f435_437_usart.o - 0x080017e2 0x080017e2 0x00000002 PAD - 0x080017e4 0x080017e4 0x00000012 Code RO 285 .text.usart_transmitter_enable at32f435_437_usart.o - 0x080017f6 0x080017f6 0x0000003e Code RO 1701 CL$$btod_d2e c_w.l(btod.o) - 0x08001834 0x08001834 0x00000046 Code RO 1703 CL$$btod_d2e_denorm_low c_w.l(btod.o) - 0x0800187a 0x0800187a 0x00000060 Code RO 1702 CL$$btod_d2e_norm_op1 c_w.l(btod.o) - 0x080018da 0x080018da 0x00000338 Code RO 1711 CL$$btod_div_common c_w.l(btod.o) - 0x08001c12 0x08001c12 0x000000dc Code RO 1708 CL$$btod_e2e c_w.l(btod.o) - 0x08001cee 0x08001cee 0x0000002a Code RO 1705 CL$$btod_ediv c_w.l(btod.o) - 0x08001d18 0x08001d18 0x0000002a Code RO 1704 CL$$btod_emul c_w.l(btod.o) - 0x08001d42 0x08001d42 0x00000244 Code RO 1710 CL$$btod_mult_common c_w.l(btod.o) - 0x08001f86 0x08001f86 0x00000030 Code RO 1734 i.__ARM_fpclassify m_wm.l(fpclassify.o) - 0x08001fb6 0x08001fb6 0x0000003a Code RO 1573 i.__hardfp_sqrtf m_wm.l(sqrtf.o) - 0x08001ff0 0x08001ff0 0x0000002c Code RO 1730 locale$$code c_w.l(lc_numeric_c.o) - 0x0800201c 0x0800201c 0x0000000c Code RO 1623 x$fpl$dretinf fz_wm.l(dretinf.o) - 0x08002028 0x08002028 0x00000056 Code RO 1509 x$fpl$f2d fz_wm.l(f2d.o) - 0x0800207e 0x0800207e 0x0000008c Code RO 1625 x$fpl$fnaninf fz_wm.l(fnaninf.o) - 0x0800210a 0x0800210a 0x0000001a Code RO 1816 x$fpl$fpinit fz_wm.l(fpinit.o) - 0x08002124 0x08002124 0x00000004 Code RO 1515 x$fpl$printf1 fz_wm.l(printf1.o) - 0x08002128 0x08002128 0x00000000 Code RO 1631 x$fpl$usenofp fz_wm.l(usenofp.o) - 0x08002128 0x08002128 0x00000094 Data RO 1699 .constdata c_w.l(bigflt0.o) - 0x080021bc 0x080021bc 0x00000004 PAD - 0x080021c0 0x080021c0 0x00000008 Data RO 11 .rodata..L__const.main.dstC main.o - 0x080021c8 0x080021c8 0x00000008 Data RO 8 .rodata..L__const.main.srcA main.o - 0x080021d0 0x080021d0 0x00000008 Data RO 9 .rodata..L__const.main.srcB main.o - 0x080021d8 0x080021d8 0x00000140 Data RO 4 .rodata.testMarks_f32 main.o - 0x08002318 0x08002318 0x00000010 Data RO 5 .rodata.testUnity_f32 main.o - 0x08002328 0x08002328 0x00000020 Data RO 1882 Region$$Table anon$$obj.o - 0x08002348 0x08002348 0x0000001c Data RO 1729 locale$$data c_w.l(lc_numeric_c.o) + 0x08000b94 0x08000b94 0x00000158 Code RO 1032 .text.arm_mat_mult_f32 matrixfunctions.o + 0x08000cec 0x08000cec 0x000000ce Code RO 1106 .text.arm_max_f32 statisticsfunctions.o + 0x08000dba 0x08000dba 0x00000002 PAD + 0x08000dbc 0x08000dbc 0x00000080 Code RO 1116 .text.arm_mean_f32 statisticsfunctions.o + 0x08000e3c 0x08000e3c 0x000000ce Code RO 1124 .text.arm_min_f32 statisticsfunctions.o + 0x08000f0a 0x08000f0a 0x00000002 PAD + 0x08000f0c 0x08000f0c 0x00000050 Code RO 1146 .text.arm_std_f32 statisticsfunctions.o + 0x08000f5c 0x08000f5c 0x0000012c Code RO 1148 .text.arm_var_f32 statisticsfunctions.o + 0x08001088 0x08001088 0x0000001a Code RO 155 .text.crm_ahb_div_set at32f435_437_crm.o + 0x080010a2 0x080010a2 0x00000002 PAD + 0x080010a4 0x080010a4 0x0000001a Code RO 157 .text.crm_apb1_div_set at32f435_437_crm.o + 0x080010be 0x080010be 0x00000002 PAD + 0x080010c0 0x080010c0 0x0000001a Code RO 159 .text.crm_apb2_div_set at32f435_437_crm.o + 0x080010da 0x080010da 0x00000002 PAD + 0x080010dc 0x080010dc 0x0000001a Code RO 167 .text.crm_auto_step_mode_enable at32f435_437_crm.o + 0x080010f6 0x080010f6 0x00000002 PAD + 0x080010f8 0x080010f8 0x0000007a Code RO 147 .text.crm_clock_source_enable at32f435_437_crm.o + 0x08001172 0x08001172 0x00000002 PAD + 0x08001174 0x08001174 0x000000ac Code RO 183 .text.crm_clocks_freq_get at32f435_437_crm.o + 0x08001220 0x08001220 0x0000001a Code RO 133 .text.crm_flag_get at32f435_437_crm.o + 0x0800123a 0x0800123a 0x00000002 PAD + 0x0800123c 0x0800123c 0x00000028 Code RO 135 .text.crm_hext_stable_wait at32f435_437_crm.o + 0x08001264 0x08001264 0x00000028 Code RO 141 .text.crm_periph_clock_enable at32f435_437_crm.o + 0x0800128c 0x0800128c 0x0000004c Code RO 177 .text.crm_pll_config at32f435_437_crm.o + 0x080012d8 0x080012d8 0x00000050 Code RO 127 .text.crm_reset at32f435_437_crm.o + 0x08001328 0x08001328 0x00000012 Code RO 179 .text.crm_sysclk_switch at32f435_437_crm.o + 0x0800133a 0x0800133a 0x00000002 PAD + 0x0800133c 0x0800133c 0x00000010 Code RO 181 .text.crm_sysclk_switch_status_get at32f435_437_crm.o + 0x0800134c 0x0800134c 0x00000024 Code RO 62 .text.fputc at32f435_437_board.o + 0x08001370 0x08001370 0x0000000e Code RO 209 .text.gpio_default_para_init at32f435_437_gpio.o + 0x0800137e 0x0800137e 0x00000002 PAD + 0x08001380 0x08001380 0x00000084 Code RO 207 .text.gpio_init at32f435_437_gpio.o + 0x08001404 0x08001404 0x0000002e Code RO 231 .text.gpio_pin_mux_config at32f435_437_gpio.o + 0x08001432 0x08001432 0x00000002 PAD + 0x08001434 0x08001434 0x0000014c Code RO 2 .text.main main.o + 0x08001580 0x08001580 0x00000094 Code RO 50 .text.system_clock_config at32f435_437_clock.o + 0x08001614 0x08001614 0x0000008c Code RO 107 .text.system_core_clock_update system_at32f435_437.o + 0x080016a0 0x080016a0 0x0000006e Code RO 64 .text.uart_print_init at32f435_437_board.o + 0x0800170e 0x0800170e 0x00000002 PAD + 0x08001710 0x08001710 0x00000008 Code RO 309 .text.usart_data_transmit at32f435_437_usart.o + 0x08001718 0x08001718 0x00000012 Code RO 283 .text.usart_enable at32f435_437_usart.o + 0x0800172a 0x0800172a 0x00000002 PAD + 0x0800172c 0x0800172c 0x0000000a Code RO 331 .text.usart_flag_get at32f435_437_usart.o + 0x08001736 0x08001736 0x00000002 PAD + 0x08001738 0x08001738 0x000000a6 Code RO 279 .text.usart_init at32f435_437_usart.o + 0x080017de 0x080017de 0x00000002 PAD + 0x080017e0 0x080017e0 0x00000012 Code RO 285 .text.usart_transmitter_enable at32f435_437_usart.o + 0x080017f2 0x080017f2 0x0000003e Code RO 1701 CL$$btod_d2e c_w.l(btod.o) + 0x08001830 0x08001830 0x00000046 Code RO 1703 CL$$btod_d2e_denorm_low c_w.l(btod.o) + 0x08001876 0x08001876 0x00000060 Code RO 1702 CL$$btod_d2e_norm_op1 c_w.l(btod.o) + 0x080018d6 0x080018d6 0x00000338 Code RO 1711 CL$$btod_div_common c_w.l(btod.o) + 0x08001c0e 0x08001c0e 0x000000dc Code RO 1708 CL$$btod_e2e c_w.l(btod.o) + 0x08001cea 0x08001cea 0x0000002a Code RO 1705 CL$$btod_ediv c_w.l(btod.o) + 0x08001d14 0x08001d14 0x0000002a Code RO 1704 CL$$btod_emul c_w.l(btod.o) + 0x08001d3e 0x08001d3e 0x00000244 Code RO 1710 CL$$btod_mult_common c_w.l(btod.o) + 0x08001f82 0x08001f82 0x00000030 Code RO 1734 i.__ARM_fpclassify m_wm.l(fpclassify.o) + 0x08001fb2 0x08001fb2 0x0000003a Code RO 1573 i.__hardfp_sqrtf m_wm.l(sqrtf.o) + 0x08001fec 0x08001fec 0x0000002c Code RO 1730 locale$$code c_w.l(lc_numeric_c.o) + 0x08002018 0x08002018 0x0000000c Code RO 1623 x$fpl$dretinf fz_wm.l(dretinf.o) + 0x08002024 0x08002024 0x00000056 Code RO 1509 x$fpl$f2d fz_wm.l(f2d.o) + 0x0800207a 0x0800207a 0x0000008c Code RO 1625 x$fpl$fnaninf fz_wm.l(fnaninf.o) + 0x08002106 0x08002106 0x0000001a Code RO 1816 x$fpl$fpinit fz_wm.l(fpinit.o) + 0x08002120 0x08002120 0x00000004 Code RO 1515 x$fpl$printf1 fz_wm.l(printf1.o) + 0x08002124 0x08002124 0x00000000 Code RO 1631 x$fpl$usenofp fz_wm.l(usenofp.o) + 0x08002124 0x08002124 0x00000094 Data RO 1699 .constdata c_w.l(bigflt0.o) + 0x080021b8 0x080021b8 0x00000008 Data RO 11 .rodata..L__const.main.dstC main.o + 0x080021c0 0x080021c0 0x00000008 Data RO 8 .rodata..L__const.main.srcA main.o + 0x080021c8 0x080021c8 0x00000008 Data RO 9 .rodata..L__const.main.srcB main.o + 0x080021d0 0x080021d0 0x00000140 Data RO 4 .rodata.testMarks_f32 main.o + 0x08002310 0x08002310 0x00000010 Data RO 5 .rodata.testUnity_f32 main.o + 0x08002320 0x08002320 0x00000020 Data RO 1882 Region$$Table anon$$obj.o + 0x08002340 0x08002340 0x0000001c Data RO 1729 locale$$data c_w.l(lc_numeric_c.o) - Execution Region RW_IRAM1 (Exec base: 0x20000000, Load base: 0x08002368, Size: 0x00000818, Max: 0x00060000, ABSOLUTE) + Execution Region RW_IRAM1 (Exec base: 0x20000000, Load base: 0x08002360, Size: 0x00000818, Max: 0x00060000, ABSOLUTE) Exec Addr Load Addr Size Type Attr Idx E Section Name Object - 0x20000000 0x08002368 0x00000004 Data RW 6 .data.numStudents main.o - 0x20000004 0x0800236c 0x00000004 Data RW 109 .data.system_core_clock system_at32f435_437.o + 0x20000000 0x08002360 0x00000004 Data RW 6 .data.numStudents main.o + 0x20000004 0x08002364 0x00000004 Data RW 109 .data.system_core_clock system_at32f435_437.o 0x20000008 - 0x00000060 Zero RW 1737 .bss c_w.l(libspace.o) 0x20000068 - 0x00000054 Zero RW 96 .bss.__stdout at32f435_437_board.o 0x200000bc - 0x00000004 Zero RW 12 .bss.max_marks main.o @@ -3783,7 +3782,7 @@ Memory Map of the image 0x200000cc - 0x00000004 Zero RW 13 .bss.student_num main.o 0x200000d0 - 0x00000140 Zero RW 10 .bss.testOutput main.o 0x20000210 - 0x00000004 Zero RW 17 .bss.var main.o - 0x20000214 0x08002370 0x00000004 PAD + 0x20000214 0x08002368 0x00000004 PAD 0x20000218 - 0x00000200 Zero RW 118 HEAP startup_at32f435_437.o 0x20000418 - 0x00000400 Zero RW 117 STACK startup_at32f435_437.o @@ -3797,18 +3796,18 @@ Image component sizes 148 0 0 0 84 14952 at32f435_437_board.o 148 0 0 0 0 8562 at32f435_437_clock.o - 694 38 0 0 0 28043 at32f435_437_crm.o + 694 38 0 0 0 28141 at32f435_437_crm.o 192 0 0 0 0 12063 at32f435_437_gpio.o 18 0 0 0 0 1083 at32f435_437_int.o - 220 0 0 0 0 12604 at32f435_437_usart.o + 220 0 0 0 0 12665 at32f435_437_usart.o 332 64 360 4 344 1461 main.o 344 4 0 0 0 43566 matrixfunctions.o 64 26 524 0 1536 1044 startup_at32f435_437.o 920 12 0 0 0 23010 statisticsfunctions.o - 248 24 0 4 0 11841 system_at32f435_437.o + 244 24 0 4 0 11833 system_at32f435_437.o ---------------------------------------------------------------------- - 3378 168 916 8 1968 158229 Object Totals + 3374 168 916 8 1968 158380 Object Totals 0 0 32 0 0 0 (incl. Generated) 50 0 0 0 4 0 (incl. Padding) @@ -3863,8 +3862,8 @@ Image component sizes 58 0 0 0 0 136 sqrtf.o ---------------------------------------------------------------------- - 4586 200 180 0 96 3348 Library Totals - 12 0 4 0 0 0 (incl. Padding) + 4586 200 176 0 96 3348 Library Totals + 12 0 0 0 0 0 (incl. Padding) ---------------------------------------------------------------------- @@ -3875,7 +3874,7 @@ Image component sizes 106 0 0 0 0 260 m_wm.l ---------------------------------------------------------------------- - 4586 200 180 0 96 3348 Library Totals + 4586 200 176 0 96 3348 Library Totals ---------------------------------------------------------------------- @@ -3884,15 +3883,15 @@ Image component sizes Code (inc. data) RO Data RW Data ZI Data Debug - 7964 368 1096 8 2064 159633 Grand Totals - 7964 368 1096 8 2064 159633 ELF Image Totals - 7964 368 1096 8 0 0 ROM Totals + 7960 368 1092 8 2064 159784 Grand Totals + 7960 368 1092 8 2064 159784 ELF Image Totals + 7960 368 1092 8 0 0 ROM Totals ============================================================================== - Total RO Size (Code + RO Data) 9060 ( 8.85kB) + Total RO Size (Code + RO Data) 9052 ( 8.84kB) Total RW Size (RW Data + ZI Data) 2072 ( 2.02kB) - Total ROM Size (Code + RO Data + RW Data) 9068 ( 8.86kB) + Total ROM Size (Code + RO Data + RW Data) 9060 ( 8.85kB) ============================================================================== diff --git a/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Listings/startup_at32f435_437.lst b/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Listings/startup_at32f435_437.lst index fbbb4995..b5c5f052 100644 --- a/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Listings/startup_at32f435_437.lst +++ b/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Listings/startup_at32f435_437.lst @@ -7,8 +7,8 @@ ARM Macro Assembler Page 1 1 00000000 ;******************************************************* ******************* 2 00000000 ;* @file startup_at32f435_437.s - 3 00000000 ;* @version v2.0.8 - 4 00000000 ;* @date 2022-04-25 + 3 00000000 ;* @version v2.0.9 + 4 00000000 ;* @date 2022-06-28 5 00000000 ;* @brief at32f435_437 startup file for keil 6 00000000 ;******************************************************* ******************* diff --git a/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/at32f435_437_board.o b/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/at32f435_437_board.o index be7fd85e..243feaf1 100644 Binary files a/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/at32f435_437_board.o and b/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/at32f435_437_board.o differ diff --git a/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/at32f435_437_clock.o b/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/at32f435_437_clock.o index c2cf7c76..310a2b1c 100644 Binary files a/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/at32f435_437_clock.o and b/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/at32f435_437_clock.o differ diff --git a/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/at32f435_437_crm.o b/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/at32f435_437_crm.o index a6def3e9..57dc8f1a 100644 Binary files a/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/at32f435_437_crm.o and b/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/at32f435_437_crm.o differ diff --git a/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/at32f435_437_gpio.o b/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/at32f435_437_gpio.o index 4a38ca2d..891a4bd1 100644 Binary files a/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/at32f435_437_gpio.o and b/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/at32f435_437_gpio.o differ diff --git a/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/at32f435_437_int.o b/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/at32f435_437_int.o index 14634746..338e8820 100644 Binary files a/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/at32f435_437_int.o and b/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/at32f435_437_int.o differ diff --git a/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/at32f435_437_misc.o b/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/at32f435_437_misc.o index 0d88204a..d9354ae5 100644 Binary files a/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/at32f435_437_misc.o and b/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/at32f435_437_misc.o differ diff --git a/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/at32f435_437_usart.o b/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/at32f435_437_usart.o index c4fc7896..ef05dd69 100644 Binary files a/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/at32f435_437_usart.o and b/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/at32f435_437_usart.o differ diff --git a/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/basicmathfunctions.o b/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/basicmathfunctions.o index 2aac7766..75c48107 100644 Binary files a/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/basicmathfunctions.o and b/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/basicmathfunctions.o differ diff --git a/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/bayesfunctions.o b/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/bayesfunctions.o index d4b7e729..3b4f214e 100644 Binary files a/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/bayesfunctions.o and b/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/bayesfunctions.o differ diff --git a/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/cmsis_dsp.axf b/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/cmsis_dsp.axf index 3af128e0..e3d78e5b 100644 Binary files a/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/cmsis_dsp.axf and b/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/cmsis_dsp.axf differ diff --git a/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/cmsis_dsp.build_log.htm b/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/cmsis_dsp.build_log.htm index 6f7026f2..84db4009 100644 --- a/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/cmsis_dsp.build_log.htm +++ b/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/cmsis_dsp.build_log.htm @@ -21,37 +21,37 @@ Target DLL: UL2CM3.DLL V1.163.4.0 Dialog DLL: TCM.DLL V1.46.0.0

Project:

-F:\WorkSrc\BSPs_PACKs\package_shell\AT32F435_437_Firmware_Library_V2.0.8\project\at_start_f435\examples\cortex_m4\cmsis_dsp\mdk_v5\cmsis_dsp.uvprojx -Project File Date: 04/26/2022 +F:\WorkSrc\BSPs_PACKs\package_shell\AT32F435_437_Firmware_Library_V2.0.9\project\at_start_f435\examples\cortex_m4\cmsis_dsp\mdk_v5\cmsis_dsp.uvprojx +Project File Date: 06/28/2022

Output:

*** Using Compiler 'V6.14', folder: 'C:\Keil_v5\ARM\ARMCLANG\Bin' Build target 'cmsis_dsp' assembling startup_at32f435_437.s... compiling at32f435_437_int.c... -compiling main.c... -compiling at32f435_437_clock.c... -compiling system_at32f435_437.c... -compiling at32f435_437_misc.c... compiling at32f435_437_gpio.c... -compiling BayesFunctions.c... +compiling system_at32f435_437.c... compiling at32f435_437_board.c... -compiling at32f435_437_crm.c... +compiling at32f435_437_clock.c... +compiling at32f435_437_misc.c... compiling at32f435_437_usart.c... +compiling at32f435_437_crm.c... +compiling main.c... compiling BasicMathFunctions.c... +compiling BayesFunctions.c... compiling ControllerFunctions.c... -compiling FastMathFunctions.c... -compiling SVMFunctions.c... -compiling DistanceFunctions.c... compiling ComplexMathFunctions.c... -compiling StatisticsFunctions.c... -compiling SupportFunctions.c... -compiling MatrixFunctions.c... +compiling FastMathFunctions.c... +compiling DistanceFunctions.c... compiling CommonTables.c... +compiling SVMFunctions.c... +compiling MatrixFunctions.c... +compiling SupportFunctions.c... +compiling StatisticsFunctions.c... compiling TransformFunctions.c... compiling FilteringFunctions.c... linking... -Program Size: Code=7964 RO-data=1096 RW-data=8 ZI-data=2064 +Program Size: Code=7960 RO-data=1092 RW-data=8 ZI-data=2064 FromELF: creating hex file... ".\Objects\cmsis_dsp.axf" - 0 Error(s), 0 Warning(s). @@ -66,7 +66,7 @@ Package Vendor: ArteryTek C:\Users\sheltonyu\AppData\Local\Arm\Packs\ArteryTek\AT32F435_437_DFP\2.0.1\Device\Include

Collection of Component Files used:

-Build Time Elapsed: 00:00:04 +Build Time Elapsed: 00:00:06 diff --git a/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/cmsis_dsp.hex b/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/cmsis_dsp.hex index 236854e9..bb0a245b 100644 --- a/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/cmsis_dsp.hex +++ b/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/cmsis_dsp.hex @@ -1,6 +1,6 @@ :020000040800F2 :1000000018080020C5020008150B00080D0B000899 -:10001000110B0008050B0008910B00080000000000 +:10001000110B0008050B00088D0B00080000000004 :100020000000000000000000000000001D0B0008A0 :10003000090B000800000000190B0008210B000844 :10004000DF020008DF020008DF020008DF0200080C @@ -35,15 +35,15 @@ :1002100000F049F80AA090E8000C82448344AAF157 :100220000107DA4501D100F03EF8AFF2090EBAE855 :100230000F0013F0010F18BFFB1A43F0010318471A -:10024000E820000008210000103A24BF78C878C1D7 +:10024000E020000000210000103A24BF78C878C1E7 :10025000FAD8520724BF30C830C144BF04680C60CC :10026000704700000023002400250026103A28BF14 :1002700078C1FBD8520728BF30C148BF0B60704718 -:10028000662901F04F87002070471FB501F03DFF40 -:1002900000F0AAFA04000020002101F0A9FEE060AD +:10028000662901F04D87002070471FB501F03BFF44 +:1002900000F0AAFA04000020002101F0A7FEE060AF :1002A0001FBD10B510BD00F0BFFB1146FFF7EDFFFD -:1002B00001F0C2F800F0DDFB03B4FFF7F2FF03BC6E -:1002C00000F068FC0948804709480047FEE7FEE760 +:1002B00001F0C0F800F0DDFB03B4FFF7F2FF03BC70 +:1002C00000F066FC0948804709480047FEE7FEE762 :1002D000FEE7FEE7FEE7FEE7FEE7FEE7FEE7FEE7F6 :1002E00004480549054A064B70470000250B0008E5 :1002F0000D02000818020020180800201804002031 @@ -69,11 +69,11 @@ :10043000FBDB30460022002121540B99C1F80880D3 :10044000C1E900200FB0BDE8F08FBD1B6D1CDEE7D9 :100450004A4600DA694206A800F06CFA06AB93E857 -:10046000070003AB83E8070050460A9901F0C3F97F +:10046000070003AB83E8070050460A9901F0C1F981 :100470008DE80700A0F500501F3800900398002D6C :100480000ADD42F21F014A460844002303A90390F3 -:10049000684601F02CFC09E0A0F500504A461F38E0 -:1004A000002303A90390684601F036FC8DE807009D +:10049000684601F02AFC09E0A0F500504A461F38E2 +:1004A000002303A90390684601F034FC8DE807009F :1004B0000004000C03D04FF0FF30410800E010466C :1004C000B8F1000F03D00022009215461EE0751E01 :1004D00005D400F091F9303262556D1EF9D5B3465E @@ -86,7 +86,7 @@ :100540000B98099AC0F80880C0E9002B7AE71126B9 :100550004FF0000857E72DE9F04F88460446D21DBA :1005600022F0070191B0D1E90001CDE90A0101F0C3 -:100570000AFD02460B98C00F01D02D2007E020682D +:1005700008FD02460B98C00F01D02D2007E020682F :10058000810701D52B2002E0202101EAC000032AC7 :10059000099001D0072A05DB03464146204600F0BA :1005A00089F90BE12078800601D5E06900E006209A @@ -125,7 +125,7 @@ :1007B000A7F10107F3DC2046AFF30080032011B05E :1007C00041E60000074B70B50D467B4400F05FF832 :1007D0000446284600F020F910B14FF0FF3070BDFC -:1007E000204670BD830B00000048704728000020A1 +:1007E000204670BD7F0B00000048704728000020A5 :1007F000004870470800002030B5B0F10A0271F1DE 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+:1022B0000000004200008E4200003C4200009A42B2 +:1022C0000000F841000048420000444200000C4277 +:1022D00000007C4200008642000020420000F841DD +:1022E0000000E841000088420000744200001842EB +:1022F0000000F8410000E0410000E0410000984289 +:1023000000005C42000004420000E84100001C4262 +:102310000000803F0000803F0000803F0000803FC1 +:1023200060230008000000200800000048020008A8 +:10233000682300080800002010080000640200085C +:102340001C00000043000000F8FFFFFF0C0000002D +:102350000E0000000F0000002E0000000000000032 +:082360001400000000127A00D5 :040000050800020DE0 :00000001FF diff --git a/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/cmsis_dsp.htm b/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/cmsis_dsp.htm index 31a2a6dd..ebb21af9 100644 --- a/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/cmsis_dsp.htm +++ b/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/cmsis_dsp.htm @@ -3,7 +3,7 @@ Static Call Graph - [.\Objects\cmsis_dsp.axf]

Static Call Graph for image .\Objects\cmsis_dsp.axf

-

#<CALLGRAPH># ARM Linker, 6140002: Last Updated: Tue Apr 26 09:50:53 2022 +

#<CALLGRAPH># ARM Linker, 6140002: Last Updated: Tue Jun 28 20:18:26 2022

Maximum Stack Usage = 324 bytes + Unknown(Functions without stacksize, Cycles, Untraceable Function Pointers)

Call chain for Maximum Stack Depth:

@@ -782,7 +782,7 @@ Global Symbols

SysTick_Handler (Thumb, 2 bytes, Stack size 0 bytes, at32f435_437_int.o(.text.SysTick_Handler))
[Address Reference Count : 1]

-

SystemInit (Thumb, 108 bytes, Stack size 0 bytes, system_at32f435_437.o(.text.SystemInit)) +

SystemInit (Thumb, 104 bytes, Stack size 0 bytes, system_at32f435_437.o(.text.SystemInit))
[Address Reference Count : 1]

UsageFault_Handler (Thumb, 2 bytes, Stack size 0 bytes, at32f435_437_int.o(.text.UsageFault_Handler)) diff --git a/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/commontables.o b/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/commontables.o index a6c91cf9..49f9fca9 100644 Binary files a/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/commontables.o and b/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/commontables.o differ diff --git a/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/complexmathfunctions.o b/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/complexmathfunctions.o index 6b7dafb7..8b444ac8 100644 Binary files a/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/complexmathfunctions.o and b/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/complexmathfunctions.o differ diff --git a/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/controllerfunctions.o b/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/controllerfunctions.o index eb2b2c1c..5a104b98 100644 Binary files a/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/controllerfunctions.o and b/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/controllerfunctions.o differ diff --git a/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/distancefunctions.o b/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/distancefunctions.o index 8840e601..709f39e3 100644 Binary files a/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/distancefunctions.o and b/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/distancefunctions.o differ diff --git a/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/fastmathfunctions.o b/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/fastmathfunctions.o index 263ec81c..f7dea055 100644 Binary files a/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/fastmathfunctions.o and b/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/fastmathfunctions.o differ diff --git a/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/filteringfunctions.o b/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/filteringfunctions.o index a652ab4c..c9de0146 100644 Binary files a/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/filteringfunctions.o and b/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/filteringfunctions.o differ diff --git a/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/main.o b/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/main.o index ec7aca90..d22f13f8 100644 Binary files a/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/main.o and b/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/main.o differ diff --git a/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/matrixfunctions.o b/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/matrixfunctions.o index 5154f41f..dd3621d7 100644 Binary files a/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/matrixfunctions.o and b/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/matrixfunctions.o differ diff --git a/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/startup_at32f435_437.o b/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/startup_at32f435_437.o index ff8e4ff2..aade732e 100644 Binary files a/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/startup_at32f435_437.o and b/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/startup_at32f435_437.o differ diff --git a/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/statisticsfunctions.o b/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/statisticsfunctions.o index 5d4a2b63..8ce63195 100644 Binary files a/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/statisticsfunctions.o and b/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/statisticsfunctions.o differ diff --git a/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/supportfunctions.o b/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/supportfunctions.o index 18adf616..705b054b 100644 Binary files a/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/supportfunctions.o and b/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/supportfunctions.o differ diff --git a/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/svmfunctions.o b/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/svmfunctions.o index 97013af4..d4f1de7b 100644 Binary files a/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/svmfunctions.o and b/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/svmfunctions.o differ diff --git a/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/system_at32f435_437.o b/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/system_at32f435_437.o index 71e1748a..037f903a 100644 Binary files a/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/system_at32f435_437.o and b/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/system_at32f435_437.o differ diff --git a/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/transformfunctions.o b/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/transformfunctions.o index 069e53dc..d91f5451 100644 Binary files a/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/transformfunctions.o and b/project/at_start_f435/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/transformfunctions.o differ diff --git a/project/at_start_f435/examples/cortex_m4/cmsis_dsp/readme.txt b/project/at_start_f435/examples/cortex_m4/cmsis_dsp/readme.txt index 5c1c94f4..79a4f994 100644 --- a/project/at_start_f435/examples/cortex_m4/cmsis_dsp/readme.txt +++ b/project/at_start_f435/examples/cortex_m4/cmsis_dsp/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/cortex_m4/cmsis_dsp/src/at32f435_437_clock.c b/project/at_start_f435/examples/cortex_m4/cmsis_dsp/src/at32f435_437_clock.c index b247096a..f8100c98 100644 --- a/project/at_start_f435/examples/cortex_m4/cmsis_dsp/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/cortex_m4/cmsis_dsp/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/cortex_m4/cmsis_dsp/src/at32f435_437_int.c b/project/at_start_f435/examples/cortex_m4/cmsis_dsp/src/at32f435_437_int.c index 039b6ffa..16cb45df 100644 --- a/project/at_start_f435/examples/cortex_m4/cmsis_dsp/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/cortex_m4/cmsis_dsp/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/cortex_m4/cmsis_dsp/src/main.c b/project/at_start_f435/examples/cortex_m4/cmsis_dsp/src/main.c index 4169be63..1c478c20 100644 --- a/project/at_start_f435/examples/cortex_m4/cmsis_dsp/src/main.c +++ b/project/at_start_f435/examples/cortex_m4/cmsis_dsp/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/cortex_m4/fpu/inc/at32f435_437_clock.h b/project/at_start_f435/examples/cortex_m4/fpu/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/cortex_m4/fpu/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/cortex_m4/fpu/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/cortex_m4/fpu/inc/at32f435_437_conf.h b/project/at_start_f435/examples/cortex_m4/fpu/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/cortex_m4/fpu/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/cortex_m4/fpu/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/cortex_m4/fpu/inc/at32f435_437_int.h b/project/at_start_f435/examples/cortex_m4/fpu/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/cortex_m4/fpu/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/cortex_m4/fpu/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/cortex_m4/fpu/inc/julia_fpu.h b/project/at_start_f435/examples/cortex_m4/fpu/inc/julia_fpu.h index d796a19d..92d833f7 100644 --- a/project/at_start_f435/examples/cortex_m4/fpu/inc/julia_fpu.h +++ b/project/at_start_f435/examples/cortex_m4/fpu/inc/julia_fpu.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file julia_fpu.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief julia_fpu header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/cortex_m4/fpu/readme.txt b/project/at_start_f435/examples/cortex_m4/fpu/readme.txt index 721e46e2..e463ffe3 100644 --- a/project/at_start_f435/examples/cortex_m4/fpu/readme.txt +++ b/project/at_start_f435/examples/cortex_m4/fpu/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/cortex_m4/fpu/src/at32f435_437_clock.c b/project/at_start_f435/examples/cortex_m4/fpu/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/cortex_m4/fpu/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/cortex_m4/fpu/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/cortex_m4/fpu/src/at32f435_437_int.c b/project/at_start_f435/examples/cortex_m4/fpu/src/at32f435_437_int.c index 03d40521..0a717ede 100644 --- a/project/at_start_f435/examples/cortex_m4/fpu/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/cortex_m4/fpu/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/cortex_m4/fpu/src/julia_fpu.c b/project/at_start_f435/examples/cortex_m4/fpu/src/julia_fpu.c index dd207213..0044bb02 100644 --- a/project/at_start_f435/examples/cortex_m4/fpu/src/julia_fpu.c +++ b/project/at_start_f435/examples/cortex_m4/fpu/src/julia_fpu.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file julia_fpu.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief julia_fpu source file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/cortex_m4/fpu/src/main.c b/project/at_start_f435/examples/cortex_m4/fpu/src/main.c index 97464d5c..9c3dc83e 100644 --- a/project/at_start_f435/examples/cortex_m4/fpu/src/main.c +++ b/project/at_start_f435/examples/cortex_m4/fpu/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/cortex_m4/systick_interrupt/inc/at32f435_437_clock.h b/project/at_start_f435/examples/cortex_m4/systick_interrupt/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/cortex_m4/systick_interrupt/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/cortex_m4/systick_interrupt/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/cortex_m4/systick_interrupt/inc/at32f435_437_conf.h b/project/at_start_f435/examples/cortex_m4/systick_interrupt/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/cortex_m4/systick_interrupt/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/cortex_m4/systick_interrupt/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/cortex_m4/systick_interrupt/inc/at32f435_437_int.h b/project/at_start_f435/examples/cortex_m4/systick_interrupt/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/cortex_m4/systick_interrupt/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/cortex_m4/systick_interrupt/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/cortex_m4/systick_interrupt/readme.txt b/project/at_start_f435/examples/cortex_m4/systick_interrupt/readme.txt index 8ad44560..e7612acb 100644 --- a/project/at_start_f435/examples/cortex_m4/systick_interrupt/readme.txt +++ b/project/at_start_f435/examples/cortex_m4/systick_interrupt/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/cortex_m4/systick_interrupt/src/at32f435_437_clock.c b/project/at_start_f435/examples/cortex_m4/systick_interrupt/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/cortex_m4/systick_interrupt/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/cortex_m4/systick_interrupt/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/cortex_m4/systick_interrupt/src/at32f435_437_int.c b/project/at_start_f435/examples/cortex_m4/systick_interrupt/src/at32f435_437_int.c index d40e6430..03c0bacd 100644 --- a/project/at_start_f435/examples/cortex_m4/systick_interrupt/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/cortex_m4/systick_interrupt/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/cortex_m4/systick_interrupt/src/main.c b/project/at_start_f435/examples/cortex_m4/systick_interrupt/src/main.c index 1a763fae..5d3f8020 100644 --- a/project/at_start_f435/examples/cortex_m4/systick_interrupt/src/main.c +++ b/project/at_start_f435/examples/cortex_m4/systick_interrupt/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/crc/calculation/inc/at32f435_437_clock.h b/project/at_start_f435/examples/crc/calculation/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/crc/calculation/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/crc/calculation/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/crc/calculation/inc/at32f435_437_conf.h b/project/at_start_f435/examples/crc/calculation/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/crc/calculation/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/crc/calculation/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/crc/calculation/inc/at32f435_437_int.h b/project/at_start_f435/examples/crc/calculation/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/crc/calculation/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/crc/calculation/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/crc/calculation/readme.txt b/project/at_start_f435/examples/crc/calculation/readme.txt index c0aa7dfa..608c9d38 100644 --- a/project/at_start_f435/examples/crc/calculation/readme.txt +++ b/project/at_start_f435/examples/crc/calculation/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/crc/calculation/src/at32f435_437_clock.c b/project/at_start_f435/examples/crc/calculation/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/crc/calculation/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/crc/calculation/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/crc/calculation/src/at32f435_437_int.c b/project/at_start_f435/examples/crc/calculation/src/at32f435_437_int.c index 9ee8ffd3..d4348505 100644 --- a/project/at_start_f435/examples/crc/calculation/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/crc/calculation/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/crc/calculation/src/main.c b/project/at_start_f435/examples/crc/calculation/src/main.c index 32798f29..a3fdaa4f 100644 --- a/project/at_start_f435/examples/crc/calculation/src/main.c +++ b/project/at_start_f435/examples/crc/calculation/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/crm/clock_failure_detection/inc/at32f435_437_clock.h b/project/at_start_f435/examples/crm/clock_failure_detection/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/crm/clock_failure_detection/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/crm/clock_failure_detection/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/crm/clock_failure_detection/inc/at32f435_437_conf.h b/project/at_start_f435/examples/crm/clock_failure_detection/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/crm/clock_failure_detection/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/crm/clock_failure_detection/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/crm/clock_failure_detection/inc/at32f435_437_int.h b/project/at_start_f435/examples/crm/clock_failure_detection/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/crm/clock_failure_detection/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/crm/clock_failure_detection/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/crm/clock_failure_detection/readme.txt b/project/at_start_f435/examples/crm/clock_failure_detection/readme.txt index cca575ad..8a15e917 100644 --- a/project/at_start_f435/examples/crm/clock_failure_detection/readme.txt +++ b/project/at_start_f435/examples/crm/clock_failure_detection/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/crm/clock_failure_detection/src/at32f435_437_clock.c b/project/at_start_f435/examples/crm/clock_failure_detection/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/crm/clock_failure_detection/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/crm/clock_failure_detection/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/crm/clock_failure_detection/src/at32f435_437_int.c b/project/at_start_f435/examples/crm/clock_failure_detection/src/at32f435_437_int.c index 0461dd06..b1af17cf 100644 --- a/project/at_start_f435/examples/crm/clock_failure_detection/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/crm/clock_failure_detection/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/crm/clock_failure_detection/src/main.c b/project/at_start_f435/examples/crm/clock_failure_detection/src/main.c index 991640a8..14062212 100644 --- a/project/at_start_f435/examples/crm/clock_failure_detection/src/main.c +++ b/project/at_start_f435/examples/crm/clock_failure_detection/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/crm/pll_parameter_calculate/inc/at32f435_437_clock.h b/project/at_start_f435/examples/crm/pll_parameter_calculate/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/crm/pll_parameter_calculate/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/crm/pll_parameter_calculate/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/crm/pll_parameter_calculate/inc/at32f435_437_conf.h b/project/at_start_f435/examples/crm/pll_parameter_calculate/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/crm/pll_parameter_calculate/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/crm/pll_parameter_calculate/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/crm/pll_parameter_calculate/inc/at32f435_437_int.h b/project/at_start_f435/examples/crm/pll_parameter_calculate/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/crm/pll_parameter_calculate/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/crm/pll_parameter_calculate/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/crm/pll_parameter_calculate/readme.txt b/project/at_start_f435/examples/crm/pll_parameter_calculate/readme.txt index 9f286dff..f8c84d47 100644 --- a/project/at_start_f435/examples/crm/pll_parameter_calculate/readme.txt +++ b/project/at_start_f435/examples/crm/pll_parameter_calculate/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/crm/pll_parameter_calculate/src/at32f435_437_clock.c b/project/at_start_f435/examples/crm/pll_parameter_calculate/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/crm/pll_parameter_calculate/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/crm/pll_parameter_calculate/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/crm/pll_parameter_calculate/src/at32f435_437_int.c b/project/at_start_f435/examples/crm/pll_parameter_calculate/src/at32f435_437_int.c index 3fc95ac6..fe44d45b 100644 --- a/project/at_start_f435/examples/crm/pll_parameter_calculate/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/crm/pll_parameter_calculate/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/crm/pll_parameter_calculate/src/main.c b/project/at_start_f435/examples/crm/pll_parameter_calculate/src/main.c index ed21e610..ae25fc26 100644 --- a/project/at_start_f435/examples/crm/pll_parameter_calculate/src/main.c +++ b/project/at_start_f435/examples/crm/pll_parameter_calculate/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/crm/sysclk_switch/inc/at32f435_437_clock.h b/project/at_start_f435/examples/crm/sysclk_switch/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/crm/sysclk_switch/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/crm/sysclk_switch/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/crm/sysclk_switch/inc/at32f435_437_conf.h b/project/at_start_f435/examples/crm/sysclk_switch/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/crm/sysclk_switch/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/crm/sysclk_switch/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/crm/sysclk_switch/inc/at32f435_437_int.h b/project/at_start_f435/examples/crm/sysclk_switch/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/crm/sysclk_switch/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/crm/sysclk_switch/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/crm/sysclk_switch/readme.txt b/project/at_start_f435/examples/crm/sysclk_switch/readme.txt index 43c40a1f..564b569f 100644 --- a/project/at_start_f435/examples/crm/sysclk_switch/readme.txt +++ b/project/at_start_f435/examples/crm/sysclk_switch/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/crm/sysclk_switch/src/at32f435_437_clock.c b/project/at_start_f435/examples/crm/sysclk_switch/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/crm/sysclk_switch/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/crm/sysclk_switch/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/crm/sysclk_switch/src/at32f435_437_int.c b/project/at_start_f435/examples/crm/sysclk_switch/src/at32f435_437_int.c index 13d68c30..63cfa527 100644 --- a/project/at_start_f435/examples/crm/sysclk_switch/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/crm/sysclk_switch/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/crm/sysclk_switch/src/main.c b/project/at_start_f435/examples/crm/sysclk_switch/src/main.c index bcebdabc..a6be6752 100644 --- a/project/at_start_f435/examples/crm/sysclk_switch/src/main.c +++ b/project/at_start_f435/examples/crm/sysclk_switch/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/dac/double_mode_dma_sinewave/inc/at32f435_437_clock.h b/project/at_start_f435/examples/dac/double_mode_dma_sinewave/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/dac/double_mode_dma_sinewave/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/dac/double_mode_dma_sinewave/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/dac/double_mode_dma_sinewave/inc/at32f435_437_conf.h b/project/at_start_f435/examples/dac/double_mode_dma_sinewave/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/dac/double_mode_dma_sinewave/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/dac/double_mode_dma_sinewave/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/dac/double_mode_dma_sinewave/inc/at32f435_437_int.h b/project/at_start_f435/examples/dac/double_mode_dma_sinewave/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/dac/double_mode_dma_sinewave/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/dac/double_mode_dma_sinewave/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/dac/double_mode_dma_sinewave/readme.txt b/project/at_start_f435/examples/dac/double_mode_dma_sinewave/readme.txt index 850f3244..e573ca52 100644 --- a/project/at_start_f435/examples/dac/double_mode_dma_sinewave/readme.txt +++ b/project/at_start_f435/examples/dac/double_mode_dma_sinewave/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/at32f435_437_clock.c b/project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/at32f435_437_int.c b/project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/at32f435_437_int.c index 57439baf..7d39a808 100644 --- a/project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c b/project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c index 57358d88..ce600c97 100644 --- a/project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c +++ b/project/at_start_f435/examples/dac/double_mode_dma_sinewave/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/dac/double_mode_dma_squarewave/inc/at32f435_437_clock.h b/project/at_start_f435/examples/dac/double_mode_dma_squarewave/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/dac/double_mode_dma_squarewave/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/dac/double_mode_dma_squarewave/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/dac/double_mode_dma_squarewave/inc/at32f435_437_conf.h b/project/at_start_f435/examples/dac/double_mode_dma_squarewave/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/dac/double_mode_dma_squarewave/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/dac/double_mode_dma_squarewave/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/dac/double_mode_dma_squarewave/inc/at32f435_437_int.h b/project/at_start_f435/examples/dac/double_mode_dma_squarewave/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/dac/double_mode_dma_squarewave/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/dac/double_mode_dma_squarewave/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/dac/double_mode_dma_squarewave/readme.txt b/project/at_start_f435/examples/dac/double_mode_dma_squarewave/readme.txt index e54d0413..29189f9a 100644 --- a/project/at_start_f435/examples/dac/double_mode_dma_squarewave/readme.txt +++ b/project/at_start_f435/examples/dac/double_mode_dma_squarewave/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/dac/double_mode_dma_squarewave/src/at32f435_437_clock.c b/project/at_start_f435/examples/dac/double_mode_dma_squarewave/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/dac/double_mode_dma_squarewave/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/dac/double_mode_dma_squarewave/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/dac/double_mode_dma_squarewave/src/at32f435_437_int.c b/project/at_start_f435/examples/dac/double_mode_dma_squarewave/src/at32f435_437_int.c index d61effcb..05423faf 100644 --- a/project/at_start_f435/examples/dac/double_mode_dma_squarewave/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/dac/double_mode_dma_squarewave/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/dac/double_mode_dma_squarewave/src/main.c b/project/at_start_f435/examples/dac/double_mode_dma_squarewave/src/main.c index 8c3fd764..33912bf6 100644 --- a/project/at_start_f435/examples/dac/double_mode_dma_squarewave/src/main.c +++ b/project/at_start_f435/examples/dac/double_mode_dma_squarewave/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/dac/one_dac_dma_escalator/inc/at32f435_437_clock.h b/project/at_start_f435/examples/dac/one_dac_dma_escalator/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/dac/one_dac_dma_escalator/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/dac/one_dac_dma_escalator/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/dac/one_dac_dma_escalator/inc/at32f435_437_conf.h b/project/at_start_f435/examples/dac/one_dac_dma_escalator/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/dac/one_dac_dma_escalator/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/dac/one_dac_dma_escalator/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/dac/one_dac_dma_escalator/inc/at32f435_437_int.h b/project/at_start_f435/examples/dac/one_dac_dma_escalator/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/dac/one_dac_dma_escalator/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/dac/one_dac_dma_escalator/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/dac/one_dac_dma_escalator/readme.txt b/project/at_start_f435/examples/dac/one_dac_dma_escalator/readme.txt index a5ec4f45..9257260f 100644 --- a/project/at_start_f435/examples/dac/one_dac_dma_escalator/readme.txt +++ b/project/at_start_f435/examples/dac/one_dac_dma_escalator/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/dac/one_dac_dma_escalator/src/at32f435_437_clock.c b/project/at_start_f435/examples/dac/one_dac_dma_escalator/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/dac/one_dac_dma_escalator/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/dac/one_dac_dma_escalator/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/dac/one_dac_dma_escalator/src/at32f435_437_int.c b/project/at_start_f435/examples/dac/one_dac_dma_escalator/src/at32f435_437_int.c index cbed02ff..a58815b2 100644 --- a/project/at_start_f435/examples/dac/one_dac_dma_escalator/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/dac/one_dac_dma_escalator/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/dac/one_dac_dma_escalator/src/main.c b/project/at_start_f435/examples/dac/one_dac_dma_escalator/src/main.c index 1c261a3a..56b71e7f 100644 --- a/project/at_start_f435/examples/dac/one_dac_dma_escalator/src/main.c +++ b/project/at_start_f435/examples/dac/one_dac_dma_escalator/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/dac/one_dac_noisewave/inc/at32f435_437_clock.h b/project/at_start_f435/examples/dac/one_dac_noisewave/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/dac/one_dac_noisewave/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/dac/one_dac_noisewave/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/dac/one_dac_noisewave/inc/at32f435_437_conf.h b/project/at_start_f435/examples/dac/one_dac_noisewave/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/dac/one_dac_noisewave/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/dac/one_dac_noisewave/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/dac/one_dac_noisewave/inc/at32f435_437_int.h b/project/at_start_f435/examples/dac/one_dac_noisewave/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/dac/one_dac_noisewave/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/dac/one_dac_noisewave/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/dac/one_dac_noisewave/readme.txt b/project/at_start_f435/examples/dac/one_dac_noisewave/readme.txt index f5e43ccc..37bf29f9 100644 --- a/project/at_start_f435/examples/dac/one_dac_noisewave/readme.txt +++ b/project/at_start_f435/examples/dac/one_dac_noisewave/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/dac/one_dac_noisewave/src/at32f435_437_clock.c b/project/at_start_f435/examples/dac/one_dac_noisewave/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/dac/one_dac_noisewave/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/dac/one_dac_noisewave/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/dac/one_dac_noisewave/src/at32f435_437_int.c b/project/at_start_f435/examples/dac/one_dac_noisewave/src/at32f435_437_int.c index 49f849dd..1a7d5bda 100644 --- a/project/at_start_f435/examples/dac/one_dac_noisewave/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/dac/one_dac_noisewave/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/dac/one_dac_noisewave/src/main.c b/project/at_start_f435/examples/dac/one_dac_noisewave/src/main.c index 1bc2b1cf..faa42947 100644 --- a/project/at_start_f435/examples/dac/one_dac_noisewave/src/main.c +++ b/project/at_start_f435/examples/dac/one_dac_noisewave/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/dac/two_dac_trianglewave/inc/at32f435_437_clock.h b/project/at_start_f435/examples/dac/two_dac_trianglewave/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/dac/two_dac_trianglewave/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/dac/two_dac_trianglewave/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/dac/two_dac_trianglewave/inc/at32f435_437_conf.h b/project/at_start_f435/examples/dac/two_dac_trianglewave/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/dac/two_dac_trianglewave/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/dac/two_dac_trianglewave/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/dac/two_dac_trianglewave/inc/at32f435_437_int.h b/project/at_start_f435/examples/dac/two_dac_trianglewave/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/dac/two_dac_trianglewave/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/dac/two_dac_trianglewave/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/dac/two_dac_trianglewave/readme.txt b/project/at_start_f435/examples/dac/two_dac_trianglewave/readme.txt index 62f12324..dde5e7a3 100644 --- a/project/at_start_f435/examples/dac/two_dac_trianglewave/readme.txt +++ b/project/at_start_f435/examples/dac/two_dac_trianglewave/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/dac/two_dac_trianglewave/src/at32f435_437_clock.c b/project/at_start_f435/examples/dac/two_dac_trianglewave/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/dac/two_dac_trianglewave/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/dac/two_dac_trianglewave/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/dac/two_dac_trianglewave/src/at32f435_437_int.c b/project/at_start_f435/examples/dac/two_dac_trianglewave/src/at32f435_437_int.c index fb654158..4a0ad1e8 100644 --- a/project/at_start_f435/examples/dac/two_dac_trianglewave/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/dac/two_dac_trianglewave/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/dac/two_dac_trianglewave/src/main.c b/project/at_start_f435/examples/dac/two_dac_trianglewave/src/main.c index 4b662c73..f9556768 100644 --- a/project/at_start_f435/examples/dac/two_dac_trianglewave/src/main.c +++ b/project/at_start_f435/examples/dac/two_dac_trianglewave/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/debug/tmr1/inc/at32f435_437_clock.h b/project/at_start_f435/examples/debug/tmr1/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/debug/tmr1/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/debug/tmr1/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/debug/tmr1/inc/at32f435_437_conf.h b/project/at_start_f435/examples/debug/tmr1/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/debug/tmr1/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/debug/tmr1/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/debug/tmr1/inc/at32f435_437_int.h b/project/at_start_f435/examples/debug/tmr1/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/debug/tmr1/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/debug/tmr1/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/debug/tmr1/readme.txt b/project/at_start_f435/examples/debug/tmr1/readme.txt index 9d659c9e..17aafcde 100644 --- a/project/at_start_f435/examples/debug/tmr1/readme.txt +++ b/project/at_start_f435/examples/debug/tmr1/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/debug/tmr1/src/at32f435_437_clock.c b/project/at_start_f435/examples/debug/tmr1/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/debug/tmr1/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/debug/tmr1/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/debug/tmr1/src/at32f435_437_int.c b/project/at_start_f435/examples/debug/tmr1/src/at32f435_437_int.c index 05fd7892..e136c7ce 100644 --- a/project/at_start_f435/examples/debug/tmr1/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/debug/tmr1/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/debug/tmr1/src/main.c b/project/at_start_f435/examples/debug/tmr1/src/main.c index 5c8c0ba3..85853af4 100644 --- a/project/at_start_f435/examples/debug/tmr1/src/main.c +++ b/project/at_start_f435/examples/debug/tmr1/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/dma/dmamux_data_to_gpio/inc/at32f435_437_clock.h b/project/at_start_f435/examples/dma/dmamux_data_to_gpio/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/dma/dmamux_data_to_gpio/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/dma/dmamux_data_to_gpio/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/dma/dmamux_data_to_gpio/inc/at32f435_437_conf.h b/project/at_start_f435/examples/dma/dmamux_data_to_gpio/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/dma/dmamux_data_to_gpio/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/dma/dmamux_data_to_gpio/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/dma/dmamux_data_to_gpio/inc/at32f435_437_int.h b/project/at_start_f435/examples/dma/dmamux_data_to_gpio/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/dma/dmamux_data_to_gpio/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/dma/dmamux_data_to_gpio/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/dma/dmamux_data_to_gpio/readme.txt b/project/at_start_f435/examples/dma/dmamux_data_to_gpio/readme.txt index 2f85577f..9cd5a222 100644 --- a/project/at_start_f435/examples/dma/dmamux_data_to_gpio/readme.txt +++ b/project/at_start_f435/examples/dma/dmamux_data_to_gpio/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/dma/dmamux_data_to_gpio/src/at32f435_437_clock.c b/project/at_start_f435/examples/dma/dmamux_data_to_gpio/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/dma/dmamux_data_to_gpio/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/dma/dmamux_data_to_gpio/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/dma/dmamux_data_to_gpio/src/at32f435_437_int.c b/project/at_start_f435/examples/dma/dmamux_data_to_gpio/src/at32f435_437_int.c index 1e689d84..546d050c 100644 --- a/project/at_start_f435/examples/dma/dmamux_data_to_gpio/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/dma/dmamux_data_to_gpio/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/dma/dmamux_data_to_gpio/src/main.c b/project/at_start_f435/examples/dma/dmamux_data_to_gpio/src/main.c index 76ed3b68..ae8cd7b6 100644 --- a/project/at_start_f435/examples/dma/dmamux_data_to_gpio/src/main.c +++ b/project/at_start_f435/examples/dma/dmamux_data_to_gpio/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/dma/dmamux_genertor_exint/inc/at32f435_437_clock.h b/project/at_start_f435/examples/dma/dmamux_genertor_exint/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/dma/dmamux_genertor_exint/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/dma/dmamux_genertor_exint/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/dma/dmamux_genertor_exint/inc/at32f435_437_conf.h b/project/at_start_f435/examples/dma/dmamux_genertor_exint/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/dma/dmamux_genertor_exint/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/dma/dmamux_genertor_exint/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/dma/dmamux_genertor_exint/inc/at32f435_437_int.h b/project/at_start_f435/examples/dma/dmamux_genertor_exint/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/dma/dmamux_genertor_exint/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/dma/dmamux_genertor_exint/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/dma/dmamux_genertor_exint/readme.txt b/project/at_start_f435/examples/dma/dmamux_genertor_exint/readme.txt index e84baa1f..77129b6a 100644 --- a/project/at_start_f435/examples/dma/dmamux_genertor_exint/readme.txt +++ b/project/at_start_f435/examples/dma/dmamux_genertor_exint/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/dma/dmamux_genertor_exint/src/at32f435_437_clock.c b/project/at_start_f435/examples/dma/dmamux_genertor_exint/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/dma/dmamux_genertor_exint/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/dma/dmamux_genertor_exint/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/dma/dmamux_genertor_exint/src/at32f435_437_int.c b/project/at_start_f435/examples/dma/dmamux_genertor_exint/src/at32f435_437_int.c index 59d47d20..90e079f7 100644 --- a/project/at_start_f435/examples/dma/dmamux_genertor_exint/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/dma/dmamux_genertor_exint/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/dma/dmamux_genertor_exint/src/main.c b/project/at_start_f435/examples/dma/dmamux_genertor_exint/src/main.c index 3d91c8de..671f7ab4 100644 --- a/project/at_start_f435/examples/dma/dmamux_genertor_exint/src/main.c +++ b/project/at_start_f435/examples/dma/dmamux_genertor_exint/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/dma/dmamux_synchronization_exint/inc/at32f435_437_clock.h b/project/at_start_f435/examples/dma/dmamux_synchronization_exint/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/dma/dmamux_synchronization_exint/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/dma/dmamux_synchronization_exint/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/dma/dmamux_synchronization_exint/inc/at32f435_437_conf.h b/project/at_start_f435/examples/dma/dmamux_synchronization_exint/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/dma/dmamux_synchronization_exint/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/dma/dmamux_synchronization_exint/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/dma/dmamux_synchronization_exint/inc/at32f435_437_int.h b/project/at_start_f435/examples/dma/dmamux_synchronization_exint/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/dma/dmamux_synchronization_exint/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/dma/dmamux_synchronization_exint/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/dma/dmamux_synchronization_exint/readme.txt b/project/at_start_f435/examples/dma/dmamux_synchronization_exint/readme.txt index 151f68a1..afc77189 100644 --- a/project/at_start_f435/examples/dma/dmamux_synchronization_exint/readme.txt +++ b/project/at_start_f435/examples/dma/dmamux_synchronization_exint/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/dma/dmamux_synchronization_exint/src/at32f435_437_clock.c b/project/at_start_f435/examples/dma/dmamux_synchronization_exint/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/dma/dmamux_synchronization_exint/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/dma/dmamux_synchronization_exint/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/dma/dmamux_synchronization_exint/src/at32f435_437_int.c b/project/at_start_f435/examples/dma/dmamux_synchronization_exint/src/at32f435_437_int.c index deba7abd..dbde637b 100644 --- a/project/at_start_f435/examples/dma/dmamux_synchronization_exint/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/dma/dmamux_synchronization_exint/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/dma/dmamux_synchronization_exint/src/main.c b/project/at_start_f435/examples/dma/dmamux_synchronization_exint/src/main.c index afcc7c17..dc3e5b51 100644 --- a/project/at_start_f435/examples/dma/dmamux_synchronization_exint/src/main.c +++ b/project/at_start_f435/examples/dma/dmamux_synchronization_exint/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/dma/flash_to_sram/inc/at32f435_437_clock.h b/project/at_start_f435/examples/dma/flash_to_sram/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/dma/flash_to_sram/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/dma/flash_to_sram/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/dma/flash_to_sram/inc/at32f435_437_conf.h b/project/at_start_f435/examples/dma/flash_to_sram/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/dma/flash_to_sram/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/dma/flash_to_sram/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/dma/flash_to_sram/inc/at32f435_437_int.h b/project/at_start_f435/examples/dma/flash_to_sram/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/dma/flash_to_sram/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/dma/flash_to_sram/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/dma/flash_to_sram/readme.txt b/project/at_start_f435/examples/dma/flash_to_sram/readme.txt index e5143bda..20355185 100644 --- a/project/at_start_f435/examples/dma/flash_to_sram/readme.txt +++ b/project/at_start_f435/examples/dma/flash_to_sram/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/dma/flash_to_sram/src/at32f435_437_clock.c b/project/at_start_f435/examples/dma/flash_to_sram/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/dma/flash_to_sram/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/dma/flash_to_sram/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/dma/flash_to_sram/src/at32f435_437_int.c b/project/at_start_f435/examples/dma/flash_to_sram/src/at32f435_437_int.c index ee7548b9..e6d618c4 100644 --- a/project/at_start_f435/examples/dma/flash_to_sram/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/dma/flash_to_sram/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/dma/flash_to_sram/src/main.c b/project/at_start_f435/examples/dma/flash_to_sram/src/main.c index a1f3b7b0..2966be48 100644 --- a/project/at_start_f435/examples/dma/flash_to_sram/src/main.c +++ b/project/at_start_f435/examples/dma/flash_to_sram/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/dvp/ov2640_capture/hardware/dvp/dvp.c b/project/at_start_f435/examples/dvp/ov2640_capture/hardware/dvp/dvp.c index af277b4a..d8ec7b3b 100644 --- a/project/at_start_f435/examples/dvp/ov2640_capture/hardware/dvp/dvp.c +++ b/project/at_start_f435/examples/dvp/ov2640_capture/hardware/dvp/dvp.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file dvp.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief dvp program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/dvp/ov2640_capture/hardware/dvp/dvp.h b/project/at_start_f435/examples/dvp/ov2640_capture/hardware/dvp/dvp.h index 512bc65a..ec0237e6 100644 --- a/project/at_start_f435/examples/dvp/ov2640_capture/hardware/dvp/dvp.h +++ b/project/at_start_f435/examples/dvp/ov2640_capture/hardware/dvp/dvp.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file dvp.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of dvp program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/dvp/ov2640_capture/hardware/lcd/font.h b/project/at_start_f435/examples/dvp/ov2640_capture/hardware/lcd/font.h index 37cf3dfd..fb767d1f 100644 --- a/project/at_start_f435/examples/dvp/ov2640_capture/hardware/lcd/font.h +++ b/project/at_start_f435/examples/dvp/ov2640_capture/hardware/lcd/font.h @@ -1,8 +1,8 @@ /* * ************************************************************************** * @file font.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of font ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/dvp/ov2640_capture/hardware/lcd/xmc_lcd.c b/project/at_start_f435/examples/dvp/ov2640_capture/hardware/lcd/xmc_lcd.c index 5a6c17b7..80bdb5ed 100644 --- a/project/at_start_f435/examples/dvp/ov2640_capture/hardware/lcd/xmc_lcd.c +++ b/project/at_start_f435/examples/dvp/ov2640_capture/hardware/lcd/xmc_lcd.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file xmc_lcd.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief xmc_lcd program file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/dvp/ov2640_capture/hardware/lcd/xmc_lcd.h b/project/at_start_f435/examples/dvp/ov2640_capture/hardware/lcd/xmc_lcd.h index bc12403e..026858cb 100644 --- a/project/at_start_f435/examples/dvp/ov2640_capture/hardware/lcd/xmc_lcd.h +++ b/project/at_start_f435/examples/dvp/ov2640_capture/hardware/lcd/xmc_lcd.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file xmc_lcd.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief xmc_lcd program header ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/dvp/ov2640_capture/hardware/ov2640/ov2640.c b/project/at_start_f435/examples/dvp/ov2640_capture/hardware/ov2640/ov2640.c index 04888b48..c9d261e4 100644 --- a/project/at_start_f435/examples/dvp/ov2640_capture/hardware/ov2640/ov2640.c +++ b/project/at_start_f435/examples/dvp/ov2640_capture/hardware/ov2640/ov2640.c @@ -526,7 +526,7 @@ void i2c_lowlevel_init(i2c_handle_type* hi2c) dmamux_enable(DMA1, TRUE); /* config i2c */ - i2c_init(hi2c->i2cx, 0, I2Cx_CLKCTRL); + i2c_init(hi2c->i2cx, 0x0F, I2Cx_CLKCTRL); i2c_own_address1_set(hi2c->i2cx, I2C_ADDRESS_MODE_7BIT, I2Cx_ADDRESS); } diff --git a/project/at_start_f435/examples/dvp/ov2640_capture/inc/at32f435_437_clock.h b/project/at_start_f435/examples/dvp/ov2640_capture/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/dvp/ov2640_capture/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/dvp/ov2640_capture/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/dvp/ov2640_capture/inc/at32f435_437_conf.h b/project/at_start_f435/examples/dvp/ov2640_capture/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/dvp/ov2640_capture/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/dvp/ov2640_capture/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/dvp/ov2640_capture/inc/at32f435_437_int.h b/project/at_start_f435/examples/dvp/ov2640_capture/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/dvp/ov2640_capture/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/dvp/ov2640_capture/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/dvp/ov2640_capture/readme.txt b/project/at_start_f435/examples/dvp/ov2640_capture/readme.txt index c6fda77e..05399d7a 100644 --- a/project/at_start_f435/examples/dvp/ov2640_capture/readme.txt +++ b/project/at_start_f435/examples/dvp/ov2640_capture/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/dvp/ov2640_capture/src/at32f435_437_clock.c b/project/at_start_f435/examples/dvp/ov2640_capture/src/at32f435_437_clock.c index 28cf94df..cb48c4e8 100644 --- a/project/at_start_f435/examples/dvp/ov2640_capture/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/dvp/ov2640_capture/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/dvp/ov2640_capture/src/at32f435_437_int.c b/project/at_start_f435/examples/dvp/ov2640_capture/src/at32f435_437_int.c index 7eb62900..4edf8824 100644 --- a/project/at_start_f435/examples/dvp/ov2640_capture/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/dvp/ov2640_capture/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/dvp/ov2640_capture/src/main.c b/project/at_start_f435/examples/dvp/ov2640_capture/src/main.c index 3652883b..19b05f42 100644 --- a/project/at_start_f435/examples/dvp/ov2640_capture/src/main.c +++ b/project/at_start_f435/examples/dvp/ov2640_capture/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/dvp/ov5640_capture/hardware/dvp/dvp.c b/project/at_start_f435/examples/dvp/ov5640_capture/hardware/dvp/dvp.c index 2ddf537a..7271c6aa 100644 --- a/project/at_start_f435/examples/dvp/ov5640_capture/hardware/dvp/dvp.c +++ b/project/at_start_f435/examples/dvp/ov5640_capture/hardware/dvp/dvp.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file dvp.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief dvp program ************************************************************************** * Copyright notice & Disclaimer @@ -68,7 +68,7 @@ void dvp_config(void) dvp_vsync_polarity_set(DVP_VSYNC_POLARITY_LOW); dvp_pclk_polarity_set(DVP_CLK_POLARITY_RISING); dvp_zoomout_set(DVP_PCDC_ALL, DVP_PCDS_CAP_FIRST, DVP_LCDC_ALL, DVP_LCDS_CAP_FIRST); - dvp_zoomout_select(DVP_PCDSE_CAP_FIRST); + dvp_zoomout_select(DVP_PCDES_CAP_FIRST); dvp_pixel_data_length_set(DVP_PIXEL_DATA_LENGTH_8); #ifdef HARDWARE_MODE dvp_sync_mode_set(DVP_SYNC_MODE_HARDWARE); diff --git a/project/at_start_f435/examples/dvp/ov5640_capture/hardware/dvp/dvp.h b/project/at_start_f435/examples/dvp/ov5640_capture/hardware/dvp/dvp.h index 78acedcc..3c552396 100644 --- a/project/at_start_f435/examples/dvp/ov5640_capture/hardware/dvp/dvp.h +++ b/project/at_start_f435/examples/dvp/ov5640_capture/hardware/dvp/dvp.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file dvp.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of dvp program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/dvp/ov5640_capture/hardware/lcd/font.h b/project/at_start_f435/examples/dvp/ov5640_capture/hardware/lcd/font.h index 1255c64d..ea901f9a 100644 --- a/project/at_start_f435/examples/dvp/ov5640_capture/hardware/lcd/font.h +++ b/project/at_start_f435/examples/dvp/ov5640_capture/hardware/lcd/font.h @@ -1,8 +1,8 @@ /* * ************************************************************************** * @file font.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of font ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/dvp/ov5640_capture/hardware/lcd/xmc_lcd.c b/project/at_start_f435/examples/dvp/ov5640_capture/hardware/lcd/xmc_lcd.c index 8ac57749..4620caa2 100644 --- a/project/at_start_f435/examples/dvp/ov5640_capture/hardware/lcd/xmc_lcd.c +++ b/project/at_start_f435/examples/dvp/ov5640_capture/hardware/lcd/xmc_lcd.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file xmc_lcd.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief xmc_lcd program file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/dvp/ov5640_capture/hardware/lcd/xmc_lcd.h b/project/at_start_f435/examples/dvp/ov5640_capture/hardware/lcd/xmc_lcd.h index 84354764..f28550e3 100644 --- a/project/at_start_f435/examples/dvp/ov5640_capture/hardware/lcd/xmc_lcd.h +++ b/project/at_start_f435/examples/dvp/ov5640_capture/hardware/lcd/xmc_lcd.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file xmc_lcd.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief xmc_lcd program header ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/dvp/ov5640_capture/hardware/ov5640/ov5640.c b/project/at_start_f435/examples/dvp/ov5640_capture/hardware/ov5640/ov5640.c index b296b401..321c85a2 100644 --- a/project/at_start_f435/examples/dvp/ov5640_capture/hardware/ov5640/ov5640.c +++ b/project/at_start_f435/examples/dvp/ov5640_capture/hardware/ov5640/ov5640.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file ov5640.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief ov5640 program ************************************************************************** * Copyright notice & Disclaimer @@ -706,7 +706,7 @@ void i2c_lowlevel_init(i2c_handle_type* hi2c) dmamux_enable(DMA1, TRUE); /* config i2c */ - i2c_init(hi2c->i2cx, 0, I2Cx_CLKCTRL); + i2c_init(hi2c->i2cx, 0x0F, I2Cx_CLKCTRL); i2c_own_address1_set(hi2c->i2cx, I2C_ADDRESS_MODE_7BIT, I2Cx_ADDRESS); } diff --git a/project/at_start_f435/examples/dvp/ov5640_capture/hardware/ov5640/ov5640.h b/project/at_start_f435/examples/dvp/ov5640_capture/hardware/ov5640/ov5640.h index 966689f1..7f576f18 100644 --- a/project/at_start_f435/examples/dvp/ov5640_capture/hardware/ov5640/ov5640.h +++ b/project/at_start_f435/examples/dvp/ov5640_capture/hardware/ov5640/ov5640.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file ov5640.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of ov5640 program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/dvp/ov5640_capture/hardware/ov5640/ov5640af.h b/project/at_start_f435/examples/dvp/ov5640_capture/hardware/ov5640/ov5640af.h index 3c59cae5..117d7d87 100644 --- a/project/at_start_f435/examples/dvp/ov5640_capture/hardware/ov5640/ov5640af.h +++ b/project/at_start_f435/examples/dvp/ov5640_capture/hardware/ov5640/ov5640af.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file ov5640af.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of ov5640af program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/dvp/ov5640_capture/hardware/ov5640/ov5640cfg.h b/project/at_start_f435/examples/dvp/ov5640_capture/hardware/ov5640/ov5640cfg.h index d5048084..4b531d11 100644 --- a/project/at_start_f435/examples/dvp/ov5640_capture/hardware/ov5640/ov5640cfg.h +++ b/project/at_start_f435/examples/dvp/ov5640_capture/hardware/ov5640/ov5640cfg.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file ov5640cfg.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of ov5640cfg program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/dvp/ov5640_capture/inc/at32f435_437_clock.h b/project/at_start_f435/examples/dvp/ov5640_capture/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/dvp/ov5640_capture/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/dvp/ov5640_capture/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/dvp/ov5640_capture/inc/at32f435_437_conf.h b/project/at_start_f435/examples/dvp/ov5640_capture/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/dvp/ov5640_capture/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/dvp/ov5640_capture/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/dvp/ov5640_capture/inc/at32f435_437_int.h b/project/at_start_f435/examples/dvp/ov5640_capture/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/dvp/ov5640_capture/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/dvp/ov5640_capture/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/dvp/ov5640_capture/readme.txt b/project/at_start_f435/examples/dvp/ov5640_capture/readme.txt index d042d0f1..32dee39f 100644 --- a/project/at_start_f435/examples/dvp/ov5640_capture/readme.txt +++ b/project/at_start_f435/examples/dvp/ov5640_capture/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/dvp/ov5640_capture/src/at32f435_437_clock.c b/project/at_start_f435/examples/dvp/ov5640_capture/src/at32f435_437_clock.c index 28cf94df..cb48c4e8 100644 --- a/project/at_start_f435/examples/dvp/ov5640_capture/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/dvp/ov5640_capture/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/dvp/ov5640_capture/src/at32f435_437_int.c b/project/at_start_f435/examples/dvp/ov5640_capture/src/at32f435_437_int.c index 6c9c48ca..e497df84 100644 --- a/project/at_start_f435/examples/dvp/ov5640_capture/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/dvp/ov5640_capture/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/dvp/ov5640_capture/src/main.c b/project/at_start_f435/examples/dvp/ov5640_capture/src/main.c index 2eb1b570..5924c894 100644 --- a/project/at_start_f435/examples/dvp/ov5640_capture/src/main.c +++ b/project/at_start_f435/examples/dvp/ov5640_capture/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/edma/burst_mode/inc/at32f435_437_clock.h b/project/at_start_f435/examples/edma/burst_mode/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/edma/burst_mode/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/edma/burst_mode/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/edma/burst_mode/inc/at32f435_437_conf.h b/project/at_start_f435/examples/edma/burst_mode/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/edma/burst_mode/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/edma/burst_mode/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/edma/burst_mode/inc/at32f435_437_int.h b/project/at_start_f435/examples/edma/burst_mode/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/edma/burst_mode/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/edma/burst_mode/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/edma/burst_mode/readme.txt b/project/at_start_f435/examples/edma/burst_mode/readme.txt index e392a14d..83fe251f 100644 --- a/project/at_start_f435/examples/edma/burst_mode/readme.txt +++ b/project/at_start_f435/examples/edma/burst_mode/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/edma/burst_mode/src/at32f435_437_clock.c b/project/at_start_f435/examples/edma/burst_mode/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/edma/burst_mode/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/edma/burst_mode/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/edma/burst_mode/src/at32f435_437_int.c b/project/at_start_f435/examples/edma/burst_mode/src/at32f435_437_int.c index ad7cd923..e5b8dcfd 100644 --- a/project/at_start_f435/examples/edma/burst_mode/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/edma/burst_mode/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/edma/burst_mode/src/main.c b/project/at_start_f435/examples/edma/burst_mode/src/main.c index 5778b83e..f64ad08b 100644 --- a/project/at_start_f435/examples/edma/burst_mode/src/main.c +++ b/project/at_start_f435/examples/edma/burst_mode/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/edma/dmamux_genertor_exint/inc/at32f435_437_clock.h b/project/at_start_f435/examples/edma/dmamux_genertor_exint/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/edma/dmamux_genertor_exint/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/edma/dmamux_genertor_exint/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/edma/dmamux_genertor_exint/inc/at32f435_437_conf.h b/project/at_start_f435/examples/edma/dmamux_genertor_exint/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/edma/dmamux_genertor_exint/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/edma/dmamux_genertor_exint/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/edma/dmamux_genertor_exint/inc/at32f435_437_int.h b/project/at_start_f435/examples/edma/dmamux_genertor_exint/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/edma/dmamux_genertor_exint/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/edma/dmamux_genertor_exint/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/edma/dmamux_genertor_exint/readme.txt b/project/at_start_f435/examples/edma/dmamux_genertor_exint/readme.txt index 2b2ab103..647f62c7 100644 --- a/project/at_start_f435/examples/edma/dmamux_genertor_exint/readme.txt +++ b/project/at_start_f435/examples/edma/dmamux_genertor_exint/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/edma/dmamux_genertor_exint/src/at32f435_437_clock.c b/project/at_start_f435/examples/edma/dmamux_genertor_exint/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/edma/dmamux_genertor_exint/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/edma/dmamux_genertor_exint/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/edma/dmamux_genertor_exint/src/at32f435_437_int.c b/project/at_start_f435/examples/edma/dmamux_genertor_exint/src/at32f435_437_int.c index a0f4a637..4d1fa808 100644 --- a/project/at_start_f435/examples/edma/dmamux_genertor_exint/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/edma/dmamux_genertor_exint/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/edma/dmamux_genertor_exint/src/main.c b/project/at_start_f435/examples/edma/dmamux_genertor_exint/src/main.c index 75e5bcc1..2aae8f1d 100644 --- a/project/at_start_f435/examples/edma/dmamux_genertor_exint/src/main.c +++ b/project/at_start_f435/examples/edma/dmamux_genertor_exint/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/edma/dmamux_synchronization_exint/inc/at32f435_437_clock.h b/project/at_start_f435/examples/edma/dmamux_synchronization_exint/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/edma/dmamux_synchronization_exint/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/edma/dmamux_synchronization_exint/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/edma/dmamux_synchronization_exint/inc/at32f435_437_conf.h b/project/at_start_f435/examples/edma/dmamux_synchronization_exint/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/edma/dmamux_synchronization_exint/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/edma/dmamux_synchronization_exint/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/edma/dmamux_synchronization_exint/inc/at32f435_437_int.h b/project/at_start_f435/examples/edma/dmamux_synchronization_exint/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/edma/dmamux_synchronization_exint/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/edma/dmamux_synchronization_exint/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/edma/dmamux_synchronization_exint/readme.txt b/project/at_start_f435/examples/edma/dmamux_synchronization_exint/readme.txt index b6efc987..78b8cceb 100644 --- a/project/at_start_f435/examples/edma/dmamux_synchronization_exint/readme.txt +++ b/project/at_start_f435/examples/edma/dmamux_synchronization_exint/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/edma/dmamux_synchronization_exint/src/at32f435_437_clock.c b/project/at_start_f435/examples/edma/dmamux_synchronization_exint/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/edma/dmamux_synchronization_exint/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/edma/dmamux_synchronization_exint/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/edma/dmamux_synchronization_exint/src/at32f435_437_int.c b/project/at_start_f435/examples/edma/dmamux_synchronization_exint/src/at32f435_437_int.c index f4c1c52c..eb15f506 100644 --- a/project/at_start_f435/examples/edma/dmamux_synchronization_exint/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/edma/dmamux_synchronization_exint/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/edma/dmamux_synchronization_exint/src/main.c b/project/at_start_f435/examples/edma/dmamux_synchronization_exint/src/main.c index dba65fb2..2962af78 100644 --- a/project/at_start_f435/examples/edma/dmamux_synchronization_exint/src/main.c +++ b/project/at_start_f435/examples/edma/dmamux_synchronization_exint/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/edma/flash_to_sram/inc/at32f435_437_clock.h b/project/at_start_f435/examples/edma/flash_to_sram/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/edma/flash_to_sram/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/edma/flash_to_sram/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/edma/flash_to_sram/inc/at32f435_437_conf.h b/project/at_start_f435/examples/edma/flash_to_sram/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/edma/flash_to_sram/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/edma/flash_to_sram/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/edma/flash_to_sram/inc/at32f435_437_int.h b/project/at_start_f435/examples/edma/flash_to_sram/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/edma/flash_to_sram/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/edma/flash_to_sram/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/edma/flash_to_sram/readme.txt b/project/at_start_f435/examples/edma/flash_to_sram/readme.txt index 6d623e67..f1901dee 100644 --- a/project/at_start_f435/examples/edma/flash_to_sram/readme.txt +++ b/project/at_start_f435/examples/edma/flash_to_sram/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/edma/flash_to_sram/src/at32f435_437_clock.c b/project/at_start_f435/examples/edma/flash_to_sram/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/edma/flash_to_sram/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/edma/flash_to_sram/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/edma/flash_to_sram/src/at32f435_437_int.c b/project/at_start_f435/examples/edma/flash_to_sram/src/at32f435_437_int.c index 00c17276..8bde7d55 100644 --- a/project/at_start_f435/examples/edma/flash_to_sram/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/edma/flash_to_sram/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/edma/flash_to_sram/src/main.c b/project/at_start_f435/examples/edma/flash_to_sram/src/main.c index 5e5d47a7..5568a11b 100644 --- a/project/at_start_f435/examples/edma/flash_to_sram/src/main.c +++ b/project/at_start_f435/examples/edma/flash_to_sram/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/edma/i2s_halfduplex_edma_doublebuffer/inc/at32f435_437_clock.h b/project/at_start_f435/examples/edma/i2s_halfduplex_edma_doublebuffer/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/edma/i2s_halfduplex_edma_doublebuffer/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/edma/i2s_halfduplex_edma_doublebuffer/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/edma/i2s_halfduplex_edma_doublebuffer/inc/at32f435_437_conf.h b/project/at_start_f435/examples/edma/i2s_halfduplex_edma_doublebuffer/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/edma/i2s_halfduplex_edma_doublebuffer/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/edma/i2s_halfduplex_edma_doublebuffer/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/edma/i2s_halfduplex_edma_doublebuffer/inc/at32f435_437_int.h b/project/at_start_f435/examples/edma/i2s_halfduplex_edma_doublebuffer/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/edma/i2s_halfduplex_edma_doublebuffer/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/edma/i2s_halfduplex_edma_doublebuffer/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/edma/i2s_halfduplex_edma_doublebuffer/readme.txt b/project/at_start_f435/examples/edma/i2s_halfduplex_edma_doublebuffer/readme.txt index 54502e81..308d10a4 100644 --- a/project/at_start_f435/examples/edma/i2s_halfduplex_edma_doublebuffer/readme.txt +++ b/project/at_start_f435/examples/edma/i2s_halfduplex_edma_doublebuffer/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/edma/i2s_halfduplex_edma_doublebuffer/src/at32f435_437_clock.c b/project/at_start_f435/examples/edma/i2s_halfduplex_edma_doublebuffer/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/edma/i2s_halfduplex_edma_doublebuffer/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/edma/i2s_halfduplex_edma_doublebuffer/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/edma/i2s_halfduplex_edma_doublebuffer/src/at32f435_437_int.c b/project/at_start_f435/examples/edma/i2s_halfduplex_edma_doublebuffer/src/at32f435_437_int.c index b40be795..46c4a605 100644 --- a/project/at_start_f435/examples/edma/i2s_halfduplex_edma_doublebuffer/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/edma/i2s_halfduplex_edma_doublebuffer/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/edma/i2s_halfduplex_edma_doublebuffer/src/main.c b/project/at_start_f435/examples/edma/i2s_halfduplex_edma_doublebuffer/src/main.c index 85295764..3f3915b1 100644 --- a/project/at_start_f435/examples/edma/i2s_halfduplex_edma_doublebuffer/src/main.c +++ b/project/at_start_f435/examples/edma/i2s_halfduplex_edma_doublebuffer/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/edma/link_list_mode/inc/at32f435_437_clock.h b/project/at_start_f435/examples/edma/link_list_mode/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/edma/link_list_mode/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/edma/link_list_mode/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/edma/link_list_mode/inc/at32f435_437_conf.h b/project/at_start_f435/examples/edma/link_list_mode/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/edma/link_list_mode/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/edma/link_list_mode/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/edma/link_list_mode/inc/at32f435_437_int.h b/project/at_start_f435/examples/edma/link_list_mode/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/edma/link_list_mode/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/edma/link_list_mode/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/edma/link_list_mode/readme.txt b/project/at_start_f435/examples/edma/link_list_mode/readme.txt index 19b34628..f0b081b1 100644 --- a/project/at_start_f435/examples/edma/link_list_mode/readme.txt +++ b/project/at_start_f435/examples/edma/link_list_mode/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/edma/link_list_mode/src/at32f435_437_clock.c b/project/at_start_f435/examples/edma/link_list_mode/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/edma/link_list_mode/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/edma/link_list_mode/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/edma/link_list_mode/src/at32f435_437_int.c b/project/at_start_f435/examples/edma/link_list_mode/src/at32f435_437_int.c index fc3465a1..c8b01667 100644 --- a/project/at_start_f435/examples/edma/link_list_mode/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/edma/link_list_mode/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/edma/link_list_mode/src/main.c b/project/at_start_f435/examples/edma/link_list_mode/src/main.c index 107ed21f..631f4227 100644 --- a/project/at_start_f435/examples/edma/link_list_mode/src/main.c +++ b/project/at_start_f435/examples/edma/link_list_mode/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/edma/two_dimension_mode/inc/at32f435_437_clock.h b/project/at_start_f435/examples/edma/two_dimension_mode/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/edma/two_dimension_mode/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/edma/two_dimension_mode/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/edma/two_dimension_mode/inc/at32f435_437_conf.h b/project/at_start_f435/examples/edma/two_dimension_mode/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/edma/two_dimension_mode/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/edma/two_dimension_mode/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/edma/two_dimension_mode/inc/at32f435_437_int.h b/project/at_start_f435/examples/edma/two_dimension_mode/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/edma/two_dimension_mode/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/edma/two_dimension_mode/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/edma/two_dimension_mode/readme.txt b/project/at_start_f435/examples/edma/two_dimension_mode/readme.txt index 48ddd493..3f73fe2f 100644 --- a/project/at_start_f435/examples/edma/two_dimension_mode/readme.txt +++ b/project/at_start_f435/examples/edma/two_dimension_mode/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/edma/two_dimension_mode/src/at32f435_437_clock.c b/project/at_start_f435/examples/edma/two_dimension_mode/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/edma/two_dimension_mode/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/edma/two_dimension_mode/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/edma/two_dimension_mode/src/at32f435_437_int.c b/project/at_start_f435/examples/edma/two_dimension_mode/src/at32f435_437_int.c index dd8dc494..d79e0613 100644 --- a/project/at_start_f435/examples/edma/two_dimension_mode/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/edma/two_dimension_mode/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/edma/two_dimension_mode/src/main.c b/project/at_start_f435/examples/edma/two_dimension_mode/src/main.c index f2853f35..2be97424 100644 --- a/project/at_start_f435/examples/edma/two_dimension_mode/src/main.c +++ b/project/at_start_f435/examples/edma/two_dimension_mode/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/ertc/bpr_domain/inc/at32f435_437_clock.h b/project/at_start_f435/examples/ertc/bpr_domain/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/ertc/bpr_domain/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/ertc/bpr_domain/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/ertc/bpr_domain/inc/at32f435_437_conf.h b/project/at_start_f435/examples/ertc/bpr_domain/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/ertc/bpr_domain/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/ertc/bpr_domain/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/ertc/bpr_domain/inc/at32f435_437_int.h b/project/at_start_f435/examples/ertc/bpr_domain/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/ertc/bpr_domain/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/ertc/bpr_domain/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/ertc/bpr_domain/readme.txt b/project/at_start_f435/examples/ertc/bpr_domain/readme.txt index 929c39e5..5e2f5718 100644 --- a/project/at_start_f435/examples/ertc/bpr_domain/readme.txt +++ b/project/at_start_f435/examples/ertc/bpr_domain/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/ertc/bpr_domain/src/at32f435_437_clock.c b/project/at_start_f435/examples/ertc/bpr_domain/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/ertc/bpr_domain/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/ertc/bpr_domain/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/ertc/bpr_domain/src/at32f435_437_int.c b/project/at_start_f435/examples/ertc/bpr_domain/src/at32f435_437_int.c index 77b48bea..e41c0260 100644 --- a/project/at_start_f435/examples/ertc/bpr_domain/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/ertc/bpr_domain/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/ertc/bpr_domain/src/main.c b/project/at_start_f435/examples/ertc/bpr_domain/src/main.c index 8730e541..f64e8004 100644 --- a/project/at_start_f435/examples/ertc/bpr_domain/src/main.c +++ b/project/at_start_f435/examples/ertc/bpr_domain/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/ertc/calendar/inc/at32f435_437_clock.h b/project/at_start_f435/examples/ertc/calendar/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/ertc/calendar/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/ertc/calendar/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/ertc/calendar/inc/at32f435_437_conf.h b/project/at_start_f435/examples/ertc/calendar/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/ertc/calendar/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/ertc/calendar/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/ertc/calendar/inc/at32f435_437_int.h b/project/at_start_f435/examples/ertc/calendar/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/ertc/calendar/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/ertc/calendar/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/ertc/calendar/readme.txt b/project/at_start_f435/examples/ertc/calendar/readme.txt index f12a7864..ddbf4437 100644 --- a/project/at_start_f435/examples/ertc/calendar/readme.txt +++ b/project/at_start_f435/examples/ertc/calendar/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/ertc/calendar/src/at32f435_437_clock.c b/project/at_start_f435/examples/ertc/calendar/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/ertc/calendar/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/ertc/calendar/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/ertc/calendar/src/at32f435_437_int.c b/project/at_start_f435/examples/ertc/calendar/src/at32f435_437_int.c index 196748f9..b8ea16f9 100644 --- a/project/at_start_f435/examples/ertc/calendar/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/ertc/calendar/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/ertc/calendar/src/main.c b/project/at_start_f435/examples/ertc/calendar/src/main.c index 309c9f6a..466620e8 100644 --- a/project/at_start_f435/examples/ertc/calendar/src/main.c +++ b/project/at_start_f435/examples/ertc/calendar/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/ertc/lick_calibration/inc/at32f435_437_clock.h b/project/at_start_f435/examples/ertc/lick_calibration/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/ertc/lick_calibration/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/ertc/lick_calibration/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/ertc/lick_calibration/inc/at32f435_437_conf.h b/project/at_start_f435/examples/ertc/lick_calibration/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/ertc/lick_calibration/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/ertc/lick_calibration/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/ertc/lick_calibration/inc/at32f435_437_int.h b/project/at_start_f435/examples/ertc/lick_calibration/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/ertc/lick_calibration/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/ertc/lick_calibration/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/ertc/lick_calibration/readme.txt b/project/at_start_f435/examples/ertc/lick_calibration/readme.txt index 952f4f2c..bef0cff5 100644 --- a/project/at_start_f435/examples/ertc/lick_calibration/readme.txt +++ b/project/at_start_f435/examples/ertc/lick_calibration/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/ertc/lick_calibration/src/at32f435_437_clock.c b/project/at_start_f435/examples/ertc/lick_calibration/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/ertc/lick_calibration/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/ertc/lick_calibration/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/ertc/lick_calibration/src/at32f435_437_int.c b/project/at_start_f435/examples/ertc/lick_calibration/src/at32f435_437_int.c index 28d392a2..c2b5380f 100644 --- a/project/at_start_f435/examples/ertc/lick_calibration/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/ertc/lick_calibration/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/ertc/lick_calibration/src/main.c b/project/at_start_f435/examples/ertc/lick_calibration/src/main.c index 1731d474..0dad077f 100644 --- a/project/at_start_f435/examples/ertc/lick_calibration/src/main.c +++ b/project/at_start_f435/examples/ertc/lick_calibration/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/ertc/tamper/inc/at32f435_437_clock.h b/project/at_start_f435/examples/ertc/tamper/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/ertc/tamper/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/ertc/tamper/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/ertc/tamper/inc/at32f435_437_conf.h b/project/at_start_f435/examples/ertc/tamper/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/ertc/tamper/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/ertc/tamper/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/ertc/tamper/inc/at32f435_437_int.h b/project/at_start_f435/examples/ertc/tamper/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/ertc/tamper/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/ertc/tamper/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/ertc/tamper/readme.txt b/project/at_start_f435/examples/ertc/tamper/readme.txt index aa187149..b25cb57a 100644 --- a/project/at_start_f435/examples/ertc/tamper/readme.txt +++ b/project/at_start_f435/examples/ertc/tamper/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/ertc/tamper/src/at32f435_437_clock.c b/project/at_start_f435/examples/ertc/tamper/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/ertc/tamper/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/ertc/tamper/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/ertc/tamper/src/at32f435_437_int.c b/project/at_start_f435/examples/ertc/tamper/src/at32f435_437_int.c index 25c679a4..e4562a51 100644 --- a/project/at_start_f435/examples/ertc/tamper/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/ertc/tamper/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/ertc/tamper/src/main.c b/project/at_start_f435/examples/ertc/tamper/src/main.c index 163ecb3f..dbd15d86 100644 --- a/project/at_start_f435/examples/ertc/tamper/src/main.c +++ b/project/at_start_f435/examples/ertc/tamper/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/ertc/time_stamp/inc/at32f435_437_clock.h b/project/at_start_f435/examples/ertc/time_stamp/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/ertc/time_stamp/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/ertc/time_stamp/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/ertc/time_stamp/inc/at32f435_437_conf.h b/project/at_start_f435/examples/ertc/time_stamp/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/ertc/time_stamp/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/ertc/time_stamp/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/ertc/time_stamp/inc/at32f435_437_int.h b/project/at_start_f435/examples/ertc/time_stamp/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/ertc/time_stamp/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/ertc/time_stamp/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/ertc/time_stamp/readme.txt b/project/at_start_f435/examples/ertc/time_stamp/readme.txt index 4add99fa..129077be 100644 --- a/project/at_start_f435/examples/ertc/time_stamp/readme.txt +++ b/project/at_start_f435/examples/ertc/time_stamp/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/ertc/time_stamp/src/at32f435_437_clock.c b/project/at_start_f435/examples/ertc/time_stamp/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/ertc/time_stamp/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/ertc/time_stamp/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/ertc/time_stamp/src/at32f435_437_int.c b/project/at_start_f435/examples/ertc/time_stamp/src/at32f435_437_int.c index f39b0401..1b4c3d2e 100644 --- a/project/at_start_f435/examples/ertc/time_stamp/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/ertc/time_stamp/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/ertc/time_stamp/src/main.c b/project/at_start_f435/examples/ertc/time_stamp/src/main.c index 08376863..c9a93009 100644 --- a/project/at_start_f435/examples/ertc/time_stamp/src/main.c +++ b/project/at_start_f435/examples/ertc/time_stamp/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/ertc/wakeup_timer/inc/at32f435_437_clock.h b/project/at_start_f435/examples/ertc/wakeup_timer/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/ertc/wakeup_timer/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/ertc/wakeup_timer/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/ertc/wakeup_timer/inc/at32f435_437_conf.h b/project/at_start_f435/examples/ertc/wakeup_timer/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/ertc/wakeup_timer/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/ertc/wakeup_timer/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/ertc/wakeup_timer/inc/at32f435_437_int.h b/project/at_start_f435/examples/ertc/wakeup_timer/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/ertc/wakeup_timer/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/ertc/wakeup_timer/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/ertc/wakeup_timer/readme.txt b/project/at_start_f435/examples/ertc/wakeup_timer/readme.txt index 9da5136e..3a2baa94 100644 --- a/project/at_start_f435/examples/ertc/wakeup_timer/readme.txt +++ b/project/at_start_f435/examples/ertc/wakeup_timer/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/ertc/wakeup_timer/src/at32f435_437_clock.c b/project/at_start_f435/examples/ertc/wakeup_timer/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/ertc/wakeup_timer/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/ertc/wakeup_timer/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/ertc/wakeup_timer/src/at32f435_437_int.c b/project/at_start_f435/examples/ertc/wakeup_timer/src/at32f435_437_int.c index b4c7f004..cd93ff70 100644 --- a/project/at_start_f435/examples/ertc/wakeup_timer/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/ertc/wakeup_timer/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/ertc/wakeup_timer/src/main.c b/project/at_start_f435/examples/ertc/wakeup_timer/src/main.c index aeb57e86..25b74937 100644 --- a/project/at_start_f435/examples/ertc/wakeup_timer/src/main.c +++ b/project/at_start_f435/examples/ertc/wakeup_timer/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer @@ -146,7 +146,7 @@ void wakeup_timer_config(void) exint_init_type exint_init_struct; /* select the wakeup timer clock source */ - ertc_wakeup_clock_set(ERTC_WAT_CLK_CK_A_16BITS); + ertc_wakeup_clock_set(ERTC_WAT_CLK_CK_B_16BITS); /* set wakeup time: 5s */ ertc_wakeup_counter_set(5 - 1); diff --git a/project/at_start_f435/examples/exint/exint_config/inc/at32f435_437_clock.h b/project/at_start_f435/examples/exint/exint_config/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/exint/exint_config/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/exint/exint_config/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/exint/exint_config/inc/at32f435_437_conf.h b/project/at_start_f435/examples/exint/exint_config/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/exint/exint_config/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/exint/exint_config/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/exint/exint_config/inc/at32f435_437_int.h b/project/at_start_f435/examples/exint/exint_config/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/exint/exint_config/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/exint/exint_config/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/exint/exint_config/readme.txt b/project/at_start_f435/examples/exint/exint_config/readme.txt index 541269c6..23b9fbaa 100644 --- a/project/at_start_f435/examples/exint/exint_config/readme.txt +++ b/project/at_start_f435/examples/exint/exint_config/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/exint/exint_config/src/at32f435_437_clock.c b/project/at_start_f435/examples/exint/exint_config/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/exint/exint_config/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/exint/exint_config/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/exint/exint_config/src/at32f435_437_int.c b/project/at_start_f435/examples/exint/exint_config/src/at32f435_437_int.c index 9f82b178..3da460c4 100644 --- a/project/at_start_f435/examples/exint/exint_config/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/exint/exint_config/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/exint/exint_config/src/main.c b/project/at_start_f435/examples/exint/exint_config/src/main.c index 90db670b..cdb16117 100644 --- a/project/at_start_f435/examples/exint/exint_config/src/main.c +++ b/project/at_start_f435/examples/exint/exint_config/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/exint/exint_software_trigger/inc/at32f435_437_clock.h b/project/at_start_f435/examples/exint/exint_software_trigger/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/exint/exint_software_trigger/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/exint/exint_software_trigger/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/exint/exint_software_trigger/inc/at32f435_437_conf.h b/project/at_start_f435/examples/exint/exint_software_trigger/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/exint/exint_software_trigger/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/exint/exint_software_trigger/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/exint/exint_software_trigger/inc/at32f435_437_int.h b/project/at_start_f435/examples/exint/exint_software_trigger/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/exint/exint_software_trigger/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/exint/exint_software_trigger/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/exint/exint_software_trigger/readme.txt b/project/at_start_f435/examples/exint/exint_software_trigger/readme.txt index 288b6945..71855212 100644 --- a/project/at_start_f435/examples/exint/exint_software_trigger/readme.txt +++ b/project/at_start_f435/examples/exint/exint_software_trigger/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/exint/exint_software_trigger/src/at32f435_437_clock.c b/project/at_start_f435/examples/exint/exint_software_trigger/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/exint/exint_software_trigger/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/exint/exint_software_trigger/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/exint/exint_software_trigger/src/at32f435_437_int.c b/project/at_start_f435/examples/exint/exint_software_trigger/src/at32f435_437_int.c index 3c7c3a48..c553aa78 100644 --- a/project/at_start_f435/examples/exint/exint_software_trigger/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/exint/exint_software_trigger/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/exint/exint_software_trigger/src/main.c b/project/at_start_f435/examples/exint/exint_software_trigger/src/main.c index 3d580359..caefcd04 100644 --- a/project/at_start_f435/examples/exint/exint_software_trigger/src/main.c +++ b/project/at_start_f435/examples/exint/exint_software_trigger/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/flash/fap_enable/inc/at32f435_437_clock.h b/project/at_start_f435/examples/flash/fap_enable/inc/at32f435_437_clock.h new file mode 100644 index 00000000..86a4b828 --- /dev/null +++ b/project/at_start_f435/examples/flash/fap_enable/inc/at32f435_437_clock.h @@ -0,0 +1,46 @@ +/** + ************************************************************************** + * @file at32f435_437_clock.h + * @version v2.0.9 + * @date 2022-06-28 + * @brief header file of clock program + ************************************************************************** + * Copyright notice & Disclaimer + * + * The software Board Support Package (BSP) that is made available to + * download from Artery official website is the copyrighted work of Artery. + * Artery authorizes customers to use, copy, and distribute the BSP + * software and its related documentation for the purpose of design and + * development in conjunction with Artery microcontrollers. Use of the + * software is governed by this copyright notice and the following disclaimer. + * + * THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, + * GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, + * TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR + * STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, + * INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. + * + ************************************************************************** + */ + +/* define to prevent recursive inclusion -------------------------------------*/ +#ifndef __AT32F435_437_CLOCK_H +#define __AT32F435_437_CLOCK_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* includes ------------------------------------------------------------------*/ +#include "at32f435_437.h" + +/* exported functions ------------------------------------------------------- */ +void system_clock_config(void); + +#ifdef __cplusplus +} +#endif + +#endif + diff --git a/project/at_start_f435/examples/flash/fap_enable/inc/at32f435_437_conf.h b/project/at_start_f435/examples/flash/fap_enable/inc/at32f435_437_conf.h new file mode 100644 index 00000000..e2816415 --- /dev/null +++ b/project/at_start_f435/examples/flash/fap_enable/inc/at32f435_437_conf.h @@ -0,0 +1,174 @@ +/** + ************************************************************************** + * @file at32f435_437_conf.h + * @version v2.0.9 + * @date 2022-06-28 + * @brief at32f435_437 config header file + ************************************************************************** + * Copyright notice & Disclaimer + * + * The software Board Support Package (BSP) that is made available to + * download from Artery official website is the copyrighted work of Artery. + * Artery authorizes customers to use, copy, and distribute the BSP + * software and its related documentation for the purpose of design and + * development in conjunction with Artery microcontrollers. Use of the + * software is governed by this copyright notice and the following disclaimer. + * + * THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, + * GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, + * TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR + * STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, + * INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. + * + ************************************************************************** + */ + +/* define to prevent recursive inclusion -------------------------------------*/ +#ifndef __AT32F435_437_CONF_H +#define __AT32F435_437_CONF_H + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @brief in the following line adjust the value of high speed exernal crystal (hext) + * used in your application + * + * tip: to avoid modifying this file each time you need to use different hext, you + * can define the hext value in your toolchain compiler preprocessor. + * + */ +#if !defined HEXT_VALUE +#define HEXT_VALUE ((uint32_t)8000000) /*!< value of the high speed exernal crystal in hz */ +#endif + +/** + * @brief in the following line adjust the high speed exernal crystal (hext) startup + * timeout value + */ +#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000) /*!< time out for hext start up */ +#define HICK_VALUE ((uint32_t)8000000) /*!< value of the high speed internal clock in hz */ + +/* module define -------------------------------------------------------------*/ +#define CRM_MODULE_ENABLED +#define TMR_MODULE_ENABLED +#define ERTC_MODULE_ENABLED +#define GPIO_MODULE_ENABLED +#define I2C_MODULE_ENABLED +#define USART_MODULE_ENABLED +#define PWC_MODULE_ENABLED +#define CAN_MODULE_ENABLED +#define ADC_MODULE_ENABLED +#define DAC_MODULE_ENABLED +#define SPI_MODULE_ENABLED +#define EDMA_MODULE_ENABLED +#define DMA_MODULE_ENABLED +#define DEBUG_MODULE_ENABLED +#define FLASH_MODULE_ENABLED +#define CRC_MODULE_ENABLED +#define WWDT_MODULE_ENABLED +#define WDT_MODULE_ENABLED +#define EXINT_MODULE_ENABLED +#define SDIO_MODULE_ENABLED +#define XMC_MODULE_ENABLED +#define USB_MODULE_ENABLED +#define ACC_MODULE_ENABLED +#define MISC_MODULE_ENABLED +#define QSPI_MODULE_ENABLED +#define DVP_MODULE_ENABLED +#define SCFG_MODULE_ENABLED +#define EMAC_MODULE_ENABLED + +/* includes ------------------------------------------------------------------*/ +#ifdef CRM_MODULE_ENABLED +#include "at32f435_437_crm.h" +#endif +#ifdef TMR_MODULE_ENABLED +#include "at32f435_437_tmr.h" +#endif +#ifdef ERTC_MODULE_ENABLED +#include "at32f435_437_ertc.h" +#endif +#ifdef GPIO_MODULE_ENABLED +#include "at32f435_437_gpio.h" +#endif +#ifdef I2C_MODULE_ENABLED +#include "at32f435_437_i2c.h" +#endif +#ifdef USART_MODULE_ENABLED +#include "at32f435_437_usart.h" +#endif +#ifdef PWC_MODULE_ENABLED +#include "at32f435_437_pwc.h" +#endif +#ifdef CAN_MODULE_ENABLED +#include "at32f435_437_can.h" +#endif +#ifdef ADC_MODULE_ENABLED +#include "at32f435_437_adc.h" +#endif +#ifdef DAC_MODULE_ENABLED +#include "at32f435_437_dac.h" +#endif +#ifdef SPI_MODULE_ENABLED +#include "at32f435_437_spi.h" +#endif +#ifdef DMA_MODULE_ENABLED +#include "at32f435_437_dma.h" +#endif +#ifdef DEBUG_MODULE_ENABLED +#include "at32f435_437_debug.h" +#endif +#ifdef FLASH_MODULE_ENABLED +#include "at32f435_437_flash.h" +#endif +#ifdef CRC_MODULE_ENABLED +#include "at32f435_437_crc.h" +#endif +#ifdef WWDT_MODULE_ENABLED +#include "at32f435_437_wwdt.h" +#endif +#ifdef WDT_MODULE_ENABLED +#include "at32f435_437_wdt.h" +#endif +#ifdef EXINT_MODULE_ENABLED +#include "at32f435_437_exint.h" +#endif +#ifdef SDIO_MODULE_ENABLED +#include "at32f435_437_sdio.h" +#endif +#ifdef XMC_MODULE_ENABLED +#include "at32f435_437_xmc.h" +#endif +#ifdef ACC_MODULE_ENABLED +#include "at32f435_437_acc.h" +#endif +#ifdef MISC_MODULE_ENABLED +#include "at32f435_437_misc.h" +#endif +#ifdef EDMA_MODULE_ENABLED +#include "at32f435_437_edma.h" +#endif +#ifdef QSPI_MODULE_ENABLED +#include "at32f435_437_qspi.h" +#endif +#ifdef SCFG_MODULE_ENABLED +#include "at32f435_437_scfg.h" +#endif +#ifdef EMAC_MODULE_ENABLED +#include "at32f435_437_emac.h" +#endif +#ifdef DVP_MODULE_ENABLED +#include "at32f435_437_dvp.h" +#endif +#ifdef USB_MODULE_ENABLED +#include "at32f435_437_usb.h" +#endif + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/project/at_start_f435/examples/flash/fap_enable/inc/at32f435_437_int.h b/project/at_start_f435/examples/flash/fap_enable/inc/at32f435_437_int.h new file mode 100644 index 00000000..80aec042 --- /dev/null +++ b/project/at_start_f435/examples/flash/fap_enable/inc/at32f435_437_int.h @@ -0,0 +1,58 @@ +/** + ************************************************************************** + * @file at32f435_437_int.h + * @version v2.0.9 + * @date 2022-06-28 + * @brief header file of main interrupt service routines. + ************************************************************************** + * Copyright notice & Disclaimer + * + * The software Board Support Package (BSP) that is made available to + * download from Artery official website is the copyrighted work of Artery. + * Artery authorizes customers to use, copy, and distribute the BSP + * software and its related documentation for the purpose of design and + * development in conjunction with Artery microcontrollers. Use of the + * software is governed by this copyright notice and the following disclaimer. + * + * THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, + * GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, + * TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR + * STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, + * INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. + * + ************************************************************************** + */ + +/* define to prevent recursive inclusion -------------------------------------*/ +#ifndef __AT32F435_437_INT_H +#define __AT32F435_437_INT_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* includes ------------------------------------------------------------------*/ +#include "at32f435_437.h" + +/* exported types ------------------------------------------------------------*/ +/* exported constants --------------------------------------------------------*/ +/* exported macro ------------------------------------------------------------*/ +/* exported functions ------------------------------------------------------- */ + +void NMI_Handler(void); +void HardFault_Handler(void); +void MemManage_Handler(void); +void BusFault_Handler(void); +void UsageFault_Handler(void); +void SVC_Handler(void); +void DebugMon_Handler(void); +void PendSV_Handler(void); +void SysTick_Handler(void); + +#ifdef __cplusplus +} +#endif + +#endif + diff --git a/project/at_start_f435/examples/flash/fap_enable/mdk_v5/fap_enable.uvoptx b/project/at_start_f435/examples/flash/fap_enable/mdk_v5/fap_enable.uvoptx new file mode 100644 index 00000000..9cc31ba7 --- /dev/null +++ b/project/at_start_f435/examples/flash/fap_enable/mdk_v5/fap_enable.uvoptx @@ -0,0 +1,356 @@ + + + + 1.0 + +

### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj; *.o + *.lib + *.txt; *.h; *.inc + *.plm + *.cpp + 0 + + + + 0 + 0 + + + + fap_enable + 0x4 + ARM-ADS + + 12000000 + + 0 + 1 + 0 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\listings\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 0 + 0 + 1 + + 0 + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 0 + + + + + + + + + + + BIN\CMSIS_AGDI.dll + + + + 0 + UL2CM3 + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0AT32F435_4032 -FS08000000 -FL03F0000 -FP0($$Device:-AT32F435ZMT7$Flash\AT32F435_4032.FLM)) + + + + + 0 + + + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + 0 + 0 + 0 + + + + + + + + + + + + + user + 0 + 0 + 0 + 0 + + 1 + 1 + 1 + 0 + 0 + 0 + ..\src\main.c + main.c + 0 + 0 + + + 1 + 2 + 1 + 0 + 0 + 0 + ..\src\at32f435_437_clock.c + at32f435_437_clock.c + 0 + 0 + + + 1 + 3 + 1 + 0 + 0 + 0 + ..\src\at32f435_437_int.c + at32f435_437_int.c + 0 + 0 + + + + + bsp + 0 + 0 + 0 + 0 + + 2 + 4 + 1 + 0 + 0 + 0 + ..\..\..\..\..\at32f435_437_board\at32f435_437_board.c + at32f435_437_board.c + 0 + 0 + + + + + firmware + 0 + 0 + 0 + 0 + + 3 + 5 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_crm.c + at32f435_437_crm.c + 0 + 0 + + + 3 + 6 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_usart.c + at32f435_437_usart.c + 0 + 0 + + + 3 + 7 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_flash.c + at32f435_437_flash.c + 0 + 0 + + + 3 + 8 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_gpio.c + at32f435_437_gpio.c + 0 + 0 + + + 3 + 9 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_misc.c + at32f435_437_misc.c + 0 + 0 + + + + + cmsis + 0 + 0 + 0 + 0 + + 4 + 10 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\libraries\cmsis\cm4\device_support\system_at32f435_437.c + system_at32f435_437.c + 0 + 0 + + + 4 + 11 + 2 + 0 + 0 + 0 + ..\..\..\..\..\..\libraries\cmsis\cm4\device_support\startup\mdk\startup_at32f435_437.s + startup_at32f435_437.s + 0 + 0 + + + + + readme + 0 + 0 + 0 + 0 + + 5 + 12 + 5 + 0 + 0 + 0 + ..\readme.txt + readme.txt + 0 + 0 + + + + diff --git a/project/at_start_f435/examples/flash/fap_enable/mdk_v5/fap_enable.uvprojx b/project/at_start_f435/examples/flash/fap_enable/mdk_v5/fap_enable.uvprojx new file mode 100644 index 00000000..e10f6301 --- /dev/null +++ b/project/at_start_f435/examples/flash/fap_enable/mdk_v5/fap_enable.uvprojx @@ -0,0 +1,492 @@ + + + + 2.1 + +
### uVision Project, (C) Keil Software
+ + + + fap_enable + 0x4 + ARM-ADS + 5060960::V5.06 update 7 (build 960)::.\ARMCC + 0 + + + -AT32F435ZMT7 + ArteryTek + ArteryTek.AT32F435_437_DFP.2.0.1 + IROM(0x08000000,0x3F0000) IRAM(0x20000000,0x60000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0AT32F435_4032 -FS08000000 -FL03F0000 -FP0($$Device:-AT32F435ZMT7$Flash\AT32F435_4032.FLM)) + 0 + $$Device:- + + + + + + + + + + $$Device:-AT32F435ZMT7$SVD\AT32F435xx_v2.svd + 0 + 0 + + + + AT32F435ZMT7$Device\Include\at32f435_437.h\ + AT32F435ZMT7$Device\Include\at32f435_437.h\ + + 0 + 0 + 0 + 0 + 1 + + .\objects\ + fap_enable + 1 + 0 + 1 + 1 + 1 + .\listings\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 0 + + + SARMCM3.DLL + -REMAP -MPU + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM4 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 1 + 4096 + + 1 + BIN\UL2CM3.DLL + + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M4" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 2 + 0 + 0 + 0 + 0 + 8 + 0 + 0 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x60000 + + + 1 + 0x8000000 + 0x3f0000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x8000000 + 0x3f0000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x60000 + + + 0 + 0x0 + 0x0 + + + + + + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 0 + + + AT32F435ZMT7,USE_STDPERIPH_DRIVER,AT_START_F435_V1 + + ..\..\..\..\..\..\libraries\drivers\inc;..\..\..\..\..\..\libraries\cmsis\cm4\core_support;..\..\..\..\..\..\libraries\cmsis\cm4\device_support;..\..\..\..\..\at32f435_437_board;..\flash;..\inc + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + + + + + + + + + 1 + 0 + 0 + 0 + 1 + 0 + 0x08000000 + 0x20000000 + + + + + + + + + + + + + user + + + main.c + 1 + ..\src\main.c + + + at32f435_437_clock.c + 1 + ..\src\at32f435_437_clock.c + + + at32f435_437_int.c + 1 + ..\src\at32f435_437_int.c + + + + + bsp + + + at32f435_437_board.c + 1 + ..\..\..\..\..\at32f435_437_board\at32f435_437_board.c + + + + + firmware + + + at32f435_437_crm.c + 1 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_crm.c + + + at32f435_437_usart.c + 1 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_usart.c + + + at32f435_437_flash.c + 1 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_flash.c + + + at32f435_437_gpio.c + 1 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_gpio.c + + + at32f435_437_misc.c + 1 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_misc.c + + + + + cmsis + + + system_at32f435_437.c + 1 + ..\..\..\..\..\..\libraries\cmsis\cm4\device_support\system_at32f435_437.c + + + startup_at32f435_437.s + 2 + ..\..\..\..\..\..\libraries\cmsis\cm4\device_support\startup\mdk\startup_at32f435_437.s + + + + + readme + + + readme.txt + 5 + ..\readme.txt + + + + + + + + + + + + + + + + + fap_enable + + + + + + 0 + 1 + + + + + diff --git a/project/at_start_f435/examples/flash/fap_enable/readme.txt b/project/at_start_f435/examples/flash/fap_enable/readme.txt new file mode 100644 index 00000000..c23f6663 --- /dev/null +++ b/project/at_start_f435/examples/flash/fap_enable/readme.txt @@ -0,0 +1,17 @@ +/** + ************************************************************************** + * @file readme.txt + * @version v2.0.9 + * @date 2022-06-28 + * @brief readme + ************************************************************************** + */ + + this demo is based on the at-start board, in this demo, show how to enable + fap function by executing code. when fap enabled, the three leds will turn + on. + + note: + if fap is still in debug mode when it is set, the debug mode must be + cleared with poweron reset instead of system reset, to restore flash + program access to flash memory data. diff --git a/project/at_start_f435/examples/flash/fap_enable/src/at32f435_437_clock.c b/project/at_start_f435/examples/flash/fap_enable/src/at32f435_437_clock.c new file mode 100644 index 00000000..5eb8f824 --- /dev/null +++ b/project/at_start_f435/examples/flash/fap_enable/src/at32f435_437_clock.c @@ -0,0 +1,121 @@ +/** + ************************************************************************** + * @file at32f435_437_clock.c + * @version v2.0.9 + * @date 2022-06-28 + * @brief system clock config program + ************************************************************************** + * Copyright notice & Disclaimer + * + * The software Board Support Package (BSP) that is made available to + * download from Artery official website is the copyrighted work of Artery. + * Artery authorizes customers to use, copy, and distribute the BSP + * software and its related documentation for the purpose of design and + * development in conjunction with Artery microcontrollers. Use of the + * software is governed by this copyright notice and the following disclaimer. + * + * THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, + * GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, + * TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR + * STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, + * INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. + * + ************************************************************************** + */ + +/* includes ------------------------------------------------------------------*/ +#include "at32f435_437_clock.h" + +/** + * @brief system clock config program + * @note the system clock is configured as follow: + * - system clock = (hext * pll_ns)/(pll_ms * pll_fr) + * - system clock source = pll (hext) + * - hext = 8000000 + * - sclk = 288000000 + * - ahbdiv = 1 + * - ahbclk = 288000000 + * - apb2div = 2 + * - apb2clk = 144000000 + * - apb1div = 2 + * - apb1clk = 144000000 + * - pll_ns = 72 + * - pll_ms = 1 + * - pll_fr = 2 + * @param none + * @retval none + */ +void system_clock_config(void) +{ + /* enable pwc periph clock */ + crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE); + + /* config ldo voltage */ + pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3); + + /* set the flash clock divider */ + flash_clock_divider_set(FLASH_CLOCK_DIV_3); + + /* reset crm */ + crm_reset(); + + crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE); + + /* wait till hext is ready */ + while(crm_hext_stable_wait() == ERROR) + { + } + + /* config pll clock resource + common frequency config list: pll source selected hick or hext(8mhz) + _______________________________________________________________________________________ + | | | | | | | | | | + |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 | + |________|_________|_________|_________|_________|_________|_________|_________________| + | | | | | | | | | | + |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 | + | | | | | | | | | | + |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | + | | | | | | | | | | + |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16| + |________|_________|_________|_________|_________|_________|_________|________|________| + + if pll clock source selects hext with other frequency values, or configure pll to other + frequency values, please use the at32 new clock configuration tool for configuration. */ + crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2); + + /* enable pll */ + crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE); + + /* wait till pll is ready */ + while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET) + { + } + + /* config ahbclk */ + crm_ahb_div_set(CRM_AHB_DIV_1); + + /* config apb2clk */ + crm_apb2_div_set(CRM_APB2_DIV_2); + + /* config apb1clk */ + crm_apb1_div_set(CRM_APB1_DIV_2); + + /* enable auto step mode */ + crm_auto_step_mode_enable(TRUE); + + /* select pll as system clock source */ + crm_sysclk_switch(CRM_SCLK_PLL); + + /* wait till pll is used as system clock source */ + while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL) + { + } + + /* disable auto step mode */ + crm_auto_step_mode_enable(FALSE); + + /* update system_core_clock global variable */ + system_core_clock_update(); +} diff --git a/project/at_start_f435/examples/flash/fap_enable/src/at32f435_437_int.c b/project/at_start_f435/examples/flash/fap_enable/src/at32f435_437_int.c new file mode 100644 index 00000000..564f472b --- /dev/null +++ b/project/at_start_f435/examples/flash/fap_enable/src/at32f435_437_int.c @@ -0,0 +1,142 @@ +/** + ************************************************************************** + * @file at32f435_437_int.c + * @version v2.0.9 + * @date 2022-06-28 + * @brief main interrupt service routines. + ************************************************************************** + * Copyright notice & Disclaimer + * + * The software Board Support Package (BSP) that is made available to + * download from Artery official website is the copyrighted work of Artery. + * Artery authorizes customers to use, copy, and distribute the BSP + * software and its related documentation for the purpose of design and + * development in conjunction with Artery microcontrollers. Use of the + * software is governed by this copyright notice and the following disclaimer. + * + * THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, + * GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, + * TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR + * STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, + * INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. + * + ************************************************************************** + */ + +/* includes ------------------------------------------------------------------*/ +#include "at32f435_437_int.h" + +/** @addtogroup AT32F435_periph_examples + * @{ + */ + +/** @addtogroup 435_FLASH_fap_enable + * @{ + */ + +/** + * @brief this function handles nmi exception. + * @param none + * @retval none + */ +void NMI_Handler(void) +{ +} + +/** + * @brief this function handles hard fault exception. + * @param none + * @retval none + */ +void HardFault_Handler(void) +{ + /* go to infinite loop when hard fault exception occurs */ + while(1) + { + } +} + +/** + * @brief this function handles memory manage exception. + * @param none + * @retval none + */ +void MemManage_Handler(void) +{ + /* go to infinite loop when memory manage exception occurs */ + while(1) + { + } +} + +/** + * @brief this function handles bus fault exception. + * @param none + * @retval none + */ +void BusFault_Handler(void) +{ + /* go to infinite loop when bus fault exception occurs */ + while(1) + { + } +} + +/** + * @brief this function handles usage fault exception. + * @param none + * @retval none + */ +void UsageFault_Handler(void) +{ + /* go to infinite loop when usage fault exception occurs */ + while(1) + { + } +} + +/** + * @brief this function handles svcall exception. + * @param none + * @retval none + */ +void SVC_Handler(void) +{ +} + +/** + * @brief this function handles debug monitor exception. + * @param none + * @retval none + */ +void DebugMon_Handler(void) +{ +} + +/** + * @brief this function handles pendsv_handler exception. + * @param none + * @retval none + */ +void PendSV_Handler(void) +{ +} + +/** + * @brief this function handles systick handler. + * @param none + * @retval none + */ +void SysTick_Handler(void) +{ +} + +/** + * @} + */ + +/** + * @} + */ + diff --git a/project/at_start_f435/examples/flash/fap_enable/src/main.c b/project/at_start_f435/examples/flash/fap_enable/src/main.c new file mode 100644 index 00000000..61982062 --- /dev/null +++ b/project/at_start_f435/examples/flash/fap_enable/src/main.c @@ -0,0 +1,81 @@ +/** + ************************************************************************** + * @file main.c + * @version v2.0.9 + * @date 2022-06-28 + * @brief main program + ************************************************************************** + * Copyright notice & Disclaimer + * + * The software Board Support Package (BSP) that is made available to + * download from Artery official website is the copyrighted work of Artery. + * Artery authorizes customers to use, copy, and distribute the BSP + * software and its related documentation for the purpose of design and + * development in conjunction with Artery microcontrollers. Use of the + * software is governed by this copyright notice and the following disclaimer. + * + * THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, + * GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, + * TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR + * STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, + * INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. + * + ************************************************************************** + */ + +#include "at32f435_437_board.h" +#include "at32f435_437_clock.h" + +/** @addtogroup AT32F435_periph_examples + * @{ + */ + +/** @addtogroup 435_FLASH_fap_enable FLASH_fap_enable + * @{ + */ + +/** + * @brief main function. + * @param none + * @retval none + */ +int main(void) +{ + flash_status_type status = FLASH_OPERATE_DONE; + system_clock_config(); + at32_board_init(); + if(flash_fap_status_get() == RESET) + { + flash_unlock(); + /* wait for operation to be completed */ + status = flash_operation_wait_for(OPERATION_TIMEOUT); + + if(status != FLASH_OPERATE_TIMEOUT) + { + if((status == FLASH_PROGRAM_ERROR) || (status == FLASH_EPP_ERROR)) + flash_flag_clear(FLASH_PRGMERR_FLAG | FLASH_EPPERR_FLAG); + + status = flash_fap_enable(TRUE); + if(status == FLASH_OPERATE_DONE) + nvic_system_reset(); + } + }else + { + at32_led_on(LED2); + at32_led_on(LED3); + at32_led_on(LED4); + } + while(1) + { + } +} + + +/** + * @} + */ + +/** + * @} + */ diff --git a/project/at_start_f435/examples/flash/flash_write_read/inc/at32f435_437_clock.h b/project/at_start_f435/examples/flash/flash_write_read/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/flash/flash_write_read/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/flash/flash_write_read/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/flash/flash_write_read/inc/at32f435_437_conf.h b/project/at_start_f435/examples/flash/flash_write_read/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/flash/flash_write_read/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/flash/flash_write_read/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/flash/flash_write_read/inc/at32f435_437_int.h b/project/at_start_f435/examples/flash/flash_write_read/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/flash/flash_write_read/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/flash/flash_write_read/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/flash/flash_write_read/inc/flash.h b/project/at_start_f435/examples/flash/flash_write_read/inc/flash.h index 08ff4863..a6d0fe94 100644 --- a/project/at_start_f435/examples/flash/flash_write_read/inc/flash.h +++ b/project/at_start_f435/examples/flash/flash_write_read/inc/flash.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file flash.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief flash header file ************************************************************************** * Copyright notice & Disclaimer @@ -44,8 +44,8 @@ */ void flash_read(uint32_t read_addr, uint16_t *p_buffer, uint16_t num_read); -void flash_write_nocheck(uint32_t write_addr, uint16_t *p_buffer, uint16_t num_write); -void flash_write(uint32_t write_addr,uint16_t *p_Buffer, uint16_t num_write); +error_status flash_write_nocheck(uint32_t write_addr, uint16_t *p_buffer, uint16_t num_write); +error_status flash_write(uint32_t write_addr,uint16_t *p_Buffer, uint16_t num_write); /** * @} diff --git a/project/at_start_f435/examples/flash/flash_write_read/mdk_v5/flash_write_read.uvprojx b/project/at_start_f435/examples/flash/flash_write_read/mdk_v5/flash_write_read.uvprojx index 1ee9645a..b8e258e6 100644 --- a/project/at_start_f435/examples/flash/flash_write_read/mdk_v5/flash_write_read.uvprojx +++ b/project/at_start_f435/examples/flash/flash_write_read/mdk_v5/flash_write_read.uvprojx @@ -10,7 +10,7 @@ flash_write_read 0x4 ARM-ADS - 5060061::V5.06 update 1 (build 61)::ARMCC + 5060960::V5.06 update 7 (build 960)::.\ARMCC 0 diff --git a/project/at_start_f435/examples/flash/flash_write_read/readme.txt b/project/at_start_f435/examples/flash/flash_write_read/readme.txt index dbdac525..ce83575e 100644 --- a/project/at_start_f435/examples/flash/flash_write_read/readme.txt +++ b/project/at_start_f435/examples/flash/flash_write_read/readme.txt @@ -1,12 +1,12 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ this demo is based on the at-start board, in this demo, test buffer will be wiriten to flash and read from same address, then compare them. if the - test is success, the three leds will turn on. + test is passed, the three leds will turn on. diff --git a/project/at_start_f435/examples/flash/flash_write_read/src/at32f435_437_clock.c b/project/at_start_f435/examples/flash/flash_write_read/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/flash/flash_write_read/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/flash/flash_write_read/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/flash/flash_write_read/src/at32f435_437_int.c b/project/at_start_f435/examples/flash/flash_write_read/src/at32f435_437_int.c index 52762c3f..c80969d8 100644 --- a/project/at_start_f435/examples/flash/flash_write_read/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/flash/flash_write_read/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/flash/flash_write_read/src/flash.c b/project/at_start_f435/examples/flash/flash_write_read/src/flash.c index ea79a559..18577cb8 100644 --- a/project/at_start_f435/examples/flash/flash_write_read/src/flash.c +++ b/project/at_start_f435/examples/flash/flash_write_read/src/flash.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file flash.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief flash program ************************************************************************** * Copyright notice & Disclaimer @@ -61,16 +61,20 @@ void flash_read(uint32_t read_addr, uint16_t *p_buffer, uint16_t num_read) * @param write_addr: the address of writing * @param p_buffer: the buffer of writing data * @param num_write: the number of writing data - * @retval none + * @retval result */ -void flash_write_nocheck(uint32_t write_addr, uint16_t *p_buffer, uint16_t num_write) +error_status flash_write_nocheck(uint32_t write_addr, uint16_t *p_buffer, uint16_t num_write) { uint16_t i; + flash_status_type status = FLASH_OPERATE_DONE; for(i = 0; i < num_write; i++) { - flash_halfword_program(write_addr, p_buffer[i]); + status = flash_halfword_program(write_addr, p_buffer[i]); + if(status != FLASH_OPERATE_DONE) + return ERROR; write_addr += 2; } + return SUCCESS; } /** @@ -78,16 +82,17 @@ void flash_write_nocheck(uint32_t write_addr, uint16_t *p_buffer, uint16_t num_w * @param write_addr: the address of writing * @param p_buffer: the buffer of writing data * @param num_write: the number of writing data - * @retval none + * @retval result */ -void flash_write(uint32_t write_addr, uint16_t *p_buffer, uint16_t num_write) +error_status flash_write(uint32_t write_addr, uint16_t *p_buffer, uint16_t num_write) { uint32_t offset_addr; uint32_t sector_position; uint16_t sector_offset; uint16_t sector_remain; uint16_t i; - + flash_status_type status = FLASH_OPERATE_DONE; + flash_unlock(); offset_addr = write_addr - FLASH_BASE; sector_position = offset_addr / SECTOR_SIZE; @@ -105,16 +110,27 @@ void flash_write(uint32_t write_addr, uint16_t *p_buffer, uint16_t num_write) } if(i < sector_remain) { - flash_sector_erase(sector_position * SECTOR_SIZE + FLASH_BASE); + /* wait for operation to be completed */ + status = flash_operation_wait_for(ERASE_TIMEOUT); + + if((status == FLASH_PROGRAM_ERROR) || (status == FLASH_EPP_ERROR)) + flash_flag_clear(FLASH_PRGMERR_FLAG | FLASH_EPPERR_FLAG); + else if(status == FLASH_OPERATE_TIMEOUT) + return ERROR; + status = flash_sector_erase(sector_position * SECTOR_SIZE + FLASH_BASE); + if(status != FLASH_OPERATE_DONE) + return ERROR; for(i = 0; i < sector_remain; i++) { flash_buf[i + sector_offset] = p_buffer[i]; } - flash_write_nocheck(sector_position * SECTOR_SIZE + FLASH_BASE, flash_buf, SECTOR_SIZE / 2); + if(flash_write_nocheck(sector_position * SECTOR_SIZE + FLASH_BASE, flash_buf, SECTOR_SIZE / 2) != SUCCESS) + return ERROR; } else { - flash_write_nocheck(write_addr, p_buffer, sector_remain); + if(flash_write_nocheck(write_addr, p_buffer, sector_remain) != SUCCESS) + return ERROR; } if(num_write == sector_remain) break; @@ -132,8 +148,11 @@ void flash_write(uint32_t write_addr, uint16_t *p_buffer, uint16_t num_write) } } flash_lock(); + return SUCCESS; } + + /** * @} */ diff --git a/project/at_start_f435/examples/flash/flash_write_read/src/main.c b/project/at_start_f435/examples/flash/flash_write_read/src/main.c index ae790a09..53af760d 100644 --- a/project/at_start_f435/examples/flash/flash_write_read/src/main.c +++ b/project/at_start_f435/examples/flash/flash_write_read/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer @@ -37,7 +37,7 @@ */ #define TEST_BUFEER_SIZE 3000 -#define TEST_FLASH_ADDRESS_START (0x08000000 + 1024 * 512) +#define TEST_FLASH_ADDRESS_START (0x08000000 + 1024 * 10) uint16_t buffer_write[TEST_BUFEER_SIZE]; uint16_t buffer_read[TEST_BUFEER_SIZE]; @@ -48,8 +48,8 @@ error_status buffer_compare(uint16_t* p_buffer1, uint16_t* p_buffer2, uint16_t b * @brief compares two buffers. * @param p_buffer1, p_buffer2: buffers to be compared. * @param buffer_length: buffer's length - * @retval success: p_buffer1 identical to p_buffer2 - * error: p_buffer1 differs from p_buffer2 + * @retval SUCCESS: p_buffer1 identical to p_buffer2 + * ERROR: p_buffer1 differs from p_buffer2 */ error_status buffer_compare(uint16_t* p_buffer1, uint16_t* p_buffer2, uint16_t buffer_length) { @@ -73,6 +73,7 @@ error_status buffer_compare(uint16_t* p_buffer1, uint16_t* p_buffer2, uint16_t b int main(void) { uint32_t index=0; + error_status err_status; system_clock_config(); at32_board_init(); /* fill buffer_write data to test */ @@ -82,13 +83,13 @@ int main(void) } /* write data to flash */ - flash_write(TEST_FLASH_ADDRESS_START, buffer_write, TEST_BUFEER_SIZE); + err_status = flash_write(TEST_FLASH_ADDRESS_START, buffer_write, TEST_BUFEER_SIZE); /* read data from flash */ flash_read(TEST_FLASH_ADDRESS_START, buffer_read, TEST_BUFEER_SIZE); /* compare the buffer */ - if(buffer_compare(buffer_write, buffer_read, TEST_BUFEER_SIZE) == SUCCESS) + if((buffer_compare(buffer_write, buffer_read, TEST_BUFEER_SIZE) == SUCCESS) && (err_status == SUCCESS)) { at32_led_on(LED2); at32_led_on(LED3); @@ -100,6 +101,7 @@ int main(void) } } + /** * @} */ diff --git a/project/at_start_f435/examples/gpio/io_toggle/inc/at32f435_437_clock.h b/project/at_start_f435/examples/gpio/io_toggle/inc/at32f435_437_clock.h new file mode 100644 index 00000000..86a4b828 --- /dev/null +++ b/project/at_start_f435/examples/gpio/io_toggle/inc/at32f435_437_clock.h @@ -0,0 +1,46 @@ +/** + ************************************************************************** + * @file at32f435_437_clock.h + * @version v2.0.9 + * @date 2022-06-28 + * @brief header file of clock program + ************************************************************************** + * Copyright notice & Disclaimer + * + * The software Board Support Package (BSP) that is made available to + * download from Artery official website is the copyrighted work of Artery. + * Artery authorizes customers to use, copy, and distribute the BSP + * software and its related documentation for the purpose of design and + * development in conjunction with Artery microcontrollers. Use of the + * software is governed by this copyright notice and the following disclaimer. + * + * THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, + * GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, + * TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR + * STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, + * INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. + * + ************************************************************************** + */ + +/* define to prevent recursive inclusion -------------------------------------*/ +#ifndef __AT32F435_437_CLOCK_H +#define __AT32F435_437_CLOCK_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* includes ------------------------------------------------------------------*/ +#include "at32f435_437.h" + +/* exported functions ------------------------------------------------------- */ +void system_clock_config(void); + +#ifdef __cplusplus +} +#endif + +#endif + diff --git a/project/at_start_f435/examples/gpio/io_toggle/inc/at32f435_437_conf.h b/project/at_start_f435/examples/gpio/io_toggle/inc/at32f435_437_conf.h new file mode 100644 index 00000000..e2816415 --- /dev/null +++ b/project/at_start_f435/examples/gpio/io_toggle/inc/at32f435_437_conf.h @@ -0,0 +1,174 @@ +/** + ************************************************************************** + * @file at32f435_437_conf.h + * @version v2.0.9 + * @date 2022-06-28 + * @brief at32f435_437 config header file + ************************************************************************** + * Copyright notice & Disclaimer + * + * The software Board Support Package (BSP) that is made available to + * download from Artery official website is the copyrighted work of Artery. + * Artery authorizes customers to use, copy, and distribute the BSP + * software and its related documentation for the purpose of design and + * development in conjunction with Artery microcontrollers. Use of the + * software is governed by this copyright notice and the following disclaimer. + * + * THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, + * GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, + * TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR + * STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, + * INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. + * + ************************************************************************** + */ + +/* define to prevent recursive inclusion -------------------------------------*/ +#ifndef __AT32F435_437_CONF_H +#define __AT32F435_437_CONF_H + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @brief in the following line adjust the value of high speed exernal crystal (hext) + * used in your application + * + * tip: to avoid modifying this file each time you need to use different hext, you + * can define the hext value in your toolchain compiler preprocessor. + * + */ +#if !defined HEXT_VALUE +#define HEXT_VALUE ((uint32_t)8000000) /*!< value of the high speed exernal crystal in hz */ +#endif + +/** + * @brief in the following line adjust the high speed exernal crystal (hext) startup + * timeout value + */ +#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000) /*!< time out for hext start up */ +#define HICK_VALUE ((uint32_t)8000000) /*!< value of the high speed internal clock in hz */ + +/* module define -------------------------------------------------------------*/ +#define CRM_MODULE_ENABLED +#define TMR_MODULE_ENABLED +#define ERTC_MODULE_ENABLED +#define GPIO_MODULE_ENABLED +#define I2C_MODULE_ENABLED +#define USART_MODULE_ENABLED +#define PWC_MODULE_ENABLED +#define CAN_MODULE_ENABLED +#define ADC_MODULE_ENABLED +#define DAC_MODULE_ENABLED +#define SPI_MODULE_ENABLED +#define EDMA_MODULE_ENABLED +#define DMA_MODULE_ENABLED +#define DEBUG_MODULE_ENABLED +#define FLASH_MODULE_ENABLED +#define CRC_MODULE_ENABLED +#define WWDT_MODULE_ENABLED +#define WDT_MODULE_ENABLED +#define EXINT_MODULE_ENABLED +#define SDIO_MODULE_ENABLED +#define XMC_MODULE_ENABLED +#define USB_MODULE_ENABLED +#define ACC_MODULE_ENABLED +#define MISC_MODULE_ENABLED +#define QSPI_MODULE_ENABLED +#define DVP_MODULE_ENABLED +#define SCFG_MODULE_ENABLED +#define EMAC_MODULE_ENABLED + +/* includes ------------------------------------------------------------------*/ +#ifdef CRM_MODULE_ENABLED +#include "at32f435_437_crm.h" +#endif +#ifdef TMR_MODULE_ENABLED +#include "at32f435_437_tmr.h" +#endif +#ifdef ERTC_MODULE_ENABLED +#include "at32f435_437_ertc.h" +#endif +#ifdef GPIO_MODULE_ENABLED +#include "at32f435_437_gpio.h" +#endif +#ifdef I2C_MODULE_ENABLED +#include "at32f435_437_i2c.h" +#endif +#ifdef USART_MODULE_ENABLED +#include "at32f435_437_usart.h" +#endif +#ifdef PWC_MODULE_ENABLED +#include "at32f435_437_pwc.h" +#endif +#ifdef CAN_MODULE_ENABLED +#include "at32f435_437_can.h" +#endif +#ifdef ADC_MODULE_ENABLED +#include "at32f435_437_adc.h" +#endif +#ifdef DAC_MODULE_ENABLED +#include "at32f435_437_dac.h" +#endif +#ifdef SPI_MODULE_ENABLED +#include "at32f435_437_spi.h" +#endif +#ifdef DMA_MODULE_ENABLED +#include "at32f435_437_dma.h" +#endif +#ifdef DEBUG_MODULE_ENABLED +#include "at32f435_437_debug.h" +#endif +#ifdef FLASH_MODULE_ENABLED +#include "at32f435_437_flash.h" +#endif +#ifdef CRC_MODULE_ENABLED +#include "at32f435_437_crc.h" +#endif +#ifdef WWDT_MODULE_ENABLED +#include "at32f435_437_wwdt.h" +#endif +#ifdef WDT_MODULE_ENABLED +#include "at32f435_437_wdt.h" +#endif +#ifdef EXINT_MODULE_ENABLED +#include "at32f435_437_exint.h" +#endif +#ifdef SDIO_MODULE_ENABLED +#include "at32f435_437_sdio.h" +#endif +#ifdef XMC_MODULE_ENABLED +#include "at32f435_437_xmc.h" +#endif +#ifdef ACC_MODULE_ENABLED +#include "at32f435_437_acc.h" +#endif +#ifdef MISC_MODULE_ENABLED +#include "at32f435_437_misc.h" +#endif +#ifdef EDMA_MODULE_ENABLED +#include "at32f435_437_edma.h" +#endif +#ifdef QSPI_MODULE_ENABLED +#include "at32f435_437_qspi.h" +#endif +#ifdef SCFG_MODULE_ENABLED +#include "at32f435_437_scfg.h" +#endif +#ifdef EMAC_MODULE_ENABLED +#include "at32f435_437_emac.h" +#endif +#ifdef DVP_MODULE_ENABLED +#include "at32f435_437_dvp.h" +#endif +#ifdef USB_MODULE_ENABLED +#include "at32f435_437_usb.h" +#endif + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/project/at_start_f435/examples/gpio/io_toggle/inc/at32f435_437_int.h b/project/at_start_f435/examples/gpio/io_toggle/inc/at32f435_437_int.h new file mode 100644 index 00000000..80aec042 --- /dev/null +++ b/project/at_start_f435/examples/gpio/io_toggle/inc/at32f435_437_int.h @@ -0,0 +1,58 @@ +/** + ************************************************************************** + * @file at32f435_437_int.h + * @version v2.0.9 + * @date 2022-06-28 + * @brief header file of main interrupt service routines. + ************************************************************************** + * Copyright notice & Disclaimer + * + * The software Board Support Package (BSP) that is made available to + * download from Artery official website is the copyrighted work of Artery. + * Artery authorizes customers to use, copy, and distribute the BSP + * software and its related documentation for the purpose of design and + * development in conjunction with Artery microcontrollers. Use of the + * software is governed by this copyright notice and the following disclaimer. + * + * THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, + * GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, + * TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR + * STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, + * INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. + * + ************************************************************************** + */ + +/* define to prevent recursive inclusion -------------------------------------*/ +#ifndef __AT32F435_437_INT_H +#define __AT32F435_437_INT_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* includes ------------------------------------------------------------------*/ +#include "at32f435_437.h" + +/* exported types ------------------------------------------------------------*/ +/* exported constants --------------------------------------------------------*/ +/* exported macro ------------------------------------------------------------*/ +/* exported functions ------------------------------------------------------- */ + +void NMI_Handler(void); +void HardFault_Handler(void); +void MemManage_Handler(void); +void BusFault_Handler(void); +void UsageFault_Handler(void); +void SVC_Handler(void); +void DebugMon_Handler(void); +void PendSV_Handler(void); +void SysTick_Handler(void); + +#ifdef __cplusplus +} +#endif + +#endif + diff --git a/project/at_start_f435/examples/gpio/io_toggle/mdk_v5/io_toggle.uvoptx b/project/at_start_f435/examples/gpio/io_toggle/mdk_v5/io_toggle.uvoptx new file mode 100644 index 00000000..05736774 --- /dev/null +++ b/project/at_start_f435/examples/gpio/io_toggle/mdk_v5/io_toggle.uvoptx @@ -0,0 +1,344 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj; *.o + *.lib + *.txt; *.h; *.inc + *.plm + *.cpp + 0 + + + + 0 + 0 + + + + io_toggle + 0x4 + ARM-ADS + + 12000000 + + 0 + 1 + 0 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\listings\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 0 + 0 + 1 + + 0 + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 0 + + + + + + + + + + + BIN\CMSIS_AGDI.dll + + + + 0 + UL2CM3 + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0AT32F435_4032 -FS08000000 -FL03F0000 -FP0($$Device:-AT32F435ZMT7$Flash\AT32F435_4032.FLM)) + + + + + 0 + + + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + 0 + 0 + 0 + + + + + + + + + + + + + user + 0 + 0 + 0 + 0 + + 1 + 1 + 1 + 0 + 0 + 0 + ..\src\at32f435_437_clock.c + at32f435_437_clock.c + 0 + 0 + + + 1 + 2 + 1 + 0 + 0 + 0 + ..\src\at32f435_437_int.c + at32f435_437_int.c + 0 + 0 + + + 1 + 3 + 1 + 0 + 0 + 0 + ..\src\main.c + main.c + 0 + 0 + + + + + bsp + 0 + 0 + 0 + 0 + + 2 + 4 + 1 + 0 + 0 + 0 + ..\..\..\..\..\at32f435_437_board\at32f435_437_board.c + at32f435_437_board.c + 0 + 0 + + + + + firmware + 0 + 0 + 0 + 0 + + 3 + 5 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_gpio.c + at32f435_437_gpio.c + 0 + 0 + + + 3 + 6 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_crm.c + at32f435_437_crm.c + 0 + 0 + + + 3 + 7 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_usart.c + at32f435_437_usart.c + 0 + 0 + + + 3 + 8 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_misc.c + at32f435_437_misc.c + 0 + 0 + + + + + cmsis + 0 + 0 + 0 + 0 + + 4 + 9 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\libraries\cmsis\cm4\device_support\system_at32f435_437.c + system_at32f435_437.c + 0 + 0 + + + 4 + 10 + 2 + 0 + 0 + 0 + ..\..\..\..\..\..\libraries\cmsis\cm4\device_support\startup\mdk\startup_at32f435_437.s + startup_at32f435_437.s + 0 + 0 + + + + + readme + 0 + 0 + 0 + 0 + + 5 + 11 + 5 + 0 + 0 + 0 + ..\readme.txt + readme.txt + 0 + 0 + + + + diff --git a/project/at_start_f435/examples/gpio/io_toggle/mdk_v5/io_toggle.uvprojx b/project/at_start_f435/examples/gpio/io_toggle/mdk_v5/io_toggle.uvprojx new file mode 100644 index 00000000..4ea1c7a2 --- /dev/null +++ b/project/at_start_f435/examples/gpio/io_toggle/mdk_v5/io_toggle.uvprojx @@ -0,0 +1,487 @@ + + + + 2.1 + +
### uVision Project, (C) Keil Software
+ + + + io_toggle + 0x4 + ARM-ADS + 5060750::V5.06 update 6 (build 750)::.\ARMCC + 0 + + + -AT32F435ZMT7 + ArteryTek + ArteryTek.AT32F435_437_DFP.2.0.1 + IRAM(0x20000000,0x60000) IROM(0x08000000,0x3F0000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0AT32F435_4032 -FS08000000 -FL03F0000 -FP0($$Device:-AT32F435ZMT7$Flash\AT32F435_4032.FLM)) + 0 + $$Device:- + + + + + + + + + + $$Device:-AT32F435ZMT7$SVD\AT32F435xx_v2.svd + 0 + 0 + + + + AT32F435ZMT7$Device\Include\at32f435_437.h\ + AT32F435ZMT7$Device\Include\at32f435_437.h\ + + 0 + 0 + 0 + 0 + 1 + + .\objects\ + io_toggle + 1 + 0 + 1 + 1 + 1 + .\listings\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 0 + + + SARMCM3.DLL + -REMAP -MPU + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM4 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 1 + 4096 + + 1 + BIN\UL2CM3.DLL + + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M4" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 2 + 0 + 0 + 0 + 0 + 8 + 0 + 0 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x60000 + + + 1 + 0x8000000 + 0x3f0000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x8000000 + 0x3f0000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x60000 + + + 0 + 0x0 + 0x0 + + + + + + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 0 + + + AT32F435ZMT7,USE_STDPERIPH_DRIVER,AT_START_F435_V1 + + ..\..\..\..\..\..\libraries\drivers\inc;..\..\..\..\..\..\libraries\cmsis\cm4\core_support;..\..\..\..\..\..\libraries\cmsis\cm4\device_support;..\..\..\..\templates\inc;..\..\..\..\..\at32f435_437_board + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 4 + + + + + + + + + 1 + 0 + 0 + 0 + 1 + 0 + 0x08000000 + 0x20000000 + + + + + + + + + + + + + user + + + at32f435_437_clock.c + 1 + ..\src\at32f435_437_clock.c + + + at32f435_437_int.c + 1 + ..\src\at32f435_437_int.c + + + main.c + 1 + ..\src\main.c + + + + + bsp + + + at32f435_437_board.c + 1 + ..\..\..\..\..\at32f435_437_board\at32f435_437_board.c + + + + + firmware + + + at32f435_437_gpio.c + 1 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_gpio.c + + + at32f435_437_crm.c + 1 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_crm.c + + + at32f435_437_usart.c + 1 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_usart.c + + + at32f435_437_misc.c + 1 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_misc.c + + + + + cmsis + + + system_at32f435_437.c + 1 + ..\..\..\..\..\..\libraries\cmsis\cm4\device_support\system_at32f435_437.c + + + startup_at32f435_437.s + 2 + ..\..\..\..\..\..\libraries\cmsis\cm4\device_support\startup\mdk\startup_at32f435_437.s + + + + + readme + + + readme.txt + 5 + ..\readme.txt + + + + + + + + + + + + + + + + + <Project Info> + + + + + + 0 + 1 + + + + + diff --git a/project/at_start_f435/examples/gpio/io_toggle/readme.txt b/project/at_start_f435/examples/gpio/io_toggle/readme.txt new file mode 100644 index 00000000..7a5ba08a --- /dev/null +++ b/project/at_start_f435/examples/gpio/io_toggle/readme.txt @@ -0,0 +1,11 @@ +/** + ************************************************************************** + * @file readme.txt + * @version v2.0.9 + * @date 2022-06-28 + * @brief readme + ************************************************************************** + */ + + this demo is based on the at-start board, this demo toggle pa.01 forever, + to describes how to use scr and clr register for max io toggling. \ No newline at end of file diff --git a/project/at_start_f435/examples/gpio/io_toggle/src/at32f435_437_clock.c b/project/at_start_f435/examples/gpio/io_toggle/src/at32f435_437_clock.c new file mode 100644 index 00000000..5eb8f824 --- /dev/null +++ b/project/at_start_f435/examples/gpio/io_toggle/src/at32f435_437_clock.c @@ -0,0 +1,121 @@ +/** + ************************************************************************** + * @file at32f435_437_clock.c + * @version v2.0.9 + * @date 2022-06-28 + * @brief system clock config program + ************************************************************************** + * Copyright notice & Disclaimer + * + * The software Board Support Package (BSP) that is made available to + * download from Artery official website is the copyrighted work of Artery. + * Artery authorizes customers to use, copy, and distribute the BSP + * software and its related documentation for the purpose of design and + * development in conjunction with Artery microcontrollers. Use of the + * software is governed by this copyright notice and the following disclaimer. + * + * THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, + * GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, + * TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR + * STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, + * INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. + * + ************************************************************************** + */ + +/* includes ------------------------------------------------------------------*/ +#include "at32f435_437_clock.h" + +/** + * @brief system clock config program + * @note the system clock is configured as follow: + * - system clock = (hext * pll_ns)/(pll_ms * pll_fr) + * - system clock source = pll (hext) + * - hext = 8000000 + * - sclk = 288000000 + * - ahbdiv = 1 + * - ahbclk = 288000000 + * - apb2div = 2 + * - apb2clk = 144000000 + * - apb1div = 2 + * - apb1clk = 144000000 + * - pll_ns = 72 + * - pll_ms = 1 + * - pll_fr = 2 + * @param none + * @retval none + */ +void system_clock_config(void) +{ + /* enable pwc periph clock */ + crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE); + + /* config ldo voltage */ + pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3); + + /* set the flash clock divider */ + flash_clock_divider_set(FLASH_CLOCK_DIV_3); + + /* reset crm */ + crm_reset(); + + crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE); + + /* wait till hext is ready */ + while(crm_hext_stable_wait() == ERROR) + { + } + + /* config pll clock resource + common frequency config list: pll source selected hick or hext(8mhz) + _______________________________________________________________________________________ + | | | | | | | | | | + |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 | + |________|_________|_________|_________|_________|_________|_________|_________________| + | | | | | | | | | | + |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 | + | | | | | | | | | | + |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | + | | | | | | | | | | + |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16| + |________|_________|_________|_________|_________|_________|_________|________|________| + + if pll clock source selects hext with other frequency values, or configure pll to other + frequency values, please use the at32 new clock configuration tool for configuration. */ + crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2); + + /* enable pll */ + crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE); + + /* wait till pll is ready */ + while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET) + { + } + + /* config ahbclk */ + crm_ahb_div_set(CRM_AHB_DIV_1); + + /* config apb2clk */ + crm_apb2_div_set(CRM_APB2_DIV_2); + + /* config apb1clk */ + crm_apb1_div_set(CRM_APB1_DIV_2); + + /* enable auto step mode */ + crm_auto_step_mode_enable(TRUE); + + /* select pll as system clock source */ + crm_sysclk_switch(CRM_SCLK_PLL); + + /* wait till pll is used as system clock source */ + while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL) + { + } + + /* disable auto step mode */ + crm_auto_step_mode_enable(FALSE); + + /* update system_core_clock global variable */ + system_core_clock_update(); +} diff --git a/project/at_start_f435/examples/gpio/io_toggle/src/at32f435_437_int.c b/project/at_start_f435/examples/gpio/io_toggle/src/at32f435_437_int.c new file mode 100644 index 00000000..f83273cd --- /dev/null +++ b/project/at_start_f435/examples/gpio/io_toggle/src/at32f435_437_int.c @@ -0,0 +1,141 @@ +/** + ************************************************************************** + * @file at32f435_437_int.c + * @version v2.0.9 + * @date 2022-06-28 + * @brief main interrupt service routines. + ************************************************************************** + * Copyright notice & Disclaimer + * + * The software Board Support Package (BSP) that is made available to + * download from Artery official website is the copyrighted work of Artery. + * Artery authorizes customers to use, copy, and distribute the BSP + * software and its related documentation for the purpose of design and + * development in conjunction with Artery microcontrollers. Use of the + * software is governed by this copyright notice and the following disclaimer. + * + * THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, + * GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, + * TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR + * STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, + * INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. + * + ************************************************************************** + */ + +/* includes ------------------------------------------------------------------*/ +#include "at32f435_437_int.h" + +/** @addtogroup AT32F435_periph_examples + * @{ + */ + +/** @addtogroup 435_GPIO_io_toggle + * @{ + */ + +/** + * @brief this function handles nmi exception. + * @param none + * @retval none + */ +void NMI_Handler(void) +{ +} + +/** + * @brief this function handles hard fault exception. + * @param none + * @retval none + */ +void HardFault_Handler(void) +{ + /* go to infinite loop when hard fault exception occurs */ + while(1) + { + } +} + +/** + * @brief this function handles memory manage exception. + * @param none + * @retval none + */ +void MemManage_Handler(void) +{ + /* go to infinite loop when memory manage exception occurs */ + while(1) + { + } +} + +/** + * @brief this function handles bus fault exception. + * @param none + * @retval none + */ +void BusFault_Handler(void) +{ + /* go to infinite loop when bus fault exception occurs */ + while(1) + { + } +} + +/** + * @brief this function handles usage fault exception. + * @param none + * @retval none + */ +void UsageFault_Handler(void) +{ + /* go to infinite loop when usage fault exception occurs */ + while(1) + { + } +} + +/** + * @brief this function handles svcall exception. + * @param none + * @retval none + */ +void SVC_Handler(void) +{ +} + +/** + * @brief this function handles debug monitor exception. + * @param none + * @retval none + */ +void DebugMon_Handler(void) +{ +} + +/** + * @brief this function handles pendsv_handler exception. + * @param none + * @retval none + */ +void PendSV_Handler(void) +{ +} + +/** + * @brief this function handles systick handler. + * @param none + * @retval none + */ +void SysTick_Handler(void) +{ +} + +/** + * @} + */ + +/** + * @} + */ diff --git a/project/at_start_f435/examples/gpio/io_toggle/src/main.c b/project/at_start_f435/examples/gpio/io_toggle/src/main.c new file mode 100644 index 00000000..e56e992e --- /dev/null +++ b/project/at_start_f435/examples/gpio/io_toggle/src/main.c @@ -0,0 +1,114 @@ +/** + ************************************************************************** + * @file main.c + * @version v2.0.9 + * @date 2022-06-28 + * @brief main program + ************************************************************************** + * Copyright notice & Disclaimer + * + * The software Board Support Package (BSP) that is made available to + * download from Artery official website is the copyrighted work of Artery. + * Artery authorizes customers to use, copy, and distribute the BSP + * software and its related documentation for the purpose of design and + * development in conjunction with Artery microcontrollers. Use of the + * software is governed by this copyright notice and the following disclaimer. + * + * THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, + * GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, + * TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR + * STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, + * INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. + * + ************************************************************************** + */ + +/* includes */ +#include "at32f435_437_board.h" +#include "at32f435_437_clock.h" + +/** @addtogroup AT32F435_periph_examples + * @{ + */ + +/** @addtogroup 435_GPIO_io_toggle GPIO_io_toggle + * @{ + */ + +/** + * @brief pa.01 gpio configuration. + * @param none + * @retval none + */ +void gpio_config(void) +{ + gpio_init_type gpio_init_struct; + + /* enable the gpioa clock */ + crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE); + + /* set default parameter */ + gpio_default_para_init(&gpio_init_struct); + + /* configure the gpio */ + gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; + gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_init_struct.gpio_mode = GPIO_MODE_OUTPUT; + gpio_init_struct.gpio_pins = GPIO_PINS_1; + gpio_init_struct.gpio_pull = GPIO_PULL_NONE; + gpio_init(GPIOA, &gpio_init_struct); +} + +/** + * @brief main function. + * @param none + * @retval none + */ +int main(void) +{ + system_clock_config(); + + gpio_config(); + + while(1) + { + /* set pa.01 */ + GPIOA->scr = GPIO_PINS_1; + /* reset pa.01 */ + GPIOA->clr = GPIO_PINS_1; + + /* set pa.01 */ + GPIOA->scr = GPIO_PINS_1; + /* reset pa.01 */ + GPIOA->clr = GPIO_PINS_1; + + /* set pa.01 */ + GPIOA->scr = GPIO_PINS_1; + /* reset pa.01 */ + GPIOA->clr = GPIO_PINS_1; + + /* set pa.01 */ + GPIOA->scr = GPIO_PINS_1; + /* reset pa.01 */ + GPIOA->clr = GPIO_PINS_1; + + /* set pa.01 */ + GPIOA->scr = GPIO_PINS_1; + /* reset pa.01 */ + GPIOA->clr = GPIO_PINS_1; + + /* set pa.01 */ + GPIOA->scr = GPIO_PINS_1; + /* reset pa.01 */ + GPIOA->clr = GPIO_PINS_1; + } +} + +/** + * @} + */ + +/** + * @} + */ diff --git a/project/at_start_f435/examples/gpio/led_toggle/inc/at32f435_437_clock.h b/project/at_start_f435/examples/gpio/led_toggle/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/gpio/led_toggle/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/gpio/led_toggle/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/gpio/led_toggle/inc/at32f435_437_conf.h b/project/at_start_f435/examples/gpio/led_toggle/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/gpio/led_toggle/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/gpio/led_toggle/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/gpio/led_toggle/inc/at32f435_437_int.h b/project/at_start_f435/examples/gpio/led_toggle/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/gpio/led_toggle/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/gpio/led_toggle/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/gpio/led_toggle/readme.txt b/project/at_start_f435/examples/gpio/led_toggle/readme.txt index dee03ab8..fc5d04ce 100644 --- a/project/at_start_f435/examples/gpio/led_toggle/readme.txt +++ b/project/at_start_f435/examples/gpio/led_toggle/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/gpio/led_toggle/src/at32f435_437_clock.c b/project/at_start_f435/examples/gpio/led_toggle/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/gpio/led_toggle/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/gpio/led_toggle/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/gpio/led_toggle/src/at32f435_437_int.c b/project/at_start_f435/examples/gpio/led_toggle/src/at32f435_437_int.c index e2ed21bf..24b42c6f 100644 --- a/project/at_start_f435/examples/gpio/led_toggle/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/gpio/led_toggle/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/gpio/led_toggle/src/main.c b/project/at_start_f435/examples/gpio/led_toggle/src/main.c index e1ad976e..4b5c189e 100644 --- a/project/at_start_f435/examples/gpio/led_toggle/src/main.c +++ b/project/at_start_f435/examples/gpio/led_toggle/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/gpio/swjtag_mux/inc/at32f435_437_clock.h b/project/at_start_f435/examples/gpio/swjtag_mux/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/gpio/swjtag_mux/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/gpio/swjtag_mux/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/gpio/swjtag_mux/inc/at32f435_437_conf.h b/project/at_start_f435/examples/gpio/swjtag_mux/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/gpio/swjtag_mux/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/gpio/swjtag_mux/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/gpio/swjtag_mux/inc/at32f435_437_int.h b/project/at_start_f435/examples/gpio/swjtag_mux/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/gpio/swjtag_mux/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/gpio/swjtag_mux/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/gpio/swjtag_mux/readme.txt b/project/at_start_f435/examples/gpio/swjtag_mux/readme.txt index 79d1cb91..bcb84928 100644 --- a/project/at_start_f435/examples/gpio/swjtag_mux/readme.txt +++ b/project/at_start_f435/examples/gpio/swjtag_mux/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/gpio/swjtag_mux/src/at32f435_437_clock.c b/project/at_start_f435/examples/gpio/swjtag_mux/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/gpio/swjtag_mux/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/gpio/swjtag_mux/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/gpio/swjtag_mux/src/at32f435_437_int.c b/project/at_start_f435/examples/gpio/swjtag_mux/src/at32f435_437_int.c index 53b0f0cd..fc0f3a0e 100644 --- a/project/at_start_f435/examples/gpio/swjtag_mux/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/gpio/swjtag_mux/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/gpio/swjtag_mux/src/main.c b/project/at_start_f435/examples/gpio/swjtag_mux/src/main.c index fb046da5..f4a8ba8b 100644 --- a/project/at_start_f435/examples/gpio/swjtag_mux/src/main.c +++ b/project/at_start_f435/examples/gpio/swjtag_mux/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/i2c/communication_dma/inc/at32f435_437_clock.h b/project/at_start_f435/examples/i2c/communication_dma/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/i2c/communication_dma/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/i2c/communication_dma/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/i2c/communication_dma/inc/at32f435_437_conf.h b/project/at_start_f435/examples/i2c/communication_dma/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/i2c/communication_dma/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/i2c/communication_dma/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/i2c/communication_dma/inc/at32f435_437_int.h b/project/at_start_f435/examples/i2c/communication_dma/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/i2c/communication_dma/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/i2c/communication_dma/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/i2c/communication_dma/readme.txt b/project/at_start_f435/examples/i2c/communication_dma/readme.txt index 9c3d36cc..f767d1f3 100644 --- a/project/at_start_f435/examples/i2c/communication_dma/readme.txt +++ b/project/at_start_f435/examples/i2c/communication_dma/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file communicationdma/readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/i2c/communication_dma/src/at32f435_437_clock.c b/project/at_start_f435/examples/i2c/communication_dma/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/i2c/communication_dma/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/i2c/communication_dma/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/i2c/communication_dma/src/at32f435_437_int.c b/project/at_start_f435/examples/i2c/communication_dma/src/at32f435_437_int.c index 9ea140e3..2df5b97a 100644 --- a/project/at_start_f435/examples/i2c/communication_dma/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/i2c/communication_dma/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/i2c/communication_dma/src/main.c b/project/at_start_f435/examples/i2c/communication_dma/src/main.c index c88239c7..0a55c141 100644 --- a/project/at_start_f435/examples/i2c/communication_dma/src/main.c +++ b/project/at_start_f435/examples/i2c/communication_dma/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer @@ -304,7 +304,7 @@ void i2c_lowlevel_init(i2c_handle_type* hi2c) dmamux_enable(I2Cx_DMA, TRUE); /* config i2c */ - i2c_init(hi2c->i2cx, 0, I2Cx_CLKCTRL); + i2c_init(hi2c->i2cx, 0x0F, I2Cx_CLKCTRL); i2c_own_address1_set(hi2c->i2cx, I2C_ADDRESS_MODE_7BIT, I2Cx_ADDRESS); } diff --git a/project/at_start_f435/examples/i2c/communication_int/inc/at32f435_437_clock.h b/project/at_start_f435/examples/i2c/communication_int/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/i2c/communication_int/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/i2c/communication_int/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/i2c/communication_int/inc/at32f435_437_conf.h b/project/at_start_f435/examples/i2c/communication_int/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/i2c/communication_int/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/i2c/communication_int/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/i2c/communication_int/inc/at32f435_437_int.h b/project/at_start_f435/examples/i2c/communication_int/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/i2c/communication_int/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/i2c/communication_int/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/i2c/communication_int/readme.txt b/project/at_start_f435/examples/i2c/communication_int/readme.txt index 4dd6de59..73633281 100644 --- a/project/at_start_f435/examples/i2c/communication_int/readme.txt +++ b/project/at_start_f435/examples/i2c/communication_int/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file communicationint/readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/i2c/communication_int/src/at32f435_437_clock.c b/project/at_start_f435/examples/i2c/communication_int/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/i2c/communication_int/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/i2c/communication_int/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/i2c/communication_int/src/at32f435_437_int.c b/project/at_start_f435/examples/i2c/communication_int/src/at32f435_437_int.c index f0d4fd12..05b0ef63 100644 --- a/project/at_start_f435/examples/i2c/communication_int/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/i2c/communication_int/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/i2c/communication_int/src/main.c b/project/at_start_f435/examples/i2c/communication_int/src/main.c index 450fe07e..b93de6d7 100644 --- a/project/at_start_f435/examples/i2c/communication_int/src/main.c +++ b/project/at_start_f435/examples/i2c/communication_int/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer @@ -257,7 +257,7 @@ void i2c_lowlevel_init(i2c_handle_type* hi2c) nvic_irq_enable(I2Cx_ERR_IRQn, 0, 0); /* config i2c */ - i2c_init(hi2c->i2cx, 0, I2Cx_CLKCTRL); + i2c_init(hi2c->i2cx, 0x0F, I2Cx_CLKCTRL); i2c_own_address1_set(hi2c->i2cx, I2C_ADDRESS_MODE_7BIT, I2Cx_ADDRESS); } diff --git a/project/at_start_f435/examples/i2c/communication_poll/inc/at32f435_437_clock.h b/project/at_start_f435/examples/i2c/communication_poll/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/i2c/communication_poll/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/i2c/communication_poll/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/i2c/communication_poll/inc/at32f435_437_conf.h b/project/at_start_f435/examples/i2c/communication_poll/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/i2c/communication_poll/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/i2c/communication_poll/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/i2c/communication_poll/inc/at32f435_437_int.h b/project/at_start_f435/examples/i2c/communication_poll/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/i2c/communication_poll/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/i2c/communication_poll/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/i2c/communication_poll/readme.txt b/project/at_start_f435/examples/i2c/communication_poll/readme.txt index 8b62f14f..c67d7d50 100644 --- a/project/at_start_f435/examples/i2c/communication_poll/readme.txt +++ b/project/at_start_f435/examples/i2c/communication_poll/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file communication_poll/readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/i2c/communication_poll/src/at32f435_437_clock.c b/project/at_start_f435/examples/i2c/communication_poll/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/i2c/communication_poll/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/i2c/communication_poll/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/i2c/communication_poll/src/at32f435_437_int.c b/project/at_start_f435/examples/i2c/communication_poll/src/at32f435_437_int.c index 337c5801..70ed5f3e 100644 --- a/project/at_start_f435/examples/i2c/communication_poll/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/i2c/communication_poll/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/i2c/communication_poll/src/main.c b/project/at_start_f435/examples/i2c/communication_poll/src/main.c index a79c19eb..6b6cdf08 100644 --- a/project/at_start_f435/examples/i2c/communication_poll/src/main.c +++ b/project/at_start_f435/examples/i2c/communication_poll/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer @@ -227,7 +227,7 @@ void i2c_lowlevel_init(i2c_handle_type* hi2c) gpio_init(I2Cx_SDA_GPIO_PORT, &gpio_init_structure); /* config i2c */ - i2c_init(hi2c->i2cx, 0, I2Cx_CLKCTRL); + i2c_init(hi2c->i2cx, 0x0F, I2Cx_CLKCTRL); i2c_own_address1_set(hi2c->i2cx, I2C_ADDRESS_MODE_7BIT, I2Cx_ADDRESS); } diff --git a/project/at_start_f435/examples/i2c/communication_smbus/inc/at32f435_437_clock.h b/project/at_start_f435/examples/i2c/communication_smbus/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/i2c/communication_smbus/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/i2c/communication_smbus/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/i2c/communication_smbus/inc/at32f435_437_conf.h b/project/at_start_f435/examples/i2c/communication_smbus/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/i2c/communication_smbus/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/i2c/communication_smbus/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/i2c/communication_smbus/inc/at32f435_437_int.h b/project/at_start_f435/examples/i2c/communication_smbus/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/i2c/communication_smbus/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/i2c/communication_smbus/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/i2c/communication_smbus/readme.txt b/project/at_start_f435/examples/i2c/communication_smbus/readme.txt index 1445d92a..b2b7c53c 100644 --- a/project/at_start_f435/examples/i2c/communication_smbus/readme.txt +++ b/project/at_start_f435/examples/i2c/communication_smbus/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file communication_poll/readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/i2c/communication_smbus/src/at32f435_437_clock.c b/project/at_start_f435/examples/i2c/communication_smbus/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/i2c/communication_smbus/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/i2c/communication_smbus/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/i2c/communication_smbus/src/at32f435_437_int.c b/project/at_start_f435/examples/i2c/communication_smbus/src/at32f435_437_int.c index 4bbca5ef..9b6519a7 100644 --- a/project/at_start_f435/examples/i2c/communication_smbus/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/i2c/communication_smbus/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/i2c/communication_smbus/src/main.c b/project/at_start_f435/examples/i2c/communication_smbus/src/main.c index 950c077d..b131261a 100644 --- a/project/at_start_f435/examples/i2c/communication_smbus/src/main.c +++ b/project/at_start_f435/examples/i2c/communication_smbus/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer @@ -227,7 +227,7 @@ void i2c_lowlevel_init(i2c_handle_type* hi2c) gpio_init(I2Cx_SDA_GPIO_PORT, &gpio_init_structure); /* config i2c */ - i2c_init(hi2c->i2cx, 0, I2Cx_CLKCTRL); + i2c_init(hi2c->i2cx, 0x0F, I2Cx_CLKCTRL); i2c_own_address1_set(hi2c->i2cx, I2C_ADDRESS_MODE_7BIT, I2Cx_ADDRESS); } diff --git a/project/at_start_f435/examples/i2c/eeprom/inc/at32f435_437_clock.h b/project/at_start_f435/examples/i2c/eeprom/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/i2c/eeprom/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/i2c/eeprom/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/i2c/eeprom/inc/at32f435_437_conf.h b/project/at_start_f435/examples/i2c/eeprom/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/i2c/eeprom/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/i2c/eeprom/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/i2c/eeprom/inc/at32f435_437_int.h b/project/at_start_f435/examples/i2c/eeprom/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/i2c/eeprom/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/i2c/eeprom/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/i2c/eeprom/readme.txt b/project/at_start_f435/examples/i2c/eeprom/readme.txt index 766fe522..cab92113 100644 --- a/project/at_start_f435/examples/i2c/eeprom/readme.txt +++ b/project/at_start_f435/examples/i2c/eeprom/readme.txt @@ -1,13 +1,13 @@ /** ************************************************************************** * @file eeprom/readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ - this demo is based on the at-start board, in this demo, use hardware i2c1 + this demo is based on the at-start board and AT32-Comm-EV, in this demo, use hardware i2c1 write or read data based on the memory device. if the communication is successful, led3 will turn on, if the communication fails, led2 will keep flashing. @@ -16,7 +16,7 @@ 2. press the slave button first, then press the master button to start communication. pin used: - 1. scl --- pb6 - 2. sda --- pb7 + 1. scl --- pb10 + 2. sda --- pb11 for more detailed information. please refer to the application note document AN0091. \ No newline at end of file diff --git a/project/at_start_f435/examples/i2c/eeprom/src/at32f435_437_clock.c b/project/at_start_f435/examples/i2c/eeprom/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/i2c/eeprom/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/i2c/eeprom/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/i2c/eeprom/src/at32f435_437_int.c b/project/at_start_f435/examples/i2c/eeprom/src/at32f435_437_int.c index 6044626f..921152e0 100644 --- a/project/at_start_f435/examples/i2c/eeprom/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/i2c/eeprom/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer @@ -40,8 +40,8 @@ extern i2c_handle_type hi2cx; #define I2Cx_DMA_TX_IRQHandler DMA1_Channel1_IRQHandler #define I2Cx_DMA_RX_IRQHandler DMA1_Channel2_IRQHandler -#define I2Cx_EVT_IRQHandler I2C1_EVT_IRQHandler -#define I2Cx_ERR_IRQHandler I2C1_ERR_IRQHandler +#define I2Cx_EVT_IRQHandler I2C2_EVT_IRQHandler +#define I2Cx_ERR_IRQHandler I2C2_ERR_IRQHandler /** * @brief this function handles nmi exception. diff --git a/project/at_start_f435/examples/i2c/eeprom/src/main.c b/project/at_start_f435/examples/i2c/eeprom/src/main.c index 0a24acda..865c00ae 100644 --- a/project/at_start_f435/examples/i2c/eeprom/src/main.c +++ b/project/at_start_f435/examples/i2c/eeprom/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer @@ -45,35 +45,35 @@ #define I2Cx_ADDRESS 0xA0 -#define I2Cx_PORT I2C1 -#define I2Cx_CLK CRM_I2C1_PERIPH_CLOCK +#define I2Cx_PORT I2C2 +#define I2Cx_CLK CRM_I2C2_PERIPH_CLOCK #define I2Cx_DMA DMA1 #define I2Cx_DMA_CLK CRM_DMA1_PERIPH_CLOCK #define I2Cx_SCL_GPIO_CLK CRM_GPIOB_PERIPH_CLOCK -#define I2Cx_SCL_GPIO_PIN GPIO_PINS_6 -#define I2Cx_SCL_GPIO_PinsSource GPIO_PINS_SOURCE6 +#define I2Cx_SCL_GPIO_PIN GPIO_PINS_10 +#define I2Cx_SCL_GPIO_PinsSource GPIO_PINS_SOURCE10 #define I2Cx_SCL_GPIO_PORT GPIOB #define I2Cx_SCL_GPIO_MUX GPIO_MUX_4 #define I2Cx_SDA_GPIO_CLK CRM_GPIOB_PERIPH_CLOCK -#define I2Cx_SDA_GPIO_PIN GPIO_PINS_7 -#define I2Cx_SDA_GPIO_PinsSource GPIO_PINS_SOURCE7 +#define I2Cx_SDA_GPIO_PIN GPIO_PINS_11 +#define I2Cx_SDA_GPIO_PinsSource GPIO_PINS_SOURCE11 #define I2Cx_SDA_GPIO_PORT GPIOB #define I2Cx_SDA_GPIO_MUX GPIO_MUX_4 #define I2Cx_DMA_TX_Channel DMA1_CHANNEL1 #define I2Cx_DMA_TX_DMAMUX_Channel DMA1MUX_CHANNEL1 -#define I2Cx_DMA_TX_DMAREQ DMAMUX_DMAREQ_ID_I2C1_TX +#define I2Cx_DMA_TX_DMAREQ DMAMUX_DMAREQ_ID_I2C2_TX #define I2Cx_DMA_TX_IRQn DMA1_Channel1_IRQn #define I2Cx_DMA_RX_Channel DMA1_CHANNEL2 #define I2Cx_DMA_RX_DMAMUX_Channel DMA1MUX_CHANNEL2 -#define I2Cx_DMA_RX_DMAREQ DMAMUX_DMAREQ_ID_I2C1_RX +#define I2Cx_DMA_RX_DMAREQ DMAMUX_DMAREQ_ID_I2C2_RX #define I2Cx_DMA_RX_IRQn DMA1_Channel2_IRQn -#define I2Cx_EVT_IRQn I2C1_EVT_IRQn -#define I2Cx_ERR_IRQn I2C1_ERR_IRQn +#define I2Cx_EVT_IRQn I2C2_EVT_IRQn +#define I2Cx_ERR_IRQn I2C2_ERR_IRQn #define BUF_SIZE 8 @@ -305,7 +305,7 @@ void i2c_lowlevel_init(i2c_handle_type* hi2c) dmamux_enable(I2Cx_DMA, TRUE); /* config i2c */ - i2c_init(hi2c->i2cx, 0, I2Cx_CLKCTRL); + i2c_init(hi2c->i2cx, 0x0F, I2Cx_CLKCTRL); i2c_own_address1_set(hi2c->i2cx, I2C_ADDRESS_MODE_7BIT, I2Cx_ADDRESS); } diff --git a/project/at_start_f435/examples/i2s/fullduplex_dma/inc/at32f435_437_clock.h b/project/at_start_f435/examples/i2s/fullduplex_dma/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/i2s/fullduplex_dma/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/i2s/fullduplex_dma/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/i2s/fullduplex_dma/inc/at32f435_437_conf.h b/project/at_start_f435/examples/i2s/fullduplex_dma/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/i2s/fullduplex_dma/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/i2s/fullduplex_dma/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/i2s/fullduplex_dma/inc/at32f435_437_int.h b/project/at_start_f435/examples/i2s/fullduplex_dma/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/i2s/fullduplex_dma/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/i2s/fullduplex_dma/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/i2s/fullduplex_dma/readme.txt b/project/at_start_f435/examples/i2s/fullduplex_dma/readme.txt index 6068ad37..edf8076b 100644 --- a/project/at_start_f435/examples/i2s/fullduplex_dma/readme.txt +++ b/project/at_start_f435/examples/i2s/fullduplex_dma/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/i2s/fullduplex_dma/src/at32f435_437_clock.c b/project/at_start_f435/examples/i2s/fullduplex_dma/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/i2s/fullduplex_dma/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/i2s/fullduplex_dma/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/i2s/fullduplex_dma/src/at32f435_437_int.c b/project/at_start_f435/examples/i2s/fullduplex_dma/src/at32f435_437_int.c index 0bb3f56d..e940a989 100644 --- a/project/at_start_f435/examples/i2s/fullduplex_dma/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/i2s/fullduplex_dma/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/i2s/fullduplex_dma/src/main.c b/project/at_start_f435/examples/i2s/fullduplex_dma/src/main.c index f5206b96..648c349e 100644 --- a/project/at_start_f435/examples/i2s/fullduplex_dma/src/main.c +++ b/project/at_start_f435/examples/i2s/fullduplex_dma/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/i2s/halfduplex_dma/inc/at32f435_437_clock.h b/project/at_start_f435/examples/i2s/halfduplex_dma/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/i2s/halfduplex_dma/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/i2s/halfduplex_dma/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/i2s/halfduplex_dma/inc/at32f435_437_conf.h b/project/at_start_f435/examples/i2s/halfduplex_dma/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/i2s/halfduplex_dma/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/i2s/halfduplex_dma/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/i2s/halfduplex_dma/inc/at32f435_437_int.h b/project/at_start_f435/examples/i2s/halfduplex_dma/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/i2s/halfduplex_dma/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/i2s/halfduplex_dma/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/i2s/halfduplex_dma/readme.txt b/project/at_start_f435/examples/i2s/halfduplex_dma/readme.txt index 92905cd9..73e52416 100644 --- a/project/at_start_f435/examples/i2s/halfduplex_dma/readme.txt +++ b/project/at_start_f435/examples/i2s/halfduplex_dma/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/i2s/halfduplex_dma/src/at32f435_437_clock.c b/project/at_start_f435/examples/i2s/halfduplex_dma/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/i2s/halfduplex_dma/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/i2s/halfduplex_dma/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/i2s/halfduplex_dma/src/at32f435_437_int.c b/project/at_start_f435/examples/i2s/halfduplex_dma/src/at32f435_437_int.c index 75405a61..797716ef 100644 --- a/project/at_start_f435/examples/i2s/halfduplex_dma/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/i2s/halfduplex_dma/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/i2s/halfduplex_dma/src/main.c b/project/at_start_f435/examples/i2s/halfduplex_dma/src/main.c index 483c3d24..f3228a3a 100644 --- a/project/at_start_f435/examples/i2s/halfduplex_dma/src/main.c +++ b/project/at_start_f435/examples/i2s/halfduplex_dma/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/i2s/halfduplex_interrupt/inc/at32f435_437_clock.h b/project/at_start_f435/examples/i2s/halfduplex_interrupt/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/i2s/halfduplex_interrupt/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/i2s/halfduplex_interrupt/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/i2s/halfduplex_interrupt/inc/at32f435_437_conf.h b/project/at_start_f435/examples/i2s/halfduplex_interrupt/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/i2s/halfduplex_interrupt/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/i2s/halfduplex_interrupt/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/i2s/halfduplex_interrupt/inc/at32f435_437_int.h b/project/at_start_f435/examples/i2s/halfduplex_interrupt/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/i2s/halfduplex_interrupt/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/i2s/halfduplex_interrupt/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/i2s/halfduplex_interrupt/readme.txt b/project/at_start_f435/examples/i2s/halfduplex_interrupt/readme.txt index 27316579..05a53266 100644 --- a/project/at_start_f435/examples/i2s/halfduplex_interrupt/readme.txt +++ b/project/at_start_f435/examples/i2s/halfduplex_interrupt/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/i2s/halfduplex_interrupt/src/at32f435_437_clock.c b/project/at_start_f435/examples/i2s/halfduplex_interrupt/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/i2s/halfduplex_interrupt/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/i2s/halfduplex_interrupt/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/i2s/halfduplex_interrupt/src/at32f435_437_int.c b/project/at_start_f435/examples/i2s/halfduplex_interrupt/src/at32f435_437_int.c index fc464889..0215616c 100644 --- a/project/at_start_f435/examples/i2s/halfduplex_interrupt/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/i2s/halfduplex_interrupt/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/i2s/halfduplex_interrupt/src/main.c b/project/at_start_f435/examples/i2s/halfduplex_interrupt/src/main.c index ddf7b705..e452d0ff 100644 --- a/project/at_start_f435/examples/i2s/halfduplex_interrupt/src/main.c +++ b/project/at_start_f435/examples/i2s/halfduplex_interrupt/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/i2s/spii2s_switch_halfduplex_polling/inc/at32f435_437_clock.h b/project/at_start_f435/examples/i2s/spii2s_switch_halfduplex_polling/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/i2s/spii2s_switch_halfduplex_polling/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/i2s/spii2s_switch_halfduplex_polling/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/i2s/spii2s_switch_halfduplex_polling/inc/at32f435_437_conf.h b/project/at_start_f435/examples/i2s/spii2s_switch_halfduplex_polling/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/i2s/spii2s_switch_halfduplex_polling/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/i2s/spii2s_switch_halfduplex_polling/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/i2s/spii2s_switch_halfduplex_polling/inc/at32f435_437_int.h b/project/at_start_f435/examples/i2s/spii2s_switch_halfduplex_polling/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/i2s/spii2s_switch_halfduplex_polling/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/i2s/spii2s_switch_halfduplex_polling/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/i2s/spii2s_switch_halfduplex_polling/readme.txt b/project/at_start_f435/examples/i2s/spii2s_switch_halfduplex_polling/readme.txt index 056313ba..de7ed48b 100644 --- a/project/at_start_f435/examples/i2s/spii2s_switch_halfduplex_polling/readme.txt +++ b/project/at_start_f435/examples/i2s/spii2s_switch_halfduplex_polling/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/i2s/spii2s_switch_halfduplex_polling/src/at32f435_437_clock.c b/project/at_start_f435/examples/i2s/spii2s_switch_halfduplex_polling/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/i2s/spii2s_switch_halfduplex_polling/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/i2s/spii2s_switch_halfduplex_polling/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/i2s/spii2s_switch_halfduplex_polling/src/at32f435_437_int.c b/project/at_start_f435/examples/i2s/spii2s_switch_halfduplex_polling/src/at32f435_437_int.c index f34875d5..d97192bf 100644 --- a/project/at_start_f435/examples/i2s/spii2s_switch_halfduplex_polling/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/i2s/spii2s_switch_halfduplex_polling/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/i2s/spii2s_switch_halfduplex_polling/src/main.c b/project/at_start_f435/examples/i2s/spii2s_switch_halfduplex_polling/src/main.c index 0d221ebc..57440ebf 100644 --- a/project/at_start_f435/examples/i2s/spii2s_switch_halfduplex_polling/src/main.c +++ b/project/at_start_f435/examples/i2s/spii2s_switch_halfduplex_polling/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/irtmr/irtmr_output/inc/at32f435_437_clock.h b/project/at_start_f435/examples/irtmr/irtmr_output/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/irtmr/irtmr_output/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/irtmr/irtmr_output/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/irtmr/irtmr_output/inc/at32f435_437_conf.h b/project/at_start_f435/examples/irtmr/irtmr_output/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/irtmr/irtmr_output/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/irtmr/irtmr_output/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/irtmr/irtmr_output/inc/at32f435_437_int.h b/project/at_start_f435/examples/irtmr/irtmr_output/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/irtmr/irtmr_output/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/irtmr/irtmr_output/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/irtmr/irtmr_output/readme.txt b/project/at_start_f435/examples/irtmr/irtmr_output/readme.txt index 9acb47c6..0d42ba93 100644 --- a/project/at_start_f435/examples/irtmr/irtmr_output/readme.txt +++ b/project/at_start_f435/examples/irtmr/irtmr_output/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/irtmr/irtmr_output/src/at32f435_437_clock.c b/project/at_start_f435/examples/irtmr/irtmr_output/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/irtmr/irtmr_output/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/irtmr/irtmr_output/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/irtmr/irtmr_output/src/at32f435_437_int.c b/project/at_start_f435/examples/irtmr/irtmr_output/src/at32f435_437_int.c index b5218294..43f3b163 100644 --- a/project/at_start_f435/examples/irtmr/irtmr_output/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/irtmr/irtmr_output/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/irtmr/irtmr_output/src/main.c b/project/at_start_f435/examples/irtmr/irtmr_output/src/main.c index 2ed5eed2..2786fbac 100644 --- a/project/at_start_f435/examples/irtmr/irtmr_output/src/main.c +++ b/project/at_start_f435/examples/irtmr/irtmr_output/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/pwc/deepsleep_ertc_alarm/inc/at32f435_437_clock.h b/project/at_start_f435/examples/pwc/deepsleep_ertc_alarm/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/pwc/deepsleep_ertc_alarm/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/pwc/deepsleep_ertc_alarm/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/pwc/deepsleep_ertc_alarm/inc/at32f435_437_conf.h b/project/at_start_f435/examples/pwc/deepsleep_ertc_alarm/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/pwc/deepsleep_ertc_alarm/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/pwc/deepsleep_ertc_alarm/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/pwc/deepsleep_ertc_alarm/inc/at32f435_437_int.h b/project/at_start_f435/examples/pwc/deepsleep_ertc_alarm/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/pwc/deepsleep_ertc_alarm/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/pwc/deepsleep_ertc_alarm/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/pwc/deepsleep_ertc_alarm/readme.txt b/project/at_start_f435/examples/pwc/deepsleep_ertc_alarm/readme.txt index fd6066f5..f89bac1f 100644 --- a/project/at_start_f435/examples/pwc/deepsleep_ertc_alarm/readme.txt +++ b/project/at_start_f435/examples/pwc/deepsleep_ertc_alarm/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/pwc/deepsleep_ertc_alarm/src/at32f435_437_clock.c b/project/at_start_f435/examples/pwc/deepsleep_ertc_alarm/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/pwc/deepsleep_ertc_alarm/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/pwc/deepsleep_ertc_alarm/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/pwc/deepsleep_ertc_alarm/src/at32f435_437_int.c b/project/at_start_f435/examples/pwc/deepsleep_ertc_alarm/src/at32f435_437_int.c index d1d8a4c4..195e148f 100644 --- a/project/at_start_f435/examples/pwc/deepsleep_ertc_alarm/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/pwc/deepsleep_ertc_alarm/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/pwc/deepsleep_ertc_alarm/src/main.c b/project/at_start_f435/examples/pwc/deepsleep_ertc_alarm/src/main.c index e53bb680..11363970 100644 --- a/project/at_start_f435/examples/pwc/deepsleep_ertc_alarm/src/main.c +++ b/project/at_start_f435/examples/pwc/deepsleep_ertc_alarm/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/pwc/deepsleep_ertc_tamper/inc/at32f435_437_clock.h b/project/at_start_f435/examples/pwc/deepsleep_ertc_tamper/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/pwc/deepsleep_ertc_tamper/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/pwc/deepsleep_ertc_tamper/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/pwc/deepsleep_ertc_tamper/inc/at32f435_437_conf.h b/project/at_start_f435/examples/pwc/deepsleep_ertc_tamper/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/pwc/deepsleep_ertc_tamper/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/pwc/deepsleep_ertc_tamper/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/pwc/deepsleep_ertc_tamper/inc/at32f435_437_int.h b/project/at_start_f435/examples/pwc/deepsleep_ertc_tamper/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/pwc/deepsleep_ertc_tamper/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/pwc/deepsleep_ertc_tamper/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/pwc/deepsleep_ertc_tamper/readme.txt b/project/at_start_f435/examples/pwc/deepsleep_ertc_tamper/readme.txt index b830fcd1..338a2f8c 100644 --- a/project/at_start_f435/examples/pwc/deepsleep_ertc_tamper/readme.txt +++ b/project/at_start_f435/examples/pwc/deepsleep_ertc_tamper/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/pwc/deepsleep_ertc_tamper/src/at32f435_437_clock.c b/project/at_start_f435/examples/pwc/deepsleep_ertc_tamper/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/pwc/deepsleep_ertc_tamper/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/pwc/deepsleep_ertc_tamper/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/pwc/deepsleep_ertc_tamper/src/at32f435_437_int.c b/project/at_start_f435/examples/pwc/deepsleep_ertc_tamper/src/at32f435_437_int.c index 84aeebb9..0ed7a602 100644 --- a/project/at_start_f435/examples/pwc/deepsleep_ertc_tamper/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/pwc/deepsleep_ertc_tamper/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/pwc/deepsleep_ertc_tamper/src/main.c b/project/at_start_f435/examples/pwc/deepsleep_ertc_tamper/src/main.c index 9e1eae70..ba5a3201 100644 --- a/project/at_start_f435/examples/pwc/deepsleep_ertc_tamper/src/main.c +++ b/project/at_start_f435/examples/pwc/deepsleep_ertc_tamper/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/pwc/deepsleep_ertc_wakeup/inc/at32f435_437_clock.h b/project/at_start_f435/examples/pwc/deepsleep_ertc_wakeup/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/pwc/deepsleep_ertc_wakeup/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/pwc/deepsleep_ertc_wakeup/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/pwc/deepsleep_ertc_wakeup/inc/at32f435_437_conf.h b/project/at_start_f435/examples/pwc/deepsleep_ertc_wakeup/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/pwc/deepsleep_ertc_wakeup/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/pwc/deepsleep_ertc_wakeup/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/pwc/deepsleep_ertc_wakeup/inc/at32f435_437_int.h b/project/at_start_f435/examples/pwc/deepsleep_ertc_wakeup/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/pwc/deepsleep_ertc_wakeup/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/pwc/deepsleep_ertc_wakeup/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/pwc/deepsleep_ertc_wakeup/readme.txt b/project/at_start_f435/examples/pwc/deepsleep_ertc_wakeup/readme.txt index 18cfab64..16346ced 100644 --- a/project/at_start_f435/examples/pwc/deepsleep_ertc_wakeup/readme.txt +++ b/project/at_start_f435/examples/pwc/deepsleep_ertc_wakeup/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/pwc/deepsleep_ertc_wakeup/src/at32f435_437_clock.c b/project/at_start_f435/examples/pwc/deepsleep_ertc_wakeup/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/pwc/deepsleep_ertc_wakeup/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/pwc/deepsleep_ertc_wakeup/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/pwc/deepsleep_ertc_wakeup/src/at32f435_437_int.c b/project/at_start_f435/examples/pwc/deepsleep_ertc_wakeup/src/at32f435_437_int.c index e45fe452..5774072e 100644 --- a/project/at_start_f435/examples/pwc/deepsleep_ertc_wakeup/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/pwc/deepsleep_ertc_wakeup/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/pwc/deepsleep_ertc_wakeup/src/main.c b/project/at_start_f435/examples/pwc/deepsleep_ertc_wakeup/src/main.c index 231ce7b5..4c46331f 100644 --- a/project/at_start_f435/examples/pwc/deepsleep_ertc_wakeup/src/main.c +++ b/project/at_start_f435/examples/pwc/deepsleep_ertc_wakeup/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer @@ -101,7 +101,7 @@ void ertc_wakeup_timer_config(void) exint_init(&exint_init_struct); /* set wakeup timer clock 1hz */ - ertc_wakeup_clock_set(ERTC_WAT_CLK_CK_A_16BITS); + ertc_wakeup_clock_set(ERTC_WAT_CLK_CK_B_16BITS); /* set the wakeup time to 5s */ ertc_wakeup_counter_set(5 - 1); diff --git a/project/at_start_f435/examples/pwc/ldo_set/inc/at32f435_437_clock.h b/project/at_start_f435/examples/pwc/ldo_set/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/pwc/ldo_set/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/pwc/ldo_set/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/pwc/ldo_set/inc/at32f435_437_conf.h b/project/at_start_f435/examples/pwc/ldo_set/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/pwc/ldo_set/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/pwc/ldo_set/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/pwc/ldo_set/inc/at32f435_437_int.h b/project/at_start_f435/examples/pwc/ldo_set/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/pwc/ldo_set/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/pwc/ldo_set/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/pwc/ldo_set/readme.txt b/project/at_start_f435/examples/pwc/ldo_set/readme.txt index bfb917f5..56dd1faf 100644 --- a/project/at_start_f435/examples/pwc/ldo_set/readme.txt +++ b/project/at_start_f435/examples/pwc/ldo_set/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/pwc/ldo_set/src/at32f435_437_clock.c b/project/at_start_f435/examples/pwc/ldo_set/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/pwc/ldo_set/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/pwc/ldo_set/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/pwc/ldo_set/src/at32f435_437_int.c b/project/at_start_f435/examples/pwc/ldo_set/src/at32f435_437_int.c index fe5948ca..cd550cd6 100644 --- a/project/at_start_f435/examples/pwc/ldo_set/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/pwc/ldo_set/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/pwc/ldo_set/src/main.c b/project/at_start_f435/examples/pwc/ldo_set/src/main.c index a1fdc4f0..b6179e25 100644 --- a/project/at_start_f435/examples/pwc/ldo_set/src/main.c +++ b/project/at_start_f435/examples/pwc/ldo_set/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/pwc/power_voltage_monitor/inc/at32f435_437_clock.h b/project/at_start_f435/examples/pwc/power_voltage_monitor/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/pwc/power_voltage_monitor/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/pwc/power_voltage_monitor/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/pwc/power_voltage_monitor/inc/at32f435_437_conf.h b/project/at_start_f435/examples/pwc/power_voltage_monitor/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/pwc/power_voltage_monitor/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/pwc/power_voltage_monitor/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/pwc/power_voltage_monitor/inc/at32f435_437_int.h b/project/at_start_f435/examples/pwc/power_voltage_monitor/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/pwc/power_voltage_monitor/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/pwc/power_voltage_monitor/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/pwc/power_voltage_monitor/readme.txt b/project/at_start_f435/examples/pwc/power_voltage_monitor/readme.txt index dd229286..91430a4b 100644 --- a/project/at_start_f435/examples/pwc/power_voltage_monitor/readme.txt +++ b/project/at_start_f435/examples/pwc/power_voltage_monitor/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/pwc/power_voltage_monitor/src/at32f435_437_clock.c b/project/at_start_f435/examples/pwc/power_voltage_monitor/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/pwc/power_voltage_monitor/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/pwc/power_voltage_monitor/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/pwc/power_voltage_monitor/src/at32f435_437_int.c b/project/at_start_f435/examples/pwc/power_voltage_monitor/src/at32f435_437_int.c index 6a33974a..b09476f4 100644 --- a/project/at_start_f435/examples/pwc/power_voltage_monitor/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/pwc/power_voltage_monitor/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/pwc/power_voltage_monitor/src/main.c b/project/at_start_f435/examples/pwc/power_voltage_monitor/src/main.c index 1b23a242..878709f8 100644 --- a/project/at_start_f435/examples/pwc/power_voltage_monitor/src/main.c +++ b/project/at_start_f435/examples/pwc/power_voltage_monitor/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/pwc/sleep_tmr2/inc/at32f435_437_clock.h b/project/at_start_f435/examples/pwc/sleep_tmr2/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/pwc/sleep_tmr2/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/pwc/sleep_tmr2/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/pwc/sleep_tmr2/inc/at32f435_437_conf.h b/project/at_start_f435/examples/pwc/sleep_tmr2/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/pwc/sleep_tmr2/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/pwc/sleep_tmr2/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/pwc/sleep_tmr2/inc/at32f435_437_int.h b/project/at_start_f435/examples/pwc/sleep_tmr2/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/pwc/sleep_tmr2/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/pwc/sleep_tmr2/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/pwc/sleep_tmr2/readme.txt b/project/at_start_f435/examples/pwc/sleep_tmr2/readme.txt index bd652ada..33dfba6c 100644 --- a/project/at_start_f435/examples/pwc/sleep_tmr2/readme.txt +++ b/project/at_start_f435/examples/pwc/sleep_tmr2/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/pwc/sleep_tmr2/src/at32f435_437_clock.c b/project/at_start_f435/examples/pwc/sleep_tmr2/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/pwc/sleep_tmr2/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/pwc/sleep_tmr2/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/pwc/sleep_tmr2/src/at32f435_437_int.c b/project/at_start_f435/examples/pwc/sleep_tmr2/src/at32f435_437_int.c index be773d48..63b04492 100644 --- a/project/at_start_f435/examples/pwc/sleep_tmr2/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/pwc/sleep_tmr2/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/pwc/sleep_tmr2/src/main.c b/project/at_start_f435/examples/pwc/sleep_tmr2/src/main.c index 18b8e825..e96bf147 100644 --- a/project/at_start_f435/examples/pwc/sleep_tmr2/src/main.c +++ b/project/at_start_f435/examples/pwc/sleep_tmr2/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/pwc/sleep_usart1/inc/at32f435_437_clock.h b/project/at_start_f435/examples/pwc/sleep_usart1/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/pwc/sleep_usart1/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/pwc/sleep_usart1/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/pwc/sleep_usart1/inc/at32f435_437_conf.h b/project/at_start_f435/examples/pwc/sleep_usart1/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/pwc/sleep_usart1/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/pwc/sleep_usart1/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/pwc/sleep_usart1/inc/at32f435_437_int.h b/project/at_start_f435/examples/pwc/sleep_usart1/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/pwc/sleep_usart1/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/pwc/sleep_usart1/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/pwc/sleep_usart1/readme.txt b/project/at_start_f435/examples/pwc/sleep_usart1/readme.txt index 0b4d07a9..8d6a7dbc 100644 --- a/project/at_start_f435/examples/pwc/sleep_usart1/readme.txt +++ b/project/at_start_f435/examples/pwc/sleep_usart1/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/pwc/sleep_usart1/src/at32f435_437_clock.c b/project/at_start_f435/examples/pwc/sleep_usart1/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/pwc/sleep_usart1/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/pwc/sleep_usart1/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/pwc/sleep_usart1/src/at32f435_437_int.c b/project/at_start_f435/examples/pwc/sleep_usart1/src/at32f435_437_int.c index 93426f95..2e0897f5 100644 --- a/project/at_start_f435/examples/pwc/sleep_usart1/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/pwc/sleep_usart1/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/pwc/sleep_usart1/src/main.c b/project/at_start_f435/examples/pwc/sleep_usart1/src/main.c index 832f565e..9077b641 100644 --- a/project/at_start_f435/examples/pwc/sleep_usart1/src/main.c +++ b/project/at_start_f435/examples/pwc/sleep_usart1/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/pwc/standby_ertc_alarm/inc/at32f435_437_clock.h b/project/at_start_f435/examples/pwc/standby_ertc_alarm/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/pwc/standby_ertc_alarm/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/pwc/standby_ertc_alarm/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/pwc/standby_ertc_alarm/inc/at32f435_437_conf.h b/project/at_start_f435/examples/pwc/standby_ertc_alarm/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/pwc/standby_ertc_alarm/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/pwc/standby_ertc_alarm/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/pwc/standby_ertc_alarm/inc/at32f435_437_int.h b/project/at_start_f435/examples/pwc/standby_ertc_alarm/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/pwc/standby_ertc_alarm/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/pwc/standby_ertc_alarm/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/pwc/standby_ertc_alarm/readme.txt b/project/at_start_f435/examples/pwc/standby_ertc_alarm/readme.txt index 87a532ef..752d1a76 100644 --- a/project/at_start_f435/examples/pwc/standby_ertc_alarm/readme.txt +++ b/project/at_start_f435/examples/pwc/standby_ertc_alarm/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/pwc/standby_ertc_alarm/src/at32f435_437_clock.c b/project/at_start_f435/examples/pwc/standby_ertc_alarm/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/pwc/standby_ertc_alarm/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/pwc/standby_ertc_alarm/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/pwc/standby_ertc_alarm/src/at32f435_437_int.c b/project/at_start_f435/examples/pwc/standby_ertc_alarm/src/at32f435_437_int.c index 3db14972..35e55bf7 100644 --- a/project/at_start_f435/examples/pwc/standby_ertc_alarm/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/pwc/standby_ertc_alarm/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/pwc/standby_ertc_alarm/src/main.c b/project/at_start_f435/examples/pwc/standby_ertc_alarm/src/main.c index cee03e70..10d96b39 100644 --- a/project/at_start_f435/examples/pwc/standby_ertc_alarm/src/main.c +++ b/project/at_start_f435/examples/pwc/standby_ertc_alarm/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/pwc/standby_wakeup_pin/inc/at32f435_437_clock.h b/project/at_start_f435/examples/pwc/standby_wakeup_pin/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/pwc/standby_wakeup_pin/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/pwc/standby_wakeup_pin/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/pwc/standby_wakeup_pin/inc/at32f435_437_conf.h b/project/at_start_f435/examples/pwc/standby_wakeup_pin/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/pwc/standby_wakeup_pin/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/pwc/standby_wakeup_pin/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/pwc/standby_wakeup_pin/inc/at32f435_437_int.h b/project/at_start_f435/examples/pwc/standby_wakeup_pin/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/pwc/standby_wakeup_pin/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/pwc/standby_wakeup_pin/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/pwc/standby_wakeup_pin/readme.txt b/project/at_start_f435/examples/pwc/standby_wakeup_pin/readme.txt index 3d3945f2..cb45a499 100644 --- a/project/at_start_f435/examples/pwc/standby_wakeup_pin/readme.txt +++ b/project/at_start_f435/examples/pwc/standby_wakeup_pin/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/pwc/standby_wakeup_pin/src/at32f435_437_clock.c b/project/at_start_f435/examples/pwc/standby_wakeup_pin/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/pwc/standby_wakeup_pin/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/pwc/standby_wakeup_pin/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/pwc/standby_wakeup_pin/src/at32f435_437_int.c b/project/at_start_f435/examples/pwc/standby_wakeup_pin/src/at32f435_437_int.c index 1e7f94ae..830efe89 100644 --- a/project/at_start_f435/examples/pwc/standby_wakeup_pin/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/pwc/standby_wakeup_pin/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/pwc/standby_wakeup_pin/src/main.c b/project/at_start_f435/examples/pwc/standby_wakeup_pin/src/main.c index 689c3780..2d353a24 100644 --- a/project/at_start_f435/examples/pwc/standby_wakeup_pin/src/main.c +++ b/project/at_start_f435/examples/pwc/standby_wakeup_pin/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/qspi/command_port_using_dma/inc/at32f435_437_clock.h b/project/at_start_f435/examples/qspi/command_port_using_dma/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/qspi/command_port_using_dma/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/qspi/command_port_using_dma/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/qspi/command_port_using_dma/inc/at32f435_437_conf.h b/project/at_start_f435/examples/qspi/command_port_using_dma/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/qspi/command_port_using_dma/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/qspi/command_port_using_dma/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/qspi/command_port_using_dma/inc/at32f435_437_int.h b/project/at_start_f435/examples/qspi/command_port_using_dma/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/qspi/command_port_using_dma/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/qspi/command_port_using_dma/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/qspi/command_port_using_dma/readme.txt b/project/at_start_f435/examples/qspi/command_port_using_dma/readme.txt index 33401e6e..018ddac6 100644 --- a/project/at_start_f435/examples/qspi/command_port_using_dma/readme.txt +++ b/project/at_start_f435/examples/qspi/command_port_using_dma/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/qspi/command_port_using_dma/src/at32f435_437_clock.c b/project/at_start_f435/examples/qspi/command_port_using_dma/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/qspi/command_port_using_dma/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/qspi/command_port_using_dma/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/qspi/command_port_using_dma/src/at32f435_437_int.c b/project/at_start_f435/examples/qspi/command_port_using_dma/src/at32f435_437_int.c index e4199484..50f9a343 100644 --- a/project/at_start_f435/examples/qspi/command_port_using_dma/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/qspi/command_port_using_dma/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/qspi/command_port_using_dma/src/main.c b/project/at_start_f435/examples/qspi/command_port_using_dma/src/main.c index cb79bb0b..2a1000d7 100644 --- a/project/at_start_f435/examples/qspi/command_port_using_dma/src/main.c +++ b/project/at_start_f435/examples/qspi/command_port_using_dma/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/qspi/command_port_using_dma/src/qspi_cmd_esmt32m.c b/project/at_start_f435/examples/qspi/command_port_using_dma/src/qspi_cmd_esmt32m.c index 4e0a0361..19cb638a 100644 --- a/project/at_start_f435/examples/qspi/command_port_using_dma/src/qspi_cmd_esmt32m.c +++ b/project/at_start_f435/examples/qspi/command_port_using_dma/src/qspi_cmd_esmt32m.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file qspi_cmd_esmt32m.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief qspi_cmd_esmt32m program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/qspi/command_port_using_dma_and_pem/inc/at32f435_437_clock.h b/project/at_start_f435/examples/qspi/command_port_using_dma_and_pem/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/qspi/command_port_using_dma_and_pem/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/qspi/command_port_using_dma_and_pem/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/qspi/command_port_using_dma_and_pem/inc/at32f435_437_conf.h b/project/at_start_f435/examples/qspi/command_port_using_dma_and_pem/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/qspi/command_port_using_dma_and_pem/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/qspi/command_port_using_dma_and_pem/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/qspi/command_port_using_dma_and_pem/inc/at32f435_437_int.h b/project/at_start_f435/examples/qspi/command_port_using_dma_and_pem/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/qspi/command_port_using_dma_and_pem/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/qspi/command_port_using_dma_and_pem/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/qspi/command_port_using_dma_and_pem/readme.txt b/project/at_start_f435/examples/qspi/command_port_using_dma_and_pem/readme.txt index 3b8b610c..244b86d0 100644 --- a/project/at_start_f435/examples/qspi/command_port_using_dma_and_pem/readme.txt +++ b/project/at_start_f435/examples/qspi/command_port_using_dma_and_pem/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/qspi/command_port_using_dma_and_pem/src/at32f435_437_clock.c b/project/at_start_f435/examples/qspi/command_port_using_dma_and_pem/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/qspi/command_port_using_dma_and_pem/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/qspi/command_port_using_dma_and_pem/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/qspi/command_port_using_dma_and_pem/src/at32f435_437_int.c b/project/at_start_f435/examples/qspi/command_port_using_dma_and_pem/src/at32f435_437_int.c index b1a16f68..f2811f0d 100644 --- a/project/at_start_f435/examples/qspi/command_port_using_dma_and_pem/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/qspi/command_port_using_dma_and_pem/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/qspi/command_port_using_dma_and_pem/src/main.c b/project/at_start_f435/examples/qspi/command_port_using_dma_and_pem/src/main.c index d5f8c35d..2802ee4b 100644 --- a/project/at_start_f435/examples/qspi/command_port_using_dma_and_pem/src/main.c +++ b/project/at_start_f435/examples/qspi/command_port_using_dma_and_pem/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/qspi/command_port_using_dma_and_pem/src/qspi_cmd_esmt32m.c b/project/at_start_f435/examples/qspi/command_port_using_dma_and_pem/src/qspi_cmd_esmt32m.c index a7f3a824..0a284a4f 100644 --- a/project/at_start_f435/examples/qspi/command_port_using_dma_and_pem/src/qspi_cmd_esmt32m.c +++ b/project/at_start_f435/examples/qspi/command_port_using_dma_and_pem/src/qspi_cmd_esmt32m.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file qspi_cmd_esmt32m.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief qspi_cmd_esmt32m program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/qspi/command_port_using_dma_qpi_mode/inc/at32f435_437_clock.h b/project/at_start_f435/examples/qspi/command_port_using_dma_qpi_mode/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/qspi/command_port_using_dma_qpi_mode/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/qspi/command_port_using_dma_qpi_mode/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/qspi/command_port_using_dma_qpi_mode/inc/at32f435_437_conf.h b/project/at_start_f435/examples/qspi/command_port_using_dma_qpi_mode/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/qspi/command_port_using_dma_qpi_mode/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/qspi/command_port_using_dma_qpi_mode/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/qspi/command_port_using_dma_qpi_mode/inc/at32f435_437_int.h b/project/at_start_f435/examples/qspi/command_port_using_dma_qpi_mode/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/qspi/command_port_using_dma_qpi_mode/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/qspi/command_port_using_dma_qpi_mode/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/qspi/command_port_using_dma_qpi_mode/readme.txt b/project/at_start_f435/examples/qspi/command_port_using_dma_qpi_mode/readme.txt index 1c6234cd..f66e75ef 100644 --- a/project/at_start_f435/examples/qspi/command_port_using_dma_qpi_mode/readme.txt +++ b/project/at_start_f435/examples/qspi/command_port_using_dma_qpi_mode/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/qspi/command_port_using_dma_qpi_mode/src/at32f435_437_clock.c b/project/at_start_f435/examples/qspi/command_port_using_dma_qpi_mode/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/qspi/command_port_using_dma_qpi_mode/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/qspi/command_port_using_dma_qpi_mode/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/qspi/command_port_using_dma_qpi_mode/src/at32f435_437_int.c b/project/at_start_f435/examples/qspi/command_port_using_dma_qpi_mode/src/at32f435_437_int.c index 93b58cd2..dfbbac15 100644 --- a/project/at_start_f435/examples/qspi/command_port_using_dma_qpi_mode/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/qspi/command_port_using_dma_qpi_mode/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/qspi/command_port_using_dma_qpi_mode/src/main.c b/project/at_start_f435/examples/qspi/command_port_using_dma_qpi_mode/src/main.c index 6b34eee6..031a6674 100644 --- a/project/at_start_f435/examples/qspi/command_port_using_dma_qpi_mode/src/main.c +++ b/project/at_start_f435/examples/qspi/command_port_using_dma_qpi_mode/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/qspi/command_port_using_dma_qpi_mode/src/qspi_cmd_esmt32m.c b/project/at_start_f435/examples/qspi/command_port_using_dma_qpi_mode/src/qspi_cmd_esmt32m.c index c2fc51de..2d1b6a7e 100644 --- a/project/at_start_f435/examples/qspi/command_port_using_dma_qpi_mode/src/qspi_cmd_esmt32m.c +++ b/project/at_start_f435/examples/qspi/command_port_using_dma_qpi_mode/src/qspi_cmd_esmt32m.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file qspi_cmd_esmt32m.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief qspi_cmd_esmt32m program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/qspi/command_port_using_interrupt/inc/at32f435_437_clock.h b/project/at_start_f435/examples/qspi/command_port_using_interrupt/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/qspi/command_port_using_interrupt/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/qspi/command_port_using_interrupt/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/qspi/command_port_using_interrupt/inc/at32f435_437_conf.h b/project/at_start_f435/examples/qspi/command_port_using_interrupt/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/qspi/command_port_using_interrupt/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/qspi/command_port_using_interrupt/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/qspi/command_port_using_interrupt/inc/at32f435_437_int.h b/project/at_start_f435/examples/qspi/command_port_using_interrupt/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/qspi/command_port_using_interrupt/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/qspi/command_port_using_interrupt/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/qspi/command_port_using_interrupt/readme.txt b/project/at_start_f435/examples/qspi/command_port_using_interrupt/readme.txt index e6ca12d4..b6c3cda0 100644 --- a/project/at_start_f435/examples/qspi/command_port_using_interrupt/readme.txt +++ b/project/at_start_f435/examples/qspi/command_port_using_interrupt/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/qspi/command_port_using_interrupt/src/at32f435_437_clock.c b/project/at_start_f435/examples/qspi/command_port_using_interrupt/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/qspi/command_port_using_interrupt/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/qspi/command_port_using_interrupt/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/qspi/command_port_using_interrupt/src/at32f435_437_int.c b/project/at_start_f435/examples/qspi/command_port_using_interrupt/src/at32f435_437_int.c index bc056b04..0b61e5aa 100644 --- a/project/at_start_f435/examples/qspi/command_port_using_interrupt/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/qspi/command_port_using_interrupt/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/qspi/command_port_using_interrupt/src/main.c b/project/at_start_f435/examples/qspi/command_port_using_interrupt/src/main.c index c2288a0a..50ceacfe 100644 --- a/project/at_start_f435/examples/qspi/command_port_using_interrupt/src/main.c +++ b/project/at_start_f435/examples/qspi/command_port_using_interrupt/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/qspi/command_port_using_interrupt/src/qspi_cmd_esmt32m.c b/project/at_start_f435/examples/qspi/command_port_using_interrupt/src/qspi_cmd_esmt32m.c index 9946d7e3..45964388 100644 --- a/project/at_start_f435/examples/qspi/command_port_using_interrupt/src/qspi_cmd_esmt32m.c +++ b/project/at_start_f435/examples/qspi/command_port_using_interrupt/src/qspi_cmd_esmt32m.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file qspi_cmd_esmt32m.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief qspi_cmd_esmt32m program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/qspi/command_port_using_polling/inc/at32f435_437_clock.h b/project/at_start_f435/examples/qspi/command_port_using_polling/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/qspi/command_port_using_polling/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/qspi/command_port_using_polling/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/qspi/command_port_using_polling/inc/at32f435_437_conf.h b/project/at_start_f435/examples/qspi/command_port_using_polling/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/qspi/command_port_using_polling/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/qspi/command_port_using_polling/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/qspi/command_port_using_polling/inc/at32f435_437_int.h b/project/at_start_f435/examples/qspi/command_port_using_polling/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/qspi/command_port_using_polling/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/qspi/command_port_using_polling/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/qspi/command_port_using_polling/readme.txt b/project/at_start_f435/examples/qspi/command_port_using_polling/readme.txt index 1aa294ea..4a5fca46 100644 --- a/project/at_start_f435/examples/qspi/command_port_using_polling/readme.txt +++ b/project/at_start_f435/examples/qspi/command_port_using_polling/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/qspi/command_port_using_polling/src/at32f435_437_clock.c b/project/at_start_f435/examples/qspi/command_port_using_polling/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/qspi/command_port_using_polling/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/qspi/command_port_using_polling/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/qspi/command_port_using_polling/src/at32f435_437_int.c b/project/at_start_f435/examples/qspi/command_port_using_polling/src/at32f435_437_int.c index 0abdc995..04a89479 100644 --- a/project/at_start_f435/examples/qspi/command_port_using_polling/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/qspi/command_port_using_polling/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/qspi/command_port_using_polling/src/main.c b/project/at_start_f435/examples/qspi/command_port_using_polling/src/main.c index 50d69c10..b9c24968 100644 --- a/project/at_start_f435/examples/qspi/command_port_using_polling/src/main.c +++ b/project/at_start_f435/examples/qspi/command_port_using_polling/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/qspi/command_port_using_polling/src/qspi_cmd_esmt32m.c b/project/at_start_f435/examples/qspi/command_port_using_polling/src/qspi_cmd_esmt32m.c index 67a36c53..f6d590ad 100644 --- a/project/at_start_f435/examples/qspi/command_port_using_polling/src/qspi_cmd_esmt32m.c +++ b/project/at_start_f435/examples/qspi/command_port_using_polling/src/qspi_cmd_esmt32m.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file qspi_cmd_esmt32m.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief qspi_cmd_esmt32m program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/qspi/command_port_using_rdsr_sw/inc/at32f435_437_clock.h b/project/at_start_f435/examples/qspi/command_port_using_rdsr_sw/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/qspi/command_port_using_rdsr_sw/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/qspi/command_port_using_rdsr_sw/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/qspi/command_port_using_rdsr_sw/inc/at32f435_437_conf.h b/project/at_start_f435/examples/qspi/command_port_using_rdsr_sw/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/qspi/command_port_using_rdsr_sw/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/qspi/command_port_using_rdsr_sw/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/qspi/command_port_using_rdsr_sw/inc/at32f435_437_int.h b/project/at_start_f435/examples/qspi/command_port_using_rdsr_sw/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/qspi/command_port_using_rdsr_sw/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/qspi/command_port_using_rdsr_sw/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/qspi/command_port_using_rdsr_sw/readme.txt b/project/at_start_f435/examples/qspi/command_port_using_rdsr_sw/readme.txt index a1f6a0e7..624eb5f8 100644 --- a/project/at_start_f435/examples/qspi/command_port_using_rdsr_sw/readme.txt +++ b/project/at_start_f435/examples/qspi/command_port_using_rdsr_sw/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/qspi/command_port_using_rdsr_sw/src/at32f435_437_clock.c b/project/at_start_f435/examples/qspi/command_port_using_rdsr_sw/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/qspi/command_port_using_rdsr_sw/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/qspi/command_port_using_rdsr_sw/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/qspi/command_port_using_rdsr_sw/src/at32f435_437_int.c b/project/at_start_f435/examples/qspi/command_port_using_rdsr_sw/src/at32f435_437_int.c index 85653b07..6fc6c4f9 100644 --- a/project/at_start_f435/examples/qspi/command_port_using_rdsr_sw/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/qspi/command_port_using_rdsr_sw/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/qspi/command_port_using_rdsr_sw/src/main.c b/project/at_start_f435/examples/qspi/command_port_using_rdsr_sw/src/main.c index 88168a55..9bb62162 100644 --- a/project/at_start_f435/examples/qspi/command_port_using_rdsr_sw/src/main.c +++ b/project/at_start_f435/examples/qspi/command_port_using_rdsr_sw/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/qspi/command_port_using_rdsr_sw/src/qspi_cmd_esmt32m.c b/project/at_start_f435/examples/qspi/command_port_using_rdsr_sw/src/qspi_cmd_esmt32m.c index f20ead46..f6595201 100644 --- a/project/at_start_f435/examples/qspi/command_port_using_rdsr_sw/src/qspi_cmd_esmt32m.c +++ b/project/at_start_f435/examples/qspi/command_port_using_rdsr_sw/src/qspi_cmd_esmt32m.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file qspi_cmd_esmt32m.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief qspi_cmd_esmt32m program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/qspi/xip_port_write_read/inc/at32f435_437_clock.h b/project/at_start_f435/examples/qspi/xip_port_write_read/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/qspi/xip_port_write_read/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/qspi/xip_port_write_read/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/qspi/xip_port_write_read/inc/at32f435_437_conf.h b/project/at_start_f435/examples/qspi/xip_port_write_read/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/qspi/xip_port_write_read/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/qspi/xip_port_write_read/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/qspi/xip_port_write_read/inc/at32f435_437_int.h b/project/at_start_f435/examples/qspi/xip_port_write_read/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/qspi/xip_port_write_read/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/qspi/xip_port_write_read/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/qspi/xip_port_write_read/readme.txt b/project/at_start_f435/examples/qspi/xip_port_write_read/readme.txt index 5b2a6d42..842f4391 100644 --- a/project/at_start_f435/examples/qspi/xip_port_write_read/readme.txt +++ b/project/at_start_f435/examples/qspi/xip_port_write_read/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/qspi/xip_port_write_read/src/at32f435_437_clock.c b/project/at_start_f435/examples/qspi/xip_port_write_read/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/qspi/xip_port_write_read/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/qspi/xip_port_write_read/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/qspi/xip_port_write_read/src/at32f435_437_int.c b/project/at_start_f435/examples/qspi/xip_port_write_read/src/at32f435_437_int.c index 39dc569c..b88110fa 100644 --- a/project/at_start_f435/examples/qspi/xip_port_write_read/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/qspi/xip_port_write_read/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/qspi/xip_port_write_read/src/main.c b/project/at_start_f435/examples/qspi/xip_port_write_read/src/main.c index 47a0c297..9c2cf1f8 100644 --- a/project/at_start_f435/examples/qspi/xip_port_write_read/src/main.c +++ b/project/at_start_f435/examples/qspi/xip_port_write_read/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/qspi/xip_port_write_read/src/qspi_xip_ly68l6400.c b/project/at_start_f435/examples/qspi/xip_port_write_read/src/qspi_xip_ly68l6400.c index 223b1930..898c5016 100644 --- a/project/at_start_f435/examples/qspi/xip_port_write_read/src/qspi_xip_ly68l6400.c +++ b/project/at_start_f435/examples/qspi/xip_port_write_read/src/qspi_xip_ly68l6400.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file qspi_cmd_esmt32m.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief qspi_cmd_esmt32m program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/scfg/mem_map_sel/inc/at32f435_437_clock.h b/project/at_start_f435/examples/scfg/mem_map_sel/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/scfg/mem_map_sel/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/scfg/mem_map_sel/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/scfg/mem_map_sel/inc/at32f435_437_conf.h b/project/at_start_f435/examples/scfg/mem_map_sel/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/scfg/mem_map_sel/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/scfg/mem_map_sel/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/scfg/mem_map_sel/inc/at32f435_437_int.h b/project/at_start_f435/examples/scfg/mem_map_sel/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/scfg/mem_map_sel/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/scfg/mem_map_sel/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/scfg/mem_map_sel/readme.txt b/project/at_start_f435/examples/scfg/mem_map_sel/readme.txt index ee99e4a2..c5d6a582 100644 --- a/project/at_start_f435/examples/scfg/mem_map_sel/readme.txt +++ b/project/at_start_f435/examples/scfg/mem_map_sel/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/scfg/mem_map_sel/src/at32f435_437_clock.c b/project/at_start_f435/examples/scfg/mem_map_sel/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/scfg/mem_map_sel/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/scfg/mem_map_sel/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/scfg/mem_map_sel/src/at32f435_437_int.c b/project/at_start_f435/examples/scfg/mem_map_sel/src/at32f435_437_int.c index df1b2b25..8c7090ba 100644 --- a/project/at_start_f435/examples/scfg/mem_map_sel/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/scfg/mem_map_sel/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/scfg/mem_map_sel/src/main.c b/project/at_start_f435/examples/scfg/mem_map_sel/src/main.c index 503c3fe1..a54ff269 100644 --- a/project/at_start_f435/examples/scfg/mem_map_sel/src/main.c +++ b/project/at_start_f435/examples/scfg/mem_map_sel/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/sdio/sd_mmc_card/inc/at32_sdio.h b/project/at_start_f435/examples/sdio/sd_mmc_card/inc/at32_sdio.h index fa3e76f7..7259de25 100644 --- a/project/at_start_f435/examples/sdio/sd_mmc_card/inc/at32_sdio.h +++ b/project/at_start_f435/examples/sdio/sd_mmc_card/inc/at32_sdio.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32_sdio.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief this file contains all the functions prototypes for the sd/mmc * card at32_sdio driver firmware library. ************************************************************************** diff --git a/project/at_start_f435/examples/sdio/sd_mmc_card/inc/at32f435_437_clock.h b/project/at_start_f435/examples/sdio/sd_mmc_card/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/sdio/sd_mmc_card/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/sdio/sd_mmc_card/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/sdio/sd_mmc_card/inc/at32f435_437_conf.h b/project/at_start_f435/examples/sdio/sd_mmc_card/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/sdio/sd_mmc_card/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/sdio/sd_mmc_card/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/sdio/sd_mmc_card/inc/at32f435_437_int.h b/project/at_start_f435/examples/sdio/sd_mmc_card/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/sdio/sd_mmc_card/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/sdio/sd_mmc_card/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/sdio/sd_mmc_card/readme.txt b/project/at_start_f435/examples/sdio/sd_mmc_card/readme.txt index 11aabcfd..396ea008 100644 --- a/project/at_start_f435/examples/sdio/sd_mmc_card/readme.txt +++ b/project/at_start_f435/examples/sdio/sd_mmc_card/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/sdio/sd_mmc_card/src/at32_sdio.c b/project/at_start_f435/examples/sdio/sd_mmc_card/src/at32_sdio.c index a8563fb9..4efc7824 100644 --- a/project/at_start_f435/examples/sdio/sd_mmc_card/src/at32_sdio.c +++ b/project/at_start_f435/examples/sdio/sd_mmc_card/src/at32_sdio.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32_sdio.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief this file provides a set of functions needed to manage the * sdio/mmc card memory. ************************************************************************** @@ -26,6 +26,7 @@ */ #include "at32_sdio.h" +#include "at32f435_437_board.h" /** @addtogroup AT32F435_periph_examples * @{ @@ -101,7 +102,7 @@ sd_error_status_type sd_init(void) gpio_pin_mux_config(GPIOC, GPIO_PINS_SOURCE12, GPIO_MUX_12); gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE2, GPIO_MUX_12); - retry = 10; + retry = 3; while(retry--){ /* reset sdio */ sdio_reset(SDIOx); @@ -230,7 +231,7 @@ sd_error_status_type sd_power_on(void) /* enable to output sdio_ck */ sdio_clock_enable(SDIOx, TRUE); - for(retry = 0; retry < 10; retry++) + for(retry = 0; retry < 5; retry++) { /* send cmd0, get in idle stage */ sdio_command_init_struct.argument = 0x0; @@ -288,6 +289,8 @@ sd_error_status_type sd_power_on(void) /* send acmd41, check voltage operation range */ while((!valid_voltage) && (count < SD_MAX_VOLT_TRIAL)) { + delay_ms(10); + /* send cmd55 before acmd41 */ sdio_command_init_struct.argument = 0x00; sdio_command_init_struct.cmd_index = SD_CMD_APP_CMD; @@ -353,6 +356,8 @@ sd_error_status_type sd_power_on(void) /* send cmd1 */ while((!valid_voltage) && (count < SD_MAX_VOLT_TRIAL)) { + delay_ms(10); + sdio_command_init_struct.argument = SD_VOLTAGE_WINDOW_MMC; sdio_command_init_struct.cmd_index = SD_CMD_SEND_OP_COND; sdio_command_init_struct.rsp_type = SDIO_RESPONSE_SHORT; diff --git a/project/at_start_f435/examples/sdio/sd_mmc_card/src/at32f435_437_clock.c b/project/at_start_f435/examples/sdio/sd_mmc_card/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/sdio/sd_mmc_card/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/sdio/sd_mmc_card/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/sdio/sd_mmc_card/src/at32f435_437_int.c b/project/at_start_f435/examples/sdio/sd_mmc_card/src/at32f435_437_int.c index ac7b4846..1505192e 100644 --- a/project/at_start_f435/examples/sdio/sd_mmc_card/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/sdio/sd_mmc_card/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/sdio/sd_mmc_card/src/main.c b/project/at_start_f435/examples/sdio/sd_mmc_card/src/main.c index e038e65c..8966bdaf 100644 --- a/project/at_start_f435/examples/sdio/sd_mmc_card/src/main.c +++ b/project/at_start_f435/examples/sdio/sd_mmc_card/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/sdio/sdio_fatfs/inc/at32_sdio.h b/project/at_start_f435/examples/sdio/sdio_fatfs/inc/at32_sdio.h index a2e609e0..908f1b57 100644 --- a/project/at_start_f435/examples/sdio/sdio_fatfs/inc/at32_sdio.h +++ b/project/at_start_f435/examples/sdio/sdio_fatfs/inc/at32_sdio.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32_sdio.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief this file contains all the functions prototypes for the sd/mmc * card at32_sdio driver firmware library. ************************************************************************** diff --git a/project/at_start_f435/examples/sdio/sdio_fatfs/inc/at32f435_437_clock.h b/project/at_start_f435/examples/sdio/sdio_fatfs/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/sdio/sdio_fatfs/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/sdio/sdio_fatfs/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/sdio/sdio_fatfs/inc/at32f435_437_conf.h b/project/at_start_f435/examples/sdio/sdio_fatfs/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/sdio/sdio_fatfs/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/sdio/sdio_fatfs/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/sdio/sdio_fatfs/inc/at32f435_437_int.h b/project/at_start_f435/examples/sdio/sdio_fatfs/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/sdio/sdio_fatfs/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/sdio/sdio_fatfs/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/sdio/sdio_fatfs/readme.txt b/project/at_start_f435/examples/sdio/sdio_fatfs/readme.txt index e1d684b5..74525c96 100644 --- a/project/at_start_f435/examples/sdio/sdio_fatfs/readme.txt +++ b/project/at_start_f435/examples/sdio/sdio_fatfs/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/sdio/sdio_fatfs/src/at32_sdio.c b/project/at_start_f435/examples/sdio/sdio_fatfs/src/at32_sdio.c index 42b7f0c1..454fc52a 100644 --- a/project/at_start_f435/examples/sdio/sdio_fatfs/src/at32_sdio.c +++ b/project/at_start_f435/examples/sdio/sdio_fatfs/src/at32_sdio.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32_sdio.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief this file provides a set of functions needed to manage the * sdio/mmc card memory. ************************************************************************** @@ -27,6 +27,7 @@ #include #include "at32_sdio.h" +#include "at32f435_437_board.h" /** @addtogroup AT32F435_periph_examples * @{ @@ -102,7 +103,7 @@ sd_error_status_type sd_init(void) gpio_pin_mux_config(GPIOC, GPIO_PINS_SOURCE12, GPIO_MUX_12); gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE2, GPIO_MUX_12); - retry = 10; + retry = 3; while(retry--){ /* reset sdio */ sdio_reset(SDIOx); @@ -237,7 +238,7 @@ sd_error_status_type sd_power_on(void) /* enable to output sdio_ck */ sdio_clock_enable(SDIOx, TRUE); - for(retry = 0; retry < 10; retry++) + for(retry = 0; retry < 5; retry++) { /* send cmd0, get in idle stage */ sdio_command_init_struct.argument = 0x0; @@ -295,6 +296,8 @@ sd_error_status_type sd_power_on(void) /* send acmd41, check voltage operation range */ while((!valid_voltage) && (count < SD_MAX_VOLT_TRIAL)) { + delay_ms(10); + /* send cmd55 before acmd41 */ sdio_command_init_struct.argument = 0x00; sdio_command_init_struct.cmd_index = SD_CMD_APP_CMD; @@ -360,6 +363,8 @@ sd_error_status_type sd_power_on(void) /* send cmd1 */ while((!valid_voltage) && (count < SD_MAX_VOLT_TRIAL)) { + delay_ms(10); + sdio_command_init_struct.argument = SD_VOLTAGE_WINDOW_MMC; sdio_command_init_struct.cmd_index = SD_CMD_SEND_OP_COND; sdio_command_init_struct.rsp_type = SDIO_RESPONSE_SHORT; diff --git a/project/at_start_f435/examples/sdio/sdio_fatfs/src/at32f435_437_clock.c b/project/at_start_f435/examples/sdio/sdio_fatfs/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/sdio/sdio_fatfs/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/sdio/sdio_fatfs/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/sdio/sdio_fatfs/src/at32f435_437_int.c b/project/at_start_f435/examples/sdio/sdio_fatfs/src/at32f435_437_int.c index 83bfa479..6bb9f3e1 100644 --- a/project/at_start_f435/examples/sdio/sdio_fatfs/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/sdio/sdio_fatfs/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/sdio/sdio_fatfs/src/main.c b/project/at_start_f435/examples/sdio/sdio_fatfs/src/main.c index 437f7507..23e0decd 100644 --- a/project/at_start_f435/examples/sdio/sdio_fatfs/src/main.c +++ b/project/at_start_f435/examples/sdio/sdio_fatfs/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/spi/crc_transfer_polling/inc/at32f435_437_clock.h b/project/at_start_f435/examples/spi/crc_transfer_polling/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/spi/crc_transfer_polling/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/spi/crc_transfer_polling/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/spi/crc_transfer_polling/inc/at32f435_437_conf.h b/project/at_start_f435/examples/spi/crc_transfer_polling/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/spi/crc_transfer_polling/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/spi/crc_transfer_polling/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/spi/crc_transfer_polling/inc/at32f435_437_int.h b/project/at_start_f435/examples/spi/crc_transfer_polling/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/spi/crc_transfer_polling/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/spi/crc_transfer_polling/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/spi/crc_transfer_polling/mdk_v5/halfduplex_dma.uvoptx b/project/at_start_f435/examples/spi/crc_transfer_polling/mdk_v5/crc_transfer_polling.uvoptx similarity index 100% rename from project/at_start_f435/examples/spi/crc_transfer_polling/mdk_v5/halfduplex_dma.uvoptx rename to project/at_start_f435/examples/spi/crc_transfer_polling/mdk_v5/crc_transfer_polling.uvoptx diff --git a/project/at_start_f435/examples/spi/crc_transfer_polling/mdk_v5/halfduplex_dma.uvprojx b/project/at_start_f435/examples/spi/crc_transfer_polling/mdk_v5/crc_transfer_polling.uvprojx similarity index 100% rename from project/at_start_f435/examples/spi/crc_transfer_polling/mdk_v5/halfduplex_dma.uvprojx rename to project/at_start_f435/examples/spi/crc_transfer_polling/mdk_v5/crc_transfer_polling.uvprojx diff --git a/project/at_start_f435/examples/spi/crc_transfer_polling/readme.txt b/project/at_start_f435/examples/spi/crc_transfer_polling/readme.txt index 624ad6ec..a8f687d2 100644 --- a/project/at_start_f435/examples/spi/crc_transfer_polling/readme.txt +++ b/project/at_start_f435/examples/spi/crc_transfer_polling/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/spi/crc_transfer_polling/src/at32f435_437_clock.c b/project/at_start_f435/examples/spi/crc_transfer_polling/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/spi/crc_transfer_polling/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/spi/crc_transfer_polling/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/spi/crc_transfer_polling/src/at32f435_437_int.c b/project/at_start_f435/examples/spi/crc_transfer_polling/src/at32f435_437_int.c index 5afd8ba2..663a3442 100644 --- a/project/at_start_f435/examples/spi/crc_transfer_polling/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/spi/crc_transfer_polling/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/spi/crc_transfer_polling/src/main.c b/project/at_start_f435/examples/spi/crc_transfer_polling/src/main.c index 60b1d41a..cbaf07b5 100644 --- a/project/at_start_f435/examples/spi/crc_transfer_polling/src/main.c +++ b/project/at_start_f435/examples/spi/crc_transfer_polling/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/spi/fullduplex_polling/inc/at32f435_437_clock.h b/project/at_start_f435/examples/spi/fullduplex_polling/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/spi/fullduplex_polling/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/spi/fullduplex_polling/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/spi/fullduplex_polling/inc/at32f435_437_conf.h b/project/at_start_f435/examples/spi/fullduplex_polling/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/spi/fullduplex_polling/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/spi/fullduplex_polling/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/spi/fullduplex_polling/inc/at32f435_437_int.h b/project/at_start_f435/examples/spi/fullduplex_polling/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/spi/fullduplex_polling/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/spi/fullduplex_polling/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/spi/fullduplex_polling/readme.txt b/project/at_start_f435/examples/spi/fullduplex_polling/readme.txt index 34fe6451..d6d0e7a5 100644 --- a/project/at_start_f435/examples/spi/fullduplex_polling/readme.txt +++ b/project/at_start_f435/examples/spi/fullduplex_polling/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/spi/fullduplex_polling/src/at32f435_437_clock.c b/project/at_start_f435/examples/spi/fullduplex_polling/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/spi/fullduplex_polling/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/spi/fullduplex_polling/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/spi/fullduplex_polling/src/at32f435_437_int.c b/project/at_start_f435/examples/spi/fullduplex_polling/src/at32f435_437_int.c index f9fcd5fe..178e34a8 100644 --- a/project/at_start_f435/examples/spi/fullduplex_polling/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/spi/fullduplex_polling/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/spi/fullduplex_polling/src/main.c b/project/at_start_f435/examples/spi/fullduplex_polling/src/main.c index 5be9b898..9461dec8 100644 --- a/project/at_start_f435/examples/spi/fullduplex_polling/src/main.c +++ b/project/at_start_f435/examples/spi/fullduplex_polling/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/spi/halfduplex_interrupt/inc/at32f435_437_clock.h b/project/at_start_f435/examples/spi/halfduplex_interrupt/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/spi/halfduplex_interrupt/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/spi/halfduplex_interrupt/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/spi/halfduplex_interrupt/inc/at32f435_437_conf.h b/project/at_start_f435/examples/spi/halfduplex_interrupt/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/spi/halfduplex_interrupt/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/spi/halfduplex_interrupt/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/spi/halfduplex_interrupt/inc/at32f435_437_int.h b/project/at_start_f435/examples/spi/halfduplex_interrupt/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/spi/halfduplex_interrupt/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/spi/halfduplex_interrupt/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/spi/halfduplex_interrupt/readme.txt b/project/at_start_f435/examples/spi/halfduplex_interrupt/readme.txt index 28a84dcc..ce145cf2 100644 --- a/project/at_start_f435/examples/spi/halfduplex_interrupt/readme.txt +++ b/project/at_start_f435/examples/spi/halfduplex_interrupt/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/spi/halfduplex_interrupt/src/at32f435_437_clock.c b/project/at_start_f435/examples/spi/halfduplex_interrupt/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/spi/halfduplex_interrupt/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/spi/halfduplex_interrupt/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/spi/halfduplex_interrupt/src/at32f435_437_int.c b/project/at_start_f435/examples/spi/halfduplex_interrupt/src/at32f435_437_int.c index 3daed75e..88774ff1 100644 --- a/project/at_start_f435/examples/spi/halfduplex_interrupt/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/spi/halfduplex_interrupt/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/spi/halfduplex_interrupt/src/main.c b/project/at_start_f435/examples/spi/halfduplex_interrupt/src/main.c index 408a2e6f..190f2f89 100644 --- a/project/at_start_f435/examples/spi/halfduplex_interrupt/src/main.c +++ b/project/at_start_f435/examples/spi/halfduplex_interrupt/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/spi/halfduplex_transceiver_switch/inc/at32f435_437_clock.h b/project/at_start_f435/examples/spi/halfduplex_transceiver_switch/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/spi/halfduplex_transceiver_switch/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/spi/halfduplex_transceiver_switch/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/spi/halfduplex_transceiver_switch/inc/at32f435_437_conf.h b/project/at_start_f435/examples/spi/halfduplex_transceiver_switch/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/spi/halfduplex_transceiver_switch/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/spi/halfduplex_transceiver_switch/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/spi/halfduplex_transceiver_switch/inc/at32f435_437_int.h b/project/at_start_f435/examples/spi/halfduplex_transceiver_switch/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/spi/halfduplex_transceiver_switch/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/spi/halfduplex_transceiver_switch/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/spi/halfduplex_transceiver_switch/readme.txt b/project/at_start_f435/examples/spi/halfduplex_transceiver_switch/readme.txt index a4a1f1b7..fd3115f1 100644 --- a/project/at_start_f435/examples/spi/halfduplex_transceiver_switch/readme.txt +++ b/project/at_start_f435/examples/spi/halfduplex_transceiver_switch/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/spi/halfduplex_transceiver_switch/src/at32f435_437_clock.c b/project/at_start_f435/examples/spi/halfduplex_transceiver_switch/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/spi/halfduplex_transceiver_switch/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/spi/halfduplex_transceiver_switch/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/spi/halfduplex_transceiver_switch/src/at32f435_437_int.c b/project/at_start_f435/examples/spi/halfduplex_transceiver_switch/src/at32f435_437_int.c index 815e4907..cc6bba39 100644 --- a/project/at_start_f435/examples/spi/halfduplex_transceiver_switch/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/spi/halfduplex_transceiver_switch/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer @@ -168,7 +168,7 @@ void SysTick_Handler(void) spi_enable(SPI3, TRUE); if(rx_index == BUFFERSIZE) { - spi_i2s_interrupt_enable(SPI3, SPI_I2S_RDBF_FLAG, FALSE); + spi_i2s_interrupt_enable(SPI3, SPI_I2S_RDBF_INT, FALSE); } } } diff --git a/project/at_start_f435/examples/spi/halfduplex_transceiver_switch/src/main.c b/project/at_start_f435/examples/spi/halfduplex_transceiver_switch/src/main.c index a3e4bbb8..58b7f0a8 100644 --- a/project/at_start_f435/examples/spi/halfduplex_transceiver_switch/src/main.c +++ b/project/at_start_f435/examples/spi/halfduplex_transceiver_switch/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/spi/only_receive_mode_polling/inc/at32f435_437_clock.h b/project/at_start_f435/examples/spi/only_receive_mode_polling/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/spi/only_receive_mode_polling/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/spi/only_receive_mode_polling/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/spi/only_receive_mode_polling/inc/at32f435_437_conf.h b/project/at_start_f435/examples/spi/only_receive_mode_polling/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/spi/only_receive_mode_polling/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/spi/only_receive_mode_polling/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/spi/only_receive_mode_polling/inc/at32f435_437_int.h b/project/at_start_f435/examples/spi/only_receive_mode_polling/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/spi/only_receive_mode_polling/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/spi/only_receive_mode_polling/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/spi/only_receive_mode_polling/readme.txt b/project/at_start_f435/examples/spi/only_receive_mode_polling/readme.txt index 49eed1e5..81b925fa 100644 --- a/project/at_start_f435/examples/spi/only_receive_mode_polling/readme.txt +++ b/project/at_start_f435/examples/spi/only_receive_mode_polling/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/spi/only_receive_mode_polling/src/at32f435_437_clock.c b/project/at_start_f435/examples/spi/only_receive_mode_polling/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/spi/only_receive_mode_polling/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/spi/only_receive_mode_polling/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/spi/only_receive_mode_polling/src/at32f435_437_int.c b/project/at_start_f435/examples/spi/only_receive_mode_polling/src/at32f435_437_int.c index e257d3d4..fb70c972 100644 --- a/project/at_start_f435/examples/spi/only_receive_mode_polling/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/spi/only_receive_mode_polling/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/spi/only_receive_mode_polling/src/main.c b/project/at_start_f435/examples/spi/only_receive_mode_polling/src/main.c index e0b9cb87..820e25f3 100644 --- a/project/at_start_f435/examples/spi/only_receive_mode_polling/src/main.c +++ b/project/at_start_f435/examples/spi/only_receive_mode_polling/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/spi/ti_fullduplex_dma/inc/at32f435_437_clock.h b/project/at_start_f435/examples/spi/ti_fullduplex_dma/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/spi/ti_fullduplex_dma/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/spi/ti_fullduplex_dma/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/spi/ti_fullduplex_dma/inc/at32f435_437_conf.h b/project/at_start_f435/examples/spi/ti_fullduplex_dma/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/spi/ti_fullduplex_dma/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/spi/ti_fullduplex_dma/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/spi/ti_fullduplex_dma/inc/at32f435_437_int.h b/project/at_start_f435/examples/spi/ti_fullduplex_dma/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/spi/ti_fullduplex_dma/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/spi/ti_fullduplex_dma/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/spi/ti_fullduplex_dma/readme.txt b/project/at_start_f435/examples/spi/ti_fullduplex_dma/readme.txt index 19f6ba3d..ae32c4db 100644 --- a/project/at_start_f435/examples/spi/ti_fullduplex_dma/readme.txt +++ b/project/at_start_f435/examples/spi/ti_fullduplex_dma/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/spi/ti_fullduplex_dma/src/at32f435_437_clock.c b/project/at_start_f435/examples/spi/ti_fullduplex_dma/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/spi/ti_fullduplex_dma/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/spi/ti_fullduplex_dma/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/spi/ti_fullduplex_dma/src/at32f435_437_int.c b/project/at_start_f435/examples/spi/ti_fullduplex_dma/src/at32f435_437_int.c index ee6dc0bd..4fbc9708 100644 --- a/project/at_start_f435/examples/spi/ti_fullduplex_dma/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/spi/ti_fullduplex_dma/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/spi/ti_fullduplex_dma/src/main.c b/project/at_start_f435/examples/spi/ti_fullduplex_dma/src/main.c index f28d5a53..6b8ad4b0 100644 --- a/project/at_start_f435/examples/spi/ti_fullduplex_dma/src/main.c +++ b/project/at_start_f435/examples/spi/ti_fullduplex_dma/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/spi/use_jtagpin_hardwarecs_dma/inc/at32f435_437_clock.h b/project/at_start_f435/examples/spi/use_jtagpin_hardwarecs_dma/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/spi/use_jtagpin_hardwarecs_dma/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/spi/use_jtagpin_hardwarecs_dma/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/spi/use_jtagpin_hardwarecs_dma/inc/at32f435_437_conf.h b/project/at_start_f435/examples/spi/use_jtagpin_hardwarecs_dma/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/spi/use_jtagpin_hardwarecs_dma/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/spi/use_jtagpin_hardwarecs_dma/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/spi/use_jtagpin_hardwarecs_dma/inc/at32f435_437_int.h b/project/at_start_f435/examples/spi/use_jtagpin_hardwarecs_dma/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/spi/use_jtagpin_hardwarecs_dma/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/spi/use_jtagpin_hardwarecs_dma/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/spi/use_jtagpin_hardwarecs_dma/readme.txt b/project/at_start_f435/examples/spi/use_jtagpin_hardwarecs_dma/readme.txt index 4923c682..d44e112e 100644 --- a/project/at_start_f435/examples/spi/use_jtagpin_hardwarecs_dma/readme.txt +++ b/project/at_start_f435/examples/spi/use_jtagpin_hardwarecs_dma/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/spi/use_jtagpin_hardwarecs_dma/src/at32f435_437_clock.c b/project/at_start_f435/examples/spi/use_jtagpin_hardwarecs_dma/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/spi/use_jtagpin_hardwarecs_dma/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/spi/use_jtagpin_hardwarecs_dma/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/spi/use_jtagpin_hardwarecs_dma/src/at32f435_437_int.c b/project/at_start_f435/examples/spi/use_jtagpin_hardwarecs_dma/src/at32f435_437_int.c index 65df2c6e..5a1f215c 100644 --- a/project/at_start_f435/examples/spi/use_jtagpin_hardwarecs_dma/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/spi/use_jtagpin_hardwarecs_dma/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/spi/use_jtagpin_hardwarecs_dma/src/main.c b/project/at_start_f435/examples/spi/use_jtagpin_hardwarecs_dma/src/main.c index 97edbaef..e3ac4f4f 100644 --- a/project/at_start_f435/examples/spi/use_jtagpin_hardwarecs_dma/src/main.c +++ b/project/at_start_f435/examples/spi/use_jtagpin_hardwarecs_dma/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/spi/w25q_flash/inc/at32f435_437_clock.h b/project/at_start_f435/examples/spi/w25q_flash/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/spi/w25q_flash/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/spi/w25q_flash/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/spi/w25q_flash/inc/at32f435_437_conf.h b/project/at_start_f435/examples/spi/w25q_flash/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/spi/w25q_flash/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/spi/w25q_flash/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/spi/w25q_flash/inc/at32f435_437_int.h b/project/at_start_f435/examples/spi/w25q_flash/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/spi/w25q_flash/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/spi/w25q_flash/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/spi/w25q_flash/inc/spi_flash.h b/project/at_start_f435/examples/spi/w25q_flash/inc/spi_flash.h index efa21497..22f89491 100644 --- a/project/at_start_f435/examples/spi/w25q_flash/inc/spi_flash.h +++ b/project/at_start_f435/examples/spi/w25q_flash/inc/spi_flash.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file spi_flash.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of spi_flash ************************************************************************** * Copyright notice & Disclaimer @@ -45,8 +45,8 @@ * @{ */ -#define FLASH_CS_HIGH() gpio_bits_set(GPIOA, GPIO_PINS_4) -#define FLASH_CS_LOW() gpio_bits_reset(GPIOA, GPIO_PINS_4) +#define FLASH_CS_HIGH() gpio_bits_set(GPIOD, GPIO_PINS_0) +#define FLASH_CS_LOW() gpio_bits_reset(GPIOD, GPIO_PINS_0) /** * @} diff --git a/project/at_start_f435/examples/spi/w25q_flash/readme.txt b/project/at_start_f435/examples/spi/w25q_flash/readme.txt index ec7342d7..54bb421d 100644 --- a/project/at_start_f435/examples/spi/w25q_flash/readme.txt +++ b/project/at_start_f435/examples/spi/w25q_flash/readme.txt @@ -1,19 +1,19 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ - this demo is based on the at-start board, in this demo, shows how to use - only receive mode receive data by polling mode. + this demo is based on the at-start board and AT32-Comm-EV board, in this demo, + shows how to use spi access the w25q flash chip. the pins connection as follow: - - spi1 w25q128 - pa4(cs) <---> cs pin - pa5(sck) <---> clk pin - pa6(miso) <---> di pin - pa7(mosi) <---> do pin + - spi2 w25qxx + pd0(cs) <---> cs pin + pd1(sck) <---> clk pin + pc2(miso) <---> di pin + pd4(mosi) <---> do pin for more detailed information. please refer to the application note document AN0102. \ No newline at end of file diff --git a/project/at_start_f435/examples/spi/w25q_flash/src/at32f435_437_clock.c b/project/at_start_f435/examples/spi/w25q_flash/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/spi/w25q_flash/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/spi/w25q_flash/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/spi/w25q_flash/src/at32f435_437_int.c b/project/at_start_f435/examples/spi/w25q_flash/src/at32f435_437_int.c index 8b9665eb..24ff086f 100644 --- a/project/at_start_f435/examples/spi/w25q_flash/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/spi/w25q_flash/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/spi/w25q_flash/src/main.c b/project/at_start_f435/examples/spi/w25q_flash/src/main.c index 5cef25bc..7cba7742 100644 --- a/project/at_start_f435/examples/spi/w25q_flash/src/main.c +++ b/project/at_start_f435/examples/spi/w25q_flash/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer @@ -96,7 +96,7 @@ int main(void) uart_print_init(115200); spiflash_init(); flash_id_index = spiflash_read_id(); - if(flash_id_index != W25Q128) + if((flash_id_index != W25Q128)&&(flash_id_index != W25Q80)&&(flash_id_index != W25Q16)&&(flash_id_index != W25Q32)&&(flash_id_index != W25Q64)) { printf("flash id check error!\r\n"); for(index = 0; index < 50; index++) diff --git a/project/at_start_f435/examples/spi/w25q_flash/src/spi_flash.c b/project/at_start_f435/examples/spi/w25q_flash/src/spi_flash.c index 22ae8cb5..8aa5b80b 100644 --- a/project/at_start_f435/examples/spi/w25q_flash/src/spi_flash.c +++ b/project/at_start_f435/examples/spi/w25q_flash/src/spi_flash.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file spi_flash.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief spi_flash source code ************************************************************************** * Copyright notice & Disclaimer @@ -47,48 +47,49 @@ void spiflash_init(void) gpio_init_type gpio_initstructure; spi_init_type spi_init_struct; - crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE); + crm_periph_clock_enable(CRM_GPIOC_PERIPH_CLOCK, TRUE); + crm_periph_clock_enable(CRM_GPIOD_PERIPH_CLOCK, TRUE); crm_periph_clock_enable(CRM_DMA1_PERIPH_CLOCK, TRUE); - /* software cs, pa4 as a general io to control flash cs */ + /* software cs, pd0 as a general io to control flash cs */ gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; gpio_initstructure.gpio_pull = GPIO_PULL_UP; gpio_initstructure.gpio_mode = GPIO_MODE_OUTPUT; gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; - gpio_initstructure.gpio_pins = GPIO_PINS_4; - gpio_init(GPIOA, &gpio_initstructure); + gpio_initstructure.gpio_pins = GPIO_PINS_0; + gpio_init(GPIOD, &gpio_initstructure); /* sck */ gpio_initstructure.gpio_pull = GPIO_PULL_UP; gpio_initstructure.gpio_mode = GPIO_MODE_MUX; - gpio_initstructure.gpio_pins = GPIO_PINS_5; - gpio_init(GPIOA, &gpio_initstructure); - gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE5, GPIO_MUX_5); + gpio_initstructure.gpio_pins = GPIO_PINS_1; + gpio_init(GPIOD, &gpio_initstructure); + gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE1, GPIO_MUX_6); /* miso */ gpio_initstructure.gpio_pull = GPIO_PULL_UP; - gpio_initstructure.gpio_pins = GPIO_PINS_6; - gpio_init(GPIOA, &gpio_initstructure); - gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE6, GPIO_MUX_5); + gpio_initstructure.gpio_pins = GPIO_PINS_2; + gpio_init(GPIOC, &gpio_initstructure); + gpio_pin_mux_config(GPIOC, GPIO_PINS_SOURCE2, GPIO_MUX_5); /* mosi */ gpio_initstructure.gpio_pull = GPIO_PULL_UP; - gpio_initstructure.gpio_pins = GPIO_PINS_7; - gpio_init(GPIOA, &gpio_initstructure); - gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE7, GPIO_MUX_5); + gpio_initstructure.gpio_pins = GPIO_PINS_4; + gpio_init(GPIOD, &gpio_initstructure); + gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE4, GPIO_MUX_6); FLASH_CS_HIGH(); - crm_periph_clock_enable(CRM_SPI1_PERIPH_CLOCK, TRUE); + crm_periph_clock_enable(CRM_SPI2_PERIPH_CLOCK, TRUE); spi_default_para_init(&spi_init_struct); spi_init_struct.transmission_mode = SPI_TRANSMIT_FULL_DUPLEX; spi_init_struct.master_slave_mode = SPI_MODE_MASTER; - spi_init_struct.mclk_freq_division = SPI_MCLK_DIV_8; + spi_init_struct.mclk_freq_division = SPI_MCLK_DIV_32; spi_init_struct.first_bit_transmission = SPI_FIRST_BIT_MSB; spi_init_struct.frame_bit_num = SPI_FRAME_8BIT; spi_init_struct.clock_polarity = SPI_CLOCK_POLARITY_HIGH; spi_init_struct.clock_phase = SPI_CLOCK_PHASE_2EDGE; spi_init_struct.cs_mode_selection = SPI_CS_SOFTWARE_MODE; - spi_init(SPI1, &spi_init_struct); - spi_enable(SPI1, TRUE); + spi_init(SPI2, &spi_init_struct); + spi_enable(SPI2, TRUE); } @@ -317,30 +318,30 @@ void spi_bytes_write(uint8_t *pbuffer, uint32_t length) dma_init_struct.memory_base_addr = (uint32_t)&dummy_data; dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_BYTE; dma_init_struct.memory_inc_enable = FALSE; - dma_init_struct.peripheral_base_addr = (uint32_t)(&SPI1->dt); + dma_init_struct.peripheral_base_addr = (uint32_t)(&SPI2->dt); dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_BYTE; dma_init_struct.peripheral_inc_enable = FALSE; dma_init_struct.priority = DMA_PRIORITY_VERY_HIGH; dma_init_struct.loop_mode_enable = FALSE; dma_init(DMA1_CHANNEL2, &dma_init_struct); dmamux_enable(DMA1, TRUE); - dmamux_init(DMA1MUX_CHANNEL2, DMAMUX_DMAREQ_ID_SPI1_RX); + dmamux_init(DMA1MUX_CHANNEL2, DMAMUX_DMAREQ_ID_SPI2_RX); dma_init_struct.buffer_size = length; dma_init_struct.direction = DMA_DIR_MEMORY_TO_PERIPHERAL; dma_init_struct.memory_base_addr = (uint32_t)pbuffer; dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_BYTE; dma_init_struct.memory_inc_enable = TRUE; - dma_init_struct.peripheral_base_addr = (uint32_t)(&SPI1->dt); + dma_init_struct.peripheral_base_addr = (uint32_t)(&SPI2->dt); dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_BYTE; dma_init_struct.peripheral_inc_enable = FALSE; dma_init_struct.priority = DMA_PRIORITY_VERY_HIGH; dma_init_struct.loop_mode_enable = FALSE; dma_init(DMA1_CHANNEL3, &dma_init_struct); - dmamux_init(DMA1MUX_CHANNEL3, DMAMUX_DMAREQ_ID_SPI1_TX); + dmamux_init(DMA1MUX_CHANNEL3, DMAMUX_DMAREQ_ID_SPI2_TX); - spi_i2s_dma_transmitter_enable(SPI1, TRUE); - spi_i2s_dma_receiver_enable(SPI1, TRUE); + spi_i2s_dma_transmitter_enable(SPI2, TRUE); + spi_i2s_dma_receiver_enable(SPI2, TRUE); dma_channel_enable(DMA1_CHANNEL2, TRUE); dma_channel_enable(DMA1_CHANNEL3, TRUE); @@ -351,15 +352,15 @@ void spi_bytes_write(uint8_t *pbuffer, uint32_t length) dma_channel_enable(DMA1_CHANNEL2, FALSE); dma_channel_enable(DMA1_CHANNEL3, FALSE); - spi_i2s_dma_transmitter_enable(SPI1, FALSE); - spi_i2s_dma_receiver_enable(SPI1, FALSE); + spi_i2s_dma_transmitter_enable(SPI2, FALSE); + spi_i2s_dma_receiver_enable(SPI2, FALSE); #else while(length--) { - while(spi_i2s_flag_get(SPI1, SPI_I2S_TDBE_FLAG) == RESET); - spi_i2s_data_transmit(SPI1, *pbuffer); - while(spi_i2s_flag_get(SPI1, SPI_I2S_RDBF_FLAG) == RESET); - dummy_data = spi_i2s_data_receive(SPI1); + while(spi_i2s_flag_get(SPI2, SPI_I2S_TDBE_FLAG) == RESET); + spi_i2s_data_transmit(SPI2, *pbuffer); + while(spi_i2s_flag_get(SPI2, SPI_I2S_RDBF_FLAG) == RESET); + dummy_data = spi_i2s_data_receive(SPI2); pbuffer++; } #endif @@ -385,30 +386,30 @@ void spi_bytes_read(uint8_t *pbuffer, uint32_t length) dma_init_struct.memory_base_addr = (uint32_t)&write_value; dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_BYTE; dma_init_struct.memory_inc_enable = FALSE; - dma_init_struct.peripheral_base_addr = (uint32_t)(&SPI1->dt); + dma_init_struct.peripheral_base_addr = (uint32_t)(&SPI2->dt); dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_BYTE; dma_init_struct.peripheral_inc_enable = FALSE; dma_init_struct.priority = DMA_PRIORITY_VERY_HIGH; dma_init_struct.loop_mode_enable = FALSE; dma_init(DMA1_CHANNEL3, &dma_init_struct); dmamux_enable(DMA1, TRUE); - dmamux_init(DMA1MUX_CHANNEL3, DMAMUX_DMAREQ_ID_SPI1_TX); + dmamux_init(DMA1MUX_CHANNEL3, DMAMUX_DMAREQ_ID_SPI2_TX); dma_init_struct.buffer_size = length; dma_init_struct.direction = DMA_DIR_PERIPHERAL_TO_MEMORY; dma_init_struct.memory_base_addr = (uint32_t)pbuffer; dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_BYTE; dma_init_struct.memory_inc_enable = TRUE; - dma_init_struct.peripheral_base_addr = (uint32_t)(&SPI1->dt); + dma_init_struct.peripheral_base_addr = (uint32_t)(&SPI2->dt); dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_BYTE; dma_init_struct.peripheral_inc_enable = FALSE; dma_init_struct.priority = DMA_PRIORITY_VERY_HIGH; dma_init_struct.loop_mode_enable = FALSE; dma_init(DMA1_CHANNEL2, &dma_init_struct); - dmamux_init(DMA1MUX_CHANNEL2, DMAMUX_DMAREQ_ID_SPI1_RX); + dmamux_init(DMA1MUX_CHANNEL2, DMAMUX_DMAREQ_ID_SPI2_RX); - spi_i2s_dma_transmitter_enable(SPI1, TRUE); - spi_i2s_dma_receiver_enable(SPI1, TRUE); + spi_i2s_dma_transmitter_enable(SPI2, TRUE); + spi_i2s_dma_receiver_enable(SPI2, TRUE); dma_channel_enable(DMA1_CHANNEL2, TRUE); dma_channel_enable(DMA1_CHANNEL3, TRUE); @@ -418,15 +419,15 @@ void spi_bytes_read(uint8_t *pbuffer, uint32_t length) dma_channel_enable(DMA1_CHANNEL2, FALSE); dma_channel_enable(DMA1_CHANNEL3, FALSE); - spi_i2s_dma_transmitter_enable(SPI1, FALSE); - spi_i2s_dma_receiver_enable(SPI1, FALSE); + spi_i2s_dma_transmitter_enable(SPI2, FALSE); + spi_i2s_dma_receiver_enable(SPI2, FALSE); #else while(length--) { - while(spi_i2s_flag_get(SPI1, SPI_I2S_TDBE_FLAG) == RESET); - spi_i2s_data_transmit(SPI1, write_value); - while(spi_i2s_flag_get(SPI1, SPI_I2S_RDBF_FLAG) == RESET); - *pbuffer = spi_i2s_data_receive(SPI1); + while(spi_i2s_flag_get(SPI2, SPI_I2S_TDBE_FLAG) == RESET); + spi_i2s_data_transmit(SPI2, write_value); + while(spi_i2s_flag_get(SPI2, SPI_I2S_RDBF_FLAG) == RESET); + *pbuffer = spi_i2s_data_receive(SPI2); pbuffer++; } #endif @@ -496,12 +497,12 @@ uint16_t spiflash_read_id(void) uint8_t spi_byte_write(uint8_t data) { uint8_t brxbuff; - spi_i2s_dma_transmitter_enable(SPI1, FALSE); - spi_i2s_dma_receiver_enable(SPI1, FALSE); - spi_i2s_data_transmit(SPI1, data); - while(spi_i2s_flag_get(SPI1, SPI_I2S_RDBF_FLAG) == RESET); - brxbuff = spi_i2s_data_receive(SPI1); - while(spi_i2s_flag_get(SPI1, SPI_I2S_BF_FLAG) != RESET); + spi_i2s_dma_transmitter_enable(SPI2, FALSE); + spi_i2s_dma_receiver_enable(SPI2, FALSE); + spi_i2s_data_transmit(SPI2, data); + while(spi_i2s_flag_get(SPI2, SPI_I2S_RDBF_FLAG) == RESET); + brxbuff = spi_i2s_data_receive(SPI2); + while(spi_i2s_flag_get(SPI2, SPI_I2S_BF_FLAG) != RESET); return brxbuff; } diff --git a/project/at_start_f435/examples/sram/extend_sram/iar_v8.2/startup_at32f435_437_ext_ram.s b/project/at_start_f435/examples/sram/extend_sram/iar_v8.2/startup_at32f435_437_ext_ram.s index ce77e0a2..5049346d 100644 --- a/project/at_start_f435/examples/sram/extend_sram/iar_v8.2/startup_at32f435_437_ext_ram.s +++ b/project/at_start_f435/examples/sram/extend_sram/iar_v8.2/startup_at32f435_437_ext_ram.s @@ -1,7 +1,7 @@ ;************************************************************************** ;* @file startup_at32f435_437.s -;* @version v2.0.8 -;* @date 2022-04-25 +;* @version v2.0.9 +;* @date 2022-06-28 ;* @brief at32f435_437 startup file for IAR Systems ;************************************************************************** ; diff --git a/project/at_start_f435/examples/sram/extend_sram/inc/at32f435_437_clock.h b/project/at_start_f435/examples/sram/extend_sram/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/sram/extend_sram/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/sram/extend_sram/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/sram/extend_sram/inc/at32f435_437_conf.h b/project/at_start_f435/examples/sram/extend_sram/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/sram/extend_sram/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/sram/extend_sram/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/sram/extend_sram/inc/at32f435_437_int.h b/project/at_start_f435/examples/sram/extend_sram/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/sram/extend_sram/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/sram/extend_sram/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/sram/extend_sram/mdk_v5/startup_at32f435_437_ext_ram.s b/project/at_start_f435/examples/sram/extend_sram/mdk_v5/startup_at32f435_437_ext_ram.s index d0255b87..cbd62ba2 100644 --- a/project/at_start_f435/examples/sram/extend_sram/mdk_v5/startup_at32f435_437_ext_ram.s +++ b/project/at_start_f435/examples/sram/extend_sram/mdk_v5/startup_at32f435_437_ext_ram.s @@ -1,7 +1,7 @@ ;************************************************************************** ;* @file startup_at32f435_437.s -;* @version v2.0.8 -;* @date 2022-04-25 +;* @version v2.0.9 +;* @date 2022-06-28 ;* @brief at32f435_437 startup file for keil ;************************************************************************** ; diff --git a/project/at_start_f435/examples/sram/extend_sram/readme.txt b/project/at_start_f435/examples/sram/extend_sram/readme.txt index d2acced8..ff261d25 100644 --- a/project/at_start_f435/examples/sram/extend_sram/readme.txt +++ b/project/at_start_f435/examples/sram/extend_sram/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/sram/extend_sram/src/at32f435_437_clock.c b/project/at_start_f435/examples/sram/extend_sram/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/sram/extend_sram/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/sram/extend_sram/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/sram/extend_sram/src/at32f435_437_int.c b/project/at_start_f435/examples/sram/extend_sram/src/at32f435_437_int.c index 463047fe..aa65ffcf 100644 --- a/project/at_start_f435/examples/sram/extend_sram/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/sram/extend_sram/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/sram/extend_sram/src/main.c b/project/at_start_f435/examples/sram/extend_sram/src/main.c index 3db41526..c934722b 100644 --- a/project/at_start_f435/examples/sram/extend_sram/src/main.c +++ b/project/at_start_f435/examples/sram/extend_sram/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/6_steps/inc/at32f435_437_clock.h b/project/at_start_f435/examples/tmr/6_steps/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/tmr/6_steps/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/tmr/6_steps/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/6_steps/inc/at32f435_437_conf.h b/project/at_start_f435/examples/tmr/6_steps/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/tmr/6_steps/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/tmr/6_steps/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/6_steps/inc/at32f435_437_int.h b/project/at_start_f435/examples/tmr/6_steps/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/tmr/6_steps/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/tmr/6_steps/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/6_steps/mdk_v5/6_steps.uvprojx b/project/at_start_f435/examples/tmr/6_steps/mdk_v5/6_steps.uvprojx index 35592d9a..898a9b2f 100644 --- a/project/at_start_f435/examples/tmr/6_steps/mdk_v5/6_steps.uvprojx +++ b/project/at_start_f435/examples/tmr/6_steps/mdk_v5/6_steps.uvprojx @@ -10,7 +10,7 @@ 6_steps 0x4 ARM-ADS - 5060750::V5.06 update 6 (build 750)::.\ARMCC + 5060750::V5.06 update 6 (build 750)::ARMCC 0 diff --git a/project/at_start_f435/examples/tmr/6_steps/readme.txt b/project/at_start_f435/examples/tmr/6_steps/readme.txt index af7e6415..28f6b1ee 100644 --- a/project/at_start_f435/examples/tmr/6_steps/readme.txt +++ b/project/at_start_f435/examples/tmr/6_steps/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/tmr/6_steps/src/at32f435_437_clock.c b/project/at_start_f435/examples/tmr/6_steps/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/tmr/6_steps/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/tmr/6_steps/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/6_steps/src/at32f435_437_int.c b/project/at_start_f435/examples/tmr/6_steps/src/at32f435_437_int.c index 4f3ca65e..56ce676a 100644 --- a/project/at_start_f435/examples/tmr/6_steps/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/tmr/6_steps/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/6_steps/src/main.c b/project/at_start_f435/examples/tmr/6_steps/src/main.c index f03a2352..5fc8e729 100644 --- a/project/at_start_f435/examples/tmr/6_steps/src/main.c +++ b/project/at_start_f435/examples/tmr/6_steps/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer @@ -87,7 +87,7 @@ int main(void) gpio_init_struct.gpio_pins = GPIO_PINS_12; gpio_init_struct.gpio_mode = GPIO_MODE_MUX; gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; - gpio_init_struct.gpio_pull = GPIO_PULL_NONE; + gpio_init_struct.gpio_pull = GPIO_PULL_DOWN; gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; gpio_init(GPIOB, &gpio_init_struct); diff --git a/project/at_start_f435/examples/tmr/7_pwm_output/inc/at32f435_437_clock.h b/project/at_start_f435/examples/tmr/7_pwm_output/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/tmr/7_pwm_output/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/tmr/7_pwm_output/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/7_pwm_output/inc/at32f435_437_conf.h b/project/at_start_f435/examples/tmr/7_pwm_output/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/tmr/7_pwm_output/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/tmr/7_pwm_output/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/7_pwm_output/inc/at32f435_437_int.h b/project/at_start_f435/examples/tmr/7_pwm_output/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/tmr/7_pwm_output/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/tmr/7_pwm_output/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/7_pwm_output/readme.txt b/project/at_start_f435/examples/tmr/7_pwm_output/readme.txt index ebe565e2..1c8bc966 100644 --- a/project/at_start_f435/examples/tmr/7_pwm_output/readme.txt +++ b/project/at_start_f435/examples/tmr/7_pwm_output/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/tmr/7_pwm_output/src/at32f435_437_clock.c b/project/at_start_f435/examples/tmr/7_pwm_output/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/tmr/7_pwm_output/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/tmr/7_pwm_output/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/7_pwm_output/src/at32f435_437_int.c b/project/at_start_f435/examples/tmr/7_pwm_output/src/at32f435_437_int.c index ddd66408..cfaa26ac 100644 --- a/project/at_start_f435/examples/tmr/7_pwm_output/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/tmr/7_pwm_output/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/7_pwm_output/src/main.c b/project/at_start_f435/examples/tmr/7_pwm_output/src/main.c index 69755b04..70d3eed1 100644 --- a/project/at_start_f435/examples/tmr/7_pwm_output/src/main.c +++ b/project/at_start_f435/examples/tmr/7_pwm_output/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/cascade_synchro/inc/at32f435_437_clock.h b/project/at_start_f435/examples/tmr/cascade_synchro/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/tmr/cascade_synchro/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/tmr/cascade_synchro/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/cascade_synchro/inc/at32f435_437_conf.h b/project/at_start_f435/examples/tmr/cascade_synchro/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/tmr/cascade_synchro/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/tmr/cascade_synchro/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/cascade_synchro/inc/at32f435_437_int.h b/project/at_start_f435/examples/tmr/cascade_synchro/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/tmr/cascade_synchro/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/tmr/cascade_synchro/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/cascade_synchro/readme.txt b/project/at_start_f435/examples/tmr/cascade_synchro/readme.txt index 4aa9303d..d5a805a3 100644 --- a/project/at_start_f435/examples/tmr/cascade_synchro/readme.txt +++ b/project/at_start_f435/examples/tmr/cascade_synchro/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/tmr/cascade_synchro/src/at32f435_437_clock.c b/project/at_start_f435/examples/tmr/cascade_synchro/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/tmr/cascade_synchro/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/tmr/cascade_synchro/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/cascade_synchro/src/at32f435_437_int.c b/project/at_start_f435/examples/tmr/cascade_synchro/src/at32f435_437_int.c index 49406d43..a1d42b7c 100644 --- a/project/at_start_f435/examples/tmr/cascade_synchro/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/tmr/cascade_synchro/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/cascade_synchro/src/main.c b/project/at_start_f435/examples/tmr/cascade_synchro/src/main.c index 89d2b7a9..910fa92f 100644 --- a/project/at_start_f435/examples/tmr/cascade_synchro/src/main.c +++ b/project/at_start_f435/examples/tmr/cascade_synchro/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/complementary_signals/inc/at32f435_437_clock.h b/project/at_start_f435/examples/tmr/complementary_signals/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/tmr/complementary_signals/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/tmr/complementary_signals/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/complementary_signals/inc/at32f435_437_conf.h b/project/at_start_f435/examples/tmr/complementary_signals/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/tmr/complementary_signals/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/tmr/complementary_signals/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/complementary_signals/inc/at32f435_437_int.h b/project/at_start_f435/examples/tmr/complementary_signals/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/tmr/complementary_signals/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/tmr/complementary_signals/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/complementary_signals/readme.txt b/project/at_start_f435/examples/tmr/complementary_signals/readme.txt index c7af8794..51cad7c3 100644 --- a/project/at_start_f435/examples/tmr/complementary_signals/readme.txt +++ b/project/at_start_f435/examples/tmr/complementary_signals/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/tmr/complementary_signals/src/at32f435_437_clock.c b/project/at_start_f435/examples/tmr/complementary_signals/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/tmr/complementary_signals/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/tmr/complementary_signals/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/complementary_signals/src/at32f435_437_int.c b/project/at_start_f435/examples/tmr/complementary_signals/src/at32f435_437_int.c index 3e693e6f..d9860716 100644 --- a/project/at_start_f435/examples/tmr/complementary_signals/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/tmr/complementary_signals/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/complementary_signals/src/main.c b/project/at_start_f435/examples/tmr/complementary_signals/src/main.c index ef7427e2..5e996a4f 100644 --- a/project/at_start_f435/examples/tmr/complementary_signals/src/main.c +++ b/project/at_start_f435/examples/tmr/complementary_signals/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/dma/inc/at32f435_437_clock.h b/project/at_start_f435/examples/tmr/dma/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/tmr/dma/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/tmr/dma/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/dma/inc/at32f435_437_conf.h b/project/at_start_f435/examples/tmr/dma/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/tmr/dma/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/tmr/dma/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/dma/inc/at32f435_437_int.h b/project/at_start_f435/examples/tmr/dma/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/tmr/dma/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/tmr/dma/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/dma/readme.txt b/project/at_start_f435/examples/tmr/dma/readme.txt index 50163201..5b54727d 100644 --- a/project/at_start_f435/examples/tmr/dma/readme.txt +++ b/project/at_start_f435/examples/tmr/dma/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/tmr/dma/src/at32f435_437_clock.c b/project/at_start_f435/examples/tmr/dma/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/tmr/dma/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/tmr/dma/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/dma/src/at32f435_437_int.c b/project/at_start_f435/examples/tmr/dma/src/at32f435_437_int.c index 2843b3dd..4e16d531 100644 --- a/project/at_start_f435/examples/tmr/dma/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/tmr/dma/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/dma/src/main.c b/project/at_start_f435/examples/tmr/dma/src/main.c index c29e96de..147ef9bd 100644 --- a/project/at_start_f435/examples/tmr/dma/src/main.c +++ b/project/at_start_f435/examples/tmr/dma/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/dma_burst/inc/at32f435_437_clock.h b/project/at_start_f435/examples/tmr/dma_burst/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/tmr/dma_burst/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/tmr/dma_burst/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/dma_burst/inc/at32f435_437_conf.h b/project/at_start_f435/examples/tmr/dma_burst/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/tmr/dma_burst/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/tmr/dma_burst/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/dma_burst/inc/at32f435_437_int.h b/project/at_start_f435/examples/tmr/dma_burst/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/tmr/dma_burst/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/tmr/dma_burst/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/dma_burst/readme.txt b/project/at_start_f435/examples/tmr/dma_burst/readme.txt index d9a19164..ffd0ba27 100644 --- a/project/at_start_f435/examples/tmr/dma_burst/readme.txt +++ b/project/at_start_f435/examples/tmr/dma_burst/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/tmr/dma_burst/src/at32f435_437_clock.c b/project/at_start_f435/examples/tmr/dma_burst/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/tmr/dma_burst/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/tmr/dma_burst/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/dma_burst/src/at32f435_437_int.c b/project/at_start_f435/examples/tmr/dma_burst/src/at32f435_437_int.c index 8c7458cc..bd42df8b 100644 --- a/project/at_start_f435/examples/tmr/dma_burst/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/tmr/dma_burst/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/dma_burst/src/main.c b/project/at_start_f435/examples/tmr/dma_burst/src/main.c index 80a4b3a8..e0c026bd 100644 --- a/project/at_start_f435/examples/tmr/dma_burst/src/main.c +++ b/project/at_start_f435/examples/tmr/dma_burst/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/encoder_tmr2/inc/at32f435_437_clock.h b/project/at_start_f435/examples/tmr/encoder_tmr2/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/tmr/encoder_tmr2/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/tmr/encoder_tmr2/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/encoder_tmr2/inc/at32f435_437_conf.h b/project/at_start_f435/examples/tmr/encoder_tmr2/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/tmr/encoder_tmr2/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/tmr/encoder_tmr2/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/encoder_tmr2/inc/at32f435_437_int.h b/project/at_start_f435/examples/tmr/encoder_tmr2/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/tmr/encoder_tmr2/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/tmr/encoder_tmr2/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/encoder_tmr2/readme.txt b/project/at_start_f435/examples/tmr/encoder_tmr2/readme.txt index ce2b2218..fa0cbfce 100644 --- a/project/at_start_f435/examples/tmr/encoder_tmr2/readme.txt +++ b/project/at_start_f435/examples/tmr/encoder_tmr2/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/tmr/encoder_tmr2/src/at32f435_437_clock.c b/project/at_start_f435/examples/tmr/encoder_tmr2/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/tmr/encoder_tmr2/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/tmr/encoder_tmr2/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/encoder_tmr2/src/at32f435_437_int.c b/project/at_start_f435/examples/tmr/encoder_tmr2/src/at32f435_437_int.c index df04ad02..195f4665 100644 --- a/project/at_start_f435/examples/tmr/encoder_tmr2/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/tmr/encoder_tmr2/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/encoder_tmr2/src/main.c b/project/at_start_f435/examples/tmr/encoder_tmr2/src/main.c index 353e6e5b..f7c73003 100644 --- a/project/at_start_f435/examples/tmr/encoder_tmr2/src/main.c +++ b/project/at_start_f435/examples/tmr/encoder_tmr2/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/external_clock/inc/at32f435_437_clock.h b/project/at_start_f435/examples/tmr/external_clock/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/tmr/external_clock/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/tmr/external_clock/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/external_clock/inc/at32f435_437_conf.h b/project/at_start_f435/examples/tmr/external_clock/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/tmr/external_clock/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/tmr/external_clock/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/external_clock/inc/at32f435_437_int.h b/project/at_start_f435/examples/tmr/external_clock/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/tmr/external_clock/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/tmr/external_clock/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/external_clock/readme.txt b/project/at_start_f435/examples/tmr/external_clock/readme.txt index 6b5c747f..342e125f 100644 --- a/project/at_start_f435/examples/tmr/external_clock/readme.txt +++ b/project/at_start_f435/examples/tmr/external_clock/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/tmr/external_clock/src/at32f435_437_clock.c b/project/at_start_f435/examples/tmr/external_clock/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/tmr/external_clock/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/tmr/external_clock/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/external_clock/src/at32f435_437_int.c b/project/at_start_f435/examples/tmr/external_clock/src/at32f435_437_int.c index 9ca4cd17..f90d280b 100644 --- a/project/at_start_f435/examples/tmr/external_clock/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/tmr/external_clock/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/external_clock/src/main.c b/project/at_start_f435/examples/tmr/external_clock/src/main.c index 37915a8c..46d4d23a 100644 --- a/project/at_start_f435/examples/tmr/external_clock/src/main.c +++ b/project/at_start_f435/examples/tmr/external_clock/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/hall_xor_tmr2/inc/at32f435_437_clock.h b/project/at_start_f435/examples/tmr/hall_xor_tmr2/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/tmr/hall_xor_tmr2/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/tmr/hall_xor_tmr2/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/hall_xor_tmr2/inc/at32f435_437_conf.h b/project/at_start_f435/examples/tmr/hall_xor_tmr2/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/tmr/hall_xor_tmr2/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/tmr/hall_xor_tmr2/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/hall_xor_tmr2/inc/at32f435_437_int.h b/project/at_start_f435/examples/tmr/hall_xor_tmr2/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/tmr/hall_xor_tmr2/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/tmr/hall_xor_tmr2/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/hall_xor_tmr2/readme.txt b/project/at_start_f435/examples/tmr/hall_xor_tmr2/readme.txt index d98aa001..94d7de2e 100644 --- a/project/at_start_f435/examples/tmr/hall_xor_tmr2/readme.txt +++ b/project/at_start_f435/examples/tmr/hall_xor_tmr2/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/tmr/hall_xor_tmr2/src/at32f435_437_clock.c b/project/at_start_f435/examples/tmr/hall_xor_tmr2/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/tmr/hall_xor_tmr2/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/tmr/hall_xor_tmr2/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/hall_xor_tmr2/src/at32f435_437_int.c b/project/at_start_f435/examples/tmr/hall_xor_tmr2/src/at32f435_437_int.c index 4ae33aba..19efebc0 100644 --- a/project/at_start_f435/examples/tmr/hall_xor_tmr2/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/tmr/hall_xor_tmr2/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/hall_xor_tmr2/src/main.c b/project/at_start_f435/examples/tmr/hall_xor_tmr2/src/main.c index bbe2c736..09b73e1f 100644 --- a/project/at_start_f435/examples/tmr/hall_xor_tmr2/src/main.c +++ b/project/at_start_f435/examples/tmr/hall_xor_tmr2/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/hang_mode/inc/at32f435_437_clock.h b/project/at_start_f435/examples/tmr/hang_mode/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/tmr/hang_mode/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/tmr/hang_mode/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/hang_mode/inc/at32f435_437_conf.h b/project/at_start_f435/examples/tmr/hang_mode/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/tmr/hang_mode/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/tmr/hang_mode/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/hang_mode/inc/at32f435_437_int.h b/project/at_start_f435/examples/tmr/hang_mode/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/tmr/hang_mode/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/tmr/hang_mode/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/hang_mode/readme.txt b/project/at_start_f435/examples/tmr/hang_mode/readme.txt index d0f2b96d..b2780dbe 100644 --- a/project/at_start_f435/examples/tmr/hang_mode/readme.txt +++ b/project/at_start_f435/examples/tmr/hang_mode/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/tmr/hang_mode/src/at32f435_437_clock.c b/project/at_start_f435/examples/tmr/hang_mode/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/tmr/hang_mode/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/tmr/hang_mode/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/hang_mode/src/at32f435_437_int.c b/project/at_start_f435/examples/tmr/hang_mode/src/at32f435_437_int.c index 2507389e..5aa3ed5c 100644 --- a/project/at_start_f435/examples/tmr/hang_mode/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/tmr/hang_mode/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/hang_mode/src/main.c b/project/at_start_f435/examples/tmr/hang_mode/src/main.c index f7446ddb..b4825b50 100644 --- a/project/at_start_f435/examples/tmr/hang_mode/src/main.c +++ b/project/at_start_f435/examples/tmr/hang_mode/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/input_capture/inc/at32f435_437_clock.h b/project/at_start_f435/examples/tmr/input_capture/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/tmr/input_capture/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/tmr/input_capture/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/input_capture/inc/at32f435_437_conf.h b/project/at_start_f435/examples/tmr/input_capture/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/tmr/input_capture/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/tmr/input_capture/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/input_capture/inc/at32f435_437_int.h b/project/at_start_f435/examples/tmr/input_capture/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/tmr/input_capture/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/tmr/input_capture/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/input_capture/readme.txt b/project/at_start_f435/examples/tmr/input_capture/readme.txt index 818e72e5..463652d7 100644 --- a/project/at_start_f435/examples/tmr/input_capture/readme.txt +++ b/project/at_start_f435/examples/tmr/input_capture/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/tmr/input_capture/src/at32f435_437_clock.c b/project/at_start_f435/examples/tmr/input_capture/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/tmr/input_capture/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/tmr/input_capture/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/input_capture/src/at32f435_437_int.c b/project/at_start_f435/examples/tmr/input_capture/src/at32f435_437_int.c index 44cc7032..a6689972 100644 --- a/project/at_start_f435/examples/tmr/input_capture/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/tmr/input_capture/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/input_capture/src/main.c b/project/at_start_f435/examples/tmr/input_capture/src/main.c index 14f53305..9f271b0a 100644 --- a/project/at_start_f435/examples/tmr/input_capture/src/main.c +++ b/project/at_start_f435/examples/tmr/input_capture/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/oc_high/inc/at32f435_437_clock.h b/project/at_start_f435/examples/tmr/oc_high/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/tmr/oc_high/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/tmr/oc_high/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/oc_high/inc/at32f435_437_conf.h b/project/at_start_f435/examples/tmr/oc_high/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/tmr/oc_high/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/tmr/oc_high/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/oc_high/inc/at32f435_437_int.h b/project/at_start_f435/examples/tmr/oc_high/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/tmr/oc_high/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/tmr/oc_high/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/oc_high/readme.txt b/project/at_start_f435/examples/tmr/oc_high/readme.txt index 93a61429..af149c36 100644 --- a/project/at_start_f435/examples/tmr/oc_high/readme.txt +++ b/project/at_start_f435/examples/tmr/oc_high/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/tmr/oc_high/src/at32f435_437_clock.c b/project/at_start_f435/examples/tmr/oc_high/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/tmr/oc_high/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/tmr/oc_high/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/oc_high/src/at32f435_437_int.c b/project/at_start_f435/examples/tmr/oc_high/src/at32f435_437_int.c index bfe90475..0dac0809 100644 --- a/project/at_start_f435/examples/tmr/oc_high/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/tmr/oc_high/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/oc_high/src/main.c b/project/at_start_f435/examples/tmr/oc_high/src/main.c index 5d028bb8..b5c13932 100644 --- a/project/at_start_f435/examples/tmr/oc_high/src/main.c +++ b/project/at_start_f435/examples/tmr/oc_high/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/oc_low/inc/at32f435_437_clock.h b/project/at_start_f435/examples/tmr/oc_low/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/tmr/oc_low/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/tmr/oc_low/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/oc_low/inc/at32f435_437_conf.h b/project/at_start_f435/examples/tmr/oc_low/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/tmr/oc_low/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/tmr/oc_low/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/oc_low/inc/at32f435_437_int.h b/project/at_start_f435/examples/tmr/oc_low/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/tmr/oc_low/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/tmr/oc_low/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/oc_low/readme.txt b/project/at_start_f435/examples/tmr/oc_low/readme.txt index 26f08e86..d179a9f3 100644 --- a/project/at_start_f435/examples/tmr/oc_low/readme.txt +++ b/project/at_start_f435/examples/tmr/oc_low/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/tmr/oc_low/src/at32f435_437_clock.c b/project/at_start_f435/examples/tmr/oc_low/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/tmr/oc_low/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/tmr/oc_low/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/oc_low/src/at32f435_437_int.c b/project/at_start_f435/examples/tmr/oc_low/src/at32f435_437_int.c index 66a9a9a4..a5b26ba7 100644 --- a/project/at_start_f435/examples/tmr/oc_low/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/tmr/oc_low/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/oc_low/src/main.c b/project/at_start_f435/examples/tmr/oc_low/src/main.c index 2f54899e..6927f44e 100644 --- a/project/at_start_f435/examples/tmr/oc_low/src/main.c +++ b/project/at_start_f435/examples/tmr/oc_low/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/oc_toggle_tmr3/inc/at32f435_437_clock.h b/project/at_start_f435/examples/tmr/oc_toggle_tmr3/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/tmr/oc_toggle_tmr3/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/tmr/oc_toggle_tmr3/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/oc_toggle_tmr3/inc/at32f435_437_conf.h b/project/at_start_f435/examples/tmr/oc_toggle_tmr3/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/tmr/oc_toggle_tmr3/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/tmr/oc_toggle_tmr3/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/oc_toggle_tmr3/inc/at32f435_437_int.h b/project/at_start_f435/examples/tmr/oc_toggle_tmr3/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/tmr/oc_toggle_tmr3/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/tmr/oc_toggle_tmr3/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/oc_toggle_tmr3/readme.txt b/project/at_start_f435/examples/tmr/oc_toggle_tmr3/readme.txt index 04ae45e1..8382bdf9 100644 --- a/project/at_start_f435/examples/tmr/oc_toggle_tmr3/readme.txt +++ b/project/at_start_f435/examples/tmr/oc_toggle_tmr3/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/tmr/oc_toggle_tmr3/src/at32f435_437_clock.c b/project/at_start_f435/examples/tmr/oc_toggle_tmr3/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/tmr/oc_toggle_tmr3/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/tmr/oc_toggle_tmr3/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/oc_toggle_tmr3/src/at32f435_437_int.c b/project/at_start_f435/examples/tmr/oc_toggle_tmr3/src/at32f435_437_int.c index c3498e06..3af39290 100644 --- a/project/at_start_f435/examples/tmr/oc_toggle_tmr3/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/tmr/oc_toggle_tmr3/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/oc_toggle_tmr3/src/main.c b/project/at_start_f435/examples/tmr/oc_toggle_tmr3/src/main.c index 32a1097b..0cfee53b 100644 --- a/project/at_start_f435/examples/tmr/oc_toggle_tmr3/src/main.c +++ b/project/at_start_f435/examples/tmr/oc_toggle_tmr3/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/oc_toggle_tmr9/inc/at32f435_437_clock.h b/project/at_start_f435/examples/tmr/oc_toggle_tmr9/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/tmr/oc_toggle_tmr9/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/tmr/oc_toggle_tmr9/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/oc_toggle_tmr9/inc/at32f435_437_conf.h b/project/at_start_f435/examples/tmr/oc_toggle_tmr9/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/tmr/oc_toggle_tmr9/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/tmr/oc_toggle_tmr9/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/oc_toggle_tmr9/inc/at32f435_437_int.h b/project/at_start_f435/examples/tmr/oc_toggle_tmr9/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/tmr/oc_toggle_tmr9/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/tmr/oc_toggle_tmr9/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/oc_toggle_tmr9/readme.txt b/project/at_start_f435/examples/tmr/oc_toggle_tmr9/readme.txt index 7ee111cc..6b232f21 100644 --- a/project/at_start_f435/examples/tmr/oc_toggle_tmr9/readme.txt +++ b/project/at_start_f435/examples/tmr/oc_toggle_tmr9/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/tmr/oc_toggle_tmr9/src/at32f435_437_clock.c b/project/at_start_f435/examples/tmr/oc_toggle_tmr9/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/tmr/oc_toggle_tmr9/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/tmr/oc_toggle_tmr9/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/oc_toggle_tmr9/src/at32f435_437_int.c b/project/at_start_f435/examples/tmr/oc_toggle_tmr9/src/at32f435_437_int.c index a655c3bb..0f449921 100644 --- a/project/at_start_f435/examples/tmr/oc_toggle_tmr9/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/tmr/oc_toggle_tmr9/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/oc_toggle_tmr9/src/main.c b/project/at_start_f435/examples/tmr/oc_toggle_tmr9/src/main.c index eedd3a8a..a8b78dfb 100644 --- a/project/at_start_f435/examples/tmr/oc_toggle_tmr9/src/main.c +++ b/project/at_start_f435/examples/tmr/oc_toggle_tmr9/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/one_cycle/inc/at32f435_437_clock.h b/project/at_start_f435/examples/tmr/one_cycle/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/tmr/one_cycle/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/tmr/one_cycle/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/one_cycle/inc/at32f435_437_conf.h b/project/at_start_f435/examples/tmr/one_cycle/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/tmr/one_cycle/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/tmr/one_cycle/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/one_cycle/inc/at32f435_437_int.h b/project/at_start_f435/examples/tmr/one_cycle/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/tmr/one_cycle/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/tmr/one_cycle/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/one_cycle/readme.txt b/project/at_start_f435/examples/tmr/one_cycle/readme.txt index 8adc990d..5c175348 100644 --- a/project/at_start_f435/examples/tmr/one_cycle/readme.txt +++ b/project/at_start_f435/examples/tmr/one_cycle/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/tmr/one_cycle/src/at32f435_437_clock.c b/project/at_start_f435/examples/tmr/one_cycle/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/tmr/one_cycle/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/tmr/one_cycle/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/one_cycle/src/at32f435_437_int.c b/project/at_start_f435/examples/tmr/one_cycle/src/at32f435_437_int.c index de1aa23b..97318f13 100644 --- a/project/at_start_f435/examples/tmr/one_cycle/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/tmr/one_cycle/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/one_cycle/src/main.c b/project/at_start_f435/examples/tmr/one_cycle/src/main.c index 24045cf1..2fc9a7c7 100644 --- a/project/at_start_f435/examples/tmr/one_cycle/src/main.c +++ b/project/at_start_f435/examples/tmr/one_cycle/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/parallel_synchro/inc/at32f435_437_clock.h b/project/at_start_f435/examples/tmr/parallel_synchro/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/tmr/parallel_synchro/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/tmr/parallel_synchro/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/parallel_synchro/inc/at32f435_437_conf.h b/project/at_start_f435/examples/tmr/parallel_synchro/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/tmr/parallel_synchro/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/tmr/parallel_synchro/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/parallel_synchro/inc/at32f435_437_int.h b/project/at_start_f435/examples/tmr/parallel_synchro/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/tmr/parallel_synchro/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/tmr/parallel_synchro/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/parallel_synchro/readme.txt b/project/at_start_f435/examples/tmr/parallel_synchro/readme.txt index 8b50035d..ae9353f4 100644 --- a/project/at_start_f435/examples/tmr/parallel_synchro/readme.txt +++ b/project/at_start_f435/examples/tmr/parallel_synchro/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/tmr/parallel_synchro/src/at32f435_437_clock.c b/project/at_start_f435/examples/tmr/parallel_synchro/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/tmr/parallel_synchro/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/tmr/parallel_synchro/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/parallel_synchro/src/at32f435_437_int.c b/project/at_start_f435/examples/tmr/parallel_synchro/src/at32f435_437_int.c index 646050fa..da7afeb5 100644 --- a/project/at_start_f435/examples/tmr/parallel_synchro/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/tmr/parallel_synchro/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/parallel_synchro/src/main.c b/project/at_start_f435/examples/tmr/parallel_synchro/src/main.c index b8fc34a4..297efc8f 100644 --- a/project/at_start_f435/examples/tmr/parallel_synchro/src/main.c +++ b/project/at_start_f435/examples/tmr/parallel_synchro/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/pwm_input/inc/at32f435_437_clock.h b/project/at_start_f435/examples/tmr/pwm_input/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/tmr/pwm_input/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/tmr/pwm_input/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/pwm_input/inc/at32f435_437_conf.h b/project/at_start_f435/examples/tmr/pwm_input/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/tmr/pwm_input/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/tmr/pwm_input/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/pwm_input/inc/at32f435_437_int.h b/project/at_start_f435/examples/tmr/pwm_input/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/tmr/pwm_input/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/tmr/pwm_input/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/pwm_input/readme.txt b/project/at_start_f435/examples/tmr/pwm_input/readme.txt index 58fde09a..0b1d660a 100644 --- a/project/at_start_f435/examples/tmr/pwm_input/readme.txt +++ b/project/at_start_f435/examples/tmr/pwm_input/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/tmr/pwm_input/src/at32f435_437_clock.c b/project/at_start_f435/examples/tmr/pwm_input/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/tmr/pwm_input/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/tmr/pwm_input/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/pwm_input/src/at32f435_437_int.c b/project/at_start_f435/examples/tmr/pwm_input/src/at32f435_437_int.c index 374dcb69..dec830e2 100644 --- a/project/at_start_f435/examples/tmr/pwm_input/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/tmr/pwm_input/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/pwm_input/src/main.c b/project/at_start_f435/examples/tmr/pwm_input/src/main.c index 97dfa9c8..88ce7324 100644 --- a/project/at_start_f435/examples/tmr/pwm_input/src/main.c +++ b/project/at_start_f435/examples/tmr/pwm_input/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/pwm_input_dma/inc/at32f435_437_clock.h b/project/at_start_f435/examples/tmr/pwm_input_dma/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/tmr/pwm_input_dma/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/tmr/pwm_input_dma/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/pwm_input_dma/inc/at32f435_437_conf.h b/project/at_start_f435/examples/tmr/pwm_input_dma/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/tmr/pwm_input_dma/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/tmr/pwm_input_dma/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/pwm_input_dma/inc/at32f435_437_int.h b/project/at_start_f435/examples/tmr/pwm_input_dma/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/tmr/pwm_input_dma/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/tmr/pwm_input_dma/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/pwm_input_dma/readme.txt b/project/at_start_f435/examples/tmr/pwm_input_dma/readme.txt index 65882022..40682b76 100644 --- a/project/at_start_f435/examples/tmr/pwm_input_dma/readme.txt +++ b/project/at_start_f435/examples/tmr/pwm_input_dma/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/tmr/pwm_input_dma/src/at32f435_437_clock.c b/project/at_start_f435/examples/tmr/pwm_input_dma/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/tmr/pwm_input_dma/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/tmr/pwm_input_dma/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/pwm_input_dma/src/at32f435_437_int.c b/project/at_start_f435/examples/tmr/pwm_input_dma/src/at32f435_437_int.c index 45628375..ee97d4d9 100644 --- a/project/at_start_f435/examples/tmr/pwm_input_dma/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/tmr/pwm_input_dma/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/pwm_input_dma/src/main.c b/project/at_start_f435/examples/tmr/pwm_input_dma/src/main.c index 54898833..d78f5cba 100644 --- a/project/at_start_f435/examples/tmr/pwm_input_dma/src/main.c +++ b/project/at_start_f435/examples/tmr/pwm_input_dma/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/pwm_output_simulate/inc/at32f435_437_clock.h b/project/at_start_f435/examples/tmr/pwm_output_simulate/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/tmr/pwm_output_simulate/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/tmr/pwm_output_simulate/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/pwm_output_simulate/inc/at32f435_437_conf.h b/project/at_start_f435/examples/tmr/pwm_output_simulate/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/tmr/pwm_output_simulate/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/tmr/pwm_output_simulate/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/pwm_output_simulate/inc/at32f435_437_int.h b/project/at_start_f435/examples/tmr/pwm_output_simulate/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/tmr/pwm_output_simulate/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/tmr/pwm_output_simulate/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/pwm_output_simulate/readme.txt b/project/at_start_f435/examples/tmr/pwm_output_simulate/readme.txt index bbe5ee06..7cb33c62 100644 --- a/project/at_start_f435/examples/tmr/pwm_output_simulate/readme.txt +++ b/project/at_start_f435/examples/tmr/pwm_output_simulate/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/tmr/pwm_output_simulate/src/at32f435_437_clock.c b/project/at_start_f435/examples/tmr/pwm_output_simulate/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/tmr/pwm_output_simulate/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/tmr/pwm_output_simulate/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/pwm_output_simulate/src/at32f435_437_int.c b/project/at_start_f435/examples/tmr/pwm_output_simulate/src/at32f435_437_int.c index 537e35c2..26c2bfed 100644 --- a/project/at_start_f435/examples/tmr/pwm_output_simulate/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/tmr/pwm_output_simulate/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/pwm_output_simulate/src/main.c b/project/at_start_f435/examples/tmr/pwm_output_simulate/src/main.c index 81c41189..dc3f04a3 100644 --- a/project/at_start_f435/examples/tmr/pwm_output_simulate/src/main.c +++ b/project/at_start_f435/examples/tmr/pwm_output_simulate/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/pwm_output_tmr10/inc/at32f435_437_clock.h b/project/at_start_f435/examples/tmr/pwm_output_tmr10/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/tmr/pwm_output_tmr10/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/tmr/pwm_output_tmr10/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/pwm_output_tmr10/inc/at32f435_437_conf.h b/project/at_start_f435/examples/tmr/pwm_output_tmr10/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/tmr/pwm_output_tmr10/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/tmr/pwm_output_tmr10/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/pwm_output_tmr10/inc/at32f435_437_int.h b/project/at_start_f435/examples/tmr/pwm_output_tmr10/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/tmr/pwm_output_tmr10/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/tmr/pwm_output_tmr10/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/pwm_output_tmr10/readme.txt b/project/at_start_f435/examples/tmr/pwm_output_tmr10/readme.txt index 0957b06a..7c2633e1 100644 --- a/project/at_start_f435/examples/tmr/pwm_output_tmr10/readme.txt +++ b/project/at_start_f435/examples/tmr/pwm_output_tmr10/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/tmr/pwm_output_tmr10/src/at32f435_437_clock.c b/project/at_start_f435/examples/tmr/pwm_output_tmr10/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/tmr/pwm_output_tmr10/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/tmr/pwm_output_tmr10/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/pwm_output_tmr10/src/at32f435_437_int.c b/project/at_start_f435/examples/tmr/pwm_output_tmr10/src/at32f435_437_int.c index 9701f4b4..87f6d2a1 100644 --- a/project/at_start_f435/examples/tmr/pwm_output_tmr10/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/tmr/pwm_output_tmr10/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/pwm_output_tmr10/src/main.c b/project/at_start_f435/examples/tmr/pwm_output_tmr10/src/main.c index ab231554..e5460131 100644 --- a/project/at_start_f435/examples/tmr/pwm_output_tmr10/src/main.c +++ b/project/at_start_f435/examples/tmr/pwm_output_tmr10/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/pwm_output_tmr3/inc/at32f435_437_clock.h b/project/at_start_f435/examples/tmr/pwm_output_tmr3/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/tmr/pwm_output_tmr3/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/tmr/pwm_output_tmr3/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/pwm_output_tmr3/inc/at32f435_437_conf.h b/project/at_start_f435/examples/tmr/pwm_output_tmr3/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/tmr/pwm_output_tmr3/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/tmr/pwm_output_tmr3/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/pwm_output_tmr3/inc/at32f435_437_int.h b/project/at_start_f435/examples/tmr/pwm_output_tmr3/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/tmr/pwm_output_tmr3/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/tmr/pwm_output_tmr3/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/pwm_output_tmr3/readme.txt b/project/at_start_f435/examples/tmr/pwm_output_tmr3/readme.txt index 7e0b44dd..89a627ea 100644 --- a/project/at_start_f435/examples/tmr/pwm_output_tmr3/readme.txt +++ b/project/at_start_f435/examples/tmr/pwm_output_tmr3/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/tmr/pwm_output_tmr3/src/at32f435_437_clock.c b/project/at_start_f435/examples/tmr/pwm_output_tmr3/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/tmr/pwm_output_tmr3/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/tmr/pwm_output_tmr3/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/pwm_output_tmr3/src/at32f435_437_int.c b/project/at_start_f435/examples/tmr/pwm_output_tmr3/src/at32f435_437_int.c index 1bb5e924..52b9d253 100644 --- a/project/at_start_f435/examples/tmr/pwm_output_tmr3/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/tmr/pwm_output_tmr3/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/pwm_output_tmr3/src/main.c b/project/at_start_f435/examples/tmr/pwm_output_tmr3/src/main.c index 723cb8db..381b2e08 100644 --- a/project/at_start_f435/examples/tmr/pwm_output_tmr3/src/main.c +++ b/project/at_start_f435/examples/tmr/pwm_output_tmr3/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/timer_base/inc/at32f435_437_clock.h b/project/at_start_f435/examples/tmr/timer_base/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/tmr/timer_base/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/tmr/timer_base/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/timer_base/inc/at32f435_437_conf.h b/project/at_start_f435/examples/tmr/timer_base/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/tmr/timer_base/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/tmr/timer_base/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/timer_base/inc/at32f435_437_int.h b/project/at_start_f435/examples/tmr/timer_base/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/tmr/timer_base/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/tmr/timer_base/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/timer_base/readme.txt b/project/at_start_f435/examples/tmr/timer_base/readme.txt index 4f8211d8..db9240ef 100644 --- a/project/at_start_f435/examples/tmr/timer_base/readme.txt +++ b/project/at_start_f435/examples/tmr/timer_base/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/tmr/timer_base/src/at32f435_437_clock.c b/project/at_start_f435/examples/tmr/timer_base/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/tmr/timer_base/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/tmr/timer_base/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/timer_base/src/at32f435_437_int.c b/project/at_start_f435/examples/tmr/timer_base/src/at32f435_437_int.c index 7c0f8ba9..b5255ab3 100644 --- a/project/at_start_f435/examples/tmr/timer_base/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/tmr/timer_base/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/timer_base/src/main.c b/project/at_start_f435/examples/tmr/timer_base/src/main.c index 613d3ccd..fa31511b 100644 --- a/project/at_start_f435/examples/tmr/timer_base/src/main.c +++ b/project/at_start_f435/examples/tmr/timer_base/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/tmr1_synchro/inc/at32f435_437_clock.h b/project/at_start_f435/examples/tmr/tmr1_synchro/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/tmr/tmr1_synchro/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/tmr/tmr1_synchro/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/tmr1_synchro/inc/at32f435_437_conf.h b/project/at_start_f435/examples/tmr/tmr1_synchro/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/tmr/tmr1_synchro/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/tmr/tmr1_synchro/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/tmr1_synchro/inc/at32f435_437_int.h b/project/at_start_f435/examples/tmr/tmr1_synchro/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/tmr/tmr1_synchro/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/tmr/tmr1_synchro/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/tmr1_synchro/readme.txt b/project/at_start_f435/examples/tmr/tmr1_synchro/readme.txt index 5e3229e9..7365e955 100644 --- a/project/at_start_f435/examples/tmr/tmr1_synchro/readme.txt +++ b/project/at_start_f435/examples/tmr/tmr1_synchro/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/tmr/tmr1_synchro/src/at32f435_437_clock.c b/project/at_start_f435/examples/tmr/tmr1_synchro/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/tmr/tmr1_synchro/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/tmr/tmr1_synchro/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/tmr1_synchro/src/at32f435_437_int.c b/project/at_start_f435/examples/tmr/tmr1_synchro/src/at32f435_437_int.c index abc35635..119902c7 100644 --- a/project/at_start_f435/examples/tmr/tmr1_synchro/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/tmr/tmr1_synchro/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/tmr1_synchro/src/main.c b/project/at_start_f435/examples/tmr/tmr1_synchro/src/main.c index bb235347..674cbc48 100644 --- a/project/at_start_f435/examples/tmr/tmr1_synchro/src/main.c +++ b/project/at_start_f435/examples/tmr/tmr1_synchro/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/tmr2_32bit/inc/at32f435_437_clock.h b/project/at_start_f435/examples/tmr/tmr2_32bit/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/tmr/tmr2_32bit/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/tmr/tmr2_32bit/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/tmr2_32bit/inc/at32f435_437_conf.h b/project/at_start_f435/examples/tmr/tmr2_32bit/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/tmr/tmr2_32bit/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/tmr/tmr2_32bit/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/tmr2_32bit/inc/at32f435_437_int.h b/project/at_start_f435/examples/tmr/tmr2_32bit/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/tmr/tmr2_32bit/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/tmr/tmr2_32bit/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/tmr2_32bit/readme.txt b/project/at_start_f435/examples/tmr/tmr2_32bit/readme.txt index 53ea3657..ae2e1756 100644 --- a/project/at_start_f435/examples/tmr/tmr2_32bit/readme.txt +++ b/project/at_start_f435/examples/tmr/tmr2_32bit/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/tmr/tmr2_32bit/src/at32f435_437_clock.c b/project/at_start_f435/examples/tmr/tmr2_32bit/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/tmr/tmr2_32bit/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/tmr/tmr2_32bit/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/tmr2_32bit/src/at32f435_437_int.c b/project/at_start_f435/examples/tmr/tmr2_32bit/src/at32f435_437_int.c index d3be653f..322b88ad 100644 --- a/project/at_start_f435/examples/tmr/tmr2_32bit/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/tmr/tmr2_32bit/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/tmr/tmr2_32bit/src/main.c b/project/at_start_f435/examples/tmr/tmr2_32bit/src/main.c index 157a0eaf..e45d1bb3 100644 --- a/project/at_start_f435/examples/tmr/tmr2_32bit/src/main.c +++ b/project/at_start_f435/examples/tmr/tmr2_32bit/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usart/half_duplex/inc/at32f435_437_clock.h b/project/at_start_f435/examples/usart/half_duplex/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/usart/half_duplex/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/usart/half_duplex/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usart/half_duplex/inc/at32f435_437_conf.h b/project/at_start_f435/examples/usart/half_duplex/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/usart/half_duplex/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/usart/half_duplex/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usart/half_duplex/inc/at32f435_437_int.h b/project/at_start_f435/examples/usart/half_duplex/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/usart/half_duplex/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/usart/half_duplex/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usart/half_duplex/readme.txt b/project/at_start_f435/examples/usart/half_duplex/readme.txt index 706ade6b..3c973643 100644 --- a/project/at_start_f435/examples/usart/half_duplex/readme.txt +++ b/project/at_start_f435/examples/usart/half_duplex/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/usart/half_duplex/src/at32f435_437_clock.c b/project/at_start_f435/examples/usart/half_duplex/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/usart/half_duplex/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/usart/half_duplex/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usart/half_duplex/src/at32f435_437_int.c b/project/at_start_f435/examples/usart/half_duplex/src/at32f435_437_int.c index f6caf3f9..ade2e6eb 100644 --- a/project/at_start_f435/examples/usart/half_duplex/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/usart/half_duplex/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usart/half_duplex/src/main.c b/project/at_start_f435/examples/usart/half_duplex/src/main.c index f9216194..f8c58b7b 100644 --- a/project/at_start_f435/examples/usart/half_duplex/src/main.c +++ b/project/at_start_f435/examples/usart/half_duplex/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usart/hw_flow_control/inc/at32f435_437_clock.h b/project/at_start_f435/examples/usart/hw_flow_control/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/usart/hw_flow_control/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/usart/hw_flow_control/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usart/hw_flow_control/inc/at32f435_437_conf.h b/project/at_start_f435/examples/usart/hw_flow_control/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/usart/hw_flow_control/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/usart/hw_flow_control/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usart/hw_flow_control/inc/at32f435_437_int.h b/project/at_start_f435/examples/usart/hw_flow_control/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/usart/hw_flow_control/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/usart/hw_flow_control/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usart/hw_flow_control/readme.txt b/project/at_start_f435/examples/usart/hw_flow_control/readme.txt index a405fcae..d7f04be1 100644 --- a/project/at_start_f435/examples/usart/hw_flow_control/readme.txt +++ b/project/at_start_f435/examples/usart/hw_flow_control/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/usart/hw_flow_control/src/at32f435_437_clock.c b/project/at_start_f435/examples/usart/hw_flow_control/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/usart/hw_flow_control/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/usart/hw_flow_control/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usart/hw_flow_control/src/at32f435_437_int.c b/project/at_start_f435/examples/usart/hw_flow_control/src/at32f435_437_int.c index 1d779fce..762f9408 100644 --- a/project/at_start_f435/examples/usart/hw_flow_control/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/usart/hw_flow_control/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usart/hw_flow_control/src/main.c b/project/at_start_f435/examples/usart/hw_flow_control/src/main.c index fe797ed0..c536c88c 100644 --- a/project/at_start_f435/examples/usart/hw_flow_control/src/main.c +++ b/project/at_start_f435/examples/usart/hw_flow_control/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usart/idle_detection/inc/at32f435_437_clock.h b/project/at_start_f435/examples/usart/idle_detection/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/usart/idle_detection/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/usart/idle_detection/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usart/idle_detection/inc/at32f435_437_conf.h b/project/at_start_f435/examples/usart/idle_detection/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/usart/idle_detection/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/usart/idle_detection/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usart/idle_detection/inc/at32f435_437_int.h b/project/at_start_f435/examples/usart/idle_detection/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/usart/idle_detection/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/usart/idle_detection/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usart/idle_detection/readme.txt b/project/at_start_f435/examples/usart/idle_detection/readme.txt index 3a126c9b..cd5f70c9 100644 --- a/project/at_start_f435/examples/usart/idle_detection/readme.txt +++ b/project/at_start_f435/examples/usart/idle_detection/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/usart/idle_detection/src/at32f435_437_clock.c b/project/at_start_f435/examples/usart/idle_detection/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/usart/idle_detection/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/usart/idle_detection/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usart/idle_detection/src/at32f435_437_int.c b/project/at_start_f435/examples/usart/idle_detection/src/at32f435_437_int.c index 6e273ad2..1fb4ca95 100644 --- a/project/at_start_f435/examples/usart/idle_detection/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/usart/idle_detection/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usart/idle_detection/src/main.c b/project/at_start_f435/examples/usart/idle_detection/src/main.c index 18779cd8..34c7babc 100644 --- a/project/at_start_f435/examples/usart/idle_detection/src/main.c +++ b/project/at_start_f435/examples/usart/idle_detection/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usart/interrupt/inc/at32f435_437_clock.h b/project/at_start_f435/examples/usart/interrupt/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/usart/interrupt/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/usart/interrupt/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usart/interrupt/inc/at32f435_437_conf.h b/project/at_start_f435/examples/usart/interrupt/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/usart/interrupt/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/usart/interrupt/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usart/interrupt/inc/at32f435_437_int.h b/project/at_start_f435/examples/usart/interrupt/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/usart/interrupt/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/usart/interrupt/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usart/interrupt/readme.txt b/project/at_start_f435/examples/usart/interrupt/readme.txt index 15ab6f03..03a3d23d 100644 --- a/project/at_start_f435/examples/usart/interrupt/readme.txt +++ b/project/at_start_f435/examples/usart/interrupt/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/usart/interrupt/src/at32f435_437_clock.c b/project/at_start_f435/examples/usart/interrupt/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/usart/interrupt/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/usart/interrupt/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usart/interrupt/src/at32f435_437_int.c b/project/at_start_f435/examples/usart/interrupt/src/at32f435_437_int.c index 064ca871..e0cc64a8 100644 --- a/project/at_start_f435/examples/usart/interrupt/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/usart/interrupt/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usart/interrupt/src/main.c b/project/at_start_f435/examples/usart/interrupt/src/main.c index 3ba08401..fe89d9f7 100644 --- a/project/at_start_f435/examples/usart/interrupt/src/main.c +++ b/project/at_start_f435/examples/usart/interrupt/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usart/irda/inc/at32f435_437_clock.h b/project/at_start_f435/examples/usart/irda/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/usart/irda/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/usart/irda/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usart/irda/inc/at32f435_437_conf.h b/project/at_start_f435/examples/usart/irda/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/usart/irda/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/usart/irda/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usart/irda/inc/at32f435_437_int.h b/project/at_start_f435/examples/usart/irda/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/usart/irda/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/usart/irda/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usart/irda/readme.txt b/project/at_start_f435/examples/usart/irda/readme.txt index 8abf3a1d..46bd3608 100644 --- a/project/at_start_f435/examples/usart/irda/readme.txt +++ b/project/at_start_f435/examples/usart/irda/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/usart/irda/src/at32f435_437_clock.c b/project/at_start_f435/examples/usart/irda/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/usart/irda/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/usart/irda/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usart/irda/src/at32f435_437_int.c b/project/at_start_f435/examples/usart/irda/src/at32f435_437_int.c index 9a40fb93..a3eca897 100644 --- a/project/at_start_f435/examples/usart/irda/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/usart/irda/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usart/irda/src/main.c b/project/at_start_f435/examples/usart/irda/src/main.c index c694817a..4cf40c42 100644 --- a/project/at_start_f435/examples/usart/irda/src/main.c +++ b/project/at_start_f435/examples/usart/irda/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usart/polling/inc/at32f435_437_clock.h b/project/at_start_f435/examples/usart/polling/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/usart/polling/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/usart/polling/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usart/polling/inc/at32f435_437_conf.h b/project/at_start_f435/examples/usart/polling/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/usart/polling/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/usart/polling/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usart/polling/inc/at32f435_437_int.h b/project/at_start_f435/examples/usart/polling/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/usart/polling/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/usart/polling/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usart/polling/readme.txt b/project/at_start_f435/examples/usart/polling/readme.txt index 3fc558c5..707f960c 100644 --- a/project/at_start_f435/examples/usart/polling/readme.txt +++ b/project/at_start_f435/examples/usart/polling/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/usart/polling/src/at32f435_437_clock.c b/project/at_start_f435/examples/usart/polling/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/usart/polling/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/usart/polling/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usart/polling/src/at32f435_437_int.c b/project/at_start_f435/examples/usart/polling/src/at32f435_437_int.c index f2b44b48..6c229625 100644 --- a/project/at_start_f435/examples/usart/polling/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/usart/polling/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usart/polling/src/main.c b/project/at_start_f435/examples/usart/polling/src/main.c index 1260c86a..02b7d06f 100644 --- a/project/at_start_f435/examples/usart/polling/src/main.c +++ b/project/at_start_f435/examples/usart/polling/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usart/printf/inc/at32f435_437_clock.h b/project/at_start_f435/examples/usart/printf/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/usart/printf/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/usart/printf/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usart/printf/inc/at32f435_437_conf.h b/project/at_start_f435/examples/usart/printf/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/usart/printf/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/usart/printf/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usart/printf/inc/at32f435_437_int.h b/project/at_start_f435/examples/usart/printf/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/usart/printf/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/usart/printf/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usart/printf/readme.txt b/project/at_start_f435/examples/usart/printf/readme.txt index f0d118e0..7bab9776 100644 --- a/project/at_start_f435/examples/usart/printf/readme.txt +++ b/project/at_start_f435/examples/usart/printf/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/usart/printf/src/at32f435_437_clock.c b/project/at_start_f435/examples/usart/printf/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/usart/printf/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/usart/printf/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usart/printf/src/at32f435_437_int.c b/project/at_start_f435/examples/usart/printf/src/at32f435_437_int.c index 23b318f0..328c1302 100644 --- a/project/at_start_f435/examples/usart/printf/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/usart/printf/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usart/printf/src/main.c b/project/at_start_f435/examples/usart/printf/src/main.c index d8a3dca3..45a36a52 100644 --- a/project/at_start_f435/examples/usart/printf/src/main.c +++ b/project/at_start_f435/examples/usart/printf/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usart/receiver_mute/inc/at32f435_437_clock.h b/project/at_start_f435/examples/usart/receiver_mute/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/usart/receiver_mute/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/usart/receiver_mute/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usart/receiver_mute/inc/at32f435_437_conf.h b/project/at_start_f435/examples/usart/receiver_mute/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/usart/receiver_mute/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/usart/receiver_mute/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usart/receiver_mute/inc/at32f435_437_int.h b/project/at_start_f435/examples/usart/receiver_mute/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/usart/receiver_mute/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/usart/receiver_mute/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usart/receiver_mute/readme.txt b/project/at_start_f435/examples/usart/receiver_mute/readme.txt index 025d3313..1518b7e1 100644 --- a/project/at_start_f435/examples/usart/receiver_mute/readme.txt +++ b/project/at_start_f435/examples/usart/receiver_mute/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/usart/receiver_mute/src/at32f435_437_clock.c b/project/at_start_f435/examples/usart/receiver_mute/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/usart/receiver_mute/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/usart/receiver_mute/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usart/receiver_mute/src/at32f435_437_int.c b/project/at_start_f435/examples/usart/receiver_mute/src/at32f435_437_int.c index 914e57d1..0b9082b5 100644 --- a/project/at_start_f435/examples/usart/receiver_mute/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/usart/receiver_mute/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usart/receiver_mute/src/main.c b/project/at_start_f435/examples/usart/receiver_mute/src/main.c index 9fc51ed5..604cdcb4 100644 --- a/project/at_start_f435/examples/usart/receiver_mute/src/main.c +++ b/project/at_start_f435/examples/usart/receiver_mute/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usart/rs485/inc/at32f435_437_clock.h b/project/at_start_f435/examples/usart/rs485/inc/at32f435_437_clock.h new file mode 100644 index 00000000..f2644edd --- /dev/null +++ b/project/at_start_f435/examples/usart/rs485/inc/at32f435_437_clock.h @@ -0,0 +1,46 @@ +/** + ************************************************************************** + * @file at32f435_437_clock.h + * @version v2.0.9 + * @date 2022-06-28 + * @brief header file of clock program + ************************************************************************** + * Copyright notice & Disclaimer + * + * The software Board Support Package (BSP) that is made available to + * download from Artery official website is the copyrighted work of Artery. + * Artery authorizes customers to use, copy, and distribute the BSP + * software and its related documentation for the purpose of design and + * development in conjunction with Artery microcontrollers. Use of the + * software is governed by this copyright notice and the following disclaimer. + * + * THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, + * GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, + * TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR + * STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, + * INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. + * + ************************************************************************** + */ + +/* define to prevent recursive inclusion -------------------------------------*/ +#ifndef __AT32F435_437_CLOCK_H +#define __AT32F435_437_CLOCK_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* includes ------------------------------------------------------------------*/ +#include "at32f435_437.h" + +/* exported functions ------------------------------------------------------- */ +void system_clock_config(void); + +#ifdef __cplusplus +} +#endif + +#endif + diff --git a/project/at_start_f435/examples/usart/rs485/inc/at32f435_437_conf.h b/project/at_start_f435/examples/usart/rs485/inc/at32f435_437_conf.h new file mode 100644 index 00000000..2f0db200 --- /dev/null +++ b/project/at_start_f435/examples/usart/rs485/inc/at32f435_437_conf.h @@ -0,0 +1,174 @@ +/** + ************************************************************************** + * @file at32f435_437_conf.h + * @version v2.0.9 + * @date 2022-06-28 + * @brief at32f435_437 config header file + ************************************************************************** + * Copyright notice & Disclaimer + * + * The software Board Support Package (BSP) that is made available to + * download from Artery official website is the copyrighted work of Artery. + * Artery authorizes customers to use, copy, and distribute the BSP + * software and its related documentation for the purpose of design and + * development in conjunction with Artery microcontrollers. Use of the + * software is governed by this copyright notice and the following disclaimer. + * + * THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, + * GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, + * TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR + * STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, + * INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. + * + ************************************************************************** + */ + +/* define to prevent recursive inclusion -------------------------------------*/ +#ifndef __AT32F435_437_CONF_H +#define __AT32F435_437_CONF_H + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @brief in the following line adjust the value of high speed exernal crystal (hext) + * used in your application + * + * tip: to avoid modifying this file each time you need to use different hext, you + * can define the hext value in your toolchain compiler preprocessor. + * + */ +#if !defined HEXT_VALUE +#define HEXT_VALUE ((uint32_t)8000000) /*!< value of the high speed exernal crystal in hz */ +#endif + +/** + * @brief in the following line adjust the high speed exernal crystal (hext) startup + * timeout value + */ +#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000) /*!< time out for hext start up */ +#define HICK_VALUE ((uint32_t)8000000) /*!< value of the high speed internal clock in hz */ + +/* module define -------------------------------------------------------------*/ +#define CRM_MODULE_ENABLED +#define TMR_MODULE_ENABLED +#define ERTC_MODULE_ENABLED +#define GPIO_MODULE_ENABLED +#define I2C_MODULE_ENABLED +#define USART_MODULE_ENABLED +#define PWC_MODULE_ENABLED +#define CAN_MODULE_ENABLED +#define ADC_MODULE_ENABLED +#define DAC_MODULE_ENABLED +#define SPI_MODULE_ENABLED +#define EDMA_MODULE_ENABLED +#define DMA_MODULE_ENABLED +#define DEBUG_MODULE_ENABLED +#define FLASH_MODULE_ENABLED +#define CRC_MODULE_ENABLED +#define WWDT_MODULE_ENABLED +#define WDT_MODULE_ENABLED +#define EXINT_MODULE_ENABLED +#define SDIO_MODULE_ENABLED +#define XMC_MODULE_ENABLED +#define USB_MODULE_ENABLED +#define ACC_MODULE_ENABLED +#define MISC_MODULE_ENABLED +#define QSPI_MODULE_ENABLED +#define DVP_MODULE_ENABLED +#define SCFG_MODULE_ENABLED +#define EMAC_MODULE_ENABLED + +/* includes ------------------------------------------------------------------*/ +#ifdef CRM_MODULE_ENABLED +#include "at32f435_437_crm.h" +#endif +#ifdef TMR_MODULE_ENABLED +#include "at32f435_437_tmr.h" +#endif +#ifdef ERTC_MODULE_ENABLED +#include "at32f435_437_ertc.h" +#endif +#ifdef GPIO_MODULE_ENABLED +#include "at32f435_437_gpio.h" +#endif +#ifdef I2C_MODULE_ENABLED +#include "at32f435_437_i2c.h" +#endif +#ifdef USART_MODULE_ENABLED +#include "at32f435_437_usart.h" +#endif +#ifdef PWC_MODULE_ENABLED +#include "at32f435_437_pwc.h" +#endif +#ifdef CAN_MODULE_ENABLED +#include "at32f435_437_can.h" +#endif +#ifdef ADC_MODULE_ENABLED +#include "at32f435_437_adc.h" +#endif +#ifdef DAC_MODULE_ENABLED +#include "at32f435_437_dac.h" +#endif +#ifdef SPI_MODULE_ENABLED +#include "at32f435_437_spi.h" +#endif +#ifdef DMA_MODULE_ENABLED +#include "at32f435_437_dma.h" +#endif +#ifdef DEBUG_MODULE_ENABLED +#include "at32f435_437_debug.h" +#endif +#ifdef FLASH_MODULE_ENABLED +#include "at32f435_437_flash.h" +#endif +#ifdef CRC_MODULE_ENABLED +#include "at32f435_437_crc.h" +#endif +#ifdef WWDT_MODULE_ENABLED +#include "at32f435_437_wwdt.h" +#endif +#ifdef WDT_MODULE_ENABLED +#include "at32f435_437_wdt.h" +#endif +#ifdef EXINT_MODULE_ENABLED +#include "at32f435_437_exint.h" +#endif +#ifdef SDIO_MODULE_ENABLED +#include "at32f435_437_sdio.h" +#endif +#ifdef XMC_MODULE_ENABLED +#include "at32f435_437_xmc.h" +#endif +#ifdef ACC_MODULE_ENABLED +#include "at32f435_437_acc.h" +#endif +#ifdef MISC_MODULE_ENABLED +#include "at32f435_437_misc.h" +#endif +#ifdef EDMA_MODULE_ENABLED +#include "at32f435_437_edma.h" +#endif +#ifdef QSPI_MODULE_ENABLED +#include "at32f435_437_qspi.h" +#endif +#ifdef SCFG_MODULE_ENABLED +#include "at32f435_437_scfg.h" +#endif +#ifdef EMAC_MODULE_ENABLED +#include "at32f435_437_emac.h" +#endif +#ifdef DVP_MODULE_ENABLED +#include "at32f435_437_dvp.h" +#endif +#ifdef USB_MODULE_ENABLED +#include "at32f435_437_usb.h" +#endif + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/project/at_start_f435/examples/usart/rs485/inc/at32f435_437_int.h b/project/at_start_f435/examples/usart/rs485/inc/at32f435_437_int.h new file mode 100644 index 00000000..61f0c193 --- /dev/null +++ b/project/at_start_f435/examples/usart/rs485/inc/at32f435_437_int.h @@ -0,0 +1,58 @@ +/** + ************************************************************************** + * @file at32f435_437_int.h + * @version v2.0.9 + * @date 2022-06-28 + * @brief header file of main interrupt service routines. + ************************************************************************** + * Copyright notice & Disclaimer + * + * The software Board Support Package (BSP) that is made available to + * download from Artery official website is the copyrighted work of Artery. + * Artery authorizes customers to use, copy, and distribute the BSP + * software and its related documentation for the purpose of design and + * development in conjunction with Artery microcontrollers. Use of the + * software is governed by this copyright notice and the following disclaimer. + * + * THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, + * GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, + * TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR + * STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, + * INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. + * + ************************************************************************** + */ + +/* define to prevent recursive inclusion -------------------------------------*/ +#ifndef __AT32F435_437_INT_H +#define __AT32F435_437_INT_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* includes ------------------------------------------------------------------*/ +#include "at32f435_437.h" + +/* exported types ------------------------------------------------------------*/ +/* exported constants --------------------------------------------------------*/ +/* exported macro ------------------------------------------------------------*/ +/* exported functions ------------------------------------------------------- */ + +void NMI_Handler(void); +void HardFault_Handler(void); +void MemManage_Handler(void); +void BusFault_Handler(void); +void UsageFault_Handler(void); +void SVC_Handler(void); +void DebugMon_Handler(void); +void PendSV_Handler(void); +void SysTick_Handler(void); + +#ifdef __cplusplus +} +#endif + +#endif + diff --git a/project/at_start_f435/examples/usart/rs485/mdk_v5/rs485.uvoptx b/project/at_start_f435/examples/usart/rs485/mdk_v5/rs485.uvoptx new file mode 100644 index 00000000..28bb34c1 --- /dev/null +++ b/project/at_start_f435/examples/usart/rs485/mdk_v5/rs485.uvoptx @@ -0,0 +1,344 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj; *.o + *.lib + *.txt; *.h; *.inc + *.plm + *.cpp + 0 + + + + 0 + 0 + + + + rs485 + 0x4 + ARM-ADS + + 12000000 + + 0 + 1 + 0 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\listings\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 0 + 0 + 1 + + 0 + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 0 + + + + + + + + + + + BIN\CMSIS_AGDI.dll + + + + 0 + UL2CM3 + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0AT32F435_4032 -FS08000000 -FL03F0000 -FP0($$Device:-AT32F435ZMT7$Flash\AT32F435_4032.FLM)) + + + + + 0 + + + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + 0 + 0 + 0 + + + + + + + + + + + + + user + 0 + 0 + 0 + 0 + + 1 + 1 + 1 + 0 + 0 + 0 + ..\src\at32f435_437_clock.c + at32f435_437_clock.c + 0 + 0 + + + 1 + 2 + 1 + 0 + 0 + 0 + ..\src\at32f435_437_int.c + at32f435_437_int.c + 0 + 0 + + + 1 + 3 + 1 + 0 + 0 + 0 + ..\src\main.c + main.c + 0 + 0 + + + + + bsp + 0 + 0 + 0 + 0 + + 2 + 4 + 1 + 0 + 0 + 0 + ..\..\..\..\..\at32f435_437_board\at32f435_437_board.c + at32f435_437_board.c + 0 + 0 + + + + + firmware + 0 + 0 + 0 + 0 + + 3 + 5 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_gpio.c + at32f435_437_gpio.c + 0 + 0 + + + 3 + 6 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_misc.c + at32f435_437_misc.c + 0 + 0 + + + 3 + 7 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_crm.c + at32f435_437_crm.c + 0 + 0 + + + 3 + 8 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_usart.c + at32f435_437_usart.c + 0 + 0 + + + + + cmsis + 0 + 0 + 0 + 0 + + 4 + 9 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\libraries\cmsis\cm4\device_support\system_at32f435_437.c + system_at32f435_437.c + 0 + 0 + + + 4 + 10 + 2 + 0 + 0 + 0 + ..\..\..\..\..\..\libraries\cmsis\cm4\device_support\startup\mdk\startup_at32f435_437.s + startup_at32f435_437.s + 0 + 0 + + + + + readme + 0 + 0 + 0 + 0 + + 5 + 11 + 5 + 0 + 0 + 0 + ..\readme.txt + readme.txt + 0 + 0 + + + + diff --git a/project/at_start_f435/examples/usart/rs485/mdk_v5/rs485.uvprojx b/project/at_start_f435/examples/usart/rs485/mdk_v5/rs485.uvprojx new file mode 100644 index 00000000..6a59ecef --- /dev/null +++ b/project/at_start_f435/examples/usart/rs485/mdk_v5/rs485.uvprojx @@ -0,0 +1,487 @@ + + + + 2.1 + +
### uVision Project, (C) Keil Software
+ + + + rs485 + 0x4 + ARM-ADS + 5060750::V5.06 update 6 (build 750)::ARMCC + 0 + + + -AT32F435ZMT7 + ArteryTek + ArteryTek.AT32F435_437_DFP.2.0.1 + IRAM(0x20000000,0x60000) IROM(0x08000000,0x3F0000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0AT32F435_4032 -FS08000000 -FL03F0000 -FP0($$Device:-AT32F435ZMT7$Flash\AT32F435_4032.FLM)) + 0 + $$Device:- + + + + + + + + + + $$Device:-AT32F435ZMT7$SVD\AT32F435xx_v2.svd + 0 + 0 + + + + AT32F435ZMT7$Device\Include\at32f435_437.h\ + AT32F435ZMT7$Device\Include\at32f435_437.h\ + + 0 + 0 + 0 + 0 + 1 + + .\objects\ + rs485 + 1 + 0 + 1 + 1 + 1 + .\listings\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 0 + + + SARMCM3.DLL + -REMAP -MPU + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM4 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 1 + 4096 + + 1 + BIN\UL2CM3.DLL + "" () + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M4" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 2 + 0 + 0 + 0 + 0 + 8 + 0 + 0 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x60000 + + + 1 + 0x8000000 + 0x3f0000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x8000000 + 0x3f0000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x60000 + + + 0 + 0x0 + 0x0 + + + + + + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 0 + + + AT32F435ZMT7,USE_STDPERIPH_DRIVER,AT_START_F435_V1 + + ..\inc;..\..\..\..\..\at32f435_437_board;..\..\..\..\..\..\middlewares\i2c_application_library;..\..\..\..\..\..\libraries\cmsis\cm4\core_support;..\..\..\..\..\..\libraries\cmsis\cm4\device_support;..\..\..\..\..\..\libraries\drivers\inc + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 4 + + + + + + + + + 1 + 0 + 0 + 0 + 1 + 0 + 0x08000000 + 0x20000000 + + + + + + + + + + + + + user + + + at32f435_437_clock.c + 1 + ..\src\at32f435_437_clock.c + + + at32f435_437_int.c + 1 + ..\src\at32f435_437_int.c + + + main.c + 1 + ..\src\main.c + + + + + bsp + + + at32f435_437_board.c + 1 + ..\..\..\..\..\at32f435_437_board\at32f435_437_board.c + + + + + firmware + + + at32f435_437_gpio.c + 1 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_gpio.c + + + at32f435_437_misc.c + 1 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_misc.c + + + at32f435_437_crm.c + 1 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_crm.c + + + at32f435_437_usart.c + 1 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_usart.c + + + + + cmsis + + + system_at32f435_437.c + 1 + ..\..\..\..\..\..\libraries\cmsis\cm4\device_support\system_at32f435_437.c + + + startup_at32f435_437.s + 2 + ..\..\..\..\..\..\libraries\cmsis\cm4\device_support\startup\mdk\startup_at32f435_437.s + + + + + readme + + + readme.txt + 5 + ..\readme.txt + + + + + + + + + + + + + + + + + <Project Info> + + + + + + 0 + 1 + + + + + diff --git a/project/at_start_f435/examples/usart/rs485/readme.txt b/project/at_start_f435/examples/usart/rs485/readme.txt new file mode 100644 index 00000000..30dc3784 --- /dev/null +++ b/project/at_start_f435/examples/usart/rs485/readme.txt @@ -0,0 +1,17 @@ +/** + ************************************************************************** + * @file readme.txt + * @version v2.0.9 + * @date 2022-06-28 + * @brief readme + ************************************************************************** + */ + + this demo is based on the at-start board and AT32-Comm-EV, in this demo, + shows how to use usart to achieve rs485 communication. + + set-up + - usart tx ---> pa2 + - usart rx ---> pa3 + - usart de ---> pa1 + \ No newline at end of file diff --git a/project/at_start_f435/examples/usart/rs485/src/at32f435_437_clock.c b/project/at_start_f435/examples/usart/rs485/src/at32f435_437_clock.c new file mode 100644 index 00000000..0d66e712 --- /dev/null +++ b/project/at_start_f435/examples/usart/rs485/src/at32f435_437_clock.c @@ -0,0 +1,106 @@ +/** + ************************************************************************** + * @file at32f435_437_clock.c + * @version v2.0.9 + * @date 2022-06-28 + * @brief system clock config program + ************************************************************************** + * Copyright notice & Disclaimer + * + * The software Board Support Package (BSP) that is made available to + * download from Artery official website is the copyrighted work of Artery. + * Artery authorizes customers to use, copy, and distribute the BSP + * software and its related documentation for the purpose of design and + * development in conjunction with Artery microcontrollers. Use of the + * software is governed by this copyright notice and the following disclaimer. + * + * THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, + * GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, + * TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR + * STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, + * INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. + * + ************************************************************************** + */ + +/* includes ------------------------------------------------------------------*/ +#include "at32f435_437_clock.h" + +/** + * @brief system clock config program + * @note the system clock is configured as follow: + * - system clock = (hext * pll_ns)/(pll_ms * pll_fr) + * - system clock source = pll (hext) + * - hext = 8000000 + * - sclk = 288000000 + * - ahbdiv = 1 + * - ahbclk = 288000000 + * - apb2div = 2 + * - apb2clk = 144000000 + * - apb1div = 2 + * - apb1clk = 144000000 + * - pll_ns = 72 + * - pll_ms = 1 + * - pll_fr = 2 + * @param none + * @retval none + */ +void system_clock_config(void) +{ + /* enable pwc periph clock */ + crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE); + + /* config ldo voltage */ + pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3); + + /* set the flash clock divider */ + flash_clock_divider_set(FLASH_CLOCK_DIV_3); + + /* reset crm */ + crm_reset(); + + crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE); + + /* wait till hext is ready */ + while(crm_hext_stable_wait() == ERROR) + { + } + + /* config pll clock resource */ + crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2); + + /* enable pll */ + crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE); + + /* wait till pll is ready */ + while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET) + { + } + + /* config ahbclk */ + crm_ahb_div_set(CRM_AHB_DIV_1); + + /* config apb2clk */ + crm_apb2_div_set(CRM_APB2_DIV_2); + + /* config apb1clk */ + crm_apb1_div_set(CRM_APB1_DIV_2); + + /* enable auto step mode */ + crm_auto_step_mode_enable(TRUE); + + /* select pll as system clock source */ + crm_sysclk_switch(CRM_SCLK_PLL); + + /* wait till pll is used as system clock source */ + while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL) + { + } + + /* disable auto step mode */ + crm_auto_step_mode_enable(FALSE); + + /* update system_core_clock global variable */ + system_core_clock_update(); +} diff --git a/project/at_start_f435/examples/usart/rs485/src/at32f435_437_int.c b/project/at_start_f435/examples/usart/rs485/src/at32f435_437_int.c new file mode 100644 index 00000000..06f3b35f --- /dev/null +++ b/project/at_start_f435/examples/usart/rs485/src/at32f435_437_int.c @@ -0,0 +1,141 @@ +/** + ************************************************************************** + * @file at32f435_437_int.c + * @version v2.0.9 + * @date 2022-06-28 + * @brief main interrupt service routines. + ************************************************************************** + * Copyright notice & Disclaimer + * + * The software Board Support Package (BSP) that is made available to + * download from Artery official website is the copyrighted work of Artery. + * Artery authorizes customers to use, copy, and distribute the BSP + * software and its related documentation for the purpose of design and + * development in conjunction with Artery microcontrollers. Use of the + * software is governed by this copyright notice and the following disclaimer. + * + * THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, + * GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, + * TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR + * STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, + * INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. + * + ************************************************************************** + */ + +/* includes ------------------------------------------------------------------*/ +#include "at32f435_437_int.h" + +/** @addtogroup AT32F435_periph_examples + * @{ + */ + +/** @addtogroup 435_USART_rs485 + * @{ + */ + +/** + * @brief this function handles nmi exception. + * @param none + * @retval none + */ +void NMI_Handler(void) +{ +} + +/** + * @brief this function handles hard fault exception. + * @param none + * @retval none + */ +void HardFault_Handler(void) +{ + /* go to infinite loop when hard fault exception occurs */ + while(1) + { + } +} + +/** + * @brief this function handles memory manage exception. + * @param none + * @retval none + */ +void MemManage_Handler(void) +{ + /* go to infinite loop when memory manage exception occurs */ + while(1) + { + } +} + +/** + * @brief this function handles bus fault exception. + * @param none + * @retval none + */ +void BusFault_Handler(void) +{ + /* go to infinite loop when bus fault exception occurs */ + while(1) + { + } +} + +/** + * @brief this function handles usage fault exception. + * @param none + * @retval none + */ +void UsageFault_Handler(void) +{ + /* go to infinite loop when usage fault exception occurs */ + while(1) + { + } +} + +/** + * @brief this function handles svcall exception. + * @param none + * @retval none + */ +void SVC_Handler(void) +{ +} + +/** + * @brief this function handles debug monitor exception. + * @param none + * @retval none + */ +void DebugMon_Handler(void) +{ +} + +/** + * @brief this function handles pendsv_handler exception. + * @param none + * @retval none + */ +void PendSV_Handler(void) +{ +} + +/** + * @brief this function handles systick handler. + * @param none + * @retval none + */ +void SysTick_Handler(void) +{ +} + +/** + * @} + */ + +/** + * @} + */ diff --git a/project/at_start_f435/examples/usart/rs485/src/main.c b/project/at_start_f435/examples/usart/rs485/src/main.c new file mode 100644 index 00000000..b417e7c3 --- /dev/null +++ b/project/at_start_f435/examples/usart/rs485/src/main.c @@ -0,0 +1,161 @@ +/** + ************************************************************************** + * @file main.c + * @version v2.0.9 + * @date 2022-06-28 + * @brief main program + ************************************************************************** + * Copyright notice & Disclaimer + * + * The software Board Support Package (BSP) that is made available to + * download from Artery official website is the copyrighted work of Artery. + * Artery authorizes customers to use, copy, and distribute the BSP + * software and its related documentation for the purpose of design and + * development in conjunction with Artery microcontrollers. Use of the + * software is governed by this copyright notice and the following disclaimer. + * + * THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, + * GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, + * TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR + * STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, + * INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. + * + ************************************************************************** + */ + +#include "at32f435_437_board.h" +#include "at32f435_437_clock.h" + +/** @addtogroup AT32F435_periph_examples + * @{ + */ + +/** @addtogroup 435_USART_rs485 + * @{ + */ + +#define RS485_BAUDRATE 9600 +#define RS485_BUFFER_SIZE 128 + +uint8_t rs485_buffer_rx[RS485_BUFFER_SIZE]; +uint8_t rs485_buffer_rx_cnt = 0; + +/** + * @brief rs485 configiguration. + * @param none + * @retval none + */ +static void rs485_config(void) +{ + gpio_init_type gpio_init_struct; + + /* enable the uart2 and gpio clock */ + crm_periph_clock_enable(CRM_USART2_PERIPH_CLOCK, TRUE); + crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE); + + gpio_default_para_init(&gpio_init_struct); + + /* configure the uart2 tx,rx,de pin */ + gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; + gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_init_struct.gpio_mode = GPIO_MODE_MUX; + gpio_init_struct.gpio_pins = GPIO_PINS_2|GPIO_PINS_3; + gpio_init_struct.gpio_pull = GPIO_PULL_NONE; + gpio_init(GPIOA, &gpio_init_struct); + + gpio_init_struct.gpio_pins = GPIO_PINS_1; + gpio_init_struct.gpio_pull = GPIO_PULL_NONE; + gpio_init(GPIOA, &gpio_init_struct); + + gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE1, GPIO_MUX_7); + gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE2, GPIO_MUX_7); + gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE3, GPIO_MUX_7); + + /* configure uart2 param */ + usart_init(USART2, RS485_BAUDRATE, USART_DATA_8BITS, USART_STOP_1_BIT); + usart_rs485_delay_time_config(USART2, 2, 2); + usart_de_polarity_set(USART2, USART_DE_POLARITY_HIGH); + usart_rs485_mode_enable(USART2, TRUE); + + usart_flag_clear(USART2, USART_RDBF_FLAG); + usart_interrupt_enable(USART2, USART_RDBF_INT, TRUE); + + usart_receiver_enable(USART2, TRUE); + usart_transmitter_enable(USART2, TRUE); + usart_enable(USART2, TRUE); + + nvic_irq_enable(USART2_IRQn, 1, 0); +} + +/** + * @brief rs485 send data + * @param buf: pointer to the buffer that contain the data to be transferred. + * @param cnt: size of buffer in bytes. + * @retval none + */ +static void rs485_send_data(u8* buf, u8 cnt) +{ + while(cnt--){ + while(usart_flag_get(USART2, USART_TDBE_FLAG) == RESET); + usart_data_transmit(USART2, *buf++); + } +} + +/** + * @brief main function. + * @param none + * @retval none + */ +int main(void) +{ + char str[]="start test..\r\n"; + u8 len = 0; + + system_clock_config(); + at32_board_init(); + nvic_priority_group_config(NVIC_PRIORITY_GROUP_4); + + rs485_config(); + + len = sizeof(str); + rs485_send_data((u8*)str, len); + while(1) + { + if(usart_flag_get(USART2, USART_IDLEF_FLAG) != RESET) + { + usart_data_receive(USART2); + usart_interrupt_enable(USART2, USART_RDBF_INT, FALSE); + rs485_send_data(rs485_buffer_rx, rs485_buffer_rx_cnt); + rs485_buffer_rx_cnt = 0; + usart_interrupt_enable(USART2, USART_RDBF_INT, TRUE); + } + } +} + +/** + * @brief usart2 interrupt handler + * @param none + * @retval none + */ +void USART2_IRQHandler(void) +{ + uint16_t tmp; + + if(usart_flag_get(USART2, USART_RDBF_FLAG) != RESET) + { + tmp = usart_data_receive(USART2); + if(rs485_buffer_rx_cnt < RS485_BUFFER_SIZE) + { + rs485_buffer_rx[rs485_buffer_rx_cnt++] = tmp; + } + } +} + +/** + * @} + */ + +/** + * @} + */ diff --git a/project/at_start_f435/examples/usart/smartcard/inc/at32f435_437_clock.h b/project/at_start_f435/examples/usart/smartcard/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/usart/smartcard/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/usart/smartcard/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usart/smartcard/inc/at32f435_437_conf.h b/project/at_start_f435/examples/usart/smartcard/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/usart/smartcard/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/usart/smartcard/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usart/smartcard/inc/at32f435_437_int.h b/project/at_start_f435/examples/usart/smartcard/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/usart/smartcard/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/usart/smartcard/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usart/smartcard/inc/smartcard_config.h b/project/at_start_f435/examples/usart/smartcard/inc/smartcard_config.h index 8c508ccf..b71d786e 100644 --- a/project/at_start_f435/examples/usart/smartcard/inc/smartcard_config.h +++ b/project/at_start_f435/examples/usart/smartcard/inc/smartcard_config.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file smartcard_config.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usart/smartcard/readme.txt b/project/at_start_f435/examples/usart/smartcard/readme.txt index f60ceecf..be9303ca 100644 --- a/project/at_start_f435/examples/usart/smartcard/readme.txt +++ b/project/at_start_f435/examples/usart/smartcard/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/usart/smartcard/src/at32f435_437_clock.c b/project/at_start_f435/examples/usart/smartcard/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/usart/smartcard/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/usart/smartcard/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usart/smartcard/src/at32f435_437_int.c b/project/at_start_f435/examples/usart/smartcard/src/at32f435_437_int.c index 878abd80..258ac035 100644 --- a/project/at_start_f435/examples/usart/smartcard/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/usart/smartcard/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usart/smartcard/src/main.c b/project/at_start_f435/examples/usart/smartcard/src/main.c index 5ff2eab1..76626b3a 100644 --- a/project/at_start_f435/examples/usart/smartcard/src/main.c +++ b/project/at_start_f435/examples/usart/smartcard/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usart/synchronous/inc/at32f435_437_clock.h b/project/at_start_f435/examples/usart/synchronous/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/usart/synchronous/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/usart/synchronous/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usart/synchronous/inc/at32f435_437_conf.h b/project/at_start_f435/examples/usart/synchronous/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/usart/synchronous/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/usart/synchronous/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usart/synchronous/inc/at32f435_437_int.h b/project/at_start_f435/examples/usart/synchronous/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/usart/synchronous/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/usart/synchronous/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usart/synchronous/readme.txt b/project/at_start_f435/examples/usart/synchronous/readme.txt index 1ea7ff0a..9340b437 100644 --- a/project/at_start_f435/examples/usart/synchronous/readme.txt +++ b/project/at_start_f435/examples/usart/synchronous/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/usart/synchronous/src/at32f435_437_clock.c b/project/at_start_f435/examples/usart/synchronous/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/usart/synchronous/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/usart/synchronous/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usart/synchronous/src/at32f435_437_int.c b/project/at_start_f435/examples/usart/synchronous/src/at32f435_437_int.c index 2759d8a7..1c41ce23 100644 --- a/project/at_start_f435/examples/usart/synchronous/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/usart/synchronous/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usart/synchronous/src/main.c b/project/at_start_f435/examples/usart/synchronous/src/main.c index a25aeefb..154ed649 100644 --- a/project/at_start_f435/examples/usart/synchronous/src/main.c +++ b/project/at_start_f435/examples/usart/synchronous/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usart/transfer_by_dma_interrupt/inc/at32f435_437_clock.h b/project/at_start_f435/examples/usart/transfer_by_dma_interrupt/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/usart/transfer_by_dma_interrupt/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/usart/transfer_by_dma_interrupt/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usart/transfer_by_dma_interrupt/inc/at32f435_437_conf.h b/project/at_start_f435/examples/usart/transfer_by_dma_interrupt/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/usart/transfer_by_dma_interrupt/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/usart/transfer_by_dma_interrupt/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usart/transfer_by_dma_interrupt/inc/at32f435_437_int.h b/project/at_start_f435/examples/usart/transfer_by_dma_interrupt/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/usart/transfer_by_dma_interrupt/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/usart/transfer_by_dma_interrupt/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usart/transfer_by_dma_interrupt/readme.txt b/project/at_start_f435/examples/usart/transfer_by_dma_interrupt/readme.txt index 9370606e..b8781a04 100644 --- a/project/at_start_f435/examples/usart/transfer_by_dma_interrupt/readme.txt +++ b/project/at_start_f435/examples/usart/transfer_by_dma_interrupt/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/usart/transfer_by_dma_interrupt/src/at32f435_437_clock.c b/project/at_start_f435/examples/usart/transfer_by_dma_interrupt/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/usart/transfer_by_dma_interrupt/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/usart/transfer_by_dma_interrupt/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usart/transfer_by_dma_interrupt/src/at32f435_437_int.c b/project/at_start_f435/examples/usart/transfer_by_dma_interrupt/src/at32f435_437_int.c index a383f15c..24a204a2 100644 --- a/project/at_start_f435/examples/usart/transfer_by_dma_interrupt/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/usart/transfer_by_dma_interrupt/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usart/transfer_by_dma_interrupt/src/main.c b/project/at_start_f435/examples/usart/transfer_by_dma_interrupt/src/main.c index 8cebf643..d1867fc2 100644 --- a/project/at_start_f435/examples/usart/transfer_by_dma_interrupt/src/main.c +++ b/project/at_start_f435/examples/usart/transfer_by_dma_interrupt/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usart/transfer_by_dma_polling/inc/at32f435_437_clock.h b/project/at_start_f435/examples/usart/transfer_by_dma_polling/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/usart/transfer_by_dma_polling/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/usart/transfer_by_dma_polling/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usart/transfer_by_dma_polling/inc/at32f435_437_conf.h b/project/at_start_f435/examples/usart/transfer_by_dma_polling/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/usart/transfer_by_dma_polling/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/usart/transfer_by_dma_polling/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usart/transfer_by_dma_polling/inc/at32f435_437_int.h b/project/at_start_f435/examples/usart/transfer_by_dma_polling/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/usart/transfer_by_dma_polling/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/usart/transfer_by_dma_polling/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usart/transfer_by_dma_polling/readme.txt b/project/at_start_f435/examples/usart/transfer_by_dma_polling/readme.txt index cb013aff..6dfa5991 100644 --- a/project/at_start_f435/examples/usart/transfer_by_dma_polling/readme.txt +++ b/project/at_start_f435/examples/usart/transfer_by_dma_polling/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/usart/transfer_by_dma_polling/src/at32f435_437_clock.c b/project/at_start_f435/examples/usart/transfer_by_dma_polling/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/usart/transfer_by_dma_polling/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/usart/transfer_by_dma_polling/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usart/transfer_by_dma_polling/src/at32f435_437_int.c b/project/at_start_f435/examples/usart/transfer_by_dma_polling/src/at32f435_437_int.c index dcf0f182..d3ce74cf 100644 --- a/project/at_start_f435/examples/usart/transfer_by_dma_polling/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/usart/transfer_by_dma_polling/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usart/transfer_by_dma_polling/src/main.c b/project/at_start_f435/examples/usart/transfer_by_dma_polling/src/main.c index f6b8710b..b6eb1922 100644 --- a/project/at_start_f435/examples/usart/transfer_by_dma_polling/src/main.c +++ b/project/at_start_f435/examples/usart/transfer_by_dma_polling/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usart/tx_rx_swap/inc/at32f435_437_clock.h b/project/at_start_f435/examples/usart/tx_rx_swap/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/usart/tx_rx_swap/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/usart/tx_rx_swap/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usart/tx_rx_swap/inc/at32f435_437_conf.h b/project/at_start_f435/examples/usart/tx_rx_swap/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/usart/tx_rx_swap/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/usart/tx_rx_swap/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usart/tx_rx_swap/inc/at32f435_437_int.h b/project/at_start_f435/examples/usart/tx_rx_swap/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/usart/tx_rx_swap/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/usart/tx_rx_swap/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usart/tx_rx_swap/readme.txt b/project/at_start_f435/examples/usart/tx_rx_swap/readme.txt index e22b8127..b15e452a 100644 --- a/project/at_start_f435/examples/usart/tx_rx_swap/readme.txt +++ b/project/at_start_f435/examples/usart/tx_rx_swap/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/usart/tx_rx_swap/src/at32f435_437_clock.c b/project/at_start_f435/examples/usart/tx_rx_swap/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/usart/tx_rx_swap/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/usart/tx_rx_swap/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usart/tx_rx_swap/src/at32f435_437_int.c b/project/at_start_f435/examples/usart/tx_rx_swap/src/at32f435_437_int.c index 78092ee6..36cec3bb 100644 --- a/project/at_start_f435/examples/usart/tx_rx_swap/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/usart/tx_rx_swap/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usart/tx_rx_swap/src/main.c b/project/at_start_f435/examples/usart/tx_rx_swap/src/main.c index 1f00b304..2c9d7e05 100644 --- a/project/at_start_f435/examples/usart/tx_rx_swap/src/main.c +++ b/project/at_start_f435/examples/usart/tx_rx_swap/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_device/audio/inc/at32f435_437_clock.h b/project/at_start_f435/examples/usb_device/audio/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/usb_device/audio/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/usb_device/audio/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_device/audio/inc/at32f435_437_conf.h b/project/at_start_f435/examples/usb_device/audio/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/usb_device/audio/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/usb_device/audio/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_device/audio/inc/at32f435_437_int.h b/project/at_start_f435/examples/usb_device/audio/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/usb_device/audio/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/usb_device/audio/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_device/audio/inc/audio_codec.h b/project/at_start_f435/examples/usb_device/audio/inc/audio_codec.h index c3217bfa..1c2e7545 100644 --- a/project/at_start_f435/examples/usb_device/audio/inc/audio_codec.h +++ b/project/at_start_f435/examples/usb_device/audio/inc/audio_codec.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file audio_codec.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief audio codec header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_device/audio/inc/usb_conf.h b/project/at_start_f435/examples/usb_device/audio/inc/usb_conf.h index 4ce063fc..e9d795ad 100644 --- a/project/at_start_f435/examples/usb_device/audio/inc/usb_conf.h +++ b/project/at_start_f435/examples/usb_device/audio/inc/usb_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file usb_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_device/audio/readme.txt b/project/at_start_f435/examples/usb_device/audio/readme.txt index 44e5d440..8bfdc5b1 100644 --- a/project/at_start_f435/examples/usb_device/audio/readme.txt +++ b/project/at_start_f435/examples/usb_device/audio/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/usb_device/audio/src/at32f435_437_clock.c b/project/at_start_f435/examples/usb_device/audio/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/usb_device/audio/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/usb_device/audio/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_device/audio/src/at32f435_437_int.c b/project/at_start_f435/examples/usb_device/audio/src/at32f435_437_int.c index 25ae1040..9c1b9c11 100644 --- a/project/at_start_f435/examples/usb_device/audio/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/usb_device/audio/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_device/audio/src/audio_codec.c b/project/at_start_f435/examples/usb_device/audio/src/audio_codec.c index a6c5f825..2610c269 100644 --- a/project/at_start_f435/examples/usb_device/audio/src/audio_codec.c +++ b/project/at_start_f435/examples/usb_device/audio/src/audio_codec.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file audio_codec.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief audio codec function ************************************************************************** * Copyright notice & Disclaimer @@ -430,7 +430,7 @@ void i2c_lowlevel_init(i2c_handle_type* hi2c) gpio_init(I2Cx_SDA_GPIO_PORT, &gpio_init_structure); /* config i2c */ - i2c_init(hi2c->i2cx, 0, I2Cx_CLKCTRL); + i2c_init(hi2c->i2cx, 0x0F, I2Cx_CLKCTRL); i2c_own_address1_set(hi2c->i2cx, I2C_ADDRESS_MODE_7BIT, I2Cx_ADDRESS); } diff --git a/project/at_start_f435/examples/usb_device/audio/src/main.c b/project/at_start_f435/examples/usb_device/audio/src/main.c index ae6e5753..1aee9c09 100644 --- a/project/at_start_f435/examples/usb_device/audio/src/main.c +++ b/project/at_start_f435/examples/usb_device/audio/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_device/composite_audio_hid/inc/at32f435_437_clock.h b/project/at_start_f435/examples/usb_device/composite_audio_hid/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/usb_device/composite_audio_hid/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/usb_device/composite_audio_hid/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_device/composite_audio_hid/inc/at32f435_437_conf.h b/project/at_start_f435/examples/usb_device/composite_audio_hid/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/usb_device/composite_audio_hid/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/usb_device/composite_audio_hid/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_device/composite_audio_hid/inc/at32f435_437_int.h b/project/at_start_f435/examples/usb_device/composite_audio_hid/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/usb_device/composite_audio_hid/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/usb_device/composite_audio_hid/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_device/composite_audio_hid/inc/audio_codec.h b/project/at_start_f435/examples/usb_device/composite_audio_hid/inc/audio_codec.h index 79dea29f..cc648be1 100644 --- a/project/at_start_f435/examples/usb_device/composite_audio_hid/inc/audio_codec.h +++ b/project/at_start_f435/examples/usb_device/composite_audio_hid/inc/audio_codec.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file audio_codec.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief audio codec header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_device/composite_audio_hid/inc/usb_conf.h b/project/at_start_f435/examples/usb_device/composite_audio_hid/inc/usb_conf.h index 0dc79e41..f070f6bf 100644 --- a/project/at_start_f435/examples/usb_device/composite_audio_hid/inc/usb_conf.h +++ b/project/at_start_f435/examples/usb_device/composite_audio_hid/inc/usb_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file usb_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_device/composite_audio_hid/readme.txt b/project/at_start_f435/examples/usb_device/composite_audio_hid/readme.txt index 0df996c9..4605d95f 100644 --- a/project/at_start_f435/examples/usb_device/composite_audio_hid/readme.txt +++ b/project/at_start_f435/examples/usb_device/composite_audio_hid/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/usb_device/composite_audio_hid/src/at32f435_437_clock.c b/project/at_start_f435/examples/usb_device/composite_audio_hid/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/usb_device/composite_audio_hid/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/usb_device/composite_audio_hid/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_device/composite_audio_hid/src/at32f435_437_int.c b/project/at_start_f435/examples/usb_device/composite_audio_hid/src/at32f435_437_int.c index e0c824dc..1f5f2446 100644 --- a/project/at_start_f435/examples/usb_device/composite_audio_hid/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/usb_device/composite_audio_hid/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_device/composite_audio_hid/src/audio_codec.c b/project/at_start_f435/examples/usb_device/composite_audio_hid/src/audio_codec.c index 278a7ca5..bacbfb4e 100644 --- a/project/at_start_f435/examples/usb_device/composite_audio_hid/src/audio_codec.c +++ b/project/at_start_f435/examples/usb_device/composite_audio_hid/src/audio_codec.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file audio_codec.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief audio codec function ************************************************************************** * Copyright notice & Disclaimer @@ -430,7 +430,7 @@ void i2c_lowlevel_init(i2c_handle_type* hi2c) gpio_init(I2Cx_SDA_GPIO_PORT, &gpio_init_structure); /* config i2c */ - i2c_init(hi2c->i2cx, 0, I2Cx_CLKCTRL); + i2c_init(hi2c->i2cx, 0x0F, I2Cx_CLKCTRL); i2c_own_address1_set(hi2c->i2cx, I2C_ADDRESS_MODE_7BIT, I2Cx_ADDRESS); } diff --git a/project/at_start_f435/examples/usb_device/composite_audio_hid/src/main.c b/project/at_start_f435/examples/usb_device/composite_audio_hid/src/main.c index e02e8bd9..789fd758 100644 --- a/project/at_start_f435/examples/usb_device/composite_audio_hid/src/main.c +++ b/project/at_start_f435/examples/usb_device/composite_audio_hid/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_device/composite_vcp_keyboard/inc/at32f435_437_clock.h b/project/at_start_f435/examples/usb_device/composite_vcp_keyboard/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/usb_device/composite_vcp_keyboard/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/usb_device/composite_vcp_keyboard/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_device/composite_vcp_keyboard/inc/at32f435_437_conf.h b/project/at_start_f435/examples/usb_device/composite_vcp_keyboard/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/usb_device/composite_vcp_keyboard/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/usb_device/composite_vcp_keyboard/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_device/composite_vcp_keyboard/inc/at32f435_437_int.h b/project/at_start_f435/examples/usb_device/composite_vcp_keyboard/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/usb_device/composite_vcp_keyboard/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/usb_device/composite_vcp_keyboard/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_device/composite_vcp_keyboard/inc/usb_conf.h b/project/at_start_f435/examples/usb_device/composite_vcp_keyboard/inc/usb_conf.h index fc540d4a..f7b4a014 100644 --- a/project/at_start_f435/examples/usb_device/composite_vcp_keyboard/inc/usb_conf.h +++ b/project/at_start_f435/examples/usb_device/composite_vcp_keyboard/inc/usb_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file usb_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_device/composite_vcp_keyboard/readme.txt b/project/at_start_f435/examples/usb_device/composite_vcp_keyboard/readme.txt index c276c458..6c28bae2 100644 --- a/project/at_start_f435/examples/usb_device/composite_vcp_keyboard/readme.txt +++ b/project/at_start_f435/examples/usb_device/composite_vcp_keyboard/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/usb_device/composite_vcp_keyboard/src/at32f435_437_clock.c b/project/at_start_f435/examples/usb_device/composite_vcp_keyboard/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/usb_device/composite_vcp_keyboard/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/usb_device/composite_vcp_keyboard/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_device/composite_vcp_keyboard/src/at32f435_437_int.c b/project/at_start_f435/examples/usb_device/composite_vcp_keyboard/src/at32f435_437_int.c index ac16ae6b..8e41bd42 100644 --- a/project/at_start_f435/examples/usb_device/composite_vcp_keyboard/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/usb_device/composite_vcp_keyboard/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_device/composite_vcp_keyboard/src/main.c b/project/at_start_f435/examples/usb_device/composite_vcp_keyboard/src/main.c index 6a2b0d66..f927f93c 100644 --- a/project/at_start_f435/examples/usb_device/composite_vcp_keyboard/src/main.c +++ b/project/at_start_f435/examples/usb_device/composite_vcp_keyboard/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_device/composite_vcp_msc/inc/at32f435_437_clock.h b/project/at_start_f435/examples/usb_device/composite_vcp_msc/inc/at32f435_437_clock.h new file mode 100644 index 00000000..86a4b828 --- /dev/null +++ b/project/at_start_f435/examples/usb_device/composite_vcp_msc/inc/at32f435_437_clock.h @@ -0,0 +1,46 @@ +/** + ************************************************************************** + * @file at32f435_437_clock.h + * @version v2.0.9 + * @date 2022-06-28 + * @brief header file of clock program + ************************************************************************** + * Copyright notice & Disclaimer + * + * The software Board Support Package (BSP) that is made available to + * download from Artery official website is the copyrighted work of Artery. + * Artery authorizes customers to use, copy, and distribute the BSP + * software and its related documentation for the purpose of design and + * development in conjunction with Artery microcontrollers. Use of the + * software is governed by this copyright notice and the following disclaimer. + * + * THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, + * GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, + * TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR + * STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, + * INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. + * + ************************************************************************** + */ + +/* define to prevent recursive inclusion -------------------------------------*/ +#ifndef __AT32F435_437_CLOCK_H +#define __AT32F435_437_CLOCK_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* includes ------------------------------------------------------------------*/ +#include "at32f435_437.h" + +/* exported functions ------------------------------------------------------- */ +void system_clock_config(void); + +#ifdef __cplusplus +} +#endif + +#endif + diff --git a/project/at_start_f435/examples/usb_device/composite_vcp_msc/inc/at32f435_437_conf.h b/project/at_start_f435/examples/usb_device/composite_vcp_msc/inc/at32f435_437_conf.h new file mode 100644 index 00000000..e2816415 --- /dev/null +++ b/project/at_start_f435/examples/usb_device/composite_vcp_msc/inc/at32f435_437_conf.h @@ -0,0 +1,174 @@ +/** + ************************************************************************** + * @file at32f435_437_conf.h + * @version v2.0.9 + * @date 2022-06-28 + * @brief at32f435_437 config header file + ************************************************************************** + * Copyright notice & Disclaimer + * + * The software Board Support Package (BSP) that is made available to + * download from Artery official website is the copyrighted work of Artery. + * Artery authorizes customers to use, copy, and distribute the BSP + * software and its related documentation for the purpose of design and + * development in conjunction with Artery microcontrollers. Use of the + * software is governed by this copyright notice and the following disclaimer. + * + * THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, + * GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, + * TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR + * STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, + * INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. + * + ************************************************************************** + */ + +/* define to prevent recursive inclusion -------------------------------------*/ +#ifndef __AT32F435_437_CONF_H +#define __AT32F435_437_CONF_H + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @brief in the following line adjust the value of high speed exernal crystal (hext) + * used in your application + * + * tip: to avoid modifying this file each time you need to use different hext, you + * can define the hext value in your toolchain compiler preprocessor. + * + */ +#if !defined HEXT_VALUE +#define HEXT_VALUE ((uint32_t)8000000) /*!< value of the high speed exernal crystal in hz */ +#endif + +/** + * @brief in the following line adjust the high speed exernal crystal (hext) startup + * timeout value + */ +#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000) /*!< time out for hext start up */ +#define HICK_VALUE ((uint32_t)8000000) /*!< value of the high speed internal clock in hz */ + +/* module define -------------------------------------------------------------*/ +#define CRM_MODULE_ENABLED +#define TMR_MODULE_ENABLED +#define ERTC_MODULE_ENABLED +#define GPIO_MODULE_ENABLED +#define I2C_MODULE_ENABLED +#define USART_MODULE_ENABLED +#define PWC_MODULE_ENABLED +#define CAN_MODULE_ENABLED +#define ADC_MODULE_ENABLED +#define DAC_MODULE_ENABLED +#define SPI_MODULE_ENABLED +#define EDMA_MODULE_ENABLED +#define DMA_MODULE_ENABLED +#define DEBUG_MODULE_ENABLED +#define FLASH_MODULE_ENABLED +#define CRC_MODULE_ENABLED +#define WWDT_MODULE_ENABLED +#define WDT_MODULE_ENABLED +#define EXINT_MODULE_ENABLED +#define SDIO_MODULE_ENABLED +#define XMC_MODULE_ENABLED +#define USB_MODULE_ENABLED +#define ACC_MODULE_ENABLED +#define MISC_MODULE_ENABLED +#define QSPI_MODULE_ENABLED +#define DVP_MODULE_ENABLED +#define SCFG_MODULE_ENABLED +#define EMAC_MODULE_ENABLED + +/* includes ------------------------------------------------------------------*/ +#ifdef CRM_MODULE_ENABLED +#include "at32f435_437_crm.h" +#endif +#ifdef TMR_MODULE_ENABLED +#include "at32f435_437_tmr.h" +#endif +#ifdef ERTC_MODULE_ENABLED +#include "at32f435_437_ertc.h" +#endif +#ifdef GPIO_MODULE_ENABLED +#include "at32f435_437_gpio.h" +#endif +#ifdef I2C_MODULE_ENABLED +#include "at32f435_437_i2c.h" +#endif +#ifdef USART_MODULE_ENABLED +#include "at32f435_437_usart.h" +#endif +#ifdef PWC_MODULE_ENABLED +#include "at32f435_437_pwc.h" +#endif +#ifdef CAN_MODULE_ENABLED +#include "at32f435_437_can.h" +#endif +#ifdef ADC_MODULE_ENABLED +#include "at32f435_437_adc.h" +#endif +#ifdef DAC_MODULE_ENABLED +#include "at32f435_437_dac.h" +#endif +#ifdef SPI_MODULE_ENABLED +#include "at32f435_437_spi.h" +#endif +#ifdef DMA_MODULE_ENABLED +#include "at32f435_437_dma.h" +#endif +#ifdef DEBUG_MODULE_ENABLED +#include "at32f435_437_debug.h" +#endif +#ifdef FLASH_MODULE_ENABLED +#include "at32f435_437_flash.h" +#endif +#ifdef CRC_MODULE_ENABLED +#include "at32f435_437_crc.h" +#endif +#ifdef WWDT_MODULE_ENABLED +#include "at32f435_437_wwdt.h" +#endif +#ifdef WDT_MODULE_ENABLED +#include "at32f435_437_wdt.h" +#endif +#ifdef EXINT_MODULE_ENABLED +#include "at32f435_437_exint.h" +#endif +#ifdef SDIO_MODULE_ENABLED +#include "at32f435_437_sdio.h" +#endif +#ifdef XMC_MODULE_ENABLED +#include "at32f435_437_xmc.h" +#endif +#ifdef ACC_MODULE_ENABLED +#include "at32f435_437_acc.h" +#endif +#ifdef MISC_MODULE_ENABLED +#include "at32f435_437_misc.h" +#endif +#ifdef EDMA_MODULE_ENABLED +#include "at32f435_437_edma.h" +#endif +#ifdef QSPI_MODULE_ENABLED +#include "at32f435_437_qspi.h" +#endif +#ifdef SCFG_MODULE_ENABLED +#include "at32f435_437_scfg.h" +#endif +#ifdef EMAC_MODULE_ENABLED +#include "at32f435_437_emac.h" +#endif +#ifdef DVP_MODULE_ENABLED +#include "at32f435_437_dvp.h" +#endif +#ifdef USB_MODULE_ENABLED +#include "at32f435_437_usb.h" +#endif + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/project/at_start_f435/examples/usb_device/composite_vcp_msc/inc/at32f435_437_int.h b/project/at_start_f435/examples/usb_device/composite_vcp_msc/inc/at32f435_437_int.h new file mode 100644 index 00000000..80aec042 --- /dev/null +++ b/project/at_start_f435/examples/usb_device/composite_vcp_msc/inc/at32f435_437_int.h @@ -0,0 +1,58 @@ +/** + ************************************************************************** + * @file at32f435_437_int.h + * @version v2.0.9 + * @date 2022-06-28 + * @brief header file of main interrupt service routines. + ************************************************************************** + * Copyright notice & Disclaimer + * + * The software Board Support Package (BSP) that is made available to + * download from Artery official website is the copyrighted work of Artery. + * Artery authorizes customers to use, copy, and distribute the BSP + * software and its related documentation for the purpose of design and + * development in conjunction with Artery microcontrollers. Use of the + * software is governed by this copyright notice and the following disclaimer. + * + * THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, + * GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, + * TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR + * STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, + * INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. + * + ************************************************************************** + */ + +/* define to prevent recursive inclusion -------------------------------------*/ +#ifndef __AT32F435_437_INT_H +#define __AT32F435_437_INT_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* includes ------------------------------------------------------------------*/ +#include "at32f435_437.h" + +/* exported types ------------------------------------------------------------*/ +/* exported constants --------------------------------------------------------*/ +/* exported macro ------------------------------------------------------------*/ +/* exported functions ------------------------------------------------------- */ + +void NMI_Handler(void); +void HardFault_Handler(void); +void MemManage_Handler(void); +void BusFault_Handler(void); +void UsageFault_Handler(void); +void SVC_Handler(void); +void DebugMon_Handler(void); +void PendSV_Handler(void); +void SysTick_Handler(void); + +#ifdef __cplusplus +} +#endif + +#endif + diff --git a/project/at_start_f435/examples/usb_device/composite_vcp_msc/inc/msc_diskio.h b/project/at_start_f435/examples/usb_device/composite_vcp_msc/inc/msc_diskio.h new file mode 100644 index 00000000..27d1174e --- /dev/null +++ b/project/at_start_f435/examples/usb_device/composite_vcp_msc/inc/msc_diskio.h @@ -0,0 +1,74 @@ +/** + ************************************************************************** + * @file msc_diskio.h + * @version v2.0.9 + * @date 2022-06-28 + * @brief usb mass storage disk interface header file + ************************************************************************** + * Copyright notice & Disclaimer + * + * The software Board Support Package (BSP) that is made available to + * download from Artery official website is the copyrighted work of Artery. + * Artery authorizes customers to use, copy, and distribute the BSP + * software and its related documentation for the purpose of design and + * development in conjunction with Artery microcontrollers. Use of the + * software is governed by this copyright notice and the following disclaimer. + * + * THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, + * GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, + * TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR + * STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, + * INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. + * + ************************************************************************** + */ +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __MSC_DISKIO_H +#define __MSC_DISKIO_H + +#ifdef __cplusplus +extern "C" { +#endif + + +#include "usb_conf.h" +#include "usb_std.h" + +/** @addtogroup AT32F435_periph_examples + * @{ + */ + +/** @addtogroup 435_USB_device_msc + * @{ + */ +#define INTERNAL_FLASH_LUN 0 +#define SPI_FLASH_LUN 1 +#define SD_LUN 2 + +#define USB_FLASH_ADDR_OFFSET 0x08005000 + +#define SECTOR_SIZE_1K 1024 +#define SECTOR_SIZE_2K 2048 +#define SECTOR_SIZE_4K 4096 + +uint8_t *get_inquiry(uint8_t lun); +usb_sts_type msc_disk_read(uint8_t lun, uint32_t addr, uint8_t *read_buf, uint32_t len); +usb_sts_type msc_disk_write(uint8_t lun, uint32_t addr, uint8_t *buf, uint32_t len); +usb_sts_type msc_disk_capacity(uint8_t lun, uint32_t *blk_nbr, uint32_t *blk_size); + +/** + * @} + */ + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif + + diff --git a/project/at_start_f435/examples/usb_device/composite_vcp_msc/inc/usb_conf.h b/project/at_start_f435/examples/usb_device/composite_vcp_msc/inc/usb_conf.h new file mode 100644 index 00000000..96368601 --- /dev/null +++ b/project/at_start_f435/examples/usb_device/composite_vcp_msc/inc/usb_conf.h @@ -0,0 +1,223 @@ +/** + ************************************************************************** + * @file usb_conf.h + * @version v2.0.9 + * @date 2022-06-28 + * @brief usb config header file + ************************************************************************** + * Copyright notice & Disclaimer + * + * The software Board Support Package (BSP) that is made available to + * download from Artery official website is the copyrighted work of Artery. + * Artery authorizes customers to use, copy, and distribute the BSP + * software and its related documentation for the purpose of design and + * development in conjunction with Artery microcontrollers. Use of the + * software is governed by this copyright notice and the following disclaimer. + * + * THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, + * GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, + * TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR + * STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, + * INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. + * + ************************************************************************** + */ + +/* define to prevent recursive inclusion -------------------------------------*/ +#ifndef __USB_CONF_H +#define __USB_CONF_H + +#ifdef __cplusplus +extern "C" { +#endif + +#include "at32f435_437_usb.h" +#include "at32f435_437.h" +#include "stdio.h" + + +/** @addtogroup AT32F435_periph_examples + * @{ + */ + +/** @addtogroup 435_USB_device_composite_vcp_msc + * @{ + */ + + +/** + * @brief enable usb device mode + */ +#define USE_OTG_DEVICE_MODE + +/** + * @brief enable usb host mode + */ +/* #define USE_OTG_HOST_MODE */ + +/** + * @brief select otgfs1 or otgfs2 define + */ + +/* use otgfs1 */ +#define OTG_USB_ID 1 + +/* use otgfs2 */ +/* #define OTG_USB_ID 2 */ + +#if (OTG_USB_ID == 1) +#define USB_ID 0 +#define OTG_CLOCK CRM_OTGFS1_PERIPH_CLOCK +#define OTG_IRQ OTGFS1_IRQn +#define OTG_IRQ_HANDLER OTGFS1_IRQHandler +#define OTG_WKUP_IRQ OTGFS1_WKUP_IRQn +#define OTG_WKUP_HANDLER OTGFS1_WKUP_IRQHandler +#define OTG_WKUP_EXINT_LINE EXINT_LINE_18 + +#define OTG_PIN_GPIO GPIOA +#define OTG_PIN_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK + +#define OTG_PIN_DP GPIO_PINS_12 +#define OTG_PIN_DP_SOURCE GPIO_PINS_SOURCE12 + +#define OTG_PIN_DM GPIO_PINS_11 +#define OTG_PIN_DM_SOURCE GPIO_PINS_SOURCE11 + +#define OTG_PIN_VBUS GPIO_PINS_9 +#define OTG_PIN_VBUS_SOURCE GPIO_PINS_SOURCE9 + +#define OTG_PIN_ID GPIO_PINS_10 +#define OTG_PIN_ID_SOURCE GPIO_PINS_SOURCE10 + +#define OTG_PIN_SOF_GPIO GPIOA +#define OTG_PIN_SOF_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK +#define OTG_PIN_SOF GPIO_PINS_8 +#define OTG_PIN_SOF_SOURCE GPIO_PINS_SOURCE8 + +#define OTG_PIN_MUX GPIO_MUX_10 +#endif + +#if (OTG_USB_ID == 2) +#define USB_ID 1 +#define OTG_CLOCK CRM_OTGFS2_PERIPH_CLOCK +#define OTG_IRQ OTGFS2_IRQn +#define OTG_IRQ_HANDLER OTGFS2_IRQHandler +#define OTG_WKUP_IRQ OTGFS2_WKUP_IRQn +#define OTG_WKUP_HANDLER OTGFS2_WKUP_IRQHandler +#define OTG_WKUP_EXINT_LINE EXINT_LINE_20 + +#define OTG_PIN_GPIO GPIOB +#define OTG_PIN_GPIO_CLOCK CRM_GPIOB_PERIPH_CLOCK + +#define OTG_PIN_DP GPIO_PINS_15 +#define OTG_PIN_DP_SOURCE GPIO_PINS_SOURCE15 + +#define OTG_PIN_DM GPIO_PINS_14 +#define OTG_PIN_DM_SOURCE GPIO_PINS_SOURCE14 + +#define OTG_PIN_VBUS GPIO_PINS_13 +#define OTG_PIN_VBUS_SOURCE GPIO_PINS_SOURCE13 + +#define OTG_PIN_ID GPIO_PINS_12 +#define OTG_PIN_ID_SOURCE GPIO_PINS_SOURCE10 + +#define OTG_PIN_SOF_GPIO GPIOA +#define OTG_PIN_SOF_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK +#define OTG_PIN_SOF GPIO_PINS_4 +#define OTG_PIN_SOF_SOURCE GPIO_PINS_SOURCE4 + +#define OTG_PIN_MUX GPIO_MUX_12 +#endif + + +/** + * @brief usb device mode config + */ +#ifdef USE_OTG_DEVICE_MODE +/** + * @brief usb device mode fifo + */ +/* otg1 device fifo */ +#define USBD_RX_SIZE 128 +#define USBD_EP0_TX_SIZE 24 +#define USBD_EP1_TX_SIZE 20 +#define USBD_EP2_TX_SIZE 20 +#define USBD_EP3_TX_SIZE 20 +#define USBD_EP4_TX_SIZE 20 +#define USBD_EP5_TX_SIZE 20 +#define USBD_EP6_TX_SIZE 20 +#define USBD_EP7_TX_SIZE 20 + +/* otg2 device fifo */ +#define USBD2_RX_SIZE 128 +#define USBD2_EP0_TX_SIZE 24 +#define USBD2_EP1_TX_SIZE 20 +#define USBD2_EP2_TX_SIZE 20 +#define USBD2_EP3_TX_SIZE 20 +#define USBD2_EP4_TX_SIZE 20 +#define USBD2_EP5_TX_SIZE 20 +#define USBD2_EP6_TX_SIZE 20 +#define USBD2_EP7_TX_SIZE 20 + +/** + * @brief usb endpoint max num define + */ +#ifndef USB_EPT_MAX_NUM +#define USB_EPT_MAX_NUM 8 +#endif +#endif + +/** + * @brief usb host mode config + */ +#ifdef USE_OTG_HOST_MODE +#ifndef USB_HOST_CHANNEL_NUM +#define USB_HOST_CHANNEL_NUM 16 +#endif + +/** + * @brief usb host mode fifo + */ +/* otg1 host fifo */ +#define USBH_RX_FIFO_SIZE 128 +#define USBH_NP_TX_FIFO_SIZE 96 +#define USBH_P_TX_FIFO_SIZE 96 + +/* otg2 host fifo */ +#define USBH2_RX_FIFO_SIZE 128 +#define USBH2_NP_TX_FIFO_SIZE 96 +#define USBH2_P_TX_FIFO_SIZE 96 +#endif + +/** + * @brief usb sof output enable + */ +/* #define USB_SOF_OUTPUT_ENABLE */ + +/** + * @brief usb vbus ignore + */ +#define USB_VBUS_IGNORE + +/** + * @brief usb low power wakeup handler enable + */ +#define USB_LOW_POWER_WAKUP + +void usb_delay_ms(uint32_t ms); +void usb_delay_us(uint32_t us); + +/** + * @} + */ + +/** + * @} + */ +#ifdef __cplusplus +} +#endif + +#endif + diff --git a/project/at_start_f435/examples/usb_device/composite_vcp_msc/mdk_v5/composite_vcp_msc.uvoptx b/project/at_start_f435/examples/usb_device/composite_vcp_msc/mdk_v5/composite_vcp_msc.uvoptx new file mode 100644 index 00000000..9fe93ce3 --- /dev/null +++ b/project/at_start_f435/examples/usb_device/composite_vcp_msc/mdk_v5/composite_vcp_msc.uvoptx @@ -0,0 +1,744 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj; *.o + *.lib + *.txt; *.h; *.inc + *.plm + *.cpp + 0 + + + + 0 + 0 + + + + composite_vcp_msc + 0x4 + ARM-ADS + + 12000000 + + 0 + 1 + 0 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\listings\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 0 + 0 + 1 + + 0 + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 0 + + + + + + + + + + + BIN\CMSIS_AGDI.dll + + + + 0 + UL2CM3 + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0AT32F435_4032 -FS08000000 -FL03F0000 -FP0($$Device:-AT32F435ZMT7$Flash\AT32F435_4032.FLM)) + + + + + 0 + + + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + 0 + 0 + 0 + + + + + + + + + + + + + user + 0 + 0 + 0 + 0 + + 1 + 1 + 1 + 0 + 0 + 0 + ..\src\at32f435_437_clock.c + at32f435_437_clock.c + 0 + 0 + + + 1 + 2 + 1 + 0 + 0 + 0 + ..\src\at32f435_437_int.c + at32f435_437_int.c + 0 + 0 + + + 1 + 3 + 1 + 0 + 0 + 0 + ..\src\main.c + main.c + 0 + 0 + + + 1 + 4 + 1 + 0 + 0 + 0 + ..\src\msc_diskio.c + msc_diskio.c + 0 + 0 + + + + + bsp + 0 + 0 + 0 + 0 + + 2 + 5 + 1 + 0 + 0 + 0 + ..\..\..\..\..\at32f435_437_board\at32f435_437_board.c + at32f435_437_board.c + 0 + 0 + + + + + firmware + 0 + 0 + 0 + 0 + + 3 + 6 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_acc.c + at32f435_437_acc.c + 0 + 0 + + + 3 + 7 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_adc.c + at32f435_437_adc.c + 0 + 0 + + + 3 + 8 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_can.c + at32f435_437_can.c + 0 + 0 + + + 3 + 9 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_crc.c + at32f435_437_crc.c + 0 + 0 + + + 3 + 10 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_crm.c + at32f435_437_crm.c + 0 + 0 + + + 3 + 11 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_dac.c + at32f435_437_dac.c + 0 + 0 + + + 3 + 12 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_debug.c + at32f435_437_debug.c + 0 + 0 + + + 3 + 13 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_dma.c + at32f435_437_dma.c + 0 + 0 + + + 3 + 14 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_dvp.c + at32f435_437_dvp.c + 0 + 0 + + + 3 + 15 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_edma.c + at32f435_437_edma.c + 0 + 0 + + + 3 + 16 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_emac.c + at32f435_437_emac.c + 0 + 0 + + + 3 + 17 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_ertc.c + at32f435_437_ertc.c + 0 + 0 + + + 3 + 18 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_exint.c + at32f435_437_exint.c + 0 + 0 + + + 3 + 19 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_flash.c + at32f435_437_flash.c + 0 + 0 + + + 3 + 20 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_gpio.c + at32f435_437_gpio.c + 0 + 0 + + + 3 + 21 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_i2c.c + at32f435_437_i2c.c + 0 + 0 + + + 3 + 22 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_misc.c + at32f435_437_misc.c + 0 + 0 + + + 3 + 23 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_pwc.c + at32f435_437_pwc.c + 0 + 0 + + + 3 + 24 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_qspi.c + at32f435_437_qspi.c + 0 + 0 + + + 3 + 25 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_scfg.c + at32f435_437_scfg.c + 0 + 0 + + + 3 + 26 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_sdio.c + at32f435_437_sdio.c + 0 + 0 + + + 3 + 27 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_spi.c + at32f435_437_spi.c + 0 + 0 + + + 3 + 28 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_tmr.c + at32f435_437_tmr.c + 0 + 0 + + + 3 + 29 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_usart.c + at32f435_437_usart.c + 0 + 0 + + + 3 + 30 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_usb.c + at32f435_437_usb.c + 0 + 0 + + + 3 + 31 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_wdt.c + at32f435_437_wdt.c + 0 + 0 + + + 3 + 32 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_wwdt.c + at32f435_437_wwdt.c + 0 + 0 + + + 3 + 33 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_xmc.c + at32f435_437_xmc.c + 0 + 0 + + + + + cmsis + 0 + 0 + 0 + 0 + + 4 + 34 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\libraries\cmsis\cm4\device_support\system_at32f435_437.c + system_at32f435_437.c + 0 + 0 + + + 4 + 35 + 2 + 0 + 0 + 0 + ..\..\..\..\..\..\libraries\cmsis\cm4\device_support\startup\mdk\startup_at32f435_437.s + startup_at32f435_437.s + 0 + 0 + + + + + usbd_driver + 0 + 0 + 0 + 0 + + 5 + 36 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\middlewares\usb_drivers\src\usb_core.c + usb_core.c + 0 + 0 + + + 5 + 37 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\middlewares\usb_drivers\src\usbd_core.c + usbd_core.c + 0 + 0 + + + 5 + 38 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\middlewares\usb_drivers\src\usbd_int.c + usbd_int.c + 0 + 0 + + + 5 + 39 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\middlewares\usb_drivers\src\usbd_sdr.c + usbd_sdr.c + 0 + 0 + + + + + usbd_class + 0 + 0 + 0 + 0 + + 6 + 40 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\middlewares\usbd_class\composite_cdc_msc\cdc_msc_class.c + cdc_msc_class.c + 0 + 0 + + + 6 + 41 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\middlewares\usbd_class\composite_cdc_msc\cdc_msc_desc.c + cdc_msc_desc.c + 0 + 0 + + + 6 + 42 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\middlewares\usbd_class\composite_cdc_msc\msc_bot_scsi.c + msc_bot_scsi.c + 0 + 0 + + + + + readme + 0 + 0 + 0 + 0 + + 7 + 43 + 5 + 0 + 0 + 0 + ..\readme.txt + readme.txt + 0 + 0 + + + + diff --git a/project/at_start_f435/examples/usb_device/composite_vcp_msc/mdk_v5/composite_vcp_msc.uvprojx b/project/at_start_f435/examples/usb_device/composite_vcp_msc/mdk_v5/composite_vcp_msc.uvprojx new file mode 100644 index 00000000..bcd3926f --- /dev/null +++ b/project/at_start_f435/examples/usb_device/composite_vcp_msc/mdk_v5/composite_vcp_msc.uvprojx @@ -0,0 +1,657 @@ + + + + 2.1 + +
### uVision Project, (C) Keil Software
+ + + + composite_vcp_msc + 0x4 + ARM-ADS + 5060960::V5.06 update 7 (build 960)::.\ARMCC + 0 + + + -AT32F435ZMT7 + ArteryTek + ArteryTek.AT32F435_437_DFP.2.0.1 + IRAM(0x20000000,0x60000) IROM(0x08000000,0x400000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0AT32F435_4032 -FS08000000 -FL03F0000 -FP0($$Device:-AT32F435ZMT7$Flash\AT32F435_4032.FLM)) + 0 + $$Device:- + + + + + + + + + + $$Device:-AT32F435ZMT7$SVD\AT32F435xx_v2.svd + 0 + 0 + + + + AT32F435ZMT7$Device\Include\at32f435_437.h\ + AT32F435ZMT7$Device\Include\at32f435_437.h\ + + 0 + 0 + 0 + 0 + 1 + + .\objects\ + composite_vcp_msc + 1 + 0 + 1 + 1 + 1 + .\listings\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 0 + + + SARMCM3.DLL + -REMAP -MPU + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM4 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 1 + 4096 + + 1 + BIN\UL2CM3.DLL + + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M4" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 2 + 0 + 0 + 0 + 0 + 8 + 0 + 0 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x60000 + + + 1 + 0x8000000 + 0x400000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x8000000 + 0x400000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x60000 + + + 0 + 0x0 + 0x0 + + + + + + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + 0 + 0 + 0 + 0 + 5 + 3 + 1 + 1 + 0 + 0 + 0 + + + AT32F435ZMT7,USE_STDPERIPH_DRIVER,AT_START_F435_V1 + + ..\..\..\..\..\..\libraries\cmsis\cm4\core_support;..\..\..\..\..\..\libraries\cmsis\cm4\device_support;..\..\..\..\..\..\libraries\drivers\inc;..\..\..\..\..\at32f435_437_board;..\inc;..\..\..\..\..\..\middlewares\usb_drivers\inc;..\..\..\..\..\..\middlewares\usbd_class\composite_cdc_msc + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 4 + + + + + + + + + 1 + 0 + 0 + 0 + 1 + 0 + 0x08000000 + 0x20000000 + + + + + + + + + + + + + user + + + at32f435_437_clock.c + 1 + ..\src\at32f435_437_clock.c + + + at32f435_437_int.c + 1 + ..\src\at32f435_437_int.c + + + main.c + 1 + ..\src\main.c + + + msc_diskio.c + 1 + ..\src\msc_diskio.c + + + + + bsp + + + at32f435_437_board.c + 1 + ..\..\..\..\..\at32f435_437_board\at32f435_437_board.c + + + + + firmware + + + at32f435_437_acc.c + 1 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_acc.c + + + at32f435_437_adc.c + 1 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_adc.c + + + at32f435_437_can.c + 1 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_can.c + + + at32f435_437_crc.c + 1 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_crc.c + + + at32f435_437_crm.c + 1 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_crm.c + + + at32f435_437_dac.c + 1 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_dac.c + + + at32f435_437_debug.c + 1 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_debug.c + + + at32f435_437_dma.c + 1 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_dma.c + + + at32f435_437_dvp.c + 1 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_dvp.c + + + at32f435_437_edma.c + 1 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_edma.c + + + at32f435_437_emac.c + 1 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_emac.c + + + at32f435_437_ertc.c + 1 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_ertc.c + + + at32f435_437_exint.c + 1 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_exint.c + + + at32f435_437_flash.c + 1 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_flash.c + + + at32f435_437_gpio.c + 1 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_gpio.c + + + at32f435_437_i2c.c + 1 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_i2c.c + + + at32f435_437_misc.c + 1 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_misc.c + + + at32f435_437_pwc.c + 1 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_pwc.c + + + at32f435_437_qspi.c + 1 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_qspi.c + + + at32f435_437_scfg.c + 1 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_scfg.c + + + at32f435_437_sdio.c + 1 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_sdio.c + + + at32f435_437_spi.c + 1 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_spi.c + + + at32f435_437_tmr.c + 1 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_tmr.c + + + at32f435_437_usart.c + 1 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_usart.c + + + at32f435_437_usb.c + 1 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_usb.c + + + at32f435_437_wdt.c + 1 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_wdt.c + + + at32f435_437_wwdt.c + 1 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_wwdt.c + + + at32f435_437_xmc.c + 1 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_xmc.c + + + + + cmsis + + + system_at32f435_437.c + 1 + ..\..\..\..\..\..\libraries\cmsis\cm4\device_support\system_at32f435_437.c + + + startup_at32f435_437.s + 2 + ..\..\..\..\..\..\libraries\cmsis\cm4\device_support\startup\mdk\startup_at32f435_437.s + + + + + usbd_driver + + + usb_core.c + 1 + ..\..\..\..\..\..\middlewares\usb_drivers\src\usb_core.c + + + usbd_core.c + 1 + ..\..\..\..\..\..\middlewares\usb_drivers\src\usbd_core.c + + + usbd_int.c + 1 + ..\..\..\..\..\..\middlewares\usb_drivers\src\usbd_int.c + + + usbd_sdr.c + 1 + ..\..\..\..\..\..\middlewares\usb_drivers\src\usbd_sdr.c + + + + + usbd_class + + + cdc_msc_class.c + 1 + ..\..\..\..\..\..\middlewares\usbd_class\composite_cdc_msc\cdc_msc_class.c + + + cdc_msc_desc.c + 1 + ..\..\..\..\..\..\middlewares\usbd_class\composite_cdc_msc\cdc_msc_desc.c + + + msc_bot_scsi.c + 1 + ..\..\..\..\..\..\middlewares\usbd_class\composite_cdc_msc\msc_bot_scsi.c + + + + + readme + + + readme.txt + 5 + ..\readme.txt + + + + + + + + + + + + + + + + + <Project Info> + + + + + + 0 + 1 + + + + + diff --git a/project/at_start_f435/examples/usb_device/composite_vcp_msc/readme.txt b/project/at_start_f435/examples/usb_device/composite_vcp_msc/readme.txt new file mode 100644 index 00000000..df9fb854 --- /dev/null +++ b/project/at_start_f435/examples/usb_device/composite_vcp_msc/readme.txt @@ -0,0 +1,13 @@ +/** + ************************************************************************** + * @file readme.txt + * @version v2.0.9 + * @date 2022-06-28 + * @brief readme + ************************************************************************** + */ + + this demo is based on the at-start board, in this demo, show how to build + a composite device of usb cdc class and mass storage protocol. + for more detailed information, please refer to the application note document AN0097. + diff --git a/project/at_start_f435/examples/usb_device/composite_vcp_msc/src/at32f435_437_clock.c b/project/at_start_f435/examples/usb_device/composite_vcp_msc/src/at32f435_437_clock.c new file mode 100644 index 00000000..5eb8f824 --- /dev/null +++ b/project/at_start_f435/examples/usb_device/composite_vcp_msc/src/at32f435_437_clock.c @@ -0,0 +1,121 @@ +/** + ************************************************************************** + * @file at32f435_437_clock.c + * @version v2.0.9 + * @date 2022-06-28 + * @brief system clock config program + ************************************************************************** + * Copyright notice & Disclaimer + * + * The software Board Support Package (BSP) that is made available to + * download from Artery official website is the copyrighted work of Artery. + * Artery authorizes customers to use, copy, and distribute the BSP + * software and its related documentation for the purpose of design and + * development in conjunction with Artery microcontrollers. Use of the + * software is governed by this copyright notice and the following disclaimer. + * + * THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, + * GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, + * TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR + * STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, + * INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. + * + ************************************************************************** + */ + +/* includes ------------------------------------------------------------------*/ +#include "at32f435_437_clock.h" + +/** + * @brief system clock config program + * @note the system clock is configured as follow: + * - system clock = (hext * pll_ns)/(pll_ms * pll_fr) + * - system clock source = pll (hext) + * - hext = 8000000 + * - sclk = 288000000 + * - ahbdiv = 1 + * - ahbclk = 288000000 + * - apb2div = 2 + * - apb2clk = 144000000 + * - apb1div = 2 + * - apb1clk = 144000000 + * - pll_ns = 72 + * - pll_ms = 1 + * - pll_fr = 2 + * @param none + * @retval none + */ +void system_clock_config(void) +{ + /* enable pwc periph clock */ + crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE); + + /* config ldo voltage */ + pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3); + + /* set the flash clock divider */ + flash_clock_divider_set(FLASH_CLOCK_DIV_3); + + /* reset crm */ + crm_reset(); + + crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE); + + /* wait till hext is ready */ + while(crm_hext_stable_wait() == ERROR) + { + } + + /* config pll clock resource + common frequency config list: pll source selected hick or hext(8mhz) + _______________________________________________________________________________________ + | | | | | | | | | | + |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 | + |________|_________|_________|_________|_________|_________|_________|_________________| + | | | | | | | | | | + |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 | + | | | | | | | | | | + |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | + | | | | | | | | | | + |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16| + |________|_________|_________|_________|_________|_________|_________|________|________| + + if pll clock source selects hext with other frequency values, or configure pll to other + frequency values, please use the at32 new clock configuration tool for configuration. */ + crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2); + + /* enable pll */ + crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE); + + /* wait till pll is ready */ + while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET) + { + } + + /* config ahbclk */ + crm_ahb_div_set(CRM_AHB_DIV_1); + + /* config apb2clk */ + crm_apb2_div_set(CRM_APB2_DIV_2); + + /* config apb1clk */ + crm_apb1_div_set(CRM_APB1_DIV_2); + + /* enable auto step mode */ + crm_auto_step_mode_enable(TRUE); + + /* select pll as system clock source */ + crm_sysclk_switch(CRM_SCLK_PLL); + + /* wait till pll is used as system clock source */ + while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL) + { + } + + /* disable auto step mode */ + crm_auto_step_mode_enable(FALSE); + + /* update system_core_clock global variable */ + system_core_clock_update(); +} diff --git a/project/at_start_f435/examples/usb_device/composite_vcp_msc/src/at32f435_437_int.c b/project/at_start_f435/examples/usb_device/composite_vcp_msc/src/at32f435_437_int.c new file mode 100644 index 00000000..6e726bfb --- /dev/null +++ b/project/at_start_f435/examples/usb_device/composite_vcp_msc/src/at32f435_437_int.c @@ -0,0 +1,142 @@ +/** + ************************************************************************** + * @file at32f435_437_int.c + * @version v2.0.9 + * @date 2022-06-28 + * @brief main interrupt service routines. + ************************************************************************** + * Copyright notice & Disclaimer + * + * The software Board Support Package (BSP) that is made available to + * download from Artery official website is the copyrighted work of Artery. + * Artery authorizes customers to use, copy, and distribute the BSP + * software and its related documentation for the purpose of design and + * development in conjunction with Artery microcontrollers. Use of the + * software is governed by this copyright notice and the following disclaimer. + * + * THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, + * GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, + * TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR + * STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, + * INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. + * + ************************************************************************** + */ + +/* includes ------------------------------------------------------------------*/ +#include "at32f435_437_int.h" + +/** @addtogroup AT32F435_periph_examples + * @{ + */ + +/** @addtogroup 435_USB_device_composite_vcp_msc + * @{ + */ + +/** + * @brief this function handles nmi exception. + * @param none + * @retval none + */ +void NMI_Handler(void) +{ +} + +/** + * @brief this function handles hard fault exception. + * @param none + * @retval none + */ +void HardFault_Handler(void) +{ + /* go to infinite loop when hard fault exception occurs */ + while(1) + { + } +} + +/** + * @brief this function handles memory manage exception. + * @param none + * @retval none + */ +void MemManage_Handler(void) +{ + /* go to infinite loop when memory manage exception occurs */ + while(1) + { + } +} + +/** + * @brief this function handles bus fault exception. + * @param none + * @retval none + */ +void BusFault_Handler(void) +{ + /* go to infinite loop when bus fault exception occurs */ + while(1) + { + } +} + +/** + * @brief this function handles usage fault exception. + * @param none + * @retval none + */ +void UsageFault_Handler(void) +{ + /* go to infinite loop when usage fault exception occurs */ + while(1) + { + } +} + +/** + * @brief this function handles svcall exception. + * @param none + * @retval none + */ +void SVC_Handler(void) +{ +} + +/** + * @brief this function handles debug monitor exception. + * @param none + * @retval none + */ +void DebugMon_Handler(void) +{ +} + +/** + * @brief this function handles pendsv_handler exception. + * @param none + * @retval none + */ +void PendSV_Handler(void) +{ +} + +/** + * @brief this function handles systick handler. + * @param none + * @retval none + */ +void SysTick_Handler(void) +{ +} + +/** + * @} + */ + +/** + * @} + */ + diff --git a/project/at_start_f435/examples/usb_device/composite_vcp_msc/src/main.c b/project/at_start_f435/examples/usb_device/composite_vcp_msc/src/main.c new file mode 100644 index 00000000..1432993e --- /dev/null +++ b/project/at_start_f435/examples/usb_device/composite_vcp_msc/src/main.c @@ -0,0 +1,384 @@ +/** + ************************************************************************** + * @file main.c + * @version v2.0.9 + * @date 2022-06-28 + * @brief main program + ************************************************************************** + * Copyright notice & Disclaimer + * + * The software Board Support Package (BSP) that is made available to + * download from Artery official website is the copyrighted work of Artery. + * Artery authorizes customers to use, copy, and distribute the BSP + * software and its related documentation for the purpose of design and + * development in conjunction with Artery microcontrollers. Use of the + * software is governed by this copyright notice and the following disclaimer. + * + * THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, + * GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, + * TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR + * STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, + * INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. + * + ************************************************************************** + */ + +#include "at32f435_437_board.h" +#include "at32f435_437_clock.h" +#include "usb_conf.h" +#include "usb_core.h" +#include "usbd_int.h" +#include "cdc_msc_class.h" +#include "cdc_msc_desc.h" + + +/** @addtogroup AT32F435_periph_examples + * @{ + */ + +/** @addtogroup 435_USB_device_composite_vcp_msc USB_device_composite_vcp_msc + * @{ + */ + +/* usb global struct define */ +otg_core_type otg_core_struct; +uint8_t usb_buffer[256]; + +void usb_clock48m_select(usb_clk48_s clk_s); +void usb_gpio_config(void); +void usb_low_power_wakeup_config(void); +void button_exint_init(void); +void button_isr(void); + +/** + * @brief configure button exint + * @param none + * @retval none + */ +void button_exint_init(void) +{ + exint_init_type exint_init_struct; + + crm_periph_clock_enable(CRM_SCFG_PERIPH_CLOCK, TRUE); + scfg_exint_line_config(SCFG_PORT_SOURCE_GPIOA, SCFG_PINS_SOURCE0); + + exint_default_para_init(&exint_init_struct); + exint_init_struct.line_enable = TRUE; + exint_init_struct.line_mode = EXINT_LINE_INTERRUPUT; + exint_init_struct.line_select = EXINT_LINE_0; + exint_init_struct.line_polarity = EXINT_TRIGGER_RISING_EDGE; + exint_init(&exint_init_struct); + + nvic_priority_group_config(NVIC_PRIORITY_GROUP_4); + nvic_irq_enable(EXINT0_IRQn, 0, 0); +} + +/** + * @brief button handler function + * @param none + * @retval none + */ +void button_isr(void) +{ + /* delay 5ms */ + delay_ms(5); + + /* clear interrupt pending bit */ + exint_flag_clear(EXINT_LINE_0); +} + +/** + * @brief exint0 interrupt handler + * @param none + * @retval none + */ +void EXINT0_IRQHandler(void) +{ + button_isr(); +} + + + +/** + * @brief main function. + * @param none + * @retval none + */ +int main(void) +{ + uint16_t data_len; + + uint32_t timeout; + + uint8_t send_zero_packet = 0; + + nvic_priority_group_config(NVIC_PRIORITY_GROUP_4); + + system_clock_config(); + + at32_board_init(); + + button_exint_init(); + + /* usb gpio config */ + usb_gpio_config(); + +#ifdef USB_LOW_POWER_WAKUP + usb_low_power_wakeup_config(); +#endif + + /* enable otgfs clock */ + crm_periph_clock_enable(OTG_CLOCK, TRUE); + + /* select usb 48m clcok source */ + usb_clock48m_select(USB_CLK_HEXT); + + /* enable otgfs irq */ + nvic_irq_enable(OTG_IRQ, 0, 0); + + /* init usb */ + usbd_init(&otg_core_struct, + USB_FULL_SPEED_CORE_ID, + USB_ID, + &cdc_msc_class_handler, + &cdc_msc_desc_handler); + + while(1) + { + /* get usb vcp receive data */ + data_len = usb_vcp_get_rxdata(&otg_core_struct.dev, usb_buffer); + + if(data_len > 0 || send_zero_packet == 1) + { + /* bulk transfer is complete when the endpoint does one of the following + 1 has transferred exactly the amount of data expected + 2 transfers a packet with a payload size less than wMaxPacketSize or transfers a zero-length packet + */ + + if(data_len > 0) + send_zero_packet = 1; + + if(data_len == 0) + send_zero_packet = 0; + + timeout = 5000000; + do + { + /* send data to host */ + if(usb_vcp_send_data(&otg_core_struct.dev, usb_buffer, data_len) == SUCCESS) + { + break; + } + }while(timeout --); + } + + } +} + +/** + * @brief usb 48M clock select + * @param clk_s:USB_CLK_HICK, USB_CLK_HEXT + * @retval none + */ +void usb_clock48m_select(usb_clk48_s clk_s) +{ + if(clk_s == USB_CLK_HICK) + { + crm_usb_clock_source_select(CRM_USB_CLOCK_SOURCE_HICK); + + /* enable the acc calibration ready interrupt */ + crm_periph_clock_enable(CRM_ACC_PERIPH_CLOCK, TRUE); + + /* update the c1\c2\c3 value */ + acc_write_c1(7980); + acc_write_c2(8000); + acc_write_c3(8020); +#if (USB_ID == 0) + acc_sof_select(ACC_SOF_OTG1); +#else + acc_sof_select(ACC_SOF_OTG2); +#endif + /* open acc calibration */ + acc_calibration_mode_enable(ACC_CAL_HICKTRIM, TRUE); + } + else + { + switch(system_core_clock) + { + /* 48MHz */ + case 48000000: + crm_usb_clock_div_set(CRM_USB_DIV_1); + break; + + /* 72MHz */ + case 72000000: + crm_usb_clock_div_set(CRM_USB_DIV_1_5); + break; + + /* 96MHz */ + case 96000000: + crm_usb_clock_div_set(CRM_USB_DIV_2); + break; + + /* 120MHz */ + case 120000000: + crm_usb_clock_div_set(CRM_USB_DIV_2_5); + break; + + /* 144MHz */ + case 144000000: + crm_usb_clock_div_set(CRM_USB_DIV_3); + break; + + /* 168MHz */ + case 168000000: + crm_usb_clock_div_set(CRM_USB_DIV_3_5); + break; + + /* 192MHz */ + case 192000000: + crm_usb_clock_div_set(CRM_USB_DIV_4); + break; + + /* 216MHz */ + case 216000000: + crm_usb_clock_div_set(CRM_USB_DIV_4_5); + break; + + /* 240MHz */ + case 240000000: + crm_usb_clock_div_set(CRM_USB_DIV_5); + break; + + /* 264MHz */ + case 264000000: + crm_usb_clock_div_set(CRM_USB_DIV_5_5); + break; + + /* 288MHz */ + case 288000000: + crm_usb_clock_div_set(CRM_USB_DIV_6); + break; + + default: + break; + + } + } +} + + +/** + * @brief this function config gpio. + * @param none + * @retval none + */ +void usb_gpio_config(void) +{ + gpio_init_type gpio_init_struct; + + crm_periph_clock_enable(OTG_PIN_GPIO_CLOCK, TRUE); + gpio_default_para_init(&gpio_init_struct); + + gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; + gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_init_struct.gpio_mode = GPIO_MODE_MUX; + gpio_init_struct.gpio_pull = GPIO_PULL_NONE; + + /* dp and dm */ + gpio_init_struct.gpio_pins = OTG_PIN_DP | OTG_PIN_DM; + gpio_init(OTG_PIN_GPIO, &gpio_init_struct); + + gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_DP_SOURCE, OTG_PIN_MUX); + gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_DM_SOURCE, OTG_PIN_MUX); + +#ifdef USB_SOF_OUTPUT_ENABLE + crm_periph_clock_enable(OTG_PIN_SOF_GPIO_CLOCK, TRUE); + gpio_init_struct.gpio_pins = OTG_PIN_SOF; + gpio_init(OTG_PIN_SOF_GPIO, &gpio_init_struct); + gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_SOF_SOURCE, OTG_PIN_MUX); +#endif + + /* otgfs use vbus pin */ +#ifndef USB_VBUS_IGNORE + gpio_init_struct.gpio_pins = OTG_PIN_VBUS; + gpio_init_struct.gpio_pull = GPIO_PULL_DOWN; + gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_VBUS_SOURCE, OTG_PIN_MUX); + gpio_init(OTG_PIN_GPIO, &gpio_init_struct); +#endif + + +} +#ifdef USB_LOW_POWER_WAKUP +/** + * @brief usb low power wakeup interrupt config + * @param none + * @retval none + */ +void usb_low_power_wakeup_config(void) +{ + exint_init_type exint_init_struct; + + crm_periph_clock_enable(CRM_SCFG_PERIPH_CLOCK, TRUE); + exint_default_para_init(&exint_init_struct); + + exint_init_struct.line_enable = TRUE; + exint_init_struct.line_mode = EXINT_LINE_INTERRUPUT; + exint_init_struct.line_select = OTG_WKUP_EXINT_LINE; + exint_init_struct.line_polarity = EXINT_TRIGGER_RISING_EDGE; + exint_init(&exint_init_struct); + + nvic_irq_enable(OTG_WKUP_IRQ, 0, 0); +} + +/** + * @brief this function handles otgfs wakup interrupt. + * @param none + * @retval none + */ +void OTG_WKUP_HANDLER(void) +{ + exint_flag_clear(OTG_WKUP_EXINT_LINE); +} + +#endif + +/** + * @brief this function handles otgfs interrupt. + * @param none + * @retval none + */ +void OTG_IRQ_HANDLER(void) +{ + usbd_irq_handler(&otg_core_struct); +} + +/** + * @brief usb delay millisecond function. + * @param ms: number of millisecond delay + * @retval none + */ +void usb_delay_ms(uint32_t ms) +{ + /* user can define self delay function */ + delay_ms(ms); +} + +/** + * @brief usb delay microsecond function. + * @param us: number of microsecond delay + * @retval none + */ +void usb_delay_us(uint32_t us) +{ + delay_us(us); +} + +/** + * @} + */ + +/** + * @} + */ diff --git a/project/at_start_f435/examples/usb_device/composite_vcp_msc/src/msc_diskio.c b/project/at_start_f435/examples/usb_device/composite_vcp_msc/src/msc_diskio.c new file mode 100644 index 00000000..f5c7554c --- /dev/null +++ b/project/at_start_f435/examples/usb_device/composite_vcp_msc/src/msc_diskio.c @@ -0,0 +1,185 @@ +/** + ************************************************************************** + * @file msc_diskio.c + * @version v2.0.9 + * @date 2022-06-28 + * @brief usb mass storage disk function + ************************************************************************** + * Copyright notice & Disclaimer + * + * The software Board Support Package (BSP) that is made available to + * download from Artery official website is the copyrighted work of Artery. + * Artery authorizes customers to use, copy, and distribute the BSP + * software and its related documentation for the purpose of design and + * development in conjunction with Artery microcontrollers. Use of the + * software is governed by this copyright notice and the following disclaimer. + * + * THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, + * GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, + * TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR + * STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, + * INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. + * + ************************************************************************** + */ +#include "msc_diskio.h" +#include "cdc_msc_class.h" + +/** @addtogroup AT32F435_periph_examples + * @{ + */ + +/** @addtogroup 435_USB_device_cdc_msc + * @{ + */ +uint32_t sector_size = 2048; +uint32_t msc_flash_size; +uint8_t scsi_inquiry[MSC_SUPPORT_MAX_LUN][SCSI_INQUIRY_DATA_LENGTH] = +{ + /* lun = 0 */ + { + 0x00, /* peripheral device type (direct-access device) */ + 0x80, /* removable media bit */ + 0x00, /* ansi version, ecma version, iso version */ + 0x01, /* respond data format */ + SCSI_INQUIRY_DATA_LENGTH - 5, /* additional length */ + 0x00, 0x00, 0x00, /* reserved */ + 'A', 'T', '3', '2', ' ', ' ', ' ', ' ', /* vendor information "AT32" */ + 'D', 'i', 's', 'k', '0', ' ', ' ', ' ', ' ', ' ', ' ', ' ', ' ', ' ', ' ', ' ', /* Product identification "Disk" */ + '2', '.', '0', '0' /* product revision level */ + } +}; + +/** + * @brief get disk inquiry + * @param lun: logical units number + * @retval inquiry string + */ +uint8_t *get_inquiry(uint8_t lun) +{ + if(lun < MSC_SUPPORT_MAX_LUN) + return (uint8_t *)scsi_inquiry[lun]; + else + return NULL; +} + +/** + * @brief disk read + * @param lun: logical units number + * @param addr: logical address + * @param read_buf: pointer to read buffer + * @param len: read length + * @retval status of usb_sts_type + */ +usb_sts_type msc_disk_read(uint8_t lun, uint32_t addr, uint8_t *read_buf, uint32_t len) +{ + uint32_t i = 0; + uint32_t flash_addr = addr + USB_FLASH_ADDR_OFFSET; + switch(lun) + { + case INTERNAL_FLASH_LUN: + for(i = 0; i < len; i ++) + { + read_buf[i] = *((uint8_t *)flash_addr); + flash_addr += 1; + } + break; + case SPI_FLASH_LUN: + break; + case SD_LUN: + break; + default: + break; + } + return USB_OK; +} + +/** + * @brief disk write + * @param lun: logical units number + * @param addr: logical address + * @param buf: pointer to write buffer + * @param len: write length + * @retval status of usb_sts_type + */ +usb_sts_type msc_disk_write(uint8_t lun, uint32_t addr, uint8_t *buf, uint32_t len) +{ + uint32_t flash_addr = addr + USB_FLASH_ADDR_OFFSET; + uint32_t i = 0, tolen = len; + uint32_t erase_addr = flash_addr; + switch(lun) + { + case INTERNAL_FLASH_LUN: + flash_unlock(); + while(tolen >= sector_size) + { + flash_sector_erase(erase_addr); + tolen -= sector_size; + erase_addr += sector_size; + } + for(i = 0; i < len; i ++) + { + flash_byte_program(flash_addr+i, buf[i]); + } + flash_lock(); + break; + case SPI_FLASH_LUN: + break; + case SD_LUN: + break; + default: + break;; + } + return USB_OK; +} + +/** + * @brief disk capacity + * @param lun: logical units number + * @param blk_nbr: pointer to number of block + * @param blk_size: pointer to block size + * @retval status of usb_sts_type + */ +usb_sts_type msc_disk_capacity(uint8_t lun, uint32_t *blk_nbr, uint32_t *blk_size) +{ + uint32_t devid = (*((uint32_t *)DEBUG_BASE) & 0x00007000) >> 12; + msc_flash_size = (*((uint32_t *)0x1FFFF7E0) << 10) - (USB_FLASH_ADDR_OFFSET - FLASH_BASE); + switch(devid) + { + case 2: + sector_size = SECTOR_SIZE_1K; + break; + case 3: + sector_size = SECTOR_SIZE_2K; + break; + case 4: + sector_size = SECTOR_SIZE_4K; + break; + default: + sector_size = SECTOR_SIZE_2K; + break; + } + switch(lun) + { + case INTERNAL_FLASH_LUN: + *blk_nbr = msc_flash_size / sector_size; + *blk_size = sector_size; + break; + case SPI_FLASH_LUN: + break; + case SD_LUN: + break; + default: + break; + } + return USB_OK; +} + +/** + * @} + */ + +/** + * @} + */ diff --git a/project/at_start_f435/examples/usb_device/custom_hid/inc/at32f435_437_clock.h b/project/at_start_f435/examples/usb_device/custom_hid/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/usb_device/custom_hid/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/usb_device/custom_hid/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_device/custom_hid/inc/at32f435_437_conf.h b/project/at_start_f435/examples/usb_device/custom_hid/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/usb_device/custom_hid/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/usb_device/custom_hid/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_device/custom_hid/inc/at32f435_437_int.h b/project/at_start_f435/examples/usb_device/custom_hid/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/usb_device/custom_hid/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/usb_device/custom_hid/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_device/custom_hid/inc/usb_conf.h b/project/at_start_f435/examples/usb_device/custom_hid/inc/usb_conf.h index 8033a0b4..88c25924 100644 --- a/project/at_start_f435/examples/usb_device/custom_hid/inc/usb_conf.h +++ b/project/at_start_f435/examples/usb_device/custom_hid/inc/usb_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file usb_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_device/custom_hid/readme.txt b/project/at_start_f435/examples/usb_device/custom_hid/readme.txt index e910ec15..1a8a2dac 100644 --- a/project/at_start_f435/examples/usb_device/custom_hid/readme.txt +++ b/project/at_start_f435/examples/usb_device/custom_hid/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/usb_device/custom_hid/src/at32f435_437_clock.c b/project/at_start_f435/examples/usb_device/custom_hid/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/usb_device/custom_hid/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/usb_device/custom_hid/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_device/custom_hid/src/at32f435_437_int.c b/project/at_start_f435/examples/usb_device/custom_hid/src/at32f435_437_int.c index 495d1888..124d40e1 100644 --- a/project/at_start_f435/examples/usb_device/custom_hid/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/usb_device/custom_hid/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_device/custom_hid/src/main.c b/project/at_start_f435/examples/usb_device/custom_hid/src/main.c index 22171821..483a4ab0 100644 --- a/project/at_start_f435/examples/usb_device/custom_hid/src/main.c +++ b/project/at_start_f435/examples/usb_device/custom_hid/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_device/keyboard/inc/at32f435_437_clock.h b/project/at_start_f435/examples/usb_device/keyboard/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/usb_device/keyboard/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/usb_device/keyboard/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_device/keyboard/inc/at32f435_437_conf.h b/project/at_start_f435/examples/usb_device/keyboard/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/usb_device/keyboard/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/usb_device/keyboard/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_device/keyboard/inc/at32f435_437_int.h b/project/at_start_f435/examples/usb_device/keyboard/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/usb_device/keyboard/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/usb_device/keyboard/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_device/keyboard/inc/usb_conf.h b/project/at_start_f435/examples/usb_device/keyboard/inc/usb_conf.h index 3b3db5de..a47a0f5d 100644 --- a/project/at_start_f435/examples/usb_device/keyboard/inc/usb_conf.h +++ b/project/at_start_f435/examples/usb_device/keyboard/inc/usb_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file usb_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_device/keyboard/readme.txt b/project/at_start_f435/examples/usb_device/keyboard/readme.txt index 10eba00d..2012e9ea 100644 --- a/project/at_start_f435/examples/usb_device/keyboard/readme.txt +++ b/project/at_start_f435/examples/usb_device/keyboard/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/usb_device/keyboard/src/at32f435_437_clock.c b/project/at_start_f435/examples/usb_device/keyboard/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/usb_device/keyboard/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/usb_device/keyboard/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_device/keyboard/src/at32f435_437_int.c b/project/at_start_f435/examples/usb_device/keyboard/src/at32f435_437_int.c index 80b1cc77..fed7b6cf 100644 --- a/project/at_start_f435/examples/usb_device/keyboard/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/usb_device/keyboard/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_device/keyboard/src/main.c b/project/at_start_f435/examples/usb_device/keyboard/src/main.c index fbf43d20..19b745e6 100644 --- a/project/at_start_f435/examples/usb_device/keyboard/src/main.c +++ b/project/at_start_f435/examples/usb_device/keyboard/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_device/mouse/inc/at32f435_437_clock.h b/project/at_start_f435/examples/usb_device/mouse/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/usb_device/mouse/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/usb_device/mouse/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_device/mouse/inc/at32f435_437_conf.h b/project/at_start_f435/examples/usb_device/mouse/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/usb_device/mouse/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/usb_device/mouse/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_device/mouse/inc/at32f435_437_int.h b/project/at_start_f435/examples/usb_device/mouse/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/usb_device/mouse/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/usb_device/mouse/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_device/mouse/inc/usb_conf.h b/project/at_start_f435/examples/usb_device/mouse/inc/usb_conf.h index a66e9d45..41d63583 100644 --- a/project/at_start_f435/examples/usb_device/mouse/inc/usb_conf.h +++ b/project/at_start_f435/examples/usb_device/mouse/inc/usb_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file usb_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_device/mouse/readme.txt b/project/at_start_f435/examples/usb_device/mouse/readme.txt index 0542f5c6..d06f55e4 100644 --- a/project/at_start_f435/examples/usb_device/mouse/readme.txt +++ b/project/at_start_f435/examples/usb_device/mouse/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/usb_device/mouse/src/at32f435_437_clock.c b/project/at_start_f435/examples/usb_device/mouse/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/usb_device/mouse/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/usb_device/mouse/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_device/mouse/src/at32f435_437_int.c b/project/at_start_f435/examples/usb_device/mouse/src/at32f435_437_int.c index 4fd7bda8..798a4ffc 100644 --- a/project/at_start_f435/examples/usb_device/mouse/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/usb_device/mouse/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_device/mouse/src/main.c b/project/at_start_f435/examples/usb_device/mouse/src/main.c index d5e07f4d..20bab960 100644 --- a/project/at_start_f435/examples/usb_device/mouse/src/main.c +++ b/project/at_start_f435/examples/usb_device/mouse/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_device/msc/inc/at32f435_437_clock.h b/project/at_start_f435/examples/usb_device/msc/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/usb_device/msc/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/usb_device/msc/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_device/msc/inc/at32f435_437_conf.h b/project/at_start_f435/examples/usb_device/msc/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/usb_device/msc/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/usb_device/msc/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_device/msc/inc/at32f435_437_int.h b/project/at_start_f435/examples/usb_device/msc/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/usb_device/msc/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/usb_device/msc/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_device/msc/inc/msc_diskio.h b/project/at_start_f435/examples/usb_device/msc/inc/msc_diskio.h index 8f436bf0..27d1174e 100644 --- a/project/at_start_f435/examples/usb_device/msc/inc/msc_diskio.h +++ b/project/at_start_f435/examples/usb_device/msc/inc/msc_diskio.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file msc_diskio.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb mass storage disk interface header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_device/msc/inc/usb_conf.h b/project/at_start_f435/examples/usb_device/msc/inc/usb_conf.h index 125275b4..ec2e176c 100644 --- a/project/at_start_f435/examples/usb_device/msc/inc/usb_conf.h +++ b/project/at_start_f435/examples/usb_device/msc/inc/usb_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file usb_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_device/msc/readme.txt b/project/at_start_f435/examples/usb_device/msc/readme.txt index 9bc584ca..c572a7a9 100644 --- a/project/at_start_f435/examples/usb_device/msc/readme.txt +++ b/project/at_start_f435/examples/usb_device/msc/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/usb_device/msc/src/at32f435_437_clock.c b/project/at_start_f435/examples/usb_device/msc/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/usb_device/msc/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/usb_device/msc/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_device/msc/src/at32f435_437_int.c b/project/at_start_f435/examples/usb_device/msc/src/at32f435_437_int.c index 93b577e7..027ae8ad 100644 --- a/project/at_start_f435/examples/usb_device/msc/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/usb_device/msc/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_device/msc/src/main.c b/project/at_start_f435/examples/usb_device/msc/src/main.c index e9b89c3e..698b2a6d 100644 --- a/project/at_start_f435/examples/usb_device/msc/src/main.c +++ b/project/at_start_f435/examples/usb_device/msc/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_device/msc/src/msc_diskio.c b/project/at_start_f435/examples/usb_device/msc/src/msc_diskio.c index 2c91cb0a..626ecfef 100644 --- a/project/at_start_f435/examples/usb_device/msc/src/msc_diskio.c +++ b/project/at_start_f435/examples/usb_device/msc/src/msc_diskio.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file msc_diskio.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb mass storage disk function ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/at32f435_437_clock.h b/project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/at32f435_437_conf.h b/project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/at32f435_437_int.h b/project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h b/project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h index 395cd9d0..86ae7c91 100644 --- a/project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h +++ b/project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file usb_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/readme.txt b/project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/readme.txt index 298c6dee..4c4796e7 100644 --- a/project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/readme.txt +++ b/project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/src/at32f435_437_clock.c b/project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/src/at32f435_437_int.c b/project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/src/at32f435_437_int.c index 87957774..ca13aeeb 100644 --- a/project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/src/main.c b/project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/src/main.c index fcacfd98..06a8d726 100644 --- a/project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/src/main.c +++ b/project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/src/usbh_user.c b/project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/src/usbh_user.c index 0b986b8a..3753ce05 100644 --- a/project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/src/usbh_user.c +++ b/project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/src/usbh_user.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file usbh_user.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb user function ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/src/usbh_user.h b/project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/src/usbh_user.h index a2d68cb3..2cdf5389 100644 --- a/project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/src/usbh_user.h +++ b/project/at_start_f435/examples/usb_device/otg1_host_otg2_device_demo/src/usbh_user.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file usbh_user.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb host user header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_device/printer/inc/at32f435_437_clock.h b/project/at_start_f435/examples/usb_device/printer/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/usb_device/printer/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/usb_device/printer/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_device/printer/inc/at32f435_437_conf.h b/project/at_start_f435/examples/usb_device/printer/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/usb_device/printer/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/usb_device/printer/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_device/printer/inc/at32f435_437_int.h b/project/at_start_f435/examples/usb_device/printer/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/usb_device/printer/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/usb_device/printer/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_device/printer/inc/usb_conf.h b/project/at_start_f435/examples/usb_device/printer/inc/usb_conf.h index 204943a6..dd4a40d7 100644 --- a/project/at_start_f435/examples/usb_device/printer/inc/usb_conf.h +++ b/project/at_start_f435/examples/usb_device/printer/inc/usb_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file usb_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_device/printer/readme.txt b/project/at_start_f435/examples/usb_device/printer/readme.txt index e03d74e3..09eb766b 100644 --- a/project/at_start_f435/examples/usb_device/printer/readme.txt +++ b/project/at_start_f435/examples/usb_device/printer/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/usb_device/printer/src/at32f435_437_clock.c b/project/at_start_f435/examples/usb_device/printer/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/usb_device/printer/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/usb_device/printer/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_device/printer/src/at32f435_437_int.c b/project/at_start_f435/examples/usb_device/printer/src/at32f435_437_int.c index 571c5cca..0eef561b 100644 --- a/project/at_start_f435/examples/usb_device/printer/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/usb_device/printer/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_device/printer/src/main.c b/project/at_start_f435/examples/usb_device/printer/src/main.c index 3c89122d..8203af4e 100644 --- a/project/at_start_f435/examples/usb_device/printer/src/main.c +++ b/project/at_start_f435/examples/usb_device/printer/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_device/two_otg_device_demo/inc/at32f435_437_clock.h b/project/at_start_f435/examples/usb_device/two_otg_device_demo/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/usb_device/two_otg_device_demo/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/usb_device/two_otg_device_demo/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_device/two_otg_device_demo/inc/at32f435_437_conf.h b/project/at_start_f435/examples/usb_device/two_otg_device_demo/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/usb_device/two_otg_device_demo/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/usb_device/two_otg_device_demo/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_device/two_otg_device_demo/inc/at32f435_437_int.h b/project/at_start_f435/examples/usb_device/two_otg_device_demo/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/usb_device/two_otg_device_demo/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/usb_device/two_otg_device_demo/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_device/two_otg_device_demo/inc/usb_conf.h b/project/at_start_f435/examples/usb_device/two_otg_device_demo/inc/usb_conf.h index 29f9fc46..3b7f36b5 100644 --- a/project/at_start_f435/examples/usb_device/two_otg_device_demo/inc/usb_conf.h +++ b/project/at_start_f435/examples/usb_device/two_otg_device_demo/inc/usb_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file usb_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_device/two_otg_device_demo/readme.txt b/project/at_start_f435/examples/usb_device/two_otg_device_demo/readme.txt index c624e59e..827f2b42 100644 --- a/project/at_start_f435/examples/usb_device/two_otg_device_demo/readme.txt +++ b/project/at_start_f435/examples/usb_device/two_otg_device_demo/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/usb_device/two_otg_device_demo/src/at32f435_437_clock.c b/project/at_start_f435/examples/usb_device/two_otg_device_demo/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/usb_device/two_otg_device_demo/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/usb_device/two_otg_device_demo/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_device/two_otg_device_demo/src/at32f435_437_int.c b/project/at_start_f435/examples/usb_device/two_otg_device_demo/src/at32f435_437_int.c index 03d8d54d..8fa64f94 100644 --- a/project/at_start_f435/examples/usb_device/two_otg_device_demo/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/usb_device/two_otg_device_demo/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_device/two_otg_device_demo/src/main.c b/project/at_start_f435/examples/usb_device/two_otg_device_demo/src/main.c index efd4acc7..c87f29e4 100644 --- a/project/at_start_f435/examples/usb_device/two_otg_device_demo/src/main.c +++ b/project/at_start_f435/examples/usb_device/two_otg_device_demo/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_device/vcp_loopback/inc/at32f435_437_clock.h b/project/at_start_f435/examples/usb_device/vcp_loopback/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/usb_device/vcp_loopback/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/usb_device/vcp_loopback/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_device/vcp_loopback/inc/at32f435_437_conf.h b/project/at_start_f435/examples/usb_device/vcp_loopback/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/usb_device/vcp_loopback/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/usb_device/vcp_loopback/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_device/vcp_loopback/inc/at32f435_437_int.h b/project/at_start_f435/examples/usb_device/vcp_loopback/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/usb_device/vcp_loopback/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/usb_device/vcp_loopback/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_device/vcp_loopback/inc/usb_conf.h b/project/at_start_f435/examples/usb_device/vcp_loopback/inc/usb_conf.h index e6f48c9f..a5c8a34b 100644 --- a/project/at_start_f435/examples/usb_device/vcp_loopback/inc/usb_conf.h +++ b/project/at_start_f435/examples/usb_device/vcp_loopback/inc/usb_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file usb_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_device/vcp_loopback/readme.txt b/project/at_start_f435/examples/usb_device/vcp_loopback/readme.txt index 19379ec5..831b99fe 100644 --- a/project/at_start_f435/examples/usb_device/vcp_loopback/readme.txt +++ b/project/at_start_f435/examples/usb_device/vcp_loopback/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/usb_device/vcp_loopback/src/at32f435_437_clock.c b/project/at_start_f435/examples/usb_device/vcp_loopback/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/usb_device/vcp_loopback/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/usb_device/vcp_loopback/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_device/vcp_loopback/src/at32f435_437_int.c b/project/at_start_f435/examples/usb_device/vcp_loopback/src/at32f435_437_int.c index bbe45db0..e62d2a83 100644 --- a/project/at_start_f435/examples/usb_device/vcp_loopback/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/usb_device/vcp_loopback/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c b/project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c index 9df5ef02..78e3ac45 100644 --- a/project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c +++ b/project/at_start_f435/examples/usb_device/vcp_loopback/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_device/virtual_comport/inc/at32f435_437_clock.h b/project/at_start_f435/examples/usb_device/virtual_comport/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/usb_device/virtual_comport/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/usb_device/virtual_comport/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_device/virtual_comport/inc/at32f435_437_conf.h b/project/at_start_f435/examples/usb_device/virtual_comport/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/usb_device/virtual_comport/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/usb_device/virtual_comport/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_device/virtual_comport/inc/at32f435_437_int.h b/project/at_start_f435/examples/usb_device/virtual_comport/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/usb_device/virtual_comport/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/usb_device/virtual_comport/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_device/virtual_comport/inc/usb_conf.h b/project/at_start_f435/examples/usb_device/virtual_comport/inc/usb_conf.h index 82e0f67f..72423e82 100644 --- a/project/at_start_f435/examples/usb_device/virtual_comport/inc/usb_conf.h +++ b/project/at_start_f435/examples/usb_device/virtual_comport/inc/usb_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file usb_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_device/virtual_comport/readme.txt b/project/at_start_f435/examples/usb_device/virtual_comport/readme.txt index 9f3f669f..b4667dc1 100644 --- a/project/at_start_f435/examples/usb_device/virtual_comport/readme.txt +++ b/project/at_start_f435/examples/usb_device/virtual_comport/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/usb_device/virtual_comport/src/at32f435_437_clock.c b/project/at_start_f435/examples/usb_device/virtual_comport/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/usb_device/virtual_comport/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/usb_device/virtual_comport/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_device/virtual_comport/src/at32f435_437_int.c b/project/at_start_f435/examples/usb_device/virtual_comport/src/at32f435_437_int.c index df2a5b9c..4657566c 100644 --- a/project/at_start_f435/examples/usb_device/virtual_comport/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/usb_device/virtual_comport/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_device/virtual_comport/src/main.c b/project/at_start_f435/examples/usb_device/virtual_comport/src/main.c index 6785ad06..98360e95 100644 --- a/project/at_start_f435/examples/usb_device/virtual_comport/src/main.c +++ b/project/at_start_f435/examples/usb_device/virtual_comport/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_device/virtual_msc_iap/inc/at32f435_437_clock.h b/project/at_start_f435/examples/usb_device/virtual_msc_iap/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/usb_device/virtual_msc_iap/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/usb_device/virtual_msc_iap/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_device/virtual_msc_iap/inc/at32f435_437_conf.h b/project/at_start_f435/examples/usb_device/virtual_msc_iap/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/usb_device/virtual_msc_iap/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/usb_device/virtual_msc_iap/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_device/virtual_msc_iap/inc/at32f435_437_int.h b/project/at_start_f435/examples/usb_device/virtual_msc_iap/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/usb_device/virtual_msc_iap/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/usb_device/virtual_msc_iap/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_device/virtual_msc_iap/inc/flash_fat16.h b/project/at_start_f435/examples/usb_device/virtual_msc_iap/inc/flash_fat16.h index cabbf429..a1080e45 100644 --- a/project/at_start_f435/examples/usb_device/virtual_msc_iap/inc/flash_fat16.h +++ b/project/at_start_f435/examples/usb_device/virtual_msc_iap/inc/flash_fat16.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file flash_fat16.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief fat16 file system header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_device/virtual_msc_iap/inc/msc_diskio.h b/project/at_start_f435/examples/usb_device/virtual_msc_iap/inc/msc_diskio.h index 61fe757a..e0fe37c2 100644 --- a/project/at_start_f435/examples/usb_device/virtual_msc_iap/inc/msc_diskio.h +++ b/project/at_start_f435/examples/usb_device/virtual_msc_iap/inc/msc_diskio.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file msc_diskio.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb mass storage disk interface header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_device/virtual_msc_iap/inc/usb_conf.h b/project/at_start_f435/examples/usb_device/virtual_msc_iap/inc/usb_conf.h index 6a49f1b8..33612180 100644 --- a/project/at_start_f435/examples/usb_device/virtual_msc_iap/inc/usb_conf.h +++ b/project/at_start_f435/examples/usb_device/virtual_msc_iap/inc/usb_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file usb_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_device/virtual_msc_iap/readme.txt b/project/at_start_f435/examples/usb_device/virtual_msc_iap/readme.txt index b691b16f..6abcf7b3 100644 --- a/project/at_start_f435/examples/usb_device/virtual_msc_iap/readme.txt +++ b/project/at_start_f435/examples/usb_device/virtual_msc_iap/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/usb_device/virtual_msc_iap/src/at32f435_437_clock.c b/project/at_start_f435/examples/usb_device/virtual_msc_iap/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/usb_device/virtual_msc_iap/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/usb_device/virtual_msc_iap/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_device/virtual_msc_iap/src/at32f435_437_int.c b/project/at_start_f435/examples/usb_device/virtual_msc_iap/src/at32f435_437_int.c index 11dcc478..d06044ba 100644 --- a/project/at_start_f435/examples/usb_device/virtual_msc_iap/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/usb_device/virtual_msc_iap/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_device/virtual_msc_iap/src/flash_fat16.c b/project/at_start_f435/examples/usb_device/virtual_msc_iap/src/flash_fat16.c index 061e6730..6d085984 100644 --- a/project/at_start_f435/examples/usb_device/virtual_msc_iap/src/flash_fat16.c +++ b/project/at_start_f435/examples/usb_device/virtual_msc_iap/src/flash_fat16.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file flash_fat16.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief fat16 file system ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_device/virtual_msc_iap/src/main.c b/project/at_start_f435/examples/usb_device/virtual_msc_iap/src/main.c index 8f053368..2180c64c 100644 --- a/project/at_start_f435/examples/usb_device/virtual_msc_iap/src/main.c +++ b/project/at_start_f435/examples/usb_device/virtual_msc_iap/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_device/virtual_msc_iap/src/msc_diskio.c b/project/at_start_f435/examples/usb_device/virtual_msc_iap/src/msc_diskio.c index fdfd2cf8..b1b33bc3 100644 --- a/project/at_start_f435/examples/usb_device/virtual_msc_iap/src/msc_diskio.c +++ b/project/at_start_f435/examples/usb_device/virtual_msc_iap/src/msc_diskio.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file msc_diskio.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb mass storage disk function ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_host/hid_demo/inc/at32f435_437_clock.h b/project/at_start_f435/examples/usb_host/hid_demo/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/usb_host/hid_demo/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/usb_host/hid_demo/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_host/hid_demo/inc/at32f435_437_conf.h b/project/at_start_f435/examples/usb_host/hid_demo/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/usb_host/hid_demo/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/usb_host/hid_demo/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_host/hid_demo/inc/at32f435_437_int.h b/project/at_start_f435/examples/usb_host/hid_demo/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/usb_host/hid_demo/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/usb_host/hid_demo/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_host/hid_demo/inc/usb_conf.h b/project/at_start_f435/examples/usb_host/hid_demo/inc/usb_conf.h index c9acc023..a7613c66 100644 --- a/project/at_start_f435/examples/usb_host/hid_demo/inc/usb_conf.h +++ b/project/at_start_f435/examples/usb_host/hid_demo/inc/usb_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file usb_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_host/hid_demo/inc/usbh_user.h b/project/at_start_f435/examples/usb_host/hid_demo/inc/usbh_user.h index a2d68cb3..2cdf5389 100644 --- a/project/at_start_f435/examples/usb_host/hid_demo/inc/usbh_user.h +++ b/project/at_start_f435/examples/usb_host/hid_demo/inc/usbh_user.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file usbh_user.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb host user header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_host/hid_demo/readme.txt b/project/at_start_f435/examples/usb_host/hid_demo/readme.txt index 88c8ebfd..b3a6d952 100644 --- a/project/at_start_f435/examples/usb_host/hid_demo/readme.txt +++ b/project/at_start_f435/examples/usb_host/hid_demo/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/usb_host/hid_demo/src/at32f435_437_clock.c b/project/at_start_f435/examples/usb_host/hid_demo/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/usb_host/hid_demo/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/usb_host/hid_demo/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_host/hid_demo/src/at32f435_437_int.c b/project/at_start_f435/examples/usb_host/hid_demo/src/at32f435_437_int.c index 1783a2d3..438b0f2e 100644 --- a/project/at_start_f435/examples/usb_host/hid_demo/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/usb_host/hid_demo/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_host/hid_demo/src/main.c b/project/at_start_f435/examples/usb_host/hid_demo/src/main.c index aa07b7eb..1887553f 100644 --- a/project/at_start_f435/examples/usb_host/hid_demo/src/main.c +++ b/project/at_start_f435/examples/usb_host/hid_demo/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_host/hid_demo/src/usbh_user.c b/project/at_start_f435/examples/usb_host/hid_demo/src/usbh_user.c index 54304be5..0d247061 100644 --- a/project/at_start_f435/examples/usb_host/hid_demo/src/usbh_user.c +++ b/project/at_start_f435/examples/usb_host/hid_demo/src/usbh_user.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file usbh_user.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb user function ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_host/msc_only_fat32/inc/at32f435_437_clock.h b/project/at_start_f435/examples/usb_host/msc_only_fat32/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/usb_host/msc_only_fat32/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/usb_host/msc_only_fat32/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_host/msc_only_fat32/inc/at32f435_437_conf.h b/project/at_start_f435/examples/usb_host/msc_only_fat32/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/usb_host/msc_only_fat32/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/usb_host/msc_only_fat32/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_host/msc_only_fat32/inc/at32f435_437_int.h b/project/at_start_f435/examples/usb_host/msc_only_fat32/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/usb_host/msc_only_fat32/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/usb_host/msc_only_fat32/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_host/msc_only_fat32/inc/usb_conf.h b/project/at_start_f435/examples/usb_host/msc_only_fat32/inc/usb_conf.h index b9ae3b68..124e3a53 100644 --- a/project/at_start_f435/examples/usb_host/msc_only_fat32/inc/usb_conf.h +++ b/project/at_start_f435/examples/usb_host/msc_only_fat32/inc/usb_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file usb_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_host/msc_only_fat32/inc/usbh_user.h b/project/at_start_f435/examples/usb_host/msc_only_fat32/inc/usbh_user.h index a2d68cb3..2cdf5389 100644 --- a/project/at_start_f435/examples/usb_host/msc_only_fat32/inc/usbh_user.h +++ b/project/at_start_f435/examples/usb_host/msc_only_fat32/inc/usbh_user.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file usbh_user.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb host user header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_host/msc_only_fat32/readme.txt b/project/at_start_f435/examples/usb_host/msc_only_fat32/readme.txt index e9419339..745c4434 100644 --- a/project/at_start_f435/examples/usb_host/msc_only_fat32/readme.txt +++ b/project/at_start_f435/examples/usb_host/msc_only_fat32/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/usb_host/msc_only_fat32/src/at32f435_437_clock.c b/project/at_start_f435/examples/usb_host/msc_only_fat32/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/usb_host/msc_only_fat32/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/usb_host/msc_only_fat32/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_host/msc_only_fat32/src/at32f435_437_int.c b/project/at_start_f435/examples/usb_host/msc_only_fat32/src/at32f435_437_int.c index dc430d21..68318f40 100644 --- a/project/at_start_f435/examples/usb_host/msc_only_fat32/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/usb_host/msc_only_fat32/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_host/msc_only_fat32/src/main.c b/project/at_start_f435/examples/usb_host/msc_only_fat32/src/main.c index 829dab80..f08bb565 100644 --- a/project/at_start_f435/examples/usb_host/msc_only_fat32/src/main.c +++ b/project/at_start_f435/examples/usb_host/msc_only_fat32/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_host/msc_only_fat32/src/usbh_msc_diskio.c b/project/at_start_f435/examples/usb_host/msc_only_fat32/src/usbh_msc_diskio.c index 2e108033..bc98976c 100644 --- a/project/at_start_f435/examples/usb_host/msc_only_fat32/src/usbh_msc_diskio.c +++ b/project/at_start_f435/examples/usb_host/msc_only_fat32/src/usbh_msc_diskio.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file usbh_msc_diskio.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb mass storage disk io ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_host/msc_only_fat32/src/usbh_user.c b/project/at_start_f435/examples/usb_host/msc_only_fat32/src/usbh_user.c index 3316efb5..fd67f1c0 100644 --- a/project/at_start_f435/examples/usb_host/msc_only_fat32/src/usbh_user.c +++ b/project/at_start_f435/examples/usb_host/msc_only_fat32/src/usbh_user.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file usbh_user.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb user function ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_host/two_otg_host_demo/inc/at32f435_437_clock.h b/project/at_start_f435/examples/usb_host/two_otg_host_demo/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/usb_host/two_otg_host_demo/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/usb_host/two_otg_host_demo/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_host/two_otg_host_demo/inc/at32f435_437_conf.h b/project/at_start_f435/examples/usb_host/two_otg_host_demo/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/usb_host/two_otg_host_demo/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/usb_host/two_otg_host_demo/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_host/two_otg_host_demo/inc/at32f435_437_int.h b/project/at_start_f435/examples/usb_host/two_otg_host_demo/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/usb_host/two_otg_host_demo/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/usb_host/two_otg_host_demo/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_host/two_otg_host_demo/inc/usb_conf.h b/project/at_start_f435/examples/usb_host/two_otg_host_demo/inc/usb_conf.h index 83d17f42..043d681b 100644 --- a/project/at_start_f435/examples/usb_host/two_otg_host_demo/inc/usb_conf.h +++ b/project/at_start_f435/examples/usb_host/two_otg_host_demo/inc/usb_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file usb_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_host/two_otg_host_demo/inc/usbh_user.h b/project/at_start_f435/examples/usb_host/two_otg_host_demo/inc/usbh_user.h index a2d68cb3..2cdf5389 100644 --- a/project/at_start_f435/examples/usb_host/two_otg_host_demo/inc/usbh_user.h +++ b/project/at_start_f435/examples/usb_host/two_otg_host_demo/inc/usbh_user.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file usbh_user.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb host user header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_host/two_otg_host_demo/readme.txt b/project/at_start_f435/examples/usb_host/two_otg_host_demo/readme.txt index cdb0aa42..32b82d13 100644 --- a/project/at_start_f435/examples/usb_host/two_otg_host_demo/readme.txt +++ b/project/at_start_f435/examples/usb_host/two_otg_host_demo/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/usb_host/two_otg_host_demo/src/at32f435_437_clock.c b/project/at_start_f435/examples/usb_host/two_otg_host_demo/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/usb_host/two_otg_host_demo/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/usb_host/two_otg_host_demo/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_host/two_otg_host_demo/src/at32f435_437_int.c b/project/at_start_f435/examples/usb_host/two_otg_host_demo/src/at32f435_437_int.c index bfd4c256..9dac27a5 100644 --- a/project/at_start_f435/examples/usb_host/two_otg_host_demo/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/usb_host/two_otg_host_demo/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_host/two_otg_host_demo/src/main.c b/project/at_start_f435/examples/usb_host/two_otg_host_demo/src/main.c index 0b827070..05ee50b0d 100644 --- a/project/at_start_f435/examples/usb_host/two_otg_host_demo/src/main.c +++ b/project/at_start_f435/examples/usb_host/two_otg_host_demo/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_host/two_otg_host_demo/src/usbh_msc_diskio.c b/project/at_start_f435/examples/usb_host/two_otg_host_demo/src/usbh_msc_diskio.c index b6ab36a1..535b733a 100644 --- a/project/at_start_f435/examples/usb_host/two_otg_host_demo/src/usbh_msc_diskio.c +++ b/project/at_start_f435/examples/usb_host/two_otg_host_demo/src/usbh_msc_diskio.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file usbh_msc_diskio.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb mass storage disk io ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/usb_host/two_otg_host_demo/src/usbh_user.c b/project/at_start_f435/examples/usb_host/two_otg_host_demo/src/usbh_user.c index 4008f9a3..a8a17b80 100644 --- a/project/at_start_f435/examples/usb_host/two_otg_host_demo/src/usbh_user.c +++ b/project/at_start_f435/examples/usb_host/two_otg_host_demo/src/usbh_user.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file usbh_user.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb user function ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/wdt/wdt_reset/inc/at32f435_437_clock.h b/project/at_start_f435/examples/wdt/wdt_reset/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/wdt/wdt_reset/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/wdt/wdt_reset/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/wdt/wdt_reset/inc/at32f435_437_conf.h b/project/at_start_f435/examples/wdt/wdt_reset/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/wdt/wdt_reset/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/wdt/wdt_reset/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/wdt/wdt_reset/inc/at32f435_437_int.h b/project/at_start_f435/examples/wdt/wdt_reset/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/wdt/wdt_reset/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/wdt/wdt_reset/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/wdt/wdt_reset/readme.txt b/project/at_start_f435/examples/wdt/wdt_reset/readme.txt index 30c53871..197a4406 100644 --- a/project/at_start_f435/examples/wdt/wdt_reset/readme.txt +++ b/project/at_start_f435/examples/wdt/wdt_reset/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/wdt/wdt_reset/src/at32f435_437_clock.c b/project/at_start_f435/examples/wdt/wdt_reset/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/wdt/wdt_reset/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/wdt/wdt_reset/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/wdt/wdt_reset/src/at32f435_437_int.c b/project/at_start_f435/examples/wdt/wdt_reset/src/at32f435_437_int.c index c16a4c06..d62f60de 100644 --- a/project/at_start_f435/examples/wdt/wdt_reset/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/wdt/wdt_reset/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/wdt/wdt_reset/src/main.c b/project/at_start_f435/examples/wdt/wdt_reset/src/main.c index 68ddede2..1bff6ffc 100644 --- a/project/at_start_f435/examples/wdt/wdt_reset/src/main.c +++ b/project/at_start_f435/examples/wdt/wdt_reset/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/wdt/wdt_standby/inc/at32f435_437_clock.h b/project/at_start_f435/examples/wdt/wdt_standby/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/wdt/wdt_standby/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/wdt/wdt_standby/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/wdt/wdt_standby/inc/at32f435_437_conf.h b/project/at_start_f435/examples/wdt/wdt_standby/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/wdt/wdt_standby/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/wdt/wdt_standby/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/wdt/wdt_standby/inc/at32f435_437_int.h b/project/at_start_f435/examples/wdt/wdt_standby/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/wdt/wdt_standby/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/wdt/wdt_standby/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/wdt/wdt_standby/readme.txt b/project/at_start_f435/examples/wdt/wdt_standby/readme.txt index b5a54423..fbae13c0 100644 --- a/project/at_start_f435/examples/wdt/wdt_standby/readme.txt +++ b/project/at_start_f435/examples/wdt/wdt_standby/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file wdt_standby/readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/wdt/wdt_standby/src/at32f435_437_clock.c b/project/at_start_f435/examples/wdt/wdt_standby/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/wdt/wdt_standby/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/wdt/wdt_standby/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/wdt/wdt_standby/src/at32f435_437_int.c b/project/at_start_f435/examples/wdt/wdt_standby/src/at32f435_437_int.c index 212b8b6f..a13ae9cb 100644 --- a/project/at_start_f435/examples/wdt/wdt_standby/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/wdt/wdt_standby/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/wdt/wdt_standby/src/main.c b/project/at_start_f435/examples/wdt/wdt_standby/src/main.c index ca123139..14088f7b 100644 --- a/project/at_start_f435/examples/wdt/wdt_standby/src/main.c +++ b/project/at_start_f435/examples/wdt/wdt_standby/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/wwdt/wwdt_reset/inc/at32f435_437_clock.h b/project/at_start_f435/examples/wwdt/wwdt_reset/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/wwdt/wwdt_reset/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/wwdt/wwdt_reset/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/wwdt/wwdt_reset/inc/at32f435_437_conf.h b/project/at_start_f435/examples/wwdt/wwdt_reset/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/wwdt/wwdt_reset/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/wwdt/wwdt_reset/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/wwdt/wwdt_reset/inc/at32f435_437_int.h b/project/at_start_f435/examples/wwdt/wwdt_reset/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/wwdt/wwdt_reset/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/wwdt/wwdt_reset/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/wwdt/wwdt_reset/readme.txt b/project/at_start_f435/examples/wwdt/wwdt_reset/readme.txt index dcf991e0..76d1e3dc 100644 --- a/project/at_start_f435/examples/wwdt/wwdt_reset/readme.txt +++ b/project/at_start_f435/examples/wwdt/wwdt_reset/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/wwdt/wwdt_reset/src/at32f435_437_clock.c b/project/at_start_f435/examples/wwdt/wwdt_reset/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/wwdt/wwdt_reset/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/wwdt/wwdt_reset/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/wwdt/wwdt_reset/src/at32f435_437_int.c b/project/at_start_f435/examples/wwdt/wwdt_reset/src/at32f435_437_int.c index 7b7ef211..a1a038a4 100644 --- a/project/at_start_f435/examples/wwdt/wwdt_reset/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/wwdt/wwdt_reset/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/wwdt/wwdt_reset/src/main.c b/project/at_start_f435/examples/wwdt/wwdt_reset/src/main.c index c0a73c61..cf06695b 100644 --- a/project/at_start_f435/examples/wwdt/wwdt_reset/src/main.c +++ b/project/at_start_f435/examples/wwdt/wwdt_reset/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/xmc/lcd_8bit/inc/at32f435_437_clock.h b/project/at_start_f435/examples/xmc/lcd_8bit/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/xmc/lcd_8bit/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/xmc/lcd_8bit/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/xmc/lcd_8bit/inc/at32f435_437_conf.h b/project/at_start_f435/examples/xmc/lcd_8bit/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/xmc/lcd_8bit/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/xmc/lcd_8bit/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/xmc/lcd_8bit/inc/at32f435_437_int.h b/project/at_start_f435/examples/xmc/lcd_8bit/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/xmc/lcd_8bit/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/xmc/lcd_8bit/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/xmc/lcd_8bit/inc/picture.h b/project/at_start_f435/examples/xmc/lcd_8bit/inc/picture.h index 14f7f7dc..644f2214 100644 --- a/project/at_start_f435/examples/xmc/lcd_8bit/inc/picture.h +++ b/project/at_start_f435/examples/xmc/lcd_8bit/inc/picture.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file picture.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief this file contains all the picture used for lcd display. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/xmc/lcd_8bit/inc/xmc_lcd.h b/project/at_start_f435/examples/xmc/lcd_8bit/inc/xmc_lcd.h index 4e32692a..6075fc3f 100644 --- a/project/at_start_f435/examples/xmc/lcd_8bit/inc/xmc_lcd.h +++ b/project/at_start_f435/examples/xmc/lcd_8bit/inc/xmc_lcd.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file xmc_lcd.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief xmc_lcd header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/xmc/lcd_8bit/readme.txt b/project/at_start_f435/examples/xmc/lcd_8bit/readme.txt index 49441d20..623fe0ad 100644 --- a/project/at_start_f435/examples/xmc/lcd_8bit/readme.txt +++ b/project/at_start_f435/examples/xmc/lcd_8bit/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/xmc/lcd_8bit/src/at32f435_437_clock.c b/project/at_start_f435/examples/xmc/lcd_8bit/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/xmc/lcd_8bit/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/xmc/lcd_8bit/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/xmc/lcd_8bit/src/at32f435_437_int.c b/project/at_start_f435/examples/xmc/lcd_8bit/src/at32f435_437_int.c index cb658eff..f8a85041 100644 --- a/project/at_start_f435/examples/xmc/lcd_8bit/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/xmc/lcd_8bit/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/xmc/lcd_8bit/src/main.c b/project/at_start_f435/examples/xmc/lcd_8bit/src/main.c index 3f771856..03d63cdf 100644 --- a/project/at_start_f435/examples/xmc/lcd_8bit/src/main.c +++ b/project/at_start_f435/examples/xmc/lcd_8bit/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/xmc/lcd_8bit/src/xmc_lcd.c b/project/at_start_f435/examples/xmc/lcd_8bit/src/xmc_lcd.c index d00402dc..dddab537 100644 --- a/project/at_start_f435/examples/xmc/lcd_8bit/src/xmc_lcd.c +++ b/project/at_start_f435/examples/xmc/lcd_8bit/src/xmc_lcd.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file xmc_lcd.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief xmc_lcd config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/xmc/lcd_touch_16bit/inc/at32f435_437_clock.h b/project/at_start_f435/examples/xmc/lcd_touch_16bit/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/xmc/lcd_touch_16bit/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/xmc/lcd_touch_16bit/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/xmc/lcd_touch_16bit/inc/at32f435_437_conf.h b/project/at_start_f435/examples/xmc/lcd_touch_16bit/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/xmc/lcd_touch_16bit/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/xmc/lcd_touch_16bit/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/xmc/lcd_touch_16bit/inc/at32f435_437_int.h b/project/at_start_f435/examples/xmc/lcd_touch_16bit/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/xmc/lcd_touch_16bit/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/xmc/lcd_touch_16bit/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/xmc/lcd_touch_16bit/inc/touch.h b/project/at_start_f435/examples/xmc/lcd_touch_16bit/inc/touch.h index 2a63e38a..628fd032 100644 --- a/project/at_start_f435/examples/xmc/lcd_touch_16bit/inc/touch.h +++ b/project/at_start_f435/examples/xmc/lcd_touch_16bit/inc/touch.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file touch.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief this file contains all the functions prototypes for the * touch firmware driver. ************************************************************************** diff --git a/project/at_start_f435/examples/xmc/lcd_touch_16bit/inc/xmc_lcd.h b/project/at_start_f435/examples/xmc/lcd_touch_16bit/inc/xmc_lcd.h index e58a85ba..90ce2a26 100644 --- a/project/at_start_f435/examples/xmc/lcd_touch_16bit/inc/xmc_lcd.h +++ b/project/at_start_f435/examples/xmc/lcd_touch_16bit/inc/xmc_lcd.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file xmc_lcd.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief xmc_lcd program header ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/xmc/lcd_touch_16bit/readme.txt b/project/at_start_f435/examples/xmc/lcd_touch_16bit/readme.txt index 70221dea..baa183c8 100644 --- a/project/at_start_f435/examples/xmc/lcd_touch_16bit/readme.txt +++ b/project/at_start_f435/examples/xmc/lcd_touch_16bit/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/xmc/lcd_touch_16bit/src/at32f435_437_clock.c b/project/at_start_f435/examples/xmc/lcd_touch_16bit/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/xmc/lcd_touch_16bit/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/xmc/lcd_touch_16bit/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/xmc/lcd_touch_16bit/src/at32f435_437_int.c b/project/at_start_f435/examples/xmc/lcd_touch_16bit/src/at32f435_437_int.c index 4f2c8449..754c290f 100644 --- a/project/at_start_f435/examples/xmc/lcd_touch_16bit/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/xmc/lcd_touch_16bit/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/xmc/lcd_touch_16bit/src/main.c b/project/at_start_f435/examples/xmc/lcd_touch_16bit/src/main.c index 599401f3..c601a9dc 100644 --- a/project/at_start_f435/examples/xmc/lcd_touch_16bit/src/main.c +++ b/project/at_start_f435/examples/xmc/lcd_touch_16bit/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/xmc/lcd_touch_16bit/src/touch.c b/project/at_start_f435/examples/xmc/lcd_touch_16bit/src/touch.c index 1a0d06e6..911e746c 100644 --- a/project/at_start_f435/examples/xmc/lcd_touch_16bit/src/touch.c +++ b/project/at_start_f435/examples/xmc/lcd_touch_16bit/src/touch.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file touch.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief this file contains all the functions prototypes for the * touch firmware driver. ************************************************************************** diff --git a/project/at_start_f435/examples/xmc/lcd_touch_16bit/src/xmc_lcd.c b/project/at_start_f435/examples/xmc/lcd_touch_16bit/src/xmc_lcd.c index d059e875..b9fdb083 100644 --- a/project/at_start_f435/examples/xmc/lcd_touch_16bit/src/xmc_lcd.c +++ b/project/at_start_f435/examples/xmc/lcd_touch_16bit/src/xmc_lcd.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file xmc_lcd.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief xmc_lcd program file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/xmc/nand_flash/ecc/inc/at32f435_437_clock.h b/project/at_start_f435/examples/xmc/nand_flash/ecc/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/xmc/nand_flash/ecc/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/xmc/nand_flash/ecc/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/xmc/nand_flash/ecc/inc/at32f435_437_conf.h b/project/at_start_f435/examples/xmc/nand_flash/ecc/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/xmc/nand_flash/ecc/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/xmc/nand_flash/ecc/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/xmc/nand_flash/ecc/inc/at32f435_437_int.h b/project/at_start_f435/examples/xmc/nand_flash/ecc/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/xmc/nand_flash/ecc/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/xmc/nand_flash/ecc/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/xmc/nand_flash/ecc/inc/xmc_ecc.h b/project/at_start_f435/examples/xmc/nand_flash/ecc/inc/xmc_ecc.h index 7814c566..3208db07 100644 --- a/project/at_start_f435/examples/xmc/nand_flash/ecc/inc/xmc_ecc.h +++ b/project/at_start_f435/examples/xmc/nand_flash/ecc/inc/xmc_ecc.h @@ -1,8 +1,8 @@ /** ****************************************************************************** * @file xmc_ecc.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file for the nand ecc configuration. ****************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/xmc/nand_flash/ecc/readme.txt b/project/at_start_f435/examples/xmc/nand_flash/ecc/readme.txt index cd716ce1..d70fc433 100644 --- a/project/at_start_f435/examples/xmc/nand_flash/ecc/readme.txt +++ b/project/at_start_f435/examples/xmc/nand_flash/ecc/readme.txt @@ -1,8 +1,8 @@ /** ****************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ****************************************************************************** */ diff --git a/project/at_start_f435/examples/xmc/nand_flash/ecc/src/at32f435_437_clock.c b/project/at_start_f435/examples/xmc/nand_flash/ecc/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/xmc/nand_flash/ecc/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/xmc/nand_flash/ecc/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/xmc/nand_flash/ecc/src/at32f435_437_int.c b/project/at_start_f435/examples/xmc/nand_flash/ecc/src/at32f435_437_int.c index 3dabef52..b36ef291 100644 --- a/project/at_start_f435/examples/xmc/nand_flash/ecc/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/xmc/nand_flash/ecc/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/xmc/nand_flash/ecc/src/main.c b/project/at_start_f435/examples/xmc/nand_flash/ecc/src/main.c index 252f24ee..6ba08dcb 100644 --- a/project/at_start_f435/examples/xmc/nand_flash/ecc/src/main.c +++ b/project/at_start_f435/examples/xmc/nand_flash/ecc/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/xmc/nand_flash/ecc/src/xmc_ecc.c b/project/at_start_f435/examples/xmc/nand_flash/ecc/src/xmc_ecc.c index 06dc9954..dff48069 100644 --- a/project/at_start_f435/examples/xmc/nand_flash/ecc/src/xmc_ecc.c +++ b/project/at_start_f435/examples/xmc/nand_flash/ecc/src/xmc_ecc.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file xmc_ecc.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief nand ecc configuration ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/xmc/nand_flash/nand/inc/at32f435_437_clock.h b/project/at_start_f435/examples/xmc/nand_flash/nand/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/xmc/nand_flash/nand/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/xmc/nand_flash/nand/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/xmc/nand_flash/nand/inc/at32f435_437_conf.h b/project/at_start_f435/examples/xmc/nand_flash/nand/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/xmc/nand_flash/nand/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/xmc/nand_flash/nand/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/xmc/nand_flash/nand/inc/at32f435_437_int.h b/project/at_start_f435/examples/xmc/nand_flash/nand/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/xmc/nand_flash/nand/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/xmc/nand_flash/nand/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/xmc/nand_flash/nand/inc/xmc_nand.h b/project/at_start_f435/examples/xmc/nand_flash/nand/inc/xmc_nand.h index c4a0407a..320d92ad 100644 --- a/project/at_start_f435/examples/xmc/nand_flash/nand/inc/xmc_nand.h +++ b/project/at_start_f435/examples/xmc/nand_flash/nand/inc/xmc_nand.h @@ -1,8 +1,8 @@ /** ****************************************************************************** * @file xmc_nand.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file for the nand configuration. ****************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/xmc/nand_flash/nand/readme.txt b/project/at_start_f435/examples/xmc/nand_flash/nand/readme.txt index 91774b3e..387fed05 100644 --- a/project/at_start_f435/examples/xmc/nand_flash/nand/readme.txt +++ b/project/at_start_f435/examples/xmc/nand_flash/nand/readme.txt @@ -1,8 +1,8 @@ /** ****************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ****************************************************************************** */ diff --git a/project/at_start_f435/examples/xmc/nand_flash/nand/src/at32f435_437_clock.c b/project/at_start_f435/examples/xmc/nand_flash/nand/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/xmc/nand_flash/nand/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/xmc/nand_flash/nand/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/xmc/nand_flash/nand/src/at32f435_437_int.c b/project/at_start_f435/examples/xmc/nand_flash/nand/src/at32f435_437_int.c index b5108f38..5e42644e 100644 --- a/project/at_start_f435/examples/xmc/nand_flash/nand/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/xmc/nand_flash/nand/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/xmc/nand_flash/nand/src/main.c b/project/at_start_f435/examples/xmc/nand_flash/nand/src/main.c index 022111de..2b224925 100644 --- a/project/at_start_f435/examples/xmc/nand_flash/nand/src/main.c +++ b/project/at_start_f435/examples/xmc/nand_flash/nand/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/xmc/nand_flash/nand/src/xmc_nand.c b/project/at_start_f435/examples/xmc/nand_flash/nand/src/xmc_nand.c index 204a5fe0..0e378c43 100644 --- a/project/at_start_f435/examples/xmc/nand_flash/nand/src/xmc_nand.c +++ b/project/at_start_f435/examples/xmc/nand_flash/nand/src/xmc_nand.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file xmc_nand.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief nand configuration ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/xmc/nor_flash/inc/at32f435_437_clock.h b/project/at_start_f435/examples/xmc/nor_flash/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/xmc/nor_flash/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/xmc/nor_flash/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/xmc/nor_flash/inc/at32f435_437_conf.h b/project/at_start_f435/examples/xmc/nor_flash/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/xmc/nor_flash/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/xmc/nor_flash/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/xmc/nor_flash/inc/at32f435_437_int.h b/project/at_start_f435/examples/xmc/nor_flash/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/xmc/nor_flash/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/xmc/nor_flash/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/xmc/nor_flash/inc/xmc_nor.h b/project/at_start_f435/examples/xmc/nor_flash/inc/xmc_nor.h index f95d9765..820d3b7c 100644 --- a/project/at_start_f435/examples/xmc/nor_flash/inc/xmc_nor.h +++ b/project/at_start_f435/examples/xmc/nor_flash/inc/xmc_nor.h @@ -1,8 +1,8 @@ /** ****************************************************************************** * @file xmc_sram.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file for the nand configuration. ****************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/xmc/nor_flash/readme.txt b/project/at_start_f435/examples/xmc/nor_flash/readme.txt index b57b0309..413fe489 100644 --- a/project/at_start_f435/examples/xmc/nor_flash/readme.txt +++ b/project/at_start_f435/examples/xmc/nor_flash/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/xmc/nor_flash/src/at32f435_437_clock.c b/project/at_start_f435/examples/xmc/nor_flash/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/xmc/nor_flash/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/xmc/nor_flash/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/xmc/nor_flash/src/at32f435_437_int.c b/project/at_start_f435/examples/xmc/nor_flash/src/at32f435_437_int.c index 7749a3bc..6637d013 100644 --- a/project/at_start_f435/examples/xmc/nor_flash/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/xmc/nor_flash/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/xmc/nor_flash/src/main.c b/project/at_start_f435/examples/xmc/nor_flash/src/main.c index 1ab0025f..443053d0 100644 --- a/project/at_start_f435/examples/xmc/nor_flash/src/main.c +++ b/project/at_start_f435/examples/xmc/nor_flash/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/xmc/nor_flash/src/xmc_nor.c b/project/at_start_f435/examples/xmc/nor_flash/src/xmc_nor.c index 1cf05612..c5ece610 100644 --- a/project/at_start_f435/examples/xmc/nor_flash/src/xmc_nor.c +++ b/project/at_start_f435/examples/xmc/nor_flash/src/xmc_nor.c @@ -1,8 +1,8 @@ /** ****************************************************************************** * @file xmc_nor.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file for the nor configuration. ****************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/xmc/psram/inc/at32f435_437_clock.h b/project/at_start_f435/examples/xmc/psram/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/xmc/psram/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/xmc/psram/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/xmc/psram/inc/at32f435_437_conf.h b/project/at_start_f435/examples/xmc/psram/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/xmc/psram/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/xmc/psram/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/xmc/psram/inc/at32f435_437_int.h b/project/at_start_f435/examples/xmc/psram/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/xmc/psram/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/xmc/psram/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/xmc/psram/inc/xmc_psram.h b/project/at_start_f435/examples/xmc/psram/inc/xmc_psram.h index 35d21ad9..4b22a0b5 100644 --- a/project/at_start_f435/examples/xmc/psram/inc/xmc_psram.h +++ b/project/at_start_f435/examples/xmc/psram/inc/xmc_psram.h @@ -1,8 +1,8 @@ /** ****************************************************************************** * @file xmc_sram.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file for the nand configuration. ****************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/xmc/psram/readme.txt b/project/at_start_f435/examples/xmc/psram/readme.txt index cd32fb3b..351c28eb 100644 --- a/project/at_start_f435/examples/xmc/psram/readme.txt +++ b/project/at_start_f435/examples/xmc/psram/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/xmc/psram/src/at32f435_437_clock.c b/project/at_start_f435/examples/xmc/psram/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/xmc/psram/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/xmc/psram/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/xmc/psram/src/at32f435_437_int.c b/project/at_start_f435/examples/xmc/psram/src/at32f435_437_int.c index c9f73815..2238d8f8 100644 --- a/project/at_start_f435/examples/xmc/psram/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/xmc/psram/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/xmc/psram/src/main.c b/project/at_start_f435/examples/xmc/psram/src/main.c index 94a28d55..603dd9d4 100644 --- a/project/at_start_f435/examples/xmc/psram/src/main.c +++ b/project/at_start_f435/examples/xmc/psram/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/xmc/psram/src/xmc_psram.c b/project/at_start_f435/examples/xmc/psram/src/xmc_psram.c index 1105584d..06ea1e24 100644 --- a/project/at_start_f435/examples/xmc/psram/src/xmc_psram.c +++ b/project/at_start_f435/examples/xmc/psram/src/xmc_psram.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file xmc_psram.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief xmc_psram program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/xmc/sdram_basic/inc/at32f435_437_clock.h b/project/at_start_f435/examples/xmc/sdram_basic/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/xmc/sdram_basic/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/xmc/sdram_basic/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/xmc/sdram_basic/inc/at32f435_437_conf.h b/project/at_start_f435/examples/xmc/sdram_basic/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/xmc/sdram_basic/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/xmc/sdram_basic/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/xmc/sdram_basic/inc/at32f435_437_int.h b/project/at_start_f435/examples/xmc/sdram_basic/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/xmc/sdram_basic/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/xmc/sdram_basic/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/xmc/sdram_basic/inc/xmc_sdram.h b/project/at_start_f435/examples/xmc/sdram_basic/inc/xmc_sdram.h index 436c2480..f83fc184 100644 --- a/project/at_start_f435/examples/xmc/sdram_basic/inc/xmc_sdram.h +++ b/project/at_start_f435/examples/xmc/sdram_basic/inc/xmc_sdram.h @@ -1,8 +1,8 @@ /** ****************************************************************************** * @file xmc_sdram.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file for the sdram configuration. ****************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/xmc/sdram_basic/readme.txt b/project/at_start_f435/examples/xmc/sdram_basic/readme.txt index 89815480..1229c477 100644 --- a/project/at_start_f435/examples/xmc/sdram_basic/readme.txt +++ b/project/at_start_f435/examples/xmc/sdram_basic/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/xmc/sdram_basic/src/at32f435_437_clock.c b/project/at_start_f435/examples/xmc/sdram_basic/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/xmc/sdram_basic/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/xmc/sdram_basic/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/xmc/sdram_basic/src/at32f435_437_int.c b/project/at_start_f435/examples/xmc/sdram_basic/src/at32f435_437_int.c index 26c64313..dd440572 100644 --- a/project/at_start_f435/examples/xmc/sdram_basic/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/xmc/sdram_basic/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/xmc/sdram_basic/src/main.c b/project/at_start_f435/examples/xmc/sdram_basic/src/main.c index fb11607a..941a7e30 100644 --- a/project/at_start_f435/examples/xmc/sdram_basic/src/main.c +++ b/project/at_start_f435/examples/xmc/sdram_basic/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/xmc/sdram_basic/src/xmc_sdram.c b/project/at_start_f435/examples/xmc/sdram_basic/src/xmc_sdram.c index 15744cc4..29de5591 100644 --- a/project/at_start_f435/examples/xmc/sdram_basic/src/xmc_sdram.c +++ b/project/at_start_f435/examples/xmc/sdram_basic/src/xmc_sdram.c @@ -1,8 +1,8 @@ /** ****************************************************************************** * @file xmc_sdram.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief sdram program. ****************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/xmc/sdram_dma/inc/at32f435_437_clock.h b/project/at_start_f435/examples/xmc/sdram_dma/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/xmc/sdram_dma/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/xmc/sdram_dma/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/xmc/sdram_dma/inc/at32f435_437_conf.h b/project/at_start_f435/examples/xmc/sdram_dma/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/xmc/sdram_dma/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/xmc/sdram_dma/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/xmc/sdram_dma/inc/at32f435_437_int.h b/project/at_start_f435/examples/xmc/sdram_dma/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/xmc/sdram_dma/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/xmc/sdram_dma/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/xmc/sdram_dma/inc/xmc_sdram.h b/project/at_start_f435/examples/xmc/sdram_dma/inc/xmc_sdram.h index 690732f5..5b258358 100644 --- a/project/at_start_f435/examples/xmc/sdram_dma/inc/xmc_sdram.h +++ b/project/at_start_f435/examples/xmc/sdram_dma/inc/xmc_sdram.h @@ -1,8 +1,8 @@ /** ****************************************************************************** * @file xmc_sdram.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file for the sdram configuration. ****************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/xmc/sdram_dma/readme.txt b/project/at_start_f435/examples/xmc/sdram_dma/readme.txt index 7b249bee..df0cadf1 100644 --- a/project/at_start_f435/examples/xmc/sdram_dma/readme.txt +++ b/project/at_start_f435/examples/xmc/sdram_dma/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/xmc/sdram_dma/src/at32f435_437_clock.c b/project/at_start_f435/examples/xmc/sdram_dma/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/xmc/sdram_dma/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/xmc/sdram_dma/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/xmc/sdram_dma/src/at32f435_437_int.c b/project/at_start_f435/examples/xmc/sdram_dma/src/at32f435_437_int.c index 1a6eac41..4ee4f979 100644 --- a/project/at_start_f435/examples/xmc/sdram_dma/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/xmc/sdram_dma/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/xmc/sdram_dma/src/main.c b/project/at_start_f435/examples/xmc/sdram_dma/src/main.c index 42eb29e5..85d3452e 100644 --- a/project/at_start_f435/examples/xmc/sdram_dma/src/main.c +++ b/project/at_start_f435/examples/xmc/sdram_dma/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/xmc/sdram_dma/src/xmc_sdram.c b/project/at_start_f435/examples/xmc/sdram_dma/src/xmc_sdram.c index 2fef551a..95d78da7 100644 --- a/project/at_start_f435/examples/xmc/sdram_dma/src/xmc_sdram.c +++ b/project/at_start_f435/examples/xmc/sdram_dma/src/xmc_sdram.c @@ -1,8 +1,8 @@ /** ****************************************************************************** * @file xmc_sdram.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief sdram program. ****************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/xmc/sram/inc/at32f435_437_clock.h b/project/at_start_f435/examples/xmc/sram/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/examples/xmc/sram/inc/at32f435_437_clock.h +++ b/project/at_start_f435/examples/xmc/sram/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/xmc/sram/inc/at32f435_437_conf.h b/project/at_start_f435/examples/xmc/sram/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f435/examples/xmc/sram/inc/at32f435_437_conf.h +++ b/project/at_start_f435/examples/xmc/sram/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/xmc/sram/inc/at32f435_437_int.h b/project/at_start_f435/examples/xmc/sram/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/examples/xmc/sram/inc/at32f435_437_int.h +++ b/project/at_start_f435/examples/xmc/sram/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/xmc/sram/inc/xmc_sram.h b/project/at_start_f435/examples/xmc/sram/inc/xmc_sram.h index b56d6e50..ea8fb1da 100644 --- a/project/at_start_f435/examples/xmc/sram/inc/xmc_sram.h +++ b/project/at_start_f435/examples/xmc/sram/inc/xmc_sram.h @@ -1,8 +1,8 @@ /** ****************************************************************************** * @file xmc_sram.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file for the nand configuration. ****************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/xmc/sram/readme.txt b/project/at_start_f435/examples/xmc/sram/readme.txt index b93199d1..68eaa7db 100644 --- a/project/at_start_f435/examples/xmc/sram/readme.txt +++ b/project/at_start_f435/examples/xmc/sram/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/examples/xmc/sram/src/at32f435_437_clock.c b/project/at_start_f435/examples/xmc/sram/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f435/examples/xmc/sram/src/at32f435_437_clock.c +++ b/project/at_start_f435/examples/xmc/sram/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/xmc/sram/src/at32f435_437_int.c b/project/at_start_f435/examples/xmc/sram/src/at32f435_437_int.c index 188ebf5a..cd4902dc 100644 --- a/project/at_start_f435/examples/xmc/sram/src/at32f435_437_int.c +++ b/project/at_start_f435/examples/xmc/sram/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/xmc/sram/src/main.c b/project/at_start_f435/examples/xmc/sram/src/main.c index 23d23897..4b0def87 100644 --- a/project/at_start_f435/examples/xmc/sram/src/main.c +++ b/project/at_start_f435/examples/xmc/sram/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/examples/xmc/sram/src/xmc_sram.c b/project/at_start_f435/examples/xmc/sram/src/xmc_sram.c index 00145850..21db1a1e 100644 --- a/project/at_start_f435/examples/xmc/sram/src/xmc_sram.c +++ b/project/at_start_f435/examples/xmc/sram/src/xmc_sram.c @@ -1,8 +1,8 @@ /** ****************************************************************************** * @file xmc_sram.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief sram program. ****************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/templates/at32_ide/.cproject b/project/at_start_f435/templates/at32_ide/.cproject new file mode 100644 index 00000000..be65b64e --- /dev/null +++ b/project/at_start_f435/templates/at32_ide/.cproject @@ -0,0 +1,223 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + \ No newline at end of file diff --git a/project/at_start_f435/templates/at32_ide/.project b/project/at_start_f435/templates/at32_ide/.project new file mode 100644 index 00000000..9bbd94a7 --- /dev/null +++ b/project/at_start_f435/templates/at32_ide/.project @@ -0,0 +1,198 @@ + + + template + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + bsp/at32f435_437_board.c + 1 + PARENT-3-PROJECT_LOC/at32f435_437_board/at32f435_437_board.c + + + cmsis/startup_at32f435_437.s + 1 + PARENT-4-PROJECT_LOC/libraries/cmsis/cm4/device_support/startup/gcc/startup_at32f435_437.s + + + cmsis/system_at32f435_437.c + 1 + PARENT-4-PROJECT_LOC/libraries/cmsis/cm4/device_support/system_at32f435_437.c + + + firmware/at32f435_437_acc.c + 1 + PARENT-4-PROJECT_LOC/libraries/drivers/src/at32f435_437_acc.c + + + firmware/at32f435_437_adc.c + 1 + PARENT-4-PROJECT_LOC/libraries/drivers/src/at32f435_437_adc.c + + + firmware/at32f435_437_can.c + 1 + PARENT-4-PROJECT_LOC/libraries/drivers/src/at32f435_437_can.c + + + firmware/at32f435_437_crc.c + 1 + PARENT-4-PROJECT_LOC/libraries/drivers/src/at32f435_437_crc.c + + + firmware/at32f435_437_crm.c + 1 + PARENT-4-PROJECT_LOC/libraries/drivers/src/at32f435_437_crm.c + + + firmware/at32f435_437_dac.c + 1 + PARENT-4-PROJECT_LOC/libraries/drivers/src/at32f435_437_dac.c + + + firmware/at32f435_437_debug.c + 1 + PARENT-4-PROJECT_LOC/libraries/drivers/src/at32f435_437_debug.c + + + firmware/at32f435_437_dma.c + 1 + PARENT-4-PROJECT_LOC/libraries/drivers/src/at32f435_437_dma.c + + + firmware/at32f435_437_dvp.c + 1 + PARENT-4-PROJECT_LOC/libraries/drivers/src/at32f435_437_dvp.c + + + firmware/at32f435_437_edma.c + 1 + PARENT-4-PROJECT_LOC/libraries/drivers/src/at32f435_437_edma.c + + + firmware/at32f435_437_emac.c + 1 + PARENT-4-PROJECT_LOC/libraries/drivers/src/at32f435_437_emac.c + + + firmware/at32f435_437_ertc.c + 1 + PARENT-4-PROJECT_LOC/libraries/drivers/src/at32f435_437_ertc.c + + + firmware/at32f435_437_exint.c + 1 + PARENT-4-PROJECT_LOC/libraries/drivers/src/at32f435_437_exint.c + + + firmware/at32f435_437_flash.c + 1 + PARENT-4-PROJECT_LOC/libraries/drivers/src/at32f435_437_flash.c + + + firmware/at32f435_437_gpio.c + 1 + PARENT-4-PROJECT_LOC/libraries/drivers/src/at32f435_437_gpio.c + + + firmware/at32f435_437_i2c.c + 1 + PARENT-4-PROJECT_LOC/libraries/drivers/src/at32f435_437_i2c.c + + + firmware/at32f435_437_misc.c + 1 + PARENT-4-PROJECT_LOC/libraries/drivers/src/at32f435_437_misc.c + + + firmware/at32f435_437_pwc.c + 1 + PARENT-4-PROJECT_LOC/libraries/drivers/src/at32f435_437_pwc.c + + + firmware/at32f435_437_qspi.c + 1 + PARENT-4-PROJECT_LOC/libraries/drivers/src/at32f435_437_qspi.c + + + firmware/at32f435_437_scfg.c + 1 + PARENT-4-PROJECT_LOC/libraries/drivers/src/at32f435_437_scfg.c + + + firmware/at32f435_437_sdio.c + 1 + PARENT-4-PROJECT_LOC/libraries/drivers/src/at32f435_437_sdio.c + + + firmware/at32f435_437_spi.c + 1 + PARENT-4-PROJECT_LOC/libraries/drivers/src/at32f435_437_spi.c + + + firmware/at32f435_437_tmr.c + 1 + PARENT-4-PROJECT_LOC/libraries/drivers/src/at32f435_437_tmr.c + + + firmware/at32f435_437_usart.c + 1 + PARENT-4-PROJECT_LOC/libraries/drivers/src/at32f435_437_usart.c + + + firmware/at32f435_437_usb.c + 1 + PARENT-4-PROJECT_LOC/libraries/drivers/src/at32f435_437_usb.c + + + firmware/at32f435_437_wdt.c + 1 + PARENT-4-PROJECT_LOC/libraries/drivers/src/at32f435_437_wdt.c + + + firmware/at32f435_437_wwdt.c + 1 + PARENT-4-PROJECT_LOC/libraries/drivers/src/at32f435_437_wwdt.c + + + firmware/at32f435_437_xmc.c + 1 + PARENT-4-PROJECT_LOC/libraries/drivers/src/at32f435_437_xmc.c + + + user/at32f435_437_clock.c + 1 + PARENT-1-PROJECT_LOC/src/at32f435_437_clock.c + + + user/at32f435_437_int.c + 1 + PARENT-1-PROJECT_LOC/src/at32f435_437_int.c + + + user/main.c + 1 + PARENT-1-PROJECT_LOC/src/main.c + + + diff --git a/project/at_start_f435/templates/at32_ide/.settings/language.settings.xml b/project/at_start_f435/templates/at32_ide/.settings/language.settings.xml new file mode 100644 index 00000000..be50603e --- /dev/null +++ b/project/at_start_f435/templates/at32_ide/.settings/language.settings.xml @@ -0,0 +1,25 @@ + + + + + + + + + + + + + + + + + + + + + + + + + \ No newline at end of file diff --git a/project/at_start_f435/templates/at32_ide/.settings/org.eclipse.core.runtime.prefs b/project/at_start_f435/templates/at32_ide/.settings/org.eclipse.core.runtime.prefs new file mode 100644 index 00000000..9620bec4 --- /dev/null +++ b/project/at_start_f435/templates/at32_ide/.settings/org.eclipse.core.runtime.prefs @@ -0,0 +1,3 @@ +content-types/enabled=true +content-types/org.eclipse.cdt.core.asmSource/file-extensions=s +eclipse.preferences.version=1 diff --git a/project/at_start_f435/templates/at32_ide/SVD/AT32F435xx_v2.svd b/project/at_start_f435/templates/at32_ide/SVD/AT32F435xx_v2.svd new file mode 100644 index 00000000..2db628e1 --- /dev/null +++ b/project/at_start_f435/templates/at32_ide/SVD/AT32F435xx_v2.svd @@ -0,0 +1,56400 @@ + + + + + + + + Keil + ArteryTek + AT32F435xx_v2 + AT32F435 + 1.0 + ARM 32-bit Cortex-M4 Microcontroller based device, CPU clock up to 288MHz, etc. + + ARM Limited (ARM) is supplying this software for use with Cortex-M\n + processor based microcontroller, but can be equally used for other\n + suitable processor architectures. This file can be freely distributed.\n + Modifications to this file shall be clearly marked.\n + \n + THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED\n + OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF\n + MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.\n + ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR\n + CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. + + + CM4 + r0p1 + little + false + true + 4 + false + + 8 + 32 + + 32 + read-write + 0x00000000 + 0xFFFFFFFF + + + + XMC + Flexible static memory controller + XMC + 0xA0000000 + + 0x0 + 0x1000 + registers + + + XMC + XMC global interrupt + 48 + + + + BK1CTRL1 + BK1CTRL1 + SRAM/NOR-Flash chip-select control register + 1 + 0x0 + 0x20 + read-write + 0x000030DB + + + MWMC + Memory write mode control + 19 + 1 + + + CRPGS + CRAM page size + 16 + 3 + + + NWASEN + NWAIT in asynchronous transfer enable + 15 + 1 + + + RWTD + Read-write timing different + 14 + 1 + + + NWSEN + NWAIT in synchronous transfer enable + 13 + 1 + + + WEN + Write enable + 12 + 1 + + + NWTCFG + Wait timing configuration + 11 + 1 + + + WRAPEN + Wrapped enable + 10 + 1 + + + NWPOL + NWAIT polarity + 9 + 1 + + + SYNCBEN + Synchronous burst enable + 8 + 1 + + + NOREN + Nor flash access enable + 6 + 1 + + + EXTMDBW + External memory data bus width + 4 + 2 + + + DEV + Memory device type + 2 + 2 + + + ADMUXEN + Address and data multiplexing enable + 1 + 1 + + + EN + Memory bank enable + 0 + 1 + + + + + BK1TMG1 + BK1TMG1 + SRAM/NOR-Flash chip-select timing register + 1 + 0x4 + 0x20 + read-write + 0x0FFFFFFF + + + ASYNCM + Asynchronous mode + 28 + 2 + + + DTLAT + Data latency + 24 + 4 + + + CLKPSC + Clock prescale + 20 + 4 + + + BUSLAT + Bus latency + 16 + 4 + + + DTST + Asynchronous data setup time + 8 + 8 + + + ADDRHT + Address-hold time + 4 + 4 + + + ADDRST + Address setup time + 0 + 4 + + + + + BK1CTRL2 + BK1CTRL2 + SRAM/NOR-Flash chip-select control register + 2 + 0x8 + 0x20 + read-write + 0x000030D2 + + + MWMC + Memory write mode control + 19 + 1 + + + CRPGS + CRAM page size + 16 + 3 + + + NWASEN + NWAIT in asynchronous transfer enable + 15 + 1 + + + RWTD + Read-write timing different + 14 + 1 + + + NWSEN + NWAIT in synchronous transfer enable + 13 + 1 + + + WEN + Write enable + 12 + 1 + + + NWTCFG + Wait timing configuration + 11 + 1 + + + WRAPEN + Wrapped enable + 10 + 1 + + + NWPOL + NWAIT polarity + 9 + 1 + + + SYNCBEN + Synchronous burst enable + 8 + 1 + + + NOREN + Nor flash access enable + 6 + 1 + + + EXTMDBW + External memory data bus width + 4 + 2 + + + DEV + Memory device type + 2 + 2 + + + ADMUXEN + Address and data multiplexing enable + 1 + 1 + + + EN + Memory bank enable + 0 + 1 + + + + + BK1TMG2 + BK1TMG2 + SRAM/NOR-Flash chip-select timing register + 2 + 0xC + 0x20 + read-write + 0x0FFFFFFF + + + ASYNCM + Asynchronous mode + 28 + 2 + + + DTLAT + Data latency + 24 + 4 + + + CLKPSC + Clock prescale + 20 + 4 + + + BUSLAT + Bus latency + 16 + 4 + + + DTST + Asynchronous data setup time + 8 + 8 + + + ADDRHT + Address-hold time + 4 + 4 + + + ADDRST + Address setup time + 0 + 4 + + + + + BK1CTRL3 + BK1CTRL3 + SRAM/NOR-Flash chip-select control register + 3 + 0x10 + 0x20 + read-write + 0x000030D2 + + + MWMC + Memory write mode control + 19 + 1 + + + CRPGS + CRAM page size + 16 + 3 + + + NWASEN + NWAIT in asynchronous transfer enable + 15 + 1 + + + RWTD + Read-write timing different + 14 + 1 + + + NWSEN + NWAIT in synchronous transfer enable + 13 + 1 + + + WEN + Write enable + 12 + 1 + + + NWTCFG + Wait timing configuration + 11 + 1 + + + WRAPEN + Wrapped enable + 10 + 1 + + + NWPOL + NWAIT polarity + 9 + 1 + + + SYNCBEN + Synchronous burst enable + 8 + 1 + + + NOREN + Nor flash access enable + 6 + 1 + + + EXTMDBW + External memory data bus width + 4 + 2 + + + DEV + Memory device type + 2 + 2 + + + ADMUXEN + Address and data multiplexing enable + 1 + 1 + + + EN + Memory bank enable + 0 + 1 + + + + + BK1TMG3 + BK1TMG3 + SRAM/NOR-Flash chip-select timing register + 3 + 0x14 + 0x20 + read-write + 0x0FFFFFFF + + + ASYNCM + Asynchronous mode + 28 + 2 + + + DTLAT + Data latency + 24 + 4 + + + CLKPSC + Clock prescale + 20 + 4 + + + BUSLAT + Bus latency + 16 + 4 + + + DTST + Asynchronous data setup time + 8 + 8 + + + ADDRHT + Address-hold time + 4 + 4 + + + ADDRST + Address setup time + 0 + 4 + + + + + BK1CTRL4 + BK1CTRL4 + SRAM/NOR-Flash chip-select control register + 4 + 0x18 + 0x20 + read-write + 0x000030D2 + + + MWMC + Memory write mode control + 19 + 1 + + + CRPGS + CRAM page size + 16 + 3 + + + NWASEN + NWAIT in asynchronous transfer enable + 15 + 1 + + + RWTD + Read-write timing different + 14 + 1 + + + NWSEN + NWAIT in synchronous transfer enable + 13 + 1 + + + WEN + Write enable + 12 + 1 + + + NWTCFG + Wait timing configuration + 11 + 1 + + + WRAPEN + Wrapped enable + 10 + 1 + + + NWPOL + NWAIT polarity + 9 + 1 + + + SYNCBEN + Synchronous burst enable + 8 + 1 + + + NOREN + Nor flash access enable + 6 + 1 + + + EXTMDBW + External memory data bus width + 4 + 2 + + + DEV + Memory device type + 2 + 2 + + + ADMUXEN + Address and data multiplexing enable + 1 + 1 + + + EN + Memory bank enable + 0 + 1 + + + + + BK1TMG4 + BK1TMG4 + SRAM/NOR-Flash chip-select timing register + 4 + 0x1C + 0x20 + read-write + 0x0FFFFFFF + + + ASYNCM + Asynchronous mode + 28 + 2 + + + DTLAT + Data latency + 24 + 4 + + + CLKPSC + Clock prescale + 20 + 4 + + + BUSLAT + Bus latency + 16 + 4 + + + DTST + Asynchronous data setup time + 8 + 8 + + + ADDRHT + Address-hold time + 4 + 4 + + + ADDRST + Address setup time + 0 + 4 + + + + + BK2CTRL + BK2CTRL + PC Card/NAND Flash control register + 2 + 0x60 + 0x20 + read-write + 0x00000018 + + + ECCPGS + ECC page size + 17 + 3 + + + TAR + ALE to RE delay + 13 + 4 + + + TCR + CLE to RE delay + 9 + 4 + + + ECCEN + ECC enable + 6 + 1 + + + EXTMDBW + External memory data bus width + 4 + 2 + + + DEV + Memory device type + 3 + 1 + + + EN + Memory bank enable + 2 + 1 + + + NWEN + Wait feature enable + 1 + 1 + + + + + BK2IS + BK2IS + FIFO status and interrupt register + 2 + 0x64 + 0x20 + 0x00000040 + + + FIFOE + FIFO empty + 6 + 1 + read-only + + + FEIEN + Falling edge interrupt enable + 5 + 1 + read-write + + + HLIEN + High-level interrupt enable + 4 + 1 + read-write + + + REIEN + Rising edge interrupt enable + 3 + 1 + read-write + + + FES + Falling edge status + 2 + 1 + read-write + + + HLS + High-level status + 1 + 1 + read-write + + + RES + Rising edge capture status + 0 + 1 + read-write + + + + + BK2TMGRG + BK2TMGRG + Regular memory space timing register + 2 + 0x68 + 0x20 + read-write + 0xFCFCFCFC + + + RGDHIZT + Regular memory databus High resistance time + 24 + 8 + + + RGHT + Regular memory hold time + 16 + 8 + + + RGWT + Regular memory wait time + 8 + 8 + + + RGST + Regular memory setup time + 0 + 8 + + + + + BK2TMGSP + BK2TMGSP + special memory space timing register + 2 + 0x6C + 0x20 + read-write + 0xFCFCFCFC + + + SPDHIZT + special memory databus High resistance time + 24 + 8 + + + SPHT + special memory hold time + 16 + 8 + + + SPWT + special memory wait time + 8 + 8 + + + SPST + special memory setup time + 0 + 8 + + + + + BK2ECC + BK2ECC + ECC result register 2 + 0x74 + 0x20 + read-write + 0x00000000 + + + ECC + ECC result + 0 + 32 + + + + + BK3CTRL + BK3CTRL + PC Card/NAND Flash control register + 3 + 0x80 + 0x20 + read-write + 0x00000018 + + + ECCPGS + ECC page size + 17 + 3 + + + TAR + ALE to RE delay + 13 + 4 + + + TCR + CLE to RE delay + 9 + 4 + + + ECCEN + ECC enable + 6 + 1 + + + EXTMDBW + External memory data bus width + 4 + 2 + + + DEV + Memory device type + 3 + 1 + + + EN + Memory bank enable + 2 + 1 + + + NWEN + Wait feature enable + 1 + 1 + + + + + BK3IS + BK3IS + FIFO status and interrupt register + 3 + 0x84 + 0x20 + 0x00000040 + + + FIFOE + FIFO empty + 6 + 1 + read-only + + + FEIEN + Falling edge interrupt enable + 5 + 1 + read-write + + + HLIEN + High-level interrupt enable + 4 + 1 + read-write + + + REIEN + Rising edge interrupt enable + 3 + 1 + read-write + + + FES + Falling edge status + 2 + 1 + read-write + + + HLS + High-level status + 1 + 1 + read-write + + + RES + Rising edge capture status + 0 + 1 + read-write + + + + + BK3TMGRG + BK3TMGRG + Regular memory space timing register + 3 + 0x88 + 0x20 + read-write + 0xFCFCFCFC + + + RGDHIZT + Regular memory databus High resistance time + 24 + 8 + + + RGHT + Regular memory hold time + 16 + 8 + + + RGWT + Regular memory wait time + 8 + 8 + + + RGST + Regular memory setup time + 0 + 8 + + + + + BK3TMGSP + BK3TMGSP + special memory space timing register + 3 + 0x8C + 0x20 + read-write + 0xFCFCFCFC + + + SPDHIZT + special memory databus High resistance time + 24 + 8 + + + SPHT + special memory hold time + 16 + 8 + + + SPWT + special memory wait time + 8 + 8 + + + SPST + special memory setup time + 0 + 8 + + + + + BK3ECC + BK3ECC + ECC result register 3 + 0x94 + 0x20 + read-write + 0x00000000 + + + ECC + ECC result + 0 + 32 + + + + + BK4CTRL + BK4CTRL + PC Card/NAND Flash control register + 4 + 0xA0 + 0x20 + read-write + 0x00000018 + + + EN + Memory bank enable + 2 + 1 + + + NWEN + Wait feature enable + 1 + 1 + + + + + BK4IS + BK4IS + FIFO status and interrupt register + 4 + 0xA4 + 0x20 + 0x00000040 + + + FIFOE + FIFO empty + 6 + 1 + read-only + + + FEIEN + Falling edge interrupt enable + 5 + 1 + read-write + + + HLIEN + High-level interrupt enable + 4 + 1 + read-write + + + REIEN + Rising edge interrupt enable + 3 + 1 + read-write + + + FES + Falling edge status + 2 + 1 + read-write + + + HLS + High-level status + 1 + 1 + read-write + + + RES + Rising edge capture status + 0 + 1 + read-write + + + + + BK4TMGCM + BK4TMGCM + Regular memory space timing register + 4 + 0xA8 + 0x20 + read-write + 0xFCFCFCFC + + + CMDHIZT + Regular memory databus High resistance time + 24 + 8 + + + CMHT + Regular memory hold time + 16 + 8 + + + CMWT + Regular memory wait time + 8 + 8 + + + CMST + Regular memory setup time + 0 + 8 + + + + + BK4TMGAT + BK4TMGAT + special memory space timing register + 4 + 0xAC + 0x20 + read-write + 0xFCFCFCFC + + + ATDHIZT + special memory databus High resistance time + 24 + 8 + + + ATHT + special memory hold time + 16 + 8 + + + ATWT + special memory wait time + 8 + 8 + + + ATST + special memory setup time + 0 + 8 + + + + + BK4TMGIO + BK4TMGIO + I/O space timing register 4 + 0xB0 + 0x20 + read-write + 0xFCFCFCFC + + + IODHIZT + WRSTP + 24 + 8 + + + IOHT + HLD + 16 + 8 + + + IOWT + OP + 8 + 8 + + + IOST + STP + 0 + 8 + + + + + BK1TMGWR1 + BK1TMGWR1 + SRAM/NOR-Flash write timing registers + 1 + 0x104 + 0x20 + read-write + 0x0FFFFFFF + + + ASYNCM + Asynchronous mode + 28 + 2 + + + BUSLAT + Bus latency + 16 + 4 + + + DTST + Asynchronous data setup time + 8 + 8 + + + ADDRHT + Address-hold time + 4 + 4 + + + ADDRST + Address setup time + 0 + 4 + + + + + BK1TMGWR2 + BK1TMGWR2 + SRAM/NOR-Flash write timing registers + 2 + 0x10C + 0x20 + read-write + 0x0FFFFFFF + + + ASYNCM + Asynchronous mode + 28 + 2 + + + BUSLAT + Bus latency + 16 + 4 + + + DTST + Asynchronous data setup time + 8 + 8 + + + ADDRHT + Address-hold time + 4 + 4 + + + ADDRST + Address setup time + 0 + 4 + + + + + BK1TMGWR3 + BK1TMGWR3 + SRAM/NOR-Flash write timing registers + 3 + 0x114 + 0x20 + read-write + 0x0FFFFFFF + + + ASYNCM + Asynchronous mode + 28 + 2 + + + BUSLAT + Bus latency + 16 + 4 + + + DTST + Asynchronous data setup time + 8 + 8 + + + ADDRHT + Address-hold time + 4 + 4 + + + ADDRST + Address setup time + 0 + 4 + + + + + BK1TMGWR4 + BK1TMGWR4 + SRAM/NOR-Flash write timing registers + 4 + 0x11C + 0x20 + read-write + 0x0FFFFFFF + + + ASYNCM + Asynchronous mode + 28 + 2 + + + BUSLAT + Bus latency + 16 + 4 + + + DTST + Asynchronous data setup time + 8 + 8 + + + ADDRHT + Address-hold time + 4 + 4 + + + ADDRST + Address setup time + 0 + 4 + + + + + CTRL1 + CTRL1 + SDRAM Control Register 1 + 0x140 + 0x20 + read-write + 0x000002D0 + + + CA + Number of column address + bits + 0 + 2 + + + RA + Number of row address bits + 2 + 2 + + + DB + Memory data bus width + 4 + 2 + + + INBK + Number of internal banks + 6 + 1 + + + CAS + CAS latency + 7 + 2 + + + WRP + Write protection + 9 + 1 + + + CLKDIV + Clock division configuration + 10 + 2 + + + BSTR + Burst read + 12 + 1 + + + RD + Read delay + 13 + 2 + + + + + CTRL2 + CTRL2 + SDRAM Control Register 2 + 0x144 + 0x20 + read-write + 0x000002D0 + + + CA + Number of column address + bits + 0 + 2 + + + RA + Number of row address bits + 2 + 2 + + + DB + Memory data bus width + 4 + 2 + + + INBK + Number of internal banks + 6 + 1 + + + CAS + CAS latency + 7 + 2 + + + WRP + Write protection + 9 + 1 + + + CLKDIV + Clock division configuration + 10 + 2 + + + BSTR + Burst read + 12 + 1 + + + RD + Read pipe + 13 + 2 + + + + + TM1 + TM1 + SDRAM Timing register 1 + 0x148 + 0x20 + read-write + 0x0FFFFFFF + + + TMRD + Mode register program to active delay + 0 + 4 + + + TXSR + Exit Self-refresh to active delay + 4 + 4 + + + TRAS + Self refresh time + 8 + 4 + + + TRC + Refresh to active delay + 12 + 4 + + + TWR + Write Recovery delay + 16 + 4 + + + TRP + Precharge to active delay + 20 + 4 + + + TRCD + Row active to Read/Write delay + 24 + 4 + + + + + TM2 + TM2 + SDRAM Timing register 2 + 0x14C + 0x20 + read-write + 0x0FFFFFFF + + + TMRD + Mode register program to active delay + 0 + 4 + + + TXSR + Exit Self-refresh to active delay + 4 + 4 + + + TRAS + Self refresh time + 8 + 4 + + + TRC + Refresh to active delay + 12 + 4 + + + TWR + Write Recovery delay + 16 + 4 + + + TRP + Precharge to active delay + 20 + 4 + + + TRCD + Row active to Read/Write delay + 24 + 4 + + + + + CMD + CMD + SDRAM Command Mode register + 0x150 + 0x20 + 0x00000000 + + + CMD + SDRAM Command + 0 + 3 + write-only + + + BK2 + SDRAM Bank 2 + 3 + 1 + write-only + + + BK1 + SDRAM Bank 1 + 4 + 1 + write-only + + + ART + Auto-refresh times + 5 + 4 + read-write + + + MRD + Mode register data + 9 + 13 + read-write + + + + + RCNT + RCNT + SDRAM Refresh Timer register + 0x154 + 0x20 + 0x00000000 + + + ERRC + error flag clear + 0 + 1 + write-only + + + RC + Refresh Count + 1 + 13 + read-write + + + ERIEN + error Interrupt Enable + 14 + 1 + read-write + + + + + STS + STS + SDRAM Status register + 0x158 + 0x20 + read-only + 0x00000000 + + + ERR + error flag + 0 + 1 + + + BK1STS + Bank 1 Status + 1 + 2 + + + BK2STS + Bank 2 Status + 3 + 2 + + + BUSY + Busy status + 5 + 1 + + + + + EXT1 + EXT1 + externl timeing register 1 + 0x220 + 0x20 + read-write + 0x00000808 + + + BUSLATW2W + Bus turnaround phase for consecutive write duration + 0 + 8 + + + BUSLATR2R + Bus turnaround phase for consecutive read duration + 8 + 8 + + + + + EXT2 + EXT2 + externl timeing register 2 + 0x224 + 0x20 + read-write + 0x00000808 + + + BUSLATW2W + Bus turnaround phase for consecutive write duration + 0 + 8 + + + BUSLATR2R + Bus turnaround phase for consecutive read duration + 8 + 8 + + + + + EXT3 + EXT3 + externl timeing register 3 + 0x228 + 0x20 + read-write + 0x00000808 + + + BUSLATW2W + Bus turnaround phase for consecutive write duration + 0 + 8 + + + BUSLATR2R + Bus turnaround phase for consecutive read duration + 8 + 8 + + + + + EXT4 + EXT4 + externl timeing register 4 + 0x22C + 0x20 + read-write + 0x00000808 + + + BUSLATW2W + Bus turnaround phase for consecutive write duration + 0 + 8 + + + BUSLATR2R + Bus turnaround phase for consecutive read duration + 8 + 8 + + + + + + + PWC + Power control + PWC + 0x40007000 + + 0x0 + 0x400 + registers + + + + CTRL + CTRL + Power control register + (PWC_CTRL) + 0x0 + 0x20 + read-write + 0x00000000 + + + VRSEL + Voltage regulator state select when deepsleep mode + 0 + 1 + + + LPSEL + Low power mode select when Cortex-M4F sleepdeep + 1 + 1 + + + CLSWEF + Clear SWEF flag + 2 + 1 + + + CLSEF + Clear SEF flag + 3 + 1 + + + PVMEN + Power voltage monitoring enable + 4 + 1 + + + PVMSEL + Power voltage monitoring boundary select + 5 + 3 + + + BPWEN + Battery powered domain write enable + 8 + 1 + + + + + CTRLSTS + CTRLSTS + Power control and status register + (PWC_CTRLSTS) + 0x4 + 0x20 + 0x00000000 + + + SWEF + Standby wake-up event flag + 0 + 1 + read-only + + + SEF + Standby mode entry flag + 1 + 1 + read-only + + + PVMOF + Power voltage monitoring output flag + 2 + 1 + read-only + + + SWPEN1 + Standby wake-up pin 1 enable + 8 + 1 + read-write + + + SWPEN2 + Standby wake-up pin 2 enable + 9 + 1 + read-write + + + + + LDOOV + LDOOV + LDO output voltage register + 0x10 + 0x20 + 0x00000000 + + + LDOOVSEL + LDO output voltage select + 0 + 3 + read-write + + + + + + + CRM + Clock and reset management + CRM + 0x40023800 + + 0x0 + 0x400 + registers + + + CRM + CRM global interrupt + 5 + + + + CTRL + CTRL + Clock control register + 0x0 + 0x20 + 0x00000083 + + + HICKEN + High speed internal clock enable + 0 + 1 + read-write + + + HICKSTBL + High speed internal clock ready flag + 1 + 1 + read-only + + + HICKTRIM + High speed internal clock trimming + 2 + 6 + read-write + + + HICKCAL + High speed internal clock calibration + 8 + 8 + read-only + + + HEXTEN + High speed exernal crystal enable + 16 + 1 + read-write + + + HEXTSTBL + High speed exernal crystal ready flag + 17 + 1 + read-only + + + HEXTBYPS + High speed exernal crystal bypass + 18 + 1 + read-write + + + CFDEN + Clock failure detection enable + 19 + 1 + read-write + + + PLLEN + PLL enable + 24 + 1 + read-write + + + PLLSTBL + PLL clock ready flag + 25 + 1 + read-only + + + + + PLLCFG + PLLCFG + PLL configuration register + (CRM_PLLCFG) + 0x4 + 0x20 + 0x00033002 + + + PLL_MS + PLL pre-division + 0 + 4 + read-write + + + PLL_NS + PLL frequency multiplication factor + 6 + 9 + read-write + + + PLL_FR + PLL post-division + 16 + 3 + read-write + + + PLLRCS + PLL reference clock select + 22 + 1 + read-write + + + + + CFG + CFG + Clock configuration register(CRM_CFG) + 0x8 + 0x20 + 0x00000000 + + + SCLKSEL + System clock select + 0 + 2 + read-write + + + SCLKSTS + System Clock select Status + 2 + 2 + read-only + + + AHBDIV + AHB division + 4 + 4 + read-write + + + APB1DIV + APB1 division + 10 + 3 + read-write + + + APB2DIV + APB2 division + 13 + 3 + read-write + + + ERTCDIV + HEXT division for ERTC clock + 16 + 5 + read-write + + + CLKOUT1_SEL + Clock output1 selection + 21 + 2 + read-write + + + CLKOUT1DIV1 + Clock output1 division1 + 24 + 3 + read-write + + + CLKOUT2DIV1 + Clock output2 division1 + 27 + 3 + read-write + + + CLKOUT2_SEL1 + Clock output2 selection1 + 30 + 2 + read-write + + + + + CLKINT + CLKINT + Clock interrupt register + (CRM_CLKINT) + 0xC + 0x20 + 0x00000000 + + + LICKSTBLF + LICK ready interrupt flag + 0 + 1 + read-only + + + LEXTSTBLF + LEXT ready interrupt flag + 1 + 1 + read-only + + + HICKSTBLF + HICK ready interrupt flag + 2 + 1 + read-only + + + HEXTSTBLF + HEXT ready interrupt flag + 3 + 1 + read-only + + + PLLSTBLF + PLL ready interrupt flag + 4 + 1 + read-only + + + CFDF + Clock failure detection interrupt flag + 7 + 1 + read-only + + + LICKSTBLIEN + LICK ready interrupt enable + 8 + 1 + read-write + + + LEXTSTBLIEN + LEXT ready interrupt enable + 9 + 1 + read-write + + + HICKSTBLIEN + HICK ready interrupt enable + 10 + 1 + read-write + + + HEXTSTBLIEN + HEXT ready interrupt enable + 11 + 1 + read-write + + + PLLSTBLIEN + PLL ready interrupt enable + 12 + 1 + read-write + + + LICKSTBLFC + LICK ready interrupt clear + 16 + 1 + write-only + + + LEXTSTBLFC + LEXT ready interrupt clear + 17 + 1 + write-only + + + HICKSTBLFC + HICK ready interrupt clear + 18 + 1 + write-only + + + HEXTSTBLFC + HEXT ready interrupt clear + 19 + 1 + write-only + + + PLLSTBLFC + PLL ready interrupt clear + 20 + 1 + write-only + + + CFDFC + Clock failure detection interrupt clear + 23 + 1 + write-only + + + + + AHBRST1 + AHBRST1 + AHB peripheral reset register1 + (CRM_AHBRST1) + 0x10 + 0x20 + read-write + 0x000000000 + + + GPIOARST + IO port A reset + 0 + 1 + + + GPIOBRST + IO port B reset + 1 + 1 + + + GPIOCRST + IO port C reset + 2 + 1 + + + GPIODRST + IO port D reset + 3 + 1 + + + GPIOERST + IO port E reset + 4 + 1 + + + GPIOFRST + IO port F reset + 5 + 1 + + + GPIOGRST + IO port G reset + 6 + 1 + + + GPIOHRST + IO port H reset + 7 + 1 + + + CRCRST + CRC reset + 12 + 1 + + + EDMARST + EDMA reset + 21 + 1 + + + DMA1RST + DMA1 reset + 22 + 1 + + + DMA2RST + DMA2 reset + 24 + 1 + + + EMACRST + EMAC reset + 25 + 1 + + + OTGFS2RST + OTGFS2 interface reset + 29 + 1 + + + + + AHBRST2 + AHBRST2 + AHB peripheral reset register 2 + (CRM_AHBRST2) + 0x14 + 0x20 + read-write + 0x00000000 + + + DVPRST + DVP reset + 0 + 1 + + + OTGFS1RST + OTGFS1 reset + 7 + 1 + + + SDIO1RST + SDIO1 reset + 15 + 1 + + + + + AHBRST3 + AHBRST3 + AHB peripheral reset register 3 + (CRM_AHBRST3) + 0x18 + 0x20 + read-write + 0x00000000 + + + XMCRST + XMC reset + 0 + 1 + + + QSPI1RST + QSPI1 reset + 1 + 1 + + + QSPI2RST + QSPI2 reset + 14 + 1 + + + SDIO2RST + SDIO2 reset + 15 + 1 + + + + + APB1RST + APB1RST + APB1 peripheral reset register + (CRM_APB1RST) + 0x20 + 0x20 + read-write + 0x00000000 + + + TMR2RST + Timer2 reset + 0 + 1 + + + TMR3RST + Timer3 reset + 1 + 1 + + + TMR4RST + Timer4 reset + 2 + 1 + + + TMR5RST + Timer5 reset + 3 + 1 + + + TMR6RST + Timer6 reset + 4 + 1 + + + TMR7RST + Timer7 reset + 5 + 1 + + + TMR12RST + Timer12 reset + 6 + 1 + + + TMR13RST + Timer13 reset + 7 + 1 + + + TMR14RST + Timer14 reset + 8 + 1 + + + WWDTRST + Window watchdog reset + 11 + 1 + + + SPI2RST + SPI2 reset + 14 + 1 + + + SPI3RST + SPI3 reset + 15 + 1 + + + USART2RST + USART2 reset + 17 + 1 + + + USART3RST + USART3 reset + 18 + 1 + + + UART4RST + UART4 reset + 19 + 1 + + + UART5RST + UART5 reset + 20 + 1 + + + I2C1RST + I2C1 reset + 21 + 1 + + + I2C2RST + I2C2 reset + 22 + 1 + + + I2C3RST + I2C3 reset + 23 + 1 + + + CAN1RST + CAN1 reset + 25 + 1 + + + CAN2RST + CAN2 reset + 26 + 1 + + + PWCRST + PWC reset + 28 + 1 + + + DACRST + DAC reset + 29 + 1 + + + UART7RST + UART7 reset + 30 + 1 + + + UART8RST + UART8 reset + 31 + 1 + + + + + APB2RST + APB2RST + APB2 peripheral reset register + (CRM_APB2RST) + 0x24 + 0x20 + read-write + 0x00000000 + + + TMR1RST + Timer1 reset + 0 + 1 + + + TMR8RST + Timer8 reset + 1 + 1 + + + USART1RST + USART1 reset + 4 + 1 + + + USART6RST + USART6 reset + 5 + 1 + + + ADCRST + ADC reset + 8 + 1 + + + SPI1RST + SPI1 reset + 12 + 1 + + + SPI4RST + SPI4 reset + 13 + 1 + + + SCFGRST + SCFG reset + 14 + 1 + + + TMR9RST + Timer9 reset + 16 + 1 + + + TMR10RST + Timer10 reset + 17 + 1 + + + TMR11RST + Timer 11 reset + 18 + 1 + + + TMR20RST + Timer20 reset + 20 + 1 + + + ACCRST + ACC reset + 29 + 1 + + + + + AHBEN1 + AHBEN1 + AHB Peripheral Clock enable register 1 + (CRM_AHBEN1) + 0x30 + 0x20 + read-write + 0x00000000 + + + GPIOAEN + IO A clock enable + 0 + 1 + + + GPIOBEN + IO B clock enable + 1 + 1 + + + GPIOCEN + IO C clock enable + 2 + 1 + + + GPIODEN + IO D clock enable + 3 + 1 + + + GPIOEEN + IO E clock enable + 4 + 1 + + + GPIOFEN + IO F clock enable + 5 + 1 + + + GPIOGEN + IO G clock enable + 6 + 1 + + + GPIOHEN + IO H clock enable + 7 + 1 + + + CRCEN + CRC clock enable + 12 + 1 + + + EDMAEN + DMA1 clock enable + 21 + 1 + + + DMA1EN + DMA1 clock enable + 22 + 1 + + + DMA2EN + DMA2 clock enable + 24 + 1 + + + EMACEN + EMAC clock enable + 25 + 1 + + + EMACTXEN + EMAC Tx clock enable + 26 + 1 + + + EMACRXEN + EMAC Rx clock enable + 27 + 1 + + + EMACPTPEN + EMAC PTP clock enable + 28 + 1 + + + OTGFS2EN + OTGFS2 clock enable + 29 + 1 + + + + + AHBEN2 + AHBEN2 + AHB peripheral clock enable register 2 + (CRM_AHBEN2) + 0x34 + 0x20 + read-write + 0x00000000 + + + DVPEN + DVP clock enable + 0 + 1 + + + OTGFS1EN + OTGFS1 clock enable + 7 + 1 + + + SDIO1EN + SDIO1 clock enable + 15 + 1 + + + + + AHBEN3 + AHBEN3 + AHB peripheral clock enable register 3 + (CRM_AHBEN3) + 0x38 + 0x20 + read-write + 0x00000000 + + + XMCEN + XMC clock enable + 0 + 1 + + + QSPI1EN + QSPI1 clock enable + 1 + 1 + + + QSPI2EN + QSPI2 clock enable + 14 + 1 + + + SDIO2EN + SDIO 2 clock enable + 15 + 1 + + + + + APB1EN + APB1EN + APB1 peripheral clock enable register + (CRM_APB1EN) + 0x40 + 0x20 + read-write + 0x00000000 + + + TMR2EN + Timer2 clock enable + 0 + 1 + + + TMR3EN + Timer3 clock enable + 1 + 1 + + + TMR4EN + Timer4 clock enable + 2 + 1 + + + TMR5EN + Timer5 clock enable + 3 + 1 + + + TMR6EN + Timer6 clock enable + 4 + 1 + + + TMR7EN + Timer7 clock enable + 5 + 1 + + + TMR12EN + Timer12 clock enable + 6 + 1 + + + TMR13EN + Timer13 clock enable + 7 + 1 + + + TMR14EN + Timer14 clock enable + 8 + 1 + + + WWDTEN + WWDT clock enable + 11 + 1 + + + SPI2EN + SPI2 clock enable + 14 + 1 + + + SPI3EN + SPI3 clock enable + 15 + 1 + + + USART2EN + USART2 clock enable + 17 + 1 + + + USART3EN + USART3 clock enable + 18 + 1 + + + UART4EN + UART4 clock enable + 19 + 1 + + + UART5EN + UART5 clock enable + 20 + 1 + + + I2C1EN + I2C1 clock enable + 21 + 1 + + + I2C2EN + I2C2 clock enable + 22 + 1 + + + I2C3EN + I2C3 clock enable + 23 + 1 + + + CAN1EN + CAN1 clock enable + 25 + 1 + + + CAN2EN + CAN2 clock enable + 26 + 1 + + + PWCEN + PWC clock enable + 28 + 1 + + + DACEN + DAC clock enable + 29 + 1 + + + UART7EN + UART7 clock enable + 30 + 1 + + + UART8EN + UART8 clock enable + 31 + 1 + + + + + APB2EN + APB2EN + APB2 peripheral clock enable register + (CRM_APB2EN) + 0x44 + 0x20 + read-write + 0x00000000 + + + TMR1EN + Timer1 clock enable + 0 + 1 + + + TMR8EN + Timer8 clock enable + 1 + 1 + + + USART1EN + USART1 clock enable + 4 + 1 + + + USART6EN + USART6 clock enable + 5 + 1 + + + ADC1EN + ADC1 clock enable + 8 + 1 + + + ADC2EN + ADC2 clock enable + 9 + 1 + + + ADC3EN + ADC3 clock enable + 10 + 1 + + + SPI1EN + SPI1 clock enable + 12 + 1 + + + SPI4EN + SPI4 clock enable + 13 + 1 + + + SCFGEN + SCFG clock enable + 14 + 1 + + + TMR9EN + Timer9 clock enable + 16 + 1 + + + TMR10EN + Timer10 clock enable + 17 + 1 + + + TMR11EN + Timer11 clock enable + 18 + 1 + + + TMR20EN + Timer20 clock enable + 20 + 1 + + + ACCEN + ACC clock enable + 29 + 1 + + + + + AHBLPEN1 + AHBLPEN1 + AHB Low-power Peripheral Clock enable + register 1 (CRM_AHBLPEN1) + 0x50 + 0x20 + read-write + 0x3E6390FF + + + GPIOALPEN + IO A clock enable during sleep mode + 0 + 1 + + + GPIOBLPEN + IO B clock enable during sleep mode + 1 + 1 + + + GPIOCLPEN + IO C clock enable during sleep mode + 2 + 1 + + + GPIODLPEN + IO D clock enable during sleep mode + 3 + 1 + + + GPIOELPEN + IO E clock enable during sleep mode + 4 + 1 + + + GPIOFLPEN + IO F clock enable during sleep mode + 5 + 1 + + + GPIOGLPEN + IO G clock enable during sleep mode + 6 + 1 + + + GPIOHLPEN + IO H clock enable during sleep mode + 7 + 1 + + + CRCLPEN + CRC clock enable during sleep mode + 12 + 1 + + + FLASHLPEN + Flash clock enable during sleep mode + 15 + 1 + + + SRAM1LPEN + SRAM1 clock enable during sleep mode + 16 + 1 + + + SRAM2LPEN + SRAM2 clock enable during sleep mode + 17 + 1 + + + EDMALPEN + EDMA clock enable during sleep mode + 21 + 1 + + + DMA1LPEN + DMA1 clock enable during sleep mode + 22 + 1 + + + DMA2LPEN + DMA2 clock enable during sleep mode + 24 + 1 + + + EMACLPEN + EMAC clock enable during sleep mode + 25 + 1 + + + EMACTXLPEN + EMAC Tx clock enable during sleep mode + 26 + 1 + + + EMACRXLPEN + EMAC Rx clock enable during sleep mode + 27 + 1 + + + EMACPTPLPEN + EMAC PTP clock enable during sleep mode + 28 + 1 + + + OTGFS2LPEN + OTGFS2 clock enable during sleep mode + 29 + 1 + + + + + AHBLPEN2 + AHBLPEN2 + AHB peripheral Low-power clock + enable register 2 (CRM_AHBLPEN2) + 0x54 + 0x20 + read-write + 0x00008081 + + + DVPLPEN + DVP clock enable during sleep mode + 0 + 1 + + + OTGFS1LPEN + OTGFS1 clock enable during sleep mode + 7 + 1 + + + SDIO1LPEN + SDIO1 clock enable during sleep mode + 15 + 1 + + + + + AHBLPEN3 + AHBLPEN3 + AHB peripheral Low-power clock + enable register 3 (CRM_AHBLPEN3) + 0x58 + 0x20 + read-write + 0x0000C003 + + + XMCLPEN + XMC clock enable during sleep mode + 0 + 1 + + + QSPI1LPEN + QSPI1 clock enable during sleep mode + 1 + 1 + + + QSPI2LPEN + QSPI2 clock enable during sleep mode + 14 + 1 + + + SDIO2LPEN + SDIO2 clock enable during sleep mode + 15 + 1 + + + + + APB1LPEN + APB1LPEN + APB1 peripheral Low-power clock + enable register (CRM_APB1LPEN) + 0x60 + 0x20 + read-write + 0xF6FEE9FF + + + TMR2LPEN + Timer2 clock enable during sleep mode + 0 + 1 + + + TMR3LPEN + Timer3 clock enable during sleep mode + 1 + 1 + + + TMR4LPEN + Timer4 clock enable during sleep mode + 2 + 1 + + + TMR5LPEN + Timer5 clock enable during sleep mode + 3 + 1 + + + TMR6LPEN + Timer6 clock enable during sleep mode + 4 + 1 + + + TMR7LPEN + Timer7 clock enable during sleep mode + 5 + 1 + + + TMR12LPEN + Timer12 clock enable during sleep mode + 6 + 1 + + + TMR13LPEN + Timer13 clock enable during sleep mode + 7 + 1 + + + TMR14LPEN + Timer14 clock enable during sleep mode + 8 + 1 + + + WWDTLPEN + WWDT clock enable during sleep mode + 11 + 1 + + + SPI2LPEN + SPI2 clock enable during sleep mode + 14 + 1 + + + SPI3LPEN + SPI3 clock enable during sleep mode + 15 + 1 + + + USART2LPEN + USART2 clock enable during sleep mode + 17 + 1 + + + USART3LPEN + USART3 clock enable during sleep mode + 18 + 1 + + + UART4LPEN + UART4 clock enable during sleep mode + 19 + 1 + + + UART5LPEN + UART5 clock enable during sleep mode + 20 + 1 + + + I2C1CPEN + I2C1 clock enable during sleep mode + 21 + 1 + + + I2C2CPEN + I2C2 clock enable during sleep mode + 22 + 1 + + + I2C3CPEN + I2C3 clock enable during sleep mode + 23 + 1 + + + CAN1LPEN + CAN1 clock enable during sleep mode + 25 + 1 + + + CAN2LPEN + CAN2 clock enable during sleep mode + 26 + 1 + + + PWCLPEN + PWC clock enable during sleep mode + 28 + 1 + + + DACLPEN + DAC clock enable during sleep mode + 29 + 1 + + + UART7LPEN + UART7 clock enable during sleep mode + 30 + 1 + + + UART8LPEN + UART8 clock enable during sleep mode + 31 + 1 + + + + + APB2LPEN + APB2LPEN + APB2 peripheral Low-power clock + enable register (CRM_APB2LPEN) + 0x64 + 0x20 + read-write + 0x20177733 + + + TMR1LPEN + Timer1 clock enable during sleep mode + 0 + 1 + + + TMR8LPEN + Timer8 clock enable during sleep mode + 1 + 1 + + + USART1LPEN + USART1 clock enable during sleep mode + 4 + 1 + + + USART6LPEN + USART6 clock enable during sleep mode + 5 + 1 + + + ADC1CPEN + ADC1 clock enable during sleep mode + 8 + 1 + + + ADC2CPEN + ADC2 clock enable during sleep mode + 9 + 1 + + + ADC3EN + ADC3 clock enable during sleep mode + 10 + 1 + + + SPI1LPEN + SPI1 clock enable during sleep mode + 12 + 1 + + + SPI4LPEN + SPI4 clock enable during sleep mode + 13 + 1 + + + SCFGLPEN + SCFG clock enable during sleep mode + 14 + 1 + + + TMR9LPEN + Timer9 clock enable during sleep mode + 16 + 1 + + + TMR10LPEN + Timer10 clock enable during sleep mode + 17 + 1 + + + TMR11LPEN + Timer11 clock enable during sleep mode + 18 + 1 + + + TMR20LPEN + Timer20 clock enable during sleep mode + 20 + 1 + + + ACCLPEN + ACC clock enable during sleep mode + 29 + 1 + + + + + BPDC + BPDC + Battery powered domain control register + (CRM_BPDC) + 0x70 + 0x20 + 0x00000000 + + + LEXTEN + Low speed external crystal enable + 0 + 1 + read-write + + + LEXTSTBL + Low speed external crystal ready + 1 + 1 + read-only + + + LEXTBYPS + Low speed external crystal bypass + 2 + 1 + read-write + + + ERTCSEL + ERTC clock source selection + 8 + 2 + read-write + + + ERTCEN + ERTC clock enable + 15 + 1 + read-write + + + BPDRST + Battery powered domain software reset + 16 + 1 + read-write + + + + + CTRLSTS + CTRLSTS + Control/status register + (CRM_CTRLSTS) + 0x74 + 0x20 + 0x0C000000 + + + LICKEN + Low speed internal clock enable + 0 + 1 + read-write + + + LICKSTBL + Low speed internal clock ready + 1 + 1 + read-only + + + RSTFC + Reset reset flag + 24 + 1 + read-write + + + NRSTF + PIN reset flag + 26 + 1 + read-write + + + PORRSTF + POR/LVR reset flag + 27 + 1 + read-write + + + SWRSTF + Software reset flag + 28 + 1 + read-write + + + WDTRSTF + Watchdog timer reset flag + 29 + 1 + read-write + + + WWDTRSTF + Window watchdog timer reset flag + 30 + 1 + read-write + + + LPRSTF + Low-power reset flag + 31 + 1 + read-write + + + + + MISC1 + MISC1 + Miscellaneous register1 + 0xA0 + 0x20 + 0x00000000 + + + HICKCAL_KEY + HICKCAL write key value + 0 + 8 + read-write + + + HICKDIV + HICK 6 divider selection + 12 + 1 + read-write + + + HICK_TO_USB + HICK to usb clock + 13 + 1 + read-write + + + HICK_TO_SCLK + HICK to system clock + 14 + 1 + read-write + + + CLKOUT2_SEL2 + Clock output2 select2 + 16 + 4 + read-write + + + CLKOUT1DIV2 + Clock output1 division2 + 24 + 4 + read-write + + + CLKOUT2DIV2 + Clock output2 division2 + 28 + 4 + read-write + + + + + MISC2 + MISC2 + Miscellaneous register2 + 0xA4 + 0x20 + 0x0000000D + + + AUTO_STEP_EN + AUTO_STEP_EN + 4 + 2 + read-write + + + CLK_TO_TMR + Clock output internal connect to timer10 + 8 + 1 + read-write + + + USBDIV + USB division + 12 + 4 + read-write + + + + + + + GPIOA + General purpose I/Os + GPIO + 0x40020000 + + 0x0 + 0x400 + registers + + + + CFGR + CFGR + GPIO configuration register + 0x0 + 0x20 + read-write + 0x00000000 + + + IOMC15 + GPIOx pin 15 mode configurate + 30 + 2 + + + IOMC14 + GPIOx pin 14 mode configurate + 28 + 2 + + + IOMC13 + GPIOx pin 13 mode configurate + 26 + 2 + + + IOMC12 + GPIOx pin 12 mode configurate + 24 + 2 + + + IOMC11 + GPIOx pin 11 mode configurate + 22 + 2 + + + IOMC10 + GPIOx pin 10 mode configurate + 20 + 2 + + + IOMC9 + GPIOx pin 9 mode configurate + 18 + 2 + + + IOMC8 + GPIOx pin 8 mode configurate + 16 + 2 + + + IOMC7 + GPIOx pin 7 mode configurate + 14 + 2 + + + IOMC6 + GPIOx pin 6 mode configurate + 12 + 2 + + + IOMC5 + GPIOx pin 5 mode configurate + 10 + 2 + + + IOMC4 + GPIOx pin 4 mode configurate + 8 + 2 + + + IOMC3 + GPIOx pin 3 mode configurate + 6 + 2 + + + IOMC2 + GPIOx pin 2 mode configurate + 4 + 2 + + + IOMC1 + GPIOx pin 1 mode configurate + 2 + 2 + + + IOMC0 + GPIOx pin 0 mode configurate + 0 + 2 + + + + + OMODE + OMODE + GPIO output mode register + 0x4 + 0x20 + read-write + 0x00000000 + + + OM15 + GPIOx pin 15 outpu mode configurate + 15 + 1 + + + OM14 + GPIOx pin 14 outpu mode configurate + 14 + 1 + + + OM13 + GPIOx pin 13 outpu mode configurate + 13 + 1 + + + OM12 + GPIOx pin 12 outpu mode configurate + 12 + 1 + + + OM11 + GPIOx pin 11 outpu mode configurate + 11 + 1 + + + OM10 + GPIOx pin 10 outpu mode configurate + 10 + 1 + + + OM9 + GPIOx pin 9 outpu mode configurate + 9 + 1 + + + OM8 + GPIOx pin 8 outpu mode configurate + 8 + 1 + + + OM7 + GPIOx pin 7 outpu mode configurate + 7 + 1 + + + OM6 + GPIOx pin 6 outpu mode configurate + 6 + 1 + + + OM5 + GPIOx pin 5 outpu mode configurate + 5 + 1 + + + OM4 + GPIOx pin 4 outpu mode configurate + 4 + 1 + + + OM3 + GPIOx pin 3 outpu mode configurate + 3 + 1 + + + OM2 + GPIOx pin 2 outpu mode configurate + 2 + 1 + + + OM1 + GPIOx pin 1 outpu mode configurate + 1 + 1 + + + OM0 + GPIOx pin 0 outpu mode configurate + 0 + 1 + + + + + ODRVR + ODRVR + GPIO drive capability register + 0x8 + 0x20 + read-write + 0x00000000 + + + ODRV15 + GPIOx pin 15 output drive capability + 30 + 2 + + + ODRV14 + GPIOx pin 14 output drive capability + 28 + 2 + + + ODRV13 + GPIOx pin 13 output drive capability + 26 + 2 + + + ODRV12 + GPIOx pin 12 output drive capability + 24 + 2 + + + ODRV11 + GPIOx pin 11 output drive capability + 22 + 2 + + + ODRV10 + GPIOx pin 10 output drive capability + 20 + 2 + + + ODRV9 + GPIOx pin 9 output drive capability + 18 + 2 + + + ODRV8 + GPIOx pin 8 output drive capability + 16 + 2 + + + ODRV7 + GPIOx pin 7 output drive capability + 14 + 2 + + + ODRV6 + GPIOx pin 6 output drive capability + 12 + 2 + + + ODRV5 + GPIOx pin 5 output drive capability + 10 + 2 + + + ODRV4 + GPIOx pin 4 output drive capability + 8 + 2 + + + ODRV3 + GPIOx pin 3 output drive capability + 6 + 2 + + + ODRV2 + GPIOx pin 2 output drive capability + 4 + 2 + + + ODRV1 + GPIOx pin 1 output drive capability + 2 + 2 + + + ODRV0 + GPIOx pin 0 output drive capability + 0 + 2 + + + + + PULL + PULL + GPIO pull-up/pull-down register + 0xC + 0x20 + read-write + 0x00000000 + + + PULL15 + GPIOx pin 15 pull configuration + 30 + 2 + + + PULL14 + GPIOx pin 14 pull configuration + 28 + 2 + + + PULL13 + GPIOx pin 13 pull configuration + 26 + 2 + + + PULL12 + GPIOx pin 12 pull configuration + 24 + 2 + + + PULL11 + GPIOx pin 11 pull configuration + 22 + 2 + + + PULL10 + GPIOx pin 10 pull configuration + 20 + 2 + + + PULL9 + GPIOx pin 9 pull configuration + 18 + 2 + + + PULL8 + GPIOx pin 8 pull configuration + 16 + 2 + + + PULL7 + GPIOx pin 7 pull configuration + 14 + 2 + + + PULL6 + GPIOx pin 6 pull configuration + 12 + 2 + + + PULL5 + GPIOx pin 5 pull configuration + 10 + 2 + + + PULL4 + GPIOx pin 4 pull configuration + 8 + 2 + + + PULL3 + GPIOx pin 3 pull configuration + 6 + 2 + + + PULL2 + GPIOx pin 2 pull configuration + 4 + 2 + + + PULL1 + GPIOx pin 1 pull configuration + 2 + 2 + + + PULL0 + GPIOx pin 0 pull configuration + 0 + 2 + + + + + IDT + IDT + GPIO input data register + 0x10 + 0x20 + read-only + 0x00000000 + + + IDT0 + Port input data + 0 + 1 + + + IDT1 + Port input data + 1 + 1 + + + IDT2 + Port input data + 2 + 1 + + + IDT3 + Port input data + 3 + 1 + + + IDT4 + Port input data + 4 + 1 + + + IDT5 + Port input data + 5 + 1 + + + IDT6 + Port input data + 6 + 1 + + + IDT7 + Port input data + 7 + 1 + + + IDT8 + Port input data + 8 + 1 + + + IDT9 + Port input data + 9 + 1 + + + IDT10 + Port input data + 10 + 1 + + + IDT11 + Port input data + 11 + 1 + + + IDT12 + Port input data + 12 + 1 + + + IDT13 + Port input data + 13 + 1 + + + IDT14 + Port input data + 14 + 1 + + + IDT15 + Port input data + 15 + 1 + + + + + ODT + ODT + GPIO output data register + 0x14 + 0x20 + read-write + 0x00000000 + + + ODT0 + Port output data + 0 + 1 + + + ODT1 + Port output data + 1 + 1 + + + ODT2 + Port output data + 2 + 1 + + + ODT3 + Port output data + 3 + 1 + + + ODT4 + Port output data + 4 + 1 + + + ODT5 + Port output data + 5 + 1 + + + ODT6 + Port output data + 6 + 1 + + + ODT7 + Port output data + 7 + 1 + + + ODT8 + Port output data + 8 + 1 + + + ODT9 + Port output data + 9 + 1 + + + ODT10 + Port output data + 10 + 1 + + + ODT11 + Port output data + 11 + 1 + + + ODT12 + Port output data + 12 + 1 + + + ODT13 + Port output data + 13 + 1 + + + ODT14 + Port output data + 14 + 1 + + + ODT15 + Port output data + 15 + 1 + + + + + SCR + SCR + Port bit set/clear register + 0x18 + 0x20 + write-only + 0x00000000 + + + IOSB0 + Set bit 0 + 0 + 1 + + + IOSB1 + Set bit 1 + 1 + 1 + + + IOSB2 + Set bit 1 + 2 + 1 + + + IOSB3 + Set bit 3 + 3 + 1 + + + IOSB4 + Set bit 4 + 4 + 1 + + + IOSB5 + Set bit 5 + 5 + 1 + + + IOSB6 + Set bit 6 + 6 + 1 + + + IOSB7 + Set bit 7 + 7 + 1 + + + IOSB8 + Set bit 8 + 8 + 1 + + + IOSB9 + Set bit 9 + 9 + 1 + + + IOSB10 + Set bit 10 + 10 + 1 + + + IOSB11 + Set bit 11 + 11 + 1 + + + IOSB12 + Set bit 12 + 12 + 1 + + + IOSB13 + Set bit 13 + 13 + 1 + + + IOSB14 + Set bit 14 + 14 + 1 + + + IOSB15 + Set bit 15 + 15 + 1 + + + IOCB0 + Clear bit 0 + 16 + 1 + + + IOCB1 + Clear bit 1 + 17 + 1 + + + IOCB2 + Clear bit 2 + 18 + 1 + + + IOCB3 + Clear bit 3 + 19 + 1 + + + IOCB4 + Clear bit 4 + 20 + 1 + + + IOCB5 + Clear bit 5 + 21 + 1 + + + IOCB6 + Clear bit 6 + 22 + 1 + + + IOCB7 + Clear bit 7 + 23 + 1 + + + IOCB8 + Clear bit 8 + 24 + 1 + + + IOCB9 + Clear bit 9 + 25 + 1 + + + IOCB10 + Clear bit 10 + 26 + 1 + + + IOCB11 + Clear bit 11 + 27 + 1 + + + IOCB12 + Clear bit 12 + 28 + 1 + + + IOCB13 + Clear bit 13 + 29 + 1 + + + IOCB14 + Clear bit 14 + 30 + 1 + + + IOCB15 + Clear bit 15 + 31 + 1 + + + + + WPR + WPR + Port write protect + register + 0x1C + 0x20 + read-write + 0x00000000 + + + WPEN0 + Write protect enable 0 + 0 + 1 + + + WPEN1 + Write protect enable 1 + 1 + 1 + + + WPEN2 + Write protect enable 2 + 2 + 1 + + + WPEN3 + Write protect enable 3 + 3 + 1 + + + WPEN4 + Write protect enable 4 + 4 + 1 + + + WPEN5 + Write protect enable 5 + 5 + 1 + + + WPEN6 + Write protect enable 6 + 6 + 1 + + + WPEN7 + Write protect enable 7 + 7 + 1 + + + WPEN8 + Write protect enable 8 + 8 + 1 + + + WPEN9 + Write protect enable 9 + 9 + 1 + + + WPEN10 + Write protect enable 10 + 10 + 1 + + + WPEN11 + Write protect enable 11 + 11 + 1 + + + WPEN12 + Write protect enable 12 + 12 + 1 + + + WPEN13 + Write protect enable 13 + 13 + 1 + + + WPEN14 + Write protect enable 14 + 14 + 1 + + + WPEN15 + Write protect enable 15 + 15 + 1 + + + WPSEQ + Write protect sequence + 16 + 1 + + + + + MUXL + MUXL + GPIO muxing function low register + 0x20 + 0x20 + read-write + 0x00000000 + + + MUXL7 + GPIOx pin 7 muxing + 28 + 4 + + + MUXL6 + GPIOx pin 6 muxing + 24 + 4 + + + MUXL5 + GPIOx pin 5 muxing + 20 + 4 + + + MUXL4 + GPIOx pin 4 muxing + 16 + 4 + + + MUXL3 + GPIOx pin 3 muxing + 12 + 4 + + + MUXL2 + GPIOx pin 2 muxing + 8 + 4 + + + MUXL1 + GPIOx pin 1 muxing + 4 + 4 + + + MUXL0 + GPIOx pin 0 muxing + 0 + 4 + + + + + MUXH + MUXH + GPIO muxing function high register + 0x24 + 0x20 + read-write + 0x00000000 + + + MUXH15 + GPIOx pin 15 muxing + 28 + 4 + + + MUXH14 + GPIOx pin 14 muxing + 24 + 4 + + + MUXH13 + GPIOx pin 13 muxing + 20 + 4 + + + MUXH12 + GPIOx pin 12 muxing + 16 + 4 + + + MUXH11 + GPIOx pin 11 muxing + 12 + 4 + + + MUXH10 + GPIOx pin 10 muxing + 8 + 4 + + + MUXH9 + GPIOx pin 9 muxing + 4 + 4 + + + MUXH8 + GPIOx pin 8 muxing + 0 + 4 + + + + + CLR + CLR + GPIO bit reset register + 0x28 + 0x20 + write-only + 0x00000000 + + + IOCB0 + Clear bit 0 + 0 + 1 + + + IOCB1 + Clear bit 1 + 1 + 1 + + + IOCB2 + Clear bit 1 + 2 + 1 + + + IOCB3 + Clear bit 3 + 3 + 1 + + + IOCB4 + Clear bit 4 + 4 + 1 + + + IOCB5 + Clear bit 5 + 5 + 1 + + + IOCB6 + Clear bit 6 + 6 + 1 + + + IOCB7 + Clear bit 7 + 7 + 1 + + + IOCB8 + Clear bit 8 + 8 + 1 + + + IOCB9 + Clear bit 9 + 9 + 1 + + + IOCB10 + Clear bit 10 + 10 + 1 + + + IOCB11 + Clear bit 11 + 11 + 1 + + + IOCB12 + Clear bit 12 + 12 + 1 + + + IOCB13 + Clear bit 13 + 13 + 1 + + + IOCB14 + Clear bit 14 + 14 + 1 + + + IOCB15 + Clear bit 15 + 15 + 1 + + + + + HDRV + HDRV + Huge current driver + 0x3C + 0x20 + read-write + 0x00000000 + + + HDRV0 + Port x driver bit y + 0 + 1 + + + HDRV1 + Port x driver bit y + 1 + 1 + + + HDRV2 + Port x driver bit y + 2 + 1 + + + HDRV3 + Port x driver bit y + 3 + 1 + + + HDRV4 + Port x driver bit y + 4 + 1 + + + HDRV5 + Port x driver bit y + 5 + 1 + + + HDRV6 + Port x driver bit y + 6 + 1 + + + HDRV7 + Port x driver bit y + 7 + 1 + + + HDRV8 + Port x driver bit y + 8 + 1 + + + HDRV9 + Port x driver bit y + 9 + 1 + + + HDRV10 + Port x driver bit y + 10 + 1 + + + HDRV11 + Port x driver bit y + 11 + 1 + + + HDRV12 + Port x driver bit y + 12 + 1 + + + HDRV13 + Port x driver bit y + 13 + 1 + + + HDRV14 + Port x driver bit y + 14 + 1 + + + HDRV15 + Port x driver bit y + 15 + 1 + + + + + + + GPIOB + 0x40020400 + + + GPIOC + 0x40020800 + + + GPIOD + 0x40020C00 + + + GPIOE + 0x40021000 + + + GPIOF + 0x40021400 + + + GPIOG + 0x40021800 + + + GPIOH + 0x40021C00 + + + EXINT + EXINT + EXINT + 0x40013C00 + + 0x0 + 0x400 + registers + + + EXINT0 + EXINT Line0 interrupt + 6 + + + EXINT1 + EXINT Line1 interrupt + 7 + + + EXINT2 + EXINT Line2 interrupt + 8 + + + EXINT3 + EXINT Line3 interrupt + 9 + + + EXINT4 + EXINT Line4 interrupt + 10 + + + EXINT9_5 + EXINT Line[9:5] interrupts + 23 + + + EXINT15_10 + EXINT Line[15:10] interrupts + 40 + + + PVM + PVM interrupt connect to EXINT line16 + 1 + + + ERTCALARM + ERTC Alarm interrupt connect to EXINT line17 + 41 + + + OTGFS1_WKUP + OTGFS1_WKUP interrupt connect to EXINT line18 + 42 + + + EMAC_WKUP + EMAC_WKUP interrupt connect to EXINT line19 + 62 + + + OTGFS2_WKUP + OTGFS2_WKUP interrupt connect to EXINT line20 + 76 + + + TAMPER + Tamper interrupt connect to EXINT line21 + 2 + + + ERTC_WKUP + ERTC Global interrupt connect to EXINT line22 + 3 + + + + INTEN + INTEN + Interrupt enable register + 0x0 + 0x20 + read-write + 0x00000000 + + + INTEN0 + Interrupt enable or disable on line 0 + 0 + 1 + + + INTEN1 + Interrupt enable or disable on line 1 + 1 + 1 + + + INTEN2 + Interrupt enable or disable on line 2 + 2 + 1 + + + INTEN3 + Interrupt enable or disable on line 3 + 3 + 1 + + + INTEN4 + Interrupt enable or disable on line 4 + 4 + 1 + + + INTEN5 + Interrupt enable or disable on line 5 + 5 + 1 + + + INTEN6 + Interrupt enable or disable on line 6 + 6 + 1 + + + INTEN7 + Interrupt enable or disable on line 7 + 7 + 1 + + + INTEN8 + Interrupt enable or disable on line 8 + 8 + 1 + + + INTEN9 + Interrupt enable or disable on line 9 + 9 + 1 + + + INTEN10 + Interrupt enable or disable on line 10 + 10 + 1 + + + INTEN11 + Interrupt enable or disable on line 11 + 11 + 1 + + + INTEN12 + Interrupt enable or disable on line 12 + 12 + 1 + + + INTEN13 + Interrupt enable or disable on line 13 + 13 + 1 + + + INTEN14 + Interrupt enable or disable on line 14 + 14 + 1 + + + INTEN15 + Interrupt enable or disable on line 15 + 15 + 1 + + + INTEN16 + Interrupt enable or disable on line 16 + 16 + 1 + + + INTEN17 + Interrupt enable or disable on line 17 + 17 + 1 + + + INTEN18 + Interrupt enable or disable on line 18 + 18 + 1 + + + INTEN19 + Interrupt enable or disable on line 19 + 19 + 1 + + + INTEN20 + Interrupt enable or disable on line 20 + 20 + 1 + + + INTEN21 + Interrupt enable or disable on line 21 + 21 + 1 + + + INTEN22 + Interrupt enable or disable on line 22 + 22 + 1 + + + + + EVTEN + EVTEN + Event enable register + 0x4 + 0x20 + read-write + 0x00000000 + + + EVTEN0 + Event enable or disable on line 0 + 0 + 1 + + + EVTEN1 + Event enable or disable on line 1 + 1 + 1 + + + EVTEN2 + Event enable or disable on line 2 + 2 + 1 + + + EVTEN3 + Event enable or disable on line 3 + 3 + 1 + + + EVTEN4 + Event enable or disable on line 4 + 4 + 1 + + + EVTEN5 + Event enable or disable on line 5 + 5 + 1 + + + EVTEN6 + Event enable or disable on line 6 + 6 + 1 + + + EVTEN7 + Event enable or disable on line 7 + 7 + 1 + + + EVTEN8 + Event enable or disable on line 8 + 8 + 1 + + + EVTEN9 + Event enable or disable on line 9 + 9 + 1 + + + EVTEN10 + Event enable or disable on line 10 + 10 + 1 + + + EVTEN11 + Event enable or disable on line 11 + 11 + 1 + + + EVTEN12 + Event enable or disable on line 12 + 12 + 1 + + + EVTEN13 + Event enable or disable on line 13 + 13 + 1 + + + EVTEN14 + Event enable or disable on line 14 + 14 + 1 + + + EVTEN15 + Event enable or disable on line 15 + 15 + 1 + + + EVTEN16 + Event enable or disable on line 16 + 16 + 1 + + + EVTEN17 + Event enable or disable on line 17 + 17 + 1 + + + EVTEN18 + Event enable or disable on line 18 + 18 + 1 + + + EVTEN19 + Event enable or disable on line 19 + 19 + 1 + + + EVTEN20 + Event enable or disable on line 20 + 20 + 1 + + + EVTEN21 + Event enable or disable on line 21 + 21 + 1 + + + EVTEN22 + Event enable or disable on line 22 + 22 + 1 + + + + + POLCFG1 + POLCFG1 + Rising polarity configuration register + 0x8 + 0x20 + read-write + 0x00000000 + + + RP0 + Rising polarity configuration bit of line 0 + 0 + 1 + + + RP1 + Rising polarity configuration bit of line 1 + 1 + 1 + + + RP2 + Rising polarity configuration bit of line 2 + 2 + 1 + + + RP3 + Rising polarity configuration bit of line 3 + 3 + 1 + + + RP4 + Rising polarity configuration bit of line 4 + 4 + 1 + + + RP5 + Rising polarity configuration bit of line 5 + 5 + 1 + + + RP6 + Rising polarity configuration bit of linee 6 + 6 + 1 + + + RP7 + Rising polarity configuration bit of line 7 + 7 + 1 + + + RP8 + Rising polarity configuration bit of line 8 + 8 + 1 + + + RP9 + Rising polarity configuration bit of line 9 + 9 + 1 + + + RP10 + Rising polarity configuration bit of line 10 + 10 + 1 + + + RP11 + Rising polarity configuration bit of line 11 + 11 + 1 + + + RP12 + Rising polarity configuration bit of line 12 + 12 + 1 + + + RP13 + Rising polarity configuration bit of line 13 + 13 + 1 + + + RP14 + Rising polarity configuration bit of line 14 + 14 + 1 + + + RP15 + Rising polarity configuration bit of line 15 + 15 + 1 + + + RP16 + Rising polarity configuration bit of line 16 + 16 + 1 + + + RP17 + Rising polarity configuration bit of line 17 + 17 + 1 + + + RP18 + Rising polarity configuration bit of line 18 + 18 + 1 + + + RP19 + Rising polarity configuration bit of line 19 + 19 + 1 + + + RP20 + Rising polarity configuration bit of line 20 + 20 + 1 + + + RP21 + Rising polarity configuration bit of line 21 + 21 + 1 + + + RP22 + Rising polarity configuration bit of line 22 + 22 + 1 + + + + + POLCFG2 + POLCFG2 + Falling polarity configuration register + 0xC + 0x20 + read-write + 0x00000000 + + + FP0 + Falling polarity event configuration bit of line 0 + 0 + 1 + + + FP1 + Falling polarity event configuration bit of line 1 + 1 + 1 + + + FP2 + Falling polarity event configuration bit of line 2 + 2 + 1 + + + FP3 + Falling polarity event configuration bit of line 3 + 3 + 1 + + + FP4 + Falling polarity event configuration bit of line 4 + 4 + 1 + + + FP5 + Falling polarity event configuration bit of line 5 + 5 + 1 + + + FP6 + Falling polarity event configuration bit of line 6 + 6 + 1 + + + FP7 + Falling polarity event configuration bit of line 7 + 7 + 1 + + + FP8 + Falling polarity event configuration bit of line 8 + 8 + 1 + + + FP9 + Falling polarity event configuration bit of line 9 + 9 + 1 + + + FP10 + Falling polarity event configuration bit of line 10 + 10 + 1 + + + FP11 + Falling polarity event configuration bit of line 11 + 11 + 1 + + + FP12 + Falling polarity event configuration bit of line 12 + 12 + 1 + + + FP13 + Falling polarity event configuration bit of line 13 + 13 + 1 + + + FP14 + Falling polarity event configuration bit of line 14 + 14 + 1 + + + FP15 + Falling polarity event configuration bit of line 15 + 15 + 1 + + + FP16 + Falling polarity event configuration bit of line 16 + 16 + 1 + + + FP17 + Falling polarity event configuration bit of line 17 + 17 + 1 + + + FP18 + Falling polarity event configuration bit of line 18 + 18 + 1 + + + FP19 + Falling polarity event configuration bit of line 19 + 19 + 1 + + + FP20 + Falling polarity event configuration bit of line 20 + 20 + 1 + + + FP21 + Falling polarity event configuration bit of line 21 + 21 + 1 + + + FP22 + Falling polarity event configuration bit of line 22 + 22 + 1 + + + + + SWTRG + SWTRG + Software triggle register + 0x10 + 0x20 + read-write + 0x00000000 + + + SWT0 + Software triggle on line 0 + 0 + 1 + + + SWT1 + Software triggle on line 1 + 1 + 1 + + + SWT2 + Software triggle on line 2 + 2 + 1 + + + SWT3 + Software triggle on line 3 + 3 + 1 + + + SWT4 + Software triggle on line 4 + 4 + 1 + + + SWT5 + Software triggle on line 5 + 5 + 1 + + + SWT6 + Software triggle on line 6 + 6 + 1 + + + SWT7 + Software triggle on line 7 + 7 + 1 + + + SWT8 + Software triggle on line 8 + 8 + 1 + + + SWT9 + Software triggle on line 9 + 9 + 1 + + + SWT10 + Software triggle on line 10 + 10 + 1 + + + SWT11 + Software triggle on line 11 + 11 + 1 + + + SWT12 + Software triggle on line 12 + 12 + 1 + + + SWT13 + Software triggle on line 13 + 13 + 1 + + + SWT14 + Software triggle on line 14 + 14 + 1 + + + SWT15 + Software triggle on line 15 + 15 + 1 + + + SWT16 + Software triggle on line 16 + 16 + 1 + + + SWT17 + Software triggle on line 17 + 17 + 1 + + + SWT18 + Software triggle on line 18 + 18 + 1 + + + SWT19 + Software triggle on line 19 + 19 + 1 + + + SWT20 + Software triggle on line 20 + 20 + 1 + + + SWT21 + Software triggle on line 21 + 21 + 1 + + + SWT22 + Software triggle on line 22 + 22 + 1 + + + + + INTSTS + INTSTS + Interrupt status register + 0x14 + 0x20 + read-write + 0x00000000 + + + LINE0 + Line 0 state bit + 0 + 1 + + + LINE1 + Line 1 state bit + 1 + 1 + + + LINE2 + Line 2 state bit + 2 + 1 + + + LINE3 + Line 3 state bit + 3 + 1 + + + LINE4 + Line 4 state bit + 4 + 1 + + + LINE5 + Line 5 state bit + 5 + 1 + + + LINE6 + Line 6 state bit + 6 + 1 + + + LINE7 + Line 7 state bit + 7 + 1 + + + LINE8 + Line 8 state bit + 8 + 1 + + + LINE9 + Line 9 state bit + 9 + 1 + + + LINE10 + Line 10 state bit + 10 + 1 + + + LINE11 + Line 11 state bit + 11 + 1 + + + LINE12 + Line 12 state bit + 12 + 1 + + + LINE13 + Line 13 state bit + 13 + 1 + + + LINE14 + Line 14 state bit + 14 + 1 + + + LINE15 + Line 15 state bit + 15 + 1 + + + LINE16 + Line 16 state bit + 16 + 1 + + + LINE17 + Line 17 state bit + 17 + 1 + + + LINE18 + Line 18 state bit + 18 + 1 + + + LINE19 + Line 19 state bit + 19 + 1 + + + LINE20 + Line 20 state bit + 20 + 1 + + + LINE21 + Line 21 state bit + 21 + 1 + + + LINE22 + Line 22 state bit + 22 + 1 + + + + + + + EDMA + EDMA controller + EDMA + 0x40026000 + + 0x0 + 0x400 + registers + + + EDMA_Stream1 + EDMA Stream1 global interrupt + 11 + + + EDMA_Stream2 + EDMA Stream2 global interrupt + 12 + + + EDMA_Stream3 + EDMA Stream3 global interrupt + 13 + + + EDMA_Stream4 + EDMA Stream4 global interrupt + 14 + + + EDMA_Stream5 + EDMA Stream5 global interrupt + 15 + + + EDMA_Stream6 + EDMA Stream6 global interrupt + 16 + + + EDMA_Stream7 + EDMA Stream7 global interrupt + 17 + + + EDMA_Stream8 + EDMA Stream8 global interrupt + 47 + + + + STS1 + STS1 + Interrupt status register1 + 0x0 + 0x20 + read-only + 0x00000000 + + + FDTF4 + Stream 4 Full data transfer interrupt flag + + 27 + 1 + + + HDTF4 + Stream 4 half data transfer interrupt flag + + 26 + 1 + + + DTERRF4 + Stream 4 transfer error interrupt flag + + 25 + 1 + + + DMERRF4 + Stream 4 direct mode error interrupt flag + + 24 + 1 + + + FERRF4 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S8M0ADDR + S8M0ADDR + stream 8 memory 0 address + register + 0xC4 + 0x20 + read-write + 0x00000000 + + + M0ADDR + Memory 0 address + 0 + 32 + + + + + S8M1ADDR + S8M1ADDR + stream 8 memory 1 address + register + 0xC8 + 0x20 + read-write + 0x00000000 + + + M1ADDR + Memory 1 address (used in case of Double + buffer mode) + 0 + 32 + + + + + S8FCTRL + S8FCTRL + stream 8 FIFO control register + 0xCC + 0x20 + 0x00000021 + + + FERRIEN + FIFO error interrupt + enable + 7 + 1 + read-write + + + FSTS + FIFO status + 3 + 3 + read-only + + + FEN + FIFO mode enable + 2 + 1 + read-write + + + FTHSEL + FIFO threshold selection + 0 + 2 + read-write + + + + + LLCTRL + LLCTRL + DMA Link List Control Register + 0xD0 + 0x20 + 0x00000000 + + + S1LLEN + Stream 1 link list enable + 0 + 1 + read-write + + + S2LLEN + Stream 2 link list enable + 1 + 1 + read-write + + + S3LLEN + Stream 3 link list enable + 2 + 1 + read-write + + + S4LLEN + Stream 4 link list enable + 3 + 1 + read-write + + + S5LLEN + Stream 5 link list enable + 4 + 1 + read-write + + + S6LLEN + Stream 6 link list enable + 5 + 1 + read-write + + + S7LLEN + Stream 7 link list enable + 6 + 1 + read-write + + + S8LLEN + Stream 8 link list enable + 7 + 1 + read-write + + + + + S1LLP + S1LLP + Stream 1 Link List Pointer + 0xD4 + 0x20 + 0x00000000 + + + LLP + Link list pointer + 0 + 32 + read-write + + + + + S2LLP + S2LLP + Stream 2 Link List Pointer + 0xD8 + 0x20 + 0x00000000 + + + LLP + Link list pointer + 0 + 32 + read-write + + + + + S3LLP + S3LLP + Stream 3 Link List Pointer + 0xDC + 0x20 + 0x00000000 + + + LLP + Link list pointer + 0 + 32 + read-write + + + + + S4LLP + S4LLP + Stream 4 Link List Pointer + 0xE0 + 0x20 + 0x00000000 + + + LLP + Link list pointer + 0 + 32 + read-write + + + + + S5LLP + S5LLP + Stream 5 Link List Pointer + 0xE4 + 0x20 + 0x00000000 + + + LLP + Link list pointer + 0 + 32 + read-write + + + + + S6LLP + S6LLP + Stream 6 Link List Pointer + 0xE8 + 0x20 + 0x00000000 + + + LLP + Link list pointer + 0 + 32 + read-write + + + + + S7LLP + S7LLP + Stream 7 Link List Pointer + 0xEC + 0x20 + 0x00000000 + + + LLP + Link list pointer + 0 + 32 + read-write + + + + + S8LLP + S8LLP + Stream 8 Link List Pointer + 0xF0 + 0x20 + 0x00000000 + + + LLP + Link list pointer + 0 + 32 + read-write + + + + + S2DCTRL + S2DCTRL + EDMA 2D Transfer Control Register + 0xF4 + 0x20 + 0x00000000 + + + S1_2DEN + Stream 1 2D transfer enable + 0 + 1 + read-write + + + S2_2DEN + Stream 2 2D transfer enable + 1 + 1 + read-write + + + S3_2DEN + Stream 3 2D transfer enable + 2 + 1 + read-write + + + S4_2DEN + Stream 4 2D transfer enable + 3 + 1 + read-write + + + S5_2DEN + Stream 5 2D transfer enable + 4 + 1 + read-write + + + S6_2DEN + Stream 6 2D transfer enable + 5 + 1 + read-write + + + S7_2DEN + Stream 7 2D transfer enable + 6 + 1 + read-write + + + S8_2DEN + Stream 8 2D transfer enable + 7 + 1 + read-write + + + + + S1_2DCNT + S1_2DCNT + Stream 1 2D Transfer Count + 0xF8 + 0x20 + 0x00000000 + + + XCONUT + X dimension transfer count + 0 + 16 + read-write + + + YCONUT + Y dimension transfer count + 16 + 16 + read-write + + + + + S1_STRIDE + S1_STRIDE + Stream 1 2D Transfer Stride + 0xFC + 0x20 + 0x00000000 + + + SRCSTD + Source stride + 0 + 16 + read-write + + + DSTSTD + Destination stride + 16 + 16 + read-write + + + + + S2_2DCNT + S2_2DCNT + Stream 2 2D Transfer Count + 0x100 + 0x20 + 0x00000000 + + + XCONUT + X dimension transfer count + 0 + 16 + read-write + + + YCONUT + Y dimension transfer count + 16 + 16 + read-write + + + + + S2_STRIDE + S2_STRIDE + Stream 2 2D Transfer Stride + 0x104 + 0x20 + 0x00000000 + + + SRCSTD + Source stride + 0 + 16 + read-write + + + DSTSTD + Destination stride + 16 + 16 + read-write + + + + + S3_2DCNT + S3_2DCNT + Stream 3 2D Transfer Count + 0x108 + 0x20 + 0x00000000 + + + XCONUT + X dimension transfer count + 0 + 16 + read-write + + + YCONUT + Y dimension transfer count + 16 + 16 + read-write + + + + + S3_STRIDE + S3_STRIDE + Stream 3 2D Transfer Stride + 0x10C + 0x20 + 0x00000000 + + + SRCSTD + Source stride + 0 + 16 + read-write + + + DSTSTD + Destination stride + 16 + 16 + read-write + + + + + S4_2DCNT + S4_2DCNT + Stream 4 2D Transfer Count + 0x110 + 0x20 + 0x00000000 + + + XCONUT + X dimension transfer count + 0 + 16 + read-write + + + YCONUT + Y dimension transfer count + 16 + 16 + read-write + + + + + S4_STRIDE + S4_STRIDE + Stream 4 2D Transfer Stride + 0x114 + 0x20 + 0x00000000 + + + SRCSTD + Source stride + 0 + 16 + read-write + + + DSTSTD + Destination stride + 16 + 16 + read-write + + + + + S5_2DCNT + S5_2DCNT + Stream 5 2D Transfer Count + 0x118 + 0x20 + 0x00000000 + + + XCONUT + X dimension transfer count + 0 + 16 + read-write + + + YCONUT + Y dimension transfer count + 16 + 16 + read-write + + + + + S5_STRIDE + S5_STRIDE + Stream 5 2D Transfer Stride + 0x11C + 0x20 + 0x00000000 + + + SRCSTD + Source stride + 0 + 16 + read-write + + + DSTSTD + Destination stride + 16 + 16 + read-write + + + + + S6_2DCNT + S6_2DCNT + Stream 6 2D Transfer Count + 0x120 + 0x20 + 0x00000000 + + + XCONUT + X dimension transfer count + 0 + 16 + read-write + + + YCONUT + Y dimension transfer count + 16 + 16 + read-write + + + + + S6_STRIDE + S6_STRIDE + Stream 6 2D Transfer Stride + 0x124 + 0x20 + 0x00000000 + + + SRCSTD + Source stride + 0 + 16 + read-write + + + DSTSTD + Destination stride + 16 + 16 + read-write + + + + + S7_2DCNT + S7_2DCNT + Stream 7 2D Transfer Count + 0x128 + 0x20 + 0x00000000 + + + XCONUT + X dimension transfer count + 0 + 16 + read-write + + + YCONUT + Y dimension transfer count + 16 + 16 + read-write + + + + + S7_STRIDE + S7_STRIDE + Stream 7 2D Transfer Stride + 0x12C + 0x20 + 0x00000000 + + + SRCSTD + Source stride + 0 + 16 + read-write + + + DSTSTD + Destination stride + 16 + 16 + read-write + + + + + S8_2DCNT + S8_2DCNT + Stream 8 2D Transfer Count + 0x130 + 0x20 + 0x00000000 + + + XCONUT + X dimension transfer count + 0 + 16 + read-write + + + YCONUT + Y dimension transfer count + 16 + 16 + read-write + + + + + S8_STRIDE + S8_STRIDE + Stream 8 2D Transfer Stride + 0x134 + 0x20 + 0x00000000 + + + SRCSTD + Source stride + 0 + 16 + read-write + + + DSTSTD + Destination stride + 16 + 16 + read-write + + + + + SYNCEN + SYNCEN + Sync Enable + 0x138 + 0x20 + 0x00000000 + + + S1SYNC + Stream 1 sync enable + 0 + 1 + read-write + + + S2SYNC + Stream 2 sync enable + 1 + 1 + read-write + + + S3SYNC + Stream 3 sync enable + 2 + 1 + read-write + + + S4SYNC + Stream 4 sync enable + 3 + 1 + read-write + + + S5SYNC + Stream 5 sync enable + 4 + 1 + read-write + + + S6SYNC + Stream 6 sync enable + 5 + 1 + read-write + + + S7SYNC + Stream 7 sync enable + 6 + 1 + read-write + + + S8SYNC + Stream 8 sync enable + 7 + 1 + read-write + + + + + MUXSEL + MUXSEL + EDMA MUX Table Selection + 0x13C + 0x20 + 0x00000000 + + + TBL_SEL + Multiplexer Table Select + 0 + 1 + read-write + + + + + MUXS1CTRL + MUXS1CTRL + Stream 1 Configuration Register + 0x140 + 0x20 + 0x00000000 + + + REQSEL + DMA request select + 0 + 7 + read-write + + + SYNCOVIEN + Synchronization overrun interrupt enable + 8 + 1 + read-write + + + EVTGEN + Event generation enable + 9 + 1 + read-write + + + SYNCEN + Synchroniztion enable + 16 + 1 + read-write + + + SYNCPOL + Synchronization polarity + 17 + 2 + read-write + + + REQCNT + Number of DMA requests + 19 + 5 + read-write + + + SYNCSEL + Synchronization select + 24 + 5 + read-write + + + + + MUXS2CTRL + MUXS2CTRL + Stream 2 Configuration Register + 0x144 + 0x20 + 0x00000000 + + + REQSEL + DMA request select + 0 + 7 + read-write + + + SYNCOVIEN + Synchronization overrun interrupt enable + 8 + 1 + read-write + + + EVTGEN + Event generation enable + 9 + 1 + read-write + + + SYNCEN + Synchroniztion enable + 16 + 1 + read-write + + + SYNCPOL + Synchronization polarity + 17 + 2 + read-write + + + REQCNT + Number of DMA requests + 19 + 5 + read-write + + + SYNCSEL + Synchronization select + 24 + 5 + read-write + + + + + MUXS3CTRL + MUXS3CTRL + Stream 3 Configuration Register + 0x148 + 0x20 + 0x00000000 + + + REQSEL + DMA request select + 0 + 7 + read-write + + + SYNCOVIEN + Synchronization overrun interrupt enable + 8 + 1 + read-write + + + EVTGEN + Event generation enable + 9 + 1 + read-write + + + SYNCEN + Synchroniztion enable + 16 + 1 + read-write + + + SYNCPOL + Synchronization polarity + 17 + 2 + read-write + + + REQCNT + Number of DMA requests + 19 + 5 + read-write + + + SYNCSEL + Synchronization select + 24 + 5 + read-write + + + + + MUXS4CTRL + MUXS4CTRL + Stream 4 Configuration Register + 0x14C + 0x20 + 0x00000000 + + + REQSEL + DMA request select + 0 + 7 + read-write + + + SYNCOVIEN + Synchronization overrun interrupt enable + 8 + 1 + read-write + + + EVTGEN + Event generation enable + 9 + 1 + read-write + + + SYNCEN + Synchroniztion enable + 16 + 1 + read-write + + + SYNCPOL + Synchronization polarity + 17 + 2 + read-write + + + REQCNT + Number of DMA requests + 19 + 5 + read-write + + + SYNCSEL + Synchronization select + 24 + 5 + read-write + + + + + MUXS5CTRL + MUXS5CTRL + Stream x Configuration Register + 0x150 + 0x20 + 0x00000000 + + + REQSEL + DMA request select + 0 + 7 + read-write + + + SYNCOVIEN + Synchronization overrun interrupt enable + 8 + 1 + read-write + + + EVTGEN + Event generation enable + 9 + 1 + read-write + + + SYNCEN + Synchroniztion enable + 16 + 1 + read-write + + + SYNCPOL + Synchronization polarity + 17 + 2 + read-write + + + REQCNT + Number of DMA requests + 19 + 5 + read-write + + + SYNCSEL + Synchronization select + 24 + 5 + read-write + + + + + MUXS6CTRL + MUXS6CTRL + Stream 6 Configuration Register + 0x154 + 0x20 + 0x00000000 + + + REQSEL + DMA request select + 0 + 7 + read-write + + + SYNCOVIEN + Synchronization overrun interrupt enable + 8 + 1 + read-write + + + EVTGEN + Event generation enable + 9 + 1 + read-write + + + SYNCEN + Synchroniztion enable + 16 + 1 + read-write + + + SYNCPOL + Synchronization polarity + 17 + 2 + read-write + + + REQCNT + Number of DMA requests + 19 + 5 + read-write + + + SYNCSEL + Synchronization select + 24 + 5 + read-write + + + + + MUXS7CTRL + MUXS7CTRL + Stream 7 Configuration Register + 0x158 + 0x20 + 0x00000000 + + + REQSEL + DMA request select + 0 + 7 + read-write + + + SYNCOVIEN + Synchronization overrun interrupt enable + 8 + 1 + read-write + + + EVTGEN + Event generation enable + 9 + 1 + read-write + + + SYNCEN + Synchroniztion enable + 16 + 1 + read-write + + + SYNCPOL + Synchronization polarity + 17 + 2 + read-write + + + REQCNT + Number of DMA requests + 19 + 5 + read-write + + + SYNCSEL + Synchronization select + 24 + 5 + read-write + + + + + MUXS8CTRL + MUXS8CTRL + Stream 8 Configuration Register + 0x15C + 0x20 + 0x00000000 + + + REQSEL + DMA request select + 0 + 7 + read-write + + + SYNCOVIEN + Synchronization overrun interrupt enable + 8 + 1 + read-write + + + EVTGEN + Event generation enable + 9 + 1 + read-write + + + SYNCEN + Synchroniztion enable + 16 + 1 + read-write + + + SYNCPOL + Synchronization polarity + 17 + 2 + read-write + + + REQCNT + Number of DMA requests + 19 + 5 + read-write + + + SYNCSEL + Synchronization select + 24 + 5 + read-write + + + + + MUXG1CTRL + MUXG1CTRL + Generator 1 Configuration Register + 0x160 + 0x20 + 0x00000000 + + + SIGSEL + Signal select + 0 + 5 + read-write + + + TRGOVIEN + Trigger overrun interrupt enable + 8 + 1 + read-write + + + GEN + DMA request generator enable + 16 + 1 + read-write + + + GPOL + DMA request generator trigger polarity + 17 + 2 + read-write + + + GREQCNT + Number of DMA requests to be generated + 19 + 5 + read-write + + + + + MUXG2CTRL + MUXG2CTRL + Generator 2 Configuration Register + 0x164 + 0x20 + 0x00000000 + + + SIGSEL + Signal select + 0 + 5 + read-write + + + TRGOVIEN + Trigger overrun interrupt enable + 8 + 1 + read-write + + + GEN + DMA request generator enable + 16 + 1 + read-write + + + GPOL + DMA request generator trigger polarity + 17 + 2 + read-write + + + GREQCNT + Number of DMA requests to be generated + 19 + 5 + read-write + + + + + MUXG3CTRL + MUXG3CTRL + Generator 3 Configuration Register + 0x168 + 0x20 + 0x00000000 + + + SIGSEL + Signal select + 0 + 5 + read-write + + + TRGOVIEN + Trigger overrun interrupt enable + 8 + 1 + read-write + + + GEN + DMA request generator enable + 16 + 1 + read-write + + + GPOL + DMA request generator trigger polarity + 17 + 2 + read-write + + + GREQCNT + Number of DMA requests to be generated + 19 + 5 + read-write + + + + + MUXG4CTRL + MUXG4CTRL + Generator 4 Configuration Register + 0x16C + 0x20 + 0x00000000 + + + SIGSEL + Signal select + 0 + 5 + read-write + + + TRGOVIEN + Trigger overrun interrupt enable + 8 + 1 + read-write + + + GEN + DMA request generator enable + 16 + 1 + read-write + + + GPOL + DMA request generator trigger polarity + 17 + 2 + read-write + + + GREQCNT + Number of DMA requests to be generated + 19 + 5 + read-write + + + + + MUXSYNCSTS + MUXSYNCSTS + Channel Interrupt Status Register + 0x170 + 0x20 + 0x00000000 + + + SYNCOVF1 + Synchronizaton overrun interrupt flag + 0 + 1 + read-only + + + SYNCOVF2 + Synchronizaton overrun interrupt flag + 1 + 1 + read-only + + + SYNCOVF3 + Synchronizaton overrun interrupt flag + 2 + 1 + read-only + + + SYNCOVF4 + Synchronizaton overrun interrupt flag + 3 + 1 + read-only + + + SYNCOVF5 + Synchronizaton overrun interrupt flag + 4 + 1 + read-only + + + SYNCOVF6 + Synchronizaton overrun interrupt flag + 5 + 1 + read-only + + + SYNCOVF7 + Synchronizaton overrun interrupt flag + 6 + 1 + read-only + + + SYNCOVF8 + Synchronizaton overrun interrupt flag + 7 + 1 + read-only + + + + + MUXSYNCCLR + MUXSYNCCLR + Channel Interrupt Clear Flag Register + 0x174 + 0x20 + 0x00000000 + + + SYNCOVFC1 + Clear synchronizaton overrun interrupt flag + 0 + 1 + read-write + + + SYNCOVFC2 + Clear synchronizaton overrun interrupt flag + 1 + 1 + read-write + + + SYNCOVFC3 + Clear synchronizaton overrun interrupt flag + 2 + 1 + read-write + + + SYNCOVFC4 + Clear synchronizaton overrun interrupt flag + 3 + 1 + read-write + + + SYNCOVFC5 + Clear synchronizaton overrun interrupt flag + 4 + 1 + read-write + + + SYNCOVFC6 + Clear synchronizaton overrun interrupt flag + 5 + 1 + read-write + + + SYNCOVFC7 + Clear synchronizaton overrun interrupt flag + 6 + 1 + read-write + + + SYNCOVFC8 + Clear synchronizaton overrun interrupt flag + 7 + 1 + read-write + + + + + MUXGSTS + MUXGSTS + Generator Interrupt Status Register + 0x178 + 0x20 + 0x00000000 + + + TRGOVF1 + Trigger overrun interrupt flag + 0 + 1 + read-write + + + TRGOVF2 + Trigger overrun interrupt flag + 1 + 1 + read-write + + + TRGOVF3 + Trigger overrun interrupt flag + 2 + 1 + read-write + + + TRGOVF4 + Trigger overrun interrupt flag + 3 + 1 + read-write + + + + + MUXGCLR + MUXGCLR + Generator Interrupt Clear Flag Register + 0x17C + 0x20 + 0x00000000 + + + TRGOVFC1 + Clear trigger overrun interrupt flag + 0 + 1 + read-write + + + + TRGOVFC2 + Clear trigger overrun interrupt flag + 1 + 1 + read-write + + + TRGOVFC3 + Clear trigger overrun interrupt flag + 2 + 1 + read-write + + + TRGOVFC4 + Clear trigger overrun interrupt flag + 3 + 1 + read-write + + + + + + + DMA1 + DMA controller + DMA + 0x40026400 + + 0x0 + 0x200 + registers + + + DMA1_Channel1 + DMA1 Channel1 global interrupt + 56 + + + DMA1_Channel2 + DMA1 Channel2 global interrupt + 57 + + + DMA1_Channel3 + DMA1 Channel3 global interrupt + 58 + + + DMA1_Channel4 + DMA1 Channel4 global interrupt + 59 + + + DMA1_Channel5 + DMA1 Channel5 global interrupt + 60 + + + DMA1_Channel6 + DMA1 Channel6 global interrupt + 68 + + + DMA1_Channel7 + DMA1 Channel7 global interrupt + 69 + + + + STS + STS + DMA interrupt status register + (DMA_STS) + 0x0 + 0x20 + read-only + 0x00000000 + + + GF1 + Channel 1 Global event flag + 0 + 1 + + + FDTF1 + Channel 1 full data transfer event flag + 1 + 1 + + + HDTF1 + Channel 1 half data transfer event flag + 2 + 1 + + + DTERRF1 + Channel 1 data transfer error event flag + 3 + 1 + + + GF2 + Channel 2 Global event flag + 4 + 1 + + + FDTF2 + Channel 2 full data transfer event flag + 5 + 1 + + + HDTF2 + Channel 2 half data transfer event flag + 6 + 1 + + + DTERRF2 + Channel 2 data transfer error event flag + 7 + 1 + + + GF3 + Channel 3 Global event flag + 8 + 1 + + + FDTF3 + Channel 3 full data transfer event flag + 9 + 1 + + + HDTF3 + Channel 3 half data transfer event flag + 10 + 1 + + + DTERRF3 + Channel 3 data transfer error event flag + 11 + 1 + + + GF4 + Channel 4 Global event flag + 12 + 1 + + + FDTF4 + Channel 4 full data transfer event flag + 13 + 1 + + + HDTF4 + Channel 4 half data transfer event flag + 14 + 1 + + + DTERRF4 + Channel 4 data transfer error event flag + 15 + 1 + + + GF5 + Channel 5 Global event flag + 16 + 1 + + + FDTF5 + Channel 5 full data transfer event flag + 17 + 1 + + + HDTF5 + Channel 5 half data transfer event flag + 18 + 1 + + + DTERRF5 + Channel 5 data transfer error event flag + 19 + 1 + + + GF6 + Channel 6 Global event flag + 20 + 1 + + + FDTF6 + Channel 6 full data transfer event flag + 21 + 1 + + + HDTF6 + Channel 6 half data transfer event flag + 22 + 1 + + + DTERRF6 + Channel 6 data transfer error event flag + 23 + 1 + + + GF7 + Channel 7 Global event flag + 24 + 1 + + + FDTF7 + Channel 7 full data transfer event flag + 25 + 1 + + + HDTF7 + Channel 7 half data transfer event flag + 26 + 1 + + + DTERRF7 + Channel 7 data transfer error event flag + 27 + 1 + + + + + CLR + CLR + DMA interrupt flag clear register + (DMA_CLR) + 0x4 + 0x20 + read-write + 0x00000000 + + + GFC1 + Channel 1 Global flag clear + 0 + 1 + + + GFC2 + Channel 2 Global flag clear + 4 + 1 + + + GFC3 + Channel 3 Global flag clear + 8 + 1 + + + GFC4 + Channel 4 Global flag clear + 12 + 1 + + + GFC5 + Channel 5 Global flag clear + 16 + 1 + + + GFC6 + Channel 6 Global flag clear + 20 + 1 + + + GFC7 + Channel 7 Global flag clear + 24 + 1 + + + FDTFC1 + Channel 1 full data transfer flag clear + 1 + 1 + + + FDTFC2 + Channel 2 full data transfer flag clear + 5 + 1 + + + FDTFC3 + Channel 3 full data transfer flag clear + 9 + 1 + + + FDTFC4 + Channel 4 full data transfer flag clear + 13 + 1 + + + FDTFC5 + Channel 5 full data transfer flag clear + 17 + 1 + + + FDTFC6 + Channel 6 full data transfer flag clear + 21 + 1 + + + FDTFC7 + Channel 7 full data transfer flag clear + 25 + 1 + + + HDTFC1 + Channel 1 half data transfer flag clear + 2 + 1 + + + HDTFC2 + Channel 2 half data transfer flag clear + 6 + 1 + + + HDTFC3 + Channel 3 half data transfer flag clear + 10 + 1 + + + HDTFC4 + Channel 4 half data transfer flag clear + 14 + 1 + + + HDTFC5 + Channel 5 half data transfer flag clear + 18 + 1 + + + HDTFC6 + Channel 6 half data transfer flag clear + 22 + 1 + + + HDTFC7 + Channel 7 half data transfer flag clear + 26 + 1 + + + DTERRFC1 + Channel 1 data transfer error flag clear + 3 + 1 + + + DTERRFC2 + Channel 2 data transfer error flag clear + 7 + 1 + + + DTERRFC3 + Channel 3 data transfer error flag clear + 11 + 1 + + + DTERRFC4 + Channel 4 data transfer error flag clear + 15 + 1 + + + DTERRFC5 + Channel 5 data transfer error flag clear + 19 + 1 + + + DTERRFC6 + Channel 6 data transfer error flag clear + 23 + 1 + + + DTERRFC7 + Channel 7 data transfer error flag clear + 27 + 1 + + + + + C1CTRL + C1CTRL + DMA channel configuration register(DMA_C1CTRL) + 0x8 + 0x20 + read-write + 0x00000000 + + + CHEN + Channel enable + 0 + 1 + + + FDTIEN + Transfer complete interrupt enable + 1 + 1 + + + HDTIEN + Half transfer interrupt enable + 2 + 1 + + + DTERRIEN + Transfer error interrupt enable + 3 + 1 + + + DTD + Data transfer direction + 4 + 1 + + + LM + Loop mode + 5 + 1 + + + PINCM + Peripheral increment mode + 6 + 1 + + + MINCM + Memory increment mode + 7 + 1 + + + PWIDTH + Peripheral data bit width + 8 + 2 + + + MWIDTH + Memory data bit width + 10 + 2 + + + CHPL + Channel Priority level + 12 + 2 + + + M2M + Memory to memory mode + 14 + 1 + + + + + C1DTCNT + C1DTCNT + DMA channel 1 number of data to transfer register + 0xC + 0x20 + read-write + 0x00000000 + + + CNT + Number of data to transfer + 0 + 16 + + + + + C1PADDR + C1PADDR + DMA channel 1 peripheral base address register + 0x10 + 0x20 + read-write + 0x00000000 + + + PADDR + Peripheral address + 0 + 32 + + + + + C1MADDR + C1MADDR + DMA channel 1 memory base address register + 0x14 + 0x20 + read-write + 0x00000000 + + + MADDR + Memory address + 0 + 32 + + + + + C2CTRL + C2CTRL + DMA channel configuration register (DMA_C2CTRL) + 0x1C + 0x20 + read-write + 0x00000000 + + + CHEN + Channel enable + 0 + 1 + + + FDTIEN + Transfer complete interrupt enable + 1 + 1 + + + HDTIEN + Half transfer interrupt enable + 2 + 1 + + + DTERRIEN + Transfer error interrupt enable + 3 + 1 + + + DTD + Data transfer direction + 4 + 1 + + + LM + Loop mode + 5 + 1 + + + PINCM + Peripheral increment mode + 6 + 1 + + + MINCM + Memory increment mode + 7 + 1 + + + PWIDTH + Peripheral data bit width + 8 + 2 + + + MWIDTH + Memory data bit width + 10 + 2 + + + CHPL + Channel Priority level + 12 + 2 + + + M2M + Memory to memory mode + 14 + 1 + + + + + C2DTCNT + C2DTCNT + DMA channel 2 number of data to transferregister + 0x20 + 0x20 + read-write + 0x00000000 + + + CNT + Number of data to transfer + 0 + 16 + + + + + C2PADDR + C2PADDR + DMA channel 2 peripheral base address register + 0x24 + 0x20 + read-write + 0x00000000 + + + PADDR + Peripheral address + 0 + 32 + + + + + C2MADDR + C2MADDR + DMA channel 2 memory base address register + 0x28 + 0x20 + read-write + 0x00000000 + + + MADDR + Memory address + 0 + 32 + + + + + C3CTRL + C3CTRL + DMA channel configuration register (DMA_C3CTRL) + 0x30 + 0x20 + read-write + 0x00000000 + + + CHEN + Channel enable + 0 + 1 + + + FDTIEN + Transfer complete interrupt enable + 1 + 1 + + + HDTIEN + Half transfer interrupt enable + 2 + 1 + + + DTERRIEN + Transfer error interrupt enable + 3 + 1 + + + DTD + Data transfer direction + 4 + 1 + + + LM + Loop mode + 5 + 1 + + + PINCM + Peripheral increment mode + 6 + 1 + + + MINCM + Memory increment mode + 7 + 1 + + + PWIDTH + Peripheral data bit width + 8 + 2 + + + MWIDTH + Memory data bit width + 10 + 2 + + + CHPL + Channel Priority level + 12 + 2 + + + M2M + Memory to memory mode + 14 + 1 + + + + + C3DTCNT + C3DTCNT + DMA channel 3 number of data to transfer register + 0x34 + 0x20 + read-write + 0x00000000 + + + CNT + Number of data to transfer + 0 + 16 + + + + + C3PADDR + C3PADDR + DMA channel 3 peripheral base address register + 0x38 + 0x20 + read-write + 0x00000000 + + + PADDR + Peripheral address + 0 + 32 + + + + + C3MADDR + C3MADDR + DMA channel 3 memory base address register + 0x3C + 0x20 + read-write + 0x00000000 + + + MADDR + Memory address + 0 + 32 + + + + + C4CTRL + C4CTRL + DMA channel configuration register (DMA_C4CTRL) + 0x44 + 0x20 + read-write + 0x00000000 + + + CHEN + Channel enable + 0 + 1 + + + FDTIEN + Transfer complete interrupt enable + 1 + 1 + + + HDTIEN + Half transfer interrupt enable + 2 + 1 + + + DTERRIEN + Transfer error interrupt enable + 3 + 1 + + + DTD + Data transfer direction + 4 + 1 + + + LM + Loop mode + 5 + 1 + + + PINCM + Peripheral increment mode + 6 + 1 + + + MINCM + Memory increment mode + 7 + 1 + + + PWIDTH + Peripheral data bit width + 8 + 2 + + + MWIDTH + Memory data bit width + 10 + 2 + + + CHPL + Channel Priority level + 12 + 2 + + + M2M + Memory to memory mode + 14 + 1 + + + + + C4DTCNT + C4DTCNT + DMA channel 4 number of data to transfer register + 0x48 + 0x20 + read-write + 0x00000000 + + + CNT + Number of data to transfer + 0 + 16 + + + + + C4PADDR + C4PADDR + DMA channel 4 peripheral base address register + 0x4C + 0x20 + read-write + 0x00000000 + + + PADDR + Peripheral address + 0 + 32 + + + + + C4MADDR + C4MADDR + DMA channel 4 memory base address register + 0x50 + 0x20 + read-write + 0x00000000 + + + MADDR + Memory address + 0 + 32 + + + + + C5CTRL + C5CTRL + DMA channel configuration register (DMA_C5CTRL) + 0x58 + 0x20 + read-write + 0x00000000 + + + CHEN + Channel enable + 0 + 1 + + + FDTIEN + Transfer complete interrupt enable + 1 + 1 + + + HDTIEN + Half transfer interrupt enable + 2 + 1 + + + DTERRIEN + Transfer error interrupt enable + 3 + 1 + + + DTD + Data transfer direction + 4 + 1 + + + LM + Loop mode + 5 + 1 + + + PINCM + Peripheral increment mode + 6 + 1 + + + MINCM + Memory increment mode + 7 + 1 + + + PWIDTH + Peripheral data bit width + 8 + 2 + + + MWIDTH + Memory data bit width + 10 + 2 + + + CHPL + Channel Priority level + 12 + 2 + + + M2M + Memory to memory mode + 14 + 1 + + + + + C5DTCNT + C5DTCNT + DMA channel 5 number of data to transfer register + 0x5C + 0x20 + read-write + 0x00000000 + + + CNT + Number of data to transfer + 0 + 16 + + + + + C5PADDR + C5PADDR + DMA channel 5 peripheral base address register + 0x60 + 0x20 + read-write + 0x00000000 + + + PADDR + Peripheral address + 0 + 32 + + + + + C5MADDR + C5MADDR + DMA channel 5 memory base address register + 0x64 + 0x20 + read-write + 0x00000000 + + + MADDR + Memory address + 0 + 32 + + + + + C6CTRL + C6CTRL + DMA channel configuration register(DMA_C6CTRL) + 0x6C + 0x20 + read-write + 0x00000000 + + + CHEN + Channel enable + 0 + 1 + + + FDTIEN + Transfer complete interrupt enable + 1 + 1 + + + HDTIEN + Half transfer interrupt enable + 2 + 1 + + + DTERRIEN + Transfer error interrupt enable + 3 + 1 + + + DTD + Data transfer direction + 4 + 1 + + + LM + Loop mode + 5 + 1 + + + PINCM + Peripheral increment mode + 6 + 1 + + + MINCM + Memory increment mode + 7 + 1 + + + PWIDTH + Peripheral data bit width + 8 + 2 + + + MWIDTH + Memory data bit width + 10 + 2 + + + CHPL + Channel Priority level + 12 + 2 + + + M2M + Memory to memory mode + 14 + 1 + + + + + C6DTCNT + C6DTCNT + DMA channel 6 number of data to transfer register + 0x70 + 0x20 + read-write + 0x00000000 + + + CNT + Number of data to transfer + 0 + 16 + + + + + C6PADDR + C6PADDR + DMA channel 6 peripheral address base register + 0x74 + 0x20 + read-write + 0x00000000 + + + PADDR + Peripheral address + 0 + 32 + + + + + C6MADDR + C6MADDR + DMA channel 6 memory address base register + 0x78 + 0x20 + read-write + 0x00000000 + + + MADDR + Memory address + 0 + 32 + + + + + C7CTRL + C7CTRL + DMA channel configuration register(DMA_C7CTRL) + 0x80 + 0x20 + read-write + 0x00000000 + + + CHEN + Channel enable + 0 + 1 + + + FDTIEN + Transfer complete interrupt enable + 1 + 1 + + + HDTIEN + Half transfer interrupt enable + 2 + 1 + + + DTERRIEN + Transfer error interrupt enable + 3 + 1 + + + DTD + Data transfer direction + 4 + 1 + + + LM + Loop mode + 5 + 1 + + + PINCM + Peripheral increment mode + 6 + 1 + + + MINCM + Memory increment mode + 7 + 1 + + + PWIDTH + Peripheral data bit width + 8 + 2 + + + MWIDTH + Memory data bit width + 10 + 2 + + + CHPL + Channel Priority level + 12 + 2 + + + M2M + Memory to memory mode + 14 + 1 + + + + + C7DTCNT + C7DTCNT + DMA channel 7 number of data to transfer register + 0x84 + 0x20 + read-write + 0x00000000 + + + CNT + Number of data to transfer + 0 + 16 + + + + + C7PADDR + C7PADDR + DMA channel 7 peripheral base address register + 0x88 + 0x20 + read-write + 0x00000000 + + + PADDR + Peripheral address + 0 + 32 + + + + + C7MADDR + C7MADDR + DMA channel 7 memory base address register + 0x8C + 0x20 + read-write + 0x00000000 + + + MADDR + Memory address + 0 + 32 + + + + + DMA_MUXSEL + DMA_MUXSEL + DMAMUX Table Selection + 0x100 + 0x20 + 0x00000000 + + + TBL_SEL + Multiplexer Table Select + 0 + 1 + read-write + + + + + MUXC1CTRL + MUXC1CTRL + Channel 1 Configuration Register + 0x104 + 0x20 + 0x00000000 + + + REQSEL + DMA request select + 0 + 7 + read-write + + + SYNCOVIEN + Synchronization overrun interrupt enable + 8 + 1 + read-write + + + EVTGEN + Event generation enable + 9 + 1 + read-write + + + SYNCEN + Synchroniztion enable + 16 + 1 + read-write + + + SYNCPOL + Synchronization polarity + 17 + 2 + read-write + + + REQCNT + Number of DMA requests + 19 + 5 + read-write + + + SYNCSEL + Synchronization Identification + 24 + 5 + read-write + + + + + MUXC2CTRL + MUXC2CTRL + Channel 2 Configuration Register + 0x108 + 0x20 + 0x00000000 + + + REQSEL + DMA request select + 0 + 7 + read-write + + + SYNCOVIEN + Synchronization overrun interrupt enable + 8 + 1 + read-write + + + EVTGEN + Event generation enable + 9 + 1 + read-write + + + SYNCEN + Synchroniztion enable + 16 + 1 + read-write + + + SYNCPOL + Synchronization polarity + 17 + 2 + read-write + + + REQCNT + Number of DMA requests + 19 + 5 + read-write + + + SYNCSEL + Synchronization Identification + 24 + 5 + read-write + + + + + MUXC3CTRL + MUXC3CTRL + Channel 3 Configuration Register + 0x10C + 0x20 + 0x00000000 + + + REQSEL + DMA request select + 0 + 7 + read-write + + + SYNCOVIEN + Synchronization overrun interrupt enable + 8 + 1 + read-write + + + EVTGEN + Event generation enable + 9 + 1 + read-write + + + SYNCEN + Synchroniztion enable + 16 + 1 + read-write + + + SYNCPOL + Synchronization polarity + 17 + 2 + read-write + + + REQCNT + Number of DMA requests + 19 + 5 + read-write + + + SYNCSEL + Synchronization Identification + 24 + 5 + read-write + + + + + MUXC4CTRL + MUXC4CTRL + Channel 4 Configuration Register + 0x110 + 0x20 + 0x00000000 + + + REQSEL + DMA request select + 0 + 7 + read-write + + + SYNCOVIEN + Synchronization overrun interrupt enable + 8 + 1 + read-write + + + EVTGEN + Event generation enable + 9 + 1 + read-write + + + SYNCEN + Synchroniztion enable + 16 + 1 + read-write + + + SYNCPOL + Synchronization polarity + 17 + 2 + read-write + + + REQCNT + Number of DMA requests + 19 + 5 + read-write + + + SYNCSEL + Synchronization Identification + 24 + 5 + read-write + + + + + MUXC5CTRL + MUXC5CTRL + Channel 5 Configuration Register + 0x114 + 0x20 + 0x00000000 + + + REQSEL + DMA request select + 0 + 7 + read-write + + + SYNCOVIEN + Synchronization overrun interrupt enable + 8 + 1 + read-write + + + EVTGEN + Event generation enable + 9 + 1 + read-write + + + SYNCEN + Synchroniztion enable + 16 + 1 + read-write + + + SYNCPOL + Synchronization polarity + 17 + 2 + read-write + + + REQCNT + Number of DMA requests + 19 + 5 + read-write + + + SYNCSEL + Synchronization Identification + 24 + 5 + read-write + + + + + MUXC6CTRL + MUXC6CTRL + Channel 6 Configuration Register + 0x118 + 0x20 + 0x00000000 + + + REQSEL + DMA request select + 0 + 7 + read-write + + + SYNCOVIEN + Synchronization overrun interrupt enable + 8 + 1 + read-write + + + EVTGEN + Event generation enable + 9 + 1 + read-write + + + SYNCEN + Synchroniztion enable + 16 + 1 + read-write + + + SYNCPOL + Synchronization polarity + 17 + 2 + read-write + + + REQCNT + Number of DMA requests + 19 + 5 + read-write + + + SYNCSEL + Synchronization Identification + 24 + 5 + read-write + + + + + MUXC7CTRL + MUXC7CTRL + Channel 7 Configuration Register + 0x11C + 0x20 + 0x00000000 + + + REQSEL + DMA request select + 0 + 7 + read-write + + + SYNCOVIEN + Synchronization overrun interrupt enable + 8 + 1 + read-write + + + EVTGEN + Event generation enable + 9 + 1 + read-write + + + SYNCEN + Synchroniztion enable + 16 + 1 + read-write + + + SYNCPOL + Synchronization polarity + 17 + 2 + read-write + + + REQCNT + Number of DMA requests + 19 + 5 + read-write + + + SYNCSEL + Synchronization Identification + 24 + 5 + read-write + + + + + MUXG1CTRL + MUXG1CTRL + Generator 1 Configuration Register + 0x120 + 0x20 + 0x00000000 + + + SIGSEL + Signal select + 0 + 5 + read-write + + + TRGOVIEN + Trigger overrun interrupt enable + 8 + 1 + read-write + + + GEN + DMA request generator enable + 16 + 1 + read-write + + + GPOL + DMA request generator trigger polarity + 17 + 2 + read-write + + + GREQCNT + Number of DMA requests to be generated + 19 + 5 + read-write + + + + + MUXG2CTRL + MUXG2CTRL + Generator 2 Configuration Register + 0x124 + 0x20 + 0x00000000 + + + SIGSEL + Signal select + 0 + 5 + read-write + + + TRGOVIEN + Trigger overrun interrupt enable + 8 + 1 + read-write + + + GEN + DMA request generator enable + 16 + 1 + read-write + + + GPOL + DMA request generator trigger polarity + 17 + 2 + read-write + + + GREQCNT + Number of DMA requests to be generated + 19 + 5 + read-write + + + + + MUXG3CTRL + MUXG3CTRL + Generator 3 Configuration Register + 0x128 + 0x20 + 0x00000000 + + + SIGSEL + Signal select + 0 + 5 + read-write + + + TRGOVIEN + Trigger overrun interrupt enable + 8 + 1 + read-write + + + GEN + DMA request generator enable + 16 + 1 + read-write + + + GPOL + DMA request generator trigger polarity + 17 + 2 + read-write + + + GREQCNT + Number of DMA requests to be generated + 19 + 5 + read-write + + + + + MUXG4CTRL + MUXG4CTRL + Generator 4 Configuration Register + 0x12C + 0x20 + 0x00000000 + + + SIGSEL + Signal select + 0 + 5 + read-write + + + TRGOVIEN + Trigger overrun interrupt enable + 8 + 1 + read-write + + + GEN + DMA request generator enable + 16 + 1 + read-write + + + GPOL + DMA request generator trigger polarity + 17 + 2 + read-write + + + GREQCNT + Number of DMA requests to be generated + 19 + 5 + read-write + + + + + MUXSYNCSTS + MUXSYNCSTS + Channel Interrupt Status Register + 0x130 + 0x20 + 0x00000000 + + + SYNCOVF1 + Synchronizaton overrun interrupt flag + 0 + 1 + read-only + + + SYNCOVF2 + Synchronizaton overrun interrupt flag + 1 + 1 + read-only + + + SYNCOVF3 + Synchronizaton overrun interrupt flag + 2 + 1 + read-only + + + SYNCOVF4 + Synchronizaton overrun interrupt flag + 3 + 1 + read-only + + + SYNCOVF5 + Synchronizaton overrun interrupt flag + 4 + 1 + read-only + + + SYNCOVF6 + Synchronizaton overrun interrupt flag + 5 + 1 + read-only + + + SYNCOVF7 + Synchronizaton overrun interrupt flag + 6 + 1 + read-only + + + + + MUXSYNCCLR + MUXSYNCCLR + Channel Interrupt Clear Flag Register + 0x134 + 0x20 + 0x00000000 + + + SYNCOVFC1 + Clear synchronizaton overrun interrupt flag + 0 + 1 + read-write + + + SYNCOVFC2 + Clear synchronizaton overrun interrupt flag + 1 + 1 + read-write + + + SYNCOVFC3 + Clear synchronizaton overrun interrupt flag + 2 + 1 + read-write + + + SYNCOVFC4 + Clear synchronizaton overrun interrupt flag + 3 + 1 + read-write + + + SYNCOVFC5 + Clear synchronizaton overrun interrupt flag + 4 + 1 + read-write + + + SYNCOVFC6 + Clear synchronizaton overrun interrupt flag + 5 + 1 + read-write + + + SYNCOVFC7 + Clear synchronizaton overrun interrupt flag + 6 + 1 + read-write + + + + + MUXGSTS + MUXGSTS + Generator Interrupt Status Register + 0x138 + 0x20 + 0x00000000 + + + TRGOVF1 + Trigger overrun interrupt flag + 0 + 1 + read-write + + + TRGOVF2 + Trigger overrun interrupt flag + 1 + 1 + read-write + + + TRGOVF3 + Trigger overrun interrupt flag + 2 + 1 + read-write + + + TRGOVF4 + Trigger overrun interrupt flag + 3 + 1 + read-write + + + + + MUXGCLR + MUXGCLR + Generator Interrupt Clear Flag Register + 0x13C + 0x20 + 0x00000000 + + + TRGOVFC1 + Clear trigger overrun interrupt flag + 0 + 1 + read-write + + + TRGOVFC2 + Clear trigger overrun interrupt flag + 1 + 1 + read-write + + + TRGOVFC3 + Clear trigger overrun interrupt flag + 2 + 1 + read-write + + + TRGOVFC4 + Clear trigger overrun interrupt flag + 3 + 1 + read-write + + + + + + + DMA2 + 0x40026600 + + + SDIO1 + Secure digital input/output + interface + SDIO + 0x4002C400 + + 0x0 + 0x400 + registers + + + SDIO1 + SDIO1 global interrupt + 49 + + + + PWRCTRL + PWRCTRL + Bits 1:0 = PWRCTRL: Power supply control + bits + 0x0 + 0x20 + read-write + 0x00000000 + + + PS + Power switch + 0 + 2 + + + + + CLKCTRL + CLKCTRL + SD clock control register + (SDIO_CLKCTRL) + 0x4 + 0x20 + read-write + 0x00000000 + + + CLKDIV + Clock division + 0 + 8 + + + CLKOEN + Clock output enable + 8 + 1 + + + PWRSVEN + Power saving mode enable + 9 + 1 + + + BYPSEN + Clock divider bypass enable + bit + 10 + 1 + + + BUSWS + Bus width selection + 11 + 2 + + + CLKEDS + SDIO_CK edge selection bit + 13 + 1 + + + HFCEN + Hardware flow control enable + 14 + 1 + + + CLKDIV98 + Clock divide factor bit9 and bit8 + 15 + 2 + + + + + ARGU + ARGU + Bits 31:0 = : Command argument + 0x8 + 0x20 + read-write + 0x00000000 + + + ARGU + Command argument + 0 + 32 + + + + + CMDCTRL + CMDCTRL + SDIO command control register + (SDIO_CMDCTRL) + 0xC + 0x20 + read-write + 0x00000000 + + + CMDIDX + CMDIDX + 0 + 6 + + + RSPWT + Wait for response + 6 + 2 + + + INTWT + CCSM wait for interrupt + 8 + 1 + + + PNDWT + CCSM wait for end of transfer + 9 + 1 + + + CCSMEN + Command channel state machine + 10 + 1 + + + IOSUSP + SD I/O suspend command + 11 + 1 + + + + + RSPCMD + RSPCMD + SDIO command register + 0x10 + 0x20 + read-only + 0x00000000 + + + RSPCMD + RSPCMD + 0 + 6 + + + + + RSP1 + RSP1 + Bits 31:0 = CARDSTATUS1 + 0x14 + 0x20 + read-only + 0x00000000 + + + CARDSTS1 + CARDSTATUS1 + 0 + 32 + + + + + RSP2 + RSP2 + Bits 31:0 = CARDSTATUS2 + 0x18 + 0x20 + read-only + 0x00000000 + + + CARDSTS2 + CARDSTATUS2 + 0 + 32 + + + + + RSP3 + RSP3 + Bits 31:0 = CARDSTATUS3 + 0x1C + 0x20 + read-only + 0x00000000 + + + CARDSTS2 + CARDSTATUS3 + 0 + 32 + + + + + RSP4 + RSP4 + Bits 31:0 = CARDSTATUS4 + 0x20 + 0x20 + read-only + 0x00000000 + + + CARDSTS2 + CARDSTATUS4 + 0 + 32 + + + + + DTTMR + DTTMR + Bits 31:0 = TIMEOUT: Data timeout + period + 0x24 + 0x20 + read-write + 0x00000000 + + + TIMEOUT + Data timeout period + 0 + 32 + + + + + DTLEN + DTLEN + Bits 24:0 = DATALENGTH: Data length + value + 0x28 + 0x20 + read-write + 0x00000000 + + + DTLEN + Data length value + 0 + 25 + + + + + DTCTRL + DTCTRL + SDIO data control register + (SDIO_DCTRL) + 0x2C + 0x20 + read-write + 0x00000000 + + + TFREN + DTEN + 0 + 1 + + + TFRDIR + DTDIR + 1 + 1 + + + TFRMODE + DTMODE + 2 + 1 + + + DMAEN + DMAEN + 3 + 1 + + + BLKSIZE + DBLOCKSIZE + 4 + 4 + + + RDWTSTART + PWSTART + 8 + 1 + + + RDWTSTOP + PWSTOP + 9 + 1 + + + RDWTMODE + RWMOD + 10 + 1 + + + IOEN + SD I/O function enable + 11 + 1 + + + + + DTCNT + DTCNT + Bits 24:0 = DATACOUNT: Data count + value + 0x30 + 0x20 + read-only + 0x00000000 + + + CNT + Data count value + 0 + 25 + + + + + STS + STS + SDIO status register + (SDIO_STA) + 0x34 + 0x20 + read-only + 0x00000000 + + + CMDFAIL + Command crc fail + 0 + 1 + + + DTFAIL + Data crc fail + 1 + 1 + + + CMDTIMEOUT + Command timeout + 2 + 1 + + + DTTIMEOUT + Data timeout + 3 + 1 + + + TXERRU + Tx under run error + 4 + 1 + + + RXERRO + Rx over run error + 5 + 1 + + + CMDRSPCMPL + Command response complete + 6 + 1 + + + CMDCMPL + Command sent + 7 + 1 + + + DTCMPL + Data sent + 8 + 1 + + + SBITERR + Start bit error + 9 + 1 + + + DTBLKCMPL + Data block sent + 10 + 1 + + + DOCMD + Command transfer in progress + 11 + 1 + + + DOTX + Data transmit in progress + 12 + 1 + + + DORX + Data receive in progress + 13 + 1 + + + TXBUFH + Tx buffer half empty + 14 + 1 + + + RXBUFH + Rx buffer half empty + 15 + 1 + + + TXBUFF + Tx buffer full + 16 + 1 + + + RXBUFF + Rx buffer full + 17 + 1 + + + TXBUFE + Tx buffer empty + 18 + 1 + + + RXBUFE + Rx buffer empty + 19 + 1 + + + TXBUF + Tx data vaild + 20 + 1 + + + RXBUF + Rx data vaild + 21 + 1 + + + IOIF + SD I/O interrupt + 22 + 1 + + + + + INTCLR + INTCLR + SDIO interrupt clear register + (SDIO_INTCLR) + 0x38 + 0x20 + read-write + 0x00000000 + + + CMDFAIL + Command crc fail flag clear + 0 + 1 + + + DTFAIL + Data crc fail flag clear + 1 + 1 + + + CMDTIMEOUT + Command timeout flag clear + 2 + 1 + + + DTTIMEOUT + Data timeout flag clear + 3 + 1 + + + TXERRU + Tx under run error flag clear + 4 + 1 + + + RXERRU + Rx over run error flag clear + 5 + 1 + + + CMDRSPCMPL + Command response complete flag clear + 6 + 1 + + + CMDCMPL + Command sent flag clear + 7 + 1 + + + DTCMPL + Data sent flag clear + 8 + 1 + + + SBITERR + Start bit error flag clear + 9 + 1 + + + DTBLKCMPL + Data block sent clear + 10 + 1 + + + IOIF + SD I/O interrupt flag clear + 22 + 1 + + + + + INTEN + INTEN + SDIO mask register (SDIO_MASK) + 0x3C + 0x20 + read-write + 0x00000000 + + + CMDFAILIEN + Command crc fail interrupt enable + 0 + 1 + + + DTFAILIEN + Data crc fail interrupt enable + 1 + 1 + + + CMDTIMEOUTIEN + Command timeout interrupt enable + 2 + 1 + + + DTTIMEOUTIEN + Data timeout interrupt enable + 3 + 1 + + + TXERRUIEN + Tx under run interrupt enable + 4 + 1 + + + RXERRUIEN + Rx over run interrupt enable + 5 + 1 + + + CMDRSPCMPLIEN + Command response complete interrupt enable + 6 + 1 + + + CMDCMPLIEN + Command sent complete interrupt enable + 7 + 1 + + + DTCMPLIEN + Data sent complete interrupt enable + 8 + 1 + + + SBITERRIEN + Start bit error interrupt enable + 9 + 1 + + + DTBLKCMPLIEN + Data block sent complete interrupt enable + 10 + 1 + + + DOCMDIEN + Command acting interrupt enable + 11 + 1 + + + DOTXIEN + Data transmit acting interrupt enable + 12 + 1 + + + DORXIEN + Data receive acting interrupt enable + 13 + 1 + + + TXBUFHIEN + Tx buffer half empty interrupt enable + 14 + 1 + + + RXBUFHIEN + Rx buffer half empty interrupt enable + 15 + 1 + + + TXBUFFIEN + Tx buffer full interrupt enable + 16 + 1 + + + RXBUFFIEN + Rx buffer full interrupt enable + 17 + 1 + + + TXBUFEIEN + Tx buffer empty interrupt enable + 18 + 1 + + + RXBUFEIEN + Rx buffer empty interrupt enable + 19 + 1 + + + TXBUFIEN + Tx buffer data vaild interrupt enable + 20 + 1 + + + RXBUFIEN + Rx buffer data vaild interrupt enable + 21 + 1 + + + IOIFIEN + SD I/O interrupt enable + 22 + 1 + + + + + BUFCNT + BUFCNT + Bits 23:0 = BUFCOUNT: Remaining number of + words to be written to or read from the + FIFO + 0x48 + 0x20 + read-only + 0x00000000 + + + CNT + FIF0COUNT + 0 + 24 + + + + + BUF + BUF + bits 31:0 = Buffer Data: Receive and transmit + buffer data + 0x80 + 0x20 + read-write + 0x00000000 + + + DT + Buffer data + 0 + 32 + + + + + + + SDIO2 + 0x50061000 + + SDIO2 + SDIO2 global interrupt + 102 + + + + ERTC + Real-time clock + ERTC + 0x40002800 + + 0x0 + 0x400 + registers + + + + TIME + TIME + time register + 0x0 + 0x20 + read-write + 0x00000000 + + + AMPM + AM/PM notation + 22 + 1 + + + HT + Hour tens + 20 + 2 + + + HU + Hour units + 16 + 4 + + + MT + Minute tens + 12 + 3 + + + MU + Minute units + 8 + 4 + + + ST + Second tens + 4 + 3 + + + SU + Second units + 0 + 4 + + + + + DATE + DATE + date register + 0x4 + 0x20 + read-write + 0x00002101 + + + YT + Year tens + 20 + 4 + + + YU + Year units + 16 + 4 + + + WK + Week + 13 + 3 + + + MT + Month tens + 12 + 1 + + + MU + Month units + 8 + 4 + + + DT + Date tens + 4 + 2 + + + DU + Date units + 0 + 4 + + + + + CTRL + CTRL + control register + 0x8 + 0x20 + read-write + 0x00000000 + + + CALOEN + Calibration output enable + 23 + 1 + + + OUTSEL + Output source selection + 21 + 2 + + + OUTP + Output polarity + 20 + 1 + + + CALOSEL + Calibration output selection + 19 + 1 + + + BPR + Battery power domain data register + 18 + 1 + + + DEC1H + Decrease 1 hour + 17 + 1 + + + ADD1H + Add 1 hour + 16 + 1 + + + TSIEN + Timestamp interrupt enable + 15 + 1 + + + WATIEN + Wakeup timer interrupt enable + 14 + 1 + + + ALBIEN + Alarm B interrupt enable + 13 + 1 + + + ALAIEN + Alarm A interrupt enable + 12 + 1 + + + TSEN + Timestamp enable + 11 + 1 + + + WATEN + Wakeup timer enable + 10 + 1 + + + ALBEN + Alarm B enable + 9 + 1 + + + ALAEN + Alarm A enable + 8 + 1 + + + CCALEN + Coarse calibration enable + 7 + 1 + + + HM + Hour mode + 6 + 1 + + + DREN + Date/time register direct read enable + 5 + 1 + + + RCDEN + Reference clock detection enable + 4 + 1 + + + TSEDG + Timestamp trigger edge + 3 + 1 + + + WATCLK + Wakeup timer clock selection + 0 + 3 + + + + + STS + STS + initialization and status + register + 0xC + 0x20 + 0x00000007 + + + ALAWF + Alarm A register allows write flag + 0 + 1 + read-only + + + ALBWF + Alarm B register allows write flag + 1 + 1 + read-only + + + WATWF + Wakeup timer register allows write flag + 2 + 1 + read-only + + + TADJF + Time adjustment flag + 3 + 1 + read-write + + + INITF + Calendar initialization flag + 4 + 1 + read-only + + + UPDF + Calendar update flag + 5 + 1 + read-write + + + IMF + Enter initialization mode flag + 6 + 1 + read-only + + + IMEN + Initialization mode enable + 7 + 1 + read-write + + + ALAF + Alarm A flag + 8 + 1 + read-write + + + ALBF + Alarm B flag + 9 + 1 + read-write + + + WATF + Wakeup timer flag + 10 + 1 + read-write + + + TSF + Timestamp flag + 11 + 1 + read-write + + + TSOF + Timestamp overflow flag + 12 + 1 + read-write + + + TP1F + Tamper detection 1 flag + 13 + 1 + read-write + + + TP2F + Tamper detection 2 flag + 14 + 1 + read-write + + + CALUPDF + Calibration value update completed flag + 16 + 1 + read-only + + + + + DIV + DIV + Diveder register + 0x10 + 0x20 + read-write + 0x007F00FF + + + DIVA + Diveder A + 16 + 7 + + + DIVB + Diveder B + 0 + 15 + + + + + WAT + WAT + Wakeup timer register + 0x14 + 0x20 + read-write + 0x0000FFFF + + + VAL + Wakeup timer reload value + 0 + 16 + + + + + CCAL + CCAL + Calibration register + 0x18 + 0x20 + read-write + 0x00000000 + + + CALDIR + Calibration direction + 7 + 1 + + + CALVAL + Calibration value + 0 + 5 + + + + + ALA + ALA + Alarm A register + 0x1C + 0x20 + read-write + 0x00000000 + + + MASK4 + Date/week mask + 31 + 1 + + + WKSEL + Date/week mode select + 30 + 1 + + + DT + Date tens + 28 + 2 + + + DU + Date units + 24 + 4 + + + MASK3 + Hours mask + 23 + 1 + + + AMPM + AM/PM + 22 + 1 + + + HT + Hour tens + 20 + 2 + + + HU + Hour units + 16 + 4 + + + MASK2 + Minutes mask + 15 + 1 + + + MT + Minute tens + 12 + 3 + + + MU + Minute units + 8 + 4 + + + MASK1 + Seconds mask + 7 + 1 + + + ST + Second tens + 4 + 3 + + + SU + Second units + 0 + 4 + + + + + ALB + ALB + Alarm B register + 0x20 + 0x20 + read-write + 0x00000000 + + + MASK4 + Date/week mask + 31 + 1 + + + WKSEL + Date/week mode select + 30 + 1 + + + DT + Date tens + 28 + 2 + + + DU + Date units + 24 + 4 + + + MASK3 + Hours mask + 23 + 1 + + + AMPM + AM/PM + 22 + 1 + + + HT + Hour tens + 20 + 2 + + + HU + Hour units + 16 + 4 + + + MASK2 + Minutes mask + 15 + 1 + + + MT + Minute tens + 12 + 3 + + + MU + Minute units + 8 + 4 + + + MASK1 + Seconds mask + 7 + 1 + + + ST + Second tens + 4 + 3 + + + SU + Second units + 0 + 4 + + + + + WP + WP + write protection register + 0x24 + 0x20 + write-only + 0x00000000 + + + CMD + Command register + 0 + 8 + + + + + SBS + SBS + sub second register + 0x28 + 0x20 + read-only + 0x00000000 + + + SBS + Sub second value + 0 + 16 + + + + + TADJ + TADJ + time adjust register + 0x2C + 0x20 + write-only + 0x00000000 + + + ADD1S + Add 1 second + 31 + 1 + + + DECSBS + Decrease sub-second value + 0 + 15 + + + + + TSTM + TSTM + time stamp time register + 0x30 + 0x20 + read-only + 0x00000000 + + + AMPM + AMPM + 22 + 1 + + + HT + Hour tens + 20 + 2 + + + HU + Hour units + 16 + 4 + + + MT + Minute tens + 12 + 3 + + + MU + Minute units + 8 + 4 + + + ST + Second tens + 4 + 3 + + + SU + Second units + 0 + 4 + + + + + TSDT + TSDT + timestamp date register + 0x34 + 0x20 + read-only + 0x00000000 + + + WK + Week + 13 + 3 + + + MT + Month tens + 12 + 1 + + + MU + Month units + 8 + 4 + + + DT + Date tens + 4 + 2 + + + DU + Date units + 0 + 4 + + + + + TSSBS + TSSBS + timestamp sub second register + 0x38 + 0x20 + read-only + 0x00000000 + + + SBS + Sub second value + 0 + 16 + + + + + SCAL + SCAL + calibration register + 0x3C + 0x20 + read-write + 0x00000000 + + + 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0x20 + read-write + 0x0000 + + + DIV + Divider value + 0 + 16 + + + + + PR + PR + Period value + 0x2C + 0x20 + read-write + 0x00000000 + + + PR + Period value + 0 + 16 + + + + + C1DT + C1DT + Channel 1 data register + 0x34 + 0x20 + read-write + 0x00000000 + + + C1DT + Channel 1 data register + 0 + 16 + + + + + + + TMR11 + 0x40014800 + + TMR1_TRG_HALL_TMR11 + TMR1 trigger and HALL interrupts and + TMR11 global interrupt + 26 + + + + TMR13 + 0x40001C00 + + TMR8_OVF_TMR13 + TMR8 overflow interrupt and TMR13 global + interrupt + 44 + + + + TMR14 + 0x40002000 + + TMR8_TRG_HALL_TMR14 + TMR8 trigger and HALL interrupts and + TMR14 global interrupt + 45 + + + + TMR6 + Basic timer + TIMER + 0x40001000 + + 0x0 + 0x400 + registers + + + TMR6 + TMR6 global interrupt + 54 + + + + CTRL1 + CTRL1 + Control register 1 + 0x0 + 0x20 + read-write + 0x0000 + + + PRBEN + Period buffer enable + 7 + 1 + + + OCMEN + One cycle mode enable + 3 + 1 + + + OVFS + Overflow event source + 2 + 1 + + + OVFEN + Overflow event enable + 1 + 1 + + + TMREN + TMR enable + 0 + 1 + + + + + CTRL2 + CTRL2 + Control register 2 + 0x4 + 0x20 + read-write + 0x0000 + + + PTOS + Primary TMR output selection + 4 + 3 + + + + + IDEN + IDEN + Interrupt/DMA enable register + 0xC + 0x20 + read-write + 0x0000 + + + OVFDEN + Overflow DMA request enable + 8 + 1 + + + OVFIEN + Overflow interrupt enable + 0 + 1 + + + + + ISTS + ISTS + Interrupt status register + 0x10 + 0x20 + read-write + 0x0000 + + + OVFIF + Overflow interrupt flag + 0 + 1 + + + + + SWEVT + SWEVT + Software event register + 0x14 + 0x20 + read-write + 0x0000 + + + OVFSWTR + Overflow event triggered by software + 0 + 1 + + + + + CVAL + CVAL + Counter value + 0x24 + 0x20 + read-write + 0x00000000 + + + CVAL + Counter value + 0 + 16 + + + + + DIV + DIV + Divider value + 0x28 + 0x20 + read-write + 0x0000 + + + DIV + Divider value + 0 + 16 + + + + + PR + PR + Period value + 0x2C + 0x20 + read-write + 0x00000000 + + + PR + Period value + 0 + 16 + + + + + + + TMR7 + 0x40001400 + + TMR7 + TMR7 global interrupt + 55 + + + + ACC + HSI Auto Clock Calibration + ACC + 0x40017400 + + 0x0 + 0x400 + registers + + + + STS + STS + status register + 0x0 + 0x20 + 0x0000 + + + RSLOST + Reference Signal Lost + read-write + 1 + 1 + + + CALRDY + Internal high-speed clock calibration ready + read-write + 0 + 1 + + + + + CTRL1 + CTRL1 + control register 1 + 0x04 + 0x20 + 0x0100 + + + STEP + STEP + read-write + 8 + 4 + + + CALRDYIEN + CALRDY interrupt enable + read-write + 5 + 1 + + + EIEN + RSLOST error interrupt enable + read-write + 4 + 1 + + + SOFSEL + SOF Select + read-write + 2 + 1 + + + ENTRIM + Enable trim + read-write + 1 + 1 + + + CALON + Calibration on + read-write + 0 + 1 + + + + + CTRL2 + CTRL2 + control register 2 + 0x08 + 0x20 + 0x2080 + + + HICKTWK + Internal high-speed auto clock trimming + read-only + 8 + 6 + + + HICKCAL + Internal high-speed auto clock calibration + read-only + 0 + 8 + + + + + C1 + C1 + compare value 1 + 0x0C + 0x20 + 0x1F2C + + + C1 + Compare 1 + read-write + 0 + 16 + + + + + C2 + C2 + compare value 2 + 0x10 + 0x20 + 0x1F40 + + + C2 + Compare 2 + read-write + 0 + 16 + + + + + C3 + C3 + compare value 3 + 0x14 + 0x20 + 0x1F54 + + + C3 + Compare 3 + read-write + 0 + 16 + + + + + + + I2C1 + Inter-integrated circuit + I2C + 0x40005400 + + 0x0 + 0x400 + registers + + + I2C1_EVT + I2C1 event interrupt + 31 + + + I2C1_ERR + I2C1 error interrupt + 32 + + + + CTRL1 + CTRL1 + Control register 1 + 0x0 + 0x20 + 0x00000000 + + + I2CEN + I2C peripheral enable + 0 + 1 + read-write + + + TDIEN + Transmit data interrupt enable + 1 + 1 + read-write + + + RDIEN + Receive data interrupt enable + 2 + 1 + read-write + + + ADDRIEN + Address match interrupt enable + 3 + 1 + read-write + + + ACKFAILIEN + Acknowledge fail interrupt enable + 4 + 1 + read-write + + + STOPIEN + Stop generation complete interrupt enable + 5 + 1 + read-write + + + TDCIEN + Transfer data complete interrupt enable + 6 + 1 + read-write + + + ERRIEN + Error interrupts enable + 7 + 1 + read-write + + + DFLT + Digital filter value + 8 + 4 + read-write + + + DMATEN + DMA Transmit data request enable + 14 + 1 + read-write + + + DMAREN + DMA receive data request enable + 15 + 1 + read-write + + + SCTRL + Slave receiving data control + 16 + 1 + read-write + + + STRETCH + Clock stretching mode + 17 + 1 + read-write + + + GCAEN + General call address enable + 19 + 1 + read-write + + + HADDREN + SMBus host address enable + 20 + 1 + read-write + + + DEVADDREN + SMBus device default address enable + 21 + 1 + read-write + + + SMBALERT + SMBus alert enable / pin set + 22 + 1 + read-write + + + PECEN + PEC calculation enable + 23 + 1 + read-write + + + + + CTRL2 + CTRL2 + Control register 2 + 0x4 + 0x20 + read-write + 0x00000000 + + + PECTEN + Request PEC transmission enable + 26 + 1 + + + ASTOPEN + Automatically send stop condition enable + 25 + 1 + + + RLDEN + Send data reload mode enable + 24 + 1 + + + CNT + Transmit data counter + 16 + 8 + + + NACKEN + Not acknowledge enable + 15 + 1 + + + GENSTOP + Generate stop condition + 14 + 1 + + + GENSTART + Generate start condition + 13 + 1 + + + READH10 + 10-bit address header read enable + 12 + 1 + + + ADDR10 + Host send 10-bit address mode enable + 11 + 1 + + + DIR + Master data transmission direction + 10 + 1 + + + SADDR + Slave address + 0 + 10 + + + + + OADDR1 + OADDR1 + Own address register 1 + 0x8 + 0x20 + read-write + 0x00000000 + + + ADDR1 + Interface address + 0 + 10 + + + ADDR1MODE + Own Address mode + 10 + 1 + + + ADDR1EN + Own address 1 enable + 15 + 1 + + + + + OADDR2 + OADDR2 + Own address register 2 + 0xC + 0x20 + read-write + 0x00000000 + + + ADDR2 + Own address 2 + 1 + 7 + + + ADDR2MASK + Own address 2-bit mask + 8 + 3 + + + ADDR2EN + Own address 2 enable + 15 + 1 + + + + + CLKCTRL + CLKCTRL + Clock contorl register + 0x10 + 0x20 + read-write + 0x00000000 + + + SCLL + SCL low level + 0 + 8 + + + SCLH + SCL high level + 8 + 8 + + + SDAD + SDA output delay + 16 + 4 + + + SCLD + SCL output delay + 20 + 4 + + + DIVH + High 4 bits of clock divider value + 24 + 4 + + + DIVL + Low 4 bits of clock divider value + 28 + 4 + + + + + TIMEOUT + TIMEOUT + Timeout register + 0x14 + 0x20 + read-write + 0x00000000 + + + TOTIME + Clock timeout detection time + 0 + 12 + + + TOMOED + Clock timeout detection mode + 12 + 1 + + + TOEN + Detect clock low/high timeout enable + 15 + 1 + + + EXTTIME + Cumulative clock low extend timeout value + 16 + 12 + + + EXTEN + Cumulative clock low extend timeout enable + 31 + 1 + + + + + STS + STS + Interrupt and Status register + 0x18 + 0x20 + 0x00000001 + + + ADDR + Slave address matching value + 17 + 7 + read-only + + + SDIR + Slave data transmit direction + 16 + 1 + read-only + + + BUSYF + Bus busy + 15 + 1 + read-only + + + ALERTF + SMBus alert flag + 13 + 1 + read-only + + + TMOUT + SMBus timeout flag + 12 + 1 + read-only + + + PECERR + PEC receive error flag + 11 + 1 + read-only + + + OUF + Overflow or underflow flag + 10 + 1 + read-only + + + ARLOST + Arbitration lost flag + 9 + 1 + read-only + + + BUSERR + Bus error flag + 8 + 1 + read-only + + + TCRLD + Transmission is complete, waiting to load data + 7 + 1 + read-only + + + TDC + Transmit data complete flag + 6 + 1 + read-only + + + STOPF + Stop condition generation complete flag + 5 + 1 + read-only + + + ACKFAIL + Acknowledge failure flag + 4 + 1 + read-only + + + ADDRF + 0~7 bit address match flag + 3 + 1 + read-only + + + RDBF + Receive data buffer full flag + 2 + 1 + read-only + + + TDIS + Send interrupt status + 1 + 1 + read-write + + + TDBE + Transmit data buffer empty flag + 0 + 1 + read-write + + + + + CLR + CLR + Interrupt clear register + 0x1C + 0x20 + write-only + 0x00000000 + + + ALERTC + Clear SMBus alert flag + 13 + 1 + + + TMOUTC + Clear SMBus timeout flag + 12 + 1 + + + PECERRC + Clear PEC receive error flag + 11 + 1 + + + OUFC + Clear overload / underload flag + 10 + 1 + + + ARLOSTC + Clear arbitration lost flag + 9 + 1 + + + BUSERRC + Clear bus error flag + 8 + 1 + + + STOPC + Clear stop condition generation complete flag + 5 + 1 + + + ACKFAILC + Clear acknowledge failure flag + 4 + 1 + + + ADDRC + Clear 0~7 bit address match flag + 3 + 1 + + + + + PEC + PEC + PEC register + 0x20 + 0x20 + read-only + 0x00000000 + + + PECVAL + PEC value + 0 + 8 + + + + + RXDT + RXDT + Receive data register + 0x24 + 0x20 + read-only + 0x00000000 + + + DT + Receive data register + 0 + 8 + + + + + TXDT + TXDT + Transmit data register + 0x28 + 0x20 + read-write + 0x00000000 + + + DT + Transmit data register + 0 + 8 + + + + + + + I2C2 + 0x40005800 + + I2C2_EVT + I2C2 event interrupt + 33 + + + I2C2_ERR + I2C2 error interrupt + 34 + + + + I2C3 + 0x40005C00 + + I2C3_EVT + I2C3 event interrupt + 72 + + + I2C3_ERR + I2C3 error interrupt + 73 + + + + SPI1 + Serial peripheral interface + SPI + 0x40013000 + + 0x0 + 0x400 + registers + + + SPI1 + SPI1 global interrupt + 35 + + + + CTRL1 + CTRL1 + control register 1 + 0x0 + 0x20 + read-write + 0x0000 + + + SLBEN + Single line bidirectional half-duplex enable + 15 + 1 + + + SLBTD + Single line bidirectional half-duplex transmission direction + 14 + 1 + + + CCEN + CRC calculation enable + 13 + 1 + + + NTC + Next transmission CRC + 12 + 1 + + + FBN + frame bit num + 11 + 1 + + + ORA + Only receive active + 10 + 1 + + + SWCSEN + Software CS enable + 9 + 1 + + + SWCSIL + Software CS internal level + 8 + 1 + + + LTF + LSB transmit first + 7 + 1 + + + SPIEN + SPI enable + 6 + 1 + + + MDIV2_0 + Master clock frequency division bit2-0 + 3 + 3 + + + MSTEN + Master enable + 2 + 1 + + + CLKPOL + Clock polarity + 1 + 1 + + + CLKPHA + Clock phase + 0 + 1 + + + + + CTRL2 + CTRL2 + control register 2 + 0x4 + 0x20 + read-write + 0x0000 + + + MDIV3EN + Master clock frequency3 division enable + 9 + 1 + + + MDIV3 + Master clock frequency division bit3 + 8 + 1 + + + TDBEIE + Transmit data buffer empty interrupt enable + 7 + 1 + + + RDBFIE + Receive data buffer full interrupt enable + 6 + 1 + + + ERRIE + Error interrupt enable + 5 + 1 + + + TIEN + TI mode enable + 4 + 1 + + + HWCSOE + Hardware CS output enable + 2 + 1 + + + DMATEN + DMA transmit enable + 1 + 1 + + + DMAREN + DMA receive enable + 0 + 1 + + + + + STS + STS + status register + 0x8 + 0x20 + 0x0002 + + + CSPAS + CS pulse abnormal setting fiag + 8 + 1 + read-write + + + BF + Busy flag + 7 + 1 + read-only + + + ROERR + Receiver overflow error + 6 + 1 + read-only + + + MMERR + Master mode error + 5 + 1 + read-only + + + CCERR + CRC calculation error + 4 + 1 + read-write + + + TUERR + Transmitter underload error + 3 + 1 + read-only + + + ACS + Audio channel state + 2 + 1 + read-only + + + TDBE + Transmit data buffer empty + 1 + 1 + read-only + + + RDBF + Receive data buffer full + 0 + 1 + read-only + + + + + DT + DT + data register + 0xC + 0x20 + read-write + 0x0000 + + + DT + Data value + 0 + 16 + + + + + CPOLY + CPOLY + CRC polynomial register + 0x10 + 0x20 + read-write + 0x0007 + + + CPOLY + CRC polynomial + 0 + 16 + + + + + RCRC + RCRC + Receive CRC register + 0x14 + 0x20 + read-only + 0x0000 + + + RCRC + Receive CRC + 0 + 16 + + + + + TCRC + TCRC + Transmit CRC register + 0x18 + 0x20 + read-only + 0x0000 + + + TCRC + Transmit CRC + 0 + 16 + + + + + I2SCTRL + I2SCTRL + I2S control register + 0x1C + 0x20 + read-write + 0x0000 + + + I2SMSEL + I2S mode select + 11 + 1 + + + I2SEN + I2S Enable + 10 + 1 + + + OPERSEL + I2S operation select + 8 + 2 + + + PCMFSSEL + PCM frame synchronization select + 7 + 1 + + + STDSEL + I2S standard select + 4 + 2 + + + I2SCLKPOL + I2S clock polarity + 3 + 1 + + + I2SDBN + I2S data bit num + 1 + 2 + + + I2SCBN + I2S channel bit num + 0 + 1 + + + + + I2SCLK + I2SCLK + I2S clock register + 0x20 + 0x20 + read-write + 00000010 + + + I2SDIV9_8 + I2S division bit9 and bit8 + 10 + 2 + + + I2SMCLKOE + I2S master clock output enable + 9 + 1 + + + I2SODD + Odd result for I2S division + 8 + 1 + + + I2SDIV7_0 + I2S division bit7 to bit0 + 0 + 8 + + + + + + + SPI2 + 0x40003800 + + SPI2 + SPI2 global interrupt + 36 + + + + SPI3 + 0x40003C00 + + SPI3 + SPI3 global interrupt + 51 + + + + SPI4 + 0x40013400 + + SPI4 + SPI4 global interrupt + 84 + + + + I2S2_EXT + 0x40017800 + + + I2S3_EXT + 0x40017C00 + + + USART1 + Universal synchronous asynchronous receiver + transmitter + USART + 0x40011000 + + 0x0 + 0x400 + registers + + + USART1 + USART1 global interrupt + 37 + + + + STS + STS + Status register + 0x0 + 0x20 + 0x00C0 + + + CTSCF + CTS change flag + 9 + 1 + read-write + + + BFF + Break frame flag + 8 + 1 + read-write + + + TDBE + Transmit data buffer empty + 7 + 1 + read-only + + + TDC + Transmit data complete + 6 + 1 + read-write + + + RDBF + Receive data buffer full + 5 + 1 + read-write + + + IDLEF + IDLE flag + 4 + 1 + read-only + + + ROERR + Receiver overflow error + 3 + 1 + read-only + + + NERR + Noise error + 2 + 1 + read-only + + + FERR + Framing error + 1 + 1 + read-only + + + PERR + Parity error + 0 + 1 + read-only + + + + + DT + DT + Data register + 0x4 + 0x20 + read-write + 0x00000000 + + + DT + Data value + 0 + 9 + + + + + BAUDR + BAUDR + Baud rate register + 0x8 + 0x20 + read-write + 0x0000 + + + DIV + Division + 0 + 16 + + + + + CTRL1 + CTRL1 + Control register 1 + 0xC + 0x20 + read-write + 0x0000 + + + DBN1 + high bit for Data bit num + 28 + 1 + + + TSDT + transmit start delay time + 21 + 5 + + + TCDT + transmit complete delay time + 16 + 5 + + + UEN + USART enable + 13 + 1 + + + DBN0 + low bit for Data bit num + 12 + 1 + + + WUM + Wake up mode + 11 + 1 + + + PEN + Parity enable + 10 + 1 + + + PSEL + Parity selection + 9 + 1 + + + PERRIEN + PERR interrupt enable + 8 + 1 + + + TDBEIEN + TDBE interrupt enable + 7 + 1 + + + TDCIEN + TDC interrupt enable + 6 + 1 + + + RDBFIEN + RDBF interrupt enable + 5 + 1 + + + IDLEIEN + IDLE interrupt enable + 4 + 1 + + + TEN + Transmitter enable + 3 + 1 + + + REN + Receiver enable + 2 + 1 + + + RM + Receiver mute + 1 + 1 + + + SBF + Send break frame + 0 + 1 + + + + + CTRL2 + CTRL2 + Control register 2 + 0x10 + 0x20 + read-write + 0x0000 + + + ID7_4 + bit 7-4 for usart identification + 28 + 4 + + + TRPSWAP + Transmit receive pin swap + 15 + 1 + + + LINEN + LIN mode enable + 14 + 1 + + + STOPBN + STOP bit num + 12 + 2 + + + CLKEN + Clock enable + 11 + 1 + + + CLKPOL + Clock polarity + 10 + 1 + + + CLKPHA + Clock phase + 9 + 1 + + + LBCP + Last bit clock pulse + 8 + 1 + + + BFIEN + Break frame interrupt enable + 6 + 1 + + + BFBN + Break frame bit num + 5 + 1 + + + IDBN + Identification bit num + 4 + 1 + + + ID3_0 + bit 3-0 for usart identification + 0 + 4 + + + + + CTRL3 + CTRL3 + Control register 3 + 0x14 + 0x20 + read-write + 0x0000 + + + DEP + DE polarity selection + 15 + 1 + + + RS485EN + RS485 enable + 14 + 1 + + + CTSCFIEN + CTSCF interrupt enable + 10 + 1 + + + CTSEN + CTS enable + 9 + 1 + + + RTSEN + RTS enable + 8 + 1 + + + DMATEN + DMA transmitter enable + 7 + 1 + + + DMAREN + DMA receiver enable + 6 + 1 + + + SCMEN + Smartcard mode enable + 5 + 1 + + + SCNACKEN + Smartcard NACK enable + 4 + 1 + + + SLBEN + Single line bidirectional half-duplex enable + 3 + 1 + + + IRDALP + IrDA low-power mode + 2 + 1 + + + IRDAEN + IrDA enable + 1 + 1 + + + ERRIEN + Error interrupt enable + 0 + 1 + + + + + GDIV + GDIV + Guard time and division register + 0x18 + 0x20 + read-write + 0x0000 + + + SCGT + Smart card guard time value + 8 + 8 + + + ISDIV + IrDA/smartcard division value + 0 + 8 + + + + + + + USART2 + 0x40004400 + + USART2 + USART2 global interrupt + 38 + + + + USART3 + 0x40004800 + + USART3 + USART3 global interrupt + 39 + + + + USART6 + 0x40011400 + + USART6 + USART6 global interrupt + 71 + + + + ADC1 + Analog to digital converter + ADC + 0x40012000 + + 0x0 + 0x100 + registers + + + ADC + ADC1 global interrupt + 18 + + + + STS + STS + status register + 0x0 + 0x20 + read-write + 0x00000000 + + + RDY + ADC ready to conversion flag + 6 + 1 + read-only + + + OCCO + Ordinary channel conversion overflow flag + 5 + 1 + + + OCCS + Ordinary channel conversion start flag + 4 + 1 + + + PCCS + Preempted channel conversion start flag + 3 + 1 + + + PCCE + Preempted channels conversion end flag + 2 + 1 + + + OCCE + Ordinary channels conversion end flag + 1 + 1 + + + VMOR + Voltage monitoring out of range flag + 0 + 1 + + + + + CTRL1 + CTRL1 + control register 1 + 0x4 + 0x20 + read-write + 0x00000000 + + + OCCOIEN + Ordinary channel conversion overflow interrupt enable + 26 + 1 + + + CRSEL + Conversion resolution select + 24 + 2 + + + OCVMEN + Voltage monitoring enable on ordinary channels + 23 + 1 + + + PCVMEN + Voltage monitoring enable on preempted channels + 22 + 1 + + + OCPCNT + Partitioned mode conversion count of ordinary channels + 13 + 3 + + + PCPEN + Partitioned mode enable on preempted channels + 12 + 1 + + + OCPEN + Partitioned mode enable on ordinary channels + 11 + 1 + + + PCAUTOEN + Preempted group automatic conversion enable after ordinary group + 10 + 1 + + + VMSGEN + Voltage monitoring enable on a single channel + 9 + 1 + + + SQEN + Sequence mode enable + 8 + 1 + + + PCCEIEN + Conversion end interrupt enable for preempted channels + 7 + 1 + + + VMORIEN + Voltage monitoring out of range interrupt enable + 6 + 1 + + + OCCEIEN + Ordinary channel conversion end interrupt enable + 5 + 1 + + + VMCSEL + Voltage monitoring channel select + 0 + 5 + + + + + CTRL2 + CTRL2 + control register 2 + 0x8 + 0x20 + read-write + 0x00000000 + + + OCTESEL_H + High bit of trigger event select for ordinary channels conversion + 31 + 1 + + + OCSWTRG + Ordinary channel software conversion trigger + 30 + 1 + + + OCETE + Ordinary channel external trigger edge select + 28 + 2 + + + OCTESEL_L + Low bit of trigger event select for ordinary channels conversion + 24 + 4 + + + PCTESEL_H + High bit of trigger event select for preempted channels conversion + 23 + 1 + + + PCSWTRG + Preempted channel software conversion trigger + 22 + 1 + + + PCETE + Preempted channel external trigger edge select + 20 + 2 + + + PCTESEL_L + Low bit of trigger event select for preempted channels conversion + 16 + 4 + + + DTALIGN + Data alignment + 11 + 1 + + + EOCSFEN + Each ordinary channel conversion set OCCE flag enable + 10 + 1 + + + OCDRCEN + Ordinary channel DMA request continuation enable for independent mode + 9 + 1 + + + OCDMAEN + Ordinary channel DMA transfer enable for independent mode + 8 + 1 + + + ADABRT + ADC conversion abort + 4 + 1 + + + ADCALINIT + Initialize A/D calibration + 3 + 1 + + + ADCAL + A/D Calibration + 2 + 1 + + + RPEN + Repeat mode enable + 1 + 1 + + + ADCEN + A/D converter enable + 0 + 1 + + + + + SPT1 + SPT1 + sample time register 1 + 0xC + 0x20 + read-write + 0x00000000 + + + CSPT18 + Selection sample time of channel ADC_IN18 + 24 + 3 + + + CSPT17 + Selection sample time of channel ADC_IN17 + 21 + 3 + + + CSPT16 + Selection sample time of channel ADC_IN16 + 18 + 3 + + + CSPT15 + Selection sample time of channel ADC_IN15 + 15 + 3 + + + CSPT14 + Selection sample time of channel ADC_IN14 + 12 + 3 + + + CSPT13 + Selection sample time of channel ADC_IN13 + 9 + 3 + + + CSPT12 + Selection sample time of channel ADC_IN12 + 6 + 3 + + + CSPT11 + Selection sample time of channel ADC_IN11 + 3 + 3 + + + CSPT10 + Selection sample time of channel ADC_IN10 + 0 + 3 + + + + + SPT2 + SPT2 + sample time register 2 + 0x10 + 0x20 + read-write + 0x00000000 + + + CSPT9 + Selection sample time of channel ADC_IN9 + 27 + 3 + + + CSPT8 + Selection sample time of channel ADC_IN8 + 24 + 3 + + + CSPT7 + Selection sample time of channel ADC_IN7 + 21 + 3 + + + CSPT6 + Selection sample time of channel ADC_IN6 + 18 + 3 + + + CSPT5 + Selection sample time of channel ADC_IN5 + 15 + 3 + + + CSPT4 + Selection sample time of channel ADC_IN4 + 12 + 3 + + + CSPT3 + Selection sample time of channel ADC_IN3 + 9 + 3 + + + CSPT2 + Selection sample time of channel ADC_IN2 + 6 + 3 + + + CSPT1 + Selection sample time of channel ADC_IN1 + 3 + 3 + + + CSPT0 + Selection sample time of channel ADC_IN0 + 0 + 3 + + + + + PCDTO1 + PCDTO1 + Preempted channel 1 data offset register + 0x14 + 0x20 + read-write + 0x00000000 + + + PCDTO1 + Data offset for Preempted channel 1 + 0 + 12 + + + + + PCDTO2 + PCDTO2 + Preempted channel 2 data offset register + 0x18 + 0x20 + read-write + 0x00000000 + + + PCDTO2 + Data offset for Preempted channel 2 + 0 + 12 + + + + + PCDTO3 + PCDTO3 + Preempted channel 3 data offset register + 0x1C + 0x20 + read-write + 0x00000000 + + + PCDTO3 + Data offset for Preempted channel 3 + 0 + 12 + + + + + PCDTO4 + PCDTO4 + Preempted channel 4 data offset register + 0x20 + 0x20 + read-write + 0x00000000 + + + PCDTO4 + Data offset for Preempted channel 4 + 0 + 12 + + + + + VMHB + VMHB + Voltage monitoring high boundary register + 0x24 + 0x20 + read-write + 0x00000FFF + + + VMHB + Voltage monitoring high boundary + 0 + 12 + + + + + VMLB + VMLB + Voltage monitoring low boundary register + 0x28 + 0x20 + read-write + 0x00000000 + + + VMLB + Voltage monitoring low boundary + 0 + 12 + + + + + OSQ1 + OSQ1 + Ordinary sequence register 1 + 0x2C + 0x20 + read-write + 0x00000000 + + + OCLEN + Ordinary conversion sequence length + 20 + 4 + + + OSN16 + Number of 16th conversion in ordinary sequence + 15 + 5 + + + OSN15 + Number of 15th conversion in ordinary sequence + 10 + 5 + + + OSN14 + Number of 14th conversion in ordinary sequence + 5 + 5 + + + OSN13 + Number of 13th conversion in ordinary sequence + 0 + 5 + + + + + OSQ2 + OSQ2 + Ordinary sequence register 2 + 0x30 + 0x20 + read-write + 0x00000000 + + + OSN12 + Number of 12th conversion in ordinary sequence + 25 + 5 + + + OSN11 + Number of 11th conversion in ordinary sequence + 20 + 5 + + + OSN10 + Number of 10th conversion in ordinary sequence + 15 + 5 + + + OSN9 + Number of 8th conversion in ordinary sequence + 10 + 5 + + + OSN8 + Number of 7th conversion in ordinary sequence + 5 + 5 + + + OSN7 + Number of 13th conversion in ordinary sequence + 0 + 5 + + + + + OSQ3 + OSQ3 + Ordinary sequence register 3 + 0x34 + 0x20 + read-write + 0x00000000 + + + OSN6 + Number of 6th conversion in ordinary sequence + 25 + 5 + + + OSN5 + Number of 5th conversion in ordinary sequence + 20 + 5 + + + OSN4 + Number of 4th conversion in ordinary sequence + 15 + 5 + + + OSN3 + number of 3rd conversion in ordinary sequence + 10 + 5 + + + OSN2 + Number of 2nd conversion in ordinary sequence + 5 + 5 + + + OSN1 + Number of 1st conversion in ordinary sequence + 0 + 5 + + + + + PSQ + PSQ + Preempted sequence register + 0x38 + 0x20 + read-write + 0x00000000 + + + PCLEN + Preempted conversion sequence length + 20 + 2 + + + PSN4 + Number of 4th conversion in Preempted sequence + 15 + 5 + + + PSN3 + Number of 3rd conversion in Preempted sequence + 10 + 5 + + + PSN2 + Number of 2nd conversion in Preempted sequence + 5 + 5 + + + PSN1 + Number of 1st conversion in Preempted sequence + 0 + 5 + + + + + PDT1 + PDT1 + Preempted data register 1 + 0x3C + 0x20 + read-only + 0x00000000 + + + PDT1 + Preempted data + 0 + 16 + + + + + PDT2 + PDT2 + Preempted data register 2 + 0x40 + 0x20 + read-only + 0x00000000 + + + PDT2 + Preempted data + 0 + 16 + + + + + PDT3 + PDT3 + Preempted data register 3 + 0x44 + 0x20 + read-only + 0x00000000 + + + PDT3 + Preempted data + 0 + 16 + + + + + PDT4 + PDT4 + Preempted data register 4 + 0x48 + 0x20 + read-only + 0x00000000 + + + PDT4 + Preempted data + 0 + 16 + + + + + ODT + ODT + Ordinary data register + 0x4C + 0x20 + read-only + 0x00000000 + + + ODT + Conversion data of ordinary channel + 0 + 16 + + + + + OVSP + OVSP + oversampling register + 0x80 + 0x20 + read-write + 0x00000000 + + + OOSRSEL + Ordinary oversampling recovery mode select + 10 + 1 + + + OOSTREN + Ordinary oversampling trigger mode enable + 9 + 1 + + + OSSSEL + Oversampling shift select + 5 + 4 + + + OSRSEL + Oversampling ratio select + 2 + 3 + + + POSEN + Preempted oversampling enable + 1 + 1 + + + OOSEN + Ordinary oversampling enable + 0 + 1 + + + + + CALVAL + CALVAL + Calibration value register + 0xB4 + 0x20 + read-write + 0x00000000 + + + CALVAL + A/D Calibration value + 0 + 7 + + + + + + + ADC2 + 0x40012100 + + ADC + ADC2 global interrupts + 18 + + + + ADC3 + 0x40012200 + + ADC + ADC3 global interrupts + 18 + + + + ADCCOM + ADC common area + ADC + 0x40012300 + + 0x0 + 0x100 + registers + + + + CSTS + CSTS + Common status register + 0x0 + 0x20 + read-only + 0x00000000 + + + RDY3 + ADC ready to conversion flag of ADC3 + 22 + 1 + + + OCCO3 + Ordinary channel conversion overflow flag of ADC3 + 21 + 1 + + + OCCS3 + Ordinary channel conversion start flag of ADC3 + 20 + 1 + + + PCCS3 + Preempted channel conversion start flag of ADC3 + 19 + 1 + + + PCCE3 + Preempted channels conversion end flag of ADC3 + 18 + 1 + + + OCCE3 + Ordinary channels conversion end flag of ADC3 + 17 + 1 + + + VMOR3 + Voltage monitoring out of range flag of ADC3 + 16 + 1 + + + RDY2 + ADC ready to conversion flag of ADC2 + 14 + 1 + + + OCCO2 + Ordinary channel conversion overflow flag of ADC2 + 13 + 1 + + + OCCS2 + Ordinary channel conversion start flag of ADC2 + 12 + 1 + + + PCCS2 + Preempted channel conversion start flag of ADC2 + 11 + 1 + + + PCCE2 + Preempted channels conversion end flag of ADC2 + 10 + 1 + + + OCCE2 + Ordinary channels conversion end flag of ADC2 + 9 + 1 + + + VMOR2 + Voltage monitoring out of range flag of ADC2 + 8 + 1 + + + RDY1 + ADC ready to conversion flag of ADC1 + 6 + 1 + + + OCCO1 + Ordinary channel conversion overflow flag of ADC1 + 5 + 1 + + + OCCS1 + Ordinary channel conversion start flag of ADC1 + 4 + 1 + + + PCCS1 + Preempted channel conversion start flag of ADC1 + 3 + 1 + + + PCCE1 + Preempted channels conversion end flag of ADC1 + 2 + 1 + + + OCCE1 + Ordinary channels conversion end flag of ADC1 + 1 + 1 + + + VMOR1 + Voltage monitoring out of range flag of ADC1 + 0 + 1 + + + + + CCTRL + CCTRL + Common control register + 0x4 + 0x20 + read-write + 0x00000000 + + + MSDMASEL_H + High bit of ordinary channel DMA transfer mode select for master slave mode + 28 + 1 + + + ITSRVEN + Internal temperature sensor and VINTRV enable + 23 + 1 + + + VBATEN + VBAT enable + 22 + 1 + + + ADCDIV + ADC division + 16 + 4 + + + MSDMASEL_L + Low bit of ordinary channel DMA transfer mode select for master slave mode + 14 + 2 + + + MSDRCEN + Ordinary channel DMA request continuation enable for master slave mode + 13 + 1 + + + ASISEL + Adjacent ADC sampling interval select for ordinary shifting mode + 8 + 4 + + + MSSEL + Master slave mode select + 0 + 5 + + + + + CODT + CODT + Common Ordinary data register + 0x8 + 0x20 + read-only + 0x00000000 + + + CODTH + Ordinary conversion high halfword data for master slave mode + 16 + 16 + + + CODTL + Ordinary conversion low halfword data for master slave mode + 0 + 16 + + + + + + + CAN1 + Can controller area network + CAN + 0x40006400 + + 0x0 + 0x400 + registers + + + CAN1_TX + CAN1 TX interrupt + 19 + + + CAN1_RX0 + CAN1 RX0 interrupt + 20 + + + CAN_RX1 + CAN1 RX1 interrupt + 21 + + + CAN_SE + CAN1 SE interrupt + 22 + + + + MCTRL + MCTRL + Main control register + 0x0 + 0x20 + read-write + 0x00010002 + + + PTD + Prohibit transmission when debug + 16 + 1 + + + SPRST + Software partial reset + 15 + 1 + + + TTCEN + Time triggered communication mode enable + 7 + 1 + + + AEBOEN + Automatic exit bus-off enable + 6 + 1 + + + AEDEN + Automatic exit doze mode enable + 5 + 1 + + + PRSFEN + Prohibit retransmission when sending fails enable + 4 + 1 + + + MDRSEL + Message discarding rule select when overflow + 3 + 1 + + + MMSSR + Multiple message sending sequence rule + 2 + 1 + + + DZEN + Doze mode enable + 1 + 1 + + + FZEN + Freeze mode enable + 0 + 1 + + + + + MSTS + MSTS + Main status register + 0x4 + 0x20 + 0x00000C02 + + + REALRX + Real time level of RX pin + 11 + 1 + read-only + + + LSAMPRX + Last sample level of RX pin + 10 + 1 + read-only + + + CURS + Currently receiving status + 9 + 1 + read-only + + + CUSS + Currently sending status + 8 + 1 + read-only + + + EDZIF + Enter doze mode interrupt flag + 4 + 1 + read-write + + + QDZIF + Quit doze mode interrupt flag + 3 + 1 + read-write + + + EOIF + Error occur Interrupt flag + 2 + 1 + read-write + + + DZC + Doze mode confirm + 1 + 1 + read-only + + + FZC + Freeze mode confirm + 0 + 1 + read-only + + + + + TSTS + TSTS + Transmit status register + 0x8 + 0x20 + 0x1C000000 + + + TM2LPF + Transmit mailbox 2 lowest priority flag + 31 + 1 + read-only + + + TM1LPF + Transmit mailbox 1 lowest priority flag + 30 + 1 + read-only + + + TM0LPF + Transmit mailbox 0 lowest priority flag + 29 + 1 + read-only + + + TM2EF + Transmit mailbox 2 empty flag + 28 + 1 + read-only + + + TM1EF + Transmit mailbox 1 empty flag + 27 + 1 + read-only + + + TM0EF + Transmit mailbox 0 empty flag + 26 + 1 + read-only + + + TMNR + Transmit Mailbox number record + 24 + 2 + read-only + + + TM2CT + Transmit mailbox 2 cancel transmission + 23 + 1 + read-write + + + TM2TEF + Transmit mailbox 2 transmission error flag + 19 + 1 + read-write + + + TM2ALF + Transmit mailbox 2 arbitration lost flag + 18 + 1 + read-write + + + TM2TSF + Transmit mailbox 2 transmission success flag + 17 + 1 + read-write + + + TM2TCF + transmit mailbox 2 transmission complete flag + 16 + 1 + read-write + + + TM1CT + Transmit mailbox 1 cancel transmission + 15 + 1 + read-write + + + TM1TEF + Transmit mailbox 1 transmission error flag + 11 + 1 + read-write + + + TM1ALF + Transmit mailbox 1 arbitration lost flag + 10 + 1 + read-write + + + TM1TSF + Transmit mailbox 1 transmission success flag + 9 + 1 + read-write + + + TM1TCF + Transmit mailbox 1 transmission complete flag + 8 + 1 + read-write + + + TM0CT + Transmit mailbox 0 cancel transmission + 7 + 1 + read-write + + + TM0TEF + Transmit mailbox 0 transmission error flag + 3 + 1 + read-write + + + TM0ALF + Transmit mailbox 0 arbitration lost flag + 2 + 1 + read-write + + + TM0TSF + Transmit mailbox 0 transmission success flag + 1 + 1 + read-write + + + TM0TCF + Transmit mailbox 0 transmission complete flag + 0 + 1 + read-write + + + + + RF0 + RF0 + Receive FIFO 0 register + 0xC + 0x20 + 0x00000000 + + + RF0R + Receive FIFO 0 release + 5 + 1 + read-write + + + RF0OF + Receive FIFO 0 overflow flag + 4 + 1 + read-write + + + RF0FF + Receive FIFO 0 full flag + 3 + 1 + read-write + + + RF0MN + Receive FIFO 0 message num + 0 + 2 + read-only + + + + + RF1 + RF1 + Receive FIFO 1 register + 0x10 + 0x20 + 0x00000000 + + + RF1R + Receive FIFO 1 release + 5 + 1 + read-write + + + RF1OF + Receive FIFO 1 overflow flag + 4 + 1 + read-write + + + RF1FF + Receive FIFO 1 full flag + 3 + 1 + read-write + + + RF1MN + Receive FIFO 1 message num + 0 + 2 + read-only + + + + + INTEN + INTEN + Interrupt enable register + 0x14 + 0x20 + read-write + 0x00000000 + + + EDZIEN + Enter doze mode interrupt enable + 17 + 1 + + + QDZIEN + Quit doze mode interrupt enable + 16 + 1 + + + EOIEN + Error occur interrupt enable + 15 + 1 + + + ETRIEN + Error type record interrupt enable + 11 + 1 + + + BOIEN + Bus-off interrupt enable + 10 + 1 + + + EPIEN + Error passive interrupt enable + 9 + 1 + + + EAIEN + Error active interrupt enable + 8 + 1 + + + RF1OIEN + Receive FIFO 1 overflow interrupt enable + 6 + 1 + + + RF1FIEN + Receive FIFO 1 full interrupt enable + 5 + 1 + + + RF1MIEN + FIFO 1 receive message interrupt enable + 4 + 1 + + + RF0OIEN + Receive FIFO 0 overflow interrupt enable + 3 + 1 + + + RF0FIEN + Receive FIFO 0 full interrupt enable + 2 + 1 + + + RF0MIEN + FIFO 0 receive message interrupt enable + 1 + 1 + + + TCIEN + Transmission complete interrupt enable + 0 + 1 + + + + + ESTS + ESTS + Error status register + 0x18 + 0x20 + 0x00000000 + + + REC + Receive error counter + 24 + 8 + read-only + + + TEC + Transmit error counter + 16 + 8 + read-only + + + ETR + Error type record + 4 + 3 + read-write + + + BOF + Bus-off flag + 2 + 1 + read-only + + + EPF + Error passive flag + 1 + 1 + read-only + + + EAF + Error active flag + 0 + 1 + read-only + + + + + BTMG + BTMG + Bit timing register + 0x1C + 0x20 + read-write + 0x00000000 + + + LOEN + Listen-Only mode + 31 + 1 + + + LBEN + Loop back mode + 30 + 1 + + + RSAW + Resynchronization adjust width + 24 + 2 + + + BTS2 + Bit time segment 2 + 20 + 3 + + + BTS1 + Bit time segment 1 + 16 + 4 + + + BRDIV + Baud rate division + 0 + 12 + + + + + TMI0 + TMI0 + Transmit mailbox 0 identifier register + 0x180 + 0x20 + read-write + 0x00000000 + + + TMSID + Transmit mailbox standard identifier or extended identifier high bytes + 21 + 11 + + + TMEID + Ttransmit mailbox extended identifier + 3 + 18 + + + TMIDSEL + Transmit mailbox identifier type select + 2 + 1 + + + TMFRSEL + Transmit mailbox frame type select + 1 + 1 + + + TMSR + Transmit mailbox send request + 0 + 1 + + + + + TMC0 + TMC0 + Transmit mailbox 0 data length and time stamp register + 0x184 + 0x20 + read-write + 0x00000000 + + + TMTS + Transmit mailbox time stamp + 16 + 16 + + + TMTSTEN + Transmit mailbox time stamp transmit enable + 8 + 1 + + + TMDTBL + Transmit mailbox data byte length + 0 + 4 + + + + + TMDTL0 + TMDTL0 + Transmit mailbox 0 low byte data register + 0x188 + 0x20 + read-write + 0x00000000 + + + TMDT3 + Transmit mailbox data byte 3 + 24 + 8 + + + TMDT2 + Transmit mailbox data byte 2 + 16 + 8 + + + TMDT1 + Transmit mailbox data byte 1 + 8 + 8 + + + TMDT0 + Transmit mailbox data byte 0 + 0 + 8 + + + + + TMDTH0 + TMDTH0 + Transmit mailbox 0 high byte data register + 0x18C + 0x20 + read-write + 0x00000000 + + + TMDT7 + Transmit mailbox data byte 7 + 24 + 8 + + + TMDT6 + Transmit mailbox data byte 6 + 16 + 8 + + + TMDT5 + Transmit mailbox data byte 5 + 8 + 8 + + + TMDT4 + Transmit mailbox data byte 4 + 0 + 8 + + + + + TMI1 + TMI1 + Transmit mailbox 1 identifier register + 0x190 + 0x20 + read-write + 0x00000000 + + + TMSID + Transmit mailbox standard identifier or extended identifier high bytes + 21 + 11 + + + TMEID + Ttransmit mailbox extended identifier + 3 + 18 + + + TMIDSEL + Transmit mailbox identifier type select + 2 + 1 + + + TMFRSEL + Transmit mailbox frame type select + 1 + 1 + + + TMSR + Transmit mailbox send request + 0 + 1 + + + + + TMC1 + TMC1 + Transmit mailbox 1 data length and time stamp register + 0x194 + 0x20 + read-write + 0x00000000 + + + TMTS + Transmit mailbox time stamp + 16 + 16 + + + TMTSTEN + Transmit mailbox time stamp transmit enable + 8 + 1 + + + TMDTBL + Transmit mailbox data byte length + 0 + 4 + + + + + TMDTL1 + TMDTL1 + Transmit mailbox 1 low byte data register + 0x198 + 0x20 + read-write + 0x00000000 + + + TMDT3 + Transmit mailbox data byte 3 + 24 + 8 + + + TMDT2 + Transmit mailbox data byte 2 + 16 + 8 + + + TMDT1 + Transmit mailbox data byte 1 + 8 + 8 + + + TMDT0 + Transmit mailbox data byte 0 + 0 + 8 + + + + + TMDTH1 + TMDTH1 + Transmit mailbox 1 high byte data register + 0x19C + 0x20 + read-write + 0x00000000 + + + TMDT7 + Transmit mailbox data byte 7 + 24 + 8 + + + TMDT6 + Transmit mailbox data byte 6 + 16 + 8 + + + TMDT5 + Transmit mailbox data byte 5 + 8 + 8 + + + TMDT4 + Transmit mailbox data byte 4 + 0 + 8 + + + + + TMI2 + TMI2 + Transmit mailbox 2 identifier register + 0x1A0 + 0x20 + read-write + 0x00000000 + + + TMSID + Transmit mailbox standard identifier or extended identifier high bytes + 21 + 11 + + + TMEID + Ttransmit mailbox extended identifier + 3 + 18 + + + TMIDSEL + Transmit mailbox identifier type select + 2 + 1 + + + TMFRSEL + Transmit mailbox frame type select + 1 + 1 + + + TMSR + Transmit mailbox send request + 0 + 1 + + + + + TMC2 + TMC2 + Transmit mailbox 2 data length and time stamp register + 0x1A4 + 0x20 + read-write + 0x00000000 + + + TMTS + Transmit mailbox time stamp + 16 + 16 + + + TMTSTEN + Transmit mailbox time stamp transmit enable + 8 + 1 + + + TMDTBL + Transmit mailbox data byte length + 0 + 4 + + + + + TMDTL2 + TMDTL2 + Transmit mailbox 2 low byte data register + 0x1A8 + 0x20 + read-write + 0x00000000 + + + TMDT3 + Transmit mailbox data byte 3 + 24 + 8 + + + TMDT2 + Transmit mailbox data byte 2 + 16 + 8 + + + TMDT1 + Transmit mailbox data byte 1 + 8 + 8 + + + TMDT0 + Transmit mailbox data byte 0 + 0 + 8 + + + + + TMDTH2 + TMDTH2 + Transmit mailbox 2 high byte data register + 0x1AC + 0x20 + read-write + 0x00000000 + + + TMDT7 + Transmit mailbox data byte 7 + 24 + 8 + + + TMDT6 + Transmit mailbox data byte 6 + 16 + 8 + + + TMDT5 + Transmit mailbox data byte 5 + 8 + 8 + + + TMDT4 + Transmit mailbox data byte 4 + 0 + 8 + + + + + RFI0 + RFI0 + Receive FIFO 0 register + 0x1B0 + 0x20 + read-only + 0x00000000 + + + RFSID + Receive FIFO standard identifier or receive FIFO extended identifier + 21 + 11 + + + RFEID + Receive FIFO extended identifier + 3 + 18 + + + RFIDI + Receive FIFO identifier type indication + 2 + 1 + + + RFFRI + Receive FIFO frame type indication + 1 + 1 + + + + + RFC0 + RFC0 + Receive FIFO 0 data length and time stamp register + 0x1B4 + 0x20 + read-only + 0x00000000 + + + RFTS + Receive FIFO time stamp + 16 + 16 + + + RFFMN + Receive FIFO filter match number + 8 + 8 + + + RFDTL + Receive FIFO data length + 0 + 4 + + + + + RFDTL0 + RFDTL0 + Receive FIFO 0 low byte data register + 0x1B8 + 0x20 + read-only + 0x00000000 + + + RFDT3 + Receive FIFO data byte 3 + 24 + 8 + + + RFDT2 + Receive FIFO data byte 2 + 16 + 8 + + + RFDT1 + Receive FIFO data byte 1 + 8 + 8 + + + RFDT0 + Receive FIFO data byte 0 + 0 + 8 + + + + + RFDTH0 + RFDTH0 + Receive FIFO 0 high byte data register + 0x1BC + 0x20 + read-only + 0x00000000 + + + RFDT7 + Receive FIFO data byte 7 + 24 + 8 + + + RFDT6 + Receive FIFO data byte 6 + 16 + 8 + + + RFDT5 + Receive FIFO data byte 5 + 8 + 8 + + + RFDT4 + Receive FIFO data byte 4 + 0 + 8 + + + + + RFI1 + RFI1 + Receive FIFO 1 register + 0x1C0 + 0x20 + read-only + 0x00000000 + + + RFSID + Receive FIFO standard identifier or receive FIFO extended identifier + 21 + 11 + + + RFEID + Receive FIFO extended identifier + 3 + 18 + + + RFIDI + Receive FIFO identifier type indication + 2 + 1 + + + RFFRI + Receive FIFO frame type indication + 1 + 1 + + + + + RFC1 + RFC1 + Receive FIFO 1 data length and time stamp register + 0x1C4 + 0x20 + read-only + 0x00000000 + + + RFTS + Receive FIFO time stamp + 16 + 16 + + + RFFMN + Receive FIFO filter match number + 8 + 8 + + + RFDTL + Receive FIFO data length + 0 + 4 + + + + + RFDTL1 + RFDTL1 + Receive FIFO 1 low byte data register + 0x1C8 + 0x20 + read-only + 0x00000000 + + + RFDT3 + Receive FIFO data byte 3 + 24 + 8 + + + RFDT2 + Receive FIFO data byte 2 + 16 + 8 + + + RFDT1 + Receive FIFO data byte 1 + 8 + 8 + + + RFDT0 + Receive FIFO data byte 0 + 0 + 8 + + + + + RFDTH1 + RFDTH1 + Receive FIFO 1 high byte data register + 0x1CC + 0x20 + read-only + 0x00000000 + + + RFDT7 + Receive FIFO data byte 7 + 24 + 8 + + + RFDT6 + Receive FIFO data byte 6 + 16 + 8 + + + RFDT5 + Receive FIFO data byte 5 + 8 + 8 + + + RFDT4 + Receive FIFO data byte 4 + 0 + 8 + + + + + FCTRL + FCTRL + Filter control register + 0x200 + 0x20 + read-write + 0x00000000 + + + FCS + Filters configure switch + 0 + 1 + + + + + FMCFG + FMCFG + Filter mode config register + 0x204 + 0x20 + read-write + 0x00000000 + + + FMSEL0 + Filter mode select + 0 + 1 + + + FMSEL1 + Filter mode select + 1 + 1 + + + FMSEL2 + Filter mode select + 2 + 1 + + + FMSEL3 + Filter mode select + 3 + 1 + + + FMSEL4 + Filter mode select + 4 + 1 + + + FMSEL5 + Filter mode select + 5 + 1 + + + FMSEL6 + Filter mode select + 6 + 1 + + + FMSEL7 + Filter mode select + 7 + 1 + + + FMSEL8 + Filter mode select + 8 + 1 + + + FMSEL9 + Filter mode select + 9 + 1 + + + FMSEL10 + Filter mode select + 10 + 1 + + + FMSEL11 + Filter mode select + 11 + 1 + + + FMSEL12 + Filter mode select + 12 + 1 + + + FMSEL13 + Filter mode select + 13 + 1 + + + FMSEL14 + Filter mode select + 14 + 1 + + + FMSEL15 + Filter mode select + 15 + 1 + + + FMSEL16 + Filter mode select + 16 + 1 + + + FMSEL17 + Filter mode select + 17 + 1 + + + FMSEL18 + Filter mode select + 18 + 1 + + + FMSEL19 + Filter mode select + 19 + 1 + + + FMSEL20 + Filter mode select + 20 + 1 + + + FMSEL21 + Filter mode select + 21 + 1 + + + FMSEL22 + Filter mode select + 22 + 1 + + + FMSEL23 + Filter mode select + 23 + 1 + + + FMSEL24 + Filter mode select + 24 + 1 + + + FMSEL25 + Filter mode select + 25 + 1 + + + FMSEL26 + Filter mode select + 26 + 1 + + + FMSEL27 + Filter mode select + 27 + 1 + + + + + FBWCFG + FBWCFG + Filter bit width config register + 0x20C + 0x20 + read-write + 0x00000000 + + + FBWSEL0 + Filter bit width select + 0 + 1 + + + FBWSEL1 + Filter bit width select + 1 + 1 + + + FBWSEL2 + Filter bit width select + 2 + 1 + + + FBWSEL3 + Filter bit width select + 3 + 1 + + + FBWSEL4 + Filter bit width select + 4 + 1 + + + FBWSEL5 + Filter bit width select + 5 + 1 + + + FBWSEL6 + Filter bit width select + 6 + 1 + + + FBWSEL7 + Filter bit width select + 7 + 1 + + + FBWSEL8 + Filter bit width select + 8 + 1 + + + FBWSEL9 + Filter bit width select + 9 + 1 + + + FBWSEL10 + Filter bit width select + 10 + 1 + + + FBWSEL11 + Filter bit width select + 11 + 1 + + + FBWSEL12 + Filter bit width select + 12 + 1 + + + FBWSEL13 + Filter bit width select + 13 + 1 + + + FBWSEL14 + Filter bit width select + 14 + 1 + + + FBWSEL15 + Filter bit width select + 15 + 1 + + + FBWSEL16 + Filter bit width select + 16 + 1 + + + FBWSEL17 + Filter bit width select + 17 + 1 + + + FBWSEL18 + Filter bit width select + 18 + 1 + + + FBWSEL19 + Filter bit width select + 19 + 1 + + + FBWSEL20 + Filter bit width select + 20 + 1 + + + FBWSEL21 + Filter bit width select + 21 + 1 + + + FBWSEL22 + Filter bit width select + 22 + 1 + + + FBWSEL23 + Filter bit width select + 23 + 1 + + + FBWSEL24 + Filter bit width select + 24 + 1 + + + FBWSEL25 + Filter bit width select + 25 + 1 + + + FBWSEL26 + Filter bit width select + 26 + 1 + + + FBWSEL27 + Filter bit width select + 27 + 1 + + + + + FRF + FRF + Filter related FIFO register + 0x214 + 0x20 + read-write + 0x00000000 + + + FRFSEL0 + Filter relation FIFO select + 0 + 1 + + + FRFSEL1 + Filter relation FIFO select + 1 + 1 + + + FRFSEL2 + Filter relation FIFO select + 2 + 1 + + + FRFSEL3 + Filter relation FIFO select + 3 + 1 + + + FRFSEL4 + Filter relation FIFO select + 4 + 1 + + + FRFSEL5 + Filter relation FIFO select + 5 + 1 + + + FRFSEL6 + Filter relation FIFO select + 6 + 1 + + + FRFSEL7 + Filter relation FIFO select + 7 + 1 + + + FRFSEL8 + Filter relation FIFO select + 8 + 1 + + + FRFSEL9 + Filter relation FIFO select + 9 + 1 + + + FRFSEL10 + Filter relation FIFO select + 10 + 1 + + + FRFSEL11 + Filter relation FIFO select + 11 + 1 + + + FRFSEL12 + Filter relation FIFO select + 12 + 1 + + + FRFSEL13 + Filter relation FIFO select + 13 + 1 + + + FRFSEL14 + Filter relation FIFO select + 14 + 1 + + + FRFSEL15 + Filter relation FIFO select + 15 + 1 + + + FRFSEL16 + Filter relation FIFO select + 16 + 1 + + FRFSEL17 + Filter relation FIFO select + 17 + 1 + + + FRFSEL18 + Filter relation FIFO select + 18 + 1 + + + FRFSEL19 + Filter relation FIFO select + 19 + 1 + + + FRFSEL20 + Filter relation FIFO select + 20 + 1 + + + FRFSEL21 + Filter relation FIFO select + 21 + 1 + + + FRFSEL22 + Filter relation FIFO select + 22 + 1 + + + FRFSEL23 + Filter relation FIFO select + 23 + 1 + + + FRFSEL24 + Filter relation FIFO select + 24 + 1 + + + FRFSEL25 + Filter relation FIFO select + 25 + 1 + + + FRFSEL26 + Filter relation FIFO select + 26 + 1 + + + FRFSEL27 + Filter relation FIFO select + 27 + 1 + + + + + FACFG + FACFG + Filter activate configuration register + 0x21C + 0x20 + read-write + 0x00000000 + + + FAEN0 + Filter activate enable + 0 + 1 + + + FAEN1 + Filter activate enable + 1 + 1 + + + FAEN2 + Filter activate enable + 2 + 1 + + + FAEN3 + Filter activate enable + 3 + 1 + + + FAEN4 + Filter activate enable + 4 + 1 + + + FAEN5 + Filter activate enable + 5 + 1 + + + FAEN6 + Filter activate enable + 6 + 1 + + + FAEN7 + Filter activate enable + 7 + 1 + + + FAEN8 + Filter activate enable + 8 + 1 + + + FAEN9 + Filter activate enable + 9 + 1 + + + FAEN10 + Filter activate enable + 10 + 1 + + + FAEN11 + Filter activate enable + 11 + 1 + + + FAEN12 + Filter activate enable + 12 + 1 + + + FAEN13 + Filter activate enable + 13 + 1 + + + FAEN14 + Filter activate enable + 14 + 1 + + FAEN15 + Filter activate enable + 15 + 1 + + + FAEN16 + Filter activate enable + 16 + 1 + + + FAEN17 + Filter activate enable + 17 + 1 + + + FAEN18 + Filter activate enable + 18 + 1 + + + FAEN19 + Filter activate enable + 19 + 1 + + + FAEN20 + Filter activate enable + 20 + 1 + + + FAEN21 + Filter activate enable + 21 + 1 + + + FAEN22 + Filter activate enable + 22 + 1 + + + FAEN23 + Filter activate enable + 23 + 1 + + + FAEN24 + Filter activate enable + 24 + 1 + + + FAEN25 + Filter activate enable + 25 + 1 + + + FAEN26 + Filter activate enable + 26 + 1 + + + FAEN27 + Filter activate enable + 27 + 1 + + + + + F0FB1 + F0FB1 + Filter bank 0 filtrate bit register 1 + 0x240 + 0x20 + read-write + 0x00000000 + + + FFDB0 + Filter data bit + 0 + 1 + + + FFDB1 + Filter data bit + 1 + 1 + + + FFDB2 + Filter data bit + 2 + 1 + + + FFDB3 + Filter data bit + 3 + 1 + + + FFDB4 + Filter data bit + 4 + 1 + + + FFDB5 + Filter data bit + 5 + 1 + + + FFDB6 + Filter data bit + 6 + 1 + + + FFDB7 + Filter data bit + 7 + 1 + + + FFDB8 + Filter data bit + 8 + 1 + + + FFDB9 + Filter data bit + 9 + 1 + + + FFDB10 + Filter data bit + 10 + 1 + + + FFDB11 + Filter data bit + 11 + 1 + + + FFDB12 + Filter data bit + 12 + 1 + + + FFDB13 + Filter data bit + 13 + 1 + + + FFDB14 + Filter data bit + 14 + 1 + + + FFDB15 + Filter data bit + 15 + 1 + + + FFDB16 + Filter data bit + 16 + 1 + + + FFDB17 + Filter data bit + 17 + 1 + + + FFDB18 + Filter data bit + 18 + 1 + + + FFDB19 + Filter data bit + 19 + 1 + + + FFDB20 + Filter data bit + 20 + 1 + + + FFDB21 + Filter data bit + 21 + 1 + + + FFDB22 + Filter data bit + 22 + 1 + + + FFDB23 + Filter data bit + 23 + 1 + + + FFDB24 + Filter data bit + 24 + 1 + + + FFDB25 + Filter data bit + 25 + 1 + + + FFDB26 + Filter data bit + 26 + 1 + + + FFDB27 + Filter data bit + 27 + 1 + + + FFDB28 + Filter data bit + 28 + 1 + + + FFDB29 + Filter data bit + 29 + 1 + + + FFDB30 + Filter data bit + 30 + 1 + + + FFDB31 + Filter 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data bit + 17 + 1 + + + FFDB18 + Filter data bit + 18 + 1 + + + FFDB19 + Filter data bit + 19 + 1 + + + FFDB20 + Filter data bit + 20 + 1 + + + FFDB21 + Filter data bit + 21 + 1 + + + FFDB22 + Filter data bit + 22 + 1 + + + FFDB23 + Filter data bit + 23 + 1 + + + FFDB24 + Filter data bit + 24 + 1 + + + FFDB25 + Filter data bit + 25 + 1 + + + FFDB26 + Filter data bit + 26 + 1 + + + FFDB27 + Filter data bit + 27 + 1 + + + FFDB28 + Filter data bit + 28 + 1 + + + FFDB29 + Filter data bit + 29 + 1 + + + FFDB30 + Filter data bit + 30 + 1 + + + FFDB31 + Filter data bit + 31 + 1 + + + + + F23FB1 + F23FB1 + Filter bank 23 filtrate bit register 1 + 0x2F8 + 0x20 + read-write + 0x00000000 + + + FFDB0 + Filter data bit + 0 + 1 + + + FFDB1 + Filter data bit + 1 + 1 + + + FFDB2 + Filter data bit + 2 + 1 + + + FFDB3 + Filter data bit + 3 + 1 + + + FFDB4 + Filter data bit + 4 + 1 + + + FFDB5 + Filter data bit + 5 + 1 + + + FFDB6 + Filter data bit + 6 + 1 + + + FFDB7 + Filter data bit + 7 + 1 + + + FFDB8 + Filter data bit + 8 + 1 + + + FFDB9 + Filter data bit + 9 + 1 + + + FFDB10 + Filter data bit + 10 + 1 + + + FFDB11 + Filter data bit + 11 + 1 + + + FFDB12 + Filter data bit + 12 + 1 + + + FFDB13 + Filter data bit + 13 + 1 + + + FFDB14 + Filter data bit + 14 + 1 + + + FFDB15 + Filter data bit + 15 + 1 + + + FFDB16 + Filter data bit + 16 + 1 + + + FFDB17 + Filter data bit + 17 + 1 + + + FFDB18 + Filter data bit + 18 + 1 + + + FFDB19 + Filter data bit + 19 + 1 + + + FFDB20 + Filter data bit + 20 + 1 + + + FFDB21 + Filter data bit + 21 + 1 + + + FFDB22 + Filter data bit + 22 + 1 + + + FFDB23 + Filter data bit + 23 + 1 + + + FFDB24 + Filter data bit + 24 + 1 + + + FFDB25 + Filter data bit + 25 + 1 + + + FFDB26 + Filter data bit + 26 + 1 + + + FFDB27 + Filter data bit + 27 + 1 + + + FFDB28 + Filter data bit + 28 + 1 + + + FFDB29 + Filter data bit + 29 + 1 + + + FFDB30 + Filter data bit + 30 + 1 + + + FFDB31 + Filter data bit + 31 + 1 + + + + + F23FB2 + F23FB2 + Filter bank 23 filtrate bit register 2 + 0x2FC + 0x20 + read-write + 0x00000000 + + + FFDB0 + Filter data bit + 0 + 1 + + + FFDB1 + Filter data bit + 1 + 1 + + + FFDB2 + Filter data bit + 2 + 1 + + + FFDB3 + Filter data bit + 3 + 1 + + + FFDB4 + Filter data bit + 4 + 1 + + + FFDB5 + Filter data bit + 5 + 1 + + + FFDB6 + Filter data bit + 6 + 1 + + + FFDB7 + Filter data bit + 7 + 1 + + + FFDB8 + Filter data bit + 8 + 1 + + + FFDB9 + Filter data bit + 9 + 1 + + + FFDB10 + Filter data bit + 10 + 1 + + + FFDB11 + Filter data bit + 11 + 1 + + + FFDB12 + Filter data bit + 12 + 1 + + + FFDB13 + Filter data bit + 13 + 1 + + + FFDB14 + Filter data bit + 14 + 1 + + + FFDB15 + Filter data bit + 15 + 1 + + + FFDB16 + Filter data bit + 16 + 1 + + + FFDB17 + Filter data bit + 17 + 1 + + + FFDB18 + Filter data bit + 18 + 1 + + + FFDB19 + Filter data bit + 19 + 1 + + + FFDB20 + Filter data bit + 20 + 1 + + + FFDB21 + Filter data bit + 21 + 1 + + + FFDB22 + Filter data bit + 22 + 1 + + + FFDB23 + Filter data bit + 23 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bit + 14 + 1 + + + FFDB15 + Filter data bit + 15 + 1 + + + FFDB16 + Filter data bit + 16 + 1 + + + FFDB17 + Filter data bit + 17 + 1 + + + FFDB18 + Filter data bit + 18 + 1 + + + FFDB19 + Filter data bit + 19 + 1 + + + FFDB20 + Filter data bit + 20 + 1 + + + FFDB21 + Filter data bit + 21 + 1 + + + FFDB22 + Filter data bit + 22 + 1 + + + FFDB23 + Filter data bit + 23 + 1 + + + FFDB24 + Filter data bit + 24 + 1 + + + FFDB25 + Filter data bit + 25 + 1 + + + FFDB26 + Filter data bit + 26 + 1 + + + FFDB27 + Filter data bit + 27 + 1 + + + FFDB28 + Filter data bit + 28 + 1 + + + FFDB29 + Filter data bit + 29 + 1 + + + FFDB30 + Filter data bit + 30 + 1 + + + FFDB31 + Filter data bit + 31 + 1 + + + + + F24FB2 + F24FB2 + Filter bank 24 filtrate bit register 2 + 0x304 + 0x20 + read-write + 0x00000000 + + + FFDB0 + Filter data bit + 0 + 1 + + + FFDB1 + Filter data bit + 1 + 1 + + + FFDB2 + Filter data bit + 2 + 1 + + + FFDB3 + Filter data bit + 3 + 1 + + + FFDB4 + Filter data bit + 4 + 1 + + + FFDB5 + Filter data bit + 5 + 1 + + + FFDB6 + Filter data bit + 6 + 1 + + + FFDB7 + Filter data bit + 7 + 1 + + + FFDB8 + Filter data bit + 8 + 1 + + + FFDB9 + Filter data bit + 9 + 1 + + + FFDB10 + Filter data bit + 10 + 1 + + + FFDB11 + Filter data bit + 11 + 1 + + + FFDB12 + Filter data bit + 12 + 1 + + + FFDB13 + Filter data bit + 13 + 1 + + + FFDB14 + Filter data bit + 14 + 1 + + + FFDB15 + Filter data bit + 15 + 1 + + + FFDB16 + Filter data bit + 16 + 1 + + + FFDB17 + Filter data bit + 17 + 1 + + + FFDB18 + Filter data bit + 18 + 1 + + + FFDB19 + Filter data bit + 19 + 1 + + + FFDB20 + Filter data bit + 20 + 1 + + + FFDB21 + Filter data bit + 21 + 1 + + + FFDB22 + Filter data bit + 22 + 1 + + + FFDB23 + Filter data bit + 23 + 1 + + + FFDB24 + Filter data bit + 24 + 1 + + + FFDB25 + Filter data bit + 25 + 1 + + + FFDB26 + Filter data bit + 26 + 1 + + + FFDB27 + Filter data bit + 27 + 1 + + + FFDB28 + Filter data bit + 28 + 1 + + + FFDB29 + Filter data bit + 29 + 1 + + + FFDB30 + Filter data bit + 30 + 1 + + + FFDB31 + Filter data bit + 31 + 1 + + + + + F25FB1 + F25FB1 + Filter bank 25 filtrate bit register 1 + 0x308 + 0x20 + read-write + 0x00000000 + + + FFDB0 + Filter data bit + 0 + 1 + + + FFDB1 + Filter data bit + 1 + 1 + + + FFDB2 + Filter data bit + 2 + 1 + + + FFDB3 + Filter data bit + 3 + 1 + + + FFDB4 + Filter data bit + 4 + 1 + + + FFDB5 + Filter data bit + 5 + 1 + + + FFDB6 + Filter data bit + 6 + 1 + + + FFDB7 + Filter data bit + 7 + 1 + + + FFDB8 + Filter data bit + 8 + 1 + + + FFDB9 + Filter data bit + 9 + 1 + + + FFDB10 + Filter data bit + 10 + 1 + + + FFDB11 + Filter data bit + 11 + 1 + + + FFDB12 + Filter data bit + 12 + 1 + + + FFDB13 + Filter data bit + 13 + 1 + + + FFDB14 + Filter data bit + 14 + 1 + + + FFDB15 + Filter data bit + 15 + 1 + + + FFDB16 + Filter data bit + 16 + 1 + + + FFDB17 + Filter data bit + 17 + 1 + + + FFDB18 + Filter data bit + 18 + 1 + + + FFDB19 + Filter data bit + 19 + 1 + + + FFDB20 + Filter data bit + 20 + 1 + + + FFDB21 + Filter data bit + 21 + 1 + + + FFDB22 + Filter data bit + 22 + 1 + + + FFDB23 + Filter data bit + 23 + 1 + + + FFDB24 + Filter data bit + 24 + 1 + + + FFDB25 + Filter data bit + 25 + 1 + + + FFDB26 + Filter data bit + 26 + 1 + + + FFDB27 + Filter data bit + 27 + 1 + + + FFDB28 + Filter data bit + 28 + 1 + + + FFDB29 + Filter data bit + 29 + 1 + + + FFDB30 + Filter data bit + 30 + 1 + + + FFDB31 + Filter data bit + 31 + 1 + + + + + F25FB2 + F25FB2 + Filter bank 25 filtrate bit register 2 + 0x30C + 0x20 + read-write + 0x00000000 + + + FFDB0 + Filter data bit + 0 + 1 + + + FFDB1 + Filter data bit + 1 + 1 + + + FFDB2 + Filter data bit + 2 + 1 + + + FFDB3 + Filter data bit + 3 + 1 + + + FFDB4 + Filter data bit + 4 + 1 + + + FFDB5 + Filter data bit + 5 + 1 + + + FFDB6 + Filter data bit + 6 + 1 + + + FFDB7 + Filter data bit + 7 + 1 + + + FFDB8 + Filter data bit + 8 + 1 + + + FFDB9 + Filter data bit + 9 + 1 + + + FFDB10 + Filter data bit + 10 + 1 + + + FFDB11 + Filter data bit + 11 + 1 + + + FFDB12 + Filter data bit + 12 + 1 + + + FFDB13 + Filter data bit + 13 + 1 + + + FFDB14 + Filter data bit + 14 + 1 + + + FFDB15 + Filter data bit + 15 + 1 + + + FFDB16 + Filter data bit + 16 + 1 + + + FFDB17 + Filter data bit + 17 + 1 + + + FFDB18 + Filter data bit + 18 + 1 + + + FFDB19 + Filter data bit + 19 + 1 + + + FFDB20 + Filter data bit + 20 + 1 + + + FFDB21 + Filter data bit + 21 + 1 + + + FFDB22 + Filter data bit + 22 + 1 + + + FFDB23 + Filter data bit + 23 + 1 + + + FFDB24 + Filter data bit + 24 + 1 + + + FFDB25 + Filter data bit + 25 + 1 + + + FFDB26 + Filter data bit + 26 + 1 + + + FFDB27 + Filter data bit + 27 + 1 + + + FFDB28 + Filter data bit + 28 + 1 + + + FFDB29 + Filter data bit + 29 + 1 + + + FFDB30 + Filter data bit + 30 + 1 + + + FFDB31 + Filter data bit + 31 + 1 + + + + + F26FB1 + F26FB1 + Filter bank 26 filtrate bit register 1 + 0x310 + 0x20 + read-write + 0x00000000 + + + FFDB0 + Filter data bit + 0 + 1 + + + FFDB1 + Filter data bit + 1 + 1 + + + FFDB2 + Filter data bit + 2 + 1 + + + FFDB3 + Filter data bit + 3 + 1 + + + FFDB4 + Filter data bit + 4 + 1 + + + FFDB5 + Filter data bit + 5 + 1 + + + FFDB6 + Filter data bit + 6 + 1 + + + FFDB7 + Filter data bit + 7 + 1 + + + FFDB8 + Filter data bit + 8 + 1 + + + FFDB9 + Filter data bit + 9 + 1 + + + FFDB10 + Filter data bit + 10 + 1 + + + FFDB11 + Filter data bit + 11 + 1 + + + FFDB12 + Filter data bit + 12 + 1 + + + FFDB13 + Filter data bit + 13 + 1 + + + FFDB14 + Filter data bit + 14 + 1 + + + FFDB15 + Filter data bit + 15 + 1 + + + FFDB16 + Filter data bit + 16 + 1 + + + FFDB17 + Filter data bit + 17 + 1 + + + FFDB18 + Filter data bit + 18 + 1 + + + FFDB19 + Filter data bit + 19 + 1 + + + FFDB20 + Filter data bit + 20 + 1 + + + FFDB21 + Filter data bit + 21 + 1 + + + FFDB22 + Filter data bit + 22 + 1 + + + FFDB23 + Filter data bit + 23 + 1 + + + FFDB24 + Filter data bit + 24 + 1 + + + FFDB25 + Filter data bit + 25 + 1 + + + FFDB26 + Filter data bit + 26 + 1 + + + FFDB27 + Filter data bit + 27 + 1 + + + FFDB28 + Filter data bit + 28 + 1 + + + FFDB29 + Filter data bit + 29 + 1 + + + FFDB30 + Filter data bit + 30 + 1 + + + FFDB31 + Filter data bit + 31 + 1 + + + + + F26FB2 + F26FB2 + Filter bank 26 filtrate bit register 2 + 0x314 + 0x20 + read-write + 0x00000000 + + + FFDB0 + Filter data bit + 0 + 1 + + + FFDB1 + Filter data bit + 1 + 1 + + + FFDB2 + Filter data bit + 2 + 1 + + + FFDB3 + Filter data bit + 3 + 1 + + + FFDB4 + Filter data bit + 4 + 1 + + + FFDB5 + Filter data bit + 5 + 1 + + + FFDB6 + Filter data bit + 6 + 1 + + + FFDB7 + Filter data bit + 7 + 1 + + + FFDB8 + Filter data bit + 8 + 1 + + + FFDB9 + Filter data bit + 9 + 1 + + + FFDB10 + Filter data bit + 10 + 1 + + + FFDB11 + Filter data bit + 11 + 1 + + + FFDB12 + Filter data bit + 12 + 1 + + + FFDB13 + Filter data bit + 13 + 1 + + + FFDB14 + Filter data bit + 14 + 1 + + + FFDB15 + Filter data bit + 15 + 1 + + + FFDB16 + Filter data bit + 16 + 1 + + + FFDB17 + Filter data bit + 17 + 1 + + + FFDB18 + Filter data bit + 18 + 1 + + + FFDB19 + Filter data bit + 19 + 1 + + + FFDB20 + Filter data bit + 20 + 1 + + + FFDB21 + Filter data bit + 21 + 1 + + + FFDB22 + Filter data bit + 22 + 1 + + + FFDB23 + Filter data bit + 23 + 1 + + + FFDB24 + Filter data bit + 24 + 1 + + + FFDB25 + Filter data bit + 25 + 1 + + + FFDB26 + Filter data bit + 26 + 1 + + + FFDB27 + Filter data bit + 27 + 1 + + + FFDB28 + Filter data bit + 28 + 1 + + + FFDB29 + Filter data bit + 29 + 1 + + + FFDB30 + Filter data bit + 30 + 1 + + + FFDB31 + Filter data bit + 31 + 1 + + + + + F27FB1 + F27FB1 + Filter bank 27 filtrate bit register 1 + 0x318 + 0x20 + read-write + 0x00000000 + + + FFDB0 + Filter data bit + 0 + 1 + + + FFDB1 + Filter data bit + 1 + 1 + + + FFDB2 + Filter data bit + 2 + 1 + + + FFDB3 + Filter data bit + 3 + 1 + + + FFDB4 + Filter data bit + 4 + 1 + + + FFDB5 + Filter data bit + 5 + 1 + + + FFDB6 + Filter data bit + 6 + 1 + + + FFDB7 + Filter data bit + 7 + 1 + + + FFDB8 + Filter data bit + 8 + 1 + + + FFDB9 + Filter data bit + 9 + 1 + + + FFDB10 + Filter data bit + 10 + 1 + + + FFDB11 + Filter data bit + 11 + 1 + + + FFDB12 + Filter data bit + 12 + 1 + + + FFDB13 + Filter data bit + 13 + 1 + + + FFDB14 + Filter data bit + 14 + 1 + + + FFDB15 + Filter data bit + 15 + 1 + + + FFDB16 + Filter data bit + 16 + 1 + + + FFDB17 + Filter data bit + 17 + 1 + + + FFDB18 + Filter data bit + 18 + 1 + + + FFDB19 + Filter data bit + 19 + 1 + + + FFDB20 + Filter data bit + 20 + 1 + + + FFDB21 + Filter data bit + 21 + 1 + + + FFDB22 + Filter data bit + 22 + 1 + + + FFDB23 + Filter data bit + 23 + 1 + + + FFDB24 + Filter data bit + 24 + 1 + + + FFDB25 + Filter data bit + 25 + 1 + + + FFDB26 + Filter data bit + 26 + 1 + + + FFDB27 + Filter data bit + 27 + 1 + + + FFDB28 + Filter data bit + 28 + 1 + + + FFDB29 + Filter data bit + 29 + 1 + + + FFDB30 + Filter data bit + 30 + 1 + + + FFDB31 + Filter data bit + 31 + 1 + + + + + F27FB2 + F27FB2 + Filter bank 27 filtrate bit register 2 + 0x31C + 0x20 + read-write + 0x00000000 + + + FFDB0 + Filter data bit + 0 + 1 + + + FFDB1 + Filter data bit + 1 + 1 + + + FFDB2 + Filter data bit + 2 + 1 + + + FFDB3 + Filter data bit + 3 + 1 + + + FFDB4 + Filter data bit + 4 + 1 + + + FFDB5 + Filter data bit + 5 + 1 + + + FFDB6 + Filter data bit + 6 + 1 + + + FFDB7 + Filter data bit + 7 + 1 + + + FFDB8 + Filter data bit + 8 + 1 + + + FFDB9 + Filter data bit + 9 + 1 + + + FFDB10 + Filter data bit + 10 + 1 + + + FFDB11 + Filter data bit + 11 + 1 + + + FFDB12 + Filter data bit + 12 + 1 + + + FFDB13 + Filter data bit + 13 + 1 + + + FFDB14 + Filter data bit + 14 + 1 + + + FFDB15 + Filter data bit + 15 + 1 + + + FFDB16 + Filter data bit + 16 + 1 + + + FFDB17 + Filter data bit + 17 + 1 + + + FFDB18 + Filter data bit + 18 + 1 + + + FFDB19 + Filter data bit + 19 + 1 + + + FFDB20 + Filter data bit + 20 + 1 + + + FFDB21 + Filter data bit + 21 + 1 + + + FFDB22 + Filter data bit + 22 + 1 + + + FFDB23 + Filter data bit + 23 + 1 + + + FFDB24 + Filter data bit + 24 + 1 + + + FFDB25 + Filter data bit + 25 + 1 + + + FFDB26 + Filter data bit + 26 + 1 + + + FFDB27 + Filter data bit + 27 + 1 + + + FFDB28 + Filter data bit + 28 + 1 + + + FFDB29 + Filter data bit + 29 + 1 + + + FFDB30 + Filter data bit + 30 + 1 + + + FFDB31 + Filter data bit + 31 + 1 + + + + + + + CAN2 + 0x40006800 + + CAN2_TX + CAN2 TX interrupt + 63 + + + CAN2_RX0 + CAN2 RX0 interrupt + 64 + + + CAN2_RX1 + CAN2 RX1 interrupt + 65 + + + CAN2_SE + CAN2 SE interrupt + 66 + + + + DAC + Digital to analog converter + DAC + 0x40007400 + + 0x0 + 0x400 + registers + + + + CTRL + CTRL + Control register (DAC_CTRL) + 0x0 + 0x20 + read-write + 0x00000000 + + + D1EN + DAC1 enable + 0 + 1 + + + D1OBDIS + DAC1 output buffer disable + 1 + 1 + + + D1TRGEN + DAC1 trigger enable + 2 + 1 + + + D1TRGSEL + DAC1 trigger selection + 3 + 3 + + + D1NM + DAC1 noise/triangle wave generation enable + 6 + 2 + + + D1NBSEL + DAC1 mask/amplitude selector + 8 + 4 + + + D1DMAEN + DAC1 DMA enable + 12 + 1 + + + D1DMAUDRIEN + DAC1 DMA underrun interrupt enable + 13 + 1 + + + D2EN + DAC2 enable + 16 + 1 + + + D2OBDIS + DAC2 output buffer disable + 17 + 1 + + + D2TRGEN + DAC2 trigger enable + 18 + 1 + + + D2TRGSEL + DAC2 trigger selection + 19 + 3 + + + D2NM + DAC2 noise/triangle wave generation enable + 22 + 2 + + + D2NBSEL + DAC2 mask/amplitude selector + 24 + 4 + + + D2DMAEN + DAC2 DMA enable + 28 + 1 + + + D2DMAUDRIEN + DAC2 DMA underrun interrupt enable + 29 + 1 + + + + + SWTRG + SWTRG + DAC software trigger register(DAC_SWTRIGR) + 0x4 + 0x20 + write-only + 0x00000000 + + + D1SWTRG + DAC1 software trigger + 0 + 1 + + + D2SWTRG + DAC2 software trigger + 1 + 1 + + + + + D1DTH12R + D1DTH12R + DAC1 12-bit right-aligned data holding register(DAC_D1DTH12R) + 0x8 + 0x20 + read-write + 0x00000000 + + + D1DT12R + DAC1 12-bit right-aligned data + 0 + 12 + + + + + D1DTH12L + D1DTH12L + DAC1 12-bit left aligned data holding register (DAC_D1DTH12L) + 0xC + 0x20 + read-write + 0x00000000 + + + D1DT12L + DAC1 12-bit left-aligned data + 4 + 12 + + + + + D1DTH8R + D1DTH8R + DAC1 8-bit right aligned data holding register (DAC_D1DTH8R) + 0x10 + 0x20 + read-write + 0x00000000 + + + D1DT8R + DAC1 8-bit right-aligned data + 0 + 8 + + + + + D2DTH12R + D2DTH12R + DAC2 12-bit right aligned data holding register (DAC_D2DTH12R) + 0x14 + 0x20 + read-write + 0x00000000 + + + D2DT12R + DAC2 12-bit right-aligned + data + 0 + 12 + + + + + D2DTH12L + D2DTH12L + DAC2 12-bit left aligned data holding register (DAC_D2DTH12L) + 0x18 + 0x20 + read-write + 0x00000000 + + + D2DT12L + DAC2 12-bit left-aligned data + 4 + 12 + + + + + D2DTH8R + D2DTH8R + DAC2 8-bit right-aligned data holding register (DAC_D2DTH8R) + 0x1C + 0x20 + read-write + 0x00000000 + + + D2DT8R + DAC2 8-bit right-aligned + data + 0 + 8 + + + + + DDTH12R + DDTH12R + Dual DAC 12-bit right-aligned data holding register (DAC_DDTH12R), Bits 31:28 Reserved, Bits 15:12 Reserved + 0x20 + 0x20 + read-write + 0x00000000 + + + DD1DT12R + DAC1 12-bit right-aligned data + 0 + 12 + + + DD2DT12R + DAC2 12-bit right-aligned data + 16 + 12 + + + + + DDTH12L + DDTH12L + DUAL DAC 12-bit left aligned data holding register (DAC_DDTH12L), Bits 19:16 Reserved, Bits 3:0 Reserved + 0x24 + 0x20 + read-write + 0x00000000 + + + DD1DT12L + DAC1 12-bit left-aligned data + 4 + 12 + + + DD2DT12L + DAC2 12-bit right-aligned data + 20 + 12 + + + + + DDTH8R + DDTH8R + DUAL DAC 8-bit right aligned data holding register (DAC_DDTH8R), Bits 31:16 Reserved + 0x28 + 0x20 + read-write + 0x00000000 + + + DD1DT8R + DAC1 8-bit right-aligned data + 0 + 8 + + + DD2DT8R + DAC2 8-bit right-aligned data + 8 + 8 + + + + + D1ODT + D1ODT + DAC1 data output register (DAC_D1ODT) + 0x2C + 0x20 + read-only + 0x00000000 + + + D1ODT + DAC1 data output + 0 + 12 + + + + + D2ODT + D2ODT + DAC2 data output register (DAC_D2ODT) + 0x30 + 0x20 + read-only + 0x00000000 + + + D2ODT + DAC2 data output + 0 + 12 + + + + + STS + STS + DAC2 status register + (DAC_STS) + 0x34 + 0x20 + read-write + 0x00000000 + + + DMAUDR1 + DAC1 DMA underrun flag + 13 + 1 + + + DMAUDR2 + DAC2 DMA underrun flag + 29 + 1 + + + + + + + DEBUG + Debug support + DEBUG + 0xE0042000 + + 0x0 + 0x400 + registers + + + + IDCODE + IDCODE + DEBUG IDCODE + 0x0 + 0x20 + read-only + 0x0 + + + PID + Product ID + 0 + 32 + + + + + CTRL + CTRL + DEBUG CTRL + 0x4 + 0x20 + read-write + 0x0 + + + SLEEP_DEBUG + SLEEP_DEBUG + 0 + 1 + + + DEEPSLEEP_DEBUG + DEEPSLEEP_DEBUG + 1 + 1 + + + STANDBY_DEBUG + STANDBY_DEBUG + 2 + 1 + + + + + APB1_PAUSE + APB1_PAUSE + DEBUG APB1 PAUSE + 0x8 + 0x20 + read-write + 0x0 + + + TMR2_PAUSE + TMR2_PAUSE + 0 + 1 + + + TMR3_PAUSE + TMR3_PAUSE + 1 + 1 + + + TMR4_PAUSE + TMR4_PAUSE + 2 + 1 + + + TMR5_PAUSE + TMR5_PAUSE + 3 + 1 + + + TMR6_PAUSE + TMR6_PAUSE + 4 + 1 + + + TMR7_PAUSE + TMR7_PAUSE + 5 + 1 + + + TMR12_PAUSE + TMR12_PAUSE + 6 + 1 + + + TMR13_PAUSE + TMR13_PAUSE + 7 + 1 + + + TMR14_PAUSE + TMR14_PAUSE + 8 + 1 + + + ERTC_PAUSE + ERTC_PAUSE + 10 + 1 + + + WWDT_PAUSE + WWDT_PAUSE + 11 + 1 + + + WDT_PAUSE + WDT_PAUSE + 12 + 1 + + + ERTC512_PAUSE + ERTC512_PAUSE + 15 + 1 + + + I2C1_SMBUS_TIMEOUT + I2C1_SMBUS_TIMEOUT + 24 + 1 + + + CAN1_PAUSE + CAN1_PAUSE + 25 + 1 + + + CAN2_PAUSE + CAN2_PAUSE + 26 + 1 + + + I2C2_SMBUS_TIMEOUT + I2C2_SMBUS_TIMEOUT + 27 + 1 + + + I2C3_SMBUS_TIMEOUT + I2C3_SMBUS_TIMEOUT + 28 + 1 + + + + + APB2_PAUSE + APB2_PAUSE + DEBUG APB2 PAUSE + 0xC + 0x20 + read-write + 0x0 + + + TMR1_PAUSE + TMR1_PAUSE + 0 + 1 + + + TMR8_PAUSE + TMR8_PAUSE + 1 + 1 + + + TMR20_PAUSE + TIM20_PAUSE + 6 + 1 + + + TMR9_PAUSE + TMR9_PAUSE + 16 + 1 + + + TMR10_PAUSE + TMR10_PAUSE + 17 + 1 + + + TMR11_PAUSE + TMR11_PAUSE + 18 + 1 + + + + + SER_ID + SER_ID + SERIES ID + 0x20 + 0x20 + read-only + 0x0 + + + REV_ID + version ID + 0 + 3 + + + SER_ID + series ID + 8 + 8 + + + + + + + UART4 + Universal asynchronous receiver transmitter + 0x40004C00 + + UART4 + UART4 global interrupt + 52 + + + + UART5 + Universal asynchronous receiver transmitter + 0x40005000 + + UART5 + UART5 global interrupt + 53 + + + + UART7 + Universal asynchronous receiver transmitter + 0x40007800 + + UART7 + UART7 global interrupt + 82 + + + + UART8 + Universal asynchronous receiver transmitter + 0x40007C00 + + UART8 + UART8 global interrupt + 83 + + + + CRC + CRC calculation unit + CRC + 0x40023000 + + 0x0 + 0x400 + registers + + + + DT + DT + Data register + 0x0 + 0x20 + read-write + 0xFFFFFFFF + + + DT + Data Register + 0 + 32 + + + + + CDT + CDT + Common data register + 0x4 + 0x20 + read-write + 0x00000000 + + + CDT + Common Data + 0 + 1 + + + + + CTRL + CTRL + Control register + 0x8 + 0x20 + read-write + 0x00000000 + + + RST + Reset bit + 0 + 1 + + + REVID + Reverse input data + 5 + 2 + + + REVOD + Reverse output data + 7 + 1 + + + + + IDT + IDT + Initial data register + 0x10 + 0x20 + read-write + 0xFFFFFFFF + + + IDT + Initial Data + 0 + 32 + + + + + + + FLASH + Flash memory controler + FLASH + 0x40023C00 + + 0x0 + 0x400 + registers + + + FLASH + Flash global interrupt + 4 + + + + PSR + PSR + Performance selection register + 0x0 + 0x20 + 0x00000330 + + + NZW_BST_STS + Flash non-zero wait area boost status + 13 + 1 + read-only + + + NZW_BST + Flash non-zero wait area boost + 12 + 1 + read-write + + + + + UNLOCK + UNLOCK + Unlock register + 0x4 + 0x20 + write-only + 0x00000000 + + + UKVAL + Unlock key value + 0 + 32 + + + + + USD_UNLOCK + USD_UNLOCK + USD unlock register + 0x8 + 0x20 + write-only + 0x00000000 + + + USD_UKVAL + User system data Unlock key value + 0 + 32 + + + + + STS + STS + Status register + 0xC + 0x20 + 0x00000000 + + + ODF + Operate done flag + 5 + 1 + read-write + + + EPPERR + Erase/program protection error + 4 + 1 + read-write + + + PRGMERR + program error + 2 + 1 + read-write + + + OBF + Operate busy flag + 0 + 1 + read-only + + + + + CTRL + CTRL + Control register + 0x10 + 0x20 + read-write + 0x00000080 + + + FPRGM + Flash program + 0 + 1 + + + SECERS + Sector erase + 1 + 1 + + + BANKERS + Bank erase + 2 + 1 + + + BLKERS + Block erase + 3 + 1 + + + USDPRGM + User system data program + 4 + 1 + + + USDERS + User system data erase + 5 + 1 + + + ERSTR + Erasing start + 6 + 1 + + + OPLK + Operation lock + 7 + 1 + + + USDULKS + User system data unlock success + 9 + 1 + + + ERRIE + Error interrupt enable + 10 + 1 + + + ODFIE + Operation done flag interrupt enable + 12 + 1 + + + + + ADDR + ADDR + Address register + 0x14 + 0x20 + write-only + 0x00000000 + + + FA + Flash Address + 0 + 32 + + + + + USD + USD + User system data register + 0x1C + 0x20 + read-only + 0x03FFFFFC + + + USDERR + User system data error + 0 + 1 + + + FAP + FLASH access protection + 1 + 1 + + + nWDT_ATO_EN + WDT auto enable + 2 + 1 + + + nDEPSLP_RST + Deepsleep reset + 3 + 1 + + + nSTDBY_RST + Standby reset + 4 + 1 + + + BTOPT + boot option + 5 + 1 + + + nWDT_DEPSLP + WDT deep sleep + 7 + 1 + + + nWDT_STDBY + WDT standby + 8 + 1 + + + USER_D0 + User data 0 + 10 + 8 + + + USER_D1 + User data 1 + 18 + 8 + + + + + EPPS0 + EPPS0 + Erase/program protection status register 0 + 0x20 + 0x20 + read-only + 0xFFFFFFFF + + + EPPS + Erase/program protection status + 0 + 32 + + + + + EPPS1 + EPPS1 + Erase/program protection status register 1 + 0x2C + 0x20 + read-only + 0xFFFFFFFF + + + EPPS + Erase/program protection status + 0 + 32 + + + + + UNLOCK2 + UNLOCK2 + Unlock 2 register + 0x44 + 0x20 + write-only + 0x00000000 + + + UKVAL + Unlock key value + 0 + 32 + + + + + STS2 + STS2 + Status 2 register + 0x4C + 0x20 + 0x00000000 + + + OBF + Operate busy flag + 0 + 1 + read-only + + + PRGMERR + program error + 2 + 1 + read-write + + + EPPERR + Erase/program protection error + 4 + 1 + read-write + + + ODF + Operate done flag + 5 + 1 + read-write + + + + + CTRL2 + CTRL2 + Control 2 register + 0x50 + 0x20 + read-write + 0x00000080 + + + FPRGM + Flash program + 0 + 1 + + + SECERS + Sector erase + 1 + 1 + + + BANKERS + Bank erase + 2 + 1 + + + BLKERS + Block erase + 3 + 1 + + + ERSTR + Erasing start + 6 + 1 + + + OPLK + Operation lock + 7 + 1 + + + ERRIE + Error interrupt enable + 10 + 1 + + + ODFIE + Operation done flag interrupt enable + 12 + 1 + + + + + ADDR2 + ADDR2 + Address 2 register + 0x54 + 0x20 + write-only + 0x00000000 + + + FA + Flash Address + 0 + 32 + + + + + CONTR + CONTR + Flash continue read register + 0x58 + 0x20 + read-write + 0x00000080 + + + FCONTR_EN + Flash continue read enable + 31 + 1 + + + + + DIVR + DIVR + Flash divider register + 0x60 + 0x20 + 0x00000022 + + + FDIV + Flash divider + 0 + 2 + read-write + + + FDIV_STS + Flash divider status + 4 + 2 + read-only + + + + + SLIB_STS2 + SLIB_STS2 + sLib status 2 register + 0xC8 + 0x20 + 0x0000FFFF + + + SLIB_INST_SS + sLib instruction start sector + 0 + 16 + read-only + + + + + SLIB_STS0 + SLIB_STS0 + sLib status 0 register + 0xCC + 0x20 + 0x00000000 + + + SLIB_ENF + sLib enabled flag + 3 + 1 + read-only + + + + + SLIB_STS1 + SLIB_STS1 + sLib status 1 register + 0xD0 + 0x20 + 0xFFFFFFFF + + + SLIB_SS + sLib start sector + 0 + 16 + read-only + + + SLIB_ES + sLib end sector + 16 + 16 + read-only + + + + + SLIB_PWD_CLR + SLIB_PWD_CLR + SLIB password clear register + 0xD4 + 0x20 + 0x00000000 + write-only + + + SLIB_PCLR_VAL + sLib password clear value + 0 + 32 + + + + + SLIB_MISC_STS + SLIB_MISC_STS + sLib misc status register + 0xD8 + 0x20 + 0x01000000 + + + SLIB_PWD_ERR + sLib password error + 0 + 1 + read-only + + + SLIB_PWD_OK + sLib password ok + 1 + 1 + read-only + + + SLIB_ULKF + sLib unlock flag + 2 + 1 + read-only + + + SLIB_RCNT + sLib remaining count + 16 + 9 + read-only + + + + + SLIB_SET_PWD + SLIB_SET_PWD + sLib password setting register + 0xDC + 0x20 + 0x00000000 + write-only + + + SLIB_PSET_VAL + sLib password setting val + 0 + 32 + + + + + SLIB_SET_RANGE0 + SLIB_SET_RANGE0 + Configure sLib range register 0 + 0xE0 + 0x20 + 0x00000000 + write-only + + + SLIB_SS_SET + sLib start sector setting + 0 + 16 + + + SLIB_ES_SET + sLib end sector setting + 16 + 16 + + + + + SLIB_SET_RANGE1 + SLIB_SET_RANGE1 + Configure sLib range register 1 + 0xE4 + 0x20 + 0x00000000 + write-only + + + SLIB_ISS_SET + sLib instruction start sector setting + 0 + 16 + + + SET_SLIB_STRT + sLib start setting + 31 + 1 + + + + + SLIB_UNLOCK + SLIB_UNLOCK + sLib unlock register + 0xF0 + 0x20 + 0x00000000 + write-only + + + SLIB_UKVAL + sLib unlock key value + 0 + 32 + + + + + CRC_CTRL + CRC_CTRL + CRC controler register + 0xF4 + 0x20 + 0x00000000 + write-only + + + CRC_SS + CRC start sector + 0 + 12 + + + CRC_SN + CRC sector numbler + 12 + 12 + + + CRC_STRT + CRC start + 31 + 1 + + + + + CRC_CHKR + CRC_CHKR + CRC check result register + 0xF8 + 0x20 + 0x00000000 + read-only + + + CRC_CHKR + CRC check result + 0 + 32 + + + + + + + NVIC + Nested Vectored Interrupt + Controller + NVIC + 0xE000E000 + + 0x0 + 0x1001 + registers + + + + ICTR + ICTR + Interrupt Controller Type + Register + 0x4 + 0x20 + read-only + 0x00000000 + + + INTLINESNUM + Total number of interrupt lines in + groups + 0 + 4 + + + + + STIR + STIR + Software Triggered Interrupt + Register + 0xF00 + 0x20 + write-only + 0x00000000 + + + INTID + interrupt to be triggered + 0 + 9 + + + + + ISER0 + ISER0 + Interrupt Set-Enable Register + 0x100 + 0x20 + read-write + 0x00000000 + + + SETENA + SETENA + 0 + 32 + + + + + ISER1 + ISER1 + Interrupt Set-Enable Register + 0x104 + 0x20 + read-write + 0x00000000 + + + SETENA + SETENA + 0 + 32 + + + + + ICER0 + ICER0 + Interrupt Clear-Enable + Register + 0x180 + 0x20 + read-write + 0x00000000 + + + CLRENA + CLRENA + 0 + 32 + + + + + ICER1 + ICER1 + Interrupt Clear-Enable + Register + 0x184 + 0x20 + read-write + 0x00000000 + + + CLRENA + CLRENA + 0 + 32 + + + + + ISPR0 + ISPR0 + Interrupt Set-Pending Register + 0x200 + 0x20 + read-write + 0x00000000 + + + SETPEND + SETPEND + 0 + 32 + + + + + ISPR1 + ISPR1 + Interrupt Set-Pending Register + 0x204 + 0x20 + read-write + 0x00000000 + + + SETPEND + SETPEND + 0 + 32 + + + + + ICPR0 + ICPR0 + Interrupt Clear-Pending + Register + 0x280 + 0x20 + read-write + 0x00000000 + + + CLRPEND + CLRPEND + 0 + 32 + + + + + ICPR1 + ICPR1 + Interrupt Clear-Pending + Register + 0x284 + 0x20 + read-write + 0x00000000 + + + CLRPEND + CLRPEND + 0 + 32 + + + + + IABR0 + IABR0 + Interrupt Active Bit Register + 0x300 + 0x20 + read-only + 0x00000000 + + + ACTIVE + ACTIVE + 0 + 32 + + + + + IABR1 + IABR1 + Interrupt Active Bit Register + 0x304 + 0x20 + read-only + 0x00000000 + + + ACTIVE + ACTIVE + 0 + 32 + + + + + IPR0 + IPR0 + Interrupt Priority Register + 0x400 + 0x20 + read-write + 0x00000000 + + + IPR_N0 + IPR_N0 + 0 + 8 + + + IPR_N1 + IPR_N1 + 8 + 8 + + + IPR_N2 + IPR_N2 + 16 + 8 + + + IPR_N3 + IPR_N3 + 24 + 8 + + + + + IPR1 + IPR1 + Interrupt Priority Register + 0x404 + 0x20 + read-write + 0x00000000 + + + IPR_N0 + IPR_N0 + 0 + 8 + + + IPR_N1 + IPR_N1 + 8 + 8 + + + IPR_N2 + IPR_N2 + 16 + 8 + + + IPR_N3 + IPR_N3 + 24 + 8 + + + + + IPR2 + IPR2 + Interrupt Priority Register + 0x408 + 0x20 + read-write + 0x00000000 + + + IPR_N0 + IPR_N0 + 0 + 8 + + + IPR_N1 + IPR_N1 + 8 + 8 + + + IPR_N2 + IPR_N2 + 16 + 8 + + + IPR_N3 + IPR_N3 + 24 + 8 + + + + + IPR3 + IPR3 + Interrupt Priority Register + 0x40C + 0x20 + read-write + 0x00000000 + + + IPR_N0 + IPR_N0 + 0 + 8 + + + IPR_N1 + IPR_N1 + 8 + 8 + + + IPR_N2 + IPR_N2 + 16 + 8 + + + IPR_N3 + IPR_N3 + 24 + 8 + + + + + IPR4 + IPR4 + Interrupt Priority Register + 0x410 + 0x20 + read-write + 0x00000000 + + + IPR_N0 + IPR_N0 + 0 + 8 + + + IPR_N1 + IPR_N1 + 8 + 8 + + + IPR_N2 + IPR_N2 + 16 + 8 + + + IPR_N3 + IPR_N3 + 24 + 8 + + + + + IPR5 + IPR5 + Interrupt Priority Register + 0x414 + 0x20 + read-write + 0x00000000 + + + IPR_N0 + IPR_N0 + 0 + 8 + + + IPR_N1 + IPR_N1 + 8 + 8 + + + IPR_N2 + IPR_N2 + 16 + 8 + + + IPR_N3 + IPR_N3 + 24 + 8 + + + + + IPR6 + IPR6 + Interrupt Priority Register + 0x418 + 0x20 + read-write + 0x00000000 + + + IPR_N0 + IPR_N0 + 0 + 8 + + + IPR_N1 + IPR_N1 + 8 + 8 + + + IPR_N2 + IPR_N2 + 16 + 8 + + + IPR_N3 + IPR_N3 + 24 + 8 + + + + + IPR7 + IPR7 + Interrupt Priority Register + 0x41C + 0x20 + read-write + 0x00000000 + + + IPR_N0 + IPR_N0 + 0 + 8 + + + IPR_N1 + IPR_N1 + 8 + 8 + + + IPR_N2 + IPR_N2 + 16 + 8 + + + IPR_N3 + IPR_N3 + 24 + 8 + + + + + IPR8 + IPR8 + Interrupt Priority Register + 0x420 + 0x20 + read-write + 0x00000000 + + + IPR_N0 + IPR_N0 + 0 + 8 + + + IPR_N1 + IPR_N1 + 8 + 8 + + + IPR_N2 + IPR_N2 + 16 + 8 + + + IPR_N3 + IPR_N3 + 24 + 8 + + + + + IPR9 + IPR9 + Interrupt Priority Register + 0x424 + 0x20 + read-write + 0x00000000 + + + IPR_N0 + IPR_N0 + 0 + 8 + + + IPR_N1 + IPR_N1 + 8 + 8 + + + IPR_N2 + IPR_N2 + 16 + 8 + + + IPR_N3 + IPR_N3 + 24 + 8 + + + + + IPR10 + IPR10 + Interrupt Priority Register + 0x428 + 0x20 + read-write + 0x00000000 + + + IPR_N0 + IPR_N0 + 0 + 8 + + + IPR_N1 + IPR_N1 + 8 + 8 + + + IPR_N2 + IPR_N2 + 16 + 8 + + + IPR_N3 + IPR_N3 + 24 + 8 + + + + + IPR11 + IPR11 + Interrupt Priority Register + 0x42C + 0x20 + read-write + 0x00000000 + + + IPR_N0 + IPR_N0 + 0 + 8 + + + IPR_N1 + IPR_N1 + 8 + 8 + + + IPR_N2 + IPR_N2 + 16 + 8 + + + IPR_N3 + IPR_N3 + 24 + 8 + + + + + IPR12 + IPR12 + Interrupt Priority Register + 0x430 + 0x20 + read-write + 0x00000000 + + + IPR_N0 + IPR_N0 + 0 + 8 + + + IPR_N1 + IPR_N1 + 8 + 8 + + + IPR_N2 + IPR_N2 + 16 + 8 + + + IPR_N3 + IPR_N3 + 24 + 8 + + + + + IPR13 + IPR13 + Interrupt Priority Register + 0x434 + 0x20 + read-write + 0x00000000 + + + IPR_N0 + IPR_N0 + 0 + 8 + + + IPR_N1 + IPR_N1 + 8 + 8 + + + IPR_N2 + IPR_N2 + 16 + 8 + + + IPR_N3 + IPR_N3 + 24 + 8 + + + + + IPR14 + IPR14 + Interrupt Priority Register + 0x438 + 0x20 + read-write + 0x00000000 + + + IPR_N0 + IPR_N0 + 0 + 8 + + + IPR_N1 + IPR_N1 + 8 + 8 + + + IPR_N2 + IPR_N2 + 16 + 8 + + + IPR_N3 + IPR_N3 + 24 + 8 + + + + + + + DVP + Digital video parallel interface + DVP + 0x50050000 + + 0x0 + 0x400 + registers + + + DVP + DVP global interrupt + 78 + + + + CTRL + CTRL + Control register + 0x0 + 0x20 + 0x0000 + + + LCDS + Line capture/drop selection + 20 + 1 + read-write + + + LCDC + Line capture/drop control + + 19 + 1 + read-write + + + PCDS + Pixel capture/drop selection + + 18 + 1 + read-write + + + PCDC + Basic pixel capture/drop control + + 16 + 2 + read-write + + + ENA + DVP enable + 14 + 1 + read-write + + + PDL + Pixel data length + 10 + 2 + read-write + + + BFRC + Basic frame rate control + 8 + 2 + read-write + + + VSP + Vertical synchronization + polarity + 7 + 1 + read-write + + + HSP + Horizontal synchronization polarity + + 6 + 1 + read-write + + + CKP + Pixel clock polarity + 5 + 1 + read-write + + + SM + synchronization mode + 4 + 1 + read-write + + + JPEG + JPEG format + 3 + 1 + read-write + + + CRP + Cropping function enable + 2 + 1 + read-write + + + CFM + Capture fire mode + 1 + 1 + read-write + + + CAP + Capture function enable + 0 + 1 + read-write + + + + + STS + STS + status register + 0x4 + 0x20 + read-only + 0x0000 + + + OFNE + Output FIFO Non-empty + 2 + 1 + + + VSYN + Vertical synchronization status + 1 + 1 + + + HSYN + Horizontal synchronization status + 0 + 1 + + + + + ESTS + ESTS + Event status register + 0x8 + 0x20 + read-only + 0x0000 + + + HSES + Horizontal synchronization event status + 4 + 1 + + + VSES + Vertical synchronization event status + 3 + 1 + + + ESEES + Embedded synchronization error event status + + 2 + 1 + + + OVRES + Data FIFO overrun event status + + 1 + 1 + + + CFDES + Capture frame done event status + + 0 + 1 + + + + + IENA + IENA + interrupt enable register + 0xC + 0x20 + read-write + 0x0000 + + + HSIE + Horizontal synchronization interrupt enable + + 4 + 1 + + + VSIE + Vertical synchronization interrupt enablee + + 3 + 1 + + + ESEIE + Embedded synchronization error interrupt + enable + 2 + 1 + + + OVRIE + Data FIFO overrun interrupt enable + + 1 + 1 + + + CFDIE + Capture frame done interrupt enable + + 0 + 1 + + + + + ISTS + ISTS + Interrupt status register + 0x10 + 0x20 + read-only + 0x0000 + + + HSIS + Horizontal synchronization interrupt + status + 4 + 1 + + + VSIS + Vertical synchronization interrupt + status + 3 + 1 + + + ESEIS + Embedded synchronization error + interrupt status + 2 + 1 + + + OVRIS + Data FIFO overrun interrupt + status + 1 + 1 + + + CFDIS + Capture frame done interrupt + status + 0 + 1 + + + + + ICLR + ICLR + Interrupt clear register + 0x14 + 0x20 + write-only + 0x0000 + + + HSIC + Horizontal synchronization + interrupt clear + 4 + 1 + + + VSIC + Vertical synchronization + interrupt clear + 3 + 1 + + + ESEIC + Embedded synchronization + error interrupt clear + 2 + 1 + + + OVRIC + Data FIFO overrun + interrupt clear + 1 + 1 + + + CFDIC + Capture frame done + interrupt clear + 0 + 1 + + + + + SCR + SCR + Synchronization code + register + 0x18 + 0x20 + read-write + 0x0000 + + + FMEC + Frame end code + 24 + 8 + + + LNEC + Line end code + 16 + 8 + + + LNSC + Line start code + 8 + 8 + + + FMSC + Frame start code + 0 + 8 + + + + + SUR + SUR + Synchronization unmask + register + 0x1C + 0x20 + read-write + 0x0000 + + + FMEU + Frame end unmask + 24 + 8 + + + LNEU + Line end unmask + 16 + 8 + + + LNSU + Line start unmask + + 8 + 8 + + + FMSU + Frame start unmask + + 0 + 8 + + + + + CWST + CWST + Crop window start + 0x20 + 0x20 + read-write + 0x0000 + + + CVSTR + Cropping window vertical start line + + 16 + 13 + + + CHSTR + Cropping window horizontal start pixel + + 0 + 14 + + + + + CWSZ + CWSZ + Crop window size + 0x24 + 0x20 + read-write + 0x0000 + + + CVNUM + Cropping window vertical line number + + 16 + 14 + + + CHNUM + Cropping window horizontal pixel number + + 0 + 14 + + + + + DT + DT + Data register + 0x28 + 0x20 + read-only + 0x0000 + + + DT + Data Port + 0 + 32 + + + + + ACTRL + ACTRL + Advanced Control register + + 0x40 + 0x20 + read-write + 0x0000 + + + VSEID + Vertical synchonization event and interrupt + definition + 17 + 1 + + + HSEID + Horizontal synchonization event and interrupt + definition + 16 + 1 + + + DMABT + DMA burst transfer configuration + + 12 + 1 + + + IDUS + Input data un-used setting + + 10 + 1 + + + IDUN + Input data un-used number + + 8 + 2 + + + EFDM + Enhanced function data format management + + 6 + 1 + + + EFDF + Enhanced function data format + + 4 + 2 + + + PCDES + Basic pixel capture/drop extended + selection + 3 + 1 + + + MIBE + Monochrome image binarization + enable + 2 + 1 + + + EFRCE + Enhanced frame rate control + enable + 1 + 1 + + + EISRE + Enhanced image scaling resize + enable + 0 + 1 + + + + + HSCF + HSCF + Horizontal scaling control flow + + 0x48 + 0x20 + read-write + 0x0000 + + + HSRTF + Horizontal scaling resize target factor + + 16 + 13 + + + HSRSF + Horizontal scaling resize source factor + + 0 + 13 + + + + + VSCF + VSCF + Vertical scaling control flow + + 0x4C + 0x20 + read-write + 0x0000 + + + VSRTF + Vertical scaling resize target factor + + 16 + 13 + + + VSRSF + Vertical scaling resize source factor + + 0 + 13 + + + + + FRF + FRF + Frame rate flow + + 0x50 + 0x20 + read-write + 0x0000 + + + EFRCTF + Enhanced frame rate control target factor + + 8 + 5 + + + EFRCSF + Enhanced frame rate contorl source factor + + 0 + 5 + + + + + BTH + BTH + Binarization threshold + + 0x54 + 0x20 + read-write + 0x0000 + + + MIBTHD + Monochrome image binarization threshold + + 0 + 8 + + + + + + + USB_OTG1_GLOBAL + USB on-the-go full speed + USB_OTG1 + 0x50000000 + + 0x0 + 0x400 + registers + + + OTGFS1 + USB On The Go FS global + interrupt + 67 + + + + GOTGCTL + GOTGCTL + OTGFS control and status register + (OTGFS_GOTGCTL) + 0x0 + 0x20 + 0x00000800 + + + CONIDSTS + Connector ID status + 16 + 1 + read-only + + + CURMOD + Current Mode of Operation + 21 + 1 + read-only + + + + + GOTGINT + GOTGINT + OTGFS interrupt register + (OTGFS_GOTGINT) + 0x4 + 0x20 + 0x00000000 + + + SESENDDET + VBUS is deasserted + 2 + 1 + read-write + + + + + GAHBCFG + GAHBCFG + OTGFS AHB configuration register + (OTGFS_GAHBCFG) + 0x8 + 0x20 + read-write + 0x00000000 + + + GLBINTMSK + Global interrupt mask + 0 + 1 + + + NPTXFEMPLVL + Non-Periodic TxFIFO empty level + 7 + 1 + + + PTXFEMPLVL + Periodic TxFIFO empty + level + 8 + 1 + + + + + GUSBCFG + GUSBCFG + USB configuration register + (OTGFS_GUSBCFG) + 0xC + 0x20 + 0x00000A00 + + + TOUTCAL + FS timeout calibration + 0 + 3 + read-write + + + USBTRDTIM + USB turnaround time + 10 + 4 + read-write + + + FHSTMODE + Force host mode + 29 + 1 + read-write + + + FDEVMODE + Force device mode + 30 + 1 + read-write + + + COTXPKT + Corrupt Tx packet + 31 + 1 + read-write + + + + + GRSTCTL + GRSTCTL + OTGFS reset register + (OTGFS_GRSTCTL) + 0x10 + 0x20 + 0x20000000 + + + CSFTRST + Core soft reset + 0 + 1 + read-write + + + PIUSFTRST + PIU FS Dedicated Controller Soft Reset + 1 + 1 + read-write + + + FRMCNTRST + Host frame counter reset + 2 + 1 + read-write + + + RXFFLSH + RxFIFO flush + 4 + 1 + read-write + + + TXFFLSH + TxFIFO flush + 5 + 1 + read-write + + + TXFNUM + TxFIFO number + 6 + 5 + read-write + + + AHBIDLE + AHB master idle + 31 + 1 + read-only + + + + + GINTSTS + GINTSTS + OTGFS core interrupt register + (OTGFS_GINTSTS) + 0x14 + 0x20 + 0x04000020 + + + CURMOD + Current mode of operation + 0 + 1 + read-only + + + MODEMIS + Mode mismatch interrupt + 1 + 1 + read-write + + + OTGINT + OTG interrupt + 2 + 1 + read-only + + + SOF + Start of frame + 3 + 1 + read-write + + + RXFLVL + RxFIFO non-empty + 4 + 1 + read-only + + + NPTXFEMP + Non-periodic TxFIFO empty + 5 + 1 + read-only + + + GINNAKEFF + Global IN non-periodic NAK + effective + 6 + 1 + read-only + + + GOUTNAKEFF + Global OUT NAK effective + 7 + 1 + read-only + + + ERLYSUSP + Early suspend + 10 + 1 + read-write + + + USBSUSP + USB suspend + 11 + 1 + read-write + + + USBRST + USB reset + 12 + 1 + read-write + + + ENUMDONE + Enumeration done + 13 + 1 + read-write + + + ISOOUTDROP + Isochronous OUT packet dropped + interrupt + 14 + 1 + read-write + + + EOPF + End of periodic frame + interrupt + 15 + 1 + read-write + + + IEPTINT + IN endpoint interrupt + 18 + 1 + read-only + + + OEPTINT + OUT endpoint interrupt + 19 + 1 + read-only + + + INCOMPISOIN + Incomplete isochronous IN + transfer + 20 + 1 + read-write + + + INCOMPIP_INCOMPISOOUT + Incomplete periodic transfer(Host + mode)/Incomplete isochronous OUT transfer(Device + mode) + 21 + 1 + read-write + + + PRTINT + Host port interrupt + 24 + 1 + read-only + + + HCHINT + Host channels interrupt + 25 + 1 + read-only + + + PTXFEMP + Periodic TxFIFO empty + 26 + 1 + read-only + + + CONIDSCHG + Connector ID status change + 28 + 1 + read-write + + + DISCONINT + Disconnect detected + interrupt + 29 + 1 + read-write + + + WKUPINT + Resume/remote wakeup detected + interrupt + 31 + 1 + read-write + + + + + GINTMSK + GINTMSK + OTG_FS interrupt mask register + (OTG_FS_GINTMSK) + 0x18 + 0x20 + 0x00000000 + + + MODEMISMSK + Mode mismatch interrupt + mask + 1 + 1 + read-write + + + OTGINTMSK + OTG interrupt mask + 2 + 1 + read-write + + + SOFMSK + Start of frame mask + 3 + 1 + read-write + + + RXFLVLMSK + Receive FIFO non-empty + mask + 4 + 1 + read-write + + + NPTXFEMPMSK + Non-periodic TxFIFO empty + mask + 5 + 1 + read-write + + + GINNAKEFFMSK + Global non-periodic IN NAK effective + mask + 6 + 1 + read-write + + + GOUTNAKEFFMSK + Global OUT NAK effective + mask + 7 + 1 + read-write + + + ERLYSUSPMSK + Early suspend mask + 10 + 1 + read-write + + + USBSUSPMSK + USB suspend mask + 11 + 1 + read-write + + + USBRSTMSK + USB reset mask + 12 + 1 + read-write + + + ENUMDONEMSK + Enumeration done mask + 13 + 1 + read-write + + + ISOOUTDROPMSK + Isochronous OUT packet dropped interrupt + mask + 14 + 1 + read-write + + + EOPFMSK + End of periodic frame interrupt + mask + 15 + 1 + read-write + + + IEPTINTMSK + IN endpoints interrupt + mask + 18 + 1 + read-write + + + OEPTINTMSK + OUT endpoints interrupt + mask + 19 + 1 + read-write + + + INCOMISOINMSK + Incomplete isochronous IN transfer + mask + 20 + 1 + read-write + + + INCOMPIP_INCOMPISOOUTMSK + Incomplete periodic transfer mask(Host + mode)/Incomplete isochronous OUT transfer mask(Device + mode) + 21 + 1 + read-write + + + PRTINTMSK + Host port interrupt mask + 24 + 1 + read-write + + + HCHINTMSK + Host channels interrupt + mask + 25 + 1 + read-write + + + PTXFEMPMSK + Periodic TxFIFO empty mask + 26 + 1 + read-write + + + CONIDSCHGMSK + Connector ID status change + mask + 28 + 1 + read-write + + + DISCONINTMSK + Disconnect detected interrupt + mask + 29 + 1 + read-write + + + WKUPINTMSK + Resume/remote wakeup detected interrupt + mask + 31 + 1 + read-write + + + + + GRXSTSR_Device + GRXSTSR_Device + OTGFS Receive status debug read(Device + mode) + 0x1C + 0x20 + read-only + 0x00000000 + + + EPTNUM + Endpoint number + 0 + 4 + + + BCNT + Byte count + 4 + 11 + + + DPID + Data PID + 15 + 2 + + + PKTSTS + Packet status + 17 + 4 + + + FN + Frame number + 21 + 4 + + + + + GRXSTSR_Host + GRXSTSR_Host + OTGFS Receive status debug read(Host + mode) + GRXSTSR_Device + 0x1C + 0x20 + read-only + 0x00000000 + + + CHNUM + Channel number + 0 + 4 + + + BCNT + Byte count + 4 + 11 + + + DPID + Data PID + 15 + 2 + + + PKTSTS + Packet status + 17 + 4 + + + + + GRXFSIZ + GRXFSIZ + OTGFS Receive FIFO size register + (OTGFS_GRXFSIZ) + 0x24 + 0x20 + read-write + 0x00000200 + + + RXFDEP + RxFIFO depth + 0 + 16 + + + + + DIEPTXF0 + DIEPTXF0 + IN Endpoint TxFIFO 0 transmit FIFO size + register (Device mode) + 0x28 + 0x20 + read-write + 0x00000200 + + + INEPT0TXSTADDR + Endpoint 0 transmit RAM start + address + 0 + 16 + + + INEPT0TXDEP + Endpoint 0 TxFIFO depth + 16 + 16 + + + + + GNPTXFSIZ + GNPTXFSIZ + OTGFS non-periodic transmit FIFO size + register (Host mode) + DIEPTXF0 + 0x28 + 0x20 + read-write + 0x00000200 + + + NPTXFSTADDR + Non-periodic Transmit RAM Start + address + 0 + 16 + + + NPTXFDEP + Non-periodic TxFIFO depth + 16 + 16 + + + + + GNPTXSTS + GNPTXSTS + OTGFS non-periodic transmit FIFO/queue + status register (OTGFS_GNPTXSTS) + 0x2C + 0x20 + read-only + 0x00080200 + + + NPTXFSPCAVAIL + Non-periodic TxFIFO space + available + 0 + 16 + + + NPTXQSPCAVAIL + Non-periodic transmit request queue + space available + 16 + 8 + + + NPTXQTOP + Top of the non-periodic transmit request + queue + 24 + 7 + + + + + GCCFG + GCCFG + OTGFS general core configuration register + (OTGFS_GCCFG) + 0x38 + 0x20 + read-write + 0x00000000 + + + PWRDOWN + Power down + 16 + 1 + + + LP_MODE + Low power mode + 17 + 1 + + + SOFOUTEN + SOF output enable + 20 + 1 + + + VBUSIG + VBUS Ignored + 21 + 1 + + + + + GUID + GUID + Product ID register + 0x3C + 0x20 + read-write + 0x00001000 + + + USERID + Product ID field + 0 + 32 + + + + + HPTXFSIZ + HPTXFSIZ + OTGFS Host periodic transmit FIFO size + register (OTGFS_HPTXFSIZ) + 0x100 + 0x20 + read-write + 0x02000600 + + + PTXFSTADDR + Host periodic TxFIFO start + address + 0 + 16 + + + PTXFSIZE + Host periodic TxFIFO depth + 16 + 16 + + + + + DIEPTXF1 + DIEPTXF1 + OTGFS device IN endpoint transmit FIFO size + register (OTGFS_DIEPTXF1) + 0x104 + 0x20 + read-write + 0x02000400 + + + INEPTXFSTADDR + IN endpoint FIFO1 transmit RAM start + address + 0 + 16 + + + INEPTXFDEP + IN endpoint TxFIFO depth + 16 + 16 + + + + + DIEPTXF2 + DIEPTXF2 + OTGFS device IN endpoint transmit FIFO size + register (OTGFS_DIEPTXF2) + 0x108 + 0x20 + read-write + 0x02000400 + + + INEPTXFSTADDR + IN endpoint FIFO2 transmit RAM start + address + 0 + 16 + + + INEPTXFDEP + IN endpoint TxFIFO depth + 16 + 16 + + + + + DIEPTXF3 + DIEPTXF3 + OTGFS device IN endpoint transmit FIFO size + register (OTGFS_DIEPTXF3) + 0x10C + 0x20 + read-write + 0x02000400 + + + INEPTXFSTADDR + IN endpoint FIFO3 transmit RAM start + address + 0 + 16 + + + INEPTXFDEP + IN endpoint TxFIFO depth + 16 + 16 + + + + + DIEPTXF4 + DIEPTXF4 + OTGFS device IN endpoint transmit FIFO size + register (OTGFS_DIEPTXF4) + 0x110 + 0x20 + read-write + 0x02000400 + + + INEPTXFSTADDR + IN endpoint FIFO4 transmit RAM start + address + 0 + 16 + + + INEPTXFDEP + IN endpoint TxFIFO depth + 16 + 16 + + + + + DIEPTXF5 + DIEPTXF5 + OTGFS device IN endpoint transmit FIFO size + register (OTGFS_DIEPTXF5) + 0x114 + 0x20 + read-write + 0x02000400 + + + INEPTXFSTADDR + IN endpoint FIFO5 transmit RAM start + address + 0 + 16 + + + INEPTXFDEP + IN endpoint TxFIFO depth + 16 + 16 + + + + + DIEPTXF6 + DIEPTXF6 + OTGFS device IN endpoint transmit FIFO size + register (OTGFS_DIEPTXF6) + 0x118 + 0x20 + read-write + 0x02000400 + + + INEPTXFSTADDR + IN endpoint FIFO6 transmit RAM start + address + 0 + 16 + + + INEPTXFDEP + IN endpoint TxFIFO depth + 16 + 16 + + + + + DIEPTXF7 + DIEPTXF7 + OTGFS device IN endpoint transmit FIFO size + register (OTGFS_DIEPTXF7) + 0x11C + 0x20 + read-write + 0x02000400 + + + INEPTXFSTADDR + IN endpoint FIFO7 transmit RAM start + address + 0 + 16 + + + INEPTXFDEP + IN endpoint TxFIFO depth + 16 + 16 + + + + + + + USB_OTG1_HOST + USB on the go full speed + USB_OTG1 + 0x50000400 + + 0x0 + 0x400 + registers + + + + HCFG + HCFG + OTGFS host configuration register + (OTGFS_HCFG) + 0x0 + 0x20 + 0x00000000 + + + FSLSPCLKSEL + FS/LS PHY clock select + 0 + 2 + read-write + + + FSLSSUPP + FS- and LS-only support + 2 + 1 + read-only + + + + + HFIR + HFIR + OTGFS Host frame interval + register + 0x4 + 0x20 + read-write + 0x0000EA60 + + + FRINT + Frame interval + 0 + 16 + + + + + HFNUM + HFNUM + OTGFS host frame number/frame time + remaining register (OTGFS_HFNUM) + 0x8 + 0x20 + read-only + 0x00003FFF + + + FRNUM + Frame number + 0 + 16 + + + FTREM + Frame time remaining + 16 + 16 + + + + + HPTXSTS + HPTXSTS + OTGFS_Host periodic transmit FIFO/queue + status register (OTGFS_HPTXSTS) + 0x10 + 0x20 + 0x00080100 + + + PTXFSPCAVAIL + Periodic transmit data FIFO space + available + 0 + 16 + read-write + + + PTXQSPCAVAIL + Periodic transmit request queue space + available + 16 + 8 + read-only + + + PTXQTOP + Top of the periodic transmit request + queue + 24 + 8 + read-only + + + + + HAINT + HAINT + OTGFS Host all channels interrupt + register + 0x14 + 0x20 + read-only + 0x00000000 + + + HAINT + Channel interrupts + 0 + 16 + + + + + HAINTMSK + HAINTMSK + OTGFS host all channels interrupt mask + register + 0x18 + 0x20 + read-write + 0x00000000 + + + HAINTMSK + Channel interrupt mask + 0 + 16 + + + + + HPRT + HPRT + OTGFS host port control and status register + (OTGFS_HPRT) + 0x40 + 0x20 + 0x00000000 + + + PRTCONSTS + Port connect status + 0 + 1 + read-only + + + PRTCONDET + Port connect detected + 1 + 1 + read-write + + + PRTENA + Port enable + 2 + 1 + read-write + + + PRTENCHNG + Port enable/disable change + 3 + 1 + read-write + + + PRTOVRCACT + Port overcurrent active + 4 + 1 + read-only + + + PRTOVRCCHNG + Port overcurrent change + 5 + 1 + read-write + + + PRTRES + Port resume + 6 + 1 + read-write + + + PRTSUSP + Port suspend + 7 + 1 + read-write + + + PRTRST + Port reset + 8 + 1 + read-write + + + PRTLNSTS + Port line status + 10 + 2 + read-only + + + PRTPWR + Port power + 12 + 1 + read-write + + + PRTTSTCTL + Port test control + 13 + 4 + read-write + + + PRTSPD + Port speed + 17 + 2 + read-only + + + + + HCCHAR0 + HCCHAR0 + OTGFS host channel-0 characteristics + register (OTGFS_HCCHAR0) + 0x100 + 0x20 + read-write + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + + + EPTNUM + Endpoint number + 11 + 4 + + + EPTDIR + Endpoint direction + 15 + 1 + + + LSPDDEV + Low-speed device + 17 + 1 + + + EPTYPE + Endpoint type + 18 + 2 + + + MC + Multicount + 20 + 2 + + + DEVADDR + Device address + 22 + 7 + + + ODDFRM + Odd frame + 29 + 1 + + + CHDIS + Channel disable + 30 + 1 + + + CHENA + Channel enable + 31 + 1 + + + + + HCCHAR1 + HCCHAR1 + OTGFS host channel-1 characteristics + register (OTGFS_HCCHAR1) + 0x120 + 0x20 + read-write + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + + + EPTNUM + Endpoint number + 11 + 4 + + + EPTDIR + Endpoint direction + 15 + 1 + + + LSPDDEV + Low-speed device + 17 + 1 + + + EPTYPE + Endpoint type + 18 + 2 + + + MC + Multicount + 20 + 2 + + + DEVADDR + Device address + 22 + 7 + + + ODDFRM + Odd frame + 29 + 1 + + + CHDIS + Channel disable + 30 + 1 + + + CHENA + Channel enable + 31 + 1 + + + + + HCCHAR2 + HCCHAR2 + OTGFS host channel-2 characteristics + register (OTGFS_HCCHAR2) + 0x140 + 0x20 + read-write + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + + + EPTNUM + Endpoint number + 11 + 4 + + + EPTDIR + Endpoint direction + 15 + 1 + + + LSPDDEV + Low-speed device + 17 + 1 + + + EPTYPE + Endpoint type + 18 + 2 + + + MC + Multicount + 20 + 2 + + + DEVADDR + Device address + 22 + 7 + + + ODDFRM + Odd frame + 29 + 1 + + + CHDIS + Channel disable + 30 + 1 + + + CHENA + Channel enable + 31 + 1 + + + + + HCCHAR3 + HCCHAR3 + OTGFS host channel-3 characteristics + register (OTGFS_HCCHAR3) + 0x160 + 0x20 + read-write + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + + + EPTNUM + Endpoint number + 11 + 4 + + + EPTDIR + Endpoint direction + 15 + 1 + + + LSPDDEV + Low-speed device + 17 + 1 + + + EPTYPE + Endpoint type + 18 + 2 + + + MC + Multicount + 20 + 2 + + + DEVADDR + Device address + 22 + 7 + + + ODDFRM + Odd frame + 29 + 1 + + + CHDIS + Channel disable + 30 + 1 + + + CHENA + Channel enable + 31 + 1 + + + + + HCCHAR4 + HCCHAR4 + OTGFS host channel-4 characteristics + register (OTGFS_HCCHAR4) + 0x180 + 0x20 + read-write + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + + + EPTNUM + Endpoint number + 11 + 4 + + + EPTDIR + Endpoint direction + 15 + 1 + + + LSPDDEV + Low-speed device + 17 + 1 + + + EPTYPE + Endpoint type + 18 + 2 + + + MC + Multicount + 20 + 2 + + + DEVADDR + Device address + 22 + 7 + + + ODDFRM + Odd frame + 29 + 1 + + + CHDIS + Channel disable + 30 + 1 + + + CHENA + Channel enable + 31 + 1 + + + + + HCCHAR5 + HCCHAR5 + OTGFS host channel-5 characteristics + register (OTGFS_HCCHAR5) + 0x1A0 + 0x20 + read-write + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + + + EPTNUM + Endpoint number + 11 + 4 + + + EPTDIR + Endpoint direction + 15 + 1 + + + LSPDDEV + Low-speed device + 17 + 1 + + + EPTYPE + Endpoint type + 18 + 2 + + + MC + Multicount + 20 + 2 + + + DEVADDR + Device address + 22 + 7 + + + ODDFRM + Odd frame + 29 + 1 + + + CHDIS + Channel disable + 30 + 1 + + + CHENA + Channel enable + 31 + 1 + + + + + HCCHAR6 + HCCHAR6 + OTGFS host channel-6 characteristics + register (OTGFS_HCCHAR6) + 0x1C0 + 0x20 + read-write + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + + + EPTNUM + Endpoint number + 11 + 4 + + + EPTDIR + Endpoint direction + 15 + 1 + + + LSPDDEV + Low-speed device + 17 + 1 + + + EPTYPE + Endpoint type + 18 + 2 + + + MC + Multicount + 20 + 2 + + + DEVADDR + Device address + 22 + 7 + + + ODDFRM + Odd frame + 29 + 1 + + + CHDIS + Channel disable + 30 + 1 + + + CHENA + Channel enable + 31 + 1 + + + + + HCCHAR7 + HCCHAR7 + OTGFS host channel-7 characteristics + register (OTGFS_HCCHAR7) + 0x1E0 + 0x20 + read-write + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + + + EPTNUM + Endpoint number + 11 + 4 + + + EPTDIR + Endpoint direction + 15 + 1 + + + LSPDDEV + Low-speed device + 17 + 1 + + + EPTYPE + Endpoint type + 18 + 2 + + + MC + Multicount + 20 + 2 + + + DEVADDR + Device address + 22 + 7 + + + ODDFRM + Odd frame + 29 + 1 + + + CHDIS + Channel disable + 30 + 1 + + + CHENA + Channel enable + 31 + 1 + + + + + HCCHAR8 + HCCHAR8 + OTGFS host channel-8 characteristics + register (OTGFS_HCCHAR8) + 0x200 + 0x20 + read-write + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + + + EPTNUM + Endpoint number + 11 + 4 + + + EPTDIR + Endpoint direction + 15 + 1 + + + LSPDDEV + Low-speed device + 17 + 1 + + + EPTYPE + Endpoint type + 18 + 2 + + + MC + Multicount + 20 + 2 + + + DEVADDR + Device address + 22 + 7 + + + ODDFRM + Odd frame + 29 + 1 + + + CHDIS + Channel disable + 30 + 1 + + + CHENA + Channel enable + 31 + 1 + + + + + HCCHAR9 + HCCHAR9 + OTGFS host channel-9 characteristics + register (OTGFS_HCCHAR9) + 0x220 + 0x20 + read-write + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + + + EPTNUM + Endpoint number + 11 + 4 + + + EPTDIR + Endpoint direction + 15 + 1 + + + LSPDDEV + Low-speed device + 17 + 1 + + + EPTYPE + Endpoint type + 18 + 2 + + + MC + Multicount + 20 + 2 + + + DEVADDR + Device address + 22 + 7 + + + ODDFRM + Odd frame + 29 + 1 + + + CHDIS + Channel disable + 30 + 1 + + + CHENA + Channel enable + 31 + 1 + + + + + HCCHAR10 + HCCHAR10 + OTGFS host channel-10 characteristics + register (OTGFS_HCCHAR10) + 0x240 + 0x20 + read-write + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + + + EPTNUM + Endpoint number + 11 + 4 + + + EPTDIR + Endpoint direction + 15 + 1 + + + LSPDDEV + Low-speed device + 17 + 1 + + + EPTYPE + Endpoint type + 18 + 2 + + + MC + Multicount + 20 + 2 + + + DEVADDR + Device address + 22 + 7 + + + ODDFRM + Odd frame + 29 + 1 + + + CHDIS + Channel disable + 30 + 1 + + + CHENA + Channel enable + 31 + 1 + + + + + HCCHAR11 + HCCHAR11 + OTGFS host channel-7 characteristics + register (OTGFS_HCCHAR11) + 0x260 + 0x20 + read-write + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + + + EPTNUM + Endpoint number + 11 + 4 + + + EPTDIR + Endpoint direction + 15 + 1 + + + LSPDDEV + Low-speed device + 17 + 1 + + + EPTYPE + Endpoint type + 18 + 2 + + + MC + Multicount + 20 + 2 + + + DEVADDR + Device address + 22 + 7 + + + ODDFRM + Odd frame + 29 + 1 + + + CHDIS + Channel disable + 30 + 1 + + + CHENA + Channel enable + 31 + 1 + + + + + HCCHAR12 + HCCHAR12 + OTGFS host channel-12 characteristics + register (OTGFS_HCCHAR12) + 0x280 + 0x20 + read-write + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + + + EPTNUM + Endpoint number + 11 + 4 + + + EPTDIR + Endpoint direction + 15 + 1 + + + LSPDDEV + Low-speed device + 17 + 1 + + + EPTYPE + Endpoint type + 18 + 2 + + + MC + Multicount + 20 + 2 + + + DEVADDR + Device address + 22 + 7 + + + ODDFRM + Odd frame + 29 + 1 + + + CHDIS + Channel disable + 30 + 1 + + + CHENA + Channel enable + 31 + 1 + + + + + HCCHAR13 + HCCHAR13 + OTGFS host channel-13 characteristics + register (OTGFS_HCCHAR13) + 0x2A0 + 0x20 + read-write + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + + + EPTNUM + Endpoint number + 11 + 4 + + + EPTDIR + Endpoint direction + 15 + 1 + + + LSPDDEV + Low-speed device + 17 + 1 + + + EPTYPE + Endpoint type + 18 + 2 + + + MC + Multicount + 20 + 2 + + + DEVADDR + Device address + 22 + 7 + + + ODDFRM + Odd frame + 29 + 1 + + + CHDIS + Channel disable + 30 + 1 + + + CHENA + Channel enable + 31 + 1 + + + + + HCCHAR14 + HCCHAR14 + OTGFS host channel-14 characteristics + register (OTGFS_HCCHAR14) + 0x2C0 + 0x20 + read-write + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + + + EPTNUM + Endpoint number + 11 + 4 + + + EPTDIR + Endpoint direction + 15 + 1 + + + LSPDDEV + Low-speed device + 17 + 1 + + + EPTYPE + Endpoint type + 18 + 2 + + + MC + Multicount + 20 + 2 + + + DEVADDR + Device address + 22 + 7 + + + ODDFRM + Odd frame + 29 + 1 + + + CHDIS + Channel disable + 30 + 1 + + + CHENA + Channel enable + 31 + 1 + + + + + HCCHAR15 + HCCHAR15 + OTGFS host channel-15 characteristics + register (OTGFS_HCCHAR15) + 0x2E0 + 0x20 + read-write + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + + + EPTNUM + Endpoint number + 11 + 4 + + + EPTDIR + Endpoint direction + 15 + 1 + + + LSPDDEV + Low-speed device + 17 + 1 + + + EPTYPE + Endpoint type + 18 + 2 + + + MC + Multicount + 20 + 2 + + + DEVADDR + Device address + 22 + 7 + + + ODDFRM + Odd frame + 29 + 1 + + + CHDIS + Channel disable + 30 + 1 + + + CHENA + Channel enable + 31 + 1 + + + + + HCINT0 + HCINT0 + OTGFS host channel-0 interrupt register + (OTGFS_HCINT0) + 0x108 + 0x20 + read-write + 0x00000000 + + + XFERC + Transfer completed + 0 + 1 + + + CHHLTD + Channel halted + 1 + 1 + + + STALL + STALL response received + interrupt + 3 + 1 + + + NAK + NAK response received + interrupt + 4 + 1 + + + ACK + ACK response received/transmitted + interrupt + 5 + 1 + + + XACTERR + Transaction error + 7 + 1 + + + BBLERR + Babble error + 8 + 1 + + + FRMOVRUN + Frame overrun + 9 + 1 + + + DTGLERR + Data toggle error + 10 + 1 + + + + + HCINT1 + HCINT1 + OTG_FS host channel-1 interrupt register + (OTG_FS_HCINT1) + 0x128 + 0x20 + read-write + 0x00000000 + + + XFERC + Transfer completed + 0 + 1 + + + CHHLTD + Channel halted + 1 + 1 + + + STALL + STALL response received + interrupt + 3 + 1 + + + NAK + NAK response received + interrupt + 4 + 1 + + + ACK + ACK response received/transmitted + interrupt + 5 + 1 + + + XACTERR + Transaction error + 7 + 1 + + + BBLERR + Babble error + 8 + 1 + + + FRMOVRUN + Frame overrun + 9 + 1 + + + DTGLERR + Data toggle error + 10 + 1 + + + + + HCINT2 + HCINT2 + OTGFS host channel-2 interrupt register + (OTGFS_HCINT2) + 0x148 + 0x20 + read-write + 0x00000000 + + + XFERC + Transfer completed + 0 + 1 + + + CHHLTD + Channel halted + 1 + 1 + + + STALL + STALL response received + interrupt + 3 + 1 + + + NAK + NAK response received + interrupt + 4 + 1 + + + ACK + ACK response received/transmitted + interrupt + 5 + 1 + + + XACTERR + Transaction error + 7 + 1 + + + BBLERR + Babble error + 8 + 1 + + + FRMOVRUN + Frame overrun + 9 + 1 + + + DTGLERR + Data toggle error + 10 + 1 + + + + + HCINT3 + HCINT3 + OTGFS host channel-3 interrupt register + (OTGFS_HCINT3) + 0x168 + 0x20 + read-write + 0x00000000 + + + XFERC + Transfer completed + 0 + 1 + + + CHHLTD + Channel halted + 1 + 1 + + + STALL + STALL response received + interrupt + 3 + 1 + + + NAK + NAK response received + interrupt + 4 + 1 + + + ACK + ACK response received/transmitted + interrupt + 5 + 1 + + + XACTERR + Transaction error + 7 + 1 + + + BBLERR + Babble error + 8 + 1 + + + FRMOVRUN + Frame overrun + 9 + 1 + + + DTGLERR + Data toggle error + 10 + 1 + + + + + HCINT4 + HCINT4 + OTGFS host channel-4 interrupt register + (OTGFS_HCINT4) + 0x188 + 0x20 + read-write + 0x00000000 + + + XFERC + Transfer completed + 0 + 1 + + + CHHLTD + Channel halted + 1 + 1 + + + STALL + STALL response received + interrupt + 3 + 1 + + + NAK + NAK response received + interrupt + 4 + 1 + + + ACK + ACK response received/transmitted + interrupt + 5 + 1 + + + XACTERR + Transaction error + 7 + 1 + + + BBLERR + Babble error + 8 + 1 + + + FRMOVRUN + Frame overrun + 9 + 1 + + + DTGLERR + Data toggle error + 10 + 1 + + + + + HCINT5 + HCINT5 + OTGFS host channel-5 interrupt register + (OTGFS_HCINT5) + 0x1A8 + 0x20 + read-write + 0x00000000 + + + XFERC + Transfer completed + 0 + 1 + + + CHHLTD + Channel halted + 1 + 1 + + + STALL + STALL response received + interrupt + 3 + 1 + + + NAK + NAK response received + interrupt + 4 + 1 + + + ACK + ACK response received/transmitted + interrupt + 5 + 1 + + + XACTERR + Transaction error + 7 + 1 + + + BBLERR + Babble error + 8 + 1 + + + FRMOVRUN + Frame overrun + 9 + 1 + + + DTGLERR + Data toggle error + 10 + 1 + + + + + HCINT6 + HCINT6 + OTGFS host channel-6 interrupt register + (OTGFS_HCINT6) + 0x1C8 + 0x20 + read-write + 0x00000000 + + + XFERC + Transfer completed + 0 + 1 + + + CHHLTD + Channel halted + 1 + 1 + + + STALL + STALL response received + interrupt + 3 + 1 + + + NAK + NAK response received + interrupt + 4 + 1 + + + ACK + ACK response received/transmitted + interrupt + 5 + 1 + + + XACTERR + Transaction error + 7 + 1 + + + BBLERR + Babble error + 8 + 1 + + + FRMOVRUN + Frame overrun + 9 + 1 + + + DTGLERR + Data toggle error + 10 + 1 + + + + + HCINT7 + HCINT7 + OTGFS host channel-7 interrupt register + (OTGFS_HCINT7) + 0x1E8 + 0x20 + read-write + 0x00000000 + + + XFERC + Transfer completed + 0 + 1 + + + CHHLTD + Channel halted + 1 + 1 + + + STALL + STALL response received + interrupt + 3 + 1 + + + NAK + NAK response received + interrupt + 4 + 1 + + + ACK + ACK response received/transmitted + interrupt + 5 + 1 + + + XACTERR + Transaction error + 7 + 1 + + + BBLERR + Babble error + 8 + 1 + + + FRMOVRUN + Frame overrun + 9 + 1 + + + DTGLERR + Data toggle error + 10 + 1 + + + + + HCINT8 + HCINT8 + OTGFS host channel-8 interrupt register + (OTGFS_HCINT8) + 0x208 + 0x20 + read-write + 0x00000000 + + + XFERC + Transfer completed + 0 + 1 + + + CHHLTD + Channel halted + 1 + 1 + + + STALL + STALL response received + interrupt + 3 + 1 + + + NAK + NAK response received + interrupt + 4 + 1 + + + ACK + ACK response received/transmitted + interrupt + 5 + 1 + + + XACTERR + Transaction error + 7 + 1 + + + BBLERR + Babble error + 8 + 1 + + + FRMOVRUN + Frame overrun + 9 + 1 + + + DTGLERR + Data toggle error + 10 + 1 + + + + + HCINT9 + HCINT9 + OTGFS host channel-9 interrupt register + (OTGFS_HCINT9) + 0x228 + 0x20 + read-write + 0x00000000 + + + XFERC + Transfer completed + 0 + 1 + + + CHHLTD + Channel halted + 1 + 1 + + + STALL + STALL response received + interrupt + 3 + 1 + + + NAK + NAK response received + interrupt + 4 + 1 + + + ACK + ACK response received/transmitted + interrupt + 5 + 1 + + + XACTERR + Transaction error + 7 + 1 + + + BBLERR + Babble error + 8 + 1 + + + FRMOVRUN + Frame overrun + 9 + 1 + + + DTGLERR + Data toggle error + 10 + 1 + + + + + HCINT10 + HCINT10 + OTGFS host channel-10 interrupt register + (OTGFS_HCINT10) + 0x248 + 0x20 + read-write + 0x00000000 + + + XFERC + Transfer completed + 0 + 1 + + + CHHLTD + Channel halted + 1 + 1 + + + STALL + STALL response received + interrupt + 3 + 1 + + + NAK + NAK response received + interrupt + 4 + 1 + + + ACK + ACK response received/transmitted + interrupt + 5 + 1 + + + XACTERR + Transaction error + 7 + 1 + + + BBLERR + Babble error + 8 + 1 + + + FRMOVRUN + Frame overrun + 9 + 1 + + + DTGLERR + Data toggle error + 10 + 1 + + + + + HCINT11 + HCINT11 + OTGFS host channel-11 interrupt register + (OTGFS_HCINT11) + 0x268 + 0x20 + read-write + 0x00000000 + + + XFERC + Transfer completed + 0 + 1 + + + CHHLTD + Channel halted + 1 + 1 + + + STALL + STALL response received + interrupt + 3 + 1 + + + NAK + NAK response received + interrupt + 4 + 1 + + + ACK + ACK response received/transmitted + interrupt + 5 + 1 + + + XACTERR + Transaction error + 7 + 1 + + + BBLERR + Babble error + 8 + 1 + + + FRMOVRUN + Frame overrun + 9 + 1 + + + DTGLERR + Data toggle error + 10 + 1 + + + + + HCINT12 + HCINT12 + OTGFS host channel-12 interrupt register + (OTGFS_HCINT12) + 0x288 + 0x20 + read-write + 0x00000000 + + + XFERC + Transfer completed + 0 + 1 + + + CHHLTD + Channel halted + 1 + 1 + + + STALL + STALL response received + interrupt + 3 + 1 + + + NAK + NAK response received + interrupt + 4 + 1 + + + ACK + ACK response received/transmitted + interrupt + 5 + 1 + + + XACTERR + Transaction error + 7 + 1 + + + BBLERR + Babble error + 8 + 1 + + + FRMOVRUN + Frame overrun + 9 + 1 + + + DTGLERR + Data toggle error + 10 + 1 + + + + + HCINT13 + HCINT13 + OTGFS host channel-13 interrupt register + (OTGFS_HCINT13) + 0x2A8 + 0x20 + read-write + 0x00000000 + + + XFERC + Transfer completed + 0 + 1 + + + CHHLTD + Channel halted + 1 + 1 + + + STALL + STALL response received + interrupt + 3 + 1 + + + NAK + NAK response received + interrupt + 4 + 1 + + + ACK + ACK response received/transmitted + interrupt + 5 + 1 + + + XACTERR + Transaction error + 7 + 1 + + + BBLERR + Babble error + 8 + 1 + + + FRMOVRUN + Frame overrun + 9 + 1 + + + DTGLERR + Data toggle error + 10 + 1 + + + + + HCINT14 + HCINT14 + OTGFS host channel-14 interrupt register + (OTGFS_HCINT14) + 0x2C8 + 0x20 + read-write + 0x00000000 + + + XFERC + Transfer completed + 0 + 1 + + + CHHLTD + Channel halted + 1 + 1 + + + STALL + STALL response received + interrupt + 3 + 1 + + + NAK + NAK response received + interrupt + 4 + 1 + + + ACK + ACK response received/transmitted + interrupt + 5 + 1 + + + XACTERR + Transaction error + 7 + 1 + + + BBLERR + Babble error + 8 + 1 + + + FRMOVRUN + Frame overrun + 9 + 1 + + + DTGLERR + Data toggle error + 10 + 1 + + + + + HCINT15 + HCINT15 + OTGFS host channel-15 interrupt register + (OTGFS_HCINT15) + 0x2E8 + 0x20 + read-write + 0x00000000 + + + XFERC + Transfer completed + 0 + 1 + + + CHHLTD + Channel halted + 1 + 1 + + + STALL + STALL response received + interrupt + 3 + 1 + + + NAK + NAK response received + interrupt + 4 + 1 + + + ACK + ACK response received/transmitted + interrupt + 5 + 1 + + + XACTERR + Transaction error + 7 + 1 + + + BBLERR + Babble error + 8 + 1 + + + FRMOVRUN + Frame overrun + 9 + 1 + + + DTGLERR + Data toggle error + 10 + 1 + + + + + HCINTMSK0 + HCINTMSK0 + OTGFS host channel-0 mask register + (OTGFS_HCINTMSK0) + 0x10C + 0x20 + read-write + 0x00000000 + + + XFERCMSK + Transfer completed mask + 0 + 1 + + + CHHLTDMSK + Channel halted mask + 1 + 1 + + + STALLMSK + STALL response received interrupt + mask + 3 + 1 + + + NAKMSK + NAK response received interrupt + mask + 4 + 1 + + + ACKMSK + ACK response received/transmitted + interrupt mask + 5 + 1 + + + XACTERRMSK + Transaction error mask + 7 + 1 + + + BBLERRMSK + Babble error mask + 8 + 1 + + + FRMOVRUNMSK + Frame overrun mask + 9 + 1 + + + DTGLERRMSK + Data toggle error mask + 10 + 1 + + + + + HCINTMSK1 + HCINTMSK1 + OTGFS host channel-1 mask register + (OTGFS_HCINTMSK1) + 0x12C + 0x20 + read-write + 0x00000000 + + + XFERCMSK + Transfer completed mask + 0 + 1 + + + CHHLTDMSK + Channel halted mask + 1 + 1 + + + STALLMSK + STALL response received interrupt + mask + 3 + 1 + + + NAKMSK + NAK response received interrupt + mask + 4 + 1 + + + ACKMSK + ACK response received/transmitted + interrupt mask + 5 + 1 + + + XACTERRMSK + Transaction error mask + 7 + 1 + + + BBLERRMSK + Babble error mask + 8 + 1 + + + FRMOVRUNMSK + Frame overrun mask + 9 + 1 + + + DTGLERRMSK + Data toggle error mask + 10 + 1 + + + + + HCINTMSK2 + HCINTMSK2 + OTGFS host channel-2 mask register + (OTGFS_HCINTMSK2) + 0x14C + 0x20 + read-write + 0x00000000 + + + XFERCMSK + Transfer completed mask + 0 + 1 + + + CHHLTDMSK + Channel halted mask + 1 + 1 + + + STALLMSK + STALL response received interrupt + mask + 3 + 1 + + + NAKMSK + NAK response received interrupt + mask + 4 + 1 + + + ACKMSK + ACK response received/transmitted + interrupt mask + 5 + 1 + + + XACTERRMSK + Transaction error mask + 7 + 1 + + + BBLERRMSK + Babble error mask + 8 + 1 + + + FRMOVRUNMSK + Frame overrun mask + 9 + 1 + + + DTGLERRMSK + Data toggle error mask + 10 + 1 + + + + + HCINTMSK3 + HCINTMSK3 + OTGFS host channel-3 mask register + (OTGFS_HCINTMSK3) + 0x16C + 0x20 + read-write + 0x00000000 + + + XFERCMSK + Transfer completed mask + 0 + 1 + + + CHHLTDMSK + Channel halted mask + 1 + 1 + + + STALLMSK + STALL response received interrupt + mask + 3 + 1 + + + NAKMSK + NAK response received interrupt + mask + 4 + 1 + + + ACKMSK + ACK response received/transmitted + interrupt mask + 5 + 1 + + + XACTERRMSK + Transaction error mask + 7 + 1 + + + BBLERRMSK + Babble error mask + 8 + 1 + + + FRMOVRUNMSK + Frame overrun mask + 9 + 1 + + + DTGLERRMSK + Data toggle error mask + 10 + 1 + + + + + HCINTMSK4 + HCINTMSK4 + OTGFS host channel-4 mask register + (OTGFS_HCINTMSK4) + 0x18C + 0x20 + read-write + 0x00000000 + + + XFERCMSK + Transfer completed mask + 0 + 1 + + + CHHLTDMSK + Channel halted mask + 1 + 1 + + + STALLMSK + STALL response received interrupt + mask + 3 + 1 + + + NAKMSK + NAK response received interrupt + mask + 4 + 1 + + + ACKMSK + ACK response received/transmitted + interrupt mask + 5 + 1 + + + XACTERRMSK + Transaction error mask + 7 + 1 + + + BBLERRMSK + Babble error mask + 8 + 1 + + + FRMOVRUNMSK + Frame overrun mask + 9 + 1 + + + DTGLERRMSK + Data toggle error mask + 10 + 1 + + + + + HCINTMSK5 + HCINTMSK5 + OTGFS host channel-5 mask register + (OTGFS_HCINTMSK5) + 0x1AC + 0x20 + read-write + 0x00000000 + + + XFERCMSK + Transfer completed mask + 0 + 1 + + + CHHLTDMSK + Channel halted mask + 1 + 1 + + + STALLMSK + STALL response received interrupt + mask + 3 + 1 + + + NAKMSK + NAK response received interrupt + mask + 4 + 1 + + + ACKMSK + ACK response received/transmitted + interrupt mask + 5 + 1 + + + XACTERRMSK + Transaction error mask + 7 + 1 + + + BBLERRMSK + Babble error mask + 8 + 1 + + + FRMOVRUNMSK + Frame overrun mask + 9 + 1 + + + DTGLERRMSK + Data toggle error mask + 10 + 1 + + + + + HCINTMSK6 + HCINTMSK6 + OTGFS host channel-6 mask register + (OTGFS_HCINTMSK6) + 0x1CC + 0x20 + read-write + 0x00000000 + + + XFERCMSK + Transfer completed mask + 0 + 1 + + + CHHLTDMSK + Channel halted mask + 1 + 1 + + + STALLMSK + STALL response received interrupt + mask + 3 + 1 + + + NAKMSK + NAK response received interrupt + mask + 4 + 1 + + + ACKMSK + ACK response received/transmitted + interrupt mask + 5 + 1 + + + XACTERRMSK + Transaction error mask + 7 + 1 + + + BBLERRMSK + Babble error mask + 8 + 1 + + + FRMOVRUNMSK + Frame overrun mask + 9 + 1 + + + DTGLERRMSK + Data toggle error mask + 10 + 1 + + + + + HCINTMSK7 + HCINTMSK7 + OTGFS host channel-7 mask register + (OTGFS_HCINTMSK7) + 0x1EC + 0x20 + read-write + 0x00000000 + + + XFERCMSK + Transfer completed mask + 0 + 1 + + + CHHLTDMSK + Channel halted mask + 1 + 1 + + + STALLMSK + STALL response received interrupt + mask + 3 + 1 + + + NAKMSK + NAK response received interrupt + mask + 4 + 1 + + + ACKMSK + ACK response received/transmitted + interrupt mask + 5 + 1 + + + XACTERRMSK + Transaction error mask + 7 + 1 + + + BBLERRMSK + Babble error mask + 8 + 1 + + + FRMOVRUNMSK + Frame overrun mask + 9 + 1 + + + DTGLERRMSK + Data toggle error mask + 10 + 1 + + + + + HCINTMSK8 + HCINTMSK8 + OTGFS host channel-8 mask register + (OTGFS_HCINTMSK8) + 0x20C + 0x20 + read-write + 0x00000000 + + + XFERCMSK + Transfer completed mask + 0 + 1 + + + CHHLTDMSK + Channel halted mask + 1 + 1 + + + STALLMSK + STALL response received interrupt + mask + 3 + 1 + + + NAKMSK + NAK response received interrupt + mask + 4 + 1 + + + ACKMSK + ACK response received/transmitted + interrupt mask + 5 + 1 + + + XACTERRMSK + Transaction error mask + 7 + 1 + + + BBLERRMSK + Babble error mask + 8 + 1 + + + FRMOVRUNMSK + Frame overrun mask + 9 + 1 + + + DTGLERRMSK + Data toggle error mask + 10 + 1 + + + + + HCINTMSK9 + HCINTMSK9 + OTGFS host channel-9 mask register + (OTGFS_HCINTMSK9) + 0x22C + 0x20 + read-write + 0x00000000 + + + XFERCMSK + Transfer completed mask + 0 + 1 + + + CHHLTDMSK + Channel halted mask + 1 + 1 + + + STALLMSK + STALL response received interrupt + mask + 3 + 1 + + + NAKMSK + NAK response received interrupt + mask + 4 + 1 + + + ACKMSK + ACK response received/transmitted + interrupt mask + 5 + 1 + + + XACTERRMSK + Transaction error mask + 7 + 1 + + + BBLERRMSK + Babble error mask + 8 + 1 + + + FRMOVRUNMSK + Frame overrun mask + 9 + 1 + + + DTGLERRMSK + Data toggle error mask + 10 + 1 + + + + + HCINTMSK10 + HCINTMSK10 + OTGFS host channel-10 mask register + (OTGFS_HCINTMSK10) + 0x24C + 0x20 + read-write + 0x00000000 + + + XFERCMSK + Transfer completed mask + 0 + 1 + + + CHHLTDMSK + Channel halted mask + 1 + 1 + + + STALLMSK + STALL response received interrupt + mask + 3 + 1 + + + NAKMSK + NAK response received interrupt + mask + 4 + 1 + + + ACKMSK + ACK response received/transmitted + interrupt mask + 5 + 1 + + + XACTERRMSK + Transaction error mask + 7 + 1 + + + BBLERRMSK + Babble error mask + 8 + 1 + + + FRMOVRUNMSK + Frame overrun mask + 9 + 1 + + + DTGLERRMSK + Data toggle error mask + 10 + 1 + + + + + HCINTMSK11 + HCINTMSK11 + OTGFS host channel-11 mask register + (OTGFS_HCINTMSK11) + 0x26C + 0x20 + read-write + 0x00000000 + + + XFERCMSK + Transfer completed mask + 0 + 1 + + + CHHLTDMSK + Channel halted mask + 1 + 1 + + + STALLMSK + STALL response received interrupt + mask + 3 + 1 + + + NAKMSK + NAK response received interrupt + mask + 4 + 1 + + + ACKMSK + ACK response received/transmitted + interrupt mask + 5 + 1 + + + XACTERRMSK + Transaction error mask + 7 + 1 + + + BBLERRMSK + Babble error mask + 8 + 1 + + + FRMOVRUNMSK + Frame overrun mask + 9 + 1 + + + DTGLERRMSK + Data toggle error mask + 10 + 1 + + + + + HCINTMSK12 + HCINTMSK12 + OTGFS host channel-12 mask register + (OTGFS_HCINTMSK12) + 0x28C + 0x20 + read-write + 0x00000000 + + + XFERCMSK + Transfer completed mask + 0 + 1 + + + CHHLTDMSK + Channel halted mask + 1 + 1 + + + STALLMSK + STALL response received interrupt + mask + 3 + 1 + + + NAKMSK + NAK response received interrupt + mask + 4 + 1 + + + ACKMSK + ACK response received/transmitted + interrupt mask + 5 + 1 + + + XACTERRMSK + Transaction error mask + 7 + 1 + + + BBLERRMSK + Babble error mask + 8 + 1 + + + FRMOVRUNMSK + Frame overrun mask + 9 + 1 + + + DTGLERRMSK + Data toggle error mask + 10 + 1 + + + + + HCINTMSK13 + HCINTMSK13 + OTGFS host channel-13 mask register + (OTGFS_HCINTMSK13) + 0x2AC + 0x20 + read-write + 0x00000000 + + + XFERCMSK + Transfer completed mask + 0 + 1 + + + CHHLTDMSK + Channel halted mask + 1 + 1 + + + STALLMSK + STALL response received interrupt + mask + 3 + 1 + + + NAKMSK + NAK response received interrupt + mask + 4 + 1 + + + ACKMSK + ACK response received/transmitted + interrupt mask + 5 + 1 + + + XACTERRMSK + Transaction error mask + 7 + 1 + + + BBLERRMSK + Babble error mask + 8 + 1 + + + FRMOVRUNMSK + Frame overrun mask + 9 + 1 + + + DTGLERRMSK + Data toggle error mask + 10 + 1 + + + + + HCINTMSK14 + HCINTMSK14 + OTGFS host channel-14 mask register + (OTGFS_HCINTMSK14) + 0x2CC + 0x20 + read-write + 0x00000000 + + + XFERCMSK + Transfer completed mask + 0 + 1 + + + CHHLTDMSK + Channel halted mask + 1 + 1 + + + STALLMSK + STALL response received interrupt + mask + 3 + 1 + + + NAKMSK + NAK response received interrupt + mask + 4 + 1 + + + ACKMSK + ACK response received/transmitted + interrupt mask + 5 + 1 + + + XACTERRMSK + Transaction error mask + 7 + 1 + + + BBLERRMSK + Babble error mask + 8 + 1 + + + FRMOVRUNMSK + Frame overrun mask + 9 + 1 + + + DTGLERRMSK + Data toggle error mask + 10 + 1 + + + + + HCINTMSK15 + HCINTMSK15 + OTGFS host channel-15 mask register + (OTGFS_HCINTMSK15) + 0x2EC + 0x20 + read-write + 0x00000000 + + + XFERCMSK + Transfer completed mask + 0 + 1 + + + CHHLTDMSK + Channel halted mask + 1 + 1 + + + STALLMSK + STALL response received interrupt + mask + 3 + 1 + + + NAKMSK + NAK response received interrupt + mask + 4 + 1 + + + ACKMSK + ACK response received/transmitted + interrupt mask + 5 + 1 + + + XACTERRMSK + Transaction error mask + 7 + 1 + + + BBLERRMSK + Babble error mask + 8 + 1 + + + FRMOVRUNMSK + Frame overrun mask + 9 + 1 + + + DTGLERRMSK + Data toggle error mask + 10 + 1 + + + + + HCTSIZ0 + HCTSIZ0 + OTGFS host channel-0 transfer size + register + 0x110 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + PID + PID + 29 + 2 + + + + + HCTSIZ1 + HCTSIZ1 + OTGFS host channel-1 transfer size + register + 0x130 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + PID + PID + 29 + 2 + + + + + HCTSIZ2 + HCTSIZ2 + OTGFS host channel-2 transfer size + register + 0x150 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + PID + PID + 29 + 2 + + + + + HCTSIZ3 + HCTSIZ3 + OTGFS host channel-3 transfer size + register + 0x170 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + PID + PID + 29 + 2 + + + + + HCTSIZ4 + HCTSIZ4 + OTGFS host channel-4 transfer size + register + 0x190 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + PID + PID + 29 + 2 + + + + + HCTSIZ5 + HCTSIZ5 + OTGFS host channel-5 transfer size + register + 0x1B0 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + PID + PID + 29 + 2 + + + + + HCTSIZ6 + HCTSIZ6 + OTGFS host channel-6 transfer size + register + 0x1D0 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + PID + PID + 29 + 2 + + + + + HCTSIZ7 + HCTSIZ7 + OTGFS host channel-7 transfer size + register + 0x1F0 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + PID + PID + 29 + 2 + + + + + HCTSIZ8 + HCTSIZ8 + OTGFS host channel-8 transfer size + register + 0x210 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + PID + PID + 29 + 2 + + + + + HCTSIZ9 + HCTSIZ9 + OTGFS host channel-9 transfer size + register + 0x230 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + PID + PID + 29 + 2 + + + + + HCTSIZ10 + HCTSIZ10 + OTGFS host channel-10 transfer size + register + 0x250 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + PID + PID + 29 + 2 + + + + + HCTSIZ11 + HCTSIZ11 + OTGFS host channel-11 transfer size + register + 0x270 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + PID + PID + 29 + 2 + + + + + HCTSIZ12 + HCTSIZ12 + OTGFS host channel-12 transfer size + register + 0x290 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + PID + PID + 29 + 2 + + + + + HCTSIZ13 + HCTSIZ13 + OTGFS host channel-13 transfer size + register + 0x2B0 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + PID + PID + 29 + 2 + + + + + HCTSIZ14 + HCTSIZ14 + OTGFS host channel-14 transfer size + register + 0x2D0 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + PID + PID + 29 + 2 + + + + + HCTSIZ15 + HCTSIZ15 + OTGFS host channel-15 transfer size + register + 0x2F0 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + PID + PID + 29 + 2 + + + + + + + USB_OTG1_DEVICE + USB on the go full speed + USB_OTG1 + 0x50000800 + + 0x0 + 0x400 + registers + + + + DCFG + DCFG + OTGFS device configuration register + (OTGFS_DCFG) + 0x0 + 0x20 + read-write + 0x02200000 + + + DEVSPD + Device speed + 0 + 2 + + + NZSTSOUTHSHK + Non-zero-length status OUT + handshake + 2 + 1 + + + DEVADDR + Device address + 4 + 7 + + + PERFRINT + Periodic frame interval + 11 + 2 + + + + + DCTL + DCTL + OTGFS device control register + (OTGFS_DCTL) + 0x4 + 0x20 + 0x00000000 + + + RWKUPSIG + Remote wakeup signaling + 0 + 1 + read-write + + + SFTDISCON + Soft disconnect + 1 + 1 + read-write + + + GNPINNAKSTS + Global IN NAK status + 2 + 1 + read-only + + + GOUTNAKSTS + Global OUT NAK status + 3 + 1 + read-only + + + TSTCTL + Test control + 4 + 3 + read-write + + + SGNPINNAK + Set global IN NAK + 7 + 1 + read-write + + + CGNPINNAK + Clear global IN NAK + 8 + 1 + read-write + + + SGOUTNAK + Set global OUT NAK + 9 + 1 + read-write + + + CGOUTNAK + Clear global OUT NAK + 10 + 1 + read-write + + + PWROPRGDNE + Power-on programming done + 11 + 1 + read-write + + + + + DSTS + DSTS + OTGFS device status register + (OTGFS_DSTS) + 0x8 + 0x20 + read-only + 0x00000010 + + + SUSPSTS + Suspend status + 0 + 1 + + + ENUMSPD + Enumerated speed + 1 + 2 + + + ETICERR + Erratic error + 3 + 1 + + + SOFFN + Frame number of the received + SOF + 8 + 14 + + + + + DIEPMSK + DIEPMSK + OTGFS device IN endpoint common interrupt + mask register (OTGFS_DIEPMSK) + 0x10 + 0x20 + read-write + 0x00000000 + + + XFERCMSK + Transfer completed interrupt + mask + 0 + 1 + + + EPTDISMSK + Endpoint disabled interrupt + mask + 1 + 1 + + + TIMEOUTMSK + Timeout condition mask (Non-isochronous + endpoints) + 3 + 1 + + + INTKNTXFEMPMSK + IN token received when TxFIFO empty + mask + 4 + 1 + + + INTKNEPTMISMSK + IN token received with EP mismatch + mask + 5 + 1 + + + INEPTNAKMSK + IN endpoint NAK effective + mask + 6 + 1 + + + TXFIFOUDRMSK + FIFO underrun + mask + 8 + 1 + + + BNAINMSK + BNA interrupt + mask + 9 + 1 + + + + + DOEPMSK + DOEPMSK + OTGFS device OUT endpoint common interrupt + mask register (OTGFS_DOEPMSK) + 0x14 + 0x20 + read-write + 0x00000000 + + + XFERCMSK + Transfer completed interrupt + mask + 0 + 1 + + + EPTDISMSK + Endpoint disabled interrupt + mask + 1 + 1 + + + SETUPMSK + SETUP phase done mask + 3 + 1 + + + OUTTEPDMSK + OUT token received when endpoint + disabled mask + 4 + 1 + + + B2BSETUPMSK + Back-to-back SETUP packets + received mask + 6 + 1 + + + OUTPERRMSK + OUT packet error + mask + 8 + 1 + + + BNAOUTMSK + BNA interrupt + mask + 9 + 1 + + + + + DAINT + DAINT + OTGFS device all endpoints interrupt + register (OTGFS_DAINT) + 0x18 + 0x20 + read-only + 0x00000000 + + + INEPTINT + IN endpoint interrupt bits + 0 + 16 + + + OUTEPTINT + OUT endpoint interrupt + bits + 16 + 16 + + + + + DAINTMSK + DAINTMSK + OTGFS all endpoints interrupt mask register + (OTGFS_DAINTMSK) + 0x1C + 0x20 + read-write + 0x00000000 + + + INEPTMSK + IN EP interrupt mask bits + 0 + 16 + + + OUTEPTMSK + OUT endpoint interrupt + bits + 16 + 16 + + + + + DIEPEMPMSK + DIEPEMPMSK + OTGFS device IN endpoint FIFO empty + interrupt mask register + 0x34 + 0x20 + read-write + 0x00000000 + + + INEPTXFEMSK + IN EP Tx FIFO empty interrupt mask + bits + 0 + 16 + + + + + DIEPCTL0 + DIEPCTL0 + OTGFS device control IN endpoint 0 control + register (OTGFS_DIEPCTL0) + 0x100 + 0x20 + 0x00000000 + + + MPS + Maximum packet size + 0 + 2 + read-write + + + USBACEPT + USB active endpoint + 15 + 1 + read-only + + + NAKSTS + NAK status + 17 + 1 + read-only + + + EPTYPE + Endpoint type + 18 + 2 + read-only + + + STALL + STALL handshake + 21 + 1 + read-write + + + TXFNUM + TxFIFO number + 22 + 4 + read-write + + + CNAK + Clear NAK + 26 + 1 + write-only + + + SNAK + Set NAK + 27 + 1 + write-only + + + EPTDIS + Endpoint disable + 30 + 1 + read-only + + + EPTENA + Endpoint enable + 31 + 1 + read-only + + + + + DIEPCTL1 + DIEPCTL1 + OTGFS device IN endpoint-1 control + register + 0x120 + 0x20 + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + read-write + + + USBACEPT + USB active endpoint + 15 + 1 + read-write + + + DPID + Endpoint Data PID + 16 + 1 + read-only + + + NAKSTS + NAK status + 17 + 1 + read-only + + + EPTYPE + Endpoint type + 18 + 2 + read-write + + + STALL + STALL handshake + 21 + 1 + read-write + + + TXFNUM + TxFIFO number + 22 + 4 + read-write + + + CNAK + Clear NAK + 26 + 1 + write-only + + + SNAK + Set NAK + 27 + 1 + write-only + + + SETD0PID + Set DATA0 PID + 28 + 1 + write-only + + + SETD1PID + Set DATA1 PID + 29 + 1 + write-only + + + EPTDIS + Endpoint disable + 30 + 1 + read-write + + + EPTENA + Endpoint enable + 31 + 1 + read-write + + + + + DIEPCTL2 + DIEPCTL2 + OTGFS device IN endpoint-2 control + register + 0x140 + 0x20 + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + read-write + + + USBACEPT + USB active endpoint + 15 + 1 + read-write + + + DPID + Endpoint Data PID + 16 + 1 + read-only + + + NAKSTS + NAK status + 17 + 1 + read-only + + + EPTYPE + Endpoint type + 18 + 2 + read-write + + + STALL + STALL handshake + 21 + 1 + read-write + + + TXFNUM + TxFIFO number + 22 + 4 + read-write + + + CNAK + Clear NAK + 26 + 1 + write-only + + + SNAK + Set NAK + 27 + 1 + write-only + + + SETD0PID + Set DATA0 PID + 28 + 1 + write-only + + + SETD1PID + Set DATA1 PID + 29 + 1 + write-only + + + EPTDIS + Endpoint disable + 30 + 1 + read-write + + + EPTENA + Endpoint enable + 31 + 1 + read-write + + + + + DIEPCTL3 + DIEPCTL3 + OTGFS device IN endpoint-3 control + register + 0x160 + 0x20 + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + read-write + + + USBACEPT + USB active endpoint + 15 + 1 + read-write + + + DPID + Endpoint Data PID + 16 + 1 + read-only + + + NAKSTS + NAK status + 17 + 1 + read-only + + + EPTYPE + Endpoint type + 18 + 2 + read-write + + + STALL + STALL handshake + 21 + 1 + read-write + + + TXFNUM + TxFIFO number + 22 + 4 + read-write + + + CNAK + Clear NAK + 26 + 1 + write-only + + + SNAK + Set NAK + 27 + 1 + write-only + + + SETD0PID + Set DATA0 PID + 28 + 1 + write-only + + + SETD1PID + Set DATA1 PID + 29 + 1 + write-only + + + EPTDIS + Endpoint disable + 30 + 1 + read-write + + + EPTENA + Endpoint enable + 31 + 1 + read-write + + + + + DIEPCTL4 + DIEPCTL4 + OTGFS device IN endpoint-4 control + register + 0x180 + 0x20 + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + read-write + + + USBACEPT + USB active endpoint + 15 + 1 + read-write + + + DPID + Endpoint Data PID + 16 + 1 + read-only + + + NAKSTS + NAK status + 17 + 1 + read-only + + + EPTYPE + Endpoint type + 18 + 2 + read-write + + + STALL + STALL handshake + 21 + 1 + read-write + + + TXFNUM + TxFIFO number + 22 + 4 + read-write + + + CNAK + Clear NAK + 26 + 1 + write-only + + + SNAK + Set NAK + 27 + 1 + write-only + + + SETD0PID + Set DATA0 PID + 28 + 1 + write-only + + + SETD1PID + Set DATA1 PID + 29 + 1 + write-only + + + EPTDIS + Endpoint disable + 30 + 1 + read-write + + + EPTENA + Endpoint enable + 31 + 1 + read-write + + + + + DIEPCTL5 + DIEPCTL5 + OTGFS device IN endpoint-5 control + register + 0x1A0 + 0x20 + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + read-write + + + USBACEPT + USB active endpoint + 15 + 1 + read-write + + + DPID + Endpoint Data PID + 16 + 1 + read-only + + + NAKSTS + NAK status + 17 + 1 + read-only + + + EPTYPE + Endpoint type + 18 + 2 + read-write + + + STALL + STALL handshake + 21 + 1 + read-write + + + TXFNUM + TxFIFO number + 22 + 4 + read-write + + + CNAK + Clear NAK + 26 + 1 + write-only + + + SNAK + Set NAK + 27 + 1 + write-only + + + SETD0PID + Set DATA0 PID + 28 + 1 + write-only + + + SETD1PID + Set DATA1 PID + 29 + 1 + write-only + + + EPTDIS + Endpoint disable + 30 + 1 + read-write + + + EPTENA + Endpoint enable + 31 + 1 + read-write + + + + + DIEPCTL6 + DIEPCTL6 + OTGFS device IN endpoint-6 control + register + 0x1C0 + 0x20 + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + read-write + + + USBACEPT + USB active endpoint + 15 + 1 + read-write + + + DPID + Endpoint Data PID + 16 + 1 + read-only + + + NAKSTS + NAK status + 17 + 1 + read-only + + + EPTYPE + Endpoint type + 18 + 2 + read-write + + + STALL + STALL handshake + 21 + 1 + read-write + + + TXFNUM + TxFIFO number + 22 + 4 + read-write + + + CNAK + Clear NAK + 26 + 1 + write-only + + + SNAK + Set NAK + 27 + 1 + write-only + + + SETD0PID + Set DATA0 PID + 28 + 1 + write-only + + + SETD1PID + Set DATA1 PID + 29 + 1 + write-only + + + EPTDIS + Endpoint disable + 30 + 1 + read-write + + + EPTENA + Endpoint enable + 31 + 1 + read-write + + + + + DIEPCTL7 + DIEPCTL7 + OTGFS device IN endpoint-7 control + register + 0x1E0 + 0x20 + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + read-write + + + USBACEPT + USB active endpoint + 15 + 1 + read-write + + + DPID + Endpoint Data PID + 16 + 1 + read-only + + + NAKSTS + NAK status + 17 + 1 + read-only + + + EPTYPE + Endpoint type + 18 + 2 + read-write + + + STALL + STALL handshake + 21 + 1 + read-write + + + TXFNUM + TxFIFO number + 22 + 4 + read-write + + + CNAK + Clear NAK + 26 + 1 + write-only + + + SNAK + Set NAK + 27 + 1 + write-only + + + SETD0PID + Set DATA0 PID + 28 + 1 + write-only + + + SETD1PID + Set DATA1 PID + 29 + 1 + write-only + + + EPTDIS + Endpoint disable + 30 + 1 + read-write + + + EPTENA + Endpoint enable + 31 + 1 + read-write + + + + + DOEPCTL0 + DOEPCTL0 + OTGFS device OUT endpoint-0 control + register + 0x300 + 0x20 + 0x00008000 + + + MPS + Maximum packet size + 0 + 2 + read-only + + + USBACEPT + USB active endpoint + 15 + 1 + read-only + + + NAKSTS + NAK status + 17 + 1 + read-only + + + EPTYPE + Endpoint type + 18 + 2 + read-only + + + SNP + Snoop mode + 20 + 1 + read-write + + + STALL + STALL handshake + 21 + 1 + read-write + + + CNAK + Clear NAK + 26 + 1 + write-only + + + SNAK + Set NAK + 27 + 1 + write-only + + + EPTDIS + Endpoint disable + 30 + 1 + read-write + + + EPTENA + Endpoint enable + 31 + 1 + read-write + + + + + DOEPCTL1 + DOEPCTL1 + OTGFS device OUT endpoint-1 control + register + 0x320 + 0x20 + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + read-write + + + USBACEPT + USB active endpoint + 15 + 1 + read-write + + + DPID + Endpoint data PID + 16 + 1 + read-only + + + NAKSTS + NAK status + 17 + 1 + read-only + + + EPTYPE + Endpoint type + 18 + 2 + read-write + + + SNP + Snoop mode + 20 + 1 + read-write + + + STALL + STALL handshake + 21 + 1 + read-write + + + CNAK + Clear NAK + 26 + 1 + write-only + + + SNAK + Set NAK + 27 + 1 + write-only + + + EPTDIS + Endpoint disable + 30 + 1 + read-write + + + EPTENA + Endpoint enable + 31 + 1 + read-write + + + + + DOEPCTL2 + DOEPCTL2 + OTGFS device OUT endpoint-2 control + register + 0x340 + 0x20 + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + read-write + + + USBACEPT + USB active endpoint + 15 + 1 + read-write + + + DPID + Endpoint data PID + 16 + 1 + read-only + + + NAKSTS + NAK status + 17 + 1 + read-only + + + EPTYPE + Endpoint type + 18 + 2 + read-write + + + SNP + Snoop mode + 20 + 1 + read-write + + + STALL + STALL handshake + 21 + 1 + read-write + + + CNAK + Clear NAK + 26 + 1 + write-only + + + SNAK + Set NAK + 27 + 1 + write-only + + + EPTDIS + Endpoint disable + 30 + 1 + read-write + + + EPTENA + Endpoint enable + 31 + 1 + read-write + + + + + DOEPCTL3 + DOEPCTL3 + OTGFS device OUT endpoint-3 control + register + 0x360 + 0x20 + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + read-write + + + USBACEPT + USB active endpoint + 15 + 1 + read-write + + + DPID + Endpoint data PID + 16 + 1 + read-only + + + NAKSTS + NAK status + 17 + 1 + read-only + + + EPTYPE + Endpoint type + 18 + 2 + read-write + + + SNP + Snoop mode + 20 + 1 + read-write + + + STALL + STALL handshake + 21 + 1 + read-write + + + CNAK + Clear NAK + 26 + 1 + write-only + + + SNAK + Set NAK + 27 + 1 + write-only + + + EPTDIS + Endpoint disable + 30 + 1 + read-write + + + EPTENA + Endpoint enable + 31 + 1 + read-write + + + + + DOEPCTL4 + DOEPCTL4 + OTGFS device OUT endpoint-4 control + register + 0x380 + 0x20 + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + read-write + + + USBACEPT + USB active endpoint + 15 + 1 + read-write + + + DPID + Endpoint data PID + 16 + 1 + read-only + + + NAKSTS + NAK status + 17 + 1 + read-only + + + EPTYPE + Endpoint type + 18 + 2 + read-write + + + SNP + Snoop mode + 20 + 1 + read-write + + + STALL + STALL handshake + 21 + 1 + read-write + + + CNAK + Clear NAK + 26 + 1 + write-only + + + SNAK + Set NAK + 27 + 1 + write-only + + + EPTDIS + Endpoint disable + 30 + 1 + read-write + + + EPTENA + Endpoint enable + 31 + 1 + read-write + + + + + DOEPCTL5 + DOEPCTL5 + OTGFS device OUT endpoint-5 control + register + 0x3A0 + 0x20 + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + read-write + + + USBACEPT + USB active endpoint + 15 + 1 + read-write + + + DPID + Endpoint data PID + 16 + 1 + read-only + + + NAKSTS + NAK status + 17 + 1 + read-only + + + EPTYPE + Endpoint type + 18 + 2 + read-write + + + SNP + Snoop mode + 20 + 1 + read-write + + + STALL + STALL handshake + 21 + 1 + read-write + + + CNAK + Clear NAK + 26 + 1 + write-only + + + SNAK + Set NAK + 27 + 1 + write-only + + + EPTDIS + Endpoint disable + 30 + 1 + read-write + + + EPTENA + Endpoint enable + 31 + 1 + read-write + + + + + DOEPCTL6 + DOEPCTL6 + OTGFS device OUT endpoint-6 control + register + 0x3C0 + 0x20 + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + read-write + + + USBACEPT + USB active endpoint + 15 + 1 + read-write + + + DPID + Endpoint data PID + 16 + 1 + read-only + + + NAKSTS + NAK status + 17 + 1 + read-only + + + EPTYPE + Endpoint type + 18 + 2 + read-write + + + SNP + Snoop mode + 20 + 1 + read-write + + + STALL + STALL handshake + 21 + 1 + read-write + + + CNAK + Clear NAK + 26 + 1 + write-only + + + SNAK + Set NAK + 27 + 1 + write-only + + + EPTDIS + Endpoint disable + 30 + 1 + read-write + + + EPTENA + Endpoint enable + 31 + 1 + read-write + + + + + DOEPCTL7 + DOEPCTL7 + OTGFS device OUT endpoint-7 control + register + 0x3E0 + 0x20 + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + read-write + + + USBACEPT + USB active endpoint + 15 + 1 + read-write + + + DPID + Endpoint data PID + 16 + 1 + read-only + + + NAKSTS + NAK status + 17 + 1 + read-only + + + EPTYPE + Endpoint type + 18 + 2 + read-write + + + SNP + Snoop mode + 20 + 1 + read-write + + + STALL + STALL handshake + 21 + 1 + read-write + + + CNAK + Clear NAK + 26 + 1 + write-only + + + SNAK + Set NAK + 27 + 1 + write-only + + + EPTDIS + Endpoint disable + 30 + 1 + read-write + + + EPTENA + Endpoint enable + 31 + 1 + read-write + + + + + DIEPINT0 + DIEPINT0 + OTGFS device IN endpoint-0 interrupt + register + 0x108 + 0x20 + 0x00000080 + + + XFERC + Transfer completed + interrupt + 0 + 1 + read-write + + + EPTDISD + Endpoint disabled + interrupt + 1 + 1 + read-write + + + TIMEOUT + Timeout condition + 3 + 1 + read-write + + + INTKNTXFEMP + IN token received when + TxFIFO is empty + 4 + 1 + read-write + + + INEPTNAK + IN endpoint NAK + effective + 6 + 1 + read-write + + + TXFEMP + Transmit FIFO + empty + 7 + 1 + read-only + + + + + DIEPINT1 + DIEPINT1 + OTGFS device IN endpoint-1 interrupt + register + 0x128 + 0x20 + 0x00000080 + + + XFERC + Transfer completed + interrupt + 0 + 1 + read-write + + + EPTDISD + Endpoint disabled + interrupt + 1 + 1 + read-write + + + TIMEOUT + Timeout condition + 3 + 1 + read-write + + + INTKNTXFEMP + IN token received when + TxFIFO is empty + 4 + 1 + read-write + + + INEPTNAK + IN endpoint NAK + effective + 6 + 1 + read-write + + + TXFEMP + Transmit FIFO + empty + 7 + 1 + read-only + + + + + DIEPINT2 + DIEPINT2 + OTGFS device IN endpoint-2 interrupt + register + 0x148 + 0x20 + 0x00000080 + + + XFERC + Transfer completed + interrupt + 0 + 1 + read-write + + + EPTDISD + Endpoint disabled + interrupt + 1 + 1 + read-write + + + TIMEOUT + Timeout condition + 3 + 1 + read-write + + + INTKNTXFEMP + IN token received when + TxFIFO is empty + 4 + 1 + read-write + + + INEPTNAK + IN endpoint NAK + effective + 6 + 1 + read-write + + + TXFEMP + Transmit FIFO + empty + 7 + 1 + read-only + + + + + DIEPINT3 + DIEPINT3 + OTGFS device IN endpoint-3 interrupt + register + 0x168 + 0x20 + 0x00000080 + + + XFERC + Transfer completed + interrupt + 0 + 1 + read-write + + + EPTDISD + Endpoint disabled + interrupt + 1 + 1 + read-write + + + TIMEOUT + Timeout condition + 3 + 1 + read-write + + + INTKNTXFEMP + IN token received when + TxFIFO is empty + 4 + 1 + read-write + + + INEPTNAK + IN endpoint NAK + effective + 6 + 1 + read-write + + + TXFEMP + Transmit FIFO + empty + 7 + 1 + read-only + + + + + DIEPINT4 + DIEPINT4 + OTGFS device IN endpoint-4 interrupt + register + 0x188 + 0x20 + 0x00000080 + + + XFERC + Transfer completed + interrupt + 0 + 1 + read-write + + + EPTDISD + Endpoint disabled + interrupt + 1 + 1 + read-write + + + TIMEOUT + Timeout condition + 3 + 1 + read-write + + + INTKNTXFEMP + IN token received when + TxFIFO is empty + 4 + 1 + read-write + + + INEPTNAK + IN endpoint NAK + effective + 6 + 1 + read-write + + + TXFEMP + Transmit FIFO + empty + 7 + 1 + read-only + + + + + DIEPINT5 + DIEPINT5 + OTGFS device IN endpoint-5 interrupt + register + 0x1A8 + 0x20 + 0x00000080 + + + XFERC + Transfer completed + interrupt + 0 + 1 + read-write + + + EPTDISD + Endpoint disabled + interrupt + 1 + 1 + read-write + + + TIMEOUT + Timeout condition + 3 + 1 + read-write + + + INTKNTXFEMP + IN token received when + TxFIFO is empty + 4 + 1 + read-write + + + INEPTNAK + IN endpoint NAK + effective + 6 + 1 + read-write + + + TXFEMP + Transmit FIFO + empty + 7 + 1 + read-only + + + + + DIEPINT6 + DIEPINT6 + OTGFS device IN endpoint-6 interrupt + register + 0x1C8 + 0x20 + 0x00000080 + + + XFERC + Transfer completed + interrupt + 0 + 1 + read-write + + + EPTDISD + Endpoint disabled + interrupt + 1 + 1 + read-write + + + TIMEOUT + Timeout condition + 3 + 1 + read-write + + + INTKNTXFEMP + IN token received when + TxFIFO is empty + 4 + 1 + read-write + + + INEPTNAK + IN endpoint NAK + effective + 6 + 1 + read-write + + + TXFEMP + Transmit FIFO + empty + 7 + 1 + read-only + + + + + DIEPINT7 + DIEPINT7 + OTGFS device IN endpoint-7 interrupt + register + 0x1E8 + 0x20 + 0x00000080 + + + XFERC + Transfer completed + interrupt + 0 + 1 + read-write + + + EPTDISD + Endpoint disabled + interrupt + 1 + 1 + read-write + + + TIMEOUT + Timeout condition + 3 + 1 + read-write + + + INTKNTXFEMP + IN token received when + TxFIFO is empty + 4 + 1 + read-write + + + INEPTNAK + IN endpoint NAK + effective + 6 + 1 + read-write + + + TXFEMP + Transmit FIFO + empty + 7 + 1 + read-only + + + + + DOEPINT0 + DOEPINT0 + OTGFS device OUT endpoint-0 interrupt + register + 0x308 + 0x20 + read-write + 0x00000080 + + + XFERC + Transfer completed interrupt + 0 + 1 + + + EPTDISD + Endpoint disabled interrupt + 1 + 1 + + + SETUP + SETUP phase done + 3 + 1 + + + OUTTEPD + OUT token received when + endpoint disabled + 4 + 1 + + + B2BSTUP + Back-to-back SETUP + packets received + 6 + 1 + + + + + DOEPINT1 + DOEPINT1 + OTGFS device OUT endpoint-1 interrupt + register + 0x328 + 0x20 + read-write + 0x00000080 + + + XFERC + Transfer completed interrupt + 0 + 1 + + + EPTDISD + Endpoint disabled interrupt + 1 + 1 + + + SETUP + SETUP phase done + 3 + 1 + + + OUTTEPD + OUT token received when + endpoint disabled + 4 + 1 + + + B2BSTUP + Back-to-back SETUP + packets received + 6 + 1 + + + + + DOEPINT2 + DOEPINT2 + OTGFS device OUT endpoint-2 interrupt + register + 0x348 + 0x20 + read-write + 0x00000080 + + + XFERC + Transfer completed interrupt + 0 + 1 + + + EPTDISD + Endpoint disabled interrupt + 1 + 1 + + + SETUP + SETUP phase done + 3 + 1 + + + OUTTEPD + OUT token received when + endpoint disabled + 4 + 1 + + + B2BSTUP + Back-to-back SETUP + packets received + 6 + 1 + + + + + DOEPINT3 + DOEPINT3 + OTGFS device OUT endpoint-3 interrupt + register + 0x368 + 0x20 + read-write + 0x00000080 + + + XFERC + Transfer completed interrupt + 0 + 1 + + + EPTDISD + Endpoint disabled interrupt + 1 + 1 + + + SETUP + SETUP phase done + 3 + 1 + + + OUTTEPD + OUT token received when + endpoint disabled + 4 + 1 + + + B2BSTUP + Back-to-back SETUP + packets received + 6 + 1 + + + + + DOEPINT4 + DOEPINT4 + OTGFS device OUT endpoint-4 interrupt + register + 0x388 + 0x20 + read-write + 0x00000080 + + + XFERC + Transfer completed interrupt + 0 + 1 + + + EPTDISD + Endpoint disabled interrupt + 1 + 1 + + + SETUP + SETUP phase done + 3 + 1 + + + OUTTEPD + OUT token received when + endpoint disabled + 4 + 1 + + + B2BSTUP + Back-to-back SETUP + packets received + 6 + 1 + + + + + DOEPINT5 + DOEPINT5 + OTGFS device OUT endpoint-5 interrupt + register + 0x3A8 + 0x20 + read-write + 0x00000080 + + + XFERC + Transfer completed interrupt + 0 + 1 + + + EPTDISD + Endpoint disabled interrupt + 1 + 1 + + + SETUP + SETUP phase done + 3 + 1 + + + OUTTEPD + OUT token received when + endpoint disabled + 4 + 1 + + + B2BSTUP + Back-to-back SETUP + packets received + 6 + 1 + + + + + DOEPINT6 + DOEPINT6 + OTGFS device OUT endpoint-6 interrupt + register + 0x3C8 + 0x20 + read-write + 0x00000080 + + + XFERC + Transfer completed interrupt + 0 + 1 + + + EPTDISD + Endpoint disabled interrupt + 1 + 1 + + + SETUP + SETUP phase done + 3 + 1 + + + OUTTEPD + OUT token received when + endpoint disabled + 4 + 1 + + + B2BSTUP + Back-to-back SETUP + packets received + 6 + 1 + + + + + DOEPINT7 + DOEPINT7 + OTGFS device OUT endpoint-7 interrupt + register + 0x3E8 + 0x20 + read-write + 0x00000080 + + + XFERC + Transfer completed interrupt + 0 + 1 + + + EPTDISD + Endpoint disabled interrupt + 1 + 1 + + + SETUP + SETUP phase done + 3 + 1 + + + OUTTEPD + OUT token received when + endpoint disabled + 4 + 1 + + + B2BSTUP + Back-to-back SETUP + packets received + 6 + 1 + + + + + DIEPTSIZ0 + DIEPTSIZ0 + OTGFS device IN endpoint-0 transfer size + register + 0x110 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 7 + + + PKTCNT + Packet count + 19 + 2 + + + + + DOEPTSIZ0 + DOEPTSIZ0 + OTGFS device OUT endpoint-0 transfer size + register + 0x310 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 7 + + + PKTCNT + Packet count + 19 + 1 + + + SETUPCNT + SETUP packet count + 29 + 2 + + + + + DIEPTSIZ1 + DIEPTSIZ1 + OTGFS device IN endpoint-1 transfer size + register + 0x130 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + MC + Multi count + 29 + 2 + + + + + DIEPTSIZ2 + DIEPTSIZ2 + OTGFS device IN endpoint-2 transfer size + register + 0x150 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + MC + Multi count + 29 + 2 + + + + + DIEPTSIZ3 + DIEPTSIZ3 + OTG device IN endpoint-3 transfer size + register + 0x170 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + MC + Multi count + 29 + 2 + + + + + DIEPTSIZ4 + DIEPTSIZ4 + OTG device IN endpoint-4 transfer size + register + 0x190 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + MC + Multi count + 29 + 2 + + + + + DIEPTSIZ5 + DIEPTSIZ5 + OTG device IN endpoint-5 transfer size + register + 0x1B0 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + MC + Multi count + 29 + 2 + + + + + DIEPTSIZ6 + DIEPTSIZ6 + OTG device IN endpoint-6 transfer size + register + 0x1D0 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + MC + Multi count + 29 + 2 + + + + + DIEPTSIZ7 + DIEPTSIZ7 + OTG device IN endpoint-7 transfer size + register + 0x1F0 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + MC + Multi count + 29 + 2 + + + + + DTXFSTS0 + DTXFSTS0 + OTGFS device IN endpoint-0 transmit FIFO + status register + 0x118 + 0x20 + read-only + 0x00000000 + + + INEPTXFSAV + IN endpoint TxFIFO space + available + 0 + 16 + + + + + DTXFSTS1 + DTXFSTS1 + OTGFS device IN endpoint-1 transmit FIFO + status register + 0x138 + 0x20 + read-only + 0x00000000 + + + INEPTXFSAV + IN endpoint TxFIFO space + available + 0 + 16 + + + + + DTXFSTS2 + DTXFSTS2 + OTGFS device IN endpoint-2 transmit FIFO + status register + 0x158 + 0x20 + read-only + 0x00000000 + + + INEPTXFSAV + IN endpoint TxFIFO space + available + 0 + 16 + + + + + DTXFSTS3 + DTXFSTS3 + OTGFS device IN endpoint-3 transmit FIFO + status register + 0x178 + 0x20 + read-only + 0x00000000 + + + INEPTXFSAV + IN endpoint TxFIFO space + available + 0 + 16 + + + + + DTXFSTS4 + DTXFSTS4 + OTGFS device IN endpoint-4 transmit FIFO + status register + 0x198 + 0x20 + read-only + 0x00000000 + + + INEPTXFSAV + IN endpoint TxFIFO space + available + 0 + 16 + + + + + DTXFSTS5 + DTXFSTS5 + OTGFS device IN endpoint-5 transmit FIFO + status register + 0x1B8 + 0x20 + read-only + 0x00000000 + + + INEPTXFSAV + IN endpoint TxFIFO space + available + 0 + 16 + + + + + DTXFSTS6 + DTXFSTS6 + OTGFS device IN endpoint-6 transmit FIFO + status register + 0x1D8 + 0x20 + read-only + 0x00000000 + + + INEPTXFSAV + IN endpoint TxFIFO space + available + 0 + 16 + + + + + DTXFSTS7 + DTXFSTS7 + OTGFS device IN endpoint-7 transmit FIFO + status register + 0x1F8 + 0x20 + read-only + 0x00000000 + + + INEPTXFSAV + IN endpoint TxFIFO space + available + 0 + 16 + + + + + DOEPTSIZ1 + DOEPTSIZ1 + OTGFS device OUT endpoint-1 transfer size + register + 0x330 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + RXDPID + Received data PID + 29 + 2 + + + + + DOEPTSIZ2 + DOEPTSIZ2 + OTGFS device OUT endpoint-2 transfer size + register + 0x350 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + RXDPID + Received data PID + 29 + 2 + + + + + DOEPTSIZ3 + DOEPTSIZ3 + OTGFS device OUT endpoint-3 transfer size + register + 0x370 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + RXDPID + Received data PID + 29 + 2 + + + + + DOEPTSIZ4 + DOEPTSIZ4 + OTGFS device OUT endpoint-4 transfer size + register + 0x390 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + RXDPID + Received data PID + 29 + 2 + + + + + DOEPTSIZ5 + DOEPTSIZ5 + OTGFS device OUT endpoint-5 transfer size + register + 0x3B0 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + RXDPID + Received data PID + 29 + 2 + + + + + DOEPTSIZ6 + DOEPTSIZ6 + OTGFS device OUT endpoint-6 transfer size + register + 0x3D0 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + RXDPID + Received data PID + 29 + 2 + + + + + DOEPTSIZ7 + DOEPTSIZ7 + OTGFS device OUT endpoint-7 transfer size + register + 0x3F0 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + RXDPID + Received data PID + 29 + 2 + + + + + + + USB_OTG1_PWRCLK + USB on the go full speed + USB_OTG1 + 0x50000E00 + + 0x0 + 0x400 + registers + + + + PCGCCTL + PCGCCTL + OTGFS power and clock gating control + register (OTGFS_PCGCCTL) + 0x0 + 0x20 + 0x00000000 + + + STOPPCLK + Stop PHY clock + 0 + 1 + read-write + + + SUSPENDM + PHY Suspended + 4 + 1 + read-only + + + + + + + USB_OTG2_GLOBAL + USB on the go full speed + USB_OTG2 + 0x40040000 + + 0x0 + 0x400 + registers + + + OTGFS2 + USB On The Go FS2 global + interrupt + 77 + + + + GOTGCTL + GOTGCTL + OTGFS control and status register + (OTGFS_GOTGCTL) + 0x0 + 0x20 + 0x00000800 + + + CONIDSTS + Connector ID status + 16 + 1 + read-only + + + CURMOD + Current Mode of Operation + 21 + 1 + read-only + + + + + GOTGINT + GOTGINT + OTGFS interrupt register + (OTGFS_GOTGINT) + 0x4 + 0x20 + 0x00000000 + + + SESENDDET + VBUS is deasserted + 2 + 1 + read-write + + + + + GAHBCFG + GAHBCFG + OTGFS AHB configuration register + (OTGFS_GAHBCFG) + 0x8 + 0x20 + read-write + 0x00000000 + + + GLBINTMSK + Global interrupt mask + 0 + 1 + + + NPTXFEMPLVL + Non-Periodic TxFIFO empty level + 7 + 1 + + + PTXFEMPLVL + Periodic TxFIFO empty + level + 8 + 1 + + + + + GUSBCFG + GUSBCFG + USB configuration register + (OTGFS_GUSBCFG) + 0xC + 0x20 + 0x00000A00 + + + TOUTCAL + FS timeout calibration + 0 + 3 + read-write + + + USBTRDTIM + USB turnaround time + 10 + 4 + read-write + + + FHSTMODE + Force host mode + 29 + 1 + read-write + + + FDEVMODE + Force device mode + 30 + 1 + read-write + + + COTXPKT + Corrupt Tx packet + 31 + 1 + read-write + + + + + GRSTCTL + GRSTCTL + OTGFS reset register + (OTGFS_GRSTCTL) + 0x10 + 0x20 + 0x20000000 + + + CSFTRST + Core soft reset + 0 + 1 + read-write + + + PIUSFTRST + PIU FS Dedicated Controller Soft Reset + 1 + 1 + read-write + + + FRMCNTRST + Host frame counter reset + 2 + 1 + read-write + + + RXFFLSH + RxFIFO flush + 4 + 1 + read-write + + + TXFFLSH + TxFIFO flush + 5 + 1 + read-write + + + TXFNUM + TxFIFO number + 6 + 5 + read-write + + + AHBIDLE + AHB master idle + 31 + 1 + read-only + + + + + GINTSTS + GINTSTS + OTGFS core interrupt register + (OTGFS_GINTSTS) + 0x14 + 0x20 + 0x04000020 + + + CURMOD + Current mode of operation + 0 + 1 + read-only + + + MODEMIS + Mode mismatch interrupt + 1 + 1 + read-write + + + OTGINT + OTG interrupt + 2 + 1 + read-only + + + SOF + Start of frame + 3 + 1 + read-write + + + RXFLVL + RxFIFO non-empty + 4 + 1 + read-only + + + NPTXFEMP + Non-periodic TxFIFO empty + 5 + 1 + read-only + + + GINNAKEFF + Global IN non-periodic NAK + effective + 6 + 1 + read-only + + + GOUTNAKEFF + Global OUT NAK effective + 7 + 1 + read-only + + + ERLYSUSP + Early suspend + 10 + 1 + read-write + + + USBSUSP + USB suspend + 11 + 1 + read-write + + + USBRST + USB reset + 12 + 1 + read-write + + + ENUMDONE + Enumeration done + 13 + 1 + read-write + + + ISOOUTDROP + Isochronous OUT packet dropped + interrupt + 14 + 1 + read-write + + + EOPF + End of periodic frame + interrupt + 15 + 1 + read-write + + + IEPTINT + IN endpoint interrupt + 18 + 1 + read-only + + + OEPTINT + OUT endpoint interrupt + 19 + 1 + read-only + + + INCOMPISOIN + Incomplete isochronous IN + transfer + 20 + 1 + read-write + + + INCOMPIP_INCOMPISOOUT + Incomplete periodic transfer(Host + mode)/Incomplete isochronous OUT transfer(Device + mode) + 21 + 1 + read-write + + + PRTINT + Host port interrupt + 24 + 1 + read-only + + + HCHINT + Host channels interrupt + 25 + 1 + read-only + + + PTXFEMP + Periodic TxFIFO empty + 26 + 1 + read-only + + + CONIDSCHG + Connector ID status change + 28 + 1 + read-write + + + DISCONINT + Disconnect detected + interrupt + 29 + 1 + read-write + + + WKUPINT + Resume/remote wakeup detected + interrupt + 31 + 1 + read-write + + + + + GINTMSK + GINTMSK + OTG_FS interrupt mask register + (OTG_FS_GINTMSK) + 0x18 + 0x20 + 0x00000000 + + + MODEMISMSK + Mode mismatch interrupt + mask + 1 + 1 + read-write + + + OTGINTMSK + OTG interrupt mask + 2 + 1 + read-write + + + SOFMSK + Start of frame mask + 3 + 1 + read-write + + + RXFLVLMSK + Receive FIFO non-empty + mask + 4 + 1 + read-write + + + NPTXFEMPMSK + Non-periodic TxFIFO empty + mask + 5 + 1 + read-write + + + GINNAKEFFMSK + Global non-periodic IN NAK effective + mask + 6 + 1 + read-write + + + GOUTNAKEFFMSK + Global OUT NAK effective + mask + 7 + 1 + read-write + + + ERLYSUSPMSK + Early suspend mask + 10 + 1 + read-write + + + USBSUSPMSK + USB suspend mask + 11 + 1 + read-write + + + USBRSTMSK + USB reset mask + 12 + 1 + read-write + + + ENUMDONEMSK + Enumeration done mask + 13 + 1 + read-write + + + ISOOUTDROPMSK + Isochronous OUT packet dropped interrupt + mask + 14 + 1 + read-write + + + EOPFMSK + End of periodic frame interrupt + mask + 15 + 1 + read-write + + + IEPTINTMSK + IN endpoints interrupt + mask + 18 + 1 + read-write + + + OEPTINTMSK + OUT endpoints interrupt + mask + 19 + 1 + read-write + + + INCOMISOINMSK + Incomplete isochronous IN transfer + mask + 20 + 1 + read-write + + + INCOMPIP_INCOMPISOOUTMSK + Incomplete periodic transfer mask(Host + mode)/Incomplete isochronous OUT transfer mask(Device + mode) + 21 + 1 + read-write + + + PRTINTMSK + Host port interrupt mask + 24 + 1 + read-only + + + HCHINTMSK + Host channels interrupt + mask + 25 + 1 + read-write + + + PTXFEMPMSK + Periodic TxFIFO empty mask + 26 + 1 + read-write + + + CONIDSCHGMSK + Connector ID status change + mask + 28 + 1 + read-write + + + DISCONINTMSK + Disconnect detected interrupt + mask + 29 + 1 + read-write + + + WKUPINTMSK + Resume/remote wakeup detected interrupt + mask + 31 + 1 + read-write + + + + + GRXSTSR_Device + GRXSTSR_Device + OTGFS Receive status debug read(Device + mode) + 0x1C + 0x20 + read-only + 0x00000000 + + + EPTNUM + Endpoint number + 0 + 4 + + + BCNT + Byte count + 4 + 11 + + + DPID + Data PID + 15 + 2 + + + PKTSTS + Packet status + 17 + 4 + + + FN + Frame number + 21 + 4 + + + + + GRXSTSR_Host + GRXSTSR_Host + OTGFS Receive status debug read(Host + mode) + GRXSTSR_Device + 0x1C + 0x20 + read-only + 0x00000000 + + + CHNUM + Channel number + 0 + 4 + + + BCNT + Byte count + 4 + 11 + + + DPID + Data PID + 15 + 2 + + + PKTSTS + Packet status + 17 + 4 + + + + + GRXFSIZ + GRXFSIZ + OTGFS Receive FIFO size register + (OTGFS_GRXFSIZ) + 0x24 + 0x20 + read-write + 0x00000200 + + + RXFDEP + RxFIFO depth + 0 + 16 + + + + + DIEPTXF0 + DIEPTXF0 + IN Endpoint TxFIFO 0 transmit FIFO size + register (Device mode) + 0x28 + 0x20 + read-write + 0x00000200 + + + INEPT0TXSTADDR + Endpoint 0 transmit RAM start + address + 0 + 16 + + + INEPT0TXDEP + Endpoint 0 TxFIFO depth + 16 + 16 + + + + + GNPTXFSIZ + GNPTXFSIZ + OTGFS non-periodic transmit FIFO size + register (Host mode) + DIEPTXF0 + 0x28 + 0x20 + read-write + 0x00000200 + + + NPTXFSTADDR + Non-periodic Transmit RAM Start + address + 0 + 16 + + + NPTXFDEP + Non-periodic TxFIFO depth + 16 + 16 + + + + + GNPTXSTS + GNPTXSTS + OTGFS non-periodic transmit FIFO/queue + status register (OTGFS_GNPTXSTS) + 0x2C + 0x20 + read-only + 0x00080200 + + + NPTXFSPCAVAIL + Non-periodic TxFIFO space + available + 0 + 16 + + + NPTXQSPCAVAIL + Non-periodic transmit request queue + space available + 16 + 8 + + + NPTXQTOP + Top of the non-periodic transmit request + queue + 24 + 7 + + + + + GCCFG + GCCFG + OTGFS general core configuration register + (OTGFS_GCCFG) + 0x38 + 0x20 + read-write + 0x00000000 + + + PWRDOWN + Power down + 16 + 1 + + + LP_MODE + Low power mode + 17 + 1 + + + SOFOUTEN + SOF output enable + 20 + 1 + + + VBUSIG + VBUS Ignored + 21 + 1 + + + + + GUID + GUID + Product ID register + 0x3C + 0x20 + read-write + 0x00001000 + + + USERID + Product ID field + 0 + 32 + + + + + HPTXFSIZ + HPTXFSIZ + OTGFS Host periodic transmit FIFO size + register (OTGFS_HPTXFSIZ) + 0x100 + 0x20 + read-write + 0x02000600 + + + PTXFSTADDR + Host periodic TxFIFO start + address + 0 + 16 + + + PTXFSIZE + Host periodic TxFIFO depth + 16 + 16 + + + + + DIEPTXF1 + DIEPTXF1 + OTGFS device IN endpoint transmit FIFO size + register (OTGFS_DIEPTXF1) + 0x104 + 0x20 + read-write + 0x02000400 + + + INEPTXFSTADDR + IN endpoint FIFO1 transmit RAM start + address + 0 + 16 + + + INEPTXFDEP + IN endpoint TxFIFO depth + 16 + 16 + + + + + DIEPTXF2 + DIEPTXF2 + OTGFS device IN endpoint transmit FIFO size + register (OTGFS_DIEPTXF2) + 0x108 + 0x20 + read-write + 0x02000400 + + + INEPTXFSTADDR + IN endpoint FIFO2 transmit RAM start + address + 0 + 16 + + + INEPTXFDEP + IN endpoint TxFIFO depth + 16 + 16 + + + + + DIEPTXF3 + DIEPTXF3 + OTGFS device IN endpoint transmit FIFO size + register (OTGFS_DIEPTXF3) + 0x10C + 0x20 + read-write + 0x02000400 + + + INEPTXFSTADDR + IN endpoint FIFO3 transmit RAM start + address + 0 + 16 + + + INEPTXFDEP + IN endpoint TxFIFO depth + 16 + 16 + + + + + DIEPTXF4 + DIEPTXF4 + OTGFS device IN endpoint transmit FIFO size + register (OTGFS_DIEPTXF4) + 0x110 + 0x20 + read-write + 0x02000400 + + + INEPTXFSTADDR + IN endpoint FIFO4 transmit RAM start + address + 0 + 16 + + + INEPTXFDEP + IN endpoint TxFIFO depth + 16 + 16 + + + + + DIEPTXF5 + DIEPTXF5 + OTGFS device IN endpoint transmit FIFO size + register (OTGFS_DIEPTXF5) + 0x114 + 0x20 + read-write + 0x02000400 + + + INEPTXFSTADDR + IN endpoint FIFO5 transmit RAM start + address + 0 + 16 + + + INEPTXFDEP + IN endpoint TxFIFO depth + 16 + 16 + + + + + DIEPTXF6 + DIEPTXF6 + OTGFS device IN endpoint transmit FIFO size + register (OTGFS_DIEPTXF6) + 0x118 + 0x20 + read-write + 0x02000400 + + + INEPTXFSTADDR + IN endpoint FIFO6 transmit RAM start + address + 0 + 16 + + + INEPTXFDEP + IN endpoint TxFIFO depth + 16 + 16 + + + + + DIEPTXF7 + DIEPTXF7 + OTGFS device IN endpoint transmit FIFO size + register (OTGFS_DIEPTXF7) + 0x11C + 0x20 + read-write + 0x02000400 + + + INEPTXFSTADDR + IN endpoint FIFO7 transmit RAM start + address + 0 + 16 + + + INEPTXFDEP + IN endpoint TxFIFO depth + 16 + 16 + + + + + + + USB_OTG2_HOST + USB on the go full speed + USB_OTG2 + 0x40040400 + + 0x0 + 0x400 + registers + + + + HCFG + HCFG + OTGFS host configuration register + (OTGFS_HCFG) + 0x0 + 0x20 + 0x00000000 + + + FSLSPCLKSEL + FS/LS PHY clock select + 0 + 2 + read-write + + + FSLSSUPP + FS- and LS-only support + 2 + 1 + read-only + + + + + HFIR + HFIR + OTGFS Host frame interval + register + 0x4 + 0x20 + read-write + 0x0000EA60 + + + FRINT + Frame interval + 0 + 16 + + + + + HFNUM + HFNUM + OTGFS host frame number/frame time + remaining register (OTGFS_HFNUM) + 0x8 + 0x20 + read-only + 0x00003FFF + + + FRNUM + Frame number + 0 + 16 + + + FTREM + Frame time remaining + 16 + 16 + + + + + HPTXSTS + HPTXSTS + OTGFS_Host periodic transmit FIFO/queue + status register (OTGFS_HPTXSTS) + 0x10 + 0x20 + 0x00080100 + + + PTXFSPCAVAIL + Periodic transmit data FIFO space + available + 0 + 16 + read-write + + + PTXQSPCAVAIL + Periodic transmit request queue space + available + 16 + 8 + read-only + + + PTXQTOP + Top of the periodic transmit request + queue + 24 + 8 + read-only + + + + + HAINT + HAINT + OTGFS Host all channels interrupt + register + 0x14 + 0x20 + read-only + 0x00000000 + + + HAINT + Channel interrupts + 0 + 16 + + + + + HAINTMSK + HAINTMSK + OTGFS host all channels interrupt mask + register + 0x18 + 0x20 + read-write + 0x00000000 + + + HAINTMSK + Channel interrupt mask + 0 + 16 + + + + + HPRT + HPRT + OTGFS host port control and status register + (OTGFS_HPRT) + 0x40 + 0x20 + 0x00000000 + + + PRTCONSTS + Port connect status + 0 + 1 + read-only + + + PRTCONDET + Port connect detected + 1 + 1 + read-write + + + PRTENA + Port enable + 2 + 1 + read-write + + + PRTENCHNG + Port enable/disable change + 3 + 1 + read-write + + + PRTOVRCACT + Port overcurrent active + 4 + 1 + read-only + + + PRTOVRCCHNG + Port overcurrent change + 5 + 1 + read-write + + + PRTRES + Port resume + 6 + 1 + read-write + + + PRTSUSP + Port suspend + 7 + 1 + read-write + + + PRTRST + Port reset + 8 + 1 + read-write + + + PRTLNSTS + Port line status + 10 + 2 + read-only + + + PRTPWR + Port power + 12 + 1 + read-write + + + PRTTSTCTL + Port test control + 13 + 4 + read-write + + + PRTSPD + Port speed + 17 + 2 + read-only + + + + + HCCHAR0 + HCCHAR0 + OTGFS host channel-0 characteristics + register (OTGFS_HCCHAR0) + 0x100 + 0x20 + read-write + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + + + EPTNUM + Endpoint number + 11 + 4 + + + EPTDIR + Endpoint direction + 15 + 1 + + + LSPDDEV + Low-speed device + 17 + 1 + + + EPTYPE + Endpoint type + 18 + 2 + + + MC + Multicount + 20 + 2 + + + DEVADDR + Device address + 22 + 7 + + + ODDFRM + Odd frame + 29 + 1 + + + CHDIS + Channel disable + 30 + 1 + + + CHENA + Channel enable + 31 + 1 + + + + + HCCHAR1 + HCCHAR1 + OTGFS host channel-1 characteristics + register (OTGFS_HCCHAR1) + 0x120 + 0x20 + read-write + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + + + EPTNUM + Endpoint number + 11 + 4 + + + EPTDIR + Endpoint direction + 15 + 1 + + + LSPDDEV + Low-speed device + 17 + 1 + + + EPTYPE + Endpoint type + 18 + 2 + + + MC + Multicount + 20 + 2 + + + DEVADDR + Device address + 22 + 7 + + + ODDFRM + Odd frame + 29 + 1 + + + CHDIS + Channel disable + 30 + 1 + + + CHENA + Channel enable + 31 + 1 + + + + + HCCHAR2 + HCCHAR2 + OTGFS host channel-2 characteristics + register (OTGFS_HCCHAR2) + 0x140 + 0x20 + read-write + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + + + EPTNUM + Endpoint number + 11 + 4 + + + EPTDIR + Endpoint direction + 15 + 1 + + + LSPDDEV + Low-speed device + 17 + 1 + + + EPTYPE + Endpoint type + 18 + 2 + + + MC + Multicount + 20 + 2 + + + DEVADDR + Device address + 22 + 7 + + + ODDFRM + Odd frame + 29 + 1 + + + CHDIS + Channel disable + 30 + 1 + + + CHENA + Channel enable + 31 + 1 + + + + + HCCHAR3 + HCCHAR3 + OTGFS host channel-3 characteristics + register (OTGFS_HCCHAR3) + 0x160 + 0x20 + read-write + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + + + EPTNUM + Endpoint number + 11 + 4 + + + EPTDIR + Endpoint direction + 15 + 1 + + + LSPDDEV + Low-speed device + 17 + 1 + + + EPTYPE + Endpoint type + 18 + 2 + + + MC + Multicount + 20 + 2 + + + DEVADDR + Device address + 22 + 7 + + + ODDFRM + Odd frame + 29 + 1 + + + CHDIS + Channel disable + 30 + 1 + + + CHENA + Channel enable + 31 + 1 + + + + + HCCHAR4 + HCCHAR4 + OTGFS host channel-4 characteristics + register (OTGFS_HCCHAR4) + 0x180 + 0x20 + read-write + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + + + EPTNUM + Endpoint number + 11 + 4 + + + EPTDIR + Endpoint direction + 15 + 1 + + + LSPDDEV + Low-speed device + 17 + 1 + + + EPTYPE + Endpoint type + 18 + 2 + + + MC + Multicount + 20 + 2 + + + DEVADDR + Device address + 22 + 7 + + + ODDFRM + Odd frame + 29 + 1 + + + CHDIS + Channel disable + 30 + 1 + + + CHENA + Channel enable + 31 + 1 + + + + + HCCHAR5 + HCCHAR5 + OTGFS host channel-5 characteristics + register (OTGFS_HCCHAR5) + 0x1A0 + 0x20 + read-write + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + + + EPTNUM + Endpoint number + 11 + 4 + + + EPTDIR + Endpoint direction + 15 + 1 + + + LSPDDEV + Low-speed device + 17 + 1 + + + EPTYPE + Endpoint type + 18 + 2 + + + MC + Multicount + 20 + 2 + + + DEVADDR + Device address + 22 + 7 + + + ODDFRM + Odd frame + 29 + 1 + + + CHDIS + Channel disable + 30 + 1 + + + CHENA + Channel enable + 31 + 1 + + + + + HCCHAR6 + HCCHAR6 + OTGFS host channel-6 characteristics + register (OTGFS_HCCHAR6) + 0x1C0 + 0x20 + read-write + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + + + EPTNUM + Endpoint number + 11 + 4 + + + EPTDIR + Endpoint direction + 15 + 1 + + + LSPDDEV + Low-speed device + 17 + 1 + + + EPTYPE + Endpoint type + 18 + 2 + + + MC + Multicount + 20 + 2 + + + DEVADDR + Device address + 22 + 7 + + + ODDFRM + Odd frame + 29 + 1 + + + CHDIS + Channel disable + 30 + 1 + + + CHENA + Channel enable + 31 + 1 + + + + + HCCHAR7 + HCCHAR7 + OTGFS host channel-7 characteristics + register (OTGFS_HCCHAR7) + 0x1E0 + 0x20 + read-write + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + + + EPTNUM + Endpoint number + 11 + 4 + + + EPTDIR + Endpoint direction + 15 + 1 + + + LSPDDEV + Low-speed device + 17 + 1 + + + EPTYPE + Endpoint type + 18 + 2 + + + MC + Multicount + 20 + 2 + + + DEVADDR + Device address + 22 + 7 + + + ODDFRM + Odd frame + 29 + 1 + + + CHDIS + Channel disable + 30 + 1 + + + CHENA + Channel enable + 31 + 1 + + + + + HCCHAR8 + HCCHAR8 + OTGFS host channel-8 characteristics + register (OTGFS_HCCHAR8) + 0x200 + 0x20 + read-write + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + + + EPTNUM + Endpoint number + 11 + 4 + + + EPTDIR + Endpoint direction + 15 + 1 + + + LSPDDEV + Low-speed device + 17 + 1 + + + EPTYPE + Endpoint type + 18 + 2 + + + MC + Multicount + 20 + 2 + + + DEVADDR + Device address + 22 + 7 + + + ODDFRM + Odd frame + 29 + 1 + + + CHDIS + Channel disable + 30 + 1 + + + CHENA + Channel enable + 31 + 1 + + + + + HCCHAR9 + HCCHAR9 + OTGFS host channel-9 characteristics + register (OTGFS_HCCHAR9) + 0x220 + 0x20 + read-write + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + + + EPTNUM + Endpoint number + 11 + 4 + + + EPTDIR + Endpoint direction + 15 + 1 + + + LSPDDEV + Low-speed device + 17 + 1 + + + EPTYPE + Endpoint type + 18 + 2 + + + MC + Multicount + 20 + 2 + + + DEVADDR + Device address + 22 + 7 + + + ODDFRM + Odd frame + 29 + 1 + + + CHDIS + Channel disable + 30 + 1 + + + CHENA + Channel enable + 31 + 1 + + + + + HCCHAR10 + HCCHAR10 + OTGFS host channel-10 characteristics + register (OTGFS_HCCHAR10) + 0x240 + 0x20 + read-write + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + + + EPTNUM + Endpoint number + 11 + 4 + + + EPTDIR + Endpoint direction + 15 + 1 + + + LSPDDEV + Low-speed device + 17 + 1 + + + EPTYPE + Endpoint type + 18 + 2 + + + MC + Multicount + 20 + 2 + + + DEVADDR + Device address + 22 + 7 + + + ODDFRM + Odd frame + 29 + 1 + + + CHDIS + Channel disable + 30 + 1 + + + CHENA + Channel enable + 31 + 1 + + + + + HCCHAR11 + HCCHAR11 + OTGFS host channel-7 characteristics + register (OTGFS_HCCHAR11) + 0x260 + 0x20 + read-write + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + + + EPTNUM + Endpoint number + 11 + 4 + + + EPTDIR + Endpoint direction + 15 + 1 + + + LSPDDEV + Low-speed device + 17 + 1 + + + EPTYPE + Endpoint type + 18 + 2 + + + MC + Multicount + 20 + 2 + + + DEVADDR + Device address + 22 + 7 + + + ODDFRM + Odd frame + 29 + 1 + + + CHDIS + Channel disable + 30 + 1 + + + CHENA + Channel enable + 31 + 1 + + + + + HCCHAR12 + HCCHAR12 + OTGFS host channel-12 characteristics + register (OTGFS_HCCHAR12) + 0x280 + 0x20 + read-write + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + + + EPTNUM + Endpoint number + 11 + 4 + + + EPTDIR + Endpoint direction + 15 + 1 + + + LSPDDEV + Low-speed device + 17 + 1 + + + EPTYPE + Endpoint type + 18 + 2 + + + MC + Multicount + 20 + 2 + + + DEVADDR + Device address + 22 + 7 + + + ODDFRM + Odd frame + 29 + 1 + + + CHDIS + Channel disable + 30 + 1 + + + CHENA + Channel enable + 31 + 1 + + + + + HCCHAR13 + HCCHAR13 + OTGFS host channel-13 characteristics + register (OTGFS_HCCHAR13) + 0x2A0 + 0x20 + read-write + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + + + EPTNUM + Endpoint number + 11 + 4 + + + EPTDIR + Endpoint direction + 15 + 1 + + + LSPDDEV + Low-speed device + 17 + 1 + + + EPTYPE + Endpoint type + 18 + 2 + + + MC + Multicount + 20 + 2 + + + DEVADDR + Device address + 22 + 7 + + + ODDFRM + Odd frame + 29 + 1 + + + CHDIS + Channel disable + 30 + 1 + + + CHENA + Channel enable + 31 + 1 + + + + + HCCHAR14 + HCCHAR14 + OTGFS host channel-14 characteristics + register (OTGFS_HCCHAR14) + 0x2C0 + 0x20 + read-write + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + + + EPTNUM + Endpoint number + 11 + 4 + + + EPTDIR + Endpoint direction + 15 + 1 + + + LSPDDEV + Low-speed device + 17 + 1 + + + EPTYPE + Endpoint type + 18 + 2 + + + MC + Multicount + 20 + 2 + + + DEVADDR + Device address + 22 + 7 + + + ODDFRM + Odd frame + 29 + 1 + + + CHDIS + Channel disable + 30 + 1 + + + CHENA + Channel enable + 31 + 1 + + + + + HCCHAR15 + HCCHAR15 + OTGFS host channel-15 characteristics + register (OTGFS_HCCHAR15) + 0x2E0 + 0x20 + read-write + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + + + EPTNUM + Endpoint number + 11 + 4 + + + EPTDIR + Endpoint direction + 15 + 1 + + + LSPDDEV + Low-speed device + 17 + 1 + + + EPTYPE + Endpoint type + 18 + 2 + + + MC + Multicount + 20 + 2 + + + DEVADDR + Device address + 22 + 7 + + + ODDFRM + Odd frame + 29 + 1 + + + CHDIS + Channel disable + 30 + 1 + + + CHENA + Channel enable + 31 + 1 + + + + + HCINT0 + HCINT0 + OTGFS host channel-0 interrupt register + (OTGFS_HCINT0) + 0x108 + 0x20 + read-write + 0x00000000 + + + XFERC + Transfer completed + 0 + 1 + + + CHHLTD + Channel halted + 1 + 1 + + + STALL + STALL response received + interrupt + 3 + 1 + + + NAK + NAK response received + interrupt + 4 + 1 + + + ACK + ACK response received/transmitted + interrupt + 5 + 1 + + + XACTERR + Transaction error + 7 + 1 + + + BBLERR + Babble error + 8 + 1 + + + FRMOVRUN + Frame overrun + 9 + 1 + + + DTGLERR + Data toggle error + 10 + 1 + + + + + HCINT1 + HCINT1 + OTG_FS host channel-1 interrupt register + (OTG_FS_HCINT1) + 0x128 + 0x20 + read-write + 0x00000000 + + + XFERC + Transfer completed + 0 + 1 + + + CHHLTD + Channel halted + 1 + 1 + + + STALL + STALL response received + interrupt + 3 + 1 + + + NAK + NAK response received + interrupt + 4 + 1 + + + ACK + ACK response received/transmitted + interrupt + 5 + 1 + + + XACTERR + Transaction error + 7 + 1 + + + BBLERR + Babble error + 8 + 1 + + + FRMOVRUN + Frame overrun + 9 + 1 + + + DTGLERR + Data toggle error + 10 + 1 + + + + + HCINT2 + HCINT2 + OTGFS host channel-2 interrupt register + (OTGFS_HCINT2) + 0x148 + 0x20 + read-write + 0x00000000 + + + XFERC + Transfer completed + 0 + 1 + + + CHHLTD + Channel halted + 1 + 1 + + + STALL + STALL response received + interrupt + 3 + 1 + + + NAK + NAK response received + interrupt + 4 + 1 + + + ACK + ACK response received/transmitted + interrupt + 5 + 1 + + + XACTERR + Transaction error + 7 + 1 + + + BBLERR + Babble error + 8 + 1 + + + FRMOVRUN + Frame overrun + 9 + 1 + + + DTGLERR + Data toggle error + 10 + 1 + + + + + HCINT3 + HCINT3 + OTGFS host channel-3 interrupt register + (OTGFS_HCINT3) + 0x168 + 0x20 + read-write + 0x00000000 + + + XFERC + Transfer completed + 0 + 1 + + + CHHLTD + Channel halted + 1 + 1 + + + STALL + STALL response received + interrupt + 3 + 1 + + + NAK + NAK response received + interrupt + 4 + 1 + + + ACK + ACK response received/transmitted + interrupt + 5 + 1 + + + XACTERR + Transaction error + 7 + 1 + + + BBLERR + Babble error + 8 + 1 + + + FRMOVRUN + Frame overrun + 9 + 1 + + + DTGLERR + Data toggle error + 10 + 1 + + + + + HCINT4 + HCINT4 + OTGFS host channel-4 interrupt register + (OTGFS_HCINT4) + 0x188 + 0x20 + read-write + 0x00000000 + + + XFERC + Transfer completed + 0 + 1 + + + CHHLTD + Channel halted + 1 + 1 + + + STALL + STALL response received + interrupt + 3 + 1 + + + NAK + NAK response received + interrupt + 4 + 1 + + + ACK + ACK response received/transmitted + interrupt + 5 + 1 + + + XACTERR + Transaction error + 7 + 1 + + + BBLERR + Babble error + 8 + 1 + + + FRMOVRUN + Frame overrun + 9 + 1 + + + DTGLERR + Data toggle error + 10 + 1 + + + + + HCINT5 + HCINT5 + OTGFS host channel-5 interrupt register + (OTGFS_HCINT5) + 0x1A8 + 0x20 + read-write + 0x00000000 + + + XFERC + Transfer completed + 0 + 1 + + + CHHLTD + Channel halted + 1 + 1 + + + STALL + STALL response received + interrupt + 3 + 1 + + + NAK + NAK response received + interrupt + 4 + 1 + + + ACK + ACK response received/transmitted + interrupt + 5 + 1 + + + XACTERR + Transaction error + 7 + 1 + + + BBLERR + Babble error + 8 + 1 + + + FRMOVRUN + Frame overrun + 9 + 1 + + + DTGLERR + Data toggle error + 10 + 1 + + + + + HCINT6 + HCINT6 + OTGFS host channel-6 interrupt register + (OTGFS_HCINT6) + 0x1C8 + 0x20 + read-write + 0x00000000 + + + XFERC + Transfer completed + 0 + 1 + + + CHHLTD + Channel halted + 1 + 1 + + + STALL + STALL response received + interrupt + 3 + 1 + + + NAK + NAK response received + interrupt + 4 + 1 + + + ACK + ACK response received/transmitted + interrupt + 5 + 1 + + + XACTERR + Transaction error + 7 + 1 + + + BBLERR + Babble error + 8 + 1 + + + FRMOVRUN + Frame overrun + 9 + 1 + + + DTGLERR + Data toggle error + 10 + 1 + + + + + HCINT7 + HCINT7 + OTGFS host channel-7 interrupt register + (OTGFS_HCINT7) + 0x1E8 + 0x20 + read-write + 0x00000000 + + + XFERC + Transfer completed + 0 + 1 + + + CHHLTD + Channel halted + 1 + 1 + + + STALL + STALL response received + interrupt + 3 + 1 + + + NAK + NAK response received + interrupt + 4 + 1 + + + ACK + ACK response received/transmitted + interrupt + 5 + 1 + + + XACTERR + Transaction error + 7 + 1 + + + BBLERR + Babble error + 8 + 1 + + + FRMOVRUN + Frame overrun + 9 + 1 + + + DTGLERR + Data toggle error + 10 + 1 + + + + + HCINT8 + HCINT8 + OTGFS host channel-8 interrupt register + (OTGFS_HCINT8) + 0x208 + 0x20 + read-write + 0x00000000 + + + XFERC + Transfer completed + 0 + 1 + + + CHHLTD + Channel halted + 1 + 1 + + + STALL + STALL response received + interrupt + 3 + 1 + + + NAK + NAK response received + interrupt + 4 + 1 + + + ACK + ACK response received/transmitted + interrupt + 5 + 1 + + + XACTERR + Transaction error + 7 + 1 + + + BBLERR + Babble error + 8 + 1 + + + FRMOVRUN + Frame overrun + 9 + 1 + + + DTGLERR + Data toggle error + 10 + 1 + + + + + HCINT9 + HCINT9 + OTGFS host channel-9 interrupt register + (OTGFS_HCINT9) + 0x228 + 0x20 + read-write + 0x00000000 + + + XFERC + Transfer completed + 0 + 1 + + + CHHLTD + Channel halted + 1 + 1 + + + STALL + STALL response received + interrupt + 3 + 1 + + + NAK + NAK response received + interrupt + 4 + 1 + + + ACK + ACK response received/transmitted + interrupt + 5 + 1 + + + XACTERR + Transaction error + 7 + 1 + + + BBLERR + Babble error + 8 + 1 + + + FRMOVRUN + Frame overrun + 9 + 1 + + + DTGLERR + Data toggle error + 10 + 1 + + + + + HCINT10 + HCINT10 + OTGFS host channel-10 interrupt register + (OTGFS_HCINT10) + 0x248 + 0x20 + read-write + 0x00000000 + + + XFERC + Transfer completed + 0 + 1 + + + CHHLTD + Channel halted + 1 + 1 + + + STALL + STALL response received + interrupt + 3 + 1 + + + NAK + NAK response received + interrupt + 4 + 1 + + + ACK + ACK response received/transmitted + interrupt + 5 + 1 + + + XACTERR + Transaction error + 7 + 1 + + + BBLERR + Babble error + 8 + 1 + + + FRMOVRUN + Frame overrun + 9 + 1 + + + DTGLERR + Data toggle error + 10 + 1 + + + + + HCINT11 + HCINT11 + OTGFS host channel-11 interrupt register + (OTGFS_HCINT11) + 0x268 + 0x20 + read-write + 0x00000000 + + + XFERC + Transfer completed + 0 + 1 + + + CHHLTD + Channel halted + 1 + 1 + + + STALL + STALL response received + interrupt + 3 + 1 + + + NAK + NAK response received + interrupt + 4 + 1 + + + ACK + ACK response received/transmitted + interrupt + 5 + 1 + + + XACTERR + Transaction error + 7 + 1 + + + BBLERR + Babble error + 8 + 1 + + + FRMOVRUN + Frame overrun + 9 + 1 + + + DTGLERR + Data toggle error + 10 + 1 + + + + + HCINT12 + HCINT12 + OTGFS host channel-12 interrupt register + (OTGFS_HCINT12) + 0x288 + 0x20 + read-write + 0x00000000 + + + XFERC + Transfer completed + 0 + 1 + + + CHHLTD + Channel halted + 1 + 1 + + + STALL + STALL response received + interrupt + 3 + 1 + + + NAK + NAK response received + interrupt + 4 + 1 + + + ACK + ACK response received/transmitted + interrupt + 5 + 1 + + + XACTERR + Transaction error + 7 + 1 + + + BBLERR + Babble error + 8 + 1 + + + FRMOVRUN + Frame overrun + 9 + 1 + + + DTGLERR + Data toggle error + 10 + 1 + + + + + HCINT13 + HCINT13 + OTGFS host channel-13 interrupt register + (OTGFS_HCINT13) + 0x2A8 + 0x20 + read-write + 0x00000000 + + + XFERC + Transfer completed + 0 + 1 + + + CHHLTD + Channel halted + 1 + 1 + + + STALL + STALL response received + interrupt + 3 + 1 + + + NAK + NAK response received + interrupt + 4 + 1 + + + ACK + ACK response received/transmitted + interrupt + 5 + 1 + + + XACTERR + Transaction error + 7 + 1 + + + BBLERR + Babble error + 8 + 1 + + + FRMOVRUN + Frame overrun + 9 + 1 + + + DTGLERR + Data toggle error + 10 + 1 + + + + + HCINT14 + HCINT14 + OTGFS host channel-14 interrupt register + (OTGFS_HCINT14) + 0x2C8 + 0x20 + read-write + 0x00000000 + + + XFERC + Transfer completed + 0 + 1 + + + CHHLTD + Channel halted + 1 + 1 + + + STALL + STALL response received + interrupt + 3 + 1 + + + NAK + NAK response received + interrupt + 4 + 1 + + + ACK + ACK response received/transmitted + interrupt + 5 + 1 + + + XACTERR + Transaction error + 7 + 1 + + + BBLERR + Babble error + 8 + 1 + + + FRMOVRUN + Frame overrun + 9 + 1 + + + DTGLERR + Data toggle error + 10 + 1 + + + + + HCINT15 + HCINT15 + OTGFS host channel-15 interrupt register + (OTGFS_HCINT15) + 0x2E8 + 0x20 + read-write + 0x00000000 + + + XFERC + Transfer completed + 0 + 1 + + + CHHLTD + Channel halted + 1 + 1 + + + STALL + STALL response received + interrupt + 3 + 1 + + + NAK + NAK response received + interrupt + 4 + 1 + + + ACK + ACK response received/transmitted + interrupt + 5 + 1 + + + XACTERR + Transaction error + 7 + 1 + + + BBLERR + Babble error + 8 + 1 + + + FRMOVRUN + Frame overrun + 9 + 1 + + + DTGLERR + Data toggle error + 10 + 1 + + + + + HCINTMSK0 + HCINTMSK0 + OTGFS host channel-0 mask register + (OTGFS_HCINTMSK0) + 0x10C + 0x20 + read-write + 0x00000000 + + + XFERCMSK + Transfer completed mask + 0 + 1 + + + CHHLTDMSK + Channel halted mask + 1 + 1 + + + STALLMSK + STALL response received interrupt + mask + 3 + 1 + + + NAKMSK + NAK response received interrupt + mask + 4 + 1 + + + ACKMSK + ACK response received/transmitted + interrupt mask + 5 + 1 + + + XACTERRMSK + Transaction error mask + 7 + 1 + + + BBLERRMSK + Babble error mask + 8 + 1 + + + FRMOVRUNMSK + Frame overrun mask + 9 + 1 + + + DTGLERRMSK + Data toggle error mask + 10 + 1 + + + + + HCINTMSK1 + HCINTMSK1 + OTGFS host channel-1 mask register + (OTGFS_HCINTMSK1) + 0x12C + 0x20 + read-write + 0x00000000 + + + XFERCMSK + Transfer completed mask + 0 + 1 + + + CHHLTDMSK + Channel halted mask + 1 + 1 + + + STALLMSK + STALL response received interrupt + mask + 3 + 1 + + + NAKMSK + NAK response received interrupt + mask + 4 + 1 + + + ACKMSK + ACK response received/transmitted + interrupt mask + 5 + 1 + + + XACTERRMSK + Transaction error mask + 7 + 1 + + + BBLERRMSK + Babble error mask + 8 + 1 + + + FRMOVRUNMSK + Frame overrun mask + 9 + 1 + + + DTGLERRMSK + Data toggle error mask + 10 + 1 + + + + + HCINTMSK2 + HCINTMSK2 + OTGFS host channel-2 mask register + (OTGFS_HCINTMSK2) + 0x14C + 0x20 + read-write + 0x00000000 + + + XFERCMSK + Transfer completed mask + 0 + 1 + + + CHHLTDMSK + Channel halted mask + 1 + 1 + + + STALLMSK + STALL response received interrupt + mask + 3 + 1 + + + NAKMSK + NAK response received interrupt + mask + 4 + 1 + + + ACKMSK + ACK response received/transmitted + interrupt mask + 5 + 1 + + + XACTERRMSK + Transaction error mask + 7 + 1 + + + BBLERRMSK + Babble error mask + 8 + 1 + + + FRMOVRUNMSK + Frame overrun mask + 9 + 1 + + + DTGLERRMSK + Data toggle error mask + 10 + 1 + + + + + HCINTMSK3 + HCINTMSK3 + OTGFS host channel-3 mask register + (OTGFS_HCINTMSK3) + 0x16C + 0x20 + read-write + 0x00000000 + + + XFERCMSK + Transfer completed mask + 0 + 1 + + + CHHLTDMSK + Channel halted mask + 1 + 1 + + + STALLMSK + STALL response received interrupt + mask + 3 + 1 + + + NAKMSK + NAK response received interrupt + mask + 4 + 1 + + + ACKMSK + ACK response received/transmitted + interrupt mask + 5 + 1 + + + XACTERRMSK + Transaction error mask + 7 + 1 + + + BBLERRMSK + Babble error mask + 8 + 1 + + + FRMOVRUNMSK + Frame overrun mask + 9 + 1 + + + DTGLERRMSK + Data toggle error mask + 10 + 1 + + + + + HCINTMSK4 + HCINTMSK4 + OTGFS host channel-4 mask register + (OTGFS_HCINTMSK4) + 0x18C + 0x20 + read-write + 0x00000000 + + + XFERCMSK + Transfer completed mask + 0 + 1 + + + CHHLTDMSK + Channel halted mask + 1 + 1 + + + STALLMSK + STALL response received interrupt + mask + 3 + 1 + + + NAKMSK + NAK response received interrupt + mask + 4 + 1 + + + ACKMSK + ACK response received/transmitted + interrupt mask + 5 + 1 + + + XACTERRMSK + Transaction error mask + 7 + 1 + + + BBLERRMSK + Babble error mask + 8 + 1 + + + FRMOVRUNMSK + Frame overrun mask + 9 + 1 + + + DTGLERRMSK + Data toggle error mask + 10 + 1 + + + + + HCINTMSK5 + HCINTMSK5 + OTGFS host channel-5 mask register + (OTGFS_HCINTMSK5) + 0x1AC + 0x20 + read-write + 0x00000000 + + + XFERCMSK + Transfer completed mask + 0 + 1 + + + CHHLTDMSK + Channel halted mask + 1 + 1 + + + STALLMSK + STALL response received interrupt + mask + 3 + 1 + + + NAKMSK + NAK response received interrupt + mask + 4 + 1 + + + ACKMSK + ACK response received/transmitted + interrupt mask + 5 + 1 + + + XACTERRMSK + Transaction error mask + 7 + 1 + + + BBLERRMSK + Babble error mask + 8 + 1 + + + FRMOVRUNMSK + Frame overrun mask + 9 + 1 + + + DTGLERRMSK + Data toggle error mask + 10 + 1 + + + + + HCINTMSK6 + HCINTMSK6 + OTGFS host channel-6 mask register + (OTGFS_HCINTMSK6) + 0x1CC + 0x20 + read-write + 0x00000000 + + + XFERCMSK + Transfer completed mask + 0 + 1 + + + CHHLTDMSK + Channel halted mask + 1 + 1 + + + STALLMSK + STALL response received interrupt + mask + 3 + 1 + + + NAKMSK + NAK response received interrupt + mask + 4 + 1 + + + ACKMSK + ACK response received/transmitted + interrupt mask + 5 + 1 + + + XACTERRMSK + Transaction error mask + 7 + 1 + + + BBLERRMSK + Babble error mask + 8 + 1 + + + FRMOVRUNMSK + Frame overrun mask + 9 + 1 + + + DTGLERRMSK + Data toggle error mask + 10 + 1 + + + + + HCINTMSK7 + HCINTMSK7 + OTGFS host channel-7 mask register + (OTGFS_HCINTMSK7) + 0x1EC + 0x20 + read-write + 0x00000000 + + + XFERCMSK + Transfer completed mask + 0 + 1 + + + CHHLTDMSK + Channel halted mask + 1 + 1 + + + STALLMSK + STALL response received interrupt + mask + 3 + 1 + + + NAKMSK + NAK response received interrupt + mask + 4 + 1 + + + ACKMSK + ACK response received/transmitted + interrupt mask + 5 + 1 + + + XACTERRMSK + Transaction error mask + 7 + 1 + + + BBLERRMSK + Babble error mask + 8 + 1 + + + FRMOVRUNMSK + Frame overrun mask + 9 + 1 + + + DTGLERRMSK + Data toggle error mask + 10 + 1 + + + + + HCINTMSK8 + HCINTMSK8 + OTGFS host channel-8 mask register + (OTGFS_HCINTMSK8) + 0x20C + 0x20 + read-write + 0x00000000 + + + XFERCMSK + Transfer completed mask + 0 + 1 + + + CHHLTDMSK + Channel halted mask + 1 + 1 + + + STALLMSK + STALL response received interrupt + mask + 3 + 1 + + + NAKMSK + NAK response received interrupt + mask + 4 + 1 + + + ACKMSK + ACK response received/transmitted + interrupt mask + 5 + 1 + + + XACTERRMSK + Transaction error mask + 7 + 1 + + + BBLERRMSK + Babble error mask + 8 + 1 + + + FRMOVRUNMSK + Frame overrun mask + 9 + 1 + + + DTGLERRMSK + Data toggle error mask + 10 + 1 + + + + + HCINTMSK9 + HCINTMSK9 + OTGFS host channel-9 mask register + (OTGFS_HCINTMSK9) + 0x22C + 0x20 + read-write + 0x00000000 + + + XFERCMSK + Transfer completed mask + 0 + 1 + + + CHHLTDMSK + Channel halted mask + 1 + 1 + + + STALLMSK + STALL response received interrupt + mask + 3 + 1 + + + NAKMSK + NAK response received interrupt + mask + 4 + 1 + + + ACKMSK + ACK response received/transmitted + interrupt mask + 5 + 1 + + + XACTERRMSK + Transaction error mask + 7 + 1 + + + BBLERRMSK + Babble error mask + 8 + 1 + + + FRMOVRUNMSK + Frame overrun mask + 9 + 1 + + + DTGLERRMSK + Data toggle error mask + 10 + 1 + + + + + HCINTMSK10 + HCINTMSK10 + OTGFS host channel-10 mask register + (OTGFS_HCINTMSK10) + 0x24C + 0x20 + read-write + 0x00000000 + + + XFERCMSK + Transfer completed mask + 0 + 1 + + + CHHLTDMSK + Channel halted mask + 1 + 1 + + + STALLMSK + STALL response received interrupt + mask + 3 + 1 + + + NAKMSK + NAK response received interrupt + mask + 4 + 1 + + + ACKMSK + ACK response received/transmitted + interrupt mask + 5 + 1 + + + XACTERRMSK + Transaction error mask + 7 + 1 + + + BBLERRMSK + Babble error mask + 8 + 1 + + + FRMOVRUNMSK + Frame overrun mask + 9 + 1 + + + DTGLERRMSK + Data toggle error mask + 10 + 1 + + + + + HCINTMSK11 + HCINTMSK11 + OTGFS host channel-11 mask register + (OTGFS_HCINTMSK11) + 0x26C + 0x20 + read-write + 0x00000000 + + + XFERCMSK + Transfer completed mask + 0 + 1 + + + CHHLTDMSK + Channel halted mask + 1 + 1 + + + STALLMSK + STALL response received interrupt + mask + 3 + 1 + + + NAKMSK + NAK response received interrupt + mask + 4 + 1 + + + ACKMSK + ACK response received/transmitted + interrupt mask + 5 + 1 + + + XACTERRMSK + Transaction error mask + 7 + 1 + + + BBLERRMSK + Babble error mask + 8 + 1 + + + FRMOVRUNMSK + Frame overrun mask + 9 + 1 + + + DTGLERRMSK + Data toggle error mask + 10 + 1 + + + + + HCINTMSK12 + HCINTMSK12 + OTGFS host channel-12 mask register + (OTGFS_HCINTMSK12) + 0x28C + 0x20 + read-write + 0x00000000 + + + XFERCMSK + Transfer completed mask + 0 + 1 + + + CHHLTDMSK + Channel halted mask + 1 + 1 + + + STALLMSK + STALL response received interrupt + mask + 3 + 1 + + + NAKMSK + NAK response received interrupt + mask + 4 + 1 + + + ACKMSK + ACK response received/transmitted + interrupt mask + 5 + 1 + + + XACTERRMSK + Transaction error mask + 7 + 1 + + + BBLERRMSK + Babble error mask + 8 + 1 + + + FRMOVRUNMSK + Frame overrun mask + 9 + 1 + + + DTGLERRMSK + Data toggle error mask + 10 + 1 + + + + + HCINTMSK13 + HCINTMSK13 + OTGFS host channel-13 mask register + (OTGFS_HCINTMSK13) + 0x2AC + 0x20 + read-write + 0x00000000 + + + XFERCMSK + Transfer completed mask + 0 + 1 + + + CHHLTDMSK + Channel halted mask + 1 + 1 + + + STALLMSK + STALL response received interrupt + mask + 3 + 1 + + + NAKMSK + NAK response received interrupt + mask + 4 + 1 + + + ACKMSK + ACK response received/transmitted + interrupt mask + 5 + 1 + + + XACTERRMSK + Transaction error mask + 7 + 1 + + + BBLERRMSK + Babble error mask + 8 + 1 + + + FRMOVRUNMSK + Frame overrun mask + 9 + 1 + + + DTGLERRMSK + Data toggle error mask + 10 + 1 + + + + + HCINTMSK14 + HCINTMSK14 + OTGFS host channel-14 mask register + (OTGFS_HCINTMSK14) + 0x2CC + 0x20 + read-write + 0x00000000 + + + XFERCMSK + Transfer completed mask + 0 + 1 + + + CHHLTDMSK + Channel halted mask + 1 + 1 + + + STALLMSK + STALL response received interrupt + mask + 3 + 1 + + + NAKMSK + NAK response received interrupt + mask + 4 + 1 + + + ACKMSK + ACK response received/transmitted + interrupt mask + 5 + 1 + + + XACTERRMSK + Transaction error mask + 7 + 1 + + + BBLERRMSK + Babble error mask + 8 + 1 + + + FRMOVRUNMSK + Frame overrun mask + 9 + 1 + + + DTGLERRMSK + Data toggle error mask + 10 + 1 + + + + + HCINTMSK15 + HCINTMSK15 + OTGFS host channel-15 mask register + (OTGFS_HCINTMSK15) + 0x2EC + 0x20 + read-write + 0x00000000 + + + XFERCMSK + Transfer completed mask + 0 + 1 + + + CHHLTDMSK + Channel halted mask + 1 + 1 + + + STALLMSK + STALL response received interrupt + mask + 3 + 1 + + + NAKMSK + NAK response received interrupt + mask + 4 + 1 + + + ACKMSK + ACK response received/transmitted + interrupt mask + 5 + 1 + + + XACTERRMSK + Transaction error mask + 7 + 1 + + + BBLERRMSK + Babble error mask + 8 + 1 + + + FRMOVRUNMSK + Frame overrun mask + 9 + 1 + + + DTGLERRMSK + Data toggle error mask + 10 + 1 + + + + + HCTSIZ0 + HCTSIZ0 + OTGFS host channel-0 transfer size + register + 0x110 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + PID + PID + 29 + 2 + + + + + HCTSIZ1 + HCTSIZ1 + OTGFS host channel-1 transfer size + register + 0x130 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + PID + PID + 29 + 2 + + + + + HCTSIZ2 + HCTSIZ2 + OTGFS host channel-2 transfer size + register + 0x150 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + PID + PID + 29 + 2 + + + + + HCTSIZ3 + HCTSIZ3 + OTGFS host channel-3 transfer size + register + 0x170 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + PID + PID + 29 + 2 + + + + + HCTSIZ4 + HCTSIZ4 + OTGFS host channel-4 transfer size + register + 0x190 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + PID + PID + 29 + 2 + + + + + HCTSIZ5 + HCTSIZ5 + OTGFS host channel-5 transfer size + register + 0x1B0 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + PID + PID + 29 + 2 + + + + + HCTSIZ6 + HCTSIZ6 + OTGFS host channel-6 transfer size + register + 0x1D0 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + PID + PID + 29 + 2 + + + + + HCTSIZ7 + HCTSIZ7 + OTGFS host channel-7 transfer size + register + 0x1F0 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + PID + PID + 29 + 2 + + + + + HCTSIZ8 + HCTSIZ8 + OTGFS host channel-8 transfer size + register + 0x210 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + PID + PID + 29 + 2 + + + + + HCTSIZ9 + HCTSIZ9 + OTGFS host channel-9 transfer size + register + 0x230 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + PID + PID + 29 + 2 + + + + + HCTSIZ10 + HCTSIZ10 + OTGFS host channel-10 transfer size + register + 0x250 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + PID + PID + 29 + 2 + + + + + HCTSIZ11 + HCTSIZ11 + OTGFS host channel-11 transfer size + register + 0x270 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + PID + PID + 29 + 2 + + + + + HCTSIZ12 + HCTSIZ12 + OTGFS host channel-12 transfer size + register + 0x290 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + PID + PID + 29 + 2 + + + + + HCTSIZ13 + HCTSIZ13 + OTGFS host channel-13 transfer size + register + 0x2B0 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + PID + PID + 29 + 2 + + + + + HCTSIZ14 + HCTSIZ14 + OTGFS host channel-14 transfer size + register + 0x2D0 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + PID + PID + 29 + 2 + + + + + HCTSIZ15 + HCTSIZ15 + OTGFS host channel-15 transfer size + register + 0x2F0 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + PID + PID + 29 + 2 + + + + + + + USB_OTG2_DEVICE + USB on the go full speed + USB_OTG2 + 0x40040800 + + 0x0 + 0x400 + registers + + + + DCFG + DCFG + OTGFS device configuration register + (OTGFS_DCFG) + 0x0 + 0x20 + read-write + 0x02200000 + + + DEVSPD + Device speed + 0 + 2 + + + NZSTSOUTHSHK + Non-zero-length status OUT + handshake + 2 + 1 + + + DEVADDR + Device address + 4 + 7 + + + PERFRINT + Periodic frame interval + 11 + 2 + + + + + DCTL + DCTL + OTGFS device control register + (OTGFS_DCTL) + 0x4 + 0x20 + 0x00000000 + + + RWKUPSIG + Remote wakeup signaling + 0 + 1 + read-write + + + SFTDISCON + Soft disconnect + 1 + 1 + read-write + + + GNPINNAKSTS + Global IN NAK status + 2 + 1 + read-only + + + GOUTNAKSTS + Global OUT NAK status + 3 + 1 + read-only + + + TSTCTL + Test control + 4 + 3 + read-write + + + SGNPINNAK + Set global IN NAK + 7 + 1 + read-write + + + CGNPINNAK + Clear global IN NAK + 8 + 1 + read-write + + + SGOUTNAK + Set global OUT NAK + 9 + 1 + read-write + + + CGOUTNAK + Clear global OUT NAK + 10 + 1 + read-write + + + PWROPRGDNE + Power-on programming done + 11 + 1 + read-write + + + + + DSTS + DSTS + OTGFS device status register + (OTGFS_DSTS) + 0x8 + 0x20 + read-only + 0x00000010 + + + SUSPSTS + Suspend status + 0 + 1 + + + ENUMSPD + Enumerated speed + 1 + 2 + + + ETICERR + Erratic error + 3 + 1 + + + SOFFN + Frame number of the received + SOF + 8 + 14 + + + + + DIEPMSK + DIEPMSK + OTGFS device IN endpoint common interrupt + mask register (OTGFS_DIEPMSK) + 0x10 + 0x20 + read-write + 0x00000000 + + + XFERCMSK + Transfer completed interrupt + mask + 0 + 1 + + + EPTDISMSK + Endpoint disabled interrupt + mask + 1 + 1 + + + TIMEOUTMSK + Timeout condition mask (Non-isochronous + endpoints) + 3 + 1 + + + INTKNTXFEMPMSK + IN token received when TxFIFO empty + mask + 4 + 1 + + + INTKNEPTMISMSK + IN token received with EP mismatch + mask + 5 + 1 + + + INEPTNAKMSK + IN endpoint NAK effective + mask + 6 + 1 + + + TXFIFOUDRMSK + FIFO underrun + mask + 8 + 1 + + + BNAINMSK + BNA interrupt + mask + 9 + 1 + + + + + DOEPMSK + DOEPMSK + OTGFS device OUT endpoint common interrupt + mask register (OTGFS_DOEPMSK) + 0x14 + 0x20 + read-write + 0x00000000 + + + XFERCMSK + Transfer completed interrupt + mask + 0 + 1 + + + EPTDISMSK + Endpoint disabled interrupt + mask + 1 + 1 + + + SETUPMSK + SETUP phase done mask + 3 + 1 + + + OUTTEPDMSK + OUT token received when endpoint + disabled mask + 4 + 1 + + + B2BSETUPMSK + Back-to-back SETUP packets + received mask + 6 + 1 + + + OUTPERRMSK + OUT packet error + mask + 8 + 1 + + + BNAOUTMSK + BNA interrupt + mask + 9 + 1 + + + + + DAINT + DAINT + OTGFS device all endpoints interrupt + register (OTGFS_DAINT) + 0x18 + 0x20 + read-only + 0x00000000 + + + INEPTINT + IN endpoint interrupt bits + 0 + 16 + + + OUTEPTINT + OUT endpoint interrupt + bits + 16 + 16 + + + + + DAINTMSK + DAINTMSK + OTGFS all endpoints interrupt mask register + (OTGFS_DAINTMSK) + 0x1C + 0x20 + read-write + 0x00000000 + + + INEPTMSK + IN EP interrupt mask bits + 0 + 16 + + + OUTEPTMSK + OUT endpoint interrupt + bits + 16 + 16 + + + + + DIEPEMPMSK + DIEPEMPMSK + OTGFS device IN endpoint FIFO empty + interrupt mask register + 0x34 + 0x20 + read-write + 0x00000000 + + + INEPTXFEMSK + IN EP Tx FIFO empty interrupt mask + bits + 0 + 16 + + + + + DIEPCTL0 + DIEPCTL0 + OTGFS device control IN endpoint 0 control + register (OTGFS_DIEPCTL0) + 0x100 + 0x20 + 0x00000000 + + + MPS + Maximum packet size + 0 + 2 + read-write + + + USBACEPT + USB active endpoint + 15 + 1 + read-only + + + NAKSTS + NAK status + 17 + 1 + read-only + + + EPTYPE + Endpoint type + 18 + 2 + read-only + + + STALL + STALL handshake + 21 + 1 + read-write + + + TXFNUM + TxFIFO number + 22 + 4 + read-write + + + CNAK + Clear NAK + 26 + 1 + write-only + + + SNAK + Set NAK + 27 + 1 + write-only + + + EPTDIS + Endpoint disable + 30 + 1 + read-only + + + EPTENA + Endpoint enable + 31 + 1 + read-only + + + + + DIEPCTL1 + DIEPCTL1 + OTGFS device IN endpoint-1 control + register + 0x120 + 0x20 + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + read-write + + + USBACEPT + USB active endpoint + 15 + 1 + read-write + + + DPID + Endpoint Data PID + 16 + 1 + read-only + + + NAKSTS + NAK status + 17 + 1 + read-only + + + EPTYPE + Endpoint type + 18 + 2 + read-write + + + STALL + STALL handshake + 21 + 1 + read-write + + + TXFNUM + TxFIFO number + 22 + 4 + read-write + + + CNAK + Clear NAK + 26 + 1 + write-only + + + SNAK + Set NAK + 27 + 1 + write-only + + + SETD0PID + Set DATA0 PID + 28 + 1 + write-only + + + SETD1PID + Set DATA1 PID + 29 + 1 + write-only + + + EPTDIS + Endpoint disable + 30 + 1 + read-write + + + EPTENA + Endpoint enable + 31 + 1 + read-write + + + + + DIEPCTL2 + DIEPCTL2 + OTGFS device IN endpoint-2 control + register + 0x140 + 0x20 + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + read-write + + + USBACEPT + USB active endpoint + 15 + 1 + read-write + + + DPID + Endpoint Data PID + 16 + 1 + read-only + + + NAKSTS + NAK status + 17 + 1 + read-only + + + EPTYPE + Endpoint type + 18 + 2 + read-write + + + STALL + STALL handshake + 21 + 1 + read-write + + + TXFNUM + TxFIFO number + 22 + 4 + read-write + + + CNAK + Clear NAK + 26 + 1 + write-only + + + SNAK + Set NAK + 27 + 1 + write-only + + + SETD0PID + Set DATA0 PID + 28 + 1 + write-only + + + SETD1PID + Set DATA1 PID + 29 + 1 + write-only + + + EPTDIS + Endpoint disable + 30 + 1 + read-write + + + EPTENA + Endpoint enable + 31 + 1 + read-write + + + + + DIEPCTL3 + DIEPCTL3 + OTGFS device IN endpoint-3 control + register + 0x160 + 0x20 + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + read-write + + + USBACEPT + USB active endpoint + 15 + 1 + read-write + + + DPID + Endpoint Data PID + 16 + 1 + read-only + + + NAKSTS + NAK status + 17 + 1 + read-only + + + EPTYPE + Endpoint type + 18 + 2 + read-write + + + STALL + STALL handshake + 21 + 1 + read-write + + + TXFNUM + TxFIFO number + 22 + 4 + read-write + + + CNAK + Clear NAK + 26 + 1 + write-only + + + SNAK + Set NAK + 27 + 1 + write-only + + + SETD0PID + Set DATA0 PID + 28 + 1 + write-only + + + SETD1PID + Set DATA1 PID + 29 + 1 + write-only + + + EPTDIS + Endpoint disable + 30 + 1 + read-write + + + EPTENA + Endpoint enable + 31 + 1 + read-write + + + + + DIEPCTL4 + DIEPCTL4 + OTGFS device IN endpoint-4 control + register + 0x180 + 0x20 + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + read-write + + + USBACEPT + USB active endpoint + 15 + 1 + read-write + + + DPID + Endpoint Data PID + 16 + 1 + read-only + + + NAKSTS + NAK status + 17 + 1 + read-only + + + EPTYPE + Endpoint type + 18 + 2 + read-write + + + STALL + STALL handshake + 21 + 1 + read-write + + + TXFNUM + TxFIFO number + 22 + 4 + read-write + + + CNAK + Clear NAK + 26 + 1 + write-only + + + SNAK + Set NAK + 27 + 1 + write-only + + + SETD0PID + Set DATA0 PID + 28 + 1 + write-only + + + SETD1PID + Set DATA1 PID + 29 + 1 + write-only + + + EPTDIS + Endpoint disable + 30 + 1 + read-write + + + EPTENA + Endpoint enable + 31 + 1 + read-write + + + + + DIEPCTL5 + DIEPCTL5 + OTGFS device IN endpoint-5 control + register + 0x1A0 + 0x20 + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + read-write + + + USBACEPT + USB active endpoint + 15 + 1 + read-write + + + DPID + Endpoint Data PID + 16 + 1 + read-only + + + NAKSTS + NAK status + 17 + 1 + read-only + + + EPTYPE + Endpoint type + 18 + 2 + read-write + + + STALL + STALL handshake + 21 + 1 + read-write + + + TXFNUM + TxFIFO number + 22 + 4 + read-write + + + CNAK + Clear NAK + 26 + 1 + write-only + + + SNAK + Set NAK + 27 + 1 + write-only + + + SETD0PID + Set DATA0 PID + 28 + 1 + write-only + + + SETD1PID + Set DATA1 PID + 29 + 1 + write-only + + + EPTDIS + Endpoint disable + 30 + 1 + read-write + + + EPTENA + Endpoint enable + 31 + 1 + read-write + + + + + DIEPCTL6 + DIEPCTL6 + OTGFS device IN endpoint-6 control + register + 0x1C0 + 0x20 + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + read-write + + + USBACEPT + USB active endpoint + 15 + 1 + read-write + + + DPID + Endpoint Data PID + 16 + 1 + read-only + + + NAKSTS + NAK status + 17 + 1 + read-only + + + EPTYPE + Endpoint type + 18 + 2 + read-write + + + STALL + STALL handshake + 21 + 1 + read-write + + + TXFNUM + TxFIFO number + 22 + 4 + read-write + + + CNAK + Clear NAK + 26 + 1 + write-only + + + SNAK + Set NAK + 27 + 1 + write-only + + + SETD0PID + Set DATA0 PID + 28 + 1 + write-only + + + SETD1PID + Set DATA1 PID + 29 + 1 + write-only + + + EPTDIS + Endpoint disable + 30 + 1 + read-write + + + EPTENA + Endpoint enable + 31 + 1 + read-write + + + + + DIEPCTL7 + DIEPCTL7 + OTGFS device IN endpoint-7 control + register + 0x1E0 + 0x20 + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + read-write + + + USBACEPT + USB active endpoint + 15 + 1 + read-write + + + DPID + Endpoint Data PID + 16 + 1 + read-only + + + NAKSTS + NAK status + 17 + 1 + read-only + + + EPTYPE + Endpoint type + 18 + 2 + read-write + + + STALL + STALL handshake + 21 + 1 + read-write + + + TXFNUM + TxFIFO number + 22 + 4 + read-write + + + CNAK + Clear NAK + 26 + 1 + write-only + + + SNAK + Set NAK + 27 + 1 + write-only + + + SETD0PID + Set DATA0 PID + 28 + 1 + write-only + + + SETD1PID + Set DATA1 PID + 29 + 1 + write-only + + + EPTDIS + Endpoint disable + 30 + 1 + read-write + + + EPTENA + Endpoint enable + 31 + 1 + read-write + + + + + DOEPCTL0 + DOEPCTL0 + OTGFS device OUT endpoint-0 control + register + 0x300 + 0x20 + 0x00008000 + + + MPS + Maximum packet size + 0 + 2 + read-only + + + USBACEPT + USB active endpoint + 15 + 1 + read-only + + + NAKSTS + NAK status + 17 + 1 + read-only + + + EPTYPE + Endpoint type + 18 + 2 + read-only + + + SNP + Snoop mode + 20 + 1 + read-write + + + STALL + STALL handshake + 21 + 1 + read-write + + + CNAK + Clear NAK + 26 + 1 + write-only + + + SNAK + Set NAK + 27 + 1 + write-only + + + EPTDIS + Endpoint disable + 30 + 1 + read-write + + + EPTENA + Endpoint enable + 31 + 1 + read-write + + + + + DOEPCTL1 + DOEPCTL1 + OTGFS device OUT endpoint-1 control + register + 0x320 + 0x20 + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + read-write + + + USBACEPT + USB active endpoint + 15 + 1 + read-only + + + DPID + Endpoint data PID + 16 + 1 + read-only + + + NAKSTS + NAK status + 17 + 1 + read-only + + + EPTYPE + Endpoint type + 18 + 2 + read-only + + + SNP + Snoop mode + 20 + 1 + read-write + + + STALL + STALL handshake + 21 + 1 + read-write + + + CNAK + Clear NAK + 26 + 1 + write-only + + + SNAK + Set NAK + 27 + 1 + write-only + + + EPTDIS + Endpoint disable + 30 + 1 + read-write + + + EPTENA + Endpoint enable + 31 + 1 + read-write + + + + + DOEPCTL2 + DOEPCTL2 + OTGFS device OUT endpoint-2 control + register + 0x340 + 0x20 + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + read-write + + + USBACEPT + USB active endpoint + 15 + 1 + read-only + + + DPID + Endpoint data PID + 16 + 1 + read-only + + + NAKSTS + NAK status + 17 + 1 + read-only + + + EPTYPE + Endpoint type + 18 + 2 + read-only + + + SNP + Snoop mode + 20 + 1 + read-write + + + STALL + STALL handshake + 21 + 1 + read-write + + + CNAK + Clear NAK + 26 + 1 + write-only + + + SNAK + Set NAK + 27 + 1 + write-only + + + EPTDIS + Endpoint disable + 30 + 1 + read-write + + + EPTENA + Endpoint enable + 31 + 1 + read-write + + + + + DOEPCTL3 + DOEPCTL3 + OTGFS device OUT endpoint-3 control + register + 0x360 + 0x20 + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + read-write + + + USBACEPT + USB active endpoint + 15 + 1 + read-only + + + DPID + Endpoint data PID + 16 + 1 + read-only + + + NAKSTS + NAK status + 17 + 1 + read-only + + + EPTYPE + Endpoint type + 18 + 2 + read-only + + + SNP + Snoop mode + 20 + 1 + read-write + + + STALL + STALL handshake + 21 + 1 + read-write + + + CNAK + Clear NAK + 26 + 1 + write-only + + + SNAK + Set NAK + 27 + 1 + write-only + + + EPTDIS + Endpoint disable + 30 + 1 + read-write + + + EPTENA + Endpoint enable + 31 + 1 + read-write + + + + + DOEPCTL4 + DOEPCTL4 + OTGFS device OUT endpoint-4 control + register + 0x380 + 0x20 + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + read-write + + + USBACEPT + USB active endpoint + 15 + 1 + read-only + + + DPID + Endpoint data PID + 16 + 1 + read-only + + + NAKSTS + NAK status + 17 + 1 + read-only + + + EPTYPE + Endpoint type + 18 + 2 + read-only + + + SNP + Snoop mode + 20 + 1 + read-write + + + STALL + STALL handshake + 21 + 1 + read-write + + + CNAK + Clear NAK + 26 + 1 + write-only + + + SNAK + Set NAK + 27 + 1 + write-only + + + EPTDIS + Endpoint disable + 30 + 1 + read-write + + + EPTENA + Endpoint enable + 31 + 1 + read-write + + + + + DOEPCTL5 + DOEPCTL5 + OTGFS device OUT endpoint-5 control + register + 0x3A0 + 0x20 + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + read-write + + + USBACEPT + USB active endpoint + 15 + 1 + read-only + + + DPID + Endpoint data PID + 16 + 1 + read-only + + + NAKSTS + NAK status + 17 + 1 + read-only + + + EPTYPE + Endpoint type + 18 + 2 + read-only + + + SNP + Snoop mode + 20 + 1 + read-write + + + STALL + STALL handshake + 21 + 1 + read-write + + + CNAK + Clear NAK + 26 + 1 + write-only + + + SNAK + Set NAK + 27 + 1 + write-only + + + EPTDIS + Endpoint disable + 30 + 1 + read-write + + + EPTENA + Endpoint enable + 31 + 1 + read-write + + + + + DOEPCTL6 + DOEPCTL6 + OTGFS device OUT endpoint-6 control + register + 0x3C0 + 0x20 + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + read-write + + + USBACEPT + USB active endpoint + 15 + 1 + read-only + + + DPID + Endpoint data PID + 16 + 1 + read-only + + + NAKSTS + NAK status + 17 + 1 + read-only + + + EPTYPE + Endpoint type + 18 + 2 + read-only + + + SNP + Snoop mode + 20 + 1 + read-write + + + STALL + STALL handshake + 21 + 1 + read-write + + + CNAK + Clear NAK + 26 + 1 + write-only + + + SNAK + Set NAK + 27 + 1 + write-only + + + EPTDIS + Endpoint disable + 30 + 1 + read-write + + + EPTENA + Endpoint enable + 31 + 1 + read-write + + + + + DOEPCTL7 + DOEPCTL7 + OTGFS device OUT endpoint-7 control + register + 0x3E0 + 0x20 + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + read-write + + + USBACEPT + USB active endpoint + 15 + 1 + read-only + + + DPID + Endpoint data PID + 16 + 1 + read-only + + + NAKSTS + NAK status + 17 + 1 + read-only + + + EPTYPE + Endpoint type + 18 + 2 + read-only + + + SNP + Snoop mode + 20 + 1 + read-write + + + STALL + STALL handshake + 21 + 1 + read-write + + + CNAK + Clear NAK + 26 + 1 + write-only + + + SNAK + Set NAK + 27 + 1 + write-only + + + EPTDIS + Endpoint disable + 30 + 1 + read-write + + + EPTENA + Endpoint enable + 31 + 1 + read-write + + + + + DIEPINT0 + DIEPINT0 + OTGFS device IN endpoint-0 interrupt + register + 0x108 + 0x20 + 0x00000080 + + + XFERC + Transfer completed + interrupt + 0 + 1 + read-write + + + EPTDISD + Endpoint disabled + interrupt + 1 + 1 + read-write + + + TIMEOUT + Timeout condition + 3 + 1 + read-write + + + INTKNTXFEMP + IN token received when + TxFIFO is empty + 4 + 1 + read-write + + + INEPTNAK + IN endpoint NAK + effective + 6 + 1 + read-write + + + TXFEMP + Transmit FIFO + empty + 7 + 1 + read-only + + + + + DIEPINT1 + DIEPINT1 + OTGFS device IN endpoint-1 interrupt + register + 0x128 + 0x20 + 0x00000080 + + + XFERC + Transfer completed + interrupt + 0 + 1 + read-write + + + EPTDISD + Endpoint disabled + interrupt + 1 + 1 + read-write + + + TIMEOUT + Timeout condition + 3 + 1 + read-write + + + INTKNTXFEMP + IN token received when + TxFIFO is empty + 4 + 1 + read-write + + + INEPTNAK + IN endpoint NAK + effective + 6 + 1 + read-write + + + TXFEMP + Transmit FIFO + empty + 7 + 1 + read-only + + + + + DIEPINT2 + DIEPINT2 + OTGFS device IN endpoint-2 interrupt + register + 0x148 + 0x20 + 0x00000080 + + + XFERC + Transfer completed + interrupt + 0 + 1 + read-write + + + EPTDISD + Endpoint disabled + interrupt + 1 + 1 + read-write + + + TIMEOUT + Timeout condition + 3 + 1 + read-write + + + INTKNTXFEMP + IN token received when + TxFIFO is empty + 4 + 1 + read-write + + + INEPTNAK + IN endpoint NAK + effective + 6 + 1 + read-write + + + TXFEMP + Transmit FIFO + empty + 7 + 1 + read-only + + + + + DIEPINT3 + DIEPINT3 + OTGFS device IN endpoint-3 interrupt + register + 0x168 + 0x20 + 0x00000080 + + + XFERC + Transfer completed + interrupt + 0 + 1 + read-write + + + EPTDISD + Endpoint disabled + interrupt + 1 + 1 + read-write + + + TIMEOUT + Timeout condition + 3 + 1 + read-write + + + INTKNTXFEMP + IN token received when + TxFIFO is empty + 4 + 1 + read-write + + + INEPTNAK + IN endpoint NAK + effective + 6 + 1 + read-write + + + TXFEMP + Transmit FIFO + empty + 7 + 1 + read-only + + + + + DIEPINT4 + DIEPINT4 + OTGFS device IN endpoint-4 interrupt + register + 0x188 + 0x20 + 0x00000080 + + + XFERC + Transfer completed + interrupt + 0 + 1 + read-write + + + EPTDISD + Endpoint disabled + interrupt + 1 + 1 + read-write + + + TIMEOUT + Timeout condition + 3 + 1 + read-write + + + INTKNTXFEMP + IN token received when + TxFIFO is empty + 4 + 1 + read-write + + + INEPTNAK + IN endpoint NAK + effective + 6 + 1 + read-write + + + TXFEMP + Transmit FIFO + empty + 7 + 1 + read-only + + + + + DIEPINT5 + DIEPINT5 + OTGFS device IN endpoint-5 interrupt + register + 0x1A8 + 0x20 + 0x00000080 + + + XFERC + Transfer completed + interrupt + 0 + 1 + read-write + + + EPTDISD + Endpoint disabled + interrupt + 1 + 1 + read-write + + + TIMEOUT + Timeout condition + 3 + 1 + read-write + + + INTKNTXFEMP + IN token received when + TxFIFO is empty + 4 + 1 + read-write + + + INEPTNAK + IN endpoint NAK + effective + 6 + 1 + read-write + + + TXFEMP + Transmit FIFO + empty + 7 + 1 + read-only + + + + + DIEPINT6 + DIEPINT6 + OTGFS device IN endpoint-6 interrupt + register + 0x1C8 + 0x20 + 0x00000080 + + + XFERC + Transfer completed + interrupt + 0 + 1 + read-write + + + EPTDISD + Endpoint disabled + interrupt + 1 + 1 + read-write + + + TIMEOUT + Timeout condition + 3 + 1 + read-write + + + INTKNTXFEMP + IN token received when + TxFIFO is empty + 4 + 1 + read-write + + + INEPTNAK + IN endpoint NAK + effective + 6 + 1 + read-write + + + TXFEMP + Transmit FIFO + empty + 7 + 1 + read-only + + + + + DIEPINT7 + DIEPINT7 + OTGFS device IN endpoint-7 interrupt + register + 0x1E8 + 0x20 + 0x00000080 + + + XFERC + Transfer completed + interrupt + 0 + 1 + read-write + + + EPTDISD + Endpoint disabled + interrupt + 1 + 1 + read-write + + + TIMEOUT + Timeout condition + 3 + 1 + read-write + + + INTKNTXFEMP + IN token received when + TxFIFO is empty + 4 + 1 + read-write + + + INEPTNAK + IN endpoint NAK + effective + 6 + 1 + read-write + + + TXFEMP + Transmit FIFO + empty + 7 + 1 + read-only + + + + + DOEPINT0 + DOEPINT0 + OTGFS device OUT endpoint-0 interrupt + register + 0x308 + 0x20 + read-write + 0x00000080 + + + XFERC + Transfer completed interrupt + 0 + 1 + + + EPTDISD + Endpoint disabled interrupt + 1 + 1 + + + SETUP + SETUP phase done + 3 + 1 + + + OUTTEPD + OUT token received when + endpoint disabled + 4 + 1 + + + B2BSTUP + Back-to-back SETUP + packets received + 6 + 1 + + + + + DOEPINT1 + DOEPINT1 + OTGFS device OUT endpoint-1 interrupt + register + 0x328 + 0x20 + read-write + 0x00000080 + + + XFERC + Transfer completed interrupt + 0 + 1 + + + EPTDISD + Endpoint disabled interrupt + 1 + 1 + + + SETUP + SETUP phase done + 3 + 1 + + + OUTTEPD + OUT token received when + endpoint disabled + 4 + 1 + + + B2BSTUP + Back-to-back SETUP + packets received + 6 + 1 + + + + + DOEPINT2 + DOEPINT2 + OTGFS device OUT endpoint-2 interrupt + register + 0x348 + 0x20 + read-write + 0x00000080 + + + XFERC + Transfer completed interrupt + 0 + 1 + + + EPTDISD + Endpoint disabled interrupt + 1 + 1 + + + SETUP + SETUP phase done + 3 + 1 + + + OUTTEPD + OUT token received when + endpoint disabled + 4 + 1 + + + B2BSTUP + Back-to-back SETUP + packets received + 6 + 1 + + + + + DOEPINT3 + DOEPINT3 + OTGFS device OUT endpoint-3 interrupt + register + 0x368 + 0x20 + read-write + 0x00000080 + + + XFERC + Transfer completed interrupt + 0 + 1 + + + EPTDISD + Endpoint disabled interrupt + 1 + 1 + + + SETUP + SETUP phase done + 3 + 1 + + + OUTTEPD + OUT token received when + endpoint disabled + 4 + 1 + + + B2BSTUP + Back-to-back SETUP + packets received + 6 + 1 + + + + + DOEPINT4 + DOEPINT4 + OTGFS device OUT endpoint-4 interrupt + register + 0x388 + 0x20 + read-write + 0x00000080 + + + XFERC + Transfer completed interrupt + 0 + 1 + + + EPTDISD + Endpoint disabled interrupt + 1 + 1 + + + SETUP + SETUP phase done + 3 + 1 + + + OUTTEPD + OUT token received when + endpoint disabled + 4 + 1 + + + B2BSTUP + Back-to-back SETUP + packets received + 6 + 1 + + + + + DOEPINT5 + DOEPINT5 + OTGFS device OUT endpoint-5 interrupt + register + 0x3A8 + 0x20 + read-write + 0x00000080 + + + XFERC + Transfer completed interrupt + 0 + 1 + + + EPTDISD + Endpoint disabled interrupt + 1 + 1 + + + SETUP + SETUP phase done + 3 + 1 + + + OUTTEPD + OUT token received when + endpoint disabled + 4 + 1 + + + B2BSTUP + Back-to-back SETUP + packets received + 6 + 1 + + + + + DOEPINT6 + DOEPINT6 + OTGFS device OUT endpoint-6 interrupt + register + 0x3C8 + 0x20 + read-write + 0x00000080 + + + XFERC + Transfer completed interrupt + 0 + 1 + + + EPTDISD + Endpoint disabled interrupt + 1 + 1 + + + SETUP + SETUP phase done + 3 + 1 + + + OUTTEPD + OUT token received when + endpoint disabled + 4 + 1 + + + B2BSTUP + Back-to-back SETUP + packets received + 6 + 1 + + + + + DOEPINT7 + DOEPINT7 + OTGFS device OUT endpoint-7 interrupt + register + 0x3E8 + 0x20 + read-write + 0x00000080 + + + XFERC + Transfer completed interrupt + 0 + 1 + + + EPTDISD + Endpoint disabled interrupt + 1 + 1 + + + SETUP + SETUP phase done + 3 + 1 + + + OUTTEPD + OUT token received when + endpoint disabled + 4 + 1 + + + B2BSTUP + Back-to-back SETUP + packets received + 6 + 1 + + + + + DIEPTSIZ0 + DIEPTSIZ0 + OTGFS device IN endpoint-0 transfer size + register + 0x110 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 7 + + + PKTCNT + Packet count + 19 + 2 + + + + + DOEPTSIZ0 + DOEPTSIZ0 + OTGFS device OUT endpoint-0 transfer size + register + 0x310 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 7 + + + PKTCNT + Packet count + 19 + 1 + + + SETUPCNT + SETUP packet count + 29 + 2 + + + + + DIEPTSIZ1 + DIEPTSIZ1 + OTGFS device IN endpoint-1 transfer size + register + 0x130 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + MC + Multi count + 29 + 2 + + + + + DIEPTSIZ2 + DIEPTSIZ2 + OTGFS device IN endpoint-2 transfer size + register + 0x150 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + MC + Multi count + 29 + 2 + + + + + DIEPTSIZ3 + DIEPTSIZ3 + OTG device IN endpoint-3 transfer size + register + 0x170 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + MC + Multi count + 29 + 2 + + + + + DIEPTSIZ4 + DIEPTSIZ4 + OTG device IN endpoint-4 transfer size + register + 0x190 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + MC + Multi count + 29 + 2 + + + + + DIEPTSIZ5 + DIEPTSIZ5 + OTG device IN endpoint-5 transfer size + register + 0x1B0 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + MC + Multi count + 29 + 2 + + + + + DIEPTSIZ6 + DIEPTSIZ6 + OTG device IN endpoint-6 transfer size + register + 0x1D0 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + MC + Multi count + 29 + 2 + + + + + DIEPTSIZ7 + DIEPTSIZ7 + OTG device IN endpoint-7 transfer size + register + 0x1F0 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + MC + Multi count + 29 + 2 + + + + + DTXFSTS0 + DTXFSTS0 + OTGFS device IN endpoint-0 transmit FIFO + status register + 0x118 + 0x20 + read-only + 0x00000000 + + + INEPTXFSAV + IN endpoint TxFIFO space + available + 0 + 16 + + + + + DTXFSTS1 + DTXFSTS1 + OTGFS device IN endpoint-1 transmit FIFO + status register + 0x138 + 0x20 + read-only + 0x00000000 + + + INEPTXFSAV + IN endpoint TxFIFO space + available + 0 + 16 + + + + + DTXFSTS2 + DTXFSTS2 + OTGFS device IN endpoint-2 transmit FIFO + status register + 0x158 + 0x20 + read-only + 0x00000000 + + + INEPTXFSAV + IN endpoint TxFIFO space + available + 0 + 16 + + + + + DTXFSTS3 + DTXFSTS3 + OTGFS device IN endpoint-3 transmit FIFO + status register + 0x178 + 0x20 + read-only + 0x00000000 + + + INEPTXFSAV + IN endpoint TxFIFO space + available + 0 + 16 + + + + + DTXFSTS4 + DTXFSTS4 + OTGFS device IN endpoint-4 transmit FIFO + status register + 0x198 + 0x20 + read-only + 0x00000000 + + + INEPTXFSAV + IN endpoint TxFIFO space + available + 0 + 16 + + + + + DTXFSTS5 + DTXFSTS5 + OTGFS device IN endpoint-5 transmit FIFO + status register + 0x1B8 + 0x20 + read-only + 0x00000000 + + + INEPTXFSAV + IN endpoint TxFIFO space + available + 0 + 16 + + + + + DTXFSTS6 + DTXFSTS6 + OTGFS device IN endpoint-6 transmit FIFO + status register + 0x1D8 + 0x20 + read-only + 0x00000000 + + + INEPTXFSAV + IN endpoint TxFIFO space + available + 0 + 16 + + + + + DTXFSTS7 + DTXFSTS7 + OTGFS device IN endpoint-7 transmit FIFO + status register + 0x1F8 + 0x20 + read-only + 0x00000000 + + + INEPTXFSAV + IN endpoint TxFIFO space + available + 0 + 16 + + + + + DOEPTSIZ1 + DOEPTSIZ1 + OTGFS device OUT endpoint-1 transfer size + register + 0x330 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + RXDPID + Received data PID + 29 + 2 + + + + + DOEPTSIZ2 + DOEPTSIZ2 + OTGFS device OUT endpoint-2 transfer size + register + 0x350 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + RXDPID + Received data PID + 29 + 2 + + + + + DOEPTSIZ3 + DOEPTSIZ3 + OTGFS device OUT endpoint-3 transfer size + register + 0x370 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + RXDPID + Received data PID + 29 + 2 + + + + + DOEPTSIZ4 + DOEPTSIZ4 + OTGFS device OUT endpoint-4 transfer size + register + 0x390 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + RXDPID + Received data PID + 29 + 2 + + + + + DOEPTSIZ5 + DOEPTSIZ5 + OTGFS device OUT endpoint-5 transfer size + register + 0x3B0 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + RXDPID + Received data PID + 29 + 2 + + + + + DOEPTSIZ6 + DOEPTSIZ6 + OTGFS device OUT endpoint-6 transfer size + register + 0x3D0 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + RXDPID + Received data PID + 29 + 2 + + + + + DOEPTSIZ7 + DOEPTSIZ7 + OTGFS device OUT endpoint-7 transfer size + register + 0x3F0 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + RXDPID + Received data PID + 29 + 2 + + + + + + + USB_OTG2_PWRCLK + USB on the go full speed + USB_OTG2 + 0x40040E00 + + 0x0 + 0x400 + registers + + + + PCGCCTL + PCGCCTL + OTGFS power and clock gating control + register (OTGFS_PCGCCTL) + 0x0 + 0x20 + 0x00000000 + + + STOPPCLK + Stop PHY clock + 0 + 1 + read-write + + + SUSPENDM + PHY Suspended + 4 + 1 + read-only + + + + + + + SCFG + System configuration controller + SCFG + 0x40013800 + + 0x0 + 0x400 + registers + + + + CFG1 + CFG1 + configuration register 1 + 0x0 + 0x20 + read-write + 0x00000000 + + + MEM_MAP_SEL + Memory address mapping selection bits + 0 + 3 + + + IR_POL + IR output polarity selection + 5 + 1 + + + IR_SRC_SEL + IR signal source selection + 6 + 2 + + + SWAP_XMC + XMC address mapping swap + 10 + 2 + + + + + CFG2 + CFG2 + configuration register 2 + 0x4 + 0x20 + read-write + 0x00000000 + + + MII_RMII_SEL + MII or RMII selection + bits + 23 + 1 + + + + + EXINTC1 + EXINTC1 + external interrupt configuration register 1 + 0x8 + 0x20 + read-write + 0x0000 + + + EXINT3 + EXINT 3 configuration bits + 12 + 4 + + + EXINT2 + EXINT 2 configuration bits + 8 + 4 + + + EXINT1 + EXINT 1 configuration bits + 4 + 4 + + + EXINT0 + EXINT 0 configuration bits + 0 + 4 + + + + + EXINTC2 + EXINTC2 + external interrupt configuration register 2 + 0xC + 0x20 + read-write + 0x0000 + + + EXINT7 + EXINT 7 configuration bits + 12 + 4 + + + EXINT6 + EXINT 6 configuration bits + 8 + 4 + + + EXINT5 + EXINT 5 configuration bits + 4 + 4 + + + EXINT4 + EXINT 4 configuration bits + 0 + 4 + + + + + EXINTC3 + EXINTC3 + external interrupt configuration register 3 + 0x10 + 0x20 + read-write + 0x0000 + + + EXINT11 + EXINT 11 configuration bits + 12 + 4 + + + EXINT10 + EXINT 10 configuration bits + 8 + 4 + + + EXINT9 + EXINT 9 configuration bits + 4 + 4 + + + EXINT8 + EXINT 8 configuration bits + 0 + 4 + + + + + EXINTC4 + EXINTC4 + external interrupt configuration register + 4 + 0x14 + 0x20 + read-write + 0x0000 + + + EXINT15 + EXINT 15 configuration bits + 12 + 4 + + + EXINT14 + EXINT 14 configuration bits + 8 + 4 + + + EXINT13 + EXINT 13 configuration bits + 4 + 4 + + + EXINT12 + EXINT 12 configuration bits + 0 + 4 + + + + + UHDRV + UHDRV + Ultra high drive register + 0x2C + 0x20 + read-write + 0x0000 + + + PF15_UH + PF15 ultra high sourcing/sinking strength + 10 + 1 + + + PF14_UH + PF14 ultra high sourcing/sinking strength + 9 + 1 + + + PD15_UH + PD15 ultra high sourcing/sinking strength + 8 + 1 + + + PD14_UH + PD14 ultra high sourcing/sinking strength + 7 + 1 + + + PD13_UH + PD13 ultra high sourcing/sinking strength + 6 + 1 + + + PD12_UH + PD12 ultra high sourcing/sinking strength + 5 + 1 + + + PB10_UH + PB10 ultra high sourcing/sinking strength + 2 + 1 + + + PB9_UH + PB9 ultra high sourcing/sinking strength + 1 + 1 + + + PB3_UH + PB3 ultra high sourcing/sinking strength + 0 + 1 + + + + + + + QSPI1 + Quad SPI Controller + QSPI + 0xA0001000 + + 0x0 + 0x400 + registers + + + QSPI1 + QSPI1 global interrupt + 92 + + + + CMD_W0 + CMD_W0 + Command word 0 + 0x0 + 0x20 + read-write + 0x00000000 + + + SPIADR + SPI flash address + 0 + 32 + + + + + CMD_W1 + CMD_W1 + Command word 1 + 0x4 + 0x20 + read-write + 0x01000003 + + + ADRLEN + SPI address length + 0 + 3 + + + DUM2 + Second dummy state cycle + 16 + 8 + + + INSLEN + Instruction code length + 24 + 2 + + + PEMEN + Perfrmance enhance mode enable + 28 + 1 + + + + + CMD_W2 + CMD_W2 + Command word 2 + 0x8 + 0x20 + read-write + 0x01000003 + + + DCNT + Read write data counter + 0 + 32 + + + + + CMD_W3 + CMD_W3 + Command word 3 + 0xC + 0x20 + read-write + 0x00000000 + + + WEN + Write data enable + 1 + 1 + + + RSTSEN + Read spi status enable + 2 + 1 + + + RSTSC + Read spi status configure + 3 + 1 + + + OPMODE + SPI operate mode + 5 + 3 + + + PEMOPC + Performance enhance mode operate code + 16 + 8 + + + INSC + Instruction code + 24 + 8 + + + + + CTRL + CTRL + Control register + 0x10 + 0x20 + read-write + 0x00000000 + + + CLKDIV + SPI clock divider + 0 + 3 + + + SCKMODE + Sckout mode + 4 + 1 + + + XIPIDLE + XIP port idle status + 7 + 1 + + + ABORT + Abort instruction + 8 + 1 + + + BUSY + Busy bit of spi status + 16 + 3 + + + XIPRCMDF + XIP read command flush + 19 + 1 + + + XIPSEL + XIP port selection + 20 + 1 + + + KEYEN + encryption key enable + 21 + 1 + + + + + ACTR + ACTR + AC timing control register + 0x14 + 0x20 + read-write + 0x0000000F + + + CSDLY + CS delay + 0 + 4 + + + + + FIFOSTS + FIFOSTS + FIFO Status register + 0x18 + 0x20 + read-only + 0x00000001 + + + TXFIFORDY + TxFIFO ready status + 0 + 1 + + + RXFIFORDY + RxFIFO ready status + 1 + 1 + + + + + CTRL2 + CTRL2 + control register 2 + 0x20 + 0x20 + read-write + 0x00000001 + + + DMAEN + DMA handshake enable + 0 + 1 + + + CMDIE + Command complete interrupt enable + 1 + 1 + + + TXFIFOTHOD + TxFIFO thod + 8 + 2 + + + RXFIFOTHOD + RxFIFO thod + 12 + 2 + + + + + CMDSTS + CMDSTS + CMD status register + 0x24 + 0x20 + read-only + 0x00000000 + + + CMDSTS + Command complete status + 0 + 1 + + + + + RSTS + RSTS + SPI read status register + 0x28 + 0x20 + read-only + 0x00000000 + + + SPISTS + SPI read status + 0 + 8 + + + + + FSIZE + FSIZE + SPI flash size + 0x2C + 0x20 + read-write + 0x00000000 + + + SPIFSIZE + SPI flash size + 0 + 32 + + + + + XIP_CMD_W0 + XIP_CMD_W0 + XIP command word 0 + 0x30 + 0x20 + read-write + 0x00000000 + + + XIPR_DUM2 + XIP read second dummy cycle + 0 + 8 + + + XIPR_OPMODE + XIP read operate mode + 8 + 3 + + + XIPR_ADRLEN + XIP read address length + 11 + 1 + + + XIPR_INSC + XIP read instruction code + 12 + 8 + + + + + XIP_CMD_W1 + XIP_CMD_W1 + XIP command word 1 + 0x34 + 0x20 + read-write + 0x00000000 + + + XIPW_DUM2 + XIP write second dummy cycle + 0 + 8 + + + XIPW_OPMODE + XIP write operate mode + 8 + 3 + + + XIPW_ADRLEN + XIP write address length + 11 + 1 + + + XIPW_INSC + XIP write instruction code + 12 + 8 + + + + + XIP_CMD_W2 + XIP_CMD_W2 + XIP command word 2 + 0x38 + 0x20 + read-write + 0x00000000 + + + XIPR_DCNT + XIP read data counter + 0 + 6 + + + XIPR_TCNT + XIP continue read cycle counter + 8 + 7 + + + XIPR_SEL + XIP read continue mode select + 15 + 1 + + + XIPW_DCNT + XIP write data counter + 16 + 6 + + + XIPW_TCNT + XIP continue write cycle counter + 24 + 7 + + + XIPW_SEL + XIP write continue mode select + 31 + 1 + + + + + XIP_CMD_W3 + XIP_CMD_W3 + XIP command word 3 + 0x3C + 0x20 + read-write + 0x00000000 + + + BYPASSC + Bypass cache function + 0 + 1 + + + CSTS + Cache status + 3 + 1 + + + + + REV + REV + Revision + 0x50 + 0x20 + read-write + 0x00010500 + + + REVISION + Revision number + 0 + 31 + + + + + DT + DT + 32/16/8 bit data port register + 0x100 + 0x20 + read-write + 0x00000000 + + + + + QSPI2 + 0xA0002000 + + QSPI2 + QSPI2 global interrupt + 91 + + + + diff --git a/project/at_start_f435/templates/at32_ide/ldscripts/AT32F435xM_FLASH.ld b/project/at_start_f435/templates/at32_ide/ldscripts/AT32F435xM_FLASH.ld new file mode 100644 index 00000000..a02e4412 --- /dev/null +++ b/project/at_start_f435/templates/at32_ide/ldscripts/AT32F435xM_FLASH.ld @@ -0,0 +1,154 @@ +/* +***************************************************************************** +** +** File : AT32F435xM_FLASH.ld +** +** Abstract : Linker script for AT32F435xM Device with +** 4096KByte FLASH, 384KByte RAM +** +** Set heap size, stack size and stack location according +** to application requirements. +** +** Set memory bank area and size if external memory is used. +** +** Target : Artery Tek AT32 +** +** Environment : Arm gcc toolchain +** +***************************************************************************** +*/ + +/* Entry Point */ +ENTRY(Reset_Handler) + +/* Highest address of the user mode stack */ +_estack = 0x20060000; /* end of RAM */ + +/* Generate a link error if heap and stack don't fit into RAM */ +_Min_Heap_Size = 0x200; /* required amount of heap */ +_Min_Stack_Size = 0x400; /* required amount of stack */ + +/* Specify the memory areas */ +MEMORY +{ +FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 4032K +RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 384K +} + +/* Define output sections */ +SECTIONS +{ + /* The startup code goes first into FLASH */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } >FLASH + + /* The program code and other data goes into FLASH */ + .text : + { + . = ALIGN(4); + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + *(.eh_frame) + + KEEP (*(.init)) + KEEP (*(.fini)) + + . = ALIGN(4); + _etext = .; /* define a global symbols at end of code */ + } >FLASH + + /* Constant data goes into FLASH */ + .rodata : + { + . = ALIGN(4); + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + . = ALIGN(4); + } >FLASH + + .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH + .ARM : { + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + } >FLASH + + .preinit_array : + { + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + } >FLASH + .init_array : + { + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + } >FLASH + .fini_array : + { + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(SORT(.fini_array.*))) + KEEP (*(.fini_array*)) + PROVIDE_HIDDEN (__fini_array_end = .); + } >FLASH + + /* used by the startup to initialize data */ + _sidata = LOADADDR(.data); + + /* Initialized data sections goes into RAM, load LMA copy after code */ + .data : + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end */ + } >RAM AT> FLASH + + /* Uninitialized data section */ + . = ALIGN(4); + .bss : + { + /* This is used by the startup in order to initialize the .bss secion */ + _sbss = .; /* define a global symbol at bss start */ + __bss_start__ = _sbss; + *(.bss) + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end */ + __bss_end__ = _ebss; + } >RAM + + /* User_heap_stack section, used to check that there is enough RAM left */ + ._user_heap_stack : + { + . = ALIGN(8); + PROVIDE ( end = . ); + PROVIDE ( _end = . ); + . = . + _Min_Heap_Size; + . = . + _Min_Stack_Size; + . = ALIGN(8); + } >RAM + + /* Remove information from the standard libraries */ + /DISCARD/ : + { + libc.a ( * ) + libm.a ( * ) + libgcc.a ( * ) + } + + .ARM.attributes 0 : { *(.ARM.attributes) } +} diff --git a/project/at_start_f435/templates/at32_ide/preferences.ini b/project/at_start_f435/templates/at32_ide/preferences.ini new file mode 100644 index 00000000..253f1681 --- /dev/null +++ b/project/at_start_f435/templates/at32_ide/preferences.ini @@ -0,0 +1,4 @@ +[debugger] +chipSeries=AT32F435 +chipTarget=AT32F435ZMT7 +chipSizeType=M diff --git a/project/at_start_f435/templates/inc/at32f435_437_clock.h b/project/at_start_f435/templates/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f435/templates/inc/at32f435_437_clock.h +++ b/project/at_start_f435/templates/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/templates/inc/at32f435_437_conf.h b/project/at_start_f435/templates/inc/at32f435_437_conf.h index c050e1ff..6b437f9d 100644 --- a/project/at_start_f435/templates/inc/at32f435_437_conf.h +++ b/project/at_start_f435/templates/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/templates/inc/at32f435_437_int.h b/project/at_start_f435/templates/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f435/templates/inc/at32f435_437_int.h +++ b/project/at_start_f435/templates/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/templates/readme.txt b/project/at_start_f435/templates/readme.txt index c1308556..d4918342 100644 --- a/project/at_start_f435/templates/readme.txt +++ b/project/at_start_f435/templates/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file templates/readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f435/templates/src/at32f435_437_clock.c b/project/at_start_f435/templates/src/at32f435_437_clock.c index 7f484a96..2643db3c 100644 --- a/project/at_start_f435/templates/src/at32f435_437_clock.c +++ b/project/at_start_f435/templates/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/templates/src/at32f435_437_int.c b/project/at_start_f435/templates/src/at32f435_437_int.c index b48a4c47..cf946d6a 100644 --- a/project/at_start_f435/templates/src/at32f435_437_int.c +++ b/project/at_start_f435/templates/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435/templates/src/main.c b/project/at_start_f435/templates/src/main.c index 243aa623..7c8ee97c 100644 --- a/project/at_start_f435/templates/src/main.c +++ b/project/at_start_f435/templates/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f435_Example_list.htm b/project/at_start_f435_Example_list.htm index 367f64a5..8d18e941 100644 --- a/project/at_start_f435_Example_list.htm +++ b/project/at_start_f435_Example_list.htm @@ -34,29 +34,6 @@ text-justify:inter-ideograph; font-size:10.5pt; font-family:;} -p.MsoHeader, li.MsoHeader, div.MsoHeader - {mso-style-link:"ҳü ַ"; - margin:0cm; - margin-bottom:.0001pt; - text-align:center; - layout-grid-mode:char; - border:none; - padding:0cm; - font-size:9.0pt; - font-family:;} -p.MsoFooter, li.MsoFooter, div.MsoFooter - {mso-style-link:"ҳ ַ"; - margin:0cm; - margin-bottom:.0001pt; - layout-grid-mode:char; - font-size:9.0pt; - font-family:;} -span.a - {mso-style-name:"ҳü ַ"; - mso-style-link:ҳü;} -span.a0 - {mso-style-name:"ҳ ַ"; - mso-style-link:ҳ;} .MsoChpDefault {font-family:;} /* Page Definitions */ @@ -1337,8 +1314,8 @@ div.WordSection1

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29) + if(index%3 == 0) { - /* printf data when conversion end without error */ printf("conversion end without error\r\n"); - for(index = 0; index < 10; index++) - { - printf("adc1_ordinary_valuetab[%d][0] = 0x%x\r\n",index, adc1_ordinary_valuetab[index][0]); - printf("adc1_ordinary_valuetab[%d][1] = 0x%x\r\n",index, adc1_ordinary_valuetab[index][1]); - printf("adc1_ordinary_valuetab[%d][2] = 0x%x\r\n",index, adc1_ordinary_valuetab[index][2]); - printf("\r\n"); - } - while(1); + printf("adc1_ordinary_valuetab[0] = 0x%x\r\n", adc1_ordinary_valuetab[0]); + printf("adc1_ordinary_valuetab[1] = 0x%x\r\n", adc1_ordinary_valuetab[1]); + printf("adc1_ordinary_valuetab[2] = 0x%x\r\n", adc1_ordinary_valuetab[2]); + printf("\r\n"); + delay_sec(1); + p_adc1_ordinary = adc1_ordinary_valuetab; + adc_ordinary_software_trigger_enable(ADC1, TRUE); } } } diff --git a/project/at_start_f437/examples/adc/vbat_monitor/inc/at32f435_437_clock.h b/project/at_start_f437/examples/adc/vbat_monitor/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/adc/vbat_monitor/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/adc/vbat_monitor/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/adc/vbat_monitor/inc/at32f435_437_conf.h b/project/at_start_f437/examples/adc/vbat_monitor/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/adc/vbat_monitor/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/adc/vbat_monitor/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/adc/vbat_monitor/inc/at32f435_437_int.h b/project/at_start_f437/examples/adc/vbat_monitor/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/adc/vbat_monitor/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/adc/vbat_monitor/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/adc/vbat_monitor/readme.txt b/project/at_start_f437/examples/adc/vbat_monitor/readme.txt index 1cb3efce..fc462a6c 100644 --- a/project/at_start_f437/examples/adc/vbat_monitor/readme.txt +++ b/project/at_start_f437/examples/adc/vbat_monitor/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/adc/vbat_monitor/src/at32f435_437_clock.c b/project/at_start_f437/examples/adc/vbat_monitor/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/adc/vbat_monitor/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/adc/vbat_monitor/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/adc/vbat_monitor/src/at32f435_437_int.c b/project/at_start_f437/examples/adc/vbat_monitor/src/at32f435_437_int.c index eb13c6db..62436a80 100644 --- a/project/at_start_f437/examples/adc/vbat_monitor/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/adc/vbat_monitor/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/adc/vbat_monitor/src/main.c b/project/at_start_f437/examples/adc/vbat_monitor/src/main.c index cecb8a77..d46fe97e 100644 --- a/project/at_start_f437/examples/adc/vbat_monitor/src/main.c +++ b/project/at_start_f437/examples/adc/vbat_monitor/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/adc/voltage_monitoring/inc/at32f435_437_clock.h b/project/at_start_f437/examples/adc/voltage_monitoring/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/adc/voltage_monitoring/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/adc/voltage_monitoring/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/adc/voltage_monitoring/inc/at32f435_437_conf.h b/project/at_start_f437/examples/adc/voltage_monitoring/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/adc/voltage_monitoring/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/adc/voltage_monitoring/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/adc/voltage_monitoring/inc/at32f435_437_int.h b/project/at_start_f437/examples/adc/voltage_monitoring/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/adc/voltage_monitoring/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/adc/voltage_monitoring/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/adc/voltage_monitoring/readme.txt b/project/at_start_f437/examples/adc/voltage_monitoring/readme.txt index ce1d95b5..aa2a35f1 100644 --- a/project/at_start_f437/examples/adc/voltage_monitoring/readme.txt +++ b/project/at_start_f437/examples/adc/voltage_monitoring/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/adc/voltage_monitoring/src/at32f435_437_clock.c b/project/at_start_f437/examples/adc/voltage_monitoring/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/adc/voltage_monitoring/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/adc/voltage_monitoring/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/adc/voltage_monitoring/src/at32f435_437_int.c b/project/at_start_f437/examples/adc/voltage_monitoring/src/at32f435_437_int.c index 9e1eb4e2..d60539e9 100644 --- a/project/at_start_f437/examples/adc/voltage_monitoring/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/adc/voltage_monitoring/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/adc/voltage_monitoring/src/main.c b/project/at_start_f437/examples/adc/voltage_monitoring/src/main.c index 59c9e24c..1e17604b 100644 --- a/project/at_start_f437/examples/adc/voltage_monitoring/src/main.c +++ b/project/at_start_f437/examples/adc/voltage_monitoring/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/can/communication_mode/inc/at32f435_437_clock.h b/project/at_start_f437/examples/can/communication_mode/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/can/communication_mode/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/can/communication_mode/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/can/communication_mode/inc/at32f435_437_conf.h b/project/at_start_f437/examples/can/communication_mode/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/can/communication_mode/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/can/communication_mode/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/can/communication_mode/inc/at32f435_437_int.h b/project/at_start_f437/examples/can/communication_mode/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/can/communication_mode/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/can/communication_mode/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/can/communication_mode/readme.txt b/project/at_start_f437/examples/can/communication_mode/readme.txt index 3e0ad015..1f874b16 100644 --- a/project/at_start_f437/examples/can/communication_mode/readme.txt +++ b/project/at_start_f437/examples/can/communication_mode/readme.txt @@ -1,16 +1,16 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ - this demo is based on the at-start board, in this demo, shows how to use - the can normal mode. every 1s transmit one message and the led4 blink,if - receive a message, les2 blink(message id is 0x400) or led3 blink(message id - is not equal to 0x400). + this demo is based on the at-start board and at32-comm-ev, in this demo, + shows how to use the can communication mode. every 1s transmit one message + and the led4 blink, if receive a message, led2 blink(message id is 0x400) or led3 + blink(message id is not equal to 0x400). set-up - can tx ---> pb9 - can rx ---> pb8 diff --git a/project/at_start_f437/examples/can/communication_mode/src/at32f435_437_clock.c b/project/at_start_f437/examples/can/communication_mode/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/can/communication_mode/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/can/communication_mode/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/can/communication_mode/src/at32f435_437_int.c b/project/at_start_f437/examples/can/communication_mode/src/at32f435_437_int.c index e127c276..1209e8be 100644 --- a/project/at_start_f437/examples/can/communication_mode/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/can/communication_mode/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/can/communication_mode/src/main.c b/project/at_start_f437/examples/can/communication_mode/src/main.c index d0d0af80..79771a0a 100644 --- a/project/at_start_f437/examples/can/communication_mode/src/main.c +++ b/project/at_start_f437/examples/can/communication_mode/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/can/filter/inc/at32f435_437_clock.h b/project/at_start_f437/examples/can/filter/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/can/filter/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/can/filter/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/can/filter/inc/at32f435_437_conf.h b/project/at_start_f437/examples/can/filter/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/can/filter/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/can/filter/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/can/filter/inc/at32f435_437_int.h b/project/at_start_f437/examples/can/filter/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/can/filter/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/can/filter/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/can/filter/readme.txt b/project/at_start_f437/examples/can/filter/readme.txt index 822ea113..acabe7a8 100644 --- a/project/at_start_f437/examples/can/filter/readme.txt +++ b/project/at_start_f437/examples/can/filter/readme.txt @@ -1,17 +1,17 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ - this demo is based on the at-start board, in this demo, shows how to use - the can filter funciton. the can tool transmit 6 specified messages in total - (3 extended-id messages and 3 standard-id messages), when mcu receive one - expect id message, test_result will add one, if test success, only 4 filter - messages will be received, the three leds will toggle. + this demo is based on the at-start board and at32-comm-ev, in this demo, + shows how to use the can filter funciton. the can tool transmit 6 specified + messages in total (3 extended-id messages and 3 standard-id messages), + when mcu receive one expect id message, test_result will add one, if test + success, only 4 filter messages will be received, the three leds will toggle. set-up - can tx ---> pb9 - can rx ---> pb8 diff --git a/project/at_start_f437/examples/can/filter/src/at32f435_437_clock.c b/project/at_start_f437/examples/can/filter/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/can/filter/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/can/filter/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/can/filter/src/at32f435_437_int.c b/project/at_start_f437/examples/can/filter/src/at32f435_437_int.c index 57a5c664..b6fbb781 100644 --- a/project/at_start_f437/examples/can/filter/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/can/filter/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/can/filter/src/main.c b/project/at_start_f437/examples/can/filter/src/main.c index a6756c0a..ceaa0327 100644 --- a/project/at_start_f437/examples/can/filter/src/main.c +++ b/project/at_start_f437/examples/can/filter/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/can/loopback_mode/inc/at32f435_437_clock.h b/project/at_start_f437/examples/can/loopback_mode/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/can/loopback_mode/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/can/loopback_mode/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/can/loopback_mode/inc/at32f435_437_conf.h b/project/at_start_f437/examples/can/loopback_mode/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/can/loopback_mode/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/can/loopback_mode/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/can/loopback_mode/inc/at32f435_437_int.h b/project/at_start_f437/examples/can/loopback_mode/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/can/loopback_mode/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/can/loopback_mode/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/can/loopback_mode/readme.txt b/project/at_start_f437/examples/can/loopback_mode/readme.txt index 53010af1..3c737130 100644 --- a/project/at_start_f437/examples/can/loopback_mode/readme.txt +++ b/project/at_start_f437/examples/can/loopback_mode/readme.txt @@ -1,15 +1,15 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ - this demo is based on the at-start board, in this demo, shows how to use - the can loopback mode. every 1s transmit one message and the led4 blink, if - the message can be received, led2 blink. + this demo is based on the at-start board and at32-comm-ev, in this demo, + shows how to use the can loopback mode. every 1s transmit one message + and the led4 blink, if the message can be received, led2 blink. set-up - can tx ---> pb9 - can rx ---> pb8 diff --git a/project/at_start_f437/examples/can/loopback_mode/src/at32f435_437_clock.c b/project/at_start_f437/examples/can/loopback_mode/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/can/loopback_mode/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/can/loopback_mode/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/can/loopback_mode/src/at32f435_437_int.c b/project/at_start_f437/examples/can/loopback_mode/src/at32f435_437_int.c index 14689e4d..8b463554 100644 --- a/project/at_start_f437/examples/can/loopback_mode/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/can/loopback_mode/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/can/loopback_mode/src/main.c b/project/at_start_f437/examples/can/loopback_mode/src/main.c index 4dd86cb4..41b05e60 100644 --- a/project/at_start_f437/examples/can/loopback_mode/src/main.c +++ b/project/at_start_f437/examples/can/loopback_mode/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/cortex_m4/bit_band/inc/at32f435_437_clock.h b/project/at_start_f437/examples/cortex_m4/bit_band/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/cortex_m4/bit_band/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/cortex_m4/bit_band/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/cortex_m4/bit_band/inc/at32f435_437_conf.h b/project/at_start_f437/examples/cortex_m4/bit_band/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/cortex_m4/bit_band/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/cortex_m4/bit_band/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/cortex_m4/bit_band/inc/at32f435_437_int.h b/project/at_start_f437/examples/cortex_m4/bit_band/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/cortex_m4/bit_band/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/cortex_m4/bit_band/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/cortex_m4/bit_band/readme.txt b/project/at_start_f437/examples/cortex_m4/bit_band/readme.txt index 294b98f0..b65dafb4 100644 --- a/project/at_start_f437/examples/cortex_m4/bit_band/readme.txt +++ b/project/at_start_f437/examples/cortex_m4/bit_band/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/cortex_m4/bit_band/src/at32f435_437_clock.c b/project/at_start_f437/examples/cortex_m4/bit_band/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/cortex_m4/bit_band/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/cortex_m4/bit_band/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/cortex_m4/bit_band/src/at32f435_437_int.c b/project/at_start_f437/examples/cortex_m4/bit_band/src/at32f435_437_int.c index c591701b..e60c6c40 100644 --- a/project/at_start_f437/examples/cortex_m4/bit_band/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/cortex_m4/bit_band/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/cortex_m4/bit_band/src/main.c b/project/at_start_f437/examples/cortex_m4/bit_band/src/main.c index 8e14c4e8..8752b5e6 100644 --- a/project/at_start_f437/examples/cortex_m4/bit_band/src/main.c +++ b/project/at_start_f437/examples/cortex_m4/bit_band/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/cortex_m4/cmsis_dsp/inc/at32f435_437_clock.h b/project/at_start_f437/examples/cortex_m4/cmsis_dsp/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/cortex_m4/cmsis_dsp/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/cortex_m4/cmsis_dsp/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/cortex_m4/cmsis_dsp/inc/at32f435_437_conf.h b/project/at_start_f437/examples/cortex_m4/cmsis_dsp/inc/at32f435_437_conf.h index 7024a483..87f5d299 100644 --- a/project/at_start_f437/examples/cortex_m4/cmsis_dsp/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/cortex_m4/cmsis_dsp/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/cortex_m4/cmsis_dsp/inc/at32f435_437_int.h b/project/at_start_f437/examples/cortex_m4/cmsis_dsp/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/cortex_m4/cmsis_dsp/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/cortex_m4/cmsis_dsp/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Listings/cmsis_dsp.map b/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Listings/cmsis_dsp.map index 0df5d17c..277746a7 100644 --- a/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Listings/cmsis_dsp.map +++ b/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Listings/cmsis_dsp.map @@ -274,7 +274,7 @@ Section Cross References at32f435_437_gpio.o(.ARM.exidx.text.gpio_bits_set) refers to at32f435_437_gpio.o(.text.gpio_bits_set) for [Anonymous Symbol] at32f435_437_gpio.o(.ARM.exidx.text.gpio_bits_reset) refers to at32f435_437_gpio.o(.text.gpio_bits_reset) for [Anonymous Symbol] at32f435_437_gpio.o(.ARM.exidx.text.gpio_bits_write) refers to at32f435_437_gpio.o(.text.gpio_bits_write) for [Anonymous Symbol] - at32f435_437_gpio.o(.ARM.exidx.text.gpio_port_wirte) refers to at32f435_437_gpio.o(.text.gpio_port_wirte) for [Anonymous Symbol] + at32f435_437_gpio.o(.ARM.exidx.text.gpio_port_write) refers to at32f435_437_gpio.o(.text.gpio_port_write) for [Anonymous Symbol] at32f435_437_gpio.o(.ARM.exidx.text.gpio_pin_wp_config) refers to at32f435_437_gpio.o(.text.gpio_pin_wp_config) for [Anonymous Symbol] at32f435_437_gpio.o(.ARM.exidx.text.gpio_pins_huge_driven_config) refers to at32f435_437_gpio.o(.text.gpio_pins_huge_driven_config) for [Anonymous Symbol] at32f435_437_gpio.o(.ARM.exidx.text.gpio_pin_mux_config) refers to at32f435_437_gpio.o(.text.gpio_pin_mux_config) for [Anonymous Symbol] @@ -1801,7 +1801,7 @@ Removing Unused input sections from the image. Removing at32f435_437_crm.o(.text.crm_periph_lowpower_mode_enable), (40 bytes). Removing at32f435_437_crm.o(.ARM.exidx.text.crm_periph_lowpower_mode_enable), (8 bytes). Removing at32f435_437_crm.o(.ARM.exidx.text.crm_clock_source_enable), (8 bytes). - Removing at32f435_437_crm.o(.text.crm_flag_clear), (108 bytes). + Removing at32f435_437_crm.o(.text.crm_flag_clear), (172 bytes). Removing at32f435_437_crm.o(.ARM.exidx.text.crm_flag_clear), (8 bytes). Removing at32f435_437_crm.o(.text.crm_ertc_clock_select), (30 bytes). Removing at32f435_437_crm.o(.ARM.exidx.text.crm_ertc_clock_select), (8 bytes). @@ -1860,8 +1860,8 @@ Removing Unused input sections from the image. Removing at32f435_437_gpio.o(.ARM.exidx.text.gpio_bits_reset), (8 bytes). Removing at32f435_437_gpio.o(.text.gpio_bits_write), (12 bytes). Removing at32f435_437_gpio.o(.ARM.exidx.text.gpio_bits_write), (8 bytes). - Removing at32f435_437_gpio.o(.text.gpio_port_wirte), (4 bytes). - Removing at32f435_437_gpio.o(.ARM.exidx.text.gpio_port_wirte), (8 bytes). + Removing at32f435_437_gpio.o(.text.gpio_port_write), (4 bytes). + Removing at32f435_437_gpio.o(.ARM.exidx.text.gpio_port_write), (8 bytes). Removing at32f435_437_gpio.o(.text.gpio_pin_wp_config), (16 bytes). Removing at32f435_437_gpio.o(.ARM.exidx.text.gpio_pin_wp_config), (8 bytes). Removing at32f435_437_gpio.o(.text.gpio_pins_huge_driven_config), (16 bytes). @@ -1948,7 +1948,7 @@ Removing Unused input sections from the image. Removing at32f435_437_usart.o(.text.usart_hardware_flow_control_set), (66 bytes). Removing at32f435_437_usart.o(.ARM.exidx.text.usart_hardware_flow_control_set), (8 bytes). Removing at32f435_437_usart.o(.ARM.exidx.text.usart_flag_get), (8 bytes). - Removing at32f435_437_usart.o(.text.usart_flag_clear), (6 bytes). + Removing at32f435_437_usart.o(.text.usart_flag_clear), (16 bytes). Removing at32f435_437_usart.o(.ARM.exidx.text.usart_flag_clear), (8 bytes). Removing at32f435_437_usart.o(.text.usart_rs485_delay_time_config), (34 bytes). Removing at32f435_437_usart.o(.ARM.exidx.text.usart_rs485_delay_time_config), (8 bytes). @@ -2955,7 +2955,7 @@ Removing Unused input sections from the image. Removing transformfunctions.o(.text.arm_split_rfft_q31), (274 bytes). Removing transformfunctions.o(.ARM.exidx.text.arm_split_rfft_q31), (8 bytes). -1226 unused section(s) (total 1042467 bytes) removed from the image. +1226 unused section(s) (total 1042541 bytes) removed from the image. ============================================================================== @@ -3203,81 +3203,81 @@ Image Symbol Table [Anonymous Symbol] 0x08000b1c Section 0 at32f435_437_int.o(.text.SVC_Handler) [Anonymous Symbol] 0x08000b20 Section 0 at32f435_437_int.o(.text.SysTick_Handler) [Anonymous Symbol] 0x08000b24 Section 0 system_at32f435_437.o(.text.SystemInit) - [Anonymous Symbol] 0x08000b90 Section 0 at32f435_437_int.o(.text.UsageFault_Handler) - [Anonymous Symbol] 0x08000b94 Section 0 at32f435_437_board.o(.text._sys_exit) - [Anonymous Symbol] 0x08000b98 Section 0 matrixfunctions.o(.text.arm_mat_mult_f32) - [Anonymous Symbol] 0x08000cf0 Section 0 statisticsfunctions.o(.text.arm_max_f32) - [Anonymous Symbol] 0x08000dc0 Section 0 statisticsfunctions.o(.text.arm_mean_f32) - [Anonymous Symbol] 0x08000e40 Section 0 statisticsfunctions.o(.text.arm_min_f32) - [Anonymous Symbol] 0x08000f10 Section 0 statisticsfunctions.o(.text.arm_std_f32) - [Anonymous Symbol] 0x08000f60 Section 0 statisticsfunctions.o(.text.arm_var_f32) - [Anonymous Symbol] 0x0800108c Section 0 at32f435_437_crm.o(.text.crm_ahb_div_set) - [Anonymous Symbol] 0x080010a8 Section 0 at32f435_437_crm.o(.text.crm_apb1_div_set) - [Anonymous Symbol] 0x080010c4 Section 0 at32f435_437_crm.o(.text.crm_apb2_div_set) - [Anonymous Symbol] 0x080010e0 Section 0 at32f435_437_crm.o(.text.crm_auto_step_mode_enable) - [Anonymous Symbol] 0x080010fc Section 0 at32f435_437_crm.o(.text.crm_clock_source_enable) - [Anonymous Symbol] 0x08001178 Section 0 at32f435_437_crm.o(.text.crm_clocks_freq_get) - crm_clocks_freq_get.pll_fr_table 0x08001204 Number 0 at32f435_437_crm.o(.text.crm_clocks_freq_get) - crm_clocks_freq_get.sclk_ahb_div_table 0x0800120c Number 0 at32f435_437_crm.o(.text.crm_clocks_freq_get) - crm_clocks_freq_get.ahb_apb1_div_table 0x0800121c Number 0 at32f435_437_crm.o(.text.crm_clocks_freq_get) - crm_clocks_freq_get.ahb_apb2_div_table 0x0800121c Number 0 at32f435_437_crm.o(.text.crm_clocks_freq_get) - [Anonymous Symbol] 0x08001224 Section 0 at32f435_437_crm.o(.text.crm_flag_get) - [Anonymous Symbol] 0x08001240 Section 0 at32f435_437_crm.o(.text.crm_hext_stable_wait) - [Anonymous Symbol] 0x08001268 Section 0 at32f435_437_crm.o(.text.crm_periph_clock_enable) - [Anonymous Symbol] 0x08001290 Section 0 at32f435_437_crm.o(.text.crm_pll_config) - [Anonymous Symbol] 0x080012dc Section 0 at32f435_437_crm.o(.text.crm_reset) - [Anonymous Symbol] 0x0800132c Section 0 at32f435_437_crm.o(.text.crm_sysclk_switch) - [Anonymous Symbol] 0x08001340 Section 0 at32f435_437_crm.o(.text.crm_sysclk_switch_status_get) - [Anonymous Symbol] 0x08001350 Section 0 at32f435_437_board.o(.text.fputc) - [Anonymous Symbol] 0x08001374 Section 0 at32f435_437_gpio.o(.text.gpio_default_para_init) - [Anonymous Symbol] 0x08001384 Section 0 at32f435_437_gpio.o(.text.gpio_init) - [Anonymous Symbol] 0x08001408 Section 0 at32f435_437_gpio.o(.text.gpio_pin_mux_config) - [Anonymous Symbol] 0x08001438 Section 0 main.o(.text.main) - [Anonymous Symbol] 0x08001584 Section 0 at32f435_437_clock.o(.text.system_clock_config) - [Anonymous Symbol] 0x08001618 Section 0 system_at32f435_437.o(.text.system_core_clock_update) - system_core_clock_update.pll_fr_table 0x0800168c Number 0 system_at32f435_437.o(.text.system_core_clock_update) - system_core_clock_update.sys_ahb_div_table 0x08001694 Number 0 system_at32f435_437.o(.text.system_core_clock_update) - [Anonymous Symbol] 0x080016a4 Section 0 at32f435_437_board.o(.text.uart_print_init) - [Anonymous Symbol] 0x08001714 Section 0 at32f435_437_usart.o(.text.usart_data_transmit) - [Anonymous Symbol] 0x0800171c Section 0 at32f435_437_usart.o(.text.usart_enable) - [Anonymous Symbol] 0x08001730 Section 0 at32f435_437_usart.o(.text.usart_flag_get) - [Anonymous Symbol] 0x0800173c Section 0 at32f435_437_usart.o(.text.usart_init) - [Anonymous Symbol] 0x080017e4 Section 0 at32f435_437_usart.o(.text.usart_transmitter_enable) - CL$$btod_d2e 0x080017f6 Section 62 btod.o(CL$$btod_d2e) - CL$$btod_d2e_denorm_low 0x08001834 Section 70 btod.o(CL$$btod_d2e_denorm_low) - CL$$btod_d2e_norm_op1 0x0800187a Section 96 btod.o(CL$$btod_d2e_norm_op1) - CL$$btod_div_common 0x080018da Section 824 btod.o(CL$$btod_div_common) - CL$$btod_e2e 0x08001c12 Section 220 btod.o(CL$$btod_e2e) - CL$$btod_ediv 0x08001cee Section 42 btod.o(CL$$btod_ediv) - CL$$btod_emul 0x08001d18 Section 42 btod.o(CL$$btod_emul) - CL$$btod_mult_common 0x08001d42 Section 580 btod.o(CL$$btod_mult_common) - i.__ARM_fpclassify 0x08001f86 Section 0 fpclassify.o(i.__ARM_fpclassify) - i.__hardfp_sqrtf 0x08001fb6 Section 0 sqrtf.o(i.__hardfp_sqrtf) - locale$$code 0x08001ff0 Section 44 lc_numeric_c.o(locale$$code) - $v0 0x0800201c Number 0 dretinf.o(x$fpl$dretinf) - x$fpl$dretinf 0x0800201c Section 12 dretinf.o(x$fpl$dretinf) - $v0 0x08002028 Number 0 f2d.o(x$fpl$f2d) - x$fpl$f2d 0x08002028 Section 86 f2d.o(x$fpl$f2d) - $v0 0x0800207e Number 0 fnaninf.o(x$fpl$fnaninf) - x$fpl$fnaninf 0x0800207e Section 140 fnaninf.o(x$fpl$fnaninf) - $v0 0x0800210a Number 0 fpinit.o(x$fpl$fpinit) - x$fpl$fpinit 0x0800210a Section 26 fpinit.o(x$fpl$fpinit) - $v0 0x08002124 Number 0 printf1.o(x$fpl$printf1) - x$fpl$printf1 0x08002124 Section 4 printf1.o(x$fpl$printf1) - tenpwrs_x 0x08002128 Data 60 bigflt0.o(.constdata) - .constdata 0x08002128 Section 148 bigflt0.o(.constdata) - x$fpl$usenofp 0x08002128 Section 0 usenofp.o(x$fpl$usenofp) - tenpwrs_i 0x08002164 Data 64 bigflt0.o(.constdata) - .L__const.main.dstC 0x080021c0 Data 8 main.o(.rodata..L__const.main.dstC) - .L__const.main.srcA 0x080021c8 Data 8 main.o(.rodata..L__const.main.srcA) - .L__const.main.srcB 0x080021d0 Data 8 main.o(.rodata..L__const.main.srcB) - locale$$data 0x08002348 Section 28 lc_numeric_c.o(locale$$data) - __lcnum_c_name 0x0800234c Data 2 lc_numeric_c.o(locale$$data) - __lcnum_c_start 0x08002354 Data 0 lc_numeric_c.o(locale$$data) - __lcnum_c_point 0x08002360 Data 0 lc_numeric_c.o(locale$$data) - __lcnum_c_thousands 0x08002362 Data 0 lc_numeric_c.o(locale$$data) - __lcnum_c_grouping 0x08002363 Data 0 lc_numeric_c.o(locale$$data) - __lcnum_c_end 0x08002364 Data 0 lc_numeric_c.o(locale$$data) + [Anonymous Symbol] 0x08000b8c Section 0 at32f435_437_int.o(.text.UsageFault_Handler) + [Anonymous Symbol] 0x08000b90 Section 0 at32f435_437_board.o(.text._sys_exit) + [Anonymous Symbol] 0x08000b94 Section 0 matrixfunctions.o(.text.arm_mat_mult_f32) + [Anonymous Symbol] 0x08000cec Section 0 statisticsfunctions.o(.text.arm_max_f32) + [Anonymous Symbol] 0x08000dbc Section 0 statisticsfunctions.o(.text.arm_mean_f32) + [Anonymous Symbol] 0x08000e3c Section 0 statisticsfunctions.o(.text.arm_min_f32) + [Anonymous Symbol] 0x08000f0c Section 0 statisticsfunctions.o(.text.arm_std_f32) + [Anonymous Symbol] 0x08000f5c Section 0 statisticsfunctions.o(.text.arm_var_f32) + [Anonymous Symbol] 0x08001088 Section 0 at32f435_437_crm.o(.text.crm_ahb_div_set) + [Anonymous Symbol] 0x080010a4 Section 0 at32f435_437_crm.o(.text.crm_apb1_div_set) + [Anonymous Symbol] 0x080010c0 Section 0 at32f435_437_crm.o(.text.crm_apb2_div_set) + [Anonymous Symbol] 0x080010dc Section 0 at32f435_437_crm.o(.text.crm_auto_step_mode_enable) + [Anonymous Symbol] 0x080010f8 Section 0 at32f435_437_crm.o(.text.crm_clock_source_enable) + [Anonymous Symbol] 0x08001174 Section 0 at32f435_437_crm.o(.text.crm_clocks_freq_get) + crm_clocks_freq_get.pll_fr_table 0x08001200 Number 0 at32f435_437_crm.o(.text.crm_clocks_freq_get) + crm_clocks_freq_get.sclk_ahb_div_table 0x08001208 Number 0 at32f435_437_crm.o(.text.crm_clocks_freq_get) + crm_clocks_freq_get.ahb_apb1_div_table 0x08001218 Number 0 at32f435_437_crm.o(.text.crm_clocks_freq_get) + crm_clocks_freq_get.ahb_apb2_div_table 0x08001218 Number 0 at32f435_437_crm.o(.text.crm_clocks_freq_get) + [Anonymous Symbol] 0x08001220 Section 0 at32f435_437_crm.o(.text.crm_flag_get) + [Anonymous Symbol] 0x0800123c Section 0 at32f435_437_crm.o(.text.crm_hext_stable_wait) + [Anonymous Symbol] 0x08001264 Section 0 at32f435_437_crm.o(.text.crm_periph_clock_enable) + [Anonymous Symbol] 0x0800128c Section 0 at32f435_437_crm.o(.text.crm_pll_config) + [Anonymous Symbol] 0x080012d8 Section 0 at32f435_437_crm.o(.text.crm_reset) + [Anonymous Symbol] 0x08001328 Section 0 at32f435_437_crm.o(.text.crm_sysclk_switch) + [Anonymous Symbol] 0x0800133c Section 0 at32f435_437_crm.o(.text.crm_sysclk_switch_status_get) + [Anonymous Symbol] 0x0800134c Section 0 at32f435_437_board.o(.text.fputc) + [Anonymous Symbol] 0x08001370 Section 0 at32f435_437_gpio.o(.text.gpio_default_para_init) + [Anonymous Symbol] 0x08001380 Section 0 at32f435_437_gpio.o(.text.gpio_init) + [Anonymous Symbol] 0x08001404 Section 0 at32f435_437_gpio.o(.text.gpio_pin_mux_config) + [Anonymous Symbol] 0x08001434 Section 0 main.o(.text.main) + [Anonymous Symbol] 0x08001580 Section 0 at32f435_437_clock.o(.text.system_clock_config) + [Anonymous Symbol] 0x08001614 Section 0 system_at32f435_437.o(.text.system_core_clock_update) + system_core_clock_update.pll_fr_table 0x08001688 Number 0 system_at32f435_437.o(.text.system_core_clock_update) + system_core_clock_update.sys_ahb_div_table 0x08001690 Number 0 system_at32f435_437.o(.text.system_core_clock_update) + [Anonymous Symbol] 0x080016a0 Section 0 at32f435_437_board.o(.text.uart_print_init) + [Anonymous Symbol] 0x08001710 Section 0 at32f435_437_usart.o(.text.usart_data_transmit) + [Anonymous Symbol] 0x08001718 Section 0 at32f435_437_usart.o(.text.usart_enable) + [Anonymous Symbol] 0x0800172c Section 0 at32f435_437_usart.o(.text.usart_flag_get) + [Anonymous Symbol] 0x08001738 Section 0 at32f435_437_usart.o(.text.usart_init) + [Anonymous Symbol] 0x080017e0 Section 0 at32f435_437_usart.o(.text.usart_transmitter_enable) + CL$$btod_d2e 0x080017f2 Section 62 btod.o(CL$$btod_d2e) + CL$$btod_d2e_denorm_low 0x08001830 Section 70 btod.o(CL$$btod_d2e_denorm_low) + CL$$btod_d2e_norm_op1 0x08001876 Section 96 btod.o(CL$$btod_d2e_norm_op1) + CL$$btod_div_common 0x080018d6 Section 824 btod.o(CL$$btod_div_common) + CL$$btod_e2e 0x08001c0e Section 220 btod.o(CL$$btod_e2e) + CL$$btod_ediv 0x08001cea Section 42 btod.o(CL$$btod_ediv) + CL$$btod_emul 0x08001d14 Section 42 btod.o(CL$$btod_emul) + CL$$btod_mult_common 0x08001d3e Section 580 btod.o(CL$$btod_mult_common) + i.__ARM_fpclassify 0x08001f82 Section 0 fpclassify.o(i.__ARM_fpclassify) + i.__hardfp_sqrtf 0x08001fb2 Section 0 sqrtf.o(i.__hardfp_sqrtf) + locale$$code 0x08001fec Section 44 lc_numeric_c.o(locale$$code) + $v0 0x08002018 Number 0 dretinf.o(x$fpl$dretinf) + x$fpl$dretinf 0x08002018 Section 12 dretinf.o(x$fpl$dretinf) + $v0 0x08002024 Number 0 f2d.o(x$fpl$f2d) + x$fpl$f2d 0x08002024 Section 86 f2d.o(x$fpl$f2d) + $v0 0x0800207a Number 0 fnaninf.o(x$fpl$fnaninf) + x$fpl$fnaninf 0x0800207a Section 140 fnaninf.o(x$fpl$fnaninf) + $v0 0x08002106 Number 0 fpinit.o(x$fpl$fpinit) + x$fpl$fpinit 0x08002106 Section 26 fpinit.o(x$fpl$fpinit) + $v0 0x08002120 Number 0 printf1.o(x$fpl$printf1) + x$fpl$printf1 0x08002120 Section 4 printf1.o(x$fpl$printf1) + tenpwrs_x 0x08002124 Data 60 bigflt0.o(.constdata) + .constdata 0x08002124 Section 148 bigflt0.o(.constdata) + x$fpl$usenofp 0x08002124 Section 0 usenofp.o(x$fpl$usenofp) + tenpwrs_i 0x08002160 Data 64 bigflt0.o(.constdata) + .L__const.main.dstC 0x080021b8 Data 8 main.o(.rodata..L__const.main.dstC) + .L__const.main.srcA 0x080021c0 Data 8 main.o(.rodata..L__const.main.srcA) + .L__const.main.srcB 0x080021c8 Data 8 main.o(.rodata..L__const.main.srcB) + locale$$data 0x08002340 Section 28 lc_numeric_c.o(locale$$data) + __lcnum_c_name 0x08002344 Data 2 lc_numeric_c.o(locale$$data) + __lcnum_c_start 0x0800234c Data 0 lc_numeric_c.o(locale$$data) + __lcnum_c_point 0x08002358 Data 0 lc_numeric_c.o(locale$$data) + __lcnum_c_thousands 0x0800235a Data 0 lc_numeric_c.o(locale$$data) + __lcnum_c_grouping 0x0800235b Data 0 lc_numeric_c.o(locale$$data) + __lcnum_c_end 0x0800235c Data 0 lc_numeric_c.o(locale$$data) .bss 0x20000008 Section 96 libspace.o(.bss) testOutput 0x200000d0 Data 320 main.o(.bss.testOutput) [Anonymous Symbol] 0x200000d0 Section 0 main.o(.bss.testOutput) @@ -3511,65 +3511,65 @@ Image Symbol Table PendSV_Handler 0x08000b19 Thumb Code 2 at32f435_437_int.o(.text.PendSV_Handler) SVC_Handler 0x08000b1d Thumb Code 2 at32f435_437_int.o(.text.SVC_Handler) SysTick_Handler 0x08000b21 Thumb Code 2 at32f435_437_int.o(.text.SysTick_Handler) - SystemInit 0x08000b25 Thumb Code 108 system_at32f435_437.o(.text.SystemInit) - UsageFault_Handler 0x08000b91 Thumb Code 2 at32f435_437_int.o(.text.UsageFault_Handler) - _sys_exit 0x08000b95 Thumb Code 2 at32f435_437_board.o(.text._sys_exit) - arm_mat_mult_f32 0x08000b99 Thumb Code 344 matrixfunctions.o(.text.arm_mat_mult_f32) - arm_max_f32 0x08000cf1 Thumb Code 206 statisticsfunctions.o(.text.arm_max_f32) - arm_mean_f32 0x08000dc1 Thumb Code 128 statisticsfunctions.o(.text.arm_mean_f32) - arm_min_f32 0x08000e41 Thumb Code 206 statisticsfunctions.o(.text.arm_min_f32) - arm_std_f32 0x08000f11 Thumb Code 80 statisticsfunctions.o(.text.arm_std_f32) - arm_var_f32 0x08000f61 Thumb Code 300 statisticsfunctions.o(.text.arm_var_f32) - crm_ahb_div_set 0x0800108d Thumb Code 26 at32f435_437_crm.o(.text.crm_ahb_div_set) - crm_apb1_div_set 0x080010a9 Thumb Code 26 at32f435_437_crm.o(.text.crm_apb1_div_set) - crm_apb2_div_set 0x080010c5 Thumb Code 26 at32f435_437_crm.o(.text.crm_apb2_div_set) - crm_auto_step_mode_enable 0x080010e1 Thumb Code 26 at32f435_437_crm.o(.text.crm_auto_step_mode_enable) - crm_clock_source_enable 0x080010fd Thumb Code 122 at32f435_437_crm.o(.text.crm_clock_source_enable) - crm_clocks_freq_get 0x08001179 Thumb Code 172 at32f435_437_crm.o(.text.crm_clocks_freq_get) - crm_flag_get 0x08001225 Thumb Code 26 at32f435_437_crm.o(.text.crm_flag_get) - crm_hext_stable_wait 0x08001241 Thumb Code 40 at32f435_437_crm.o(.text.crm_hext_stable_wait) - crm_periph_clock_enable 0x08001269 Thumb Code 40 at32f435_437_crm.o(.text.crm_periph_clock_enable) - crm_pll_config 0x08001291 Thumb Code 76 at32f435_437_crm.o(.text.crm_pll_config) - crm_reset 0x080012dd Thumb Code 80 at32f435_437_crm.o(.text.crm_reset) - crm_sysclk_switch 0x0800132d Thumb Code 18 at32f435_437_crm.o(.text.crm_sysclk_switch) - crm_sysclk_switch_status_get 0x08001341 Thumb Code 16 at32f435_437_crm.o(.text.crm_sysclk_switch_status_get) - fputc 0x08001351 Thumb Code 36 at32f435_437_board.o(.text.fputc) - gpio_default_para_init 0x08001375 Thumb Code 14 at32f435_437_gpio.o(.text.gpio_default_para_init) - gpio_init 0x08001385 Thumb Code 132 at32f435_437_gpio.o(.text.gpio_init) - gpio_pin_mux_config 0x08001409 Thumb Code 46 at32f435_437_gpio.o(.text.gpio_pin_mux_config) - main 0x08001439 Thumb Code 332 main.o(.text.main) - system_clock_config 0x08001585 Thumb Code 148 at32f435_437_clock.o(.text.system_clock_config) - system_core_clock_update 0x08001619 Thumb Code 140 system_at32f435_437.o(.text.system_core_clock_update) - uart_print_init 0x080016a5 Thumb Code 110 at32f435_437_board.o(.text.uart_print_init) - usart_data_transmit 0x08001715 Thumb Code 8 at32f435_437_usart.o(.text.usart_data_transmit) - usart_enable 0x0800171d Thumb Code 18 at32f435_437_usart.o(.text.usart_enable) - usart_flag_get 0x08001731 Thumb Code 10 at32f435_437_usart.o(.text.usart_flag_get) - usart_init 0x0800173d Thumb Code 166 at32f435_437_usart.o(.text.usart_init) - usart_transmitter_enable 0x080017e5 Thumb Code 18 at32f435_437_usart.o(.text.usart_transmitter_enable) - _btod_d2e 0x080017f7 Thumb Code 62 btod.o(CL$$btod_d2e) - _d2e_denorm_low 0x08001835 Thumb Code 70 btod.o(CL$$btod_d2e_denorm_low) - _d2e_norm_op1 0x0800187b Thumb Code 96 btod.o(CL$$btod_d2e_norm_op1) - __btod_div_common 0x080018db Thumb Code 696 btod.o(CL$$btod_div_common) - _e2e 0x08001c13 Thumb Code 220 btod.o(CL$$btod_e2e) - _btod_ediv 0x08001cef Thumb Code 42 btod.o(CL$$btod_ediv) - _btod_emul 0x08001d19 Thumb Code 42 btod.o(CL$$btod_emul) - __btod_mult_common 0x08001d43 Thumb Code 580 btod.o(CL$$btod_mult_common) - __ARM_fpclassify 0x08001f87 Thumb Code 48 fpclassify.o(i.__ARM_fpclassify) - __hardfp_sqrtf 0x08001fb7 Thumb Code 58 sqrtf.o(i.__hardfp_sqrtf) - _get_lc_numeric 0x08001ff1 Thumb Code 44 lc_numeric_c.o(locale$$code) - __fpl_dretinf 0x0800201d Thumb Code 12 dretinf.o(x$fpl$dretinf) - __aeabi_f2d 0x08002029 Thumb Code 0 f2d.o(x$fpl$f2d) - _f2d 0x08002029 Thumb Code 86 f2d.o(x$fpl$f2d) - __fpl_fnaninf 0x0800207f Thumb Code 140 fnaninf.o(x$fpl$fnaninf) - _fp_init 0x0800210b Thumb Code 26 fpinit.o(x$fpl$fpinit) - __fplib_config_fpu_vfp 0x08002123 Thumb Code 0 fpinit.o(x$fpl$fpinit) - __fplib_config_pureend_doubles 0x08002123 Thumb Code 0 fpinit.o(x$fpl$fpinit) - _printf_fp_dec 0x08002125 Thumb Code 4 printf1.o(x$fpl$printf1) - __I$use$fp 0x08002128 Number 0 usenofp.o(x$fpl$usenofp) - testMarks_f32 0x080021d8 Data 320 main.o(.rodata.testMarks_f32) - testUnity_f32 0x08002318 Data 16 main.o(.rodata.testUnity_f32) - Region$$Table$$Base 0x08002328 Number 0 anon$$obj.o(Region$$Table) - Region$$Table$$Limit 0x08002348 Number 0 anon$$obj.o(Region$$Table) + SystemInit 0x08000b25 Thumb Code 104 system_at32f435_437.o(.text.SystemInit) + UsageFault_Handler 0x08000b8d Thumb Code 2 at32f435_437_int.o(.text.UsageFault_Handler) + _sys_exit 0x08000b91 Thumb Code 2 at32f435_437_board.o(.text._sys_exit) + arm_mat_mult_f32 0x08000b95 Thumb Code 344 matrixfunctions.o(.text.arm_mat_mult_f32) + arm_max_f32 0x08000ced Thumb Code 206 statisticsfunctions.o(.text.arm_max_f32) + arm_mean_f32 0x08000dbd Thumb Code 128 statisticsfunctions.o(.text.arm_mean_f32) + arm_min_f32 0x08000e3d Thumb Code 206 statisticsfunctions.o(.text.arm_min_f32) + arm_std_f32 0x08000f0d Thumb Code 80 statisticsfunctions.o(.text.arm_std_f32) + arm_var_f32 0x08000f5d Thumb Code 300 statisticsfunctions.o(.text.arm_var_f32) + crm_ahb_div_set 0x08001089 Thumb Code 26 at32f435_437_crm.o(.text.crm_ahb_div_set) + crm_apb1_div_set 0x080010a5 Thumb Code 26 at32f435_437_crm.o(.text.crm_apb1_div_set) + crm_apb2_div_set 0x080010c1 Thumb Code 26 at32f435_437_crm.o(.text.crm_apb2_div_set) + crm_auto_step_mode_enable 0x080010dd Thumb Code 26 at32f435_437_crm.o(.text.crm_auto_step_mode_enable) + crm_clock_source_enable 0x080010f9 Thumb Code 122 at32f435_437_crm.o(.text.crm_clock_source_enable) + crm_clocks_freq_get 0x08001175 Thumb Code 172 at32f435_437_crm.o(.text.crm_clocks_freq_get) + crm_flag_get 0x08001221 Thumb Code 26 at32f435_437_crm.o(.text.crm_flag_get) + crm_hext_stable_wait 0x0800123d Thumb Code 40 at32f435_437_crm.o(.text.crm_hext_stable_wait) + crm_periph_clock_enable 0x08001265 Thumb Code 40 at32f435_437_crm.o(.text.crm_periph_clock_enable) + crm_pll_config 0x0800128d Thumb Code 76 at32f435_437_crm.o(.text.crm_pll_config) + crm_reset 0x080012d9 Thumb Code 80 at32f435_437_crm.o(.text.crm_reset) + crm_sysclk_switch 0x08001329 Thumb Code 18 at32f435_437_crm.o(.text.crm_sysclk_switch) + crm_sysclk_switch_status_get 0x0800133d Thumb Code 16 at32f435_437_crm.o(.text.crm_sysclk_switch_status_get) + fputc 0x0800134d Thumb Code 36 at32f435_437_board.o(.text.fputc) + gpio_default_para_init 0x08001371 Thumb Code 14 at32f435_437_gpio.o(.text.gpio_default_para_init) + gpio_init 0x08001381 Thumb Code 132 at32f435_437_gpio.o(.text.gpio_init) + gpio_pin_mux_config 0x08001405 Thumb Code 46 at32f435_437_gpio.o(.text.gpio_pin_mux_config) + main 0x08001435 Thumb Code 332 main.o(.text.main) + system_clock_config 0x08001581 Thumb Code 148 at32f435_437_clock.o(.text.system_clock_config) + system_core_clock_update 0x08001615 Thumb Code 140 system_at32f435_437.o(.text.system_core_clock_update) + uart_print_init 0x080016a1 Thumb Code 110 at32f435_437_board.o(.text.uart_print_init) + usart_data_transmit 0x08001711 Thumb Code 8 at32f435_437_usart.o(.text.usart_data_transmit) + usart_enable 0x08001719 Thumb Code 18 at32f435_437_usart.o(.text.usart_enable) + usart_flag_get 0x0800172d Thumb Code 10 at32f435_437_usart.o(.text.usart_flag_get) + usart_init 0x08001739 Thumb Code 166 at32f435_437_usart.o(.text.usart_init) + usart_transmitter_enable 0x080017e1 Thumb Code 18 at32f435_437_usart.o(.text.usart_transmitter_enable) + _btod_d2e 0x080017f3 Thumb Code 62 btod.o(CL$$btod_d2e) + _d2e_denorm_low 0x08001831 Thumb Code 70 btod.o(CL$$btod_d2e_denorm_low) + _d2e_norm_op1 0x08001877 Thumb Code 96 btod.o(CL$$btod_d2e_norm_op1) + __btod_div_common 0x080018d7 Thumb Code 696 btod.o(CL$$btod_div_common) + _e2e 0x08001c0f Thumb Code 220 btod.o(CL$$btod_e2e) + _btod_ediv 0x08001ceb Thumb Code 42 btod.o(CL$$btod_ediv) + _btod_emul 0x08001d15 Thumb Code 42 btod.o(CL$$btod_emul) + __btod_mult_common 0x08001d3f Thumb Code 580 btod.o(CL$$btod_mult_common) + __ARM_fpclassify 0x08001f83 Thumb Code 48 fpclassify.o(i.__ARM_fpclassify) + __hardfp_sqrtf 0x08001fb3 Thumb Code 58 sqrtf.o(i.__hardfp_sqrtf) + _get_lc_numeric 0x08001fed Thumb Code 44 lc_numeric_c.o(locale$$code) + __fpl_dretinf 0x08002019 Thumb Code 12 dretinf.o(x$fpl$dretinf) + __aeabi_f2d 0x08002025 Thumb Code 0 f2d.o(x$fpl$f2d) + _f2d 0x08002025 Thumb Code 86 f2d.o(x$fpl$f2d) + __fpl_fnaninf 0x0800207b Thumb Code 140 fnaninf.o(x$fpl$fnaninf) + _fp_init 0x08002107 Thumb Code 26 fpinit.o(x$fpl$fpinit) + __fplib_config_fpu_vfp 0x0800211f Thumb Code 0 fpinit.o(x$fpl$fpinit) + __fplib_config_pureend_doubles 0x0800211f Thumb Code 0 fpinit.o(x$fpl$fpinit) + _printf_fp_dec 0x08002121 Thumb Code 4 printf1.o(x$fpl$printf1) + __I$use$fp 0x08002124 Number 0 usenofp.o(x$fpl$usenofp) + testMarks_f32 0x080021d0 Data 320 main.o(.rodata.testMarks_f32) + testUnity_f32 0x08002310 Data 16 main.o(.rodata.testUnity_f32) + Region$$Table$$Base 0x08002320 Number 0 anon$$obj.o(Region$$Table) + Region$$Table$$Limit 0x08002340 Number 0 anon$$obj.o(Region$$Table) numStudents 0x20000000 Data 4 main.o(.data.numStudents) system_core_clock 0x20000004 Data 4 system_at32f435_437.o(.data.system_core_clock) __libspace_start 0x20000008 Data 96 libspace.o(.bss) @@ -3590,9 +3590,9 @@ Memory Map of the image Image Entry point : 0x0800020d - Load Region LR_IROM1 (Base: 0x08000000, Size: 0x00002370, Max: 0x003f0000, ABSOLUTE) + Load Region LR_IROM1 (Base: 0x08000000, Size: 0x00002368, Max: 0x003f0000, ABSOLUTE) - Execution Region ER_IROM1 (Exec base: 0x08000000, Load base: 0x08000000, Size: 0x00002364, Max: 0x003f0000, ABSOLUTE) + Execution Region ER_IROM1 (Exec base: 0x08000000, Load base: 0x08000000, Size: 0x0000235c, Max: 0x003f0000, ABSOLUTE) Exec Addr Load Addr Size Type Attr Idx E Section Name Object @@ -3688,92 +3688,91 @@ Memory Map of the image 0x08000b1e 0x08000b1e 0x00000002 PAD 0x08000b20 0x08000b20 0x00000002 Code RO 41 .text.SysTick_Handler at32f435_437_int.o 0x08000b22 0x08000b22 0x00000002 PAD - 0x08000b24 0x08000b24 0x0000006c Code RO 105 .text.SystemInit system_at32f435_437.o - 0x08000b90 0x08000b90 0x00000002 Code RO 33 .text.UsageFault_Handler at32f435_437_int.o + 0x08000b24 0x08000b24 0x00000068 Code RO 105 .text.SystemInit system_at32f435_437.o + 0x08000b8c 0x08000b8c 0x00000002 Code RO 33 .text.UsageFault_Handler at32f435_437_int.o + 0x08000b8e 0x08000b8e 0x00000002 PAD + 0x08000b90 0x08000b90 0x00000002 Code RO 58 .text._sys_exit at32f435_437_board.o 0x08000b92 0x08000b92 0x00000002 PAD - 0x08000b94 0x08000b94 0x00000002 Code RO 58 .text._sys_exit at32f435_437_board.o - 0x08000b96 0x08000b96 0x00000002 PAD - 0x08000b98 0x08000b98 0x00000158 Code RO 1032 .text.arm_mat_mult_f32 matrixfunctions.o - 0x08000cf0 0x08000cf0 0x000000ce Code RO 1106 .text.arm_max_f32 statisticsfunctions.o - 0x08000dbe 0x08000dbe 0x00000002 PAD - 0x08000dc0 0x08000dc0 0x00000080 Code RO 1116 .text.arm_mean_f32 statisticsfunctions.o - 0x08000e40 0x08000e40 0x000000ce Code RO 1124 .text.arm_min_f32 statisticsfunctions.o - 0x08000f0e 0x08000f0e 0x00000002 PAD - 0x08000f10 0x08000f10 0x00000050 Code RO 1146 .text.arm_std_f32 statisticsfunctions.o - 0x08000f60 0x08000f60 0x0000012c Code RO 1148 .text.arm_var_f32 statisticsfunctions.o - 0x0800108c 0x0800108c 0x0000001a Code RO 155 .text.crm_ahb_div_set at32f435_437_crm.o - 0x080010a6 0x080010a6 0x00000002 PAD - 0x080010a8 0x080010a8 0x0000001a Code RO 157 .text.crm_apb1_div_set at32f435_437_crm.o - 0x080010c2 0x080010c2 0x00000002 PAD - 0x080010c4 0x080010c4 0x0000001a Code RO 159 .text.crm_apb2_div_set at32f435_437_crm.o - 0x080010de 0x080010de 0x00000002 PAD - 0x080010e0 0x080010e0 0x0000001a Code RO 167 .text.crm_auto_step_mode_enable at32f435_437_crm.o - 0x080010fa 0x080010fa 0x00000002 PAD - 0x080010fc 0x080010fc 0x0000007a Code RO 147 .text.crm_clock_source_enable at32f435_437_crm.o - 0x08001176 0x08001176 0x00000002 PAD - 0x08001178 0x08001178 0x000000ac Code RO 183 .text.crm_clocks_freq_get at32f435_437_crm.o - 0x08001224 0x08001224 0x0000001a Code RO 133 .text.crm_flag_get at32f435_437_crm.o - 0x0800123e 0x0800123e 0x00000002 PAD - 0x08001240 0x08001240 0x00000028 Code RO 135 .text.crm_hext_stable_wait at32f435_437_crm.o - 0x08001268 0x08001268 0x00000028 Code RO 141 .text.crm_periph_clock_enable at32f435_437_crm.o - 0x08001290 0x08001290 0x0000004c Code RO 177 .text.crm_pll_config at32f435_437_crm.o - 0x080012dc 0x080012dc 0x00000050 Code RO 127 .text.crm_reset at32f435_437_crm.o - 0x0800132c 0x0800132c 0x00000012 Code RO 179 .text.crm_sysclk_switch at32f435_437_crm.o - 0x0800133e 0x0800133e 0x00000002 PAD - 0x08001340 0x08001340 0x00000010 Code RO 181 .text.crm_sysclk_switch_status_get at32f435_437_crm.o - 0x08001350 0x08001350 0x00000024 Code RO 62 .text.fputc at32f435_437_board.o - 0x08001374 0x08001374 0x0000000e Code RO 209 .text.gpio_default_para_init at32f435_437_gpio.o - 0x08001382 0x08001382 0x00000002 PAD - 0x08001384 0x08001384 0x00000084 Code RO 207 .text.gpio_init at32f435_437_gpio.o - 0x08001408 0x08001408 0x0000002e Code RO 231 .text.gpio_pin_mux_config at32f435_437_gpio.o - 0x08001436 0x08001436 0x00000002 PAD - 0x08001438 0x08001438 0x0000014c Code RO 2 .text.main main.o - 0x08001584 0x08001584 0x00000094 Code RO 50 .text.system_clock_config at32f435_437_clock.o - 0x08001618 0x08001618 0x0000008c Code RO 107 .text.system_core_clock_update system_at32f435_437.o - 0x080016a4 0x080016a4 0x0000006e Code RO 64 .text.uart_print_init at32f435_437_board.o - 0x08001712 0x08001712 0x00000002 PAD - 0x08001714 0x08001714 0x00000008 Code RO 309 .text.usart_data_transmit at32f435_437_usart.o - 0x0800171c 0x0800171c 0x00000012 Code RO 283 .text.usart_enable at32f435_437_usart.o - 0x0800172e 0x0800172e 0x00000002 PAD - 0x08001730 0x08001730 0x0000000a Code RO 331 .text.usart_flag_get at32f435_437_usart.o - 0x0800173a 0x0800173a 0x00000002 PAD - 0x0800173c 0x0800173c 0x000000a6 Code RO 279 .text.usart_init at32f435_437_usart.o - 0x080017e2 0x080017e2 0x00000002 PAD - 0x080017e4 0x080017e4 0x00000012 Code RO 285 .text.usart_transmitter_enable at32f435_437_usart.o - 0x080017f6 0x080017f6 0x0000003e Code RO 1701 CL$$btod_d2e c_w.l(btod.o) - 0x08001834 0x08001834 0x00000046 Code RO 1703 CL$$btod_d2e_denorm_low c_w.l(btod.o) - 0x0800187a 0x0800187a 0x00000060 Code RO 1702 CL$$btod_d2e_norm_op1 c_w.l(btod.o) - 0x080018da 0x080018da 0x00000338 Code RO 1711 CL$$btod_div_common c_w.l(btod.o) - 0x08001c12 0x08001c12 0x000000dc Code RO 1708 CL$$btod_e2e c_w.l(btod.o) - 0x08001cee 0x08001cee 0x0000002a Code RO 1705 CL$$btod_ediv c_w.l(btod.o) - 0x08001d18 0x08001d18 0x0000002a Code RO 1704 CL$$btod_emul c_w.l(btod.o) - 0x08001d42 0x08001d42 0x00000244 Code RO 1710 CL$$btod_mult_common c_w.l(btod.o) - 0x08001f86 0x08001f86 0x00000030 Code RO 1734 i.__ARM_fpclassify m_wm.l(fpclassify.o) - 0x08001fb6 0x08001fb6 0x0000003a Code RO 1573 i.__hardfp_sqrtf m_wm.l(sqrtf.o) - 0x08001ff0 0x08001ff0 0x0000002c Code RO 1730 locale$$code c_w.l(lc_numeric_c.o) - 0x0800201c 0x0800201c 0x0000000c Code RO 1623 x$fpl$dretinf fz_wm.l(dretinf.o) - 0x08002028 0x08002028 0x00000056 Code RO 1509 x$fpl$f2d fz_wm.l(f2d.o) - 0x0800207e 0x0800207e 0x0000008c Code RO 1625 x$fpl$fnaninf fz_wm.l(fnaninf.o) - 0x0800210a 0x0800210a 0x0000001a Code RO 1816 x$fpl$fpinit fz_wm.l(fpinit.o) - 0x08002124 0x08002124 0x00000004 Code RO 1515 x$fpl$printf1 fz_wm.l(printf1.o) - 0x08002128 0x08002128 0x00000000 Code RO 1631 x$fpl$usenofp fz_wm.l(usenofp.o) - 0x08002128 0x08002128 0x00000094 Data RO 1699 .constdata c_w.l(bigflt0.o) - 0x080021bc 0x080021bc 0x00000004 PAD - 0x080021c0 0x080021c0 0x00000008 Data RO 11 .rodata..L__const.main.dstC main.o - 0x080021c8 0x080021c8 0x00000008 Data RO 8 .rodata..L__const.main.srcA main.o - 0x080021d0 0x080021d0 0x00000008 Data RO 9 .rodata..L__const.main.srcB main.o - 0x080021d8 0x080021d8 0x00000140 Data RO 4 .rodata.testMarks_f32 main.o - 0x08002318 0x08002318 0x00000010 Data RO 5 .rodata.testUnity_f32 main.o - 0x08002328 0x08002328 0x00000020 Data RO 1882 Region$$Table anon$$obj.o - 0x08002348 0x08002348 0x0000001c Data RO 1729 locale$$data c_w.l(lc_numeric_c.o) + 0x08000b94 0x08000b94 0x00000158 Code RO 1032 .text.arm_mat_mult_f32 matrixfunctions.o + 0x08000cec 0x08000cec 0x000000ce Code RO 1106 .text.arm_max_f32 statisticsfunctions.o + 0x08000dba 0x08000dba 0x00000002 PAD + 0x08000dbc 0x08000dbc 0x00000080 Code RO 1116 .text.arm_mean_f32 statisticsfunctions.o + 0x08000e3c 0x08000e3c 0x000000ce Code RO 1124 .text.arm_min_f32 statisticsfunctions.o + 0x08000f0a 0x08000f0a 0x00000002 PAD + 0x08000f0c 0x08000f0c 0x00000050 Code RO 1146 .text.arm_std_f32 statisticsfunctions.o + 0x08000f5c 0x08000f5c 0x0000012c Code RO 1148 .text.arm_var_f32 statisticsfunctions.o + 0x08001088 0x08001088 0x0000001a Code RO 155 .text.crm_ahb_div_set at32f435_437_crm.o + 0x080010a2 0x080010a2 0x00000002 PAD + 0x080010a4 0x080010a4 0x0000001a Code RO 157 .text.crm_apb1_div_set at32f435_437_crm.o + 0x080010be 0x080010be 0x00000002 PAD + 0x080010c0 0x080010c0 0x0000001a Code RO 159 .text.crm_apb2_div_set at32f435_437_crm.o + 0x080010da 0x080010da 0x00000002 PAD + 0x080010dc 0x080010dc 0x0000001a Code RO 167 .text.crm_auto_step_mode_enable at32f435_437_crm.o + 0x080010f6 0x080010f6 0x00000002 PAD + 0x080010f8 0x080010f8 0x0000007a Code RO 147 .text.crm_clock_source_enable at32f435_437_crm.o + 0x08001172 0x08001172 0x00000002 PAD + 0x08001174 0x08001174 0x000000ac Code RO 183 .text.crm_clocks_freq_get at32f435_437_crm.o + 0x08001220 0x08001220 0x0000001a Code RO 133 .text.crm_flag_get at32f435_437_crm.o + 0x0800123a 0x0800123a 0x00000002 PAD + 0x0800123c 0x0800123c 0x00000028 Code RO 135 .text.crm_hext_stable_wait at32f435_437_crm.o + 0x08001264 0x08001264 0x00000028 Code RO 141 .text.crm_periph_clock_enable at32f435_437_crm.o + 0x0800128c 0x0800128c 0x0000004c Code RO 177 .text.crm_pll_config at32f435_437_crm.o + 0x080012d8 0x080012d8 0x00000050 Code RO 127 .text.crm_reset at32f435_437_crm.o + 0x08001328 0x08001328 0x00000012 Code RO 179 .text.crm_sysclk_switch at32f435_437_crm.o + 0x0800133a 0x0800133a 0x00000002 PAD + 0x0800133c 0x0800133c 0x00000010 Code RO 181 .text.crm_sysclk_switch_status_get at32f435_437_crm.o + 0x0800134c 0x0800134c 0x00000024 Code RO 62 .text.fputc at32f435_437_board.o + 0x08001370 0x08001370 0x0000000e Code RO 209 .text.gpio_default_para_init at32f435_437_gpio.o + 0x0800137e 0x0800137e 0x00000002 PAD + 0x08001380 0x08001380 0x00000084 Code RO 207 .text.gpio_init at32f435_437_gpio.o + 0x08001404 0x08001404 0x0000002e Code RO 231 .text.gpio_pin_mux_config at32f435_437_gpio.o + 0x08001432 0x08001432 0x00000002 PAD + 0x08001434 0x08001434 0x0000014c Code RO 2 .text.main main.o + 0x08001580 0x08001580 0x00000094 Code RO 50 .text.system_clock_config at32f435_437_clock.o + 0x08001614 0x08001614 0x0000008c Code RO 107 .text.system_core_clock_update system_at32f435_437.o + 0x080016a0 0x080016a0 0x0000006e Code RO 64 .text.uart_print_init at32f435_437_board.o + 0x0800170e 0x0800170e 0x00000002 PAD + 0x08001710 0x08001710 0x00000008 Code RO 309 .text.usart_data_transmit at32f435_437_usart.o + 0x08001718 0x08001718 0x00000012 Code RO 283 .text.usart_enable at32f435_437_usart.o + 0x0800172a 0x0800172a 0x00000002 PAD + 0x0800172c 0x0800172c 0x0000000a Code RO 331 .text.usart_flag_get at32f435_437_usart.o + 0x08001736 0x08001736 0x00000002 PAD + 0x08001738 0x08001738 0x000000a6 Code RO 279 .text.usart_init at32f435_437_usart.o + 0x080017de 0x080017de 0x00000002 PAD + 0x080017e0 0x080017e0 0x00000012 Code RO 285 .text.usart_transmitter_enable at32f435_437_usart.o + 0x080017f2 0x080017f2 0x0000003e Code RO 1701 CL$$btod_d2e c_w.l(btod.o) + 0x08001830 0x08001830 0x00000046 Code RO 1703 CL$$btod_d2e_denorm_low c_w.l(btod.o) + 0x08001876 0x08001876 0x00000060 Code RO 1702 CL$$btod_d2e_norm_op1 c_w.l(btod.o) + 0x080018d6 0x080018d6 0x00000338 Code RO 1711 CL$$btod_div_common c_w.l(btod.o) + 0x08001c0e 0x08001c0e 0x000000dc Code RO 1708 CL$$btod_e2e c_w.l(btod.o) + 0x08001cea 0x08001cea 0x0000002a Code RO 1705 CL$$btod_ediv c_w.l(btod.o) + 0x08001d14 0x08001d14 0x0000002a Code RO 1704 CL$$btod_emul c_w.l(btod.o) + 0x08001d3e 0x08001d3e 0x00000244 Code RO 1710 CL$$btod_mult_common c_w.l(btod.o) + 0x08001f82 0x08001f82 0x00000030 Code RO 1734 i.__ARM_fpclassify m_wm.l(fpclassify.o) + 0x08001fb2 0x08001fb2 0x0000003a Code RO 1573 i.__hardfp_sqrtf m_wm.l(sqrtf.o) + 0x08001fec 0x08001fec 0x0000002c Code RO 1730 locale$$code c_w.l(lc_numeric_c.o) + 0x08002018 0x08002018 0x0000000c Code RO 1623 x$fpl$dretinf fz_wm.l(dretinf.o) + 0x08002024 0x08002024 0x00000056 Code RO 1509 x$fpl$f2d fz_wm.l(f2d.o) + 0x0800207a 0x0800207a 0x0000008c Code RO 1625 x$fpl$fnaninf fz_wm.l(fnaninf.o) + 0x08002106 0x08002106 0x0000001a Code RO 1816 x$fpl$fpinit fz_wm.l(fpinit.o) + 0x08002120 0x08002120 0x00000004 Code RO 1515 x$fpl$printf1 fz_wm.l(printf1.o) + 0x08002124 0x08002124 0x00000000 Code RO 1631 x$fpl$usenofp fz_wm.l(usenofp.o) + 0x08002124 0x08002124 0x00000094 Data RO 1699 .constdata c_w.l(bigflt0.o) + 0x080021b8 0x080021b8 0x00000008 Data RO 11 .rodata..L__const.main.dstC main.o + 0x080021c0 0x080021c0 0x00000008 Data RO 8 .rodata..L__const.main.srcA main.o + 0x080021c8 0x080021c8 0x00000008 Data RO 9 .rodata..L__const.main.srcB main.o + 0x080021d0 0x080021d0 0x00000140 Data RO 4 .rodata.testMarks_f32 main.o + 0x08002310 0x08002310 0x00000010 Data RO 5 .rodata.testUnity_f32 main.o + 0x08002320 0x08002320 0x00000020 Data RO 1882 Region$$Table anon$$obj.o + 0x08002340 0x08002340 0x0000001c Data RO 1729 locale$$data c_w.l(lc_numeric_c.o) - Execution Region RW_IRAM1 (Exec base: 0x20000000, Load base: 0x08002368, Size: 0x00000818, Max: 0x00060000, ABSOLUTE) + Execution Region RW_IRAM1 (Exec base: 0x20000000, Load base: 0x08002360, Size: 0x00000818, Max: 0x00060000, ABSOLUTE) Exec Addr Load Addr Size Type Attr Idx E Section Name Object - 0x20000000 0x08002368 0x00000004 Data RW 6 .data.numStudents main.o - 0x20000004 0x0800236c 0x00000004 Data RW 109 .data.system_core_clock system_at32f435_437.o + 0x20000000 0x08002360 0x00000004 Data RW 6 .data.numStudents main.o + 0x20000004 0x08002364 0x00000004 Data RW 109 .data.system_core_clock system_at32f435_437.o 0x20000008 - 0x00000060 Zero RW 1737 .bss c_w.l(libspace.o) 0x20000068 - 0x00000054 Zero RW 96 .bss.__stdout at32f435_437_board.o 0x200000bc - 0x00000004 Zero RW 12 .bss.max_marks main.o @@ -3783,7 +3782,7 @@ Memory Map of the image 0x200000cc - 0x00000004 Zero RW 13 .bss.student_num main.o 0x200000d0 - 0x00000140 Zero RW 10 .bss.testOutput main.o 0x20000210 - 0x00000004 Zero RW 17 .bss.var main.o - 0x20000214 0x08002370 0x00000004 PAD + 0x20000214 0x08002368 0x00000004 PAD 0x20000218 - 0x00000200 Zero RW 118 HEAP startup_at32f435_437.o 0x20000418 - 0x00000400 Zero RW 117 STACK startup_at32f435_437.o @@ -3797,18 +3796,18 @@ Image component sizes 148 0 0 0 84 15083 at32f435_437_board.o 148 0 0 0 0 8693 at32f435_437_clock.o - 694 38 0 0 0 28133 at32f435_437_crm.o + 694 38 0 0 0 28231 at32f435_437_crm.o 192 0 0 0 0 12093 at32f435_437_gpio.o 18 0 0 0 0 1083 at32f435_437_int.o - 220 0 0 0 0 12634 at32f435_437_usart.o + 220 0 0 0 0 12695 at32f435_437_usart.o 332 64 360 4 344 1461 main.o 344 4 0 0 0 43566 matrixfunctions.o 64 26 524 0 1536 1044 startup_at32f435_437.o 920 12 0 0 0 23010 statisticsfunctions.o - 248 24 0 4 0 11913 system_at32f435_437.o + 244 24 0 4 0 11905 system_at32f435_437.o ---------------------------------------------------------------------- - 3378 168 916 8 1968 158713 Object Totals + 3374 168 916 8 1968 158864 Object Totals 0 0 32 0 0 0 (incl. Generated) 50 0 0 0 4 0 (incl. Padding) @@ -3863,8 +3862,8 @@ Image component sizes 58 0 0 0 0 136 sqrtf.o ---------------------------------------------------------------------- - 4586 200 180 0 96 3348 Library Totals - 12 0 4 0 0 0 (incl. Padding) + 4586 200 176 0 96 3348 Library Totals + 12 0 0 0 0 0 (incl. Padding) ---------------------------------------------------------------------- @@ -3875,7 +3874,7 @@ Image component sizes 106 0 0 0 0 260 m_wm.l ---------------------------------------------------------------------- - 4586 200 180 0 96 3348 Library Totals + 4586 200 176 0 96 3348 Library Totals ---------------------------------------------------------------------- @@ -3884,15 +3883,15 @@ Image component sizes Code (inc. data) RO Data RW Data ZI Data Debug - 7964 368 1096 8 2064 160117 Grand Totals - 7964 368 1096 8 2064 160117 ELF Image Totals - 7964 368 1096 8 0 0 ROM Totals + 7960 368 1092 8 2064 160268 Grand Totals + 7960 368 1092 8 2064 160268 ELF Image Totals + 7960 368 1092 8 0 0 ROM Totals ============================================================================== - Total RO Size (Code + RO Data) 9060 ( 8.85kB) + Total RO Size (Code + RO Data) 9052 ( 8.84kB) Total RW Size (RW Data + ZI Data) 2072 ( 2.02kB) - Total ROM Size (Code + RO Data + RW Data) 9068 ( 8.86kB) + Total ROM Size (Code + RO Data + RW Data) 9060 ( 8.85kB) ============================================================================== diff --git a/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Listings/startup_at32f435_437.lst b/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Listings/startup_at32f435_437.lst index c0965156..c570a0bf 100644 --- a/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Listings/startup_at32f435_437.lst +++ b/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Listings/startup_at32f435_437.lst @@ -7,8 +7,8 @@ ARM Macro Assembler Page 1 1 00000000 ;******************************************************* ******************* 2 00000000 ;* @file startup_at32f435_437.s - 3 00000000 ;* @version v2.0.8 - 4 00000000 ;* @date 2022-04-25 + 3 00000000 ;* @version v2.0.9 + 4 00000000 ;* @date 2022-06-28 5 00000000 ;* @brief at32f435_437 startup file for keil 6 00000000 ;******************************************************* ******************* diff --git a/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/at32f435_437_board.o b/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/at32f435_437_board.o index eb0135d7..2074386f 100644 Binary files a/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/at32f435_437_board.o and b/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/at32f435_437_board.o differ diff --git a/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/at32f435_437_clock.o b/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/at32f435_437_clock.o index 3ff424e3..2d3d42cc 100644 Binary files a/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/at32f435_437_clock.o and b/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/at32f435_437_clock.o differ diff --git a/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/at32f435_437_crm.o b/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/at32f435_437_crm.o index 529863e0..6ea0ab55 100644 Binary files a/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/at32f435_437_crm.o and b/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/at32f435_437_crm.o differ diff --git a/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/at32f435_437_gpio.o b/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/at32f435_437_gpio.o index bcb3ddab..9beee6c0 100644 Binary files a/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/at32f435_437_gpio.o and b/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/at32f435_437_gpio.o differ diff --git a/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/at32f435_437_int.o b/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/at32f435_437_int.o index 7e40050f..35aa5086 100644 Binary files a/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/at32f435_437_int.o and b/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/at32f435_437_int.o differ diff --git a/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/at32f435_437_misc.o b/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/at32f435_437_misc.o index 5be1f6ed..f3691e70 100644 Binary files a/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/at32f435_437_misc.o and b/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/at32f435_437_misc.o differ diff --git a/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/at32f435_437_usart.o b/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/at32f435_437_usart.o index 5da1f5e7..12575182 100644 Binary files a/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/at32f435_437_usart.o and b/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/at32f435_437_usart.o differ diff --git a/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/basicmathfunctions.o b/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/basicmathfunctions.o index 46ffba20..be1b52c9 100644 Binary files a/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/basicmathfunctions.o and b/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/basicmathfunctions.o differ diff --git a/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/bayesfunctions.o b/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/bayesfunctions.o index a4ad24e9..08483011 100644 Binary files a/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/bayesfunctions.o and b/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/bayesfunctions.o differ diff --git a/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/cmsis_dsp.axf b/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/cmsis_dsp.axf index a9527679..eb45271a 100644 Binary files a/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/cmsis_dsp.axf and b/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/cmsis_dsp.axf differ diff --git a/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/cmsis_dsp.build_log.htm b/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/cmsis_dsp.build_log.htm index 1699d15b..7296d9cd 100644 --- a/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/cmsis_dsp.build_log.htm +++ b/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/cmsis_dsp.build_log.htm @@ -21,37 +21,37 @@ Target DLL: UL2CM3.DLL V1.163.4.0 Dialog DLL: TCM.DLL V1.46.0.0

Project:

-F:\WorkSrc\BSPs_PACKs\package_shell\AT32F435_437_Firmware_Library_V2.0.8\project\at_start_f437\examples\cortex_m4\cmsis_dsp\mdk_v5\cmsis_dsp.uvprojx -Project File Date: 04/26/2022 +F:\WorkSrc\BSPs_PACKs\package_shell\AT32F435_437_Firmware_Library_V2.0.9\project\at_start_f437\examples\cortex_m4\cmsis_dsp\mdk_v5\cmsis_dsp.uvprojx +Project File Date: 06/28/2022

Output:

*** Using Compiler 'V6.14', folder: 'C:\Keil_v5\ARM\ARMCLANG\Bin' Build target 'cmsis_dsp' assembling startup_at32f435_437.s... -compiling at32f435_437_int.c... -compiling at32f435_437_misc.c... -compiling system_at32f435_437.c... -compiling at32f435_437_gpio.c... -compiling at32f435_437_clock.c... -compiling at32f435_437_usart.c... -compiling main.c... -compiling at32f435_437_board.c... compiling at32f435_437_crm.c... -compiling BayesFunctions.c... -compiling ControllerFunctions.c... +compiling at32f435_437_clock.c... +compiling system_at32f435_437.c... +compiling at32f435_437_misc.c... +compiling at32f435_437_usart.c... +compiling at32f435_437_board.c... +compiling main.c... +compiling at32f435_437_int.c... +compiling at32f435_437_gpio.c... compiling BasicMathFunctions.c... +compiling BayesFunctions.c... +compiling ComplexMathFunctions.c... +compiling SVMFunctions.c... +compiling CommonTables.c... compiling FastMathFunctions.c... compiling DistanceFunctions.c... -compiling SVMFunctions.c... -compiling ComplexMathFunctions.c... +compiling ControllerFunctions.c... +compiling MatrixFunctions.c... compiling StatisticsFunctions.c... compiling SupportFunctions.c... -compiling MatrixFunctions.c... -compiling CommonTables.c... compiling TransformFunctions.c... compiling FilteringFunctions.c... linking... -Program Size: Code=7964 RO-data=1096 RW-data=8 ZI-data=2064 +Program Size: Code=7960 RO-data=1092 RW-data=8 ZI-data=2064 FromELF: creating hex file... ".\Objects\cmsis_dsp.axf" - 0 Error(s), 0 Warning(s). @@ -66,7 +66,7 @@ Package Vendor: ArteryTek C:\Users\sheltonyu\AppData\Local\Arm\Packs\ArteryTek\AT32F435_437_DFP\2.0.1\Device\Include

Collection of Component Files used:

-Build Time Elapsed: 00:00:04 +Build Time Elapsed: 00:00:07 diff --git a/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/cmsis_dsp.hex b/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/cmsis_dsp.hex index 236854e9..bb0a245b 100644 --- a/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/cmsis_dsp.hex +++ b/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/cmsis_dsp.hex @@ -1,6 +1,6 @@ :020000040800F2 :1000000018080020C5020008150B00080D0B000899 -:10001000110B0008050B0008910B00080000000000 +:10001000110B0008050B00088D0B00080000000004 :100020000000000000000000000000001D0B0008A0 :10003000090B000800000000190B0008210B000844 :10004000DF020008DF020008DF020008DF0200080C @@ -35,15 +35,15 @@ :1002100000F049F80AA090E8000C82448344AAF157 :100220000107DA4501D100F03EF8AFF2090EBAE855 :100230000F0013F0010F18BFFB1A43F0010318471A -:10024000E820000008210000103A24BF78C878C1D7 +:10024000E020000000210000103A24BF78C878C1E7 :10025000FAD8520724BF30C830C144BF04680C60CC :10026000704700000023002400250026103A28BF14 :1002700078C1FBD8520728BF30C148BF0B60704718 -:10028000662901F04F87002070471FB501F03DFF40 -:1002900000F0AAFA04000020002101F0A9FEE060AD +:10028000662901F04D87002070471FB501F03BFF44 +:1002900000F0AAFA04000020002101F0A7FEE060AF :1002A0001FBD10B510BD00F0BFFB1146FFF7EDFFFD -:1002B00001F0C2F800F0DDFB03B4FFF7F2FF03BC6E -:1002C00000F068FC0948804709480047FEE7FEE760 +:1002B00001F0C0F800F0DDFB03B4FFF7F2FF03BC70 +:1002C00000F066FC0948804709480047FEE7FEE762 :1002D000FEE7FEE7FEE7FEE7FEE7FEE7FEE7FEE7F6 :1002E00004480549054A064B70470000250B0008E5 :1002F0000D02000818020020180800201804002031 @@ -69,11 +69,11 @@ :10043000FBDB30460022002121540B99C1F80880D3 :10044000C1E900200FB0BDE8F08FBD1B6D1CDEE7D9 :100450004A4600DA694206A800F06CFA06AB93E857 -:10046000070003AB83E8070050460A9901F0C3F97F +:10046000070003AB83E8070050460A9901F0C1F981 :100470008DE80700A0F500501F3800900398002D6C :100480000ADD42F21F014A460844002303A90390F3 -:10049000684601F02CFC09E0A0F500504A461F38E0 -:1004A000002303A90390684601F036FC8DE807009D +:10049000684601F02AFC09E0A0F500504A461F38E2 +:1004A000002303A90390684601F034FC8DE807009F :1004B0000004000C03D04FF0FF30410800E010466C :1004C000B8F1000F03D00022009215461EE0751E01 :1004D00005D400F091F9303262556D1EF9D5B3465E @@ -86,7 +86,7 @@ :100540000B98099AC0F80880C0E9002B7AE71126B9 :100550004FF0000857E72DE9F04F88460446D21DBA :1005600022F0070191B0D1E90001CDE90A0101F0C3 -:100570000AFD02460B98C00F01D02D2007E020682D +:1005700008FD02460B98C00F01D02D2007E020682F :10058000810701D52B2002E0202101EAC000032AC7 :10059000099001D0072A05DB03464146204600F0BA :1005A00089F90BE12078800601D5E06900E006209A @@ -125,7 +125,7 @@ :1007B000A7F10107F3DC2046AFF30080032011B05E :1007C00041E60000074B70B50D467B4400F05FF832 :1007D0000446284600F020F910B14FF0FF3070BDFC -:1007E000204670BD830B00000048704728000020A1 +:1007E000204670BD7F0B00000048704728000020A5 :1007F000004870470800002030B5B0F10A0271F1DE :1008000000034FEA900E4EEA817EB0EB0E0061EBE2 :1008100091014FEA101E4EEA017E10EB0E0041EBF3 @@ -152,15 +152,15 @@ :10096000F1F290FBF1F5A5F1800501FB12041B3CAF :1009700002D56442012000E00020DFF898A0804604 :100980000027FA44AAF1BE0A0EE0E0070AD0324678 -:10099000684607EB470101230AEB810101F0BCF92E +:10099000684607EB470101230AEB810101F0BAF930 :1009A0008DE8070064107F1C002CEED1194F7F44A6 :1009B000AE3F19E0E80715D007EB04100DF1180A57 :1009C00090E80E008AE80E00C068F04201D1981944 -:1009D00008903246012306A903A801F09DF903AB54 +:1009D00008903246012306A903A801F09BF903AB56 :1009E00083E807006D10641C002DE3D14FF0010374 -:1009F00032466946B8F1000F03A802D001F077F93A -:100A000001E001F089F9C9E90001C9F808200AB03C -:100A1000BDE8F08760180000007B00F080007047A0 +:1009F00032466946B8F1000F03A802D001F075F93C +:100A000001E001F087F9C9E90001C9F808200AB03E +:100A1000BDE8F0875C180000007B00F080007047A4 :100A200000487047080000207546FFF7F9FFAE4602 :100A300005006946534620F00700854618B020B5EA :100A4000FFF74EFCBDE820404FF000064FF00007D6 @@ -177,394 +177,394 @@ :100AF000F2D1CA40CB4012F0FF0213F0FF0330BC2A :100B0000D01A7047FEE7000070470000FEE70000C3 :100B1000FEE70000704700007047000070470000CB -:100B2000704700004EF6885CCEF2000CDCF8002026 -:100B300043F6000142F47002C4F20201CCF8002036 -:100B40000A6842F001020A600A689207FCD58A68C6 -:100B500022F003028A6000BF8A6812F00C0FFBD1FA -:100B600000228A600B684FF6FF70CFF6F2601840E3 -:100B7000086043F20200C0F2030048604FF41F0017 -:100B8000C1F8A020C8604FF000604CF8800C70479E -:100B9000FEE70000704700002DE9F04F88B0B0F884 -:100BA00002E00B889E4540F09680048813889C42A2 -:100BB00040F09380B1F802905388994540F08F80BF -:100BC0004B685168406802914FEA9E0C2EF0030179 -:100BD00000EB81060CFB09F103EB01119FED430AC9 -:100BE0000EF0030503930191A0F110014FEA8E026C -:100BF0004FEA890700230092CDE9049E0FE000BF71 -:100C0000DDF81090069BDDF814E0079C009A4B4439 -:100C100000EB8E00013C06EB8E06114461D0029A77 -:100C2000DDF80C80DDF804A002EB830BCE460794C0 -:100C3000069308E0ABEC011ABEF1010E08F10408BE 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+:1022B0000000004200008E4200003C4200009A42B2 +:1022C0000000F841000048420000444200000C4277 +:1022D00000007C4200008642000020420000F841DD +:1022E0000000E841000088420000744200001842EB +:1022F0000000F8410000E0410000E0410000984289 +:1023000000005C42000004420000E84100001C4262 +:102310000000803F0000803F0000803F0000803FC1 +:1023200060230008000000200800000048020008A8 +:10233000682300080800002010080000640200085C +:102340001C00000043000000F8FFFFFF0C0000002D +:102350000E0000000F0000002E0000000000000032 +:082360001400000000127A00D5 :040000050800020DE0 :00000001FF diff --git a/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/cmsis_dsp.htm b/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/cmsis_dsp.htm index 12743db6..f921c718 100644 --- a/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/cmsis_dsp.htm +++ b/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/cmsis_dsp.htm @@ -3,7 +3,7 @@ Static Call Graph - [.\Objects\cmsis_dsp.axf]

Static Call Graph for image .\Objects\cmsis_dsp.axf

-

#<CALLGRAPH># ARM Linker, 6140002: Last Updated: Tue Apr 26 10:00:07 2022 +

#<CALLGRAPH># ARM Linker, 6140002: Last Updated: Tue Jun 28 20:43:07 2022

Maximum Stack Usage = 324 bytes + Unknown(Functions without stacksize, Cycles, Untraceable Function Pointers)

Call chain for Maximum Stack Depth:

@@ -782,7 +782,7 @@ Global Symbols

SysTick_Handler (Thumb, 2 bytes, Stack size 0 bytes, at32f435_437_int.o(.text.SysTick_Handler))
[Address Reference Count : 1]

  • startup_at32f435_437.o(RESET)
-

SystemInit (Thumb, 108 bytes, Stack size 0 bytes, system_at32f435_437.o(.text.SystemInit)) +

SystemInit (Thumb, 104 bytes, Stack size 0 bytes, system_at32f435_437.o(.text.SystemInit))
[Address Reference Count : 1]

  • startup_at32f435_437.o(.text)

UsageFault_Handler (Thumb, 2 bytes, Stack size 0 bytes, at32f435_437_int.o(.text.UsageFault_Handler)) diff --git a/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/commontables.o b/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/commontables.o index 213f702a..8c883e4e 100644 Binary files a/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/commontables.o and b/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/commontables.o differ diff --git a/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/complexmathfunctions.o b/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/complexmathfunctions.o index 14d8e8b9..a288b000 100644 Binary files a/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/complexmathfunctions.o and b/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/complexmathfunctions.o differ diff --git a/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/controllerfunctions.o b/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/controllerfunctions.o index f8c8e0df..5f5e01ad 100644 Binary files a/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/controllerfunctions.o and b/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/controllerfunctions.o differ diff --git a/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/distancefunctions.o b/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/distancefunctions.o index 202395c4..8176cd0c 100644 Binary files a/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/distancefunctions.o and b/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/distancefunctions.o differ diff --git a/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/fastmathfunctions.o b/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/fastmathfunctions.o index 5aac8d13..379b9b45 100644 Binary files a/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/fastmathfunctions.o and b/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/fastmathfunctions.o differ diff --git a/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/filteringfunctions.o b/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/filteringfunctions.o index dfed7d8f..e982a679 100644 Binary files a/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/filteringfunctions.o and b/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/filteringfunctions.o differ diff --git a/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/main.o b/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/main.o index e1737d3d..0a3007d5 100644 Binary files a/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/main.o and b/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/main.o differ diff --git a/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/matrixfunctions.o b/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/matrixfunctions.o index 5dd136b0..dec0c27a 100644 Binary files a/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/matrixfunctions.o and b/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/matrixfunctions.o differ diff --git a/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/startup_at32f435_437.o b/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/startup_at32f435_437.o index cd7a203d..4ab08bb4 100644 Binary files a/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/startup_at32f435_437.o and b/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/startup_at32f435_437.o differ diff --git a/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/statisticsfunctions.o b/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/statisticsfunctions.o index 021477a9..9af647b0 100644 Binary files a/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/statisticsfunctions.o and b/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/statisticsfunctions.o differ diff --git a/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/supportfunctions.o b/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/supportfunctions.o index c45c30d6..3a686862 100644 Binary files a/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/supportfunctions.o and b/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/supportfunctions.o differ diff --git a/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/svmfunctions.o b/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/svmfunctions.o index b47aba35..48904d40 100644 Binary files a/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/svmfunctions.o and b/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/svmfunctions.o differ diff --git a/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/system_at32f435_437.o b/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/system_at32f435_437.o index dddd5e28..44578e58 100644 Binary files a/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/system_at32f435_437.o and b/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/system_at32f435_437.o differ diff --git a/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/transformfunctions.o b/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/transformfunctions.o index f1724c8d..b5e108a0 100644 Binary files a/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/transformfunctions.o and b/project/at_start_f437/examples/cortex_m4/cmsis_dsp/mdk_v5/Objects/transformfunctions.o differ diff --git a/project/at_start_f437/examples/cortex_m4/cmsis_dsp/readme.txt b/project/at_start_f437/examples/cortex_m4/cmsis_dsp/readme.txt index 5c1c94f4..79a4f994 100644 --- a/project/at_start_f437/examples/cortex_m4/cmsis_dsp/readme.txt +++ b/project/at_start_f437/examples/cortex_m4/cmsis_dsp/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/cortex_m4/cmsis_dsp/src/at32f435_437_clock.c b/project/at_start_f437/examples/cortex_m4/cmsis_dsp/src/at32f435_437_clock.c index db8cceb4..da61dd39 100644 --- a/project/at_start_f437/examples/cortex_m4/cmsis_dsp/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/cortex_m4/cmsis_dsp/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/cortex_m4/cmsis_dsp/src/at32f435_437_int.c b/project/at_start_f437/examples/cortex_m4/cmsis_dsp/src/at32f435_437_int.c index 1e012d85..876c05e4 100644 --- a/project/at_start_f437/examples/cortex_m4/cmsis_dsp/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/cortex_m4/cmsis_dsp/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/cortex_m4/cmsis_dsp/src/main.c b/project/at_start_f437/examples/cortex_m4/cmsis_dsp/src/main.c index 085249fb..d38a6c8e 100644 --- a/project/at_start_f437/examples/cortex_m4/cmsis_dsp/src/main.c +++ b/project/at_start_f437/examples/cortex_m4/cmsis_dsp/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/cortex_m4/fpu/inc/at32f435_437_clock.h b/project/at_start_f437/examples/cortex_m4/fpu/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/cortex_m4/fpu/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/cortex_m4/fpu/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/cortex_m4/fpu/inc/at32f435_437_conf.h b/project/at_start_f437/examples/cortex_m4/fpu/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/cortex_m4/fpu/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/cortex_m4/fpu/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/cortex_m4/fpu/inc/at32f435_437_int.h b/project/at_start_f437/examples/cortex_m4/fpu/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/cortex_m4/fpu/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/cortex_m4/fpu/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/cortex_m4/fpu/inc/julia_fpu.h b/project/at_start_f437/examples/cortex_m4/fpu/inc/julia_fpu.h index b43d6760..a5a0c310 100644 --- a/project/at_start_f437/examples/cortex_m4/fpu/inc/julia_fpu.h +++ b/project/at_start_f437/examples/cortex_m4/fpu/inc/julia_fpu.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file julia_fpu.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief julia_fpu header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/cortex_m4/fpu/readme.txt b/project/at_start_f437/examples/cortex_m4/fpu/readme.txt index 721e46e2..e463ffe3 100644 --- a/project/at_start_f437/examples/cortex_m4/fpu/readme.txt +++ b/project/at_start_f437/examples/cortex_m4/fpu/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/cortex_m4/fpu/src/at32f435_437_clock.c b/project/at_start_f437/examples/cortex_m4/fpu/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/cortex_m4/fpu/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/cortex_m4/fpu/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/cortex_m4/fpu/src/at32f435_437_int.c b/project/at_start_f437/examples/cortex_m4/fpu/src/at32f435_437_int.c index 30460cd1..31540342 100644 --- a/project/at_start_f437/examples/cortex_m4/fpu/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/cortex_m4/fpu/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/cortex_m4/fpu/src/julia_fpu.c b/project/at_start_f437/examples/cortex_m4/fpu/src/julia_fpu.c index 8a57dec7..df50f92a 100644 --- a/project/at_start_f437/examples/cortex_m4/fpu/src/julia_fpu.c +++ b/project/at_start_f437/examples/cortex_m4/fpu/src/julia_fpu.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file julia_fpu.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief julia_fpu source file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/cortex_m4/fpu/src/main.c b/project/at_start_f437/examples/cortex_m4/fpu/src/main.c index d8da1f8b..364c50c8 100644 --- a/project/at_start_f437/examples/cortex_m4/fpu/src/main.c +++ b/project/at_start_f437/examples/cortex_m4/fpu/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/cortex_m4/systick_interrupt/inc/at32f435_437_clock.h b/project/at_start_f437/examples/cortex_m4/systick_interrupt/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/cortex_m4/systick_interrupt/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/cortex_m4/systick_interrupt/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/cortex_m4/systick_interrupt/inc/at32f435_437_conf.h b/project/at_start_f437/examples/cortex_m4/systick_interrupt/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/cortex_m4/systick_interrupt/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/cortex_m4/systick_interrupt/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/cortex_m4/systick_interrupt/inc/at32f435_437_int.h b/project/at_start_f437/examples/cortex_m4/systick_interrupt/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/cortex_m4/systick_interrupt/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/cortex_m4/systick_interrupt/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/cortex_m4/systick_interrupt/readme.txt b/project/at_start_f437/examples/cortex_m4/systick_interrupt/readme.txt index 8ad44560..e7612acb 100644 --- a/project/at_start_f437/examples/cortex_m4/systick_interrupt/readme.txt +++ b/project/at_start_f437/examples/cortex_m4/systick_interrupt/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/cortex_m4/systick_interrupt/src/at32f435_437_clock.c b/project/at_start_f437/examples/cortex_m4/systick_interrupt/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/cortex_m4/systick_interrupt/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/cortex_m4/systick_interrupt/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/cortex_m4/systick_interrupt/src/at32f435_437_int.c b/project/at_start_f437/examples/cortex_m4/systick_interrupt/src/at32f435_437_int.c index ecaa86d5..c59e8f89 100644 --- a/project/at_start_f437/examples/cortex_m4/systick_interrupt/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/cortex_m4/systick_interrupt/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/cortex_m4/systick_interrupt/src/main.c b/project/at_start_f437/examples/cortex_m4/systick_interrupt/src/main.c index 5b04b154..69985f2a 100644 --- a/project/at_start_f437/examples/cortex_m4/systick_interrupt/src/main.c +++ b/project/at_start_f437/examples/cortex_m4/systick_interrupt/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/crc/calculation/inc/at32f435_437_clock.h b/project/at_start_f437/examples/crc/calculation/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/crc/calculation/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/crc/calculation/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/crc/calculation/inc/at32f435_437_conf.h b/project/at_start_f437/examples/crc/calculation/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/crc/calculation/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/crc/calculation/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/crc/calculation/inc/at32f435_437_int.h b/project/at_start_f437/examples/crc/calculation/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/crc/calculation/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/crc/calculation/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/crc/calculation/readme.txt b/project/at_start_f437/examples/crc/calculation/readme.txt index c0aa7dfa..608c9d38 100644 --- a/project/at_start_f437/examples/crc/calculation/readme.txt +++ b/project/at_start_f437/examples/crc/calculation/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/crc/calculation/src/at32f435_437_clock.c b/project/at_start_f437/examples/crc/calculation/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/crc/calculation/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/crc/calculation/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/crc/calculation/src/at32f435_437_int.c b/project/at_start_f437/examples/crc/calculation/src/at32f435_437_int.c index c8bdcd8a..25d48d37 100644 --- a/project/at_start_f437/examples/crc/calculation/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/crc/calculation/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/crc/calculation/src/main.c b/project/at_start_f437/examples/crc/calculation/src/main.c index 009b1c10..1ca118ac 100644 --- a/project/at_start_f437/examples/crc/calculation/src/main.c +++ b/project/at_start_f437/examples/crc/calculation/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/crm/clock_failure_detection/inc/at32f435_437_clock.h b/project/at_start_f437/examples/crm/clock_failure_detection/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/crm/clock_failure_detection/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/crm/clock_failure_detection/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/crm/clock_failure_detection/inc/at32f435_437_conf.h b/project/at_start_f437/examples/crm/clock_failure_detection/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/crm/clock_failure_detection/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/crm/clock_failure_detection/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/crm/clock_failure_detection/inc/at32f435_437_int.h b/project/at_start_f437/examples/crm/clock_failure_detection/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/crm/clock_failure_detection/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/crm/clock_failure_detection/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/crm/clock_failure_detection/readme.txt b/project/at_start_f437/examples/crm/clock_failure_detection/readme.txt index cca575ad..8a15e917 100644 --- a/project/at_start_f437/examples/crm/clock_failure_detection/readme.txt +++ b/project/at_start_f437/examples/crm/clock_failure_detection/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/crm/clock_failure_detection/src/at32f435_437_clock.c b/project/at_start_f437/examples/crm/clock_failure_detection/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/crm/clock_failure_detection/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/crm/clock_failure_detection/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/crm/clock_failure_detection/src/at32f435_437_int.c b/project/at_start_f437/examples/crm/clock_failure_detection/src/at32f435_437_int.c index 1837e64b..860b5a70 100644 --- a/project/at_start_f437/examples/crm/clock_failure_detection/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/crm/clock_failure_detection/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/crm/clock_failure_detection/src/main.c b/project/at_start_f437/examples/crm/clock_failure_detection/src/main.c index 8957c96a..d9647653 100644 --- a/project/at_start_f437/examples/crm/clock_failure_detection/src/main.c +++ b/project/at_start_f437/examples/crm/clock_failure_detection/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/crm/pll_parameter_calculate/inc/at32f435_437_clock.h b/project/at_start_f437/examples/crm/pll_parameter_calculate/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/crm/pll_parameter_calculate/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/crm/pll_parameter_calculate/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/crm/pll_parameter_calculate/inc/at32f435_437_conf.h b/project/at_start_f437/examples/crm/pll_parameter_calculate/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/crm/pll_parameter_calculate/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/crm/pll_parameter_calculate/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/crm/pll_parameter_calculate/inc/at32f435_437_int.h b/project/at_start_f437/examples/crm/pll_parameter_calculate/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/crm/pll_parameter_calculate/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/crm/pll_parameter_calculate/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/crm/pll_parameter_calculate/readme.txt b/project/at_start_f437/examples/crm/pll_parameter_calculate/readme.txt index 9f286dff..f8c84d47 100644 --- a/project/at_start_f437/examples/crm/pll_parameter_calculate/readme.txt +++ b/project/at_start_f437/examples/crm/pll_parameter_calculate/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/crm/pll_parameter_calculate/src/at32f435_437_clock.c b/project/at_start_f437/examples/crm/pll_parameter_calculate/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/crm/pll_parameter_calculate/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/crm/pll_parameter_calculate/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/crm/pll_parameter_calculate/src/at32f435_437_int.c b/project/at_start_f437/examples/crm/pll_parameter_calculate/src/at32f435_437_int.c index ecb7d65c..5aa8763c 100644 --- a/project/at_start_f437/examples/crm/pll_parameter_calculate/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/crm/pll_parameter_calculate/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/crm/pll_parameter_calculate/src/main.c b/project/at_start_f437/examples/crm/pll_parameter_calculate/src/main.c index 2ad38783..c077cbc9 100644 --- a/project/at_start_f437/examples/crm/pll_parameter_calculate/src/main.c +++ b/project/at_start_f437/examples/crm/pll_parameter_calculate/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/crm/sysclk_switch/inc/at32f435_437_clock.h b/project/at_start_f437/examples/crm/sysclk_switch/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/crm/sysclk_switch/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/crm/sysclk_switch/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/crm/sysclk_switch/inc/at32f435_437_conf.h b/project/at_start_f437/examples/crm/sysclk_switch/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/crm/sysclk_switch/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/crm/sysclk_switch/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/crm/sysclk_switch/inc/at32f435_437_int.h b/project/at_start_f437/examples/crm/sysclk_switch/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/crm/sysclk_switch/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/crm/sysclk_switch/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/crm/sysclk_switch/readme.txt b/project/at_start_f437/examples/crm/sysclk_switch/readme.txt index 43c40a1f..564b569f 100644 --- a/project/at_start_f437/examples/crm/sysclk_switch/readme.txt +++ b/project/at_start_f437/examples/crm/sysclk_switch/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/crm/sysclk_switch/src/at32f435_437_clock.c b/project/at_start_f437/examples/crm/sysclk_switch/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/crm/sysclk_switch/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/crm/sysclk_switch/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/crm/sysclk_switch/src/at32f435_437_int.c b/project/at_start_f437/examples/crm/sysclk_switch/src/at32f435_437_int.c index 989e9a0d..c05f1d92 100644 --- a/project/at_start_f437/examples/crm/sysclk_switch/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/crm/sysclk_switch/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/crm/sysclk_switch/src/main.c b/project/at_start_f437/examples/crm/sysclk_switch/src/main.c index c6bca836..ee88d159 100644 --- a/project/at_start_f437/examples/crm/sysclk_switch/src/main.c +++ b/project/at_start_f437/examples/crm/sysclk_switch/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/dac/double_mode_dma_sinewave/inc/at32f435_437_clock.h b/project/at_start_f437/examples/dac/double_mode_dma_sinewave/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/dac/double_mode_dma_sinewave/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/dac/double_mode_dma_sinewave/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/dac/double_mode_dma_sinewave/inc/at32f435_437_conf.h b/project/at_start_f437/examples/dac/double_mode_dma_sinewave/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/dac/double_mode_dma_sinewave/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/dac/double_mode_dma_sinewave/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/dac/double_mode_dma_sinewave/inc/at32f435_437_int.h b/project/at_start_f437/examples/dac/double_mode_dma_sinewave/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/dac/double_mode_dma_sinewave/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/dac/double_mode_dma_sinewave/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/dac/double_mode_dma_sinewave/readme.txt b/project/at_start_f437/examples/dac/double_mode_dma_sinewave/readme.txt index 850f3244..e573ca52 100644 --- a/project/at_start_f437/examples/dac/double_mode_dma_sinewave/readme.txt +++ b/project/at_start_f437/examples/dac/double_mode_dma_sinewave/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/dac/double_mode_dma_sinewave/src/at32f435_437_clock.c b/project/at_start_f437/examples/dac/double_mode_dma_sinewave/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/dac/double_mode_dma_sinewave/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/dac/double_mode_dma_sinewave/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/dac/double_mode_dma_sinewave/src/at32f435_437_int.c b/project/at_start_f437/examples/dac/double_mode_dma_sinewave/src/at32f435_437_int.c index a82d6301..1f9c7e1a 100644 --- a/project/at_start_f437/examples/dac/double_mode_dma_sinewave/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/dac/double_mode_dma_sinewave/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/dac/double_mode_dma_sinewave/src/main.c b/project/at_start_f437/examples/dac/double_mode_dma_sinewave/src/main.c index fa21f98e..51298c70 100644 --- a/project/at_start_f437/examples/dac/double_mode_dma_sinewave/src/main.c +++ b/project/at_start_f437/examples/dac/double_mode_dma_sinewave/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/dac/double_mode_dma_squarewave/inc/at32f435_437_clock.h b/project/at_start_f437/examples/dac/double_mode_dma_squarewave/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/dac/double_mode_dma_squarewave/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/dac/double_mode_dma_squarewave/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/dac/double_mode_dma_squarewave/inc/at32f435_437_conf.h b/project/at_start_f437/examples/dac/double_mode_dma_squarewave/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/dac/double_mode_dma_squarewave/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/dac/double_mode_dma_squarewave/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/dac/double_mode_dma_squarewave/inc/at32f435_437_int.h b/project/at_start_f437/examples/dac/double_mode_dma_squarewave/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/dac/double_mode_dma_squarewave/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/dac/double_mode_dma_squarewave/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/dac/double_mode_dma_squarewave/readme.txt b/project/at_start_f437/examples/dac/double_mode_dma_squarewave/readme.txt index e54d0413..29189f9a 100644 --- a/project/at_start_f437/examples/dac/double_mode_dma_squarewave/readme.txt +++ b/project/at_start_f437/examples/dac/double_mode_dma_squarewave/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/dac/double_mode_dma_squarewave/src/at32f435_437_clock.c b/project/at_start_f437/examples/dac/double_mode_dma_squarewave/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/dac/double_mode_dma_squarewave/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/dac/double_mode_dma_squarewave/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/dac/double_mode_dma_squarewave/src/at32f435_437_int.c b/project/at_start_f437/examples/dac/double_mode_dma_squarewave/src/at32f435_437_int.c index 5dbcd290..1903c8b8 100644 --- a/project/at_start_f437/examples/dac/double_mode_dma_squarewave/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/dac/double_mode_dma_squarewave/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/dac/double_mode_dma_squarewave/src/main.c b/project/at_start_f437/examples/dac/double_mode_dma_squarewave/src/main.c index 5554cb05..27098ee9 100644 --- a/project/at_start_f437/examples/dac/double_mode_dma_squarewave/src/main.c +++ b/project/at_start_f437/examples/dac/double_mode_dma_squarewave/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/dac/one_dac_dma_escalator/inc/at32f435_437_clock.h b/project/at_start_f437/examples/dac/one_dac_dma_escalator/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/dac/one_dac_dma_escalator/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/dac/one_dac_dma_escalator/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/dac/one_dac_dma_escalator/inc/at32f435_437_conf.h b/project/at_start_f437/examples/dac/one_dac_dma_escalator/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/dac/one_dac_dma_escalator/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/dac/one_dac_dma_escalator/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/dac/one_dac_dma_escalator/inc/at32f435_437_int.h b/project/at_start_f437/examples/dac/one_dac_dma_escalator/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/dac/one_dac_dma_escalator/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/dac/one_dac_dma_escalator/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/dac/one_dac_dma_escalator/readme.txt b/project/at_start_f437/examples/dac/one_dac_dma_escalator/readme.txt index a5ec4f45..9257260f 100644 --- a/project/at_start_f437/examples/dac/one_dac_dma_escalator/readme.txt +++ b/project/at_start_f437/examples/dac/one_dac_dma_escalator/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/dac/one_dac_dma_escalator/src/at32f435_437_clock.c b/project/at_start_f437/examples/dac/one_dac_dma_escalator/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/dac/one_dac_dma_escalator/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/dac/one_dac_dma_escalator/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/dac/one_dac_dma_escalator/src/at32f435_437_int.c b/project/at_start_f437/examples/dac/one_dac_dma_escalator/src/at32f435_437_int.c index ad06fcba..06396f48 100644 --- a/project/at_start_f437/examples/dac/one_dac_dma_escalator/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/dac/one_dac_dma_escalator/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/dac/one_dac_dma_escalator/src/main.c b/project/at_start_f437/examples/dac/one_dac_dma_escalator/src/main.c index 485bfced..23a4ed5f 100644 --- a/project/at_start_f437/examples/dac/one_dac_dma_escalator/src/main.c +++ b/project/at_start_f437/examples/dac/one_dac_dma_escalator/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/dac/one_dac_noisewave/inc/at32f435_437_clock.h b/project/at_start_f437/examples/dac/one_dac_noisewave/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/dac/one_dac_noisewave/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/dac/one_dac_noisewave/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/dac/one_dac_noisewave/inc/at32f435_437_conf.h b/project/at_start_f437/examples/dac/one_dac_noisewave/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/dac/one_dac_noisewave/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/dac/one_dac_noisewave/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/dac/one_dac_noisewave/inc/at32f435_437_int.h b/project/at_start_f437/examples/dac/one_dac_noisewave/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/dac/one_dac_noisewave/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/dac/one_dac_noisewave/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/dac/one_dac_noisewave/readme.txt b/project/at_start_f437/examples/dac/one_dac_noisewave/readme.txt index f5e43ccc..37bf29f9 100644 --- a/project/at_start_f437/examples/dac/one_dac_noisewave/readme.txt +++ b/project/at_start_f437/examples/dac/one_dac_noisewave/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/dac/one_dac_noisewave/src/at32f435_437_clock.c b/project/at_start_f437/examples/dac/one_dac_noisewave/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/dac/one_dac_noisewave/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/dac/one_dac_noisewave/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/dac/one_dac_noisewave/src/at32f435_437_int.c b/project/at_start_f437/examples/dac/one_dac_noisewave/src/at32f435_437_int.c index 0866f2e4..bb065442 100644 --- a/project/at_start_f437/examples/dac/one_dac_noisewave/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/dac/one_dac_noisewave/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/dac/one_dac_noisewave/src/main.c b/project/at_start_f437/examples/dac/one_dac_noisewave/src/main.c index 50128cf3..10228d2c 100644 --- a/project/at_start_f437/examples/dac/one_dac_noisewave/src/main.c +++ b/project/at_start_f437/examples/dac/one_dac_noisewave/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/dac/two_dac_trianglewave/inc/at32f435_437_clock.h b/project/at_start_f437/examples/dac/two_dac_trianglewave/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/dac/two_dac_trianglewave/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/dac/two_dac_trianglewave/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/dac/two_dac_trianglewave/inc/at32f435_437_conf.h b/project/at_start_f437/examples/dac/two_dac_trianglewave/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/dac/two_dac_trianglewave/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/dac/two_dac_trianglewave/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/dac/two_dac_trianglewave/inc/at32f435_437_int.h b/project/at_start_f437/examples/dac/two_dac_trianglewave/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/dac/two_dac_trianglewave/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/dac/two_dac_trianglewave/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/dac/two_dac_trianglewave/readme.txt b/project/at_start_f437/examples/dac/two_dac_trianglewave/readme.txt index 62f12324..dde5e7a3 100644 --- a/project/at_start_f437/examples/dac/two_dac_trianglewave/readme.txt +++ b/project/at_start_f437/examples/dac/two_dac_trianglewave/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/dac/two_dac_trianglewave/src/at32f435_437_clock.c b/project/at_start_f437/examples/dac/two_dac_trianglewave/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/dac/two_dac_trianglewave/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/dac/two_dac_trianglewave/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/dac/two_dac_trianglewave/src/at32f435_437_int.c b/project/at_start_f437/examples/dac/two_dac_trianglewave/src/at32f435_437_int.c index d6361720..d3daa4cb 100644 --- a/project/at_start_f437/examples/dac/two_dac_trianglewave/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/dac/two_dac_trianglewave/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/dac/two_dac_trianglewave/src/main.c b/project/at_start_f437/examples/dac/two_dac_trianglewave/src/main.c index 7d8f9701..a8040e61 100644 --- a/project/at_start_f437/examples/dac/two_dac_trianglewave/src/main.c +++ b/project/at_start_f437/examples/dac/two_dac_trianglewave/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/debug/tmr1/inc/at32f435_437_clock.h b/project/at_start_f437/examples/debug/tmr1/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/debug/tmr1/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/debug/tmr1/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/debug/tmr1/inc/at32f435_437_conf.h b/project/at_start_f437/examples/debug/tmr1/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/debug/tmr1/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/debug/tmr1/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/debug/tmr1/inc/at32f435_437_int.h b/project/at_start_f437/examples/debug/tmr1/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/debug/tmr1/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/debug/tmr1/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/debug/tmr1/readme.txt b/project/at_start_f437/examples/debug/tmr1/readme.txt index 9d659c9e..17aafcde 100644 --- a/project/at_start_f437/examples/debug/tmr1/readme.txt +++ b/project/at_start_f437/examples/debug/tmr1/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/debug/tmr1/src/at32f435_437_clock.c b/project/at_start_f437/examples/debug/tmr1/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/debug/tmr1/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/debug/tmr1/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/debug/tmr1/src/at32f435_437_int.c b/project/at_start_f437/examples/debug/tmr1/src/at32f435_437_int.c index c3530994..436f844e 100644 --- a/project/at_start_f437/examples/debug/tmr1/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/debug/tmr1/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/debug/tmr1/src/main.c b/project/at_start_f437/examples/debug/tmr1/src/main.c index 9000c370..4607f235 100644 --- a/project/at_start_f437/examples/debug/tmr1/src/main.c +++ b/project/at_start_f437/examples/debug/tmr1/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/dma/dmamux_data_to_gpio/inc/at32f435_437_clock.h b/project/at_start_f437/examples/dma/dmamux_data_to_gpio/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/dma/dmamux_data_to_gpio/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/dma/dmamux_data_to_gpio/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/dma/dmamux_data_to_gpio/inc/at32f435_437_conf.h b/project/at_start_f437/examples/dma/dmamux_data_to_gpio/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/dma/dmamux_data_to_gpio/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/dma/dmamux_data_to_gpio/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/dma/dmamux_data_to_gpio/inc/at32f435_437_int.h b/project/at_start_f437/examples/dma/dmamux_data_to_gpio/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/dma/dmamux_data_to_gpio/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/dma/dmamux_data_to_gpio/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/dma/dmamux_data_to_gpio/readme.txt b/project/at_start_f437/examples/dma/dmamux_data_to_gpio/readme.txt index 2f85577f..9cd5a222 100644 --- a/project/at_start_f437/examples/dma/dmamux_data_to_gpio/readme.txt +++ b/project/at_start_f437/examples/dma/dmamux_data_to_gpio/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/dma/dmamux_data_to_gpio/src/at32f435_437_clock.c b/project/at_start_f437/examples/dma/dmamux_data_to_gpio/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/dma/dmamux_data_to_gpio/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/dma/dmamux_data_to_gpio/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/dma/dmamux_data_to_gpio/src/at32f435_437_int.c b/project/at_start_f437/examples/dma/dmamux_data_to_gpio/src/at32f435_437_int.c index feb9f521..c62e394d 100644 --- a/project/at_start_f437/examples/dma/dmamux_data_to_gpio/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/dma/dmamux_data_to_gpio/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/dma/dmamux_data_to_gpio/src/main.c b/project/at_start_f437/examples/dma/dmamux_data_to_gpio/src/main.c index d2dc0067..17494756 100644 --- a/project/at_start_f437/examples/dma/dmamux_data_to_gpio/src/main.c +++ b/project/at_start_f437/examples/dma/dmamux_data_to_gpio/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/dma/dmamux_genertor_exint/inc/at32f435_437_clock.h b/project/at_start_f437/examples/dma/dmamux_genertor_exint/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/dma/dmamux_genertor_exint/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/dma/dmamux_genertor_exint/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/dma/dmamux_genertor_exint/inc/at32f435_437_conf.h b/project/at_start_f437/examples/dma/dmamux_genertor_exint/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/dma/dmamux_genertor_exint/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/dma/dmamux_genertor_exint/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/dma/dmamux_genertor_exint/inc/at32f435_437_int.h b/project/at_start_f437/examples/dma/dmamux_genertor_exint/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/dma/dmamux_genertor_exint/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/dma/dmamux_genertor_exint/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/dma/dmamux_genertor_exint/readme.txt b/project/at_start_f437/examples/dma/dmamux_genertor_exint/readme.txt index e84baa1f..77129b6a 100644 --- a/project/at_start_f437/examples/dma/dmamux_genertor_exint/readme.txt +++ b/project/at_start_f437/examples/dma/dmamux_genertor_exint/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/dma/dmamux_genertor_exint/src/at32f435_437_clock.c b/project/at_start_f437/examples/dma/dmamux_genertor_exint/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/dma/dmamux_genertor_exint/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/dma/dmamux_genertor_exint/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/dma/dmamux_genertor_exint/src/at32f435_437_int.c b/project/at_start_f437/examples/dma/dmamux_genertor_exint/src/at32f435_437_int.c index dd872f12..6ea4b87d 100644 --- a/project/at_start_f437/examples/dma/dmamux_genertor_exint/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/dma/dmamux_genertor_exint/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/dma/dmamux_genertor_exint/src/main.c b/project/at_start_f437/examples/dma/dmamux_genertor_exint/src/main.c index 24d5250c..07ac6ea2 100644 --- a/project/at_start_f437/examples/dma/dmamux_genertor_exint/src/main.c +++ b/project/at_start_f437/examples/dma/dmamux_genertor_exint/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/dma/dmamux_synchronization_exint/inc/at32f435_437_clock.h b/project/at_start_f437/examples/dma/dmamux_synchronization_exint/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/dma/dmamux_synchronization_exint/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/dma/dmamux_synchronization_exint/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/dma/dmamux_synchronization_exint/inc/at32f435_437_conf.h b/project/at_start_f437/examples/dma/dmamux_synchronization_exint/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/dma/dmamux_synchronization_exint/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/dma/dmamux_synchronization_exint/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/dma/dmamux_synchronization_exint/inc/at32f435_437_int.h b/project/at_start_f437/examples/dma/dmamux_synchronization_exint/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/dma/dmamux_synchronization_exint/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/dma/dmamux_synchronization_exint/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/dma/dmamux_synchronization_exint/readme.txt b/project/at_start_f437/examples/dma/dmamux_synchronization_exint/readme.txt index 151f68a1..afc77189 100644 --- a/project/at_start_f437/examples/dma/dmamux_synchronization_exint/readme.txt +++ b/project/at_start_f437/examples/dma/dmamux_synchronization_exint/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/dma/dmamux_synchronization_exint/src/at32f435_437_clock.c b/project/at_start_f437/examples/dma/dmamux_synchronization_exint/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/dma/dmamux_synchronization_exint/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/dma/dmamux_synchronization_exint/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/dma/dmamux_synchronization_exint/src/at32f435_437_int.c b/project/at_start_f437/examples/dma/dmamux_synchronization_exint/src/at32f435_437_int.c index e07b505b..d6f2d346 100644 --- a/project/at_start_f437/examples/dma/dmamux_synchronization_exint/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/dma/dmamux_synchronization_exint/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/dma/dmamux_synchronization_exint/src/main.c b/project/at_start_f437/examples/dma/dmamux_synchronization_exint/src/main.c index 6e51224c..2817dd75 100644 --- a/project/at_start_f437/examples/dma/dmamux_synchronization_exint/src/main.c +++ b/project/at_start_f437/examples/dma/dmamux_synchronization_exint/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/dma/flash_to_sram/inc/at32f435_437_clock.h b/project/at_start_f437/examples/dma/flash_to_sram/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/dma/flash_to_sram/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/dma/flash_to_sram/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/dma/flash_to_sram/inc/at32f435_437_conf.h b/project/at_start_f437/examples/dma/flash_to_sram/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/dma/flash_to_sram/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/dma/flash_to_sram/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/dma/flash_to_sram/inc/at32f435_437_int.h b/project/at_start_f437/examples/dma/flash_to_sram/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/dma/flash_to_sram/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/dma/flash_to_sram/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/dma/flash_to_sram/readme.txt b/project/at_start_f437/examples/dma/flash_to_sram/readme.txt index e5143bda..20355185 100644 --- a/project/at_start_f437/examples/dma/flash_to_sram/readme.txt +++ b/project/at_start_f437/examples/dma/flash_to_sram/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/dma/flash_to_sram/src/at32f435_437_clock.c b/project/at_start_f437/examples/dma/flash_to_sram/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/dma/flash_to_sram/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/dma/flash_to_sram/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/dma/flash_to_sram/src/at32f435_437_int.c b/project/at_start_f437/examples/dma/flash_to_sram/src/at32f435_437_int.c index db0b79df..98d79b12 100644 --- a/project/at_start_f437/examples/dma/flash_to_sram/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/dma/flash_to_sram/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/dma/flash_to_sram/src/main.c b/project/at_start_f437/examples/dma/flash_to_sram/src/main.c index 57ca166b..4a3f9d0e 100644 --- a/project/at_start_f437/examples/dma/flash_to_sram/src/main.c +++ b/project/at_start_f437/examples/dma/flash_to_sram/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/dvp/ov2640_capture/hardware/dvp/dvp.c b/project/at_start_f437/examples/dvp/ov2640_capture/hardware/dvp/dvp.c index ba746db2..d69e0672 100644 --- a/project/at_start_f437/examples/dvp/ov2640_capture/hardware/dvp/dvp.c +++ b/project/at_start_f437/examples/dvp/ov2640_capture/hardware/dvp/dvp.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file dvp.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief dvp program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/dvp/ov2640_capture/hardware/dvp/dvp.h b/project/at_start_f437/examples/dvp/ov2640_capture/hardware/dvp/dvp.h index b46204a1..6d8a964b 100644 --- a/project/at_start_f437/examples/dvp/ov2640_capture/hardware/dvp/dvp.h +++ b/project/at_start_f437/examples/dvp/ov2640_capture/hardware/dvp/dvp.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file dvp.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of dvp program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/dvp/ov2640_capture/hardware/lcd/font.h b/project/at_start_f437/examples/dvp/ov2640_capture/hardware/lcd/font.h index bc4dc606..f26a53f5 100644 --- a/project/at_start_f437/examples/dvp/ov2640_capture/hardware/lcd/font.h +++ b/project/at_start_f437/examples/dvp/ov2640_capture/hardware/lcd/font.h @@ -1,8 +1,8 @@ /* * ************************************************************************** * @file font.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of font ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/dvp/ov2640_capture/hardware/lcd/xmc_lcd.c b/project/at_start_f437/examples/dvp/ov2640_capture/hardware/lcd/xmc_lcd.c index beeb284b..60132ca2 100644 --- a/project/at_start_f437/examples/dvp/ov2640_capture/hardware/lcd/xmc_lcd.c +++ b/project/at_start_f437/examples/dvp/ov2640_capture/hardware/lcd/xmc_lcd.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file xmc_lcd.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief xmc_lcd program file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/dvp/ov2640_capture/hardware/lcd/xmc_lcd.h b/project/at_start_f437/examples/dvp/ov2640_capture/hardware/lcd/xmc_lcd.h index 0cdc5120..a67589e9 100644 --- a/project/at_start_f437/examples/dvp/ov2640_capture/hardware/lcd/xmc_lcd.h +++ b/project/at_start_f437/examples/dvp/ov2640_capture/hardware/lcd/xmc_lcd.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file xmc_lcd.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief xmc_lcd program header ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/dvp/ov2640_capture/hardware/ov2640/ov2640.c b/project/at_start_f437/examples/dvp/ov2640_capture/hardware/ov2640/ov2640.c index cfa431ca..b1c9aed2 100644 --- a/project/at_start_f437/examples/dvp/ov2640_capture/hardware/ov2640/ov2640.c +++ b/project/at_start_f437/examples/dvp/ov2640_capture/hardware/ov2640/ov2640.c @@ -526,7 +526,7 @@ void i2c_lowlevel_init(i2c_handle_type* hi2c) dmamux_enable(DMA1, TRUE); /* config i2c */ - i2c_init(hi2c->i2cx, 0, I2Cx_CLKCTRL); + i2c_init(hi2c->i2cx, 0x0F, I2Cx_CLKCTRL); i2c_own_address1_set(hi2c->i2cx, I2C_ADDRESS_MODE_7BIT, I2Cx_ADDRESS); } diff --git a/project/at_start_f437/examples/dvp/ov2640_capture/inc/at32f435_437_clock.h b/project/at_start_f437/examples/dvp/ov2640_capture/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/dvp/ov2640_capture/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/dvp/ov2640_capture/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/dvp/ov2640_capture/inc/at32f435_437_conf.h b/project/at_start_f437/examples/dvp/ov2640_capture/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/dvp/ov2640_capture/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/dvp/ov2640_capture/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/dvp/ov2640_capture/inc/at32f435_437_int.h b/project/at_start_f437/examples/dvp/ov2640_capture/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/dvp/ov2640_capture/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/dvp/ov2640_capture/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/dvp/ov2640_capture/readme.txt b/project/at_start_f437/examples/dvp/ov2640_capture/readme.txt index c6fda77e..05399d7a 100644 --- a/project/at_start_f437/examples/dvp/ov2640_capture/readme.txt +++ b/project/at_start_f437/examples/dvp/ov2640_capture/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/dvp/ov2640_capture/src/at32f435_437_clock.c b/project/at_start_f437/examples/dvp/ov2640_capture/src/at32f435_437_clock.c index 28cf94df..cb48c4e8 100644 --- a/project/at_start_f437/examples/dvp/ov2640_capture/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/dvp/ov2640_capture/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/dvp/ov2640_capture/src/at32f435_437_int.c b/project/at_start_f437/examples/dvp/ov2640_capture/src/at32f435_437_int.c index 76c5b6a7..1ba24961 100644 --- a/project/at_start_f437/examples/dvp/ov2640_capture/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/dvp/ov2640_capture/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/dvp/ov2640_capture/src/main.c b/project/at_start_f437/examples/dvp/ov2640_capture/src/main.c index d42365a8..87a0c99c 100644 --- a/project/at_start_f437/examples/dvp/ov2640_capture/src/main.c +++ b/project/at_start_f437/examples/dvp/ov2640_capture/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/dvp/ov5640_capture/hardware/dvp/dvp.c b/project/at_start_f437/examples/dvp/ov5640_capture/hardware/dvp/dvp.c index 6fb9db68..bcbe64db 100644 --- a/project/at_start_f437/examples/dvp/ov5640_capture/hardware/dvp/dvp.c +++ b/project/at_start_f437/examples/dvp/ov5640_capture/hardware/dvp/dvp.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file dvp.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief dvp program ************************************************************************** * Copyright notice & Disclaimer @@ -68,7 +68,7 @@ void dvp_config(void) dvp_vsync_polarity_set(DVP_VSYNC_POLARITY_LOW); dvp_pclk_polarity_set(DVP_CLK_POLARITY_RISING); dvp_zoomout_set(DVP_PCDC_ALL, DVP_PCDS_CAP_FIRST, DVP_LCDC_ALL, DVP_LCDS_CAP_FIRST); - dvp_zoomout_select(DVP_PCDSE_CAP_FIRST); + dvp_zoomout_select(DVP_PCDES_CAP_FIRST); dvp_pixel_data_length_set(DVP_PIXEL_DATA_LENGTH_8); #ifdef HARDWARE_MODE dvp_sync_mode_set(DVP_SYNC_MODE_HARDWARE); diff --git a/project/at_start_f437/examples/dvp/ov5640_capture/hardware/dvp/dvp.h b/project/at_start_f437/examples/dvp/ov5640_capture/hardware/dvp/dvp.h index c1efb87a..4859dba4 100644 --- a/project/at_start_f437/examples/dvp/ov5640_capture/hardware/dvp/dvp.h +++ b/project/at_start_f437/examples/dvp/ov5640_capture/hardware/dvp/dvp.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file dvp.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of dvp program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/dvp/ov5640_capture/hardware/lcd/font.h b/project/at_start_f437/examples/dvp/ov5640_capture/hardware/lcd/font.h index cda4cf27..020ffd4c 100644 --- a/project/at_start_f437/examples/dvp/ov5640_capture/hardware/lcd/font.h +++ b/project/at_start_f437/examples/dvp/ov5640_capture/hardware/lcd/font.h @@ -1,8 +1,8 @@ /* * ************************************************************************** * @file font.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of font ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/dvp/ov5640_capture/hardware/lcd/xmc_lcd.c b/project/at_start_f437/examples/dvp/ov5640_capture/hardware/lcd/xmc_lcd.c index 61232a90..8381d5a4 100644 --- a/project/at_start_f437/examples/dvp/ov5640_capture/hardware/lcd/xmc_lcd.c +++ b/project/at_start_f437/examples/dvp/ov5640_capture/hardware/lcd/xmc_lcd.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file xmc_lcd.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief xmc_lcd program file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/dvp/ov5640_capture/hardware/lcd/xmc_lcd.h b/project/at_start_f437/examples/dvp/ov5640_capture/hardware/lcd/xmc_lcd.h index 64c1475a..9bad2029 100644 --- a/project/at_start_f437/examples/dvp/ov5640_capture/hardware/lcd/xmc_lcd.h +++ b/project/at_start_f437/examples/dvp/ov5640_capture/hardware/lcd/xmc_lcd.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file xmc_lcd.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief xmc_lcd program header ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/dvp/ov5640_capture/hardware/ov5640/ov5640.c b/project/at_start_f437/examples/dvp/ov5640_capture/hardware/ov5640/ov5640.c index d4249796..a60fee0a 100644 --- a/project/at_start_f437/examples/dvp/ov5640_capture/hardware/ov5640/ov5640.c +++ b/project/at_start_f437/examples/dvp/ov5640_capture/hardware/ov5640/ov5640.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file ov5640.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief ov5640 program ************************************************************************** * Copyright notice & Disclaimer @@ -706,7 +706,7 @@ void i2c_lowlevel_init(i2c_handle_type* hi2c) dmamux_enable(DMA1, TRUE); /* config i2c */ - i2c_init(hi2c->i2cx, 0, I2Cx_CLKCTRL); + i2c_init(hi2c->i2cx, 0x0F, I2Cx_CLKCTRL); i2c_own_address1_set(hi2c->i2cx, I2C_ADDRESS_MODE_7BIT, I2Cx_ADDRESS); } diff --git a/project/at_start_f437/examples/dvp/ov5640_capture/hardware/ov5640/ov5640.h b/project/at_start_f437/examples/dvp/ov5640_capture/hardware/ov5640/ov5640.h index 39e238c7..171a91d9 100644 --- a/project/at_start_f437/examples/dvp/ov5640_capture/hardware/ov5640/ov5640.h +++ b/project/at_start_f437/examples/dvp/ov5640_capture/hardware/ov5640/ov5640.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file ov5640.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of ov5640 program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/dvp/ov5640_capture/hardware/ov5640/ov5640af.h b/project/at_start_f437/examples/dvp/ov5640_capture/hardware/ov5640/ov5640af.h index cf1d4f0e..c02d977c 100644 --- a/project/at_start_f437/examples/dvp/ov5640_capture/hardware/ov5640/ov5640af.h +++ b/project/at_start_f437/examples/dvp/ov5640_capture/hardware/ov5640/ov5640af.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file ov5640af.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of ov5640af program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/dvp/ov5640_capture/hardware/ov5640/ov5640cfg.h b/project/at_start_f437/examples/dvp/ov5640_capture/hardware/ov5640/ov5640cfg.h index 9cd2196a..b63814d9 100644 --- a/project/at_start_f437/examples/dvp/ov5640_capture/hardware/ov5640/ov5640cfg.h +++ b/project/at_start_f437/examples/dvp/ov5640_capture/hardware/ov5640/ov5640cfg.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file ov5640cfg.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of ov5640cfg program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/dvp/ov5640_capture/inc/at32f435_437_clock.h b/project/at_start_f437/examples/dvp/ov5640_capture/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/dvp/ov5640_capture/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/dvp/ov5640_capture/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/dvp/ov5640_capture/inc/at32f435_437_conf.h b/project/at_start_f437/examples/dvp/ov5640_capture/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/dvp/ov5640_capture/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/dvp/ov5640_capture/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/dvp/ov5640_capture/inc/at32f435_437_int.h b/project/at_start_f437/examples/dvp/ov5640_capture/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/dvp/ov5640_capture/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/dvp/ov5640_capture/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/dvp/ov5640_capture/readme.txt b/project/at_start_f437/examples/dvp/ov5640_capture/readme.txt index d042d0f1..32dee39f 100644 --- a/project/at_start_f437/examples/dvp/ov5640_capture/readme.txt +++ b/project/at_start_f437/examples/dvp/ov5640_capture/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/dvp/ov5640_capture/src/at32f435_437_clock.c b/project/at_start_f437/examples/dvp/ov5640_capture/src/at32f435_437_clock.c index 28cf94df..cb48c4e8 100644 --- a/project/at_start_f437/examples/dvp/ov5640_capture/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/dvp/ov5640_capture/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/dvp/ov5640_capture/src/at32f435_437_int.c b/project/at_start_f437/examples/dvp/ov5640_capture/src/at32f435_437_int.c index 0f0922c2..1b580c58 100644 --- a/project/at_start_f437/examples/dvp/ov5640_capture/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/dvp/ov5640_capture/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/dvp/ov5640_capture/src/main.c b/project/at_start_f437/examples/dvp/ov5640_capture/src/main.c index 145d7922..91ad4681 100644 --- a/project/at_start_f437/examples/dvp/ov5640_capture/src/main.c +++ b/project/at_start_f437/examples/dvp/ov5640_capture/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/edma/burst_mode/inc/at32f435_437_clock.h b/project/at_start_f437/examples/edma/burst_mode/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/edma/burst_mode/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/edma/burst_mode/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/edma/burst_mode/inc/at32f435_437_conf.h b/project/at_start_f437/examples/edma/burst_mode/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/edma/burst_mode/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/edma/burst_mode/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/edma/burst_mode/inc/at32f435_437_int.h b/project/at_start_f437/examples/edma/burst_mode/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/edma/burst_mode/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/edma/burst_mode/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/edma/burst_mode/readme.txt b/project/at_start_f437/examples/edma/burst_mode/readme.txt index e392a14d..83fe251f 100644 --- a/project/at_start_f437/examples/edma/burst_mode/readme.txt +++ b/project/at_start_f437/examples/edma/burst_mode/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/edma/burst_mode/src/at32f435_437_clock.c b/project/at_start_f437/examples/edma/burst_mode/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/edma/burst_mode/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/edma/burst_mode/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/edma/burst_mode/src/at32f435_437_int.c b/project/at_start_f437/examples/edma/burst_mode/src/at32f435_437_int.c index 48876c00..89323a86 100644 --- a/project/at_start_f437/examples/edma/burst_mode/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/edma/burst_mode/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/edma/burst_mode/src/main.c b/project/at_start_f437/examples/edma/burst_mode/src/main.c index 3053d88e..2d235422 100644 --- a/project/at_start_f437/examples/edma/burst_mode/src/main.c +++ b/project/at_start_f437/examples/edma/burst_mode/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/edma/dmamux_genertor_exint/inc/at32f435_437_clock.h b/project/at_start_f437/examples/edma/dmamux_genertor_exint/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/edma/dmamux_genertor_exint/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/edma/dmamux_genertor_exint/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/edma/dmamux_genertor_exint/inc/at32f435_437_conf.h b/project/at_start_f437/examples/edma/dmamux_genertor_exint/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/edma/dmamux_genertor_exint/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/edma/dmamux_genertor_exint/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/edma/dmamux_genertor_exint/inc/at32f435_437_int.h b/project/at_start_f437/examples/edma/dmamux_genertor_exint/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/edma/dmamux_genertor_exint/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/edma/dmamux_genertor_exint/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/edma/dmamux_genertor_exint/readme.txt b/project/at_start_f437/examples/edma/dmamux_genertor_exint/readme.txt index 2b2ab103..647f62c7 100644 --- a/project/at_start_f437/examples/edma/dmamux_genertor_exint/readme.txt +++ b/project/at_start_f437/examples/edma/dmamux_genertor_exint/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/edma/dmamux_genertor_exint/src/at32f435_437_clock.c b/project/at_start_f437/examples/edma/dmamux_genertor_exint/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/edma/dmamux_genertor_exint/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/edma/dmamux_genertor_exint/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/edma/dmamux_genertor_exint/src/at32f435_437_int.c b/project/at_start_f437/examples/edma/dmamux_genertor_exint/src/at32f435_437_int.c index 4bfaaa27..9ffe7f44 100644 --- a/project/at_start_f437/examples/edma/dmamux_genertor_exint/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/edma/dmamux_genertor_exint/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/edma/dmamux_genertor_exint/src/main.c b/project/at_start_f437/examples/edma/dmamux_genertor_exint/src/main.c index a95a05bd..cf431f55 100644 --- a/project/at_start_f437/examples/edma/dmamux_genertor_exint/src/main.c +++ b/project/at_start_f437/examples/edma/dmamux_genertor_exint/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/edma/dmamux_synchronization_exint/inc/at32f435_437_clock.h b/project/at_start_f437/examples/edma/dmamux_synchronization_exint/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/edma/dmamux_synchronization_exint/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/edma/dmamux_synchronization_exint/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/edma/dmamux_synchronization_exint/inc/at32f435_437_conf.h b/project/at_start_f437/examples/edma/dmamux_synchronization_exint/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/edma/dmamux_synchronization_exint/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/edma/dmamux_synchronization_exint/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/edma/dmamux_synchronization_exint/inc/at32f435_437_int.h b/project/at_start_f437/examples/edma/dmamux_synchronization_exint/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/edma/dmamux_synchronization_exint/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/edma/dmamux_synchronization_exint/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/edma/dmamux_synchronization_exint/readme.txt b/project/at_start_f437/examples/edma/dmamux_synchronization_exint/readme.txt index b6efc987..78b8cceb 100644 --- a/project/at_start_f437/examples/edma/dmamux_synchronization_exint/readme.txt +++ b/project/at_start_f437/examples/edma/dmamux_synchronization_exint/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/edma/dmamux_synchronization_exint/src/at32f435_437_clock.c b/project/at_start_f437/examples/edma/dmamux_synchronization_exint/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/edma/dmamux_synchronization_exint/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/edma/dmamux_synchronization_exint/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/edma/dmamux_synchronization_exint/src/at32f435_437_int.c b/project/at_start_f437/examples/edma/dmamux_synchronization_exint/src/at32f435_437_int.c index 8dc8508f..3490688e 100644 --- a/project/at_start_f437/examples/edma/dmamux_synchronization_exint/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/edma/dmamux_synchronization_exint/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/edma/dmamux_synchronization_exint/src/main.c b/project/at_start_f437/examples/edma/dmamux_synchronization_exint/src/main.c index a3487c5d..22220f3b 100644 --- a/project/at_start_f437/examples/edma/dmamux_synchronization_exint/src/main.c +++ b/project/at_start_f437/examples/edma/dmamux_synchronization_exint/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/edma/flash_to_sram/inc/at32f435_437_clock.h b/project/at_start_f437/examples/edma/flash_to_sram/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/edma/flash_to_sram/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/edma/flash_to_sram/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/edma/flash_to_sram/inc/at32f435_437_conf.h b/project/at_start_f437/examples/edma/flash_to_sram/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/edma/flash_to_sram/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/edma/flash_to_sram/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/edma/flash_to_sram/inc/at32f435_437_int.h b/project/at_start_f437/examples/edma/flash_to_sram/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/edma/flash_to_sram/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/edma/flash_to_sram/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/edma/flash_to_sram/readme.txt b/project/at_start_f437/examples/edma/flash_to_sram/readme.txt index 6d623e67..f1901dee 100644 --- a/project/at_start_f437/examples/edma/flash_to_sram/readme.txt +++ b/project/at_start_f437/examples/edma/flash_to_sram/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/edma/flash_to_sram/src/at32f435_437_clock.c b/project/at_start_f437/examples/edma/flash_to_sram/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/edma/flash_to_sram/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/edma/flash_to_sram/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/edma/flash_to_sram/src/at32f435_437_int.c b/project/at_start_f437/examples/edma/flash_to_sram/src/at32f435_437_int.c index 8345af3d..e81780a4 100644 --- a/project/at_start_f437/examples/edma/flash_to_sram/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/edma/flash_to_sram/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/edma/flash_to_sram/src/main.c b/project/at_start_f437/examples/edma/flash_to_sram/src/main.c index 56e64779..0df0c229 100644 --- a/project/at_start_f437/examples/edma/flash_to_sram/src/main.c +++ b/project/at_start_f437/examples/edma/flash_to_sram/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/edma/i2s_halfduplex_edma_doublebuffer/inc/at32f435_437_clock.h b/project/at_start_f437/examples/edma/i2s_halfduplex_edma_doublebuffer/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/edma/i2s_halfduplex_edma_doublebuffer/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/edma/i2s_halfduplex_edma_doublebuffer/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/edma/i2s_halfduplex_edma_doublebuffer/inc/at32f435_437_conf.h b/project/at_start_f437/examples/edma/i2s_halfduplex_edma_doublebuffer/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/edma/i2s_halfduplex_edma_doublebuffer/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/edma/i2s_halfduplex_edma_doublebuffer/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/edma/i2s_halfduplex_edma_doublebuffer/inc/at32f435_437_int.h b/project/at_start_f437/examples/edma/i2s_halfduplex_edma_doublebuffer/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/edma/i2s_halfduplex_edma_doublebuffer/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/edma/i2s_halfduplex_edma_doublebuffer/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/edma/i2s_halfduplex_edma_doublebuffer/readme.txt b/project/at_start_f437/examples/edma/i2s_halfduplex_edma_doublebuffer/readme.txt index 54502e81..308d10a4 100644 --- a/project/at_start_f437/examples/edma/i2s_halfduplex_edma_doublebuffer/readme.txt +++ b/project/at_start_f437/examples/edma/i2s_halfduplex_edma_doublebuffer/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/edma/i2s_halfduplex_edma_doublebuffer/src/at32f435_437_clock.c b/project/at_start_f437/examples/edma/i2s_halfduplex_edma_doublebuffer/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/edma/i2s_halfduplex_edma_doublebuffer/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/edma/i2s_halfduplex_edma_doublebuffer/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/edma/i2s_halfduplex_edma_doublebuffer/src/at32f435_437_int.c b/project/at_start_f437/examples/edma/i2s_halfduplex_edma_doublebuffer/src/at32f435_437_int.c index c1bcdec5..151f1e14 100644 --- a/project/at_start_f437/examples/edma/i2s_halfduplex_edma_doublebuffer/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/edma/i2s_halfduplex_edma_doublebuffer/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/edma/i2s_halfduplex_edma_doublebuffer/src/main.c b/project/at_start_f437/examples/edma/i2s_halfduplex_edma_doublebuffer/src/main.c index 02f1e13a..fb5a4308 100644 --- a/project/at_start_f437/examples/edma/i2s_halfduplex_edma_doublebuffer/src/main.c +++ b/project/at_start_f437/examples/edma/i2s_halfduplex_edma_doublebuffer/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/edma/link_list_mode/inc/at32f435_437_clock.h b/project/at_start_f437/examples/edma/link_list_mode/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/edma/link_list_mode/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/edma/link_list_mode/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/edma/link_list_mode/inc/at32f435_437_conf.h b/project/at_start_f437/examples/edma/link_list_mode/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/edma/link_list_mode/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/edma/link_list_mode/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/edma/link_list_mode/inc/at32f435_437_int.h b/project/at_start_f437/examples/edma/link_list_mode/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/edma/link_list_mode/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/edma/link_list_mode/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/edma/link_list_mode/readme.txt b/project/at_start_f437/examples/edma/link_list_mode/readme.txt index 19b34628..f0b081b1 100644 --- a/project/at_start_f437/examples/edma/link_list_mode/readme.txt +++ b/project/at_start_f437/examples/edma/link_list_mode/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/edma/link_list_mode/src/at32f435_437_clock.c b/project/at_start_f437/examples/edma/link_list_mode/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/edma/link_list_mode/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/edma/link_list_mode/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/edma/link_list_mode/src/at32f435_437_int.c b/project/at_start_f437/examples/edma/link_list_mode/src/at32f435_437_int.c index 3d45609a..c732fcbb 100644 --- a/project/at_start_f437/examples/edma/link_list_mode/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/edma/link_list_mode/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/edma/link_list_mode/src/main.c b/project/at_start_f437/examples/edma/link_list_mode/src/main.c index 1e0a3b35..48a82fc5 100644 --- a/project/at_start_f437/examples/edma/link_list_mode/src/main.c +++ b/project/at_start_f437/examples/edma/link_list_mode/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/edma/two_dimension_mode/inc/at32f435_437_clock.h b/project/at_start_f437/examples/edma/two_dimension_mode/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/edma/two_dimension_mode/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/edma/two_dimension_mode/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/edma/two_dimension_mode/inc/at32f435_437_conf.h b/project/at_start_f437/examples/edma/two_dimension_mode/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/edma/two_dimension_mode/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/edma/two_dimension_mode/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/edma/two_dimension_mode/inc/at32f435_437_int.h b/project/at_start_f437/examples/edma/two_dimension_mode/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/edma/two_dimension_mode/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/edma/two_dimension_mode/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/edma/two_dimension_mode/readme.txt b/project/at_start_f437/examples/edma/two_dimension_mode/readme.txt index 48ddd493..3f73fe2f 100644 --- a/project/at_start_f437/examples/edma/two_dimension_mode/readme.txt +++ b/project/at_start_f437/examples/edma/two_dimension_mode/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/edma/two_dimension_mode/src/at32f435_437_clock.c b/project/at_start_f437/examples/edma/two_dimension_mode/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/edma/two_dimension_mode/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/edma/two_dimension_mode/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/edma/two_dimension_mode/src/at32f435_437_int.c b/project/at_start_f437/examples/edma/two_dimension_mode/src/at32f435_437_int.c index 90a06676..ec906089 100644 --- a/project/at_start_f437/examples/edma/two_dimension_mode/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/edma/two_dimension_mode/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/edma/two_dimension_mode/src/main.c b/project/at_start_f437/examples/edma/two_dimension_mode/src/main.c index 0525b031..bb1ef402 100644 --- a/project/at_start_f437/examples/edma/two_dimension_mode/src/main.c +++ b/project/at_start_f437/examples/edma/two_dimension_mode/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h b/project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h index 88ed2791..8b1833ec 100644 --- a/project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h +++ b/project/at_start_f437/examples/emac/dns_client/inc/at32_emac.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32_emac.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of emac config program. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/emac/dns_client/inc/at32f435_437_clock.h b/project/at_start_f437/examples/emac/dns_client/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/emac/dns_client/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/emac/dns_client/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/emac/dns_client/inc/at32f435_437_conf.h b/project/at_start_f437/examples/emac/dns_client/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/emac/dns_client/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/emac/dns_client/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/emac/dns_client/inc/at32f435_437_int.h b/project/at_start_f437/examples/emac/dns_client/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/emac/dns_client/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/emac/dns_client/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/emac/dns_client/inc/netconf.h b/project/at_start_f437/examples/emac/dns_client/inc/netconf.h index 38b97a1c..409ac257 100644 --- a/project/at_start_f437/examples/emac/dns_client/inc/netconf.h +++ b/project/at_start_f437/examples/emac/dns_client/inc/netconf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file netconf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief This file contains all the functions prototypes for the netconf.c * file. ************************************************************************** diff --git a/project/at_start_f437/examples/emac/dns_client/readme.txt b/project/at_start_f437/examples/emac/dns_client/readme.txt index 3a968d15..0b07751c 100644 --- a/project/at_start_f437/examples/emac/dns_client/readme.txt +++ b/project/at_start_f437/examples/emac/dns_client/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/emac/dns_client/src/at32_emac.c b/project/at_start_f437/examples/emac/dns_client/src/at32_emac.c index 71ec3ab4..a41d2304 100644 --- a/project/at_start_f437/examples/emac/dns_client/src/at32_emac.c +++ b/project/at_start_f437/examples/emac/dns_client/src/at32_emac.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32_emac.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief emac config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/emac/dns_client/src/at32f435_437_clock.c b/project/at_start_f437/examples/emac/dns_client/src/at32f435_437_clock.c index 5b1efe76..17b72989 100644 --- a/project/at_start_f437/examples/emac/dns_client/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/emac/dns_client/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/emac/dns_client/src/at32f435_437_int.c b/project/at_start_f437/examples/emac/dns_client/src/at32f435_437_int.c index ef8b7588..3f5aacc2 100644 --- a/project/at_start_f437/examples/emac/dns_client/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/emac/dns_client/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/emac/dns_client/src/main.c b/project/at_start_f437/examples/emac/dns_client/src/main.c index c7058fed..5cb0182f 100644 --- a/project/at_start_f437/examples/emac/dns_client/src/main.c +++ b/project/at_start_f437/examples/emac/dns_client/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/emac/dns_client/src/netconf.c b/project/at_start_f437/examples/emac/dns_client/src/netconf.c index 600b6d16..39243b9a 100644 --- a/project/at_start_f437/examples/emac/dns_client/src/netconf.c +++ b/project/at_start_f437/examples/emac/dns_client/src/netconf.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file netconf.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief network connection configuration ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/emac/http_server/inc/at32_emac.h b/project/at_start_f437/examples/emac/http_server/inc/at32_emac.h index bd0e0967..6db177af 100644 --- a/project/at_start_f437/examples/emac/http_server/inc/at32_emac.h +++ b/project/at_start_f437/examples/emac/http_server/inc/at32_emac.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32_emac.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of emac config program. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/emac/http_server/inc/at32f435_437_clock.h b/project/at_start_f437/examples/emac/http_server/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/emac/http_server/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/emac/http_server/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/emac/http_server/inc/at32f435_437_conf.h b/project/at_start_f437/examples/emac/http_server/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/emac/http_server/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/emac/http_server/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/emac/http_server/inc/at32f435_437_int.h b/project/at_start_f437/examples/emac/http_server/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/emac/http_server/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/emac/http_server/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/emac/http_server/inc/netconf.h b/project/at_start_f437/examples/emac/http_server/inc/netconf.h index d3621e77..0e98fc86 100644 --- a/project/at_start_f437/examples/emac/http_server/inc/netconf.h +++ b/project/at_start_f437/examples/emac/http_server/inc/netconf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file netconf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief This file contains all the functions prototypes for the netconf.c * file. ************************************************************************** diff --git a/project/at_start_f437/examples/emac/http_server/readme.txt b/project/at_start_f437/examples/emac/http_server/readme.txt index d6ad16aa..4d01fb15 100644 --- a/project/at_start_f437/examples/emac/http_server/readme.txt +++ b/project/at_start_f437/examples/emac/http_server/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/emac/http_server/src/at32_emac.c b/project/at_start_f437/examples/emac/http_server/src/at32_emac.c index debf24ab..b04c8e72 100644 --- a/project/at_start_f437/examples/emac/http_server/src/at32_emac.c +++ b/project/at_start_f437/examples/emac/http_server/src/at32_emac.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32_emac.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief emac config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/emac/http_server/src/at32f435_437_clock.c b/project/at_start_f437/examples/emac/http_server/src/at32f435_437_clock.c index 5b1efe76..17b72989 100644 --- a/project/at_start_f437/examples/emac/http_server/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/emac/http_server/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/emac/http_server/src/at32f435_437_int.c b/project/at_start_f437/examples/emac/http_server/src/at32f435_437_int.c index dea527c5..e70acc98 100644 --- a/project/at_start_f437/examples/emac/http_server/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/emac/http_server/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/emac/http_server/src/fsdata.c b/project/at_start_f437/examples/emac/http_server/src/fsdata.c index 52fbb3ca..d43d7bdf 100644 --- a/project/at_start_f437/examples/emac/http_server/src/fsdata.c +++ b/project/at_start_f437/examples/emac/http_server/src/fsdata.c @@ -175,6 +175,9 @@ static const unsigned int dummy_align__index_html = 2; #endif static const unsigned char FSDATA_ALIGN_PRE data_AT32F437_html[] FSDATA_ALIGN_POST = " \ +HTTP/1.0 200 OK\r\n\ +Content-Length: 9811\r\n\ +Content-Type: text/html\r\n\r\n\ \ \ Technology Corp. Demo Web Page\ @@ -342,6 +345,9 @@ static const unsigned char FSDATA_ALIGN_PRE data_AT32F437_html[] FSDATA_ALIGN_PO ; static const unsigned char FSDATA_ALIGN_PRE data_AT32F437LED_html[] FSDATA_ALIGN_POST = " \ +HTTP/1.0 200 OK\r\n\ +Content-Length: 4575\r\n\ +Content-Type: text/html\r\n\r\n\ \ \ Technology Corp. Demo Web Page\ @@ -392,6 +398,9 @@ static const unsigned char FSDATA_ALIGN_PRE data_AT32F437LED_html[] FSDATA_ALIGN ; static const unsigned char FSDATA_ALIGN_PRE data_AT32F437ADC_html[] FSDATA_ALIGN_POST = " \ +HTTP/1.0 200 OK\r\n\ +Content-Length: 4614\r\n\ +Content-Type: text/html\r\n\r\n\ \ \ Technology Corp. Demo Web Page\ diff --git a/project/at_start_f437/examples/emac/http_server/src/main.c b/project/at_start_f437/examples/emac/http_server/src/main.c index 7711a3c5..e56634ef 100644 --- a/project/at_start_f437/examples/emac/http_server/src/main.c +++ b/project/at_start_f437/examples/emac/http_server/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/emac/http_server/src/netconf.c b/project/at_start_f437/examples/emac/http_server/src/netconf.c index c59c1bb8..bb8a43f7 100644 --- a/project/at_start_f437/examples/emac/http_server/src/netconf.c +++ b/project/at_start_f437/examples/emac/http_server/src/netconf.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file netconf.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief network connection configuration ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/emac/iperf/inc/at32_emac.h b/project/at_start_f437/examples/emac/iperf/inc/at32_emac.h index 115373c5..04e14ced 100644 --- a/project/at_start_f437/examples/emac/iperf/inc/at32_emac.h +++ b/project/at_start_f437/examples/emac/iperf/inc/at32_emac.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32_emac.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of emac config program. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/emac/iperf/inc/at32f435_437_clock.h b/project/at_start_f437/examples/emac/iperf/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/emac/iperf/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/emac/iperf/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/emac/iperf/inc/at32f435_437_conf.h b/project/at_start_f437/examples/emac/iperf/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/emac/iperf/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/emac/iperf/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/emac/iperf/inc/at32f435_437_int.h b/project/at_start_f437/examples/emac/iperf/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/emac/iperf/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/emac/iperf/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/emac/iperf/inc/iperf.h b/project/at_start_f437/examples/emac/iperf/inc/iperf.h index a8a4b05f..2019b778 100644 --- a/project/at_start_f437/examples/emac/iperf/inc/iperf.h +++ b/project/at_start_f437/examples/emac/iperf/inc/iperf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file iperf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief iperf tool header ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/emac/iperf/inc/netconf.h b/project/at_start_f437/examples/emac/iperf/inc/netconf.h index 1056c7ce..fc7393f1 100644 --- a/project/at_start_f437/examples/emac/iperf/inc/netconf.h +++ b/project/at_start_f437/examples/emac/iperf/inc/netconf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file netconf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief This file contains all the functions prototypes for the netconf.c * file. ************************************************************************** diff --git a/project/at_start_f437/examples/emac/iperf/readme.txt b/project/at_start_f437/examples/emac/iperf/readme.txt index d41635c3..470d4133 100644 --- a/project/at_start_f437/examples/emac/iperf/readme.txt +++ b/project/at_start_f437/examples/emac/iperf/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/emac/iperf/src/at32_emac.c b/project/at_start_f437/examples/emac/iperf/src/at32_emac.c index b446b4e2..fa870174 100644 --- a/project/at_start_f437/examples/emac/iperf/src/at32_emac.c +++ b/project/at_start_f437/examples/emac/iperf/src/at32_emac.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32_emac.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief emac config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/emac/iperf/src/at32f435_437_clock.c b/project/at_start_f437/examples/emac/iperf/src/at32f435_437_clock.c index 5b1efe76..17b72989 100644 --- a/project/at_start_f437/examples/emac/iperf/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/emac/iperf/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/emac/iperf/src/at32f435_437_int.c b/project/at_start_f437/examples/emac/iperf/src/at32f435_437_int.c index eb3da627..755f10aa 100644 --- a/project/at_start_f437/examples/emac/iperf/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/emac/iperf/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/emac/iperf/src/iperf.c b/project/at_start_f437/examples/emac/iperf/src/iperf.c index fff4982e..fec7418c 100644 --- a/project/at_start_f437/examples/emac/iperf/src/iperf.c +++ b/project/at_start_f437/examples/emac/iperf/src/iperf.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file iperf.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief iperf tool ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/emac/iperf/src/main.c b/project/at_start_f437/examples/emac/iperf/src/main.c index b37d9493..96a489a4 100644 --- a/project/at_start_f437/examples/emac/iperf/src/main.c +++ b/project/at_start_f437/examples/emac/iperf/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/emac/iperf/src/netconf.c b/project/at_start_f437/examples/emac/iperf/src/netconf.c index bf042661..d46ef1b4 100644 --- a/project/at_start_f437/examples/emac/iperf/src/netconf.c +++ b/project/at_start_f437/examples/emac/iperf/src/netconf.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file netconf.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief network connection configuration ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/emac/mqtt_client/inc/at32_emac.h b/project/at_start_f437/examples/emac/mqtt_client/inc/at32_emac.h new file mode 100644 index 00000000..2b5b1a53 --- /dev/null +++ b/project/at_start_f437/examples/emac/mqtt_client/inc/at32_emac.h @@ -0,0 +1,119 @@ +/** + ************************************************************************** + * @file at32_emac.h + * @version v2.0.9 + * @date 2022-06-28 + * @brief header file of emac config program. + ************************************************************************** + * Copyright notice & Disclaimer + * + * The software Board Support Package (BSP) that is made available to + * download from Artery official website is the copyrighted work of Artery. + * Artery authorizes customers to use, copy, and distribute the BSP + * software and its related documentation for the purpose of design and + * development in conjunction with Artery microcontrollers. Use of the + * software is governed by this copyright notice and the following disclaimer. + * + * THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, + * GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, + * TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR + * STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, + * INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. + * + ************************************************************************** + */ + +/* define to prevent recursive inclusion -------------------------------------*/ +#ifndef __AT32_EMAC_H +#define __AT32_EMAC_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* includes ------------------------------------------------------------------*/ +#include "at32f435_437.h" +#include "netif.h" + +/** @addtogroup AT32F437_periph_examples + * @{ + */ + +/** @addtogroup 437_EMAC_mqtt_client + * @{ + */ + +#define RX_REMAP (1) +#define CRYSTAL_ON_PHY (0) + +//#define MII_MODE +#define RMII_MODE + +#define DM9162 +//#define DP83848 + +#define LINK_DETECTION (1) /*!< link status detection, 0: no detection, 1: detect with polling */ + +#if defined (DM9162) + #define PHY_ADDRESS (0x03) /*!< relative to at32 board */ + #define PHY_CONTROL_REG (0x00) /*!< basic mode control register */ + #define PHY_STATUS_REG (0x01) /*!< basic mode status register */ + #define PHY_SPECIFIED_CS_REG (0x11) /*!< specified configuration and status register */ + /* phy control register */ + #define PHY_AUTO_NEGOTIATION_BIT (0x1000) /*!< enable auto negotiation */ + #define PHY_LOOPBACK_BIT (0x4000) /*!< enable loopback */ + #define PHY_RESET_BIT (0x8000) /*!< reset phy */ + /* phy status register */ + #define PHY_LINKED_STATUS_BIT (0x0004) /*!< link status */ + #define PHY_NEGO_COMPLETE_BIT (0x0020) /*!< auto negotiation complete */ + /* phy specified control/status register */ + #define PHY_FULL_DUPLEX_100MBPS_BIT (0x8000) /*!< full duplex 100 mbps */ + #define PHY_HALF_DUPLEX_100MBPS_BIT (0x4000) /*!< half duplex 100 mbps */ + #define PHY_FULL_DUPLEX_10MBPS_BIT (0x2000) /*!< full duplex 10 mbps */ + #define PHY_HALF_DUPLEX_10MBPS_BIT (0x1000) /*!< half duplex 10 mbps */ +#elif defined (DP83848) + #define PHY_ADDRESS (0x01) /*!< relative to at32 board */ + #define PHY_CONTROL_REG (0x00) /*!< basic mode control register */ + #define PHY_STATUS_REG (0x01) /*!< basic mode status register */ + #define PHY_SPECIFIED_CS_REG (0x10) /*!< phy status register */ + /* phy control register */ + #define PHY_AUTO_NEGOTIATION_BIT (0x1000) /*!< enable auto negotiation */ + #define PHY_LOOPBACK_BIT (0x4000) /*!< enable loopback */ + #define PHY_RESET_BIT (0x8000) /*!< reset phy */ + /* phy status register */ + #define PHY_LINKED_STATUS_BIT (0x0004) /*!< link status */ + #define PHY_NEGO_COMPLETE_BIT (0x0020) /*!< auto negotiation complete */ + + #define PHY_DUPLEX_MODE (0x0004) /*!< full duplex mode */ + #define PHY_SPEED_MODE (0x0002) /*!< 10 mbps */ +#endif + +error_status emac_system_init(void); +void emac_nvic_configuration(void); +void emac_pins_configuration(void); +error_status emac_layer2_configuration(void); +void static reset_phy(void); +error_status emac_phy_register_reset(void); +error_status emac_speed_config(emac_auto_negotiation_type nego, emac_duplex_type mode, emac_speed_type speed); +error_status emac_phy_init(emac_control_config_type *control_para); + +uint16_t link_update(void); +void ethernetif_set_link(void const *argument); +void ethernetif_notify_conn_changed(struct netif *netif); +void ethernetif_update_config(struct netif *netif); +void emac_tmr_init(void); + +/** + * @} + */ + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/project/at_start_f437/examples/emac/mqtt_client/inc/at32f435_437_clock.h b/project/at_start_f437/examples/emac/mqtt_client/inc/at32f435_437_clock.h new file mode 100644 index 00000000..86a4b828 --- /dev/null +++ b/project/at_start_f437/examples/emac/mqtt_client/inc/at32f435_437_clock.h @@ -0,0 +1,46 @@ +/** + ************************************************************************** + * @file at32f435_437_clock.h + * @version v2.0.9 + * @date 2022-06-28 + * @brief header file of clock program + ************************************************************************** + * Copyright notice & Disclaimer + * + * The software Board Support Package (BSP) that is made available to + * download from Artery official website is the copyrighted work of Artery. + * Artery authorizes customers to use, copy, and distribute the BSP + * software and its related documentation for the purpose of design and + * development in conjunction with Artery microcontrollers. Use of the + * software is governed by this copyright notice and the following disclaimer. + * + * THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, + * GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, + * TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR + * STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, + * INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. + * + ************************************************************************** + */ + +/* define to prevent recursive inclusion -------------------------------------*/ +#ifndef __AT32F435_437_CLOCK_H +#define __AT32F435_437_CLOCK_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* includes ------------------------------------------------------------------*/ +#include "at32f435_437.h" + +/* exported functions ------------------------------------------------------- */ +void system_clock_config(void); + +#ifdef __cplusplus +} +#endif + +#endif + diff --git a/project/at_start_f437/examples/emac/mqtt_client/inc/at32f435_437_conf.h b/project/at_start_f437/examples/emac/mqtt_client/inc/at32f435_437_conf.h new file mode 100644 index 00000000..e2816415 --- /dev/null +++ b/project/at_start_f437/examples/emac/mqtt_client/inc/at32f435_437_conf.h @@ -0,0 +1,174 @@ +/** + ************************************************************************** + * @file at32f435_437_conf.h + * @version v2.0.9 + * @date 2022-06-28 + * @brief at32f435_437 config header file + ************************************************************************** + * Copyright notice & Disclaimer + * + * The software Board Support Package (BSP) that is made available to + * download from Artery official website is the copyrighted work of Artery. + * Artery authorizes customers to use, copy, and distribute the BSP + * software and its related documentation for the purpose of design and + * development in conjunction with Artery microcontrollers. Use of the + * software is governed by this copyright notice and the following disclaimer. + * + * THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, + * GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, + * TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR + * STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, + * INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. + * + ************************************************************************** + */ + +/* define to prevent recursive inclusion -------------------------------------*/ +#ifndef __AT32F435_437_CONF_H +#define __AT32F435_437_CONF_H + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @brief in the following line adjust the value of high speed exernal crystal (hext) + * used in your application + * + * tip: to avoid modifying this file each time you need to use different hext, you + * can define the hext value in your toolchain compiler preprocessor. + * + */ +#if !defined HEXT_VALUE +#define HEXT_VALUE ((uint32_t)8000000) /*!< value of the high speed exernal crystal in hz */ +#endif + +/** + * @brief in the following line adjust the high speed exernal crystal (hext) startup + * timeout value + */ +#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000) /*!< time out for hext start up */ +#define HICK_VALUE ((uint32_t)8000000) /*!< value of the high speed internal clock in hz */ + +/* module define -------------------------------------------------------------*/ +#define CRM_MODULE_ENABLED +#define TMR_MODULE_ENABLED +#define ERTC_MODULE_ENABLED +#define GPIO_MODULE_ENABLED +#define I2C_MODULE_ENABLED +#define USART_MODULE_ENABLED +#define PWC_MODULE_ENABLED +#define CAN_MODULE_ENABLED +#define ADC_MODULE_ENABLED +#define DAC_MODULE_ENABLED +#define SPI_MODULE_ENABLED +#define EDMA_MODULE_ENABLED +#define DMA_MODULE_ENABLED +#define DEBUG_MODULE_ENABLED +#define FLASH_MODULE_ENABLED +#define CRC_MODULE_ENABLED +#define WWDT_MODULE_ENABLED +#define WDT_MODULE_ENABLED +#define EXINT_MODULE_ENABLED +#define SDIO_MODULE_ENABLED +#define XMC_MODULE_ENABLED +#define USB_MODULE_ENABLED +#define ACC_MODULE_ENABLED +#define MISC_MODULE_ENABLED +#define QSPI_MODULE_ENABLED +#define DVP_MODULE_ENABLED +#define SCFG_MODULE_ENABLED +#define EMAC_MODULE_ENABLED + +/* includes ------------------------------------------------------------------*/ +#ifdef CRM_MODULE_ENABLED +#include "at32f435_437_crm.h" +#endif +#ifdef TMR_MODULE_ENABLED +#include "at32f435_437_tmr.h" +#endif +#ifdef ERTC_MODULE_ENABLED +#include "at32f435_437_ertc.h" +#endif +#ifdef GPIO_MODULE_ENABLED +#include "at32f435_437_gpio.h" +#endif +#ifdef I2C_MODULE_ENABLED +#include "at32f435_437_i2c.h" +#endif +#ifdef USART_MODULE_ENABLED +#include "at32f435_437_usart.h" +#endif +#ifdef PWC_MODULE_ENABLED +#include "at32f435_437_pwc.h" +#endif +#ifdef CAN_MODULE_ENABLED +#include "at32f435_437_can.h" +#endif +#ifdef ADC_MODULE_ENABLED +#include "at32f435_437_adc.h" +#endif +#ifdef DAC_MODULE_ENABLED +#include "at32f435_437_dac.h" +#endif +#ifdef SPI_MODULE_ENABLED +#include "at32f435_437_spi.h" +#endif +#ifdef DMA_MODULE_ENABLED +#include "at32f435_437_dma.h" +#endif +#ifdef DEBUG_MODULE_ENABLED +#include "at32f435_437_debug.h" +#endif +#ifdef FLASH_MODULE_ENABLED +#include "at32f435_437_flash.h" +#endif +#ifdef CRC_MODULE_ENABLED +#include "at32f435_437_crc.h" +#endif +#ifdef WWDT_MODULE_ENABLED +#include "at32f435_437_wwdt.h" +#endif +#ifdef WDT_MODULE_ENABLED +#include "at32f435_437_wdt.h" +#endif +#ifdef EXINT_MODULE_ENABLED +#include "at32f435_437_exint.h" +#endif +#ifdef SDIO_MODULE_ENABLED +#include "at32f435_437_sdio.h" +#endif +#ifdef XMC_MODULE_ENABLED +#include "at32f435_437_xmc.h" +#endif +#ifdef ACC_MODULE_ENABLED +#include "at32f435_437_acc.h" +#endif +#ifdef MISC_MODULE_ENABLED +#include "at32f435_437_misc.h" +#endif +#ifdef EDMA_MODULE_ENABLED +#include "at32f435_437_edma.h" +#endif +#ifdef QSPI_MODULE_ENABLED +#include "at32f435_437_qspi.h" +#endif +#ifdef SCFG_MODULE_ENABLED +#include "at32f435_437_scfg.h" +#endif +#ifdef EMAC_MODULE_ENABLED +#include "at32f435_437_emac.h" +#endif +#ifdef DVP_MODULE_ENABLED +#include "at32f435_437_dvp.h" +#endif +#ifdef USB_MODULE_ENABLED +#include "at32f435_437_usb.h" +#endif + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/project/at_start_f437/examples/emac/mqtt_client/inc/at32f435_437_int.h b/project/at_start_f437/examples/emac/mqtt_client/inc/at32f435_437_int.h new file mode 100644 index 00000000..80aec042 --- /dev/null +++ b/project/at_start_f437/examples/emac/mqtt_client/inc/at32f435_437_int.h @@ -0,0 +1,58 @@ +/** + ************************************************************************** + * @file at32f435_437_int.h + * @version v2.0.9 + * @date 2022-06-28 + * @brief header file of main interrupt service routines. + ************************************************************************** + * Copyright notice & Disclaimer + * + * The software Board Support Package (BSP) that is made available to + * download from Artery official website is the copyrighted work of Artery. + * Artery authorizes customers to use, copy, and distribute the BSP + * software and its related documentation for the purpose of design and + * development in conjunction with Artery microcontrollers. Use of the + * software is governed by this copyright notice and the following disclaimer. + * + * THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, + * GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, + * TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR + * STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, + * INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. + * + ************************************************************************** + */ + +/* define to prevent recursive inclusion -------------------------------------*/ +#ifndef __AT32F435_437_INT_H +#define __AT32F435_437_INT_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* includes ------------------------------------------------------------------*/ +#include "at32f435_437.h" + +/* exported types ------------------------------------------------------------*/ +/* exported constants --------------------------------------------------------*/ +/* exported macro ------------------------------------------------------------*/ +/* exported functions ------------------------------------------------------- */ + +void NMI_Handler(void); +void HardFault_Handler(void); +void MemManage_Handler(void); +void BusFault_Handler(void); +void UsageFault_Handler(void); +void SVC_Handler(void); +void DebugMon_Handler(void); +void PendSV_Handler(void); +void SysTick_Handler(void); + +#ifdef __cplusplus +} +#endif + +#endif + diff --git a/project/at_start_f437/examples/emac/mqtt_client/inc/lwipopts.h b/project/at_start_f437/examples/emac/mqtt_client/inc/lwipopts.h new file mode 100644 index 00000000..db908966 --- /dev/null +++ b/project/at_start_f437/examples/emac/mqtt_client/inc/lwipopts.h @@ -0,0 +1,103 @@ +/* + * Copyright (c) 2001-2003 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Simon Goldschmidt + * + */ +#ifndef LWIP_HDR_LWIPOPTS_H +#define LWIP_HDR_LWIPOPTS_H + +//#define LWIP_TESTMODE 0 + +#define LWIP_IPV4 1 +//#define LWIP_TIMERS 0 + +//#define LWIP_CHECKSUM_ON_COPY 1 +//#define TCP_CHECKSUM_ON_COPY_SANITY_CHECK 1 +//#define TCP_CHECKSUM_ON_COPY_SANITY_CHECK_FAIL(printfmsg) LWIP_ASSERT("TCP_CHECKSUM_ON_COPY_SANITY_CHECK_FAIL", 0) + +/* We link to special sys_arch.c (for basic non-waiting API layers unit tests) */ +#define NO_SYS 1 +#define SYS_LIGHTWEIGHT_PROT 0 +#define LWIP_NETCONN !NO_SYS +#define LWIP_SOCKET !NO_SYS +#define LWIP_NETCONN_FULLDUPLEX LWIP_SOCKET +#define LWIP_NETBUF_RECVINFO 1 +#define LWIP_HAVE_LOOPIF 1 +#define LWIP_NETIF_LINK_CALLBACK 1 +#define LWIP_DNS 1 +#define DNS_DOES_NAME_CHECK 1 +//#define TCPIP_THREAD_TEST + +/* Enable DHCP to test it, disable UDP checksum to easier inject packets */ +#define LWIP_DHCP 0 + +/* Minimal changes to opt.h required for tcp unit tests: */ +/* TCP Maximum segment size. */ + +#define TCP_MSS (1500 - 40) /* TCP_MSS = (Ethernet MTU - IP header size - TCP header size) */ +/* MEM_ALIGNMENT: should be set to the alignment of the CPU for which + lwIP is compiled. 4 byte alignment -> define MEM_ALIGNMENT to 4, 2 + byte alignment -> define MEM_ALIGNMENT to 2. */ +#define MEM_ALIGNMENT 4 +#define MEM_SIZE (20*1024) +#define TCP_SND_QUEUELEN (6 * TCP_SND_BUF)/TCP_MSS +#define MEMP_NUM_TCP_SEG TCP_SND_QUEUELEN +#define TCP_SND_BUF (2 * TCP_MSS) +#define TCP_WND (2 * TCP_MSS) +#define LWIP_WND_SCALE 0 +#define TCP_RCV_SCALE 0 +#define PBUF_POOL_SIZE 10 /* pbuf tests need ~200KByte */ +/* PBUF_POOL_BUFSIZE: the size of each pbuf in the pbuf pool. */ +#define PBUF_POOL_BUFSIZE 1500 +//#define TCP_QUEUE_OOSEQ 0 + +/* ---------- TCP options ---------- */ +#define LWIP_TCP 1 +#define TCP_TTL 255 + +/* Enable IGMP and MDNS for MDNS tests */ +#define LWIP_IGMP 1 +#define LWIP_MDNS_RESPONDER 1 +#define LWIP_NUM_NETIF_CLIENT_DATA (LWIP_MDNS_RESPONDER) + +/* Minimal changes to opt.h required for etharp unit tests: */ +#define ETHARP_SUPPORT_STATIC_ENTRIES 1 + +#define MEMP_NUM_SYS_TIMEOUT (LWIP_NUM_SYS_TIMEOUT_INTERNAL + 8) + +/* MIB2 stats are required to check IPv4 reassembly results */ +#define MIB2_STATS 1 + +/* netif tests want to test this, so enable: */ +//#define LWIP_NETIF_EXT_STATUS_CALLBACK 1 + +/* Check lwip_stats.mem.illegal instead of asserting */ +#define LWIP_MEM_ILLEGAL_FREE(msg) /* to nothing */ + +#endif /* LWIP_HDR_LWIPOPTS_H */ diff --git a/project/at_start_f437/examples/emac/mqtt_client/inc/mqtt_client.h b/project/at_start_f437/examples/emac/mqtt_client/inc/mqtt_client.h new file mode 100644 index 00000000..1c2db064 --- /dev/null +++ b/project/at_start_f437/examples/emac/mqtt_client/inc/mqtt_client.h @@ -0,0 +1,75 @@ +/** + ************************************************************************** + * @file mqtt_client.h + * @version v2.0.9 + * @date 2022-06-28 + * @brief mqtt client header + ************************************************************************** + * Copyright notice & Disclaimer + * + * The software Board Support Package (BSP) that is made available to + * download from Artery official website is the copyrighted work of Artery. + * Artery authorizes customers to use, copy, and distribute the BSP + * software and its related documentation for the purpose of design and + * development in conjunction with Artery microcontrollers. Use of the + * software is governed by this copyright notice and the following disclaimer. + * + * THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, + * GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, + * TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR + * STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, + * INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. + * + ************************************************************************** + */ + +/* define to prevent recursive inclusion -------------------------------------*/ +#ifndef _MQTT_CLIENT_H_ +#define _MQTT_CLIENT_H_ + +#ifdef __cplusplus + extern "C" { +#endif + +/* includes ------------------------------------------------------------------*/ +#include "lwip/pbuf.h" +#include "lwip/apps/mqtt.h" +#include "lwip/apps/mqtt_priv.h" +#include "lwip/netif.h" + +/** @addtogroup AT32F437_periph_examples + * @{ + */ + +/** @addtogroup 437_EMAC_mqtt_client EMAC_mqtt_client + * @{ + */ + +/* mqtt server address and port configuration */ +#define MQTT_SERVER_ADDRESS "192.168.81.1" +#define MQTT_SERVER_PORT 1883 + +err_t mqtt_client_init(void); +static void at32_mqtt_connection_cb(mqtt_client_t *client, void *arg, mqtt_connection_status_t status); +static void at32_mqtt_incoming_data_cb(void *arg, const u8_t *data, u16_t len, u8_t flags); +static void at32_mqtt_incoming_publish_cb(void *arg, const char *topic, u32_t tot_len); +static void mqtt_client_pub_request_cb(void *arg, err_t result); +err_t at32_mqtt_publish(mqtt_client_t *client, char *pub_topic, char *pub_buf, uint16_t data_len, uint8_t qos, uint8_t retain); +static void at32_mqtt_request_cb(void *arg, err_t err); +static err_t at32_mqtt_subscribe(mqtt_client_t *mqtt_client, char *sub_topic, uint8_t qos); + + +/** + * @} + */ + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/project/at_start_f437/examples/emac/mqtt_client/inc/netconf.h b/project/at_start_f437/examples/emac/mqtt_client/inc/netconf.h new file mode 100644 index 00000000..56c3b4b8 --- /dev/null +++ b/project/at_start_f437/examples/emac/mqtt_client/inc/netconf.h @@ -0,0 +1,70 @@ +/** + ************************************************************************** + * @file netconf.h + * @version v2.0.9 + * @date 2022-06-28 + * @brief This file contains all the functions prototypes for the netconf.c + * file. + ************************************************************************** + * Copyright notice & Disclaimer + * + * The software Board Support Package (BSP) that is made available to + * download from Artery official website is the copyrighted work of Artery. + * Artery authorizes customers to use, copy, and distribute the BSP + * software and its related documentation for the purpose of design and + * development in conjunction with Artery microcontrollers. Use of the + * software is governed by this copyright notice and the following disclaimer. + * + * THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, + * GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, + * TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR + * STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, + * INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. + * + ************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __NETCONF_H +#define __NETCONF_H + +#ifdef __cplusplus + extern "C" { +#endif + +/** @addtogroup AT32F437_periph_examples + * @{ + */ + +/** @addtogroup 437_EMAC_mqtt_client + * @{ + */ + +/** @addtogroup network_configuration_prototype + * @{ + */ +/* Includes ------------------------------------------------------------------*/ +void tcpip_stack_init(void); +void lwip_pkt_handle(void); +void time_update(void); +void lwip_periodic_handle(volatile uint32_t localtime); + + +#ifdef __cplusplus +} +#endif + +/** + * @} + */ + +/** + * @} + */ +#endif /* __NETCONF_H */ +/** + * @} + */ + + diff --git a/project/at_start_f437/examples/emac/mqtt_client/mdk_v5/mqtt_client.uvoptx b/project/at_start_f437/examples/emac/mqtt_client/mdk_v5/mqtt_client.uvoptx new file mode 100644 index 00000000..76572e29 --- /dev/null +++ b/project/at_start_f437/examples/emac/mqtt_client/mdk_v5/mqtt_client.uvoptx @@ -0,0 +1,928 @@ + + + + 1.0 + +

### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj; *.o + *.lib + *.txt; *.h; *.inc + *.plm + *.cpp + 0 + + + + 0 + 0 + + + + mqtt_client + 0x4 + ARM-ADS + + 12000000 + + 0 + 1 + 0 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\listings\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 0 + 0 + 1 + + 0 + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 0 + + + + + + + + + + + BIN\CMSIS_AGDI.dll + + + + 0 + UL2CM3 + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0AT32F437_4032 -FS08000000 -FL03F0000 -FP0($$Device:-AT32F437ZMT7$Flash\AT32F437_4032.FLM)) + + + + + 0 + + + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + 0 + 0 + 0 + + + + + + + + + + + + + user + 0 + 0 + 0 + 0 + + 1 + 1 + 1 + 0 + 0 + 0 + ..\src\at32f435_437_clock.c + at32f435_437_clock.c + 0 + 0 + + + 1 + 2 + 1 + 0 + 0 + 0 + ..\src\at32f435_437_int.c + at32f435_437_int.c + 0 + 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0 + + + + diff --git a/project/at_start_f437/examples/emac/mqtt_client/mdk_v5/mqtt_client.uvprojx b/project/at_start_f437/examples/emac/mqtt_client/mdk_v5/mqtt_client.uvprojx new file mode 100644 index 00000000..efb3a92f --- /dev/null +++ b/project/at_start_f437/examples/emac/mqtt_client/mdk_v5/mqtt_client.uvprojx @@ -0,0 +1,732 @@ + + + + 2.1 + +
### uVision Project, (C) Keil Software
+ + + + mqtt_client + 0x4 + ARM-ADS + 5060750::V5.06 update 6 (build 750)::.\ARMCC + 0 + + + -AT32F437ZMT7 + ArteryTek + ArteryTek.AT32F435_437_DFP.2.0.1 + IRAM(0x20000000,0x60000) IROM(0x08000000,0x400000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0AT32F437_4032 -FS08000000 -FL03F0000 -FP0($$Device:-AT32F437ZMT7$Flash\AT32F437_4032.FLM)) + 0 + $$Device:- + + + + + + + + + + $$Device:-AT32F437ZMT7$SVD\AT32F437xx_v2.svd + 0 + 0 + + + + AT32F437ZMT7$Device\Include\at32f435_437.h\ + AT32F437ZMT7$Device\Include\at32f435_437.h\ + + 0 + 0 + 0 + 0 + 1 + + .\objects\ + mqtt_client + 1 + 0 + 1 + 1 + 1 + .\listings\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 0 + + + SARMCM3.DLL + -REMAP -MPU + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM4 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 1 + 4096 + + 1 + BIN\UL2CM3.DLL + "" () + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M4" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 2 + 0 + 0 + 0 + 0 + 8 + 0 + 0 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x60000 + + + 1 + 0x8000000 + 0x400000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x8000000 + 0x400000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x60000 + + + 0 + 0x0 + 0x0 + + + + + + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 0 + + + AT32F437ZMT7,USE_STDPERIPH_DRIVER,AT_START_F437_V1 + + ..\..\..\..\..\..\libraries\drivers\inc;..\..\..\..\..\..\libraries\cmsis\cm4\core_support;..\..\..\..\..\..\libraries\cmsis\cm4\device_support;..\inc;..\..\..\..\..\at32f435_437_board;..\..\..\..\..\..\middlewares\3rd_party\lwip_2.1.2\port;..\..\..\..\..\..\middlewares\3rd_party\lwip_2.1.2\port\arch;..\..\..\..\..\..\middlewares\3rd_party\lwip_2.1.2\src\include;..\..\..\..\..\..\middlewares\3rd_party\lwip_2.1.2\src\include\lwip + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + + + + + + + + + 1 + 0 + 0 + 0 + 1 + 0 + 0x08000000 + 0x20000000 + + + + + + + + + + + + + user + + + at32f435_437_clock.c + 1 + ..\src\at32f435_437_clock.c + + + at32f435_437_int.c + 1 + ..\src\at32f435_437_int.c + + + main.c + 1 + ..\src\main.c + + + at32_emac.c + 1 + ..\src\at32_emac.c + + + netconf.c + 1 + ..\src\netconf.c + + + mqtt_client.c + 1 + ..\src\mqtt_client.c + + + + + bsp + + + at32f435_437_board.c + 1 + ..\..\..\..\..\at32f435_437_board\at32f435_437_board.c + + + + + firmware + + + at32f435_437_crm.c + 1 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_crm.c + + + at32f435_437_usart.c + 1 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_usart.c + + + at32f435_437_emac.c + 1 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_emac.c + + + at32f435_437_exint.c + 1 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_exint.c + + + at32f435_437_gpio.c + 1 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_gpio.c + + + at32f435_437_misc.c + 1 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_misc.c + + + at32f435_437_scfg.c + 1 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_scfg.c + + + at32f435_437_tmr.c + 1 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_tmr.c + + + + + cmsis + + + system_at32f435_437.c + 1 + ..\..\..\..\..\..\libraries\cmsis\cm4\device_support\system_at32f435_437.c + + + startup_at32f435_437.s + 2 + ..\..\..\..\..\..\libraries\cmsis\cm4\device_support\startup\mdk\startup_at32f435_437.s + + + + + lwip + + + altcp.c + 1 + ..\..\..\..\..\..\middlewares\3rd_party\lwip_2.1.2\src\core\altcp.c + + + altcp_alloc.c + 1 + ..\..\..\..\..\..\middlewares\3rd_party\lwip_2.1.2\src\core\altcp_alloc.c + + + altcp_tcp.c + 1 + ..\..\..\..\..\..\middlewares\3rd_party\lwip_2.1.2\src\core\altcp_tcp.c + + + api_lib.c + 1 + ..\..\..\..\..\..\middlewares\3rd_party\lwip_2.1.2\src\api\api_lib.c + + + api_msg.c + 1 + ..\..\..\..\..\..\middlewares\3rd_party\lwip_2.1.2\src\api\api_msg.c + + + autoip.c + 1 + ..\..\..\..\..\..\middlewares\3rd_party\lwip_2.1.2\src\core\ipv4\autoip.c + + + def.c + 1 + ..\..\..\..\..\..\middlewares\3rd_party\lwip_2.1.2\src\core\def.c + + + dhcp.c + 1 + ..\..\..\..\..\..\middlewares\3rd_party\lwip_2.1.2\src\core\ipv4\dhcp.c + + + dns.c + 1 + ..\..\..\..\..\..\middlewares\3rd_party\lwip_2.1.2\src\core\dns.c + + + err.c + 1 + ..\..\..\..\..\..\middlewares\3rd_party\lwip_2.1.2\src\api\err.c + + + etharp.c + 1 + ..\..\..\..\..\..\middlewares\3rd_party\lwip_2.1.2\src\core\ipv4\etharp.c + + + ethernet.c + 1 + ..\..\..\..\..\..\middlewares\3rd_party\lwip_2.1.2\src\netif\ethernet.c + + + ethernetif.c + 1 + ..\..\..\..\..\..\middlewares\3rd_party\lwip_2.1.2\port\ethernetif.c + + + icmp.c + 1 + ..\..\..\..\..\..\middlewares\3rd_party\lwip_2.1.2\src\core\ipv4\icmp.c + + + if_api.c + 1 + ..\..\..\..\..\..\middlewares\3rd_party\lwip_2.1.2\src\api\if_api.c + + + igmp.c + 1 + ..\..\..\..\..\..\middlewares\3rd_party\lwip_2.1.2\src\core\ipv4\igmp.c + + + inet_chksum.c + 1 + ..\..\..\..\..\..\middlewares\3rd_party\lwip_2.1.2\src\core\inet_chksum.c + + + init.c + 1 + ..\..\..\..\..\..\middlewares\3rd_party\lwip_2.1.2\src\core\init.c + + + ip.c + 1 + ..\..\..\..\..\..\middlewares\3rd_party\lwip_2.1.2\src\core\ip.c + + + ip4.c + 1 + ..\..\..\..\..\..\middlewares\3rd_party\lwip_2.1.2\src\core\ipv4\ip4.c + + + ip4_addr.c + 1 + ..\..\..\..\..\..\middlewares\3rd_party\lwip_2.1.2\src\core\ipv4\ip4_addr.c + + + ip4_frag.c + 1 + ..\..\..\..\..\..\middlewares\3rd_party\lwip_2.1.2\src\core\ipv4\ip4_frag.c + + + mem.c + 1 + ..\..\..\..\..\..\middlewares\3rd_party\lwip_2.1.2\src\core\mem.c + + + memp.c + 1 + ..\..\..\..\..\..\middlewares\3rd_party\lwip_2.1.2\src\core\memp.c + + + mqtt.c + 1 + ..\..\..\..\..\..\middlewares\3rd_party\lwip_2.1.2\src\apps\mqtt\mqtt.c + + + netbuf.c + 1 + ..\..\..\..\..\..\middlewares\3rd_party\lwip_2.1.2\src\api\netbuf.c + + + netdb.c + 1 + ..\..\..\..\..\..\middlewares\3rd_party\lwip_2.1.2\src\api\netdb.c + + + netif.c + 1 + ..\..\..\..\..\..\middlewares\3rd_party\lwip_2.1.2\src\core\netif.c + + + netifapi.c + 1 + ..\..\..\..\..\..\middlewares\3rd_party\lwip_2.1.2\src\api\netifapi.c + + + pbuf.c + 1 + ..\..\..\..\..\..\middlewares\3rd_party\lwip_2.1.2\src\core\pbuf.c + + + raw.c + 1 + ..\..\..\..\..\..\middlewares\3rd_party\lwip_2.1.2\src\core\raw.c + + + stats.c + 1 + ..\..\..\..\..\..\middlewares\3rd_party\lwip_2.1.2\src\core\stats.c + + + sockets.c + 1 + ..\..\..\..\..\..\middlewares\3rd_party\lwip_2.1.2\src\api\sockets.c + + + sys.c + 1 + ..\..\..\..\..\..\middlewares\3rd_party\lwip_2.1.2\src\core\sys.c + + + sys_arch.c + 1 + ..\..\..\..\..\..\middlewares\3rd_party\lwip_2.1.2\port\sys_arch.c + + + tcp.c + 1 + ..\..\..\..\..\..\middlewares\3rd_party\lwip_2.1.2\src\core\tcp.c + + + tcp_in.c + 1 + ..\..\..\..\..\..\middlewares\3rd_party\lwip_2.1.2\src\core\tcp_in.c + + + tcp_out.c + 1 + ..\..\..\..\..\..\middlewares\3rd_party\lwip_2.1.2\src\core\tcp_out.c + + + tcpip.c + 1 + ..\..\..\..\..\..\middlewares\3rd_party\lwip_2.1.2\src\api\tcpip.c + + + timeouts.c + 1 + ..\..\..\..\..\..\middlewares\3rd_party\lwip_2.1.2\src\core\timeouts.c + + + udp.c + 1 + ..\..\..\..\..\..\middlewares\3rd_party\lwip_2.1.2\src\core\udp.c + + + + + readme + + + readme.txt + 5 + ..\readme.txt + + + + + + + + + + + + + + + + + <Project Info> + + + + + + 0 + 1 + + + + + diff --git a/project/at_start_f437/examples/emac/mqtt_client/readme.txt b/project/at_start_f437/examples/emac/mqtt_client/readme.txt new file mode 100644 index 00000000..31bde057 --- /dev/null +++ b/project/at_start_f437/examples/emac/mqtt_client/readme.txt @@ -0,0 +1,12 @@ +/** + ************************************************************************** + * @file readme.txt + * @version v2.0.9 + * @date 2022-06-28 + * @brief readme + ************************************************************************** + */ + + this demo is based on the at-start board, in this demo, shows the mqtt client + operating flow for at32f4xx series. for more detailed information, please + refer to the application note document AN0058. \ No newline at end of file diff --git a/project/at_start_f437/examples/emac/mqtt_client/src/at32_emac.c b/project/at_start_f437/examples/emac/mqtt_client/src/at32_emac.c new file mode 100644 index 00000000..dd1c9157 --- /dev/null +++ b/project/at_start_f437/examples/emac/mqtt_client/src/at32_emac.c @@ -0,0 +1,601 @@ +/** + ************************************************************************** + * @file at32_emac.c + * @version v2.0.9 + * @date 2022-06-28 + * @brief emac config program + ************************************************************************** + * Copyright notice & Disclaimer + * + * The software Board Support Package (BSP) that is made available to + * download from Artery official website is the copyrighted work of Artery. + * Artery authorizes customers to use, copy, and distribute the BSP + * software and its related documentation for the purpose of design and + * development in conjunction with Artery microcontrollers. Use of the + * software is governed by this copyright notice and the following disclaimer. + * + * THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, + * GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, + * TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR + * STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, + * INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. + * + ************************************************************************** + */ + +/* includes ------------------------------------------------------------------*/ +#include "at32f435_437_board.h" +#include "lwip/dhcp.h" +#include "at32_emac.h" + +/** @addtogroup AT32F437_periph_examples + * @{ + */ + +/** @addtogroup 437_EMAC_mqtt_client + * @{ + */ + +emac_control_config_type mac_control_para; + +/** + * @brief enable emac clock and gpio clock + * @param none + * @retval success or error + */ +error_status emac_system_init(void) +{ + error_status status; + + emac_nvic_configuration(); + + /* emac periph clock enable */ + crm_periph_clock_enable(CRM_EMAC_PERIPH_CLOCK, TRUE); + crm_periph_clock_enable(CRM_EMACTX_PERIPH_CLOCK, TRUE); + crm_periph_clock_enable(CRM_EMACRX_PERIPH_CLOCK, TRUE); + + emac_pins_configuration(); + status = emac_layer2_configuration(); + emac_tmr_init(); + + return status; +} + +/** + * @brief configures emac irq channel. + * @param none + * @retval none + */ +void emac_nvic_configuration(void) +{ + nvic_irq_enable(EMAC_IRQn, 1, 0); +} + +/** + * @brief configures emac required pins. + * @param none + * @retval none + */ +void emac_pins_configuration(void) +{ + gpio_init_type gpio_init_struct = {0}; + + /* emac pins clock enable */ + crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE); + crm_periph_clock_enable(CRM_GPIOB_PERIPH_CLOCK, TRUE); + crm_periph_clock_enable(CRM_GPIOC_PERIPH_CLOCK, TRUE); + crm_periph_clock_enable(CRM_GPIOD_PERIPH_CLOCK, TRUE); + crm_periph_clock_enable(CRM_GPIOE_PERIPH_CLOCK, TRUE); + crm_periph_clock_enable(CRM_GPIOG_PERIPH_CLOCK, TRUE); + + /* pa2 -> mdio */ + gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE2, GPIO_MUX_11); + gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; + gpio_init_struct.gpio_mode = GPIO_MODE_MUX; + gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_init_struct.gpio_pins = GPIO_PINS_2; + gpio_init_struct.gpio_pull = GPIO_PULL_NONE; + gpio_init(GPIOA, &gpio_init_struct); + + /* pc1 -> mdc */ + gpio_pin_mux_config(GPIOC, GPIO_PINS_SOURCE1, GPIO_MUX_11); + gpio_init_struct.gpio_pins = GPIO_PINS_1; + gpio_init(GPIOC, &gpio_init_struct); + + #ifdef MII_MODE + /* + pb12 -> tx_d0 + pb13 -> tx_d1 + pc2 -> tx_d2 + pb8 -> tx_d3 + pb11 -> tx_en + pc3 -> tx_clk + */ + gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE8, GPIO_MUX_11); + gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE11, GPIO_MUX_11); + gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE12, GPIO_MUX_11); + gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE13, GPIO_MUX_11); + gpio_init_struct.gpio_pins = GPIO_PINS_8 | GPIO_PINS_11 | GPIO_PINS_12 | GPIO_PINS_13; + gpio_init(GPIOB, &gpio_init_struct); + + gpio_pin_mux_config(GPIOC, GPIO_PINS_SOURCE2, GPIO_MUX_11); + gpio_pin_mux_config(GPIOC, GPIO_PINS_SOURCE3, GPIO_MUX_11); + gpio_init_struct.gpio_pins = GPIO_PINS_2 | GPIO_PINS_3; + gpio_init(GPIOC, &gpio_init_struct); + + /* + pd8 -> rx_dv + pd9 -> rx_d0 + pd10 -> rx_d1 + pd11 -> rx_d2 + pd12 -> rx_d3 + */ + gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE8, GPIO_MUX_11); + gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE9, GPIO_MUX_11); + gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE10, GPIO_MUX_11); + gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE11, GPIO_MUX_11); + gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE12, GPIO_MUX_11); + gpio_init_struct.gpio_pins = GPIO_PINS_8 | GPIO_PINS_9 | GPIO_PINS_10 | GPIO_PINS_11 | GPIO_PINS_12; + gpio_init(GPIOD, &gpio_init_struct); + + /* + pa1 -> rx_clk + pa0 -> crs + pa3 -> col + pb10 -> rx_er + */ + gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE0, GPIO_MUX_11); + gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE1, GPIO_MUX_11); + gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE3, GPIO_MUX_11); + gpio_init_struct.gpio_pins = GPIO_PINS_0 | GPIO_PINS_1 | GPIO_PINS_3; + gpio_init(GPIOA, &gpio_init_struct); + + gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE10, GPIO_MUX_11); + gpio_init_struct.gpio_pins = GPIO_PINS_10; + gpio_init(GPIOB, &gpio_init_struct); + #endif /* MII_MODE */ + + #ifdef RMII_MODE + /* + pb12 -> tx_d0 + pb13 -> tx_d1 + pb11 -> tx_en + */ + gpio_pin_mux_config(GPIOG, GPIO_PINS_SOURCE11, GPIO_MUX_11); + gpio_pin_mux_config(GPIOG, GPIO_PINS_SOURCE13, GPIO_MUX_11); + gpio_pin_mux_config(GPIOG, GPIO_PINS_SOURCE14, GPIO_MUX_11); + gpio_init_struct.gpio_pins = GPIO_PINS_11 | GPIO_PINS_13 | GPIO_PINS_14; + gpio_init(GPIOG, &gpio_init_struct); + + /* + pd8 -> rx_dv + pd9 -> rx_d0 + pd10 -> rx_d1 + */ + gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE8, GPIO_MUX_11); + gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE9, GPIO_MUX_11); + gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE10, GPIO_MUX_11); + gpio_init_struct.gpio_pins = GPIO_PINS_8 | GPIO_PINS_9 | GPIO_PINS_10; + gpio_init_struct.gpio_mode = GPIO_MODE_MUX; + gpio_init(GPIOD, &gpio_init_struct); + + + #endif /* RMII_MODE */ + /* + pa1 -> ref_clk + */ + gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE1, GPIO_MUX_11); + gpio_init_struct.gpio_pins = GPIO_PINS_1; + gpio_init(GPIOA, &gpio_init_struct); + + #if !CRYSTAL_ON_PHY + gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE8, GPIO_MUX_0); + gpio_init_struct.gpio_pins = GPIO_PINS_8; + gpio_init_struct.gpio_mode = GPIO_MODE_MUX; + gpio_init(GPIOA, &gpio_init_struct); + #endif +} + +/** + * @brief configures emac layer2 + * @param none + * @retval error or success + */ +error_status emac_layer2_configuration(void) +{ + emac_dma_config_type dma_control_para; + crm_periph_clock_enable(CRM_SCFG_PERIPH_CLOCK, TRUE); + #ifdef MII_MODE + scfg_emac_interface_set(SCFG_EMAC_SELECT_MII); + #elif defined RMII_MODE + scfg_emac_interface_set(SCFG_EMAC_SELECT_RMII); + #endif + crm_clock_out1_set(CRM_CLKOUT1_PLL); + crm_clkout_div_set(CRM_CLKOUT_INDEX_1, CRM_CLKOUT_DIV1_5, CRM_CLKOUT_DIV2_2); + + /* reset phy */ + reset_phy(); + /* reset emac ahb bus */ + emac_reset(); + + /* software reset emac dma */ + emac_dma_software_reset_set(); + + while(emac_dma_software_reset_get() == SET); + + emac_control_para_init(&mac_control_para); + + mac_control_para.auto_nego = EMAC_AUTO_NEGOTIATION_ON; + + if(emac_phy_init(&mac_control_para) == ERROR) + { + return ERROR; + } + + emac_dma_para_init(&dma_control_para); + + dma_control_para.rsf_enable = TRUE; + dma_control_para.tsf_enable = TRUE; + dma_control_para.osf_enable = TRUE; + dma_control_para.aab_enable = TRUE; + dma_control_para.usp_enable = TRUE; + dma_control_para.fb_enable = TRUE; + dma_control_para.flush_rx_disable = TRUE; + dma_control_para.rx_dma_pal = EMAC_DMA_PBL_32; + dma_control_para.tx_dma_pal = EMAC_DMA_PBL_32; + dma_control_para.priority_ratio = EMAC_DMA_2_RX_1_TX; + + emac_dma_config(&dma_control_para); + emac_dma_interrupt_enable(EMAC_DMA_INTERRUPT_NORMAL_SUMMARY, TRUE); + emac_dma_interrupt_enable(EMAC_DMA_INTERRUPT_RX, TRUE); + + return SUCCESS; +} + +/** + * @brief reset layer 1 + * @param none + * @retval none + */ +void static reset_phy(void) +{ + gpio_init_type gpio_init_struct = {0}; + crm_periph_clock_enable(CRM_GPIOE_PERIPH_CLOCK, TRUE); + crm_periph_clock_enable(CRM_GPIOG_PERIPH_CLOCK, TRUE); + gpio_pin_mux_config(GPIOC, GPIO_PINS_SOURCE8, GPIO_MUX_0); + gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; + gpio_init_struct.gpio_mode = GPIO_MODE_OUTPUT; + gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_init_struct.gpio_pins = GPIO_PINS_15; + gpio_init_struct.gpio_pull = GPIO_PULL_NONE; + gpio_init(GPIOE, &gpio_init_struct); + + gpio_init_struct.gpio_pins = GPIO_PINS_15; + gpio_init_struct.gpio_pull = GPIO_PULL_NONE; + gpio_init(GPIOG, &gpio_init_struct); + gpio_bits_reset(GPIOG, GPIO_PINS_15); + gpio_bits_reset(GPIOE, GPIO_PINS_15); + delay_ms(2); + gpio_bits_set(GPIOE, GPIO_PINS_15); + delay_ms(2); +} + +/** + * @brief reset phy register + * @param none + * @retval SUCCESS or ERROR + */ +error_status emac_phy_register_reset(void) +{ + uint16_t data = 0; + uint32_t timeout = 0; + uint32_t i = 0; + + if(emac_phy_register_write(PHY_ADDRESS, PHY_CONTROL_REG, PHY_RESET_BIT) == ERROR) + { + return ERROR; + } + + for(i = 0; i < 0x000FFFFF; i++); + + do + { + timeout++; + if(emac_phy_register_read(PHY_ADDRESS, PHY_CONTROL_REG, &data) == ERROR) + { + return ERROR; + } + } while((data & PHY_RESET_BIT) && (timeout < PHY_TIMEOUT)); + + for(i = 0; i < 0x00FFFFF; i++); + if(timeout == PHY_TIMEOUT) + { + return ERROR; + } + return SUCCESS; +} + +/** + * @brief set mac speed related parameters + * @param nego: auto negotiation on or off. + * this parameter can be one of the following values: + * - EMAC_AUTO_NEGOTIATION_OFF + * - EMAC_AUTO_NEGOTIATION_ON. + * @param mode: half-duplex or full-duplex. + * this parameter can be one of the following values: + * - EMAC_HALF_DUPLEX + * - EMAC_FULL_DUPLEX. + * @param speed: 10 mbps or 100 mbps + * this parameter can be one of the following values: + * - EMAC_SPEED_10MBPS + * - EMAC_SPEED_100MBPS. + * @retval none + */ +error_status emac_speed_config(emac_auto_negotiation_type nego, emac_duplex_type mode, emac_speed_type speed) +{ + uint16_t data = 0; + uint32_t timeout = 0; + if(nego == EMAC_AUTO_NEGOTIATION_ON) + { + do + { + timeout++; + if(emac_phy_register_read(PHY_ADDRESS, PHY_STATUS_REG, &data) == ERROR) + { + return ERROR; + } + } while(!(data & PHY_LINKED_STATUS_BIT) && (timeout < PHY_TIMEOUT)); + + if(timeout == PHY_TIMEOUT) + { + return ERROR; + } + + timeout = 0; + + if(emac_phy_register_write(PHY_ADDRESS, PHY_CONTROL_REG, PHY_AUTO_NEGOTIATION_BIT) == ERROR) + { + return ERROR; + } + + + do + { + timeout++; + if(emac_phy_register_read(PHY_ADDRESS, PHY_STATUS_REG, &data) == ERROR) + { + return ERROR; + } + } while(!(data & PHY_NEGO_COMPLETE_BIT) && (timeout < PHY_TIMEOUT)); + + if(timeout == PHY_TIMEOUT) + { + return ERROR; + } + + if(emac_phy_register_read(PHY_ADDRESS, PHY_SPECIFIED_CS_REG, &data) == ERROR) + { + return ERROR; + } + #ifdef DM9162 + if(data & PHY_FULL_DUPLEX_100MBPS_BIT) + { + emac_fast_speed_set(EMAC_SPEED_100MBPS); + emac_duplex_mode_set(EMAC_FULL_DUPLEX); + } + else if(data & PHY_HALF_DUPLEX_100MBPS_BIT) + { + emac_fast_speed_set(EMAC_SPEED_100MBPS); + emac_duplex_mode_set(EMAC_HALF_DUPLEX); + } + else if(data & PHY_FULL_DUPLEX_10MBPS_BIT) + { + emac_fast_speed_set(EMAC_SPEED_10MBPS); + emac_duplex_mode_set(EMAC_FULL_DUPLEX); + } + else if(data & PHY_HALF_DUPLEX_10MBPS_BIT) + { + emac_fast_speed_set(EMAC_SPEED_10MBPS); + emac_duplex_mode_set(EMAC_HALF_DUPLEX); + } + #else + if(data & PHY_DUPLEX_MODE) + { + emac_duplex_mode_set(EMAC_FULL_DUPLEX); + } + else + { + emac_duplex_mode_set(EMAC_HALF_DUPLEX); + } + if(data & PHY_SPEED_MODE) + { + emac_fast_speed_set(EMAC_SPEED_10MBPS); + } + else + { + emac_fast_speed_set(EMAC_SPEED_100MBPS); + } + #endif + } + else + { + if(emac_phy_register_write(PHY_ADDRESS, PHY_CONTROL_REG, (uint16_t)((mode << 8) | (speed << 13))) == ERROR) + { + return ERROR; + } + if(speed == EMAC_SPEED_100MBPS) + { + emac_fast_speed_set(EMAC_SPEED_100MBPS); + } + else + { + emac_fast_speed_set(EMAC_SPEED_10MBPS); + } + if(mode == EMAC_FULL_DUPLEX) + { + emac_duplex_mode_set(EMAC_FULL_DUPLEX); + } + else + { + emac_duplex_mode_set(EMAC_HALF_DUPLEX); + } + } + + return SUCCESS; +} + +/** + * @brief initialize emac phy + * @param none + * @retval SUCCESS or ERROR + */ +error_status emac_phy_init(emac_control_config_type *control_para) +{ + emac_clock_range_set(); + if(emac_phy_register_reset() == ERROR) + { + return ERROR; + } + + emac_control_config(control_para); + return SUCCESS; +} + +/** + * @brief updates the link states + * @param none + * @retval link state 0: disconnect, 1: connection + */ +uint16_t link_update(void) +{ + uint16_t link_data, link_state; + if(emac_phy_register_read(PHY_ADDRESS, PHY_STATUS_REG, &link_data) == ERROR) + { + return ERROR; + } + + link_state = (link_data & PHY_LINKED_STATUS_BIT)>>2; + return link_state; +} + +/** + * @brief this function sets the netif link status. + * @param netif: the network interface + * @retval none + */ +void ethernetif_set_link(void const *argument) +{ + uint16_t regvalue = 0; + struct netif *netif = (struct netif *)argument; + + /* read phy_bsr*/ + regvalue = link_update(); + + if(regvalue > 0) + { + at32_led_on(LED4); + at32_led_off(LED2); + } + else + { + at32_led_on(LED2); + at32_led_off(LED4); + } + /* check whether the netif link down and the phy link is up */ + if(!netif_is_link_up(netif) && (regvalue)) + { + /* network cable is connected */ + netif_set_link_up(netif); + } + else if(netif_is_link_up(netif) && (!regvalue)) + { + /* network cable is dis-connected */ + netif_set_link_down(netif); + } +} + +/** + * @brief this function notify user about link status changement. + * @param netif: the network interface + * @retval none + */ +void ethernetif_notify_conn_changed(struct netif *netif) +{ + /* note : this is function could be implemented in user file + when the callback is needed, + */ + + if (netif_is_link_up(netif)) { + netif_set_up(netif); + +#if LWIP_DHCP + /* creates a new dhcp client for this interface on the first call. + note: you must call dhcp_fine_tmr() and dhcp_coarse_tmr() at + the predefined regular intervals after starting the client. + you can peek in the netif->dhcp struct for the actual dhcp status.*/ + dhcp_start(netif); +#endif + } + else + netif_set_down(netif); +} + +/** + * @brief link callback function, this function is called on change of link status + * to update low level driver configuration. + * @param netif: the network interface + * @retval none + */ +void ethernetif_update_config(struct netif *netif) +{ + if(netif_is_link_up(netif)) + { + emac_speed_config(mac_control_para.auto_nego, mac_control_para.duplex_mode, mac_control_para.fast_ethernet_speed); + + delay_ms(300); + /* enable mac and dma transmission and reception */ + emac_start(); + } + else + { + /* disable mac and dma transmission and reception */ + emac_stop(); + } + + ethernetif_notify_conn_changed(netif); +} + +/** + * @brief initialize tmr6 for emac + * @param none + * @retval none + */ +void emac_tmr_init(void) +{ + crm_clocks_freq_type crm_clocks_freq_struct = {0}; + crm_periph_clock_enable(CRM_TMR6_PERIPH_CLOCK, TRUE); + + crm_clocks_freq_get(&crm_clocks_freq_struct); + /* tmr1 configuration */ + /* time base configuration */ + /* systemclock/24000/100 = 100hz */ + tmr_base_init(TMR6, 99, (crm_clocks_freq_struct.ahb_freq / 10000) - 1); + tmr_cnt_dir_set(TMR6, TMR_COUNT_UP); + + /* overflow interrupt enable */ + tmr_interrupt_enable(TMR6, TMR_OVF_INT, TRUE); + + /* tmr1 overflow interrupt nvic init */ + nvic_priority_group_config(NVIC_PRIORITY_GROUP_4); + nvic_irq_enable(TMR6_DAC_GLOBAL_IRQn, 0, 0); + tmr_counter_enable(TMR6, TRUE); +} + +/** + * @} + */ + +/** + * @} + */ diff --git a/project/at_start_f437/examples/emac/mqtt_client/src/at32f435_437_clock.c b/project/at_start_f437/examples/emac/mqtt_client/src/at32f435_437_clock.c new file mode 100644 index 00000000..17b72989 --- /dev/null +++ b/project/at_start_f437/examples/emac/mqtt_client/src/at32f435_437_clock.c @@ -0,0 +1,121 @@ +/** + ************************************************************************** + * @file at32f435_437_clock.c + * @version v2.0.9 + * @date 2022-06-28 + * @brief system clock config program + ************************************************************************** + * Copyright notice & Disclaimer + * + * The software Board Support Package (BSP) that is made available to + * download from Artery official website is the copyrighted work of Artery. + * Artery authorizes customers to use, copy, and distribute the BSP + * software and its related documentation for the purpose of design and + * development in conjunction with Artery microcontrollers. Use of the + * software is governed by this copyright notice and the following disclaimer. + * + * THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, + * GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, + * TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR + * STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, + * INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. + * + ************************************************************************** + */ + +/* includes ------------------------------------------------------------------*/ +#include "at32f435_437_clock.h" + +/** + * @brief system clock config program + * @note the system clock is configured as follow: + * - system clock = (hext * pll_ns)/(pll_ms * pll_fr) + * - system clock source = pll (hext) + * - hext = 8000000 + * - sclk = 250000000 + * - ahbdiv = 1 + * - ahbclk = 250000000 + * - apb2div = 2 + * - apb2clk = 125000000 + * - apb1div = 2 + * - apb1clk = 125000000 + * - pll_ns = 125 + * - pll_ms = 1 + * - pll_fr = 4 + * @param none + * @retval none + */ +void system_clock_config(void) +{ + /* enable pwc periph clock */ + crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE); + + /* config ldo voltage */ + pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3); + + /* set the flash clock divider */ + flash_clock_divider_set(FLASH_CLOCK_DIV_3); + + /* reset crm */ + crm_reset(); + + crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE); + + /* wait till hext is ready */ + while(crm_hext_stable_wait() == ERROR) + { + } + + /* config pll clock resource + common frequency config list: pll source selected hick or hext(8mhz) + _______________________________________________________________________________________ + | | | | | | | | | | + |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 | + |________|_________|_________|_________|_________|_________|_________|_________________| + | | | | | | | | | | + |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 | + | | | | | | | | | | + |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | + | | | | | | | | | | + |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16| + |________|_________|_________|_________|_________|_________|_________|________|________| + + if pll clock source selects hext with other frequency values, or configure pll to other + frequency values, please use the at32 new clock configuration tool for configuration. */ + crm_pll_config(CRM_PLL_SOURCE_HEXT, 125, 1, CRM_PLL_FR_4); + + /* enable pll */ + crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE); + + /* wait till pll is ready */ + while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET) + { + } + + /* config ahbclk */ + crm_ahb_div_set(CRM_AHB_DIV_1); + + /* config apb2clk */ + crm_apb2_div_set(CRM_APB2_DIV_2); + + /* config apb1clk */ + crm_apb1_div_set(CRM_APB1_DIV_2); + + /* enable auto step mode */ + crm_auto_step_mode_enable(TRUE); + + /* select pll as system clock source */ + crm_sysclk_switch(CRM_SCLK_PLL); + + /* wait till pll is used as system clock source */ + while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL) + { + } + + /* disable auto step mode */ + crm_auto_step_mode_enable(FALSE); + + /* update system_core_clock global variable */ + system_core_clock_update(); +} diff --git a/project/at_start_f437/examples/emac/mqtt_client/src/at32f435_437_int.c b/project/at_start_f437/examples/emac/mqtt_client/src/at32f435_437_int.c new file mode 100644 index 00000000..85c88d6f --- /dev/null +++ b/project/at_start_f437/examples/emac/mqtt_client/src/at32f435_437_int.c @@ -0,0 +1,175 @@ +/** + ************************************************************************** + * @file at32f435_437_int.c + * @version v2.0.9 + * @date 2022-06-28 + * @brief main interrupt service routines. + ************************************************************************** + * Copyright notice & Disclaimer + * + * The software Board Support Package (BSP) that is made available to + * download from Artery official website is the copyrighted work of Artery. + * Artery authorizes customers to use, copy, and distribute the BSP + * software and its related documentation for the purpose of design and + * development in conjunction with Artery microcontrollers. Use of the + * software is governed by this copyright notice and the following disclaimer. + * + * THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, + * GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, + * TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR + * STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, + * INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. + * + ************************************************************************** + */ + +/* includes ------------------------------------------------------------------*/ +#include "at32f435_437_int.h" +#include "netconf.h" + +/** @addtogroup AT32F437_periph_examples + * @{ + */ + +/** @addtogroup 437_EMAC_mqtt_client + * @{ + */ + +/** + * @brief this function handles nmi exception. + * @param none + * @retval none + */ +void NMI_Handler(void) +{ +} + +/** + * @brief this function handles hard fault exception. + * @param none + * @retval none + */ +void HardFault_Handler(void) +{ + /* go to infinite loop when hard fault exception occurs */ + while(1) + { + } +} + +/** + * @brief this function handles memory manage exception. + * @param none + * @retval none + */ +void MemManage_Handler(void) +{ + /* go to infinite loop when memory manage exception occurs */ + while(1) + { + } +} + +/** + * @brief this function handles bus fault exception. + * @param none + * @retval none + */ +void BusFault_Handler(void) +{ + /* go to infinite loop when bus fault exception occurs */ + while(1) + { + } +} + +/** + * @brief this function handles usage fault exception. + * @param none + * @retval none + */ +void UsageFault_Handler(void) +{ + /* go to infinite loop when usage fault exception occurs */ + while(1) + { + } +} + +/** + * @brief this function handles svcall exception. + * @param none + * @retval none + */ +void SVC_Handler(void) +{ +} + +/** + * @brief this function handles debug monitor exception. + * @param none + * @retval none + */ +void DebugMon_Handler(void) +{ +} + +/** + * @brief this function handles pendsv_handler exception. + * @param none + * @retval none + */ +void PendSV_Handler(void) +{ +} + +/** + * @brief this function handles systick handler. + * @param none + * @retval none + */ +void SysTick_Handler(void) +{ +} + +/** + * @brief this function handles timer6 overflow handler. + * @param none + * @retval none + */ +void TMR6_DAC_GLOBAL_IRQHandler(void) +{ + if(tmr_flag_get(TMR6, TMR_OVF_FLAG) != RESET) + { + /* Update the local_time by adding SYSTEMTICK_PERIOD_MS each SysTick interrupt */ + time_update(); + tmr_flag_clear(TMR6, TMR_OVF_FLAG); + } +} + +/** + * @brief this function handles emac handler. + * @param none + * @retval none + */ +void EMAC_IRQHandler(void) +{ + /* handles all the received frames */ + while(emac_received_packet_size_get() != 0) + { + lwip_pkt_handle(); + } + + /* clear the emac dma rx it pending bits */ + emac_dma_flag_clear(EMAC_DMA_RI_FLAG); + emac_dma_flag_clear(EMAC_DMA_NIS_FLAG); +} + +/** + * @} + */ + +/** + * @} + */ diff --git a/project/at_start_f437/examples/emac/mqtt_client/src/main.c b/project/at_start_f437/examples/emac/mqtt_client/src/main.c new file mode 100644 index 00000000..819174aa --- /dev/null +++ b/project/at_start_f437/examples/emac/mqtt_client/src/main.c @@ -0,0 +1,86 @@ +/** + ************************************************************************** + * @file main.c + * @version v2.0.9 + * @date 2022-06-28 + * @brief main program + ************************************************************************** + * Copyright notice & Disclaimer + * + * The software Board Support Package (BSP) that is made available to + * download from Artery official website is the copyrighted work of Artery. + * Artery authorizes customers to use, copy, and distribute the BSP + * software and its related documentation for the purpose of design and + * development in conjunction with Artery microcontrollers. Use of the + * software is governed by this copyright notice and the following disclaimer. + * + * THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, + * GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, + * TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR + * STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, + * INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. + * + ************************************************************************** + */ + +#include "at32f435_437_board.h" +#include "at32f435_437_clock.h" +#include "at32_emac.h" +#include "netconf.h" +#include "mqtt_client.h" + +/** @addtogroup AT32F437_periph_examples + * @{ + */ + +/** @addtogroup 437_EMAC_mqtt_client EMAC_mqtt_client + * @{ + */ + +#define DELAY 100 +#define FAST 1 +#define SLOW 4 +uint8_t g_speed = FAST; +volatile uint32_t local_time = 0; + +/** + * @brief main function. + * @param none + * @retval none + */ +int main(void) +{ + error_status status; + + system_clock_config(); + + uart_print_init(115200); + + at32_board_init(); + + nvic_priority_group_config(NVIC_PRIORITY_GROUP_4); + + delay_init(); + + status = emac_system_init(); + + while(status == ERROR); + + tcpip_stack_init(); + + mqtt_client_init(); + + while(1) + { + lwip_periodic_handle(local_time); + } +} + +/** + * @} + */ + +/** + * @} + */ diff --git a/project/at_start_f437/examples/emac/mqtt_client/src/mqtt_client.c b/project/at_start_f437/examples/emac/mqtt_client/src/mqtt_client.c new file mode 100644 index 00000000..97a706ad --- /dev/null +++ b/project/at_start_f437/examples/emac/mqtt_client/src/mqtt_client.c @@ -0,0 +1,329 @@ +/** + ************************************************************************** + * @file mqtt_client.c + * @version v2.0.9 + * @date 2022-06-28 + * @brief mqtt client config program + ************************************************************************** + * Copyright notice & Disclaimer + * + * The software Board Support Package (BSP) that is made available to + * download from Artery official website is the copyrighted work of Artery. + * Artery authorizes customers to use, copy, and distribute the BSP + * software and its related documentation for the purpose of design and + * development in conjunction with Artery microcontrollers. Use of the + * software is governed by this copyright notice and the following disclaimer. + * + * THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, + * GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, + * TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR + * STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, + * INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. + * + ************************************************************************** + */ + +/* includes ------------------------------------------------------------------*/ +#include "mqtt_client.h" +#include "string.h" +#include "at32f435_437_board.h" +#include "lwip/pbuf.h" +#include "lwip/apps/mqtt.h" +#include "lwip/apps/mqtt_priv.h" +#include "lwip/netif.h" + +/** @addtogroup AT32F437_periph_examples + * @{ + */ + +/** @addtogroup 437_EMAC_mqtt_client EMAC_mqtt_client + * @{ + */ + +mqtt_client_t *s__mqtt_client_instance; + +/** + * @brief mqtt connection subscription process + * @param client: mqtt connection handle + * @param arg: mqtt connection parameter point + * @retval none + */ +__weak void mqtt_conn_sub_proc(mqtt_client_t *client, void *arg) +{ + /* topic name */ + char test_sub_topic[] = "at_sub_topic"; + at32_mqtt_subscribe(client, test_sub_topic, 0); +} + +/** + * @brief mqtt error process callback + * @param client: mqtt connection handle + * @param arg: mqtt connection parameter point + * @retval none + */ +__weak void mqtt_error_process_callback(mqtt_client_t *client, void *arg) +{ + /* user code */ +} + +/** + * @brief mqtt connection status callback + * @param client: mqtt connection handle + * @param arg: mqtt connection parameter point + * @param status: mqtt connection status + * @retval none + */ +static void at32_mqtt_connection_cb(mqtt_client_t *client, void *arg, mqtt_connection_status_t status) +{ + if (client == NULL) + { + printf("at32_mqtt_connection_cb: condition error @entry\r\n"); + return; + } + + /* Successfully connected */ + if (status == MQTT_CONNECT_ACCEPTED) + { + printf("at32_mqtt_connection_cb: Successfully connected\r\n"); + + mqtt_set_inpub_callback(client, at32_mqtt_incoming_publish_cb, at32_mqtt_incoming_data_cb, arg); + + mqtt_conn_sub_proc(client, arg); + } + else + { + printf("at32_mqtt_connection_cb: Fail connected, status = %s\r\n", lwip_strerr(status)); + + mqtt_error_process_callback(client, arg); + } +} + +/** + * @brief connect to mqtt server + * @retval error status + */ +err_t mqtt_client_init(void) +{ + err_t ret; + struct mqtt_connect_client_info_t mqtt_connect_info = + { + + "AT_MQTT_Test", + NULL, + NULL, + 60, + "at_pub_topic", + "Offline_pls_check", + 0, + 0 + }; + + ip_addr_t server_ip; + /* mqtt server port */ + uint16_t server_port = MQTT_SERVER_PORT; + /* mqtt server ip */ + ip4_addr_set_u32(&server_ip, ipaddr_addr(MQTT_SERVER_ADDRESS)); + + printf("at32_mqtt_connect: Enter!\r\n"); + + if (s__mqtt_client_instance == NULL) + { + s__mqtt_client_instance = mqtt_client_new(); + } + + if (s__mqtt_client_instance == NULL) + { + printf("at32_mqtt_connect: s__mqtt_client_instance malloc fail @@!!!\r\n"); + return ERR_MEM; + } + + ret = mqtt_client_connect(s__mqtt_client_instance, &server_ip, server_port, \ + at32_mqtt_connection_cb, NULL, &mqtt_connect_info); + + printf("at32_mqtt_connect: connect to mqtt %s\r\n", lwip_strerr(ret)); + + return ret; +} + +/** + * @brief mqtt received data callback + * @param arg: mqtt connection parameter point + * @param data: data + * @param len: data length + * @param flags: data flag + * @retval none + */ +static void at32_mqtt_incoming_data_cb(void *arg, const u8_t *data, u16_t len, u8_t flags) +{ + if ((data == NULL) || (len == 0)) + { + printf("mqtt_client_incoming_data_cb: condition error @entry\r\n"); + return; + } + + printf("recv_buffer = %s\r\n", data); + + printf("mqtt_client_incoming_data_cb:reveiving incomming data.\r\n"); +} + +/** + * @brief mqtt received publish callback + * @param arg: mqtt connection parameter point + * @param topic: mqtt topic + * @param tot_len: data total length + * @retval none + */ +static void at32_mqtt_incoming_publish_cb(void *arg, const char *topic, u32_t tot_len) +{ + if ((topic == NULL) || (tot_len == 0)) + { + printf("at32_mqtt_incoming_publish_cb: condition error @entry\r\n"); + return; + } + + printf("at32_mqtt_incoming_publish_cb: topic = %s.\r\n", topic); + printf("at32_mqtt_incoming_publish_cb: tot_len = %d.\r\n", tot_len); +} + +/** + * @brief mqtt send data callback + * @param arg: mqtt connection parameter point + * @param result: send data result + * @retval none + */ +static void mqtt_client_pub_request_cb(void *arg, err_t result) +{ + mqtt_client_t *client = (mqtt_client_t *)arg; + + if (result != ERR_OK) + { + printf("mqtt_client_pub_request_cb: c002: Publish FAIL, result = %s\r\n", lwip_strerr(result)); + + mqtt_error_process_callback(client, arg); + } + else + { + printf("mqtt_client_pub_request_cb: c005: Publish complete!\r\n"); + } +} + +/** + * @brief mqtt send data to server + * @param client: mqtt connection handle + * @param pub_topic: mqtt publish topic + * @param pub_buf: mqtt publish buffer + * @param data_len: data length + * @param qosquality of service, 0 1 or 2 + * @param retainmqtt retain flag + * @retval send status + */ +err_t at32_mqtt_publish(mqtt_client_t *client, char *pub_topic, char *pub_buf, uint16_t data_len, uint8_t qos, uint8_t retain) +{ + err_t err; + + if ((client == NULL) || (pub_topic == NULL) || (pub_buf == NULL) || (data_len == 0) || (qos > 2) || (retain > 1)) + { + printf("at32_mqtt_publish: input error@@"); + return ERR_VAL; + } + +#ifdef USE_MQTT_MUTEX + + if (s__mqtt_publish_mutex == NULL) + { + printf("at32_mqtt_publish: create mqtt mutex ! \r\n"); + s__mqtt_publish_mutex = xSemaphoreCreateMutex(); + } + + if (xSemaphoreTake(s__mqtt_publish_mutex, portMAX_DELAY) == pdPASS) +#endif /* USE_MQTT_MUTEX */ + { + err = mqtt_publish(client, pub_topic, pub_buf, data_len, \ + qos, retain, mqtt_client_pub_request_cb, (void *)client); + if(err != ERR_OK) + { + printf("at32_mqtt_publish: mqtt_publish err = %s\r\n", lwip_strerr(err)); + } +#ifdef USE_MQTT_MUTEX + printf("at32_mqtt_publish: mqtt_publish xSemaphoreTake\r\n"); + xSemaphoreGive(s__mqtt_publish_mutex); +#endif /* USE_MQTT_MUTEX */ + } + + return err; +} + +/** + * @brief mqtt request callback + * @param arg: mqtt connection parameter point + * @param err: error status + * @retval none + */ +static void at32_mqtt_request_cb(void *arg, err_t err) +{ + mqtt_client_t *client = (mqtt_client_t *)arg; + + if (arg == NULL) + { + printf("at32_mqtt_request_cb: input error@@\r\n"); + return; + } + + if (err != ERR_OK) + { + printf("at32_mqtt_request_cb: FAIL sub, sub again, err = %s\r\n", lwip_strerr(err)); + + mqtt_error_process_callback(client, arg); + } + else + { + printf("at32_mqtt_request_cb: sub SUCCESS!\r\n"); + } +} + +/** + * @brief mqtt subscribe + * @param client: mqtt connection handle + * @param sub_topic: mqtt subscribe topic + * @param qosquality of service, 0 1 or 2 + * @retval subscribe status + */ +static err_t at32_mqtt_subscribe(mqtt_client_t *mqtt_client, char *sub_topic, uint8_t qos) +{ + err_t err; + printf("at32_mqtt_subscribe: Enter\r\n"); + + if ((mqtt_client == NULL) || (sub_topic == NULL) || (qos > 2)) + { + printf("at32_mqtt_subscribe: input error@@\r\n"); + return ERR_VAL; + } + + if (mqtt_client_is_connected(mqtt_client) != 1) + { + printf("at32_mqtt_subscribe: mqtt is not connected, return ERR_CLSD.\r\n"); + return ERR_CLSD; + } + + err = mqtt_subscribe(mqtt_client, sub_topic, qos, at32_mqtt_request_cb, (void *)mqtt_client); + + if (err != ERR_OK) + { + printf("at32_mqtt_subscribe: mqtt_subscribe Fail, return:%s \r\n", lwip_strerr(err)); + } + else + { + printf("at32_mqtt_subscribe: mqtt_subscribe SUCCESS, reason: %s\r\n", lwip_strerr(err)); + } + + return err; +} + +/** + * @} + */ + +/** + * @} + */ diff --git a/project/at_start_f437/examples/emac/mqtt_client/src/netconf.c b/project/at_start_f437/examples/emac/mqtt_client/src/netconf.c new file mode 100644 index 00000000..7e2d70c0 --- /dev/null +++ b/project/at_start_f437/examples/emac/mqtt_client/src/netconf.c @@ -0,0 +1,231 @@ +/** + ************************************************************************** + * @file netconf.c + * @version v2.0.9 + * @date 2022-06-28 + * @brief network connection configuration + ************************************************************************** + * Copyright notice & Disclaimer + * + * The software Board Support Package (BSP) that is made available to + * download from Artery official website is the copyrighted work of Artery. + * Artery authorizes customers to use, copy, and distribute the BSP + * software and its related documentation for the purpose of design and + * development in conjunction with Artery microcontrollers. Use of the + * software is governed by this copyright notice and the following disclaimer. + * + * THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, + * GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, + * TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR + * STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, + * INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. + * + ************************************************************************** + */ + +/* Includes ------------------------------------------------------------------*/ +#include "lwip/memp.h" +#include "lwip/tcp.h" +#include "lwip/priv/tcp_priv.h" +#include "lwip/udp.h" +#include "netif/etharp.h" +#include "lwip/dhcp.h" +#include "ethernetif.h" +#include "netconf.h" +#include "stdio.h" +#include "at32_emac.h" +#include "mqtt_client.h" + +/** @addtogroup AT32F437_periph_examples + * @{ + */ + +/** @addtogroup 437_EMAC_mqtt_client + * @{ + */ + +/** @addtogroup network_configuration + * @{ + */ + +/* Private define ------------------------------------------------------------*/ +/* Private macro -------------------------------------------------------------*/ +#define MAC_ADDR_LENGTH (6) +#define ADDR_LENGTH (4) +#define SYSTEMTICK_PERIOD_MS 10 +/* Private variables ---------------------------------------------------------*/ +uint8_t message_cnt = 0; +char message_test[] = "Hello mqtt server, 000"; +extern mqtt_client_t *s__mqtt_client_instance; +extern volatile uint32_t local_time; +struct netif netif; +struct tcp_pcb *pcb; +volatile uint32_t tcp_timer = 0; +volatile uint32_t arp_timer = 0; +volatile uint32_t link_timer = 0; +volatile uint32_t mqtt_send_timer = 0; + +static uint8_t mac_address[MAC_ADDR_LENGTH] = {0, 0, 0x44, 0x45, 0x56, 1};; +#if LWIP_DHCP +volatile uint32_t dhcp_fine_timer = 0; +volatile uint32_t dhcp_coarse_timer = 0; +#else +static uint8_t local_ip[ADDR_LENGTH] = {192, 168, 81, 37}; +static uint8_t local_gw[ADDR_LENGTH] = {192, 168, 81, 187}; +static uint8_t local_mask[ADDR_LENGTH] = {255, 255, 255, 0}; +#endif + +/* Private function prototypes -----------------------------------------------*/ +/* Private functions ---------------------------------------------------------*/ + +/** + * @brief initializes the lwip stack + * @param none + * @retval none + */ +void tcpip_stack_init(void) +{ + ip_addr_t ipaddr; + ip_addr_t netmask; + ip_addr_t gw; + + /* Initializes the dynamic memory heap defined by MEM_SIZE.*/ + mem_init(); + + /* Initializes the memory pools defined by MEMP_NUM_x.*/ + memp_init(); + + +#if LWIP_DHCP //need DHCP server + ipaddr.addr = 0; + netmask.addr = 0; + gw.addr = 0; + +#else + IP4_ADDR(&ipaddr, local_ip[0], local_ip[1], local_ip[2], local_ip[3]); + IP4_ADDR(&netmask, local_mask[0], local_mask[1], local_mask[2], local_mask[3]); + IP4_ADDR(&gw, local_gw[0], local_gw[1], local_gw[2], local_gw[3]); +#endif + + lwip_set_mac_address(mac_address); + + /* - netif_add(struct netif *netif, struct ip_addr *ipaddr, + struct ip_addr *netmask, struct ip_addr *gw, + void *state, err_t (* init)(struct netif *netif), + err_t (* input)(struct pbuf *p, struct netif *netif)) + + Adds your network interface to the netif_list. Allocate a struct + netif and pass a pointer to this structure as the first argument. + Give pointers to cleared ip_addr structures when using DHCP, + or fill them with sane numbers otherwise. The state pointer may be NULL. + + The init function pointer must point to a initialization function for + your ethernet netif interface. The following code illustrates it's use.*/ + + if(netif_add(&netif, &ipaddr, &netmask, &gw, NULL, ðernetif_init, &netif_input) == NULL) + { + while(1); + } + + /* Registers the default network interface.*/ + netif_set_default(&netif); + + /* When the netif is fully configured this function must be called.*/ + netif_set_up(&netif); + + /* Set the link callback function, this function is called on change of link status*/ + netif_set_link_callback(&netif, ethernetif_update_config); +} + +/** + * @brief called when a frame is received + * @param none + * @retval none + */ +void lwip_pkt_handle(void) +{ + /* Read a received packet from the Ethernet buffers and send it to the lwIP for handling */ + if(ethernetif_input(&netif) != ERR_OK) + { + while(1); + } +} + +/** + * @brief updates the system local time + * @param none + * @retval none + */ +void time_update(void) +{ + local_time += SYSTEMTICK_PERIOD_MS; +} + +/** + * @brief lwip periodic tasks + * @param localtime the current localtime value + * @retval none + */ +void lwip_periodic_handle(volatile uint32_t localtime) +{ + + /* TCP periodic process every 250 ms */ + if (localtime - tcp_timer >= TCP_TMR_INTERVAL) + { + tcp_timer = localtime; + tcp_tmr(); + } + /* ARP periodic process every 5s */ + if (localtime - arp_timer >= ARP_TMR_INTERVAL) + { + arp_timer = localtime; + etharp_tmr(); + } + +#if LWIP_DHCP + /* Fine DHCP periodic process every 500ms */ + if (localtime - dhcp_fine_timer >= DHCP_FINE_TIMER_MSECS) + { + dhcp_fine_timer = localtime; + dhcp_fine_tmr(); + } + /* DHCP Coarse periodic process every 60s */ + if (localtime - dhcp_coarse_timer >= DHCP_COARSE_TIMER_MSECS) + { + dhcp_coarse_timer = localtime; + dhcp_coarse_tmr(); + } +#endif + +#if (LINK_DETECTION > 0) + /* link detection process every 500 ms */ + if (localtime - link_timer >= 500) + { + link_timer = localtime; + ethernetif_set_link(&netif); + } +#endif + + if (localtime - mqtt_send_timer >= 1000) + { + mqtt_send_timer = localtime; + message_test[19] = 0x30 + (message_cnt/100); + message_test[20] = 0x30 + (message_cnt/10%10); + message_test[21] = 0x30 + (message_cnt%10); + message_cnt++; + at32_mqtt_publish(s__mqtt_client_instance, "at_pub_topic",\ + message_test, sizeof(message_test), 1, 0); + } +} + +/** + * @} + */ + +/** + * @} + */ +/** + * @} + */ diff --git a/project/at_start_f437/examples/emac/tcp_client/inc/at32_emac.h b/project/at_start_f437/examples/emac/tcp_client/inc/at32_emac.h index 12ccd20d..b5098e7f 100644 --- a/project/at_start_f437/examples/emac/tcp_client/inc/at32_emac.h +++ b/project/at_start_f437/examples/emac/tcp_client/inc/at32_emac.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32_emac.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of emac config program. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/emac/tcp_client/inc/at32f435_437_clock.h b/project/at_start_f437/examples/emac/tcp_client/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/emac/tcp_client/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/emac/tcp_client/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/emac/tcp_client/inc/at32f435_437_conf.h b/project/at_start_f437/examples/emac/tcp_client/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/emac/tcp_client/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/emac/tcp_client/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/emac/tcp_client/inc/at32f435_437_int.h b/project/at_start_f437/examples/emac/tcp_client/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/emac/tcp_client/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/emac/tcp_client/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/emac/tcp_client/inc/netconf.h b/project/at_start_f437/examples/emac/tcp_client/inc/netconf.h index 005dcf34..74939761 100644 --- a/project/at_start_f437/examples/emac/tcp_client/inc/netconf.h +++ b/project/at_start_f437/examples/emac/tcp_client/inc/netconf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file netconf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief This file contains all the functions prototypes for the netconf.c * file. ************************************************************************** diff --git a/project/at_start_f437/examples/emac/tcp_client/inc/tcp_client.h b/project/at_start_f437/examples/emac/tcp_client/inc/tcp_client.h index 5f048f49..83b2f52d 100644 --- a/project/at_start_f437/examples/emac/tcp_client/inc/tcp_client.h +++ b/project/at_start_f437/examples/emac/tcp_client/inc/tcp_client.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file tcp_client.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief tcp client header ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/emac/tcp_client/readme.txt b/project/at_start_f437/examples/emac/tcp_client/readme.txt index fd142f61..d7094bb0 100644 --- a/project/at_start_f437/examples/emac/tcp_client/readme.txt +++ b/project/at_start_f437/examples/emac/tcp_client/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/emac/tcp_client/src/at32_emac.c b/project/at_start_f437/examples/emac/tcp_client/src/at32_emac.c index f994fb1d..5ae1137c 100644 --- a/project/at_start_f437/examples/emac/tcp_client/src/at32_emac.c +++ b/project/at_start_f437/examples/emac/tcp_client/src/at32_emac.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32_emac.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief emac config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/emac/tcp_client/src/at32f435_437_clock.c b/project/at_start_f437/examples/emac/tcp_client/src/at32f435_437_clock.c index 5b1efe76..17b72989 100644 --- a/project/at_start_f437/examples/emac/tcp_client/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/emac/tcp_client/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/emac/tcp_client/src/at32f435_437_int.c b/project/at_start_f437/examples/emac/tcp_client/src/at32f435_437_int.c index 2dbe0706..48ba10e2 100644 --- a/project/at_start_f437/examples/emac/tcp_client/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/emac/tcp_client/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/emac/tcp_client/src/main.c b/project/at_start_f437/examples/emac/tcp_client/src/main.c index f996697f..4fae224b 100644 --- a/project/at_start_f437/examples/emac/tcp_client/src/main.c +++ b/project/at_start_f437/examples/emac/tcp_client/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/emac/tcp_client/src/netconf.c b/project/at_start_f437/examples/emac/tcp_client/src/netconf.c index a33b836a..d10fd3cf 100644 --- a/project/at_start_f437/examples/emac/tcp_client/src/netconf.c +++ b/project/at_start_f437/examples/emac/tcp_client/src/netconf.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file netconf.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief network connection configuration ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/emac/tcp_client/src/tcp_client.c b/project/at_start_f437/examples/emac/tcp_client/src/tcp_client.c index de8288a5..897063d1 100644 --- a/project/at_start_f437/examples/emac/tcp_client/src/tcp_client.c +++ b/project/at_start_f437/examples/emac/tcp_client/src/tcp_client.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file tcp_client.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief implement tcp client ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/emac/tcp_server/inc/at32_emac.h b/project/at_start_f437/examples/emac/tcp_server/inc/at32_emac.h index 11ba02ea..4b866df4 100644 --- a/project/at_start_f437/examples/emac/tcp_server/inc/at32_emac.h +++ b/project/at_start_f437/examples/emac/tcp_server/inc/at32_emac.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32_emac.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of emac config program. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/emac/tcp_server/inc/at32f435_437_clock.h b/project/at_start_f437/examples/emac/tcp_server/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/emac/tcp_server/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/emac/tcp_server/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/emac/tcp_server/inc/at32f435_437_conf.h b/project/at_start_f437/examples/emac/tcp_server/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/emac/tcp_server/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/emac/tcp_server/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/emac/tcp_server/inc/at32f435_437_int.h b/project/at_start_f437/examples/emac/tcp_server/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/emac/tcp_server/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/emac/tcp_server/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/emac/tcp_server/inc/netconf.h b/project/at_start_f437/examples/emac/tcp_server/inc/netconf.h index 80ba154e..35e95d8e 100644 --- a/project/at_start_f437/examples/emac/tcp_server/inc/netconf.h +++ b/project/at_start_f437/examples/emac/tcp_server/inc/netconf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file netconf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief This file contains all the functions prototypes for the netconf.c * file. ************************************************************************** diff --git a/project/at_start_f437/examples/emac/tcp_server/inc/tcp_server.h b/project/at_start_f437/examples/emac/tcp_server/inc/tcp_server.h index fcca80a7..36521452 100644 --- a/project/at_start_f437/examples/emac/tcp_server/inc/tcp_server.h +++ b/project/at_start_f437/examples/emac/tcp_server/inc/tcp_server.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file tcp_server.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief tcp server header ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/emac/tcp_server/readme.txt b/project/at_start_f437/examples/emac/tcp_server/readme.txt index 708eab10..2ccc3140 100644 --- a/project/at_start_f437/examples/emac/tcp_server/readme.txt +++ b/project/at_start_f437/examples/emac/tcp_server/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/emac/tcp_server/src/at32_emac.c b/project/at_start_f437/examples/emac/tcp_server/src/at32_emac.c index ffc714c6..8ef47078 100644 --- a/project/at_start_f437/examples/emac/tcp_server/src/at32_emac.c +++ b/project/at_start_f437/examples/emac/tcp_server/src/at32_emac.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32_emac.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief emac config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/emac/tcp_server/src/at32f435_437_clock.c b/project/at_start_f437/examples/emac/tcp_server/src/at32f435_437_clock.c index 5b1efe76..17b72989 100644 --- a/project/at_start_f437/examples/emac/tcp_server/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/emac/tcp_server/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/emac/tcp_server/src/at32f435_437_int.c b/project/at_start_f437/examples/emac/tcp_server/src/at32f435_437_int.c index 43bfdfa5..7b70a2b5 100644 --- a/project/at_start_f437/examples/emac/tcp_server/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/emac/tcp_server/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/emac/tcp_server/src/main.c b/project/at_start_f437/examples/emac/tcp_server/src/main.c index 37585f0a..c9b7252f 100644 --- a/project/at_start_f437/examples/emac/tcp_server/src/main.c +++ b/project/at_start_f437/examples/emac/tcp_server/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/emac/tcp_server/src/netconf.c b/project/at_start_f437/examples/emac/tcp_server/src/netconf.c index 8999afb2..5326bc65 100644 --- a/project/at_start_f437/examples/emac/tcp_server/src/netconf.c +++ b/project/at_start_f437/examples/emac/tcp_server/src/netconf.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file netconf.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief network connection configuration ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/emac/tcp_server/src/tcp_server.c b/project/at_start_f437/examples/emac/tcp_server/src/tcp_server.c index ea97beac..3884d3ac 100644 --- a/project/at_start_f437/examples/emac/tcp_server/src/tcp_server.c +++ b/project/at_start_f437/examples/emac/tcp_server/src/tcp_server.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file tcp_server.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief implement tcp server ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/emac/telnet/inc/at32_emac.h b/project/at_start_f437/examples/emac/telnet/inc/at32_emac.h index 55d232a0..faf0438f 100644 --- a/project/at_start_f437/examples/emac/telnet/inc/at32_emac.h +++ b/project/at_start_f437/examples/emac/telnet/inc/at32_emac.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32_emac.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of emac config program. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/emac/telnet/inc/at32f435_437_clock.h b/project/at_start_f437/examples/emac/telnet/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/emac/telnet/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/emac/telnet/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/emac/telnet/inc/at32f435_437_conf.h b/project/at_start_f437/examples/emac/telnet/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/emac/telnet/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/emac/telnet/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/emac/telnet/inc/at32f435_437_int.h b/project/at_start_f437/examples/emac/telnet/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/emac/telnet/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/emac/telnet/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/emac/telnet/inc/netconf.h b/project/at_start_f437/examples/emac/telnet/inc/netconf.h index f230823c..52b34207 100644 --- a/project/at_start_f437/examples/emac/telnet/inc/netconf.h +++ b/project/at_start_f437/examples/emac/telnet/inc/netconf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file netconf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief This file contains all the functions prototypes for the netconf.c * file. ************************************************************************** diff --git a/project/at_start_f437/examples/emac/telnet/inc/telnet.h b/project/at_start_f437/examples/emac/telnet/inc/telnet.h index 53316bba..9e1fa3b9 100644 --- a/project/at_start_f437/examples/emac/telnet/inc/telnet.h +++ b/project/at_start_f437/examples/emac/telnet/inc/telnet.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file telnet.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief telnet implement header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/emac/telnet/readme.txt b/project/at_start_f437/examples/emac/telnet/readme.txt index 4693bd99..8bac2d28 100644 --- a/project/at_start_f437/examples/emac/telnet/readme.txt +++ b/project/at_start_f437/examples/emac/telnet/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/emac/telnet/src/at32_emac.c b/project/at_start_f437/examples/emac/telnet/src/at32_emac.c index 0e36b2e2..00a1f0f2 100644 --- a/project/at_start_f437/examples/emac/telnet/src/at32_emac.c +++ b/project/at_start_f437/examples/emac/telnet/src/at32_emac.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32_emac.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief emac config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/emac/telnet/src/at32f435_437_clock.c b/project/at_start_f437/examples/emac/telnet/src/at32f435_437_clock.c index 5b1efe76..17b72989 100644 --- a/project/at_start_f437/examples/emac/telnet/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/emac/telnet/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/emac/telnet/src/at32f435_437_int.c b/project/at_start_f437/examples/emac/telnet/src/at32f435_437_int.c index 2cffd51b..5c01c794 100644 --- a/project/at_start_f437/examples/emac/telnet/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/emac/telnet/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/emac/telnet/src/main.c b/project/at_start_f437/examples/emac/telnet/src/main.c index 8383407e..b39af82d 100644 --- a/project/at_start_f437/examples/emac/telnet/src/main.c +++ b/project/at_start_f437/examples/emac/telnet/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/emac/telnet/src/netconf.c b/project/at_start_f437/examples/emac/telnet/src/netconf.c index e4c789c0..a752d9c7 100644 --- a/project/at_start_f437/examples/emac/telnet/src/netconf.c +++ b/project/at_start_f437/examples/emac/telnet/src/netconf.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file netconf.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief network connection configuration ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/emac/telnet/src/telnet.c b/project/at_start_f437/examples/emac/telnet/src/telnet.c index e96d3c91..39686cf2 100644 --- a/project/at_start_f437/examples/emac/telnet/src/telnet.c +++ b/project/at_start_f437/examples/emac/telnet/src/telnet.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file telnet.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief telnet implement ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/emac/wake_on_lan/inc/at32_emac.h b/project/at_start_f437/examples/emac/wake_on_lan/inc/at32_emac.h index 7c11f7d8..dd16d90a 100644 --- a/project/at_start_f437/examples/emac/wake_on_lan/inc/at32_emac.h +++ b/project/at_start_f437/examples/emac/wake_on_lan/inc/at32_emac.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32_emac.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of emac config program. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/emac/wake_on_lan/inc/at32f435_437_clock.h b/project/at_start_f437/examples/emac/wake_on_lan/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/emac/wake_on_lan/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/emac/wake_on_lan/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/emac/wake_on_lan/inc/at32f435_437_conf.h b/project/at_start_f437/examples/emac/wake_on_lan/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/emac/wake_on_lan/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/emac/wake_on_lan/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/emac/wake_on_lan/inc/at32f435_437_int.h b/project/at_start_f437/examples/emac/wake_on_lan/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/emac/wake_on_lan/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/emac/wake_on_lan/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/emac/wake_on_lan/inc/netconf.h b/project/at_start_f437/examples/emac/wake_on_lan/inc/netconf.h index 68b97307..3f37b628 100644 --- a/project/at_start_f437/examples/emac/wake_on_lan/inc/netconf.h +++ b/project/at_start_f437/examples/emac/wake_on_lan/inc/netconf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file netconf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief This file contains all the functions prototypes for the netconf.c * file. ************************************************************************** diff --git a/project/at_start_f437/examples/emac/wake_on_lan/readme.txt b/project/at_start_f437/examples/emac/wake_on_lan/readme.txt index 84bc7d14..e611c821 100644 --- a/project/at_start_f437/examples/emac/wake_on_lan/readme.txt +++ b/project/at_start_f437/examples/emac/wake_on_lan/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/emac/wake_on_lan/src/at32_emac.c b/project/at_start_f437/examples/emac/wake_on_lan/src/at32_emac.c index 596c5301..ea2b4ff4 100644 --- a/project/at_start_f437/examples/emac/wake_on_lan/src/at32_emac.c +++ b/project/at_start_f437/examples/emac/wake_on_lan/src/at32_emac.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32_emac.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief emac config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/emac/wake_on_lan/src/at32f435_437_clock.c b/project/at_start_f437/examples/emac/wake_on_lan/src/at32f435_437_clock.c index 5b1efe76..17b72989 100644 --- a/project/at_start_f437/examples/emac/wake_on_lan/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/emac/wake_on_lan/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/emac/wake_on_lan/src/at32f435_437_int.c b/project/at_start_f437/examples/emac/wake_on_lan/src/at32f435_437_int.c index a6b0bb90..847da331 100644 --- a/project/at_start_f437/examples/emac/wake_on_lan/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/emac/wake_on_lan/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/emac/wake_on_lan/src/main.c b/project/at_start_f437/examples/emac/wake_on_lan/src/main.c index eea6a8fa..c6bd24fb 100644 --- a/project/at_start_f437/examples/emac/wake_on_lan/src/main.c +++ b/project/at_start_f437/examples/emac/wake_on_lan/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/emac/wake_on_lan/src/netconf.c b/project/at_start_f437/examples/emac/wake_on_lan/src/netconf.c index 5c3c925e..03b15251 100644 --- a/project/at_start_f437/examples/emac/wake_on_lan/src/netconf.c +++ b/project/at_start_f437/examples/emac/wake_on_lan/src/netconf.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file netconf.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief network connection configuration ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/ertc/bpr_domain/inc/at32f435_437_clock.h b/project/at_start_f437/examples/ertc/bpr_domain/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/ertc/bpr_domain/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/ertc/bpr_domain/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/ertc/bpr_domain/inc/at32f435_437_conf.h b/project/at_start_f437/examples/ertc/bpr_domain/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/ertc/bpr_domain/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/ertc/bpr_domain/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/ertc/bpr_domain/inc/at32f435_437_int.h b/project/at_start_f437/examples/ertc/bpr_domain/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/ertc/bpr_domain/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/ertc/bpr_domain/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/ertc/bpr_domain/readme.txt b/project/at_start_f437/examples/ertc/bpr_domain/readme.txt index 929c39e5..5e2f5718 100644 --- a/project/at_start_f437/examples/ertc/bpr_domain/readme.txt +++ b/project/at_start_f437/examples/ertc/bpr_domain/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/ertc/bpr_domain/src/at32f435_437_clock.c b/project/at_start_f437/examples/ertc/bpr_domain/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/ertc/bpr_domain/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/ertc/bpr_domain/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/ertc/bpr_domain/src/at32f435_437_int.c b/project/at_start_f437/examples/ertc/bpr_domain/src/at32f435_437_int.c index 1efe756d..eb99d734 100644 --- a/project/at_start_f437/examples/ertc/bpr_domain/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/ertc/bpr_domain/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/ertc/bpr_domain/src/main.c b/project/at_start_f437/examples/ertc/bpr_domain/src/main.c index 53a13241..46825755 100644 --- a/project/at_start_f437/examples/ertc/bpr_domain/src/main.c +++ b/project/at_start_f437/examples/ertc/bpr_domain/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/ertc/calendar/inc/at32f435_437_clock.h b/project/at_start_f437/examples/ertc/calendar/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/ertc/calendar/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/ertc/calendar/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/ertc/calendar/inc/at32f435_437_conf.h b/project/at_start_f437/examples/ertc/calendar/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/ertc/calendar/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/ertc/calendar/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/ertc/calendar/inc/at32f435_437_int.h b/project/at_start_f437/examples/ertc/calendar/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/ertc/calendar/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/ertc/calendar/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/ertc/calendar/readme.txt b/project/at_start_f437/examples/ertc/calendar/readme.txt index f12a7864..ddbf4437 100644 --- a/project/at_start_f437/examples/ertc/calendar/readme.txt +++ b/project/at_start_f437/examples/ertc/calendar/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/ertc/calendar/src/at32f435_437_clock.c b/project/at_start_f437/examples/ertc/calendar/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/ertc/calendar/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/ertc/calendar/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/ertc/calendar/src/at32f435_437_int.c b/project/at_start_f437/examples/ertc/calendar/src/at32f435_437_int.c index b0856127..0a12c7cb 100644 --- a/project/at_start_f437/examples/ertc/calendar/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/ertc/calendar/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/ertc/calendar/src/main.c b/project/at_start_f437/examples/ertc/calendar/src/main.c index a9ae82df..cd081b9e 100644 --- a/project/at_start_f437/examples/ertc/calendar/src/main.c +++ b/project/at_start_f437/examples/ertc/calendar/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/ertc/lick_calibration/inc/at32f435_437_clock.h b/project/at_start_f437/examples/ertc/lick_calibration/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/ertc/lick_calibration/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/ertc/lick_calibration/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/ertc/lick_calibration/inc/at32f435_437_conf.h b/project/at_start_f437/examples/ertc/lick_calibration/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/ertc/lick_calibration/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/ertc/lick_calibration/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/ertc/lick_calibration/inc/at32f435_437_int.h b/project/at_start_f437/examples/ertc/lick_calibration/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/ertc/lick_calibration/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/ertc/lick_calibration/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/ertc/lick_calibration/readme.txt b/project/at_start_f437/examples/ertc/lick_calibration/readme.txt index 952f4f2c..bef0cff5 100644 --- a/project/at_start_f437/examples/ertc/lick_calibration/readme.txt +++ b/project/at_start_f437/examples/ertc/lick_calibration/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/ertc/lick_calibration/src/at32f435_437_clock.c b/project/at_start_f437/examples/ertc/lick_calibration/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/ertc/lick_calibration/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/ertc/lick_calibration/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/ertc/lick_calibration/src/at32f435_437_int.c b/project/at_start_f437/examples/ertc/lick_calibration/src/at32f435_437_int.c index 837e88fc..a9330c27 100644 --- a/project/at_start_f437/examples/ertc/lick_calibration/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/ertc/lick_calibration/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/ertc/lick_calibration/src/main.c b/project/at_start_f437/examples/ertc/lick_calibration/src/main.c index 06a7ae4c..aec7c11b 100644 --- a/project/at_start_f437/examples/ertc/lick_calibration/src/main.c +++ b/project/at_start_f437/examples/ertc/lick_calibration/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/ertc/tamper/inc/at32f435_437_clock.h b/project/at_start_f437/examples/ertc/tamper/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/ertc/tamper/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/ertc/tamper/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/ertc/tamper/inc/at32f435_437_conf.h b/project/at_start_f437/examples/ertc/tamper/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/ertc/tamper/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/ertc/tamper/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/ertc/tamper/inc/at32f435_437_int.h b/project/at_start_f437/examples/ertc/tamper/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/ertc/tamper/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/ertc/tamper/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/ertc/tamper/readme.txt b/project/at_start_f437/examples/ertc/tamper/readme.txt index aa187149..b25cb57a 100644 --- a/project/at_start_f437/examples/ertc/tamper/readme.txt +++ b/project/at_start_f437/examples/ertc/tamper/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/ertc/tamper/src/at32f435_437_clock.c b/project/at_start_f437/examples/ertc/tamper/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/ertc/tamper/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/ertc/tamper/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/ertc/tamper/src/at32f435_437_int.c b/project/at_start_f437/examples/ertc/tamper/src/at32f435_437_int.c index 80c7ec17..1dc1dc00 100644 --- a/project/at_start_f437/examples/ertc/tamper/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/ertc/tamper/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/ertc/tamper/src/main.c b/project/at_start_f437/examples/ertc/tamper/src/main.c index eb923c56..bed1f4d0 100644 --- a/project/at_start_f437/examples/ertc/tamper/src/main.c +++ b/project/at_start_f437/examples/ertc/tamper/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/ertc/time_stamp/inc/at32f435_437_clock.h b/project/at_start_f437/examples/ertc/time_stamp/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/ertc/time_stamp/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/ertc/time_stamp/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/ertc/time_stamp/inc/at32f435_437_conf.h b/project/at_start_f437/examples/ertc/time_stamp/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/ertc/time_stamp/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/ertc/time_stamp/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/ertc/time_stamp/inc/at32f435_437_int.h b/project/at_start_f437/examples/ertc/time_stamp/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/ertc/time_stamp/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/ertc/time_stamp/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/ertc/time_stamp/readme.txt b/project/at_start_f437/examples/ertc/time_stamp/readme.txt index 4add99fa..129077be 100644 --- a/project/at_start_f437/examples/ertc/time_stamp/readme.txt +++ b/project/at_start_f437/examples/ertc/time_stamp/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/ertc/time_stamp/src/at32f435_437_clock.c b/project/at_start_f437/examples/ertc/time_stamp/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/ertc/time_stamp/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/ertc/time_stamp/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/ertc/time_stamp/src/at32f435_437_int.c b/project/at_start_f437/examples/ertc/time_stamp/src/at32f435_437_int.c index 5628b58e..29cb8b84 100644 --- a/project/at_start_f437/examples/ertc/time_stamp/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/ertc/time_stamp/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/ertc/time_stamp/src/main.c b/project/at_start_f437/examples/ertc/time_stamp/src/main.c index d72afb36..0948a856 100644 --- a/project/at_start_f437/examples/ertc/time_stamp/src/main.c +++ b/project/at_start_f437/examples/ertc/time_stamp/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/ertc/wakeup_timer/inc/at32f435_437_clock.h b/project/at_start_f437/examples/ertc/wakeup_timer/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/ertc/wakeup_timer/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/ertc/wakeup_timer/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/ertc/wakeup_timer/inc/at32f435_437_conf.h b/project/at_start_f437/examples/ertc/wakeup_timer/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/ertc/wakeup_timer/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/ertc/wakeup_timer/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/ertc/wakeup_timer/inc/at32f435_437_int.h b/project/at_start_f437/examples/ertc/wakeup_timer/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/ertc/wakeup_timer/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/ertc/wakeup_timer/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/ertc/wakeup_timer/readme.txt b/project/at_start_f437/examples/ertc/wakeup_timer/readme.txt index 9da5136e..3a2baa94 100644 --- a/project/at_start_f437/examples/ertc/wakeup_timer/readme.txt +++ b/project/at_start_f437/examples/ertc/wakeup_timer/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/ertc/wakeup_timer/src/at32f435_437_clock.c b/project/at_start_f437/examples/ertc/wakeup_timer/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/ertc/wakeup_timer/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/ertc/wakeup_timer/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/ertc/wakeup_timer/src/at32f435_437_int.c b/project/at_start_f437/examples/ertc/wakeup_timer/src/at32f435_437_int.c index 941e6e53..bf1c0e82 100644 --- a/project/at_start_f437/examples/ertc/wakeup_timer/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/ertc/wakeup_timer/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/ertc/wakeup_timer/src/main.c b/project/at_start_f437/examples/ertc/wakeup_timer/src/main.c index d12597ef..9a71cdc4 100644 --- a/project/at_start_f437/examples/ertc/wakeup_timer/src/main.c +++ b/project/at_start_f437/examples/ertc/wakeup_timer/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer @@ -146,7 +146,7 @@ void wakeup_timer_config(void) exint_init_type exint_init_struct; /* select the wakeup timer clock source */ - ertc_wakeup_clock_set(ERTC_WAT_CLK_CK_A_16BITS); + ertc_wakeup_clock_set(ERTC_WAT_CLK_CK_B_16BITS); /* set wakeup time: 5s */ ertc_wakeup_counter_set(5 - 1); diff --git a/project/at_start_f437/examples/exint/exint_config/inc/at32f435_437_clock.h b/project/at_start_f437/examples/exint/exint_config/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/exint/exint_config/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/exint/exint_config/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/exint/exint_config/inc/at32f435_437_conf.h b/project/at_start_f437/examples/exint/exint_config/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/exint/exint_config/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/exint/exint_config/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/exint/exint_config/inc/at32f435_437_int.h b/project/at_start_f437/examples/exint/exint_config/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/exint/exint_config/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/exint/exint_config/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/exint/exint_config/readme.txt b/project/at_start_f437/examples/exint/exint_config/readme.txt index 541269c6..23b9fbaa 100644 --- a/project/at_start_f437/examples/exint/exint_config/readme.txt +++ b/project/at_start_f437/examples/exint/exint_config/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/exint/exint_config/src/at32f435_437_clock.c b/project/at_start_f437/examples/exint/exint_config/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/exint/exint_config/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/exint/exint_config/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/exint/exint_config/src/at32f435_437_int.c b/project/at_start_f437/examples/exint/exint_config/src/at32f435_437_int.c index 0d64c4ae..47397042 100644 --- a/project/at_start_f437/examples/exint/exint_config/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/exint/exint_config/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/exint/exint_config/src/main.c b/project/at_start_f437/examples/exint/exint_config/src/main.c index 4f053ff8..e3d61341 100644 --- a/project/at_start_f437/examples/exint/exint_config/src/main.c +++ b/project/at_start_f437/examples/exint/exint_config/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/exint/exint_software_trigger/inc/at32f435_437_clock.h b/project/at_start_f437/examples/exint/exint_software_trigger/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/exint/exint_software_trigger/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/exint/exint_software_trigger/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/exint/exint_software_trigger/inc/at32f435_437_conf.h b/project/at_start_f437/examples/exint/exint_software_trigger/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/exint/exint_software_trigger/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/exint/exint_software_trigger/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/exint/exint_software_trigger/inc/at32f435_437_int.h b/project/at_start_f437/examples/exint/exint_software_trigger/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/exint/exint_software_trigger/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/exint/exint_software_trigger/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/exint/exint_software_trigger/readme.txt b/project/at_start_f437/examples/exint/exint_software_trigger/readme.txt index 288b6945..71855212 100644 --- a/project/at_start_f437/examples/exint/exint_software_trigger/readme.txt +++ b/project/at_start_f437/examples/exint/exint_software_trigger/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/exint/exint_software_trigger/src/at32f435_437_clock.c b/project/at_start_f437/examples/exint/exint_software_trigger/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/exint/exint_software_trigger/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/exint/exint_software_trigger/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/exint/exint_software_trigger/src/at32f435_437_int.c b/project/at_start_f437/examples/exint/exint_software_trigger/src/at32f435_437_int.c index 9994b645..9dff10c8 100644 --- a/project/at_start_f437/examples/exint/exint_software_trigger/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/exint/exint_software_trigger/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/exint/exint_software_trigger/src/main.c b/project/at_start_f437/examples/exint/exint_software_trigger/src/main.c index e504a5b2..62b903bf 100644 --- a/project/at_start_f437/examples/exint/exint_software_trigger/src/main.c +++ b/project/at_start_f437/examples/exint/exint_software_trigger/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/flash/fap_enable/inc/at32f435_437_clock.h b/project/at_start_f437/examples/flash/fap_enable/inc/at32f435_437_clock.h new file mode 100644 index 00000000..86a4b828 --- /dev/null +++ b/project/at_start_f437/examples/flash/fap_enable/inc/at32f435_437_clock.h @@ -0,0 +1,46 @@ +/** + ************************************************************************** + * @file at32f435_437_clock.h + * @version v2.0.9 + * @date 2022-06-28 + * @brief header file of clock program + ************************************************************************** + * Copyright notice & Disclaimer + * + * The software Board Support Package (BSP) that is made available to + * download from Artery official website is the copyrighted work of Artery. + * Artery authorizes customers to use, copy, and distribute the BSP + * software and its related documentation for the purpose of design and + * development in conjunction with Artery microcontrollers. Use of the + * software is governed by this copyright notice and the following disclaimer. + * + * THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, + * GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, + * TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR + * STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, + * INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. + * + ************************************************************************** + */ + +/* define to prevent recursive inclusion -------------------------------------*/ +#ifndef __AT32F435_437_CLOCK_H +#define __AT32F435_437_CLOCK_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* includes ------------------------------------------------------------------*/ +#include "at32f435_437.h" + +/* exported functions ------------------------------------------------------- */ +void system_clock_config(void); + +#ifdef __cplusplus +} +#endif + +#endif + diff --git a/project/at_start_f437/examples/flash/fap_enable/inc/at32f435_437_conf.h b/project/at_start_f437/examples/flash/fap_enable/inc/at32f435_437_conf.h new file mode 100644 index 00000000..e2816415 --- /dev/null +++ b/project/at_start_f437/examples/flash/fap_enable/inc/at32f435_437_conf.h @@ -0,0 +1,174 @@ +/** + ************************************************************************** + * @file at32f435_437_conf.h + * @version v2.0.9 + * @date 2022-06-28 + * @brief at32f435_437 config header file + ************************************************************************** + * Copyright notice & Disclaimer + * + * The software Board Support Package (BSP) that is made available to + * download from Artery official website is the copyrighted work of Artery. + * Artery authorizes customers to use, copy, and distribute the BSP + * software and its related documentation for the purpose of design and + * development in conjunction with Artery microcontrollers. Use of the + * software is governed by this copyright notice and the following disclaimer. + * + * THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, + * GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, + * TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR + * STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, + * INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. + * + ************************************************************************** + */ + +/* define to prevent recursive inclusion -------------------------------------*/ +#ifndef __AT32F435_437_CONF_H +#define __AT32F435_437_CONF_H + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @brief in the following line adjust the value of high speed exernal crystal (hext) + * used in your application + * + * tip: to avoid modifying this file each time you need to use different hext, you + * can define the hext value in your toolchain compiler preprocessor. + * + */ +#if !defined HEXT_VALUE +#define HEXT_VALUE ((uint32_t)8000000) /*!< value of the high speed exernal crystal in hz */ +#endif + +/** + * @brief in the following line adjust the high speed exernal crystal (hext) startup + * timeout value + */ +#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000) /*!< time out for hext start up */ +#define HICK_VALUE ((uint32_t)8000000) /*!< value of the high speed internal clock in hz */ + +/* module define -------------------------------------------------------------*/ +#define CRM_MODULE_ENABLED +#define TMR_MODULE_ENABLED +#define ERTC_MODULE_ENABLED +#define GPIO_MODULE_ENABLED +#define I2C_MODULE_ENABLED +#define USART_MODULE_ENABLED +#define PWC_MODULE_ENABLED +#define CAN_MODULE_ENABLED +#define ADC_MODULE_ENABLED +#define DAC_MODULE_ENABLED +#define SPI_MODULE_ENABLED +#define EDMA_MODULE_ENABLED +#define DMA_MODULE_ENABLED +#define DEBUG_MODULE_ENABLED +#define FLASH_MODULE_ENABLED +#define CRC_MODULE_ENABLED +#define WWDT_MODULE_ENABLED +#define WDT_MODULE_ENABLED +#define EXINT_MODULE_ENABLED +#define SDIO_MODULE_ENABLED +#define XMC_MODULE_ENABLED +#define USB_MODULE_ENABLED +#define ACC_MODULE_ENABLED +#define MISC_MODULE_ENABLED +#define QSPI_MODULE_ENABLED +#define DVP_MODULE_ENABLED +#define SCFG_MODULE_ENABLED +#define EMAC_MODULE_ENABLED + +/* includes ------------------------------------------------------------------*/ +#ifdef CRM_MODULE_ENABLED +#include "at32f435_437_crm.h" +#endif +#ifdef TMR_MODULE_ENABLED +#include "at32f435_437_tmr.h" +#endif +#ifdef ERTC_MODULE_ENABLED +#include "at32f435_437_ertc.h" +#endif +#ifdef GPIO_MODULE_ENABLED +#include "at32f435_437_gpio.h" +#endif +#ifdef I2C_MODULE_ENABLED +#include "at32f435_437_i2c.h" +#endif +#ifdef USART_MODULE_ENABLED +#include "at32f435_437_usart.h" +#endif +#ifdef PWC_MODULE_ENABLED +#include "at32f435_437_pwc.h" +#endif +#ifdef CAN_MODULE_ENABLED +#include "at32f435_437_can.h" +#endif +#ifdef ADC_MODULE_ENABLED +#include "at32f435_437_adc.h" +#endif +#ifdef DAC_MODULE_ENABLED +#include "at32f435_437_dac.h" +#endif +#ifdef SPI_MODULE_ENABLED +#include "at32f435_437_spi.h" +#endif +#ifdef DMA_MODULE_ENABLED +#include "at32f435_437_dma.h" +#endif +#ifdef DEBUG_MODULE_ENABLED +#include "at32f435_437_debug.h" +#endif +#ifdef FLASH_MODULE_ENABLED +#include "at32f435_437_flash.h" +#endif +#ifdef CRC_MODULE_ENABLED +#include "at32f435_437_crc.h" +#endif +#ifdef WWDT_MODULE_ENABLED +#include "at32f435_437_wwdt.h" +#endif +#ifdef WDT_MODULE_ENABLED +#include "at32f435_437_wdt.h" +#endif +#ifdef EXINT_MODULE_ENABLED +#include "at32f435_437_exint.h" +#endif +#ifdef SDIO_MODULE_ENABLED +#include "at32f435_437_sdio.h" +#endif +#ifdef XMC_MODULE_ENABLED +#include "at32f435_437_xmc.h" +#endif +#ifdef ACC_MODULE_ENABLED +#include "at32f435_437_acc.h" +#endif +#ifdef MISC_MODULE_ENABLED +#include "at32f435_437_misc.h" +#endif +#ifdef EDMA_MODULE_ENABLED +#include "at32f435_437_edma.h" +#endif +#ifdef QSPI_MODULE_ENABLED +#include "at32f435_437_qspi.h" +#endif +#ifdef SCFG_MODULE_ENABLED +#include "at32f435_437_scfg.h" +#endif +#ifdef EMAC_MODULE_ENABLED +#include "at32f435_437_emac.h" +#endif +#ifdef DVP_MODULE_ENABLED +#include "at32f435_437_dvp.h" +#endif +#ifdef USB_MODULE_ENABLED +#include "at32f435_437_usb.h" +#endif + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/project/at_start_f437/examples/flash/fap_enable/inc/at32f435_437_int.h b/project/at_start_f437/examples/flash/fap_enable/inc/at32f435_437_int.h new file mode 100644 index 00000000..80aec042 --- /dev/null +++ b/project/at_start_f437/examples/flash/fap_enable/inc/at32f435_437_int.h @@ -0,0 +1,58 @@ +/** + ************************************************************************** + * @file at32f435_437_int.h + * @version v2.0.9 + * @date 2022-06-28 + * @brief header file of main interrupt service routines. + ************************************************************************** + * Copyright notice & Disclaimer + * + * The software Board Support Package (BSP) that is made available to + * download from Artery official website is the copyrighted work of Artery. + * Artery authorizes customers to use, copy, and distribute the BSP + * software and its related documentation for the purpose of design and + * development in conjunction with Artery microcontrollers. Use of the + * software is governed by this copyright notice and the following disclaimer. + * + * THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, + * GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, + * TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR + * STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, + * INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. + * + ************************************************************************** + */ + +/* define to prevent recursive inclusion -------------------------------------*/ +#ifndef __AT32F435_437_INT_H +#define __AT32F435_437_INT_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* includes ------------------------------------------------------------------*/ +#include "at32f435_437.h" + +/* exported types ------------------------------------------------------------*/ +/* exported constants --------------------------------------------------------*/ +/* exported macro ------------------------------------------------------------*/ +/* exported functions ------------------------------------------------------- */ + +void NMI_Handler(void); +void HardFault_Handler(void); +void MemManage_Handler(void); +void BusFault_Handler(void); +void UsageFault_Handler(void); +void SVC_Handler(void); +void DebugMon_Handler(void); +void PendSV_Handler(void); +void SysTick_Handler(void); + +#ifdef __cplusplus +} +#endif + +#endif + diff --git a/project/at_start_f437/examples/flash/fap_enable/mdk_v5/fap_enable.uvoptx b/project/at_start_f437/examples/flash/fap_enable/mdk_v5/fap_enable.uvoptx new file mode 100644 index 00000000..8dbc5820 --- /dev/null +++ b/project/at_start_f437/examples/flash/fap_enable/mdk_v5/fap_enable.uvoptx @@ -0,0 +1,356 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj; *.o + *.lib + *.txt; *.h; *.inc + *.plm + *.cpp + 0 + + + + 0 + 0 + + + + fap_enable + 0x4 + ARM-ADS + + 12000000 + + 0 + 1 + 0 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\listings\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 0 + 0 + 1 + + 0 + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 0 + + + + + + + + + + + BIN\CMSIS_AGDI.dll + + + + 0 + UL2CM3 + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0AT32F437_4032 -FS08000000 -FL03F0000 -FP0($$Device:-AT32F437ZMT7$Flash\AT32F437_4032.FLM)) + + + + + 0 + + + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + 0 + 0 + 0 + + + + + + + + + + + + + user + 0 + 0 + 0 + 0 + + 1 + 1 + 1 + 0 + 0 + 0 + ..\src\main.c + main.c + 0 + 0 + + + 1 + 2 + 1 + 0 + 0 + 0 + ..\src\at32f435_437_clock.c + at32f435_437_clock.c + 0 + 0 + + + 1 + 3 + 1 + 0 + 0 + 0 + ..\src\at32f435_437_int.c + at32f435_437_int.c + 0 + 0 + + + + + bsp + 0 + 0 + 0 + 0 + + 2 + 4 + 1 + 0 + 0 + 0 + ..\..\..\..\..\at32f435_437_board\at32f435_437_board.c + at32f435_437_board.c + 0 + 0 + + + + + firmware + 0 + 0 + 0 + 0 + + 3 + 5 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_crm.c + at32f435_437_crm.c + 0 + 0 + + + 3 + 6 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_usart.c + at32f435_437_usart.c + 0 + 0 + + + 3 + 7 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_flash.c + at32f435_437_flash.c + 0 + 0 + + + 3 + 8 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_gpio.c + at32f435_437_gpio.c + 0 + 0 + + + 3 + 9 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_misc.c + at32f435_437_misc.c + 0 + 0 + + + + + cmsis + 0 + 0 + 0 + 0 + + 4 + 10 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\libraries\cmsis\cm4\device_support\system_at32f435_437.c + system_at32f435_437.c + 0 + 0 + + + 4 + 11 + 2 + 0 + 0 + 0 + ..\..\..\..\..\..\libraries\cmsis\cm4\device_support\startup\mdk\startup_at32f435_437.s + startup_at32f435_437.s + 0 + 0 + + + + + readme + 0 + 0 + 0 + 0 + + 5 + 12 + 5 + 0 + 0 + 0 + ..\readme.txt + readme.txt + 0 + 0 + + + + diff --git a/project/at_start_f437/examples/flash/fap_enable/mdk_v5/fap_enable.uvprojx b/project/at_start_f437/examples/flash/fap_enable/mdk_v5/fap_enable.uvprojx new file mode 100644 index 00000000..4418edd2 --- /dev/null +++ b/project/at_start_f437/examples/flash/fap_enable/mdk_v5/fap_enable.uvprojx @@ -0,0 +1,492 @@ + + + + 2.1 + +
### uVision Project, (C) Keil Software
+ + + + fap_enable + 0x4 + ARM-ADS + 5060960::V5.06 update 7 (build 960)::.\ARMCC + 0 + + + -AT32F437ZMT7 + ArteryTek + ArteryTek.AT32F435_437_DFP.2.0.1 + IROM(0x08000000,0x3F0000) IRAM(0x20000000,0x60000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0AT32F437_4032 -FS08000000 -FL03F0000 -FP0($$Device:-AT32F437ZMT7$Flash\AT32F437_4032.FLM)) + 0 + $$Device:- + + + + + + + + + + $$Device:-AT32F437ZMT7$SVD\AT32F437xx_v2.svd + 0 + 0 + + + + AT32F437ZMT7$Device\Include\at32f435_437.h\ + AT32F437ZMT7$Device\Include\at32f435_437.h\ + + 0 + 0 + 0 + 0 + 1 + + .\objects\ + fap_enable + 1 + 0 + 1 + 1 + 1 + .\listings\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 0 + + + SARMCM3.DLL + -REMAP -MPU + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM4 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 1 + 4096 + + 1 + BIN\UL2CM3.DLL + + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M4" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 2 + 0 + 0 + 0 + 0 + 8 + 0 + 0 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x60000 + + + 1 + 0x8000000 + 0x3f0000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x8000000 + 0x3f0000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x60000 + + + 0 + 0x0 + 0x0 + + + + + + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 0 + + + AT32F437ZMT7,USE_STDPERIPH_DRIVER,AT_START_F437_V1 + + ..\..\..\..\..\..\libraries\drivers\inc;..\..\..\..\..\..\libraries\cmsis\cm4\core_support;..\..\..\..\..\..\libraries\cmsis\cm4\device_support;..\..\..\..\..\at32f435_437_board;..\flash;..\inc + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + + + + + + + + + 1 + 0 + 0 + 0 + 1 + 0 + 0x08000000 + 0x20000000 + + + + + + + + + + + + + user + + + main.c + 1 + ..\src\main.c + + + at32f435_437_clock.c + 1 + ..\src\at32f435_437_clock.c + + + at32f435_437_int.c + 1 + ..\src\at32f435_437_int.c + + + + + bsp + + + at32f435_437_board.c + 1 + ..\..\..\..\..\at32f435_437_board\at32f435_437_board.c + + + + + firmware + + + at32f435_437_crm.c + 1 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_crm.c + + + at32f435_437_usart.c + 1 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_usart.c + + + at32f435_437_flash.c + 1 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_flash.c + + + at32f435_437_gpio.c + 1 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_gpio.c + + + at32f435_437_misc.c + 1 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_misc.c + + + + + cmsis + + + system_at32f435_437.c + 1 + ..\..\..\..\..\..\libraries\cmsis\cm4\device_support\system_at32f435_437.c + + + startup_at32f435_437.s + 2 + ..\..\..\..\..\..\libraries\cmsis\cm4\device_support\startup\mdk\startup_at32f435_437.s + + + + + readme + + + readme.txt + 5 + ..\readme.txt + + + + + + + + + + + + + + + + + fap_enable + + + + + + 0 + 1 + + + + + diff --git a/project/at_start_f437/examples/flash/fap_enable/readme.txt b/project/at_start_f437/examples/flash/fap_enable/readme.txt new file mode 100644 index 00000000..c23f6663 --- /dev/null +++ b/project/at_start_f437/examples/flash/fap_enable/readme.txt @@ -0,0 +1,17 @@ +/** + ************************************************************************** + * @file readme.txt + * @version v2.0.9 + * @date 2022-06-28 + * @brief readme + ************************************************************************** + */ + + this demo is based on the at-start board, in this demo, show how to enable + fap function by executing code. when fap enabled, the three leds will turn + on. + + note: + if fap is still in debug mode when it is set, the debug mode must be + cleared with poweron reset instead of system reset, to restore flash + program access to flash memory data. diff --git a/project/at_start_f437/examples/flash/fap_enable/src/at32f435_437_clock.c b/project/at_start_f437/examples/flash/fap_enable/src/at32f435_437_clock.c new file mode 100644 index 00000000..5eb8f824 --- /dev/null +++ b/project/at_start_f437/examples/flash/fap_enable/src/at32f435_437_clock.c @@ -0,0 +1,121 @@ +/** + ************************************************************************** + * @file at32f435_437_clock.c + * @version v2.0.9 + * @date 2022-06-28 + * @brief system clock config program + ************************************************************************** + * Copyright notice & Disclaimer + * + * The software Board Support Package (BSP) that is made available to + * download from Artery official website is the copyrighted work of Artery. + * Artery authorizes customers to use, copy, and distribute the BSP + * software and its related documentation for the purpose of design and + * development in conjunction with Artery microcontrollers. Use of the + * software is governed by this copyright notice and the following disclaimer. + * + * THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, + * GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, + * TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR + * STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, + * INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. + * + ************************************************************************** + */ + +/* includes ------------------------------------------------------------------*/ +#include "at32f435_437_clock.h" + +/** + * @brief system clock config program + * @note the system clock is configured as follow: + * - system clock = (hext * pll_ns)/(pll_ms * pll_fr) + * - system clock source = pll (hext) + * - hext = 8000000 + * - sclk = 288000000 + * - ahbdiv = 1 + * - ahbclk = 288000000 + * - apb2div = 2 + * - apb2clk = 144000000 + * - apb1div = 2 + * - apb1clk = 144000000 + * - pll_ns = 72 + * - pll_ms = 1 + * - pll_fr = 2 + * @param none + * @retval none + */ +void system_clock_config(void) +{ + /* enable pwc periph clock */ + crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE); + + /* config ldo voltage */ + pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3); + + /* set the flash clock divider */ + flash_clock_divider_set(FLASH_CLOCK_DIV_3); + + /* reset crm */ + crm_reset(); + + crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE); + + /* wait till hext is ready */ + while(crm_hext_stable_wait() == ERROR) + { + } + + /* config pll clock resource + common frequency config list: pll source selected hick or hext(8mhz) + _______________________________________________________________________________________ + | | | | | | | | | | + |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 | + |________|_________|_________|_________|_________|_________|_________|_________________| + | | | | | | | | | | + |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 | + | | | | | | | | | | + |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | + | | | | | | | | | | + |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16| + |________|_________|_________|_________|_________|_________|_________|________|________| + + if pll clock source selects hext with other frequency values, or configure pll to other + frequency values, please use the at32 new clock configuration tool for configuration. */ + crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2); + + /* enable pll */ + crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE); + + /* wait till pll is ready */ + while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET) + { + } + + /* config ahbclk */ + crm_ahb_div_set(CRM_AHB_DIV_1); + + /* config apb2clk */ + crm_apb2_div_set(CRM_APB2_DIV_2); + + /* config apb1clk */ + crm_apb1_div_set(CRM_APB1_DIV_2); + + /* enable auto step mode */ + crm_auto_step_mode_enable(TRUE); + + /* select pll as system clock source */ + crm_sysclk_switch(CRM_SCLK_PLL); + + /* wait till pll is used as system clock source */ + while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL) + { + } + + /* disable auto step mode */ + crm_auto_step_mode_enable(FALSE); + + /* update system_core_clock global variable */ + system_core_clock_update(); +} diff --git a/project/at_start_f437/examples/flash/fap_enable/src/at32f435_437_int.c b/project/at_start_f437/examples/flash/fap_enable/src/at32f435_437_int.c new file mode 100644 index 00000000..5d95cb6d --- /dev/null +++ b/project/at_start_f437/examples/flash/fap_enable/src/at32f435_437_int.c @@ -0,0 +1,142 @@ +/** + ************************************************************************** + * @file at32f435_437_int.c + * @version v2.0.9 + * @date 2022-06-28 + * @brief main interrupt service routines. + ************************************************************************** + * Copyright notice & Disclaimer + * + * The software Board Support Package (BSP) that is made available to + * download from Artery official website is the copyrighted work of Artery. + * Artery authorizes customers to use, copy, and distribute the BSP + * software and its related documentation for the purpose of design and + * development in conjunction with Artery microcontrollers. Use of the + * software is governed by this copyright notice and the following disclaimer. + * + * THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, + * GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, + * TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR + * STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, + * INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. + * + ************************************************************************** + */ + +/* includes ------------------------------------------------------------------*/ +#include "at32f435_437_int.h" + +/** @addtogroup AT32F437_periph_examples + * @{ + */ + +/** @addtogroup 437_FLASH_fap_enable + * @{ + */ + +/** + * @brief this function handles nmi exception. + * @param none + * @retval none + */ +void NMI_Handler(void) +{ +} + +/** + * @brief this function handles hard fault exception. + * @param none + * @retval none + */ +void HardFault_Handler(void) +{ + /* go to infinite loop when hard fault exception occurs */ + while(1) + { + } +} + +/** + * @brief this function handles memory manage exception. + * @param none + * @retval none + */ +void MemManage_Handler(void) +{ + /* go to infinite loop when memory manage exception occurs */ + while(1) + { + } +} + +/** + * @brief this function handles bus fault exception. + * @param none + * @retval none + */ +void BusFault_Handler(void) +{ + /* go to infinite loop when bus fault exception occurs */ + while(1) + { + } +} + +/** + * @brief this function handles usage fault exception. + * @param none + * @retval none + */ +void UsageFault_Handler(void) +{ + /* go to infinite loop when usage fault exception occurs */ + while(1) + { + } +} + +/** + * @brief this function handles svcall exception. + * @param none + * @retval none + */ +void SVC_Handler(void) +{ +} + +/** + * @brief this function handles debug monitor exception. + * @param none + * @retval none + */ +void DebugMon_Handler(void) +{ +} + +/** + * @brief this function handles pendsv_handler exception. + * @param none + * @retval none + */ +void PendSV_Handler(void) +{ +} + +/** + * @brief this function handles systick handler. + * @param none + * @retval none + */ +void SysTick_Handler(void) +{ +} + +/** + * @} + */ + +/** + * @} + */ + diff --git a/project/at_start_f437/examples/flash/fap_enable/src/main.c b/project/at_start_f437/examples/flash/fap_enable/src/main.c new file mode 100644 index 00000000..8b6cbcb0 --- /dev/null +++ b/project/at_start_f437/examples/flash/fap_enable/src/main.c @@ -0,0 +1,81 @@ +/** + ************************************************************************** + * @file main.c + * @version v2.0.9 + * @date 2022-06-28 + * @brief main program + ************************************************************************** + * Copyright notice & Disclaimer + * + * The software Board Support Package (BSP) that is made available to + * download from Artery official website is the copyrighted work of Artery. + * Artery authorizes customers to use, copy, and distribute the BSP + * software and its related documentation for the purpose of design and + * development in conjunction with Artery microcontrollers. Use of the + * software is governed by this copyright notice and the following disclaimer. + * + * THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, + * GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, + * TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR + * STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, + * INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. + * + ************************************************************************** + */ + +#include "at32f435_437_board.h" +#include "at32f435_437_clock.h" + +/** @addtogroup AT32F437_periph_examples + * @{ + */ + +/** @addtogroup 437_FLASH_fap_enable FLASH_fap_enable + * @{ + */ + +/** + * @brief main function. + * @param none + * @retval none + */ +int main(void) +{ + flash_status_type status = FLASH_OPERATE_DONE; + system_clock_config(); + at32_board_init(); + if(flash_fap_status_get() == RESET) + { + flash_unlock(); + /* wait for operation to be completed */ + status = flash_operation_wait_for(OPERATION_TIMEOUT); + + if(status != FLASH_OPERATE_TIMEOUT) + { + if((status == FLASH_PROGRAM_ERROR) || (status == FLASH_EPP_ERROR)) + flash_flag_clear(FLASH_PRGMERR_FLAG | FLASH_EPPERR_FLAG); + + status = flash_fap_enable(TRUE); + if(status == FLASH_OPERATE_DONE) + nvic_system_reset(); + } + }else + { + at32_led_on(LED2); + at32_led_on(LED3); + at32_led_on(LED4); + } + while(1) + { + } +} + + +/** + * @} + */ + +/** + * @} + */ diff --git a/project/at_start_f437/examples/flash/flash_write_read/inc/at32f435_437_clock.h b/project/at_start_f437/examples/flash/flash_write_read/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/flash/flash_write_read/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/flash/flash_write_read/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/flash/flash_write_read/inc/at32f435_437_conf.h b/project/at_start_f437/examples/flash/flash_write_read/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/flash/flash_write_read/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/flash/flash_write_read/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/flash/flash_write_read/inc/at32f435_437_int.h b/project/at_start_f437/examples/flash/flash_write_read/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/flash/flash_write_read/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/flash/flash_write_read/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/flash/flash_write_read/inc/flash.h b/project/at_start_f437/examples/flash/flash_write_read/inc/flash.h index 90ed46c4..e8e899ac 100644 --- a/project/at_start_f437/examples/flash/flash_write_read/inc/flash.h +++ b/project/at_start_f437/examples/flash/flash_write_read/inc/flash.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file flash.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief flash header file ************************************************************************** * Copyright notice & Disclaimer @@ -44,8 +44,8 @@ */ void flash_read(uint32_t read_addr, uint16_t *p_buffer, uint16_t num_read); -void flash_write_nocheck(uint32_t write_addr, uint16_t *p_buffer, uint16_t num_write); -void flash_write(uint32_t write_addr,uint16_t *p_Buffer, uint16_t num_write); +error_status flash_write_nocheck(uint32_t write_addr, uint16_t *p_buffer, uint16_t num_write); +error_status flash_write(uint32_t write_addr,uint16_t *p_Buffer, uint16_t num_write); /** * @} diff --git a/project/at_start_f437/examples/flash/flash_write_read/mdk_v5/flash_write_read.uvprojx b/project/at_start_f437/examples/flash/flash_write_read/mdk_v5/flash_write_read.uvprojx index 676f3771..5575effd 100644 --- a/project/at_start_f437/examples/flash/flash_write_read/mdk_v5/flash_write_read.uvprojx +++ b/project/at_start_f437/examples/flash/flash_write_read/mdk_v5/flash_write_read.uvprojx @@ -10,7 +10,7 @@ flash_write_read 0x4 ARM-ADS - 5060061::V5.06 update 1 (build 61)::ARMCC + 5060960::V5.06 update 7 (build 960)::.\ARMCC 0 diff --git a/project/at_start_f437/examples/flash/flash_write_read/readme.txt b/project/at_start_f437/examples/flash/flash_write_read/readme.txt index dbdac525..ce83575e 100644 --- a/project/at_start_f437/examples/flash/flash_write_read/readme.txt +++ b/project/at_start_f437/examples/flash/flash_write_read/readme.txt @@ -1,12 +1,12 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ this demo is based on the at-start board, in this demo, test buffer will be wiriten to flash and read from same address, then compare them. if the - test is success, the three leds will turn on. + test is passed, the three leds will turn on. diff --git a/project/at_start_f437/examples/flash/flash_write_read/src/at32f435_437_clock.c b/project/at_start_f437/examples/flash/flash_write_read/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/flash/flash_write_read/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/flash/flash_write_read/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/flash/flash_write_read/src/at32f435_437_int.c b/project/at_start_f437/examples/flash/flash_write_read/src/at32f435_437_int.c index 899fb07b..091ba946 100644 --- a/project/at_start_f437/examples/flash/flash_write_read/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/flash/flash_write_read/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/flash/flash_write_read/src/flash.c b/project/at_start_f437/examples/flash/flash_write_read/src/flash.c index 931e1001..160de255 100644 --- a/project/at_start_f437/examples/flash/flash_write_read/src/flash.c +++ b/project/at_start_f437/examples/flash/flash_write_read/src/flash.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file flash.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief flash program ************************************************************************** * Copyright notice & Disclaimer @@ -61,16 +61,20 @@ void flash_read(uint32_t read_addr, uint16_t *p_buffer, uint16_t num_read) * @param write_addr: the address of writing * @param p_buffer: the buffer of writing data * @param num_write: the number of writing data - * @retval none + * @retval result */ -void flash_write_nocheck(uint32_t write_addr, uint16_t *p_buffer, uint16_t num_write) +error_status flash_write_nocheck(uint32_t write_addr, uint16_t *p_buffer, uint16_t num_write) { uint16_t i; + flash_status_type status = FLASH_OPERATE_DONE; for(i = 0; i < num_write; i++) { - flash_halfword_program(write_addr, p_buffer[i]); + status = flash_halfword_program(write_addr, p_buffer[i]); + if(status != FLASH_OPERATE_DONE) + return ERROR; write_addr += 2; } + return SUCCESS; } /** @@ -78,16 +82,17 @@ void flash_write_nocheck(uint32_t write_addr, uint16_t *p_buffer, uint16_t num_w * @param write_addr: the address of writing * @param p_buffer: the buffer of writing data * @param num_write: the number of writing data - * @retval none + * @retval result */ -void flash_write(uint32_t write_addr, uint16_t *p_buffer, uint16_t num_write) +error_status flash_write(uint32_t write_addr, uint16_t *p_buffer, uint16_t num_write) { uint32_t offset_addr; uint32_t sector_position; uint16_t sector_offset; uint16_t sector_remain; uint16_t i; - + flash_status_type status = FLASH_OPERATE_DONE; + flash_unlock(); offset_addr = write_addr - FLASH_BASE; sector_position = offset_addr / SECTOR_SIZE; @@ -105,16 +110,27 @@ void flash_write(uint32_t write_addr, uint16_t *p_buffer, uint16_t num_write) } if(i < sector_remain) { - flash_sector_erase(sector_position * SECTOR_SIZE + FLASH_BASE); + /* wait for operation to be completed */ + status = flash_operation_wait_for(ERASE_TIMEOUT); + + if((status == FLASH_PROGRAM_ERROR) || (status == FLASH_EPP_ERROR)) + flash_flag_clear(FLASH_PRGMERR_FLAG | FLASH_EPPERR_FLAG); + else if(status == FLASH_OPERATE_TIMEOUT) + return ERROR; + status = flash_sector_erase(sector_position * SECTOR_SIZE + FLASH_BASE); + if(status != FLASH_OPERATE_DONE) + return ERROR; for(i = 0; i < sector_remain; i++) { flash_buf[i + sector_offset] = p_buffer[i]; } - flash_write_nocheck(sector_position * SECTOR_SIZE + FLASH_BASE, flash_buf, SECTOR_SIZE / 2); + if(flash_write_nocheck(sector_position * SECTOR_SIZE + FLASH_BASE, flash_buf, SECTOR_SIZE / 2) != SUCCESS) + return ERROR; } else { - flash_write_nocheck(write_addr, p_buffer, sector_remain); + if(flash_write_nocheck(write_addr, p_buffer, sector_remain) != SUCCESS) + return ERROR; } if(num_write == sector_remain) break; @@ -132,8 +148,11 @@ void flash_write(uint32_t write_addr, uint16_t *p_buffer, uint16_t num_write) } } flash_lock(); + return SUCCESS; } + + /** * @} */ diff --git a/project/at_start_f437/examples/flash/flash_write_read/src/main.c b/project/at_start_f437/examples/flash/flash_write_read/src/main.c index abf10b12..d788669b 100644 --- a/project/at_start_f437/examples/flash/flash_write_read/src/main.c +++ b/project/at_start_f437/examples/flash/flash_write_read/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer @@ -37,7 +37,7 @@ */ #define TEST_BUFEER_SIZE 3000 -#define TEST_FLASH_ADDRESS_START (0x08000000 + 1024 * 512) +#define TEST_FLASH_ADDRESS_START (0x08000000 + 1024 * 10) uint16_t buffer_write[TEST_BUFEER_SIZE]; uint16_t buffer_read[TEST_BUFEER_SIZE]; @@ -48,8 +48,8 @@ error_status buffer_compare(uint16_t* p_buffer1, uint16_t* p_buffer2, uint16_t b * @brief compares two buffers. * @param p_buffer1, p_buffer2: buffers to be compared. * @param buffer_length: buffer's length - * @retval success: p_buffer1 identical to p_buffer2 - * error: p_buffer1 differs from p_buffer2 + * @retval SUCCESS: p_buffer1 identical to p_buffer2 + * ERROR: p_buffer1 differs from p_buffer2 */ error_status buffer_compare(uint16_t* p_buffer1, uint16_t* p_buffer2, uint16_t buffer_length) { @@ -73,6 +73,7 @@ error_status buffer_compare(uint16_t* p_buffer1, uint16_t* p_buffer2, uint16_t b int main(void) { uint32_t index=0; + error_status err_status; system_clock_config(); at32_board_init(); /* fill buffer_write data to test */ @@ -82,13 +83,13 @@ int main(void) } /* write data to flash */ - flash_write(TEST_FLASH_ADDRESS_START, buffer_write, TEST_BUFEER_SIZE); + err_status = flash_write(TEST_FLASH_ADDRESS_START, buffer_write, TEST_BUFEER_SIZE); /* read data from flash */ flash_read(TEST_FLASH_ADDRESS_START, buffer_read, TEST_BUFEER_SIZE); /* compare the buffer */ - if(buffer_compare(buffer_write, buffer_read, TEST_BUFEER_SIZE) == SUCCESS) + if((buffer_compare(buffer_write, buffer_read, TEST_BUFEER_SIZE) == SUCCESS) && (err_status == SUCCESS)) { at32_led_on(LED2); at32_led_on(LED3); @@ -100,6 +101,7 @@ int main(void) } } + /** * @} */ diff --git a/project/at_start_f437/examples/gpio/io_toggle/inc/at32f435_437_clock.h b/project/at_start_f437/examples/gpio/io_toggle/inc/at32f435_437_clock.h new file mode 100644 index 00000000..86a4b828 --- /dev/null +++ b/project/at_start_f437/examples/gpio/io_toggle/inc/at32f435_437_clock.h @@ -0,0 +1,46 @@ +/** + ************************************************************************** + * @file at32f435_437_clock.h + * @version v2.0.9 + * @date 2022-06-28 + * @brief header file of clock program + ************************************************************************** + * Copyright notice & Disclaimer + * + * The software Board Support Package (BSP) that is made available to + * download from Artery official website is the copyrighted work of Artery. + * Artery authorizes customers to use, copy, and distribute the BSP + * software and its related documentation for the purpose of design and + * development in conjunction with Artery microcontrollers. Use of the + * software is governed by this copyright notice and the following disclaimer. + * + * THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, + * GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, + * TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR + * STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, + * INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. + * + ************************************************************************** + */ + +/* define to prevent recursive inclusion -------------------------------------*/ +#ifndef __AT32F435_437_CLOCK_H +#define __AT32F435_437_CLOCK_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* includes ------------------------------------------------------------------*/ +#include "at32f435_437.h" + +/* exported functions ------------------------------------------------------- */ +void system_clock_config(void); + +#ifdef __cplusplus +} +#endif + +#endif + diff --git a/project/at_start_f437/examples/gpio/io_toggle/inc/at32f435_437_conf.h b/project/at_start_f437/examples/gpio/io_toggle/inc/at32f435_437_conf.h new file mode 100644 index 00000000..e2816415 --- /dev/null +++ b/project/at_start_f437/examples/gpio/io_toggle/inc/at32f435_437_conf.h @@ -0,0 +1,174 @@ +/** + ************************************************************************** + * @file at32f435_437_conf.h + * @version v2.0.9 + * @date 2022-06-28 + * @brief at32f435_437 config header file + ************************************************************************** + * Copyright notice & Disclaimer + * + * The software Board Support Package (BSP) that is made available to + * download from Artery official website is the copyrighted work of Artery. + * Artery authorizes customers to use, copy, and distribute the BSP + * software and its related documentation for the purpose of design and + * development in conjunction with Artery microcontrollers. Use of the + * software is governed by this copyright notice and the following disclaimer. + * + * THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, + * GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, + * TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR + * STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, + * INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. + * + ************************************************************************** + */ + +/* define to prevent recursive inclusion -------------------------------------*/ +#ifndef __AT32F435_437_CONF_H +#define __AT32F435_437_CONF_H + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @brief in the following line adjust the value of high speed exernal crystal (hext) + * used in your application + * + * tip: to avoid modifying this file each time you need to use different hext, you + * can define the hext value in your toolchain compiler preprocessor. + * + */ +#if !defined HEXT_VALUE +#define HEXT_VALUE ((uint32_t)8000000) /*!< value of the high speed exernal crystal in hz */ +#endif + +/** + * @brief in the following line adjust the high speed exernal crystal (hext) startup + * timeout value + */ +#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000) /*!< time out for hext start up */ +#define HICK_VALUE ((uint32_t)8000000) /*!< value of the high speed internal clock in hz */ + +/* module define -------------------------------------------------------------*/ +#define CRM_MODULE_ENABLED +#define TMR_MODULE_ENABLED +#define ERTC_MODULE_ENABLED +#define GPIO_MODULE_ENABLED +#define I2C_MODULE_ENABLED +#define USART_MODULE_ENABLED +#define PWC_MODULE_ENABLED +#define CAN_MODULE_ENABLED +#define ADC_MODULE_ENABLED +#define DAC_MODULE_ENABLED +#define SPI_MODULE_ENABLED +#define EDMA_MODULE_ENABLED +#define DMA_MODULE_ENABLED +#define DEBUG_MODULE_ENABLED +#define FLASH_MODULE_ENABLED +#define CRC_MODULE_ENABLED +#define WWDT_MODULE_ENABLED +#define WDT_MODULE_ENABLED +#define EXINT_MODULE_ENABLED +#define SDIO_MODULE_ENABLED +#define XMC_MODULE_ENABLED +#define USB_MODULE_ENABLED +#define ACC_MODULE_ENABLED +#define MISC_MODULE_ENABLED +#define QSPI_MODULE_ENABLED +#define DVP_MODULE_ENABLED +#define SCFG_MODULE_ENABLED +#define EMAC_MODULE_ENABLED + +/* includes ------------------------------------------------------------------*/ +#ifdef CRM_MODULE_ENABLED +#include "at32f435_437_crm.h" +#endif +#ifdef TMR_MODULE_ENABLED +#include "at32f435_437_tmr.h" +#endif +#ifdef ERTC_MODULE_ENABLED +#include "at32f435_437_ertc.h" +#endif +#ifdef GPIO_MODULE_ENABLED +#include "at32f435_437_gpio.h" +#endif +#ifdef I2C_MODULE_ENABLED +#include "at32f435_437_i2c.h" +#endif +#ifdef USART_MODULE_ENABLED +#include "at32f435_437_usart.h" +#endif +#ifdef PWC_MODULE_ENABLED +#include "at32f435_437_pwc.h" +#endif +#ifdef CAN_MODULE_ENABLED +#include "at32f435_437_can.h" +#endif +#ifdef ADC_MODULE_ENABLED +#include "at32f435_437_adc.h" +#endif +#ifdef DAC_MODULE_ENABLED +#include "at32f435_437_dac.h" +#endif +#ifdef SPI_MODULE_ENABLED +#include "at32f435_437_spi.h" +#endif +#ifdef DMA_MODULE_ENABLED +#include "at32f435_437_dma.h" +#endif +#ifdef DEBUG_MODULE_ENABLED +#include "at32f435_437_debug.h" +#endif +#ifdef FLASH_MODULE_ENABLED +#include "at32f435_437_flash.h" +#endif +#ifdef CRC_MODULE_ENABLED +#include "at32f435_437_crc.h" +#endif +#ifdef WWDT_MODULE_ENABLED +#include "at32f435_437_wwdt.h" +#endif +#ifdef WDT_MODULE_ENABLED +#include "at32f435_437_wdt.h" +#endif +#ifdef EXINT_MODULE_ENABLED +#include "at32f435_437_exint.h" +#endif +#ifdef SDIO_MODULE_ENABLED +#include "at32f435_437_sdio.h" +#endif +#ifdef XMC_MODULE_ENABLED +#include "at32f435_437_xmc.h" +#endif +#ifdef ACC_MODULE_ENABLED +#include "at32f435_437_acc.h" +#endif +#ifdef MISC_MODULE_ENABLED +#include "at32f435_437_misc.h" +#endif +#ifdef EDMA_MODULE_ENABLED +#include "at32f435_437_edma.h" +#endif +#ifdef QSPI_MODULE_ENABLED +#include "at32f435_437_qspi.h" +#endif +#ifdef SCFG_MODULE_ENABLED +#include "at32f435_437_scfg.h" +#endif +#ifdef EMAC_MODULE_ENABLED +#include "at32f435_437_emac.h" +#endif +#ifdef DVP_MODULE_ENABLED +#include "at32f435_437_dvp.h" +#endif +#ifdef USB_MODULE_ENABLED +#include "at32f435_437_usb.h" +#endif + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/project/at_start_f437/examples/gpio/io_toggle/inc/at32f435_437_int.h b/project/at_start_f437/examples/gpio/io_toggle/inc/at32f435_437_int.h new file mode 100644 index 00000000..80aec042 --- /dev/null +++ b/project/at_start_f437/examples/gpio/io_toggle/inc/at32f435_437_int.h @@ -0,0 +1,58 @@ +/** + ************************************************************************** + * @file at32f435_437_int.h + * @version v2.0.9 + * @date 2022-06-28 + * @brief header file of main interrupt service routines. + ************************************************************************** + * Copyright notice & Disclaimer + * + * The software Board Support Package (BSP) that is made available to + * download from Artery official website is the copyrighted work of Artery. + * Artery authorizes customers to use, copy, and distribute the BSP + * software and its related documentation for the purpose of design and + * development in conjunction with Artery microcontrollers. Use of the + * software is governed by this copyright notice and the following disclaimer. + * + * THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, + * GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, + * TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR + * STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, + * INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. + * + ************************************************************************** + */ + +/* define to prevent recursive inclusion -------------------------------------*/ +#ifndef __AT32F435_437_INT_H +#define __AT32F435_437_INT_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* includes ------------------------------------------------------------------*/ +#include "at32f435_437.h" + +/* exported types ------------------------------------------------------------*/ +/* exported constants --------------------------------------------------------*/ +/* exported macro ------------------------------------------------------------*/ +/* exported functions ------------------------------------------------------- */ + +void NMI_Handler(void); +void HardFault_Handler(void); +void MemManage_Handler(void); +void BusFault_Handler(void); +void UsageFault_Handler(void); +void SVC_Handler(void); +void DebugMon_Handler(void); +void PendSV_Handler(void); +void SysTick_Handler(void); + +#ifdef __cplusplus +} +#endif + +#endif + diff --git a/project/at_start_f437/examples/gpio/io_toggle/mdk_v5/io_toggle.uvoptx b/project/at_start_f437/examples/gpio/io_toggle/mdk_v5/io_toggle.uvoptx new file mode 100644 index 00000000..57735c3d --- /dev/null +++ b/project/at_start_f437/examples/gpio/io_toggle/mdk_v5/io_toggle.uvoptx @@ -0,0 +1,344 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj; *.o + *.lib + *.txt; *.h; *.inc + *.plm + *.cpp + 0 + + + + 0 + 0 + + + + io_toggle + 0x4 + ARM-ADS + + 12000000 + + 0 + 1 + 0 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\listings\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 0 + 0 + 1 + + 0 + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 0 + + + + + + + + + + + BIN\CMSIS_AGDI.dll + + + + 0 + UL2CM3 + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0AT32F437_4032 -FS08000000 -FL03F0000 -FP0($$Device:-AT32F437ZMT7$Flash\AT32F437_4032.FLM)) + + + + + 0 + + + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + 0 + 0 + 0 + + + + + + + + + + + + + user + 0 + 0 + 0 + 0 + + 1 + 1 + 1 + 0 + 0 + 0 + ..\src\at32f435_437_clock.c + at32f435_437_clock.c + 0 + 0 + + + 1 + 2 + 1 + 0 + 0 + 0 + ..\src\at32f435_437_int.c + at32f435_437_int.c + 0 + 0 + + + 1 + 3 + 1 + 0 + 0 + 0 + ..\src\main.c + main.c + 0 + 0 + + + + + bsp + 0 + 0 + 0 + 0 + + 2 + 4 + 1 + 0 + 0 + 0 + ..\..\..\..\..\at32f435_437_board\at32f435_437_board.c + at32f435_437_board.c + 0 + 0 + + + + + firmware + 0 + 0 + 0 + 0 + + 3 + 5 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_gpio.c + at32f435_437_gpio.c + 0 + 0 + + + 3 + 6 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_crm.c + at32f435_437_crm.c + 0 + 0 + + + 3 + 7 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_usart.c + at32f435_437_usart.c + 0 + 0 + + + 3 + 8 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_misc.c + at32f435_437_misc.c + 0 + 0 + + + + + cmsis + 0 + 0 + 0 + 0 + + 4 + 9 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\libraries\cmsis\cm4\device_support\system_at32f435_437.c + system_at32f435_437.c + 0 + 0 + + + 4 + 10 + 2 + 0 + 0 + 0 + ..\..\..\..\..\..\libraries\cmsis\cm4\device_support\startup\mdk\startup_at32f435_437.s + startup_at32f435_437.s + 0 + 0 + + + + + readme + 0 + 0 + 0 + 0 + + 5 + 11 + 5 + 0 + 0 + 0 + ..\readme.txt + readme.txt + 0 + 0 + + + + diff --git a/project/at_start_f437/examples/gpio/io_toggle/mdk_v5/io_toggle.uvprojx b/project/at_start_f437/examples/gpio/io_toggle/mdk_v5/io_toggle.uvprojx new file mode 100644 index 00000000..1bcde03a --- /dev/null +++ b/project/at_start_f437/examples/gpio/io_toggle/mdk_v5/io_toggle.uvprojx @@ -0,0 +1,487 @@ + + + + 2.1 + +
### uVision Project, (C) Keil Software
+ + + + io_toggle + 0x4 + ARM-ADS + 5060750::V5.06 update 6 (build 750)::.\ARMCC + 0 + + + -AT32F437ZMT7 + ArteryTek + ArteryTek.AT32F435_437_DFP.2.0.1 + IRAM(0x20000000,0x60000) IROM(0x08000000,0x3F0000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0AT32F437_4032 -FS08000000 -FL03F0000 -FP0($$Device:-AT32F437ZMT7$Flash\AT32F437_4032.FLM)) + 0 + $$Device:- + + + + + + + + + + $$Device:-AT32F437ZMT7$SVD\AT32F437xx_v2.svd + 0 + 0 + + + + AT32F437ZMT7$Device\Include\at32f435_437.h\ + AT32F437ZMT7$Device\Include\at32f435_437.h\ + + 0 + 0 + 0 + 0 + 1 + + .\objects\ + io_toggle + 1 + 0 + 1 + 1 + 1 + .\listings\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 0 + + + SARMCM3.DLL + -REMAP -MPU + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM4 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 1 + 4096 + + 1 + BIN\UL2CM3.DLL + + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M4" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 2 + 0 + 0 + 0 + 0 + 8 + 0 + 0 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x60000 + + + 1 + 0x8000000 + 0x3f0000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x8000000 + 0x3f0000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x60000 + + + 0 + 0x0 + 0x0 + + + + + + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 0 + + + AT32F437ZMT7,USE_STDPERIPH_DRIVER,AT_START_F437_V1 + + ..\..\..\..\..\..\libraries\drivers\inc;..\..\..\..\..\..\libraries\cmsis\cm4\core_support;..\..\..\..\..\..\libraries\cmsis\cm4\device_support;..\..\..\..\templates\inc;..\..\..\..\..\at32f435_437_board + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 4 + + + + + + + + + 1 + 0 + 0 + 0 + 1 + 0 + 0x08000000 + 0x20000000 + + + + + + + + + + + + + user + + + at32f435_437_clock.c + 1 + ..\src\at32f435_437_clock.c + + + at32f435_437_int.c + 1 + ..\src\at32f435_437_int.c + + + main.c + 1 + ..\src\main.c + + + + + bsp + + + at32f435_437_board.c + 1 + ..\..\..\..\..\at32f435_437_board\at32f435_437_board.c + + + + + firmware + + + at32f435_437_gpio.c + 1 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_gpio.c + + + at32f435_437_crm.c + 1 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_crm.c + + + at32f435_437_usart.c + 1 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_usart.c + + + at32f435_437_misc.c + 1 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_misc.c + + + + + cmsis + + + system_at32f435_437.c + 1 + ..\..\..\..\..\..\libraries\cmsis\cm4\device_support\system_at32f435_437.c + + + startup_at32f435_437.s + 2 + ..\..\..\..\..\..\libraries\cmsis\cm4\device_support\startup\mdk\startup_at32f435_437.s + + + + + readme + + + readme.txt + 5 + ..\readme.txt + + + + + + + + + + + + + + + + + <Project Info> + + + + + + 0 + 1 + + + + + diff --git a/project/at_start_f437/examples/gpio/io_toggle/readme.txt b/project/at_start_f437/examples/gpio/io_toggle/readme.txt new file mode 100644 index 00000000..7a5ba08a --- /dev/null +++ b/project/at_start_f437/examples/gpio/io_toggle/readme.txt @@ -0,0 +1,11 @@ +/** + ************************************************************************** + * @file readme.txt + * @version v2.0.9 + * @date 2022-06-28 + * @brief readme + ************************************************************************** + */ + + this demo is based on the at-start board, this demo toggle pa.01 forever, + to describes how to use scr and clr register for max io toggling. \ No newline at end of file diff --git a/project/at_start_f437/examples/gpio/io_toggle/src/at32f435_437_clock.c b/project/at_start_f437/examples/gpio/io_toggle/src/at32f435_437_clock.c new file mode 100644 index 00000000..5eb8f824 --- /dev/null +++ b/project/at_start_f437/examples/gpio/io_toggle/src/at32f435_437_clock.c @@ -0,0 +1,121 @@ +/** + ************************************************************************** + * @file at32f435_437_clock.c + * @version v2.0.9 + * @date 2022-06-28 + * @brief system clock config program + ************************************************************************** + * Copyright notice & Disclaimer + * + * The software Board Support Package (BSP) that is made available to + * download from Artery official website is the copyrighted work of Artery. + * Artery authorizes customers to use, copy, and distribute the BSP + * software and its related documentation for the purpose of design and + * development in conjunction with Artery microcontrollers. Use of the + * software is governed by this copyright notice and the following disclaimer. + * + * THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, + * GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, + * TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR + * STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, + * INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. + * + ************************************************************************** + */ + +/* includes ------------------------------------------------------------------*/ +#include "at32f435_437_clock.h" + +/** + * @brief system clock config program + * @note the system clock is configured as follow: + * - system clock = (hext * pll_ns)/(pll_ms * pll_fr) + * - system clock source = pll (hext) + * - hext = 8000000 + * - sclk = 288000000 + * - ahbdiv = 1 + * - ahbclk = 288000000 + * - apb2div = 2 + * - apb2clk = 144000000 + * - apb1div = 2 + * - apb1clk = 144000000 + * - pll_ns = 72 + * - pll_ms = 1 + * - pll_fr = 2 + * @param none + * @retval none + */ +void system_clock_config(void) +{ + /* enable pwc periph clock */ + crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE); + + /* config ldo voltage */ + pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3); + + /* set the flash clock divider */ + flash_clock_divider_set(FLASH_CLOCK_DIV_3); + + /* reset crm */ + crm_reset(); + + crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE); + + /* wait till hext is ready */ + while(crm_hext_stable_wait() == ERROR) + { + } + + /* config pll clock resource + common frequency config list: pll source selected hick or hext(8mhz) + _______________________________________________________________________________________ + | | | | | | | | | | + |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 | + |________|_________|_________|_________|_________|_________|_________|_________________| + | | | | | | | | | | + |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 | + | | | | | | | | | | + |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | + | | | | | | | | | | + |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16| + |________|_________|_________|_________|_________|_________|_________|________|________| + + if pll clock source selects hext with other frequency values, or configure pll to other + frequency values, please use the at32 new clock configuration tool for configuration. */ + crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2); + + /* enable pll */ + crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE); + + /* wait till pll is ready */ + while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET) + { + } + + /* config ahbclk */ + crm_ahb_div_set(CRM_AHB_DIV_1); + + /* config apb2clk */ + crm_apb2_div_set(CRM_APB2_DIV_2); + + /* config apb1clk */ + crm_apb1_div_set(CRM_APB1_DIV_2); + + /* enable auto step mode */ + crm_auto_step_mode_enable(TRUE); + + /* select pll as system clock source */ + crm_sysclk_switch(CRM_SCLK_PLL); + + /* wait till pll is used as system clock source */ + while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL) + { + } + + /* disable auto step mode */ + crm_auto_step_mode_enable(FALSE); + + /* update system_core_clock global variable */ + system_core_clock_update(); +} diff --git a/project/at_start_f437/examples/gpio/io_toggle/src/at32f435_437_int.c b/project/at_start_f437/examples/gpio/io_toggle/src/at32f435_437_int.c new file mode 100644 index 00000000..4299d3f9 --- /dev/null +++ b/project/at_start_f437/examples/gpio/io_toggle/src/at32f435_437_int.c @@ -0,0 +1,141 @@ +/** + ************************************************************************** + * @file at32f435_437_int.c + * @version v2.0.9 + * @date 2022-06-28 + * @brief main interrupt service routines. + ************************************************************************** + * Copyright notice & Disclaimer + * + * The software Board Support Package (BSP) that is made available to + * download from Artery official website is the copyrighted work of Artery. + * Artery authorizes customers to use, copy, and distribute the BSP + * software and its related documentation for the purpose of design and + * development in conjunction with Artery microcontrollers. Use of the + * software is governed by this copyright notice and the following disclaimer. + * + * THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, + * GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, + * TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR + * STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, + * INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. + * + ************************************************************************** + */ + +/* includes ------------------------------------------------------------------*/ +#include "at32f435_437_int.h" + +/** @addtogroup AT32F437_periph_examples + * @{ + */ + +/** @addtogroup 437_GPIO_io_toggle + * @{ + */ + +/** + * @brief this function handles nmi exception. + * @param none + * @retval none + */ +void NMI_Handler(void) +{ +} + +/** + * @brief this function handles hard fault exception. + * @param none + * @retval none + */ +void HardFault_Handler(void) +{ + /* go to infinite loop when hard fault exception occurs */ + while(1) + { + } +} + +/** + * @brief this function handles memory manage exception. + * @param none + * @retval none + */ +void MemManage_Handler(void) +{ + /* go to infinite loop when memory manage exception occurs */ + while(1) + { + } +} + +/** + * @brief this function handles bus fault exception. + * @param none + * @retval none + */ +void BusFault_Handler(void) +{ + /* go to infinite loop when bus fault exception occurs */ + while(1) + { + } +} + +/** + * @brief this function handles usage fault exception. + * @param none + * @retval none + */ +void UsageFault_Handler(void) +{ + /* go to infinite loop when usage fault exception occurs */ + while(1) + { + } +} + +/** + * @brief this function handles svcall exception. + * @param none + * @retval none + */ +void SVC_Handler(void) +{ +} + +/** + * @brief this function handles debug monitor exception. + * @param none + * @retval none + */ +void DebugMon_Handler(void) +{ +} + +/** + * @brief this function handles pendsv_handler exception. + * @param none + * @retval none + */ +void PendSV_Handler(void) +{ +} + +/** + * @brief this function handles systick handler. + * @param none + * @retval none + */ +void SysTick_Handler(void) +{ +} + +/** + * @} + */ + +/** + * @} + */ diff --git a/project/at_start_f437/examples/gpio/io_toggle/src/main.c b/project/at_start_f437/examples/gpio/io_toggle/src/main.c new file mode 100644 index 00000000..6e89f1b4 --- /dev/null +++ b/project/at_start_f437/examples/gpio/io_toggle/src/main.c @@ -0,0 +1,114 @@ +/** + ************************************************************************** + * @file main.c + * @version v2.0.9 + * @date 2022-06-28 + * @brief main program + ************************************************************************** + * Copyright notice & Disclaimer + * + * The software Board Support Package (BSP) that is made available to + * download from Artery official website is the copyrighted work of Artery. + * Artery authorizes customers to use, copy, and distribute the BSP + * software and its related documentation for the purpose of design and + * development in conjunction with Artery microcontrollers. Use of the + * software is governed by this copyright notice and the following disclaimer. + * + * THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, + * GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, + * TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR + * STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, + * INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. + * + ************************************************************************** + */ + +/* includes */ +#include "at32f435_437_board.h" +#include "at32f435_437_clock.h" + +/** @addtogroup AT32F437_periph_examples + * @{ + */ + +/** @addtogroup 437_GPIO_io_toggle GPIO_io_toggle + * @{ + */ + +/** + * @brief pa.01 gpio configuration. + * @param none + * @retval none + */ +void gpio_config(void) +{ + gpio_init_type gpio_init_struct; + + /* enable the gpioa clock */ + crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE); + + /* set default parameter */ + gpio_default_para_init(&gpio_init_struct); + + /* configure the gpio */ + gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; + gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_init_struct.gpio_mode = GPIO_MODE_OUTPUT; + gpio_init_struct.gpio_pins = GPIO_PINS_1; + gpio_init_struct.gpio_pull = GPIO_PULL_NONE; + gpio_init(GPIOA, &gpio_init_struct); +} + +/** + * @brief main function. + * @param none + * @retval none + */ +int main(void) +{ + system_clock_config(); + + gpio_config(); + + while(1) + { + /* set pa.01 */ + GPIOA->scr = GPIO_PINS_1; + /* reset pa.01 */ + GPIOA->clr = GPIO_PINS_1; + + /* set pa.01 */ + GPIOA->scr = GPIO_PINS_1; + /* reset pa.01 */ + GPIOA->clr = GPIO_PINS_1; + + /* set pa.01 */ + GPIOA->scr = GPIO_PINS_1; + /* reset pa.01 */ + GPIOA->clr = GPIO_PINS_1; + + /* set pa.01 */ + GPIOA->scr = GPIO_PINS_1; + /* reset pa.01 */ + GPIOA->clr = GPIO_PINS_1; + + /* set pa.01 */ + GPIOA->scr = GPIO_PINS_1; + /* reset pa.01 */ + GPIOA->clr = GPIO_PINS_1; + + /* set pa.01 */ + GPIOA->scr = GPIO_PINS_1; + /* reset pa.01 */ + GPIOA->clr = GPIO_PINS_1; + } +} + +/** + * @} + */ + +/** + * @} + */ diff --git a/project/at_start_f437/examples/gpio/led_toggle/inc/at32f435_437_clock.h b/project/at_start_f437/examples/gpio/led_toggle/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/gpio/led_toggle/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/gpio/led_toggle/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/gpio/led_toggle/inc/at32f435_437_conf.h b/project/at_start_f437/examples/gpio/led_toggle/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/gpio/led_toggle/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/gpio/led_toggle/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/gpio/led_toggle/inc/at32f435_437_int.h b/project/at_start_f437/examples/gpio/led_toggle/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/gpio/led_toggle/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/gpio/led_toggle/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/gpio/led_toggle/readme.txt b/project/at_start_f437/examples/gpio/led_toggle/readme.txt index dee03ab8..fc5d04ce 100644 --- a/project/at_start_f437/examples/gpio/led_toggle/readme.txt +++ b/project/at_start_f437/examples/gpio/led_toggle/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/gpio/led_toggle/src/at32f435_437_clock.c b/project/at_start_f437/examples/gpio/led_toggle/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/gpio/led_toggle/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/gpio/led_toggle/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/gpio/led_toggle/src/at32f435_437_int.c b/project/at_start_f437/examples/gpio/led_toggle/src/at32f435_437_int.c index 9dfaa42d..23563ce0 100644 --- a/project/at_start_f437/examples/gpio/led_toggle/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/gpio/led_toggle/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/gpio/led_toggle/src/main.c b/project/at_start_f437/examples/gpio/led_toggle/src/main.c index c86b19b3..807b1fdf 100644 --- a/project/at_start_f437/examples/gpio/led_toggle/src/main.c +++ b/project/at_start_f437/examples/gpio/led_toggle/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/gpio/swjtag_mux/inc/at32f435_437_clock.h b/project/at_start_f437/examples/gpio/swjtag_mux/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/gpio/swjtag_mux/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/gpio/swjtag_mux/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/gpio/swjtag_mux/inc/at32f435_437_conf.h b/project/at_start_f437/examples/gpio/swjtag_mux/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/gpio/swjtag_mux/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/gpio/swjtag_mux/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/gpio/swjtag_mux/inc/at32f435_437_int.h b/project/at_start_f437/examples/gpio/swjtag_mux/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/gpio/swjtag_mux/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/gpio/swjtag_mux/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/gpio/swjtag_mux/readme.txt b/project/at_start_f437/examples/gpio/swjtag_mux/readme.txt index 79d1cb91..bcb84928 100644 --- a/project/at_start_f437/examples/gpio/swjtag_mux/readme.txt +++ b/project/at_start_f437/examples/gpio/swjtag_mux/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/gpio/swjtag_mux/src/at32f435_437_clock.c b/project/at_start_f437/examples/gpio/swjtag_mux/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/gpio/swjtag_mux/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/gpio/swjtag_mux/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/gpio/swjtag_mux/src/at32f435_437_int.c b/project/at_start_f437/examples/gpio/swjtag_mux/src/at32f435_437_int.c index ddce4aae..a36e2387 100644 --- a/project/at_start_f437/examples/gpio/swjtag_mux/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/gpio/swjtag_mux/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/gpio/swjtag_mux/src/main.c b/project/at_start_f437/examples/gpio/swjtag_mux/src/main.c index 0541e1f8..1a861901 100644 --- a/project/at_start_f437/examples/gpio/swjtag_mux/src/main.c +++ b/project/at_start_f437/examples/gpio/swjtag_mux/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/i2c/communication_dma/inc/at32f435_437_clock.h b/project/at_start_f437/examples/i2c/communication_dma/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/i2c/communication_dma/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/i2c/communication_dma/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/i2c/communication_dma/inc/at32f435_437_conf.h b/project/at_start_f437/examples/i2c/communication_dma/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/i2c/communication_dma/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/i2c/communication_dma/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/i2c/communication_dma/inc/at32f435_437_int.h b/project/at_start_f437/examples/i2c/communication_dma/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/i2c/communication_dma/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/i2c/communication_dma/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/i2c/communication_dma/readme.txt b/project/at_start_f437/examples/i2c/communication_dma/readme.txt index 9c3d36cc..f767d1f3 100644 --- a/project/at_start_f437/examples/i2c/communication_dma/readme.txt +++ b/project/at_start_f437/examples/i2c/communication_dma/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file communicationdma/readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/i2c/communication_dma/src/at32f435_437_clock.c b/project/at_start_f437/examples/i2c/communication_dma/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/i2c/communication_dma/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/i2c/communication_dma/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/i2c/communication_dma/src/at32f435_437_int.c b/project/at_start_f437/examples/i2c/communication_dma/src/at32f435_437_int.c index de8b8789..0a5cc1cf 100644 --- a/project/at_start_f437/examples/i2c/communication_dma/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/i2c/communication_dma/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/i2c/communication_dma/src/main.c b/project/at_start_f437/examples/i2c/communication_dma/src/main.c index 574820e9..51800e96 100644 --- a/project/at_start_f437/examples/i2c/communication_dma/src/main.c +++ b/project/at_start_f437/examples/i2c/communication_dma/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer @@ -304,7 +304,7 @@ void i2c_lowlevel_init(i2c_handle_type* hi2c) dmamux_enable(I2Cx_DMA, TRUE); /* config i2c */ - i2c_init(hi2c->i2cx, 0, I2Cx_CLKCTRL); + i2c_init(hi2c->i2cx, 0x0F, I2Cx_CLKCTRL); i2c_own_address1_set(hi2c->i2cx, I2C_ADDRESS_MODE_7BIT, I2Cx_ADDRESS); } diff --git a/project/at_start_f437/examples/i2c/communication_int/inc/at32f435_437_clock.h b/project/at_start_f437/examples/i2c/communication_int/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/i2c/communication_int/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/i2c/communication_int/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/i2c/communication_int/inc/at32f435_437_conf.h b/project/at_start_f437/examples/i2c/communication_int/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/i2c/communication_int/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/i2c/communication_int/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/i2c/communication_int/inc/at32f435_437_int.h b/project/at_start_f437/examples/i2c/communication_int/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/i2c/communication_int/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/i2c/communication_int/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/i2c/communication_int/readme.txt b/project/at_start_f437/examples/i2c/communication_int/readme.txt index 4dd6de59..73633281 100644 --- a/project/at_start_f437/examples/i2c/communication_int/readme.txt +++ b/project/at_start_f437/examples/i2c/communication_int/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file communicationint/readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/i2c/communication_int/src/at32f435_437_clock.c b/project/at_start_f437/examples/i2c/communication_int/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/i2c/communication_int/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/i2c/communication_int/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/i2c/communication_int/src/at32f435_437_int.c b/project/at_start_f437/examples/i2c/communication_int/src/at32f435_437_int.c index 9399d645..822351a9 100644 --- a/project/at_start_f437/examples/i2c/communication_int/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/i2c/communication_int/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/i2c/communication_int/src/main.c b/project/at_start_f437/examples/i2c/communication_int/src/main.c index 0b8489d7..feec35b0 100644 --- a/project/at_start_f437/examples/i2c/communication_int/src/main.c +++ b/project/at_start_f437/examples/i2c/communication_int/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer @@ -257,7 +257,7 @@ void i2c_lowlevel_init(i2c_handle_type* hi2c) nvic_irq_enable(I2Cx_ERR_IRQn, 0, 0); /* config i2c */ - i2c_init(hi2c->i2cx, 0, I2Cx_CLKCTRL); + i2c_init(hi2c->i2cx, 0x0F, I2Cx_CLKCTRL); i2c_own_address1_set(hi2c->i2cx, I2C_ADDRESS_MODE_7BIT, I2Cx_ADDRESS); } diff --git a/project/at_start_f437/examples/i2c/communication_poll/inc/at32f435_437_clock.h b/project/at_start_f437/examples/i2c/communication_poll/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/i2c/communication_poll/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/i2c/communication_poll/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/i2c/communication_poll/inc/at32f435_437_conf.h b/project/at_start_f437/examples/i2c/communication_poll/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/i2c/communication_poll/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/i2c/communication_poll/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/i2c/communication_poll/inc/at32f435_437_int.h b/project/at_start_f437/examples/i2c/communication_poll/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/i2c/communication_poll/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/i2c/communication_poll/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/i2c/communication_poll/readme.txt b/project/at_start_f437/examples/i2c/communication_poll/readme.txt index 8b62f14f..c67d7d50 100644 --- a/project/at_start_f437/examples/i2c/communication_poll/readme.txt +++ b/project/at_start_f437/examples/i2c/communication_poll/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file communication_poll/readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/i2c/communication_poll/src/at32f435_437_clock.c b/project/at_start_f437/examples/i2c/communication_poll/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/i2c/communication_poll/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/i2c/communication_poll/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/i2c/communication_poll/src/at32f435_437_int.c b/project/at_start_f437/examples/i2c/communication_poll/src/at32f435_437_int.c index 9f60d121..d33b9c96 100644 --- a/project/at_start_f437/examples/i2c/communication_poll/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/i2c/communication_poll/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/i2c/communication_poll/src/main.c b/project/at_start_f437/examples/i2c/communication_poll/src/main.c index da78a991..27425e1f 100644 --- a/project/at_start_f437/examples/i2c/communication_poll/src/main.c +++ b/project/at_start_f437/examples/i2c/communication_poll/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer @@ -227,7 +227,7 @@ void i2c_lowlevel_init(i2c_handle_type* hi2c) gpio_init(I2Cx_SDA_GPIO_PORT, &gpio_init_structure); /* config i2c */ - i2c_init(hi2c->i2cx, 0, I2Cx_CLKCTRL); + i2c_init(hi2c->i2cx, 0x0F, I2Cx_CLKCTRL); i2c_own_address1_set(hi2c->i2cx, I2C_ADDRESS_MODE_7BIT, I2Cx_ADDRESS); } diff --git a/project/at_start_f437/examples/i2c/communication_smbus/inc/at32f435_437_clock.h b/project/at_start_f437/examples/i2c/communication_smbus/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/i2c/communication_smbus/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/i2c/communication_smbus/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/i2c/communication_smbus/inc/at32f435_437_conf.h b/project/at_start_f437/examples/i2c/communication_smbus/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/i2c/communication_smbus/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/i2c/communication_smbus/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/i2c/communication_smbus/inc/at32f435_437_int.h b/project/at_start_f437/examples/i2c/communication_smbus/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/i2c/communication_smbus/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/i2c/communication_smbus/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/i2c/communication_smbus/readme.txt b/project/at_start_f437/examples/i2c/communication_smbus/readme.txt index 1445d92a..b2b7c53c 100644 --- a/project/at_start_f437/examples/i2c/communication_smbus/readme.txt +++ b/project/at_start_f437/examples/i2c/communication_smbus/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file communication_poll/readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/i2c/communication_smbus/src/at32f435_437_clock.c b/project/at_start_f437/examples/i2c/communication_smbus/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/i2c/communication_smbus/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/i2c/communication_smbus/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/i2c/communication_smbus/src/at32f435_437_int.c b/project/at_start_f437/examples/i2c/communication_smbus/src/at32f435_437_int.c index 259ffd2b..e4699fa7 100644 --- a/project/at_start_f437/examples/i2c/communication_smbus/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/i2c/communication_smbus/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/i2c/communication_smbus/src/main.c b/project/at_start_f437/examples/i2c/communication_smbus/src/main.c index f6e7cb2c..c4497ec4 100644 --- a/project/at_start_f437/examples/i2c/communication_smbus/src/main.c +++ b/project/at_start_f437/examples/i2c/communication_smbus/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer @@ -227,7 +227,7 @@ void i2c_lowlevel_init(i2c_handle_type* hi2c) gpio_init(I2Cx_SDA_GPIO_PORT, &gpio_init_structure); /* config i2c */ - i2c_init(hi2c->i2cx, 0, I2Cx_CLKCTRL); + i2c_init(hi2c->i2cx, 0x0F, I2Cx_CLKCTRL); i2c_own_address1_set(hi2c->i2cx, I2C_ADDRESS_MODE_7BIT, I2Cx_ADDRESS); } diff --git a/project/at_start_f437/examples/i2c/eeprom/inc/at32f435_437_clock.h b/project/at_start_f437/examples/i2c/eeprom/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/i2c/eeprom/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/i2c/eeprom/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/i2c/eeprom/inc/at32f435_437_conf.h b/project/at_start_f437/examples/i2c/eeprom/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/i2c/eeprom/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/i2c/eeprom/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/i2c/eeprom/inc/at32f435_437_int.h b/project/at_start_f437/examples/i2c/eeprom/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/i2c/eeprom/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/i2c/eeprom/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/i2c/eeprom/readme.txt b/project/at_start_f437/examples/i2c/eeprom/readme.txt index 766fe522..cab92113 100644 --- a/project/at_start_f437/examples/i2c/eeprom/readme.txt +++ b/project/at_start_f437/examples/i2c/eeprom/readme.txt @@ -1,13 +1,13 @@ /** ************************************************************************** * @file eeprom/readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ - this demo is based on the at-start board, in this demo, use hardware i2c1 + this demo is based on the at-start board and AT32-Comm-EV, in this demo, use hardware i2c1 write or read data based on the memory device. if the communication is successful, led3 will turn on, if the communication fails, led2 will keep flashing. @@ -16,7 +16,7 @@ 2. press the slave button first, then press the master button to start communication. pin used: - 1. scl --- pb6 - 2. sda --- pb7 + 1. scl --- pb10 + 2. sda --- pb11 for more detailed information. please refer to the application note document AN0091. \ No newline at end of file diff --git a/project/at_start_f437/examples/i2c/eeprom/src/at32f435_437_clock.c b/project/at_start_f437/examples/i2c/eeprom/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/i2c/eeprom/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/i2c/eeprom/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/i2c/eeprom/src/at32f435_437_int.c b/project/at_start_f437/examples/i2c/eeprom/src/at32f435_437_int.c index 1293729d..b0fe9b4d 100644 --- a/project/at_start_f437/examples/i2c/eeprom/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/i2c/eeprom/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer @@ -40,8 +40,8 @@ extern i2c_handle_type hi2cx; #define I2Cx_DMA_TX_IRQHandler DMA1_Channel1_IRQHandler #define I2Cx_DMA_RX_IRQHandler DMA1_Channel2_IRQHandler -#define I2Cx_EVT_IRQHandler I2C1_EVT_IRQHandler -#define I2Cx_ERR_IRQHandler I2C1_ERR_IRQHandler +#define I2Cx_EVT_IRQHandler I2C2_EVT_IRQHandler +#define I2Cx_ERR_IRQHandler I2C2_ERR_IRQHandler /** * @brief this function handles nmi exception. diff --git a/project/at_start_f437/examples/i2c/eeprom/src/main.c b/project/at_start_f437/examples/i2c/eeprom/src/main.c index df28a3cd..0c421f89 100644 --- a/project/at_start_f437/examples/i2c/eeprom/src/main.c +++ b/project/at_start_f437/examples/i2c/eeprom/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer @@ -45,35 +45,35 @@ #define I2Cx_ADDRESS 0xA0 -#define I2Cx_PORT I2C1 -#define I2Cx_CLK CRM_I2C1_PERIPH_CLOCK +#define I2Cx_PORT I2C2 +#define I2Cx_CLK CRM_I2C2_PERIPH_CLOCK #define I2Cx_DMA DMA1 #define I2Cx_DMA_CLK CRM_DMA1_PERIPH_CLOCK #define I2Cx_SCL_GPIO_CLK CRM_GPIOB_PERIPH_CLOCK -#define I2Cx_SCL_GPIO_PIN GPIO_PINS_6 -#define I2Cx_SCL_GPIO_PinsSource GPIO_PINS_SOURCE6 +#define I2Cx_SCL_GPIO_PIN GPIO_PINS_10 +#define I2Cx_SCL_GPIO_PinsSource GPIO_PINS_SOURCE10 #define I2Cx_SCL_GPIO_PORT GPIOB #define I2Cx_SCL_GPIO_MUX GPIO_MUX_4 #define I2Cx_SDA_GPIO_CLK CRM_GPIOB_PERIPH_CLOCK -#define I2Cx_SDA_GPIO_PIN GPIO_PINS_7 -#define I2Cx_SDA_GPIO_PinsSource GPIO_PINS_SOURCE7 +#define I2Cx_SDA_GPIO_PIN GPIO_PINS_11 +#define I2Cx_SDA_GPIO_PinsSource GPIO_PINS_SOURCE11 #define I2Cx_SDA_GPIO_PORT GPIOB #define I2Cx_SDA_GPIO_MUX GPIO_MUX_4 #define I2Cx_DMA_TX_Channel DMA1_CHANNEL1 #define I2Cx_DMA_TX_DMAMUX_Channel DMA1MUX_CHANNEL1 -#define I2Cx_DMA_TX_DMAREQ DMAMUX_DMAREQ_ID_I2C1_TX +#define I2Cx_DMA_TX_DMAREQ DMAMUX_DMAREQ_ID_I2C2_TX #define I2Cx_DMA_TX_IRQn DMA1_Channel1_IRQn #define I2Cx_DMA_RX_Channel DMA1_CHANNEL2 #define I2Cx_DMA_RX_DMAMUX_Channel DMA1MUX_CHANNEL2 -#define I2Cx_DMA_RX_DMAREQ DMAMUX_DMAREQ_ID_I2C1_RX +#define I2Cx_DMA_RX_DMAREQ DMAMUX_DMAREQ_ID_I2C2_RX #define I2Cx_DMA_RX_IRQn DMA1_Channel2_IRQn -#define I2Cx_EVT_IRQn I2C1_EVT_IRQn -#define I2Cx_ERR_IRQn I2C1_ERR_IRQn +#define I2Cx_EVT_IRQn I2C2_EVT_IRQn +#define I2Cx_ERR_IRQn I2C2_ERR_IRQn #define BUF_SIZE 8 @@ -305,7 +305,7 @@ void i2c_lowlevel_init(i2c_handle_type* hi2c) dmamux_enable(I2Cx_DMA, TRUE); /* config i2c */ - i2c_init(hi2c->i2cx, 0, I2Cx_CLKCTRL); + i2c_init(hi2c->i2cx, 0x0F, I2Cx_CLKCTRL); i2c_own_address1_set(hi2c->i2cx, I2C_ADDRESS_MODE_7BIT, I2Cx_ADDRESS); } diff --git a/project/at_start_f437/examples/i2s/fullduplex_dma/inc/at32f435_437_clock.h b/project/at_start_f437/examples/i2s/fullduplex_dma/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/i2s/fullduplex_dma/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/i2s/fullduplex_dma/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/i2s/fullduplex_dma/inc/at32f435_437_conf.h b/project/at_start_f437/examples/i2s/fullduplex_dma/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/i2s/fullduplex_dma/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/i2s/fullduplex_dma/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/i2s/fullduplex_dma/inc/at32f435_437_int.h b/project/at_start_f437/examples/i2s/fullduplex_dma/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/i2s/fullduplex_dma/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/i2s/fullduplex_dma/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/i2s/fullduplex_dma/readme.txt b/project/at_start_f437/examples/i2s/fullduplex_dma/readme.txt index 6068ad37..edf8076b 100644 --- a/project/at_start_f437/examples/i2s/fullduplex_dma/readme.txt +++ b/project/at_start_f437/examples/i2s/fullduplex_dma/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/i2s/fullduplex_dma/src/at32f435_437_clock.c b/project/at_start_f437/examples/i2s/fullduplex_dma/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/i2s/fullduplex_dma/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/i2s/fullduplex_dma/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/i2s/fullduplex_dma/src/at32f435_437_int.c b/project/at_start_f437/examples/i2s/fullduplex_dma/src/at32f435_437_int.c index 774fefdc..ed283473 100644 --- a/project/at_start_f437/examples/i2s/fullduplex_dma/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/i2s/fullduplex_dma/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/i2s/fullduplex_dma/src/main.c b/project/at_start_f437/examples/i2s/fullduplex_dma/src/main.c index 3418ec63..b4469a01 100644 --- a/project/at_start_f437/examples/i2s/fullduplex_dma/src/main.c +++ b/project/at_start_f437/examples/i2s/fullduplex_dma/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/i2s/halfduplex_dma/inc/at32f435_437_clock.h b/project/at_start_f437/examples/i2s/halfduplex_dma/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/i2s/halfduplex_dma/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/i2s/halfduplex_dma/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/i2s/halfduplex_dma/inc/at32f435_437_conf.h b/project/at_start_f437/examples/i2s/halfduplex_dma/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/i2s/halfduplex_dma/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/i2s/halfduplex_dma/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/i2s/halfduplex_dma/inc/at32f435_437_int.h b/project/at_start_f437/examples/i2s/halfduplex_dma/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/i2s/halfduplex_dma/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/i2s/halfduplex_dma/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/i2s/halfduplex_dma/readme.txt b/project/at_start_f437/examples/i2s/halfduplex_dma/readme.txt index 92905cd9..73e52416 100644 --- a/project/at_start_f437/examples/i2s/halfduplex_dma/readme.txt +++ b/project/at_start_f437/examples/i2s/halfduplex_dma/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/i2s/halfduplex_dma/src/at32f435_437_clock.c b/project/at_start_f437/examples/i2s/halfduplex_dma/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/i2s/halfduplex_dma/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/i2s/halfduplex_dma/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/i2s/halfduplex_dma/src/at32f435_437_int.c b/project/at_start_f437/examples/i2s/halfduplex_dma/src/at32f435_437_int.c index eed2216f..61689eba 100644 --- a/project/at_start_f437/examples/i2s/halfduplex_dma/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/i2s/halfduplex_dma/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/i2s/halfduplex_dma/src/main.c b/project/at_start_f437/examples/i2s/halfduplex_dma/src/main.c index 31f546f7..207766f6 100644 --- a/project/at_start_f437/examples/i2s/halfduplex_dma/src/main.c +++ b/project/at_start_f437/examples/i2s/halfduplex_dma/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/i2s/halfduplex_interrupt/inc/at32f435_437_clock.h b/project/at_start_f437/examples/i2s/halfduplex_interrupt/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/i2s/halfduplex_interrupt/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/i2s/halfduplex_interrupt/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/i2s/halfduplex_interrupt/inc/at32f435_437_conf.h b/project/at_start_f437/examples/i2s/halfduplex_interrupt/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/i2s/halfduplex_interrupt/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/i2s/halfduplex_interrupt/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/i2s/halfduplex_interrupt/inc/at32f435_437_int.h b/project/at_start_f437/examples/i2s/halfduplex_interrupt/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/i2s/halfduplex_interrupt/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/i2s/halfduplex_interrupt/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/i2s/halfduplex_interrupt/readme.txt b/project/at_start_f437/examples/i2s/halfduplex_interrupt/readme.txt index 27316579..05a53266 100644 --- a/project/at_start_f437/examples/i2s/halfduplex_interrupt/readme.txt +++ b/project/at_start_f437/examples/i2s/halfduplex_interrupt/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/i2s/halfduplex_interrupt/src/at32f435_437_clock.c b/project/at_start_f437/examples/i2s/halfduplex_interrupt/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/i2s/halfduplex_interrupt/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/i2s/halfduplex_interrupt/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/i2s/halfduplex_interrupt/src/at32f435_437_int.c b/project/at_start_f437/examples/i2s/halfduplex_interrupt/src/at32f435_437_int.c index adb3325a..2e178793 100644 --- a/project/at_start_f437/examples/i2s/halfduplex_interrupt/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/i2s/halfduplex_interrupt/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/i2s/halfduplex_interrupt/src/main.c b/project/at_start_f437/examples/i2s/halfduplex_interrupt/src/main.c index 61af2d58..1a9f149c 100644 --- a/project/at_start_f437/examples/i2s/halfduplex_interrupt/src/main.c +++ b/project/at_start_f437/examples/i2s/halfduplex_interrupt/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/i2s/spii2s_switch_halfduplex_polling/inc/at32f435_437_clock.h b/project/at_start_f437/examples/i2s/spii2s_switch_halfduplex_polling/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/i2s/spii2s_switch_halfduplex_polling/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/i2s/spii2s_switch_halfduplex_polling/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/i2s/spii2s_switch_halfduplex_polling/inc/at32f435_437_conf.h b/project/at_start_f437/examples/i2s/spii2s_switch_halfduplex_polling/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/i2s/spii2s_switch_halfduplex_polling/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/i2s/spii2s_switch_halfduplex_polling/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/i2s/spii2s_switch_halfduplex_polling/inc/at32f435_437_int.h b/project/at_start_f437/examples/i2s/spii2s_switch_halfduplex_polling/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/i2s/spii2s_switch_halfduplex_polling/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/i2s/spii2s_switch_halfduplex_polling/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/i2s/spii2s_switch_halfduplex_polling/readme.txt b/project/at_start_f437/examples/i2s/spii2s_switch_halfduplex_polling/readme.txt index 056313ba..de7ed48b 100644 --- a/project/at_start_f437/examples/i2s/spii2s_switch_halfduplex_polling/readme.txt +++ b/project/at_start_f437/examples/i2s/spii2s_switch_halfduplex_polling/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/i2s/spii2s_switch_halfduplex_polling/src/at32f435_437_clock.c b/project/at_start_f437/examples/i2s/spii2s_switch_halfduplex_polling/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/i2s/spii2s_switch_halfduplex_polling/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/i2s/spii2s_switch_halfduplex_polling/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/i2s/spii2s_switch_halfduplex_polling/src/at32f435_437_int.c b/project/at_start_f437/examples/i2s/spii2s_switch_halfduplex_polling/src/at32f435_437_int.c index 578a4471..bbd28a2d 100644 --- a/project/at_start_f437/examples/i2s/spii2s_switch_halfduplex_polling/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/i2s/spii2s_switch_halfduplex_polling/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/i2s/spii2s_switch_halfduplex_polling/src/main.c b/project/at_start_f437/examples/i2s/spii2s_switch_halfduplex_polling/src/main.c index 0df85132..79ad0248 100644 --- a/project/at_start_f437/examples/i2s/spii2s_switch_halfduplex_polling/src/main.c +++ b/project/at_start_f437/examples/i2s/spii2s_switch_halfduplex_polling/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/irtmr/irtmr_output/inc/at32f435_437_clock.h b/project/at_start_f437/examples/irtmr/irtmr_output/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/irtmr/irtmr_output/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/irtmr/irtmr_output/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/irtmr/irtmr_output/inc/at32f435_437_conf.h b/project/at_start_f437/examples/irtmr/irtmr_output/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/irtmr/irtmr_output/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/irtmr/irtmr_output/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/irtmr/irtmr_output/inc/at32f435_437_int.h b/project/at_start_f437/examples/irtmr/irtmr_output/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/irtmr/irtmr_output/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/irtmr/irtmr_output/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/irtmr/irtmr_output/readme.txt b/project/at_start_f437/examples/irtmr/irtmr_output/readme.txt index 9acb47c6..0d42ba93 100644 --- a/project/at_start_f437/examples/irtmr/irtmr_output/readme.txt +++ b/project/at_start_f437/examples/irtmr/irtmr_output/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/irtmr/irtmr_output/src/at32f435_437_clock.c b/project/at_start_f437/examples/irtmr/irtmr_output/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/irtmr/irtmr_output/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/irtmr/irtmr_output/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/irtmr/irtmr_output/src/at32f435_437_int.c b/project/at_start_f437/examples/irtmr/irtmr_output/src/at32f435_437_int.c index ab5d99b5..33487ed4 100644 --- a/project/at_start_f437/examples/irtmr/irtmr_output/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/irtmr/irtmr_output/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/irtmr/irtmr_output/src/main.c b/project/at_start_f437/examples/irtmr/irtmr_output/src/main.c index 5c15b204..ce8204a4 100644 --- a/project/at_start_f437/examples/irtmr/irtmr_output/src/main.c +++ b/project/at_start_f437/examples/irtmr/irtmr_output/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/pwc/deepsleep_ertc_alarm/inc/at32f435_437_clock.h b/project/at_start_f437/examples/pwc/deepsleep_ertc_alarm/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/pwc/deepsleep_ertc_alarm/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/pwc/deepsleep_ertc_alarm/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/pwc/deepsleep_ertc_alarm/inc/at32f435_437_conf.h b/project/at_start_f437/examples/pwc/deepsleep_ertc_alarm/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/pwc/deepsleep_ertc_alarm/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/pwc/deepsleep_ertc_alarm/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/pwc/deepsleep_ertc_alarm/inc/at32f435_437_int.h b/project/at_start_f437/examples/pwc/deepsleep_ertc_alarm/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/pwc/deepsleep_ertc_alarm/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/pwc/deepsleep_ertc_alarm/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/pwc/deepsleep_ertc_alarm/readme.txt b/project/at_start_f437/examples/pwc/deepsleep_ertc_alarm/readme.txt index fd6066f5..f89bac1f 100644 --- a/project/at_start_f437/examples/pwc/deepsleep_ertc_alarm/readme.txt +++ b/project/at_start_f437/examples/pwc/deepsleep_ertc_alarm/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/pwc/deepsleep_ertc_alarm/src/at32f435_437_clock.c b/project/at_start_f437/examples/pwc/deepsleep_ertc_alarm/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/pwc/deepsleep_ertc_alarm/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/pwc/deepsleep_ertc_alarm/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/pwc/deepsleep_ertc_alarm/src/at32f435_437_int.c b/project/at_start_f437/examples/pwc/deepsleep_ertc_alarm/src/at32f435_437_int.c index b40de83c..e5655441 100644 --- a/project/at_start_f437/examples/pwc/deepsleep_ertc_alarm/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/pwc/deepsleep_ertc_alarm/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/pwc/deepsleep_ertc_alarm/src/main.c b/project/at_start_f437/examples/pwc/deepsleep_ertc_alarm/src/main.c index 7a93c459..38d5261c 100644 --- a/project/at_start_f437/examples/pwc/deepsleep_ertc_alarm/src/main.c +++ b/project/at_start_f437/examples/pwc/deepsleep_ertc_alarm/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/pwc/deepsleep_ertc_tamper/inc/at32f435_437_clock.h b/project/at_start_f437/examples/pwc/deepsleep_ertc_tamper/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/pwc/deepsleep_ertc_tamper/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/pwc/deepsleep_ertc_tamper/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/pwc/deepsleep_ertc_tamper/inc/at32f435_437_conf.h b/project/at_start_f437/examples/pwc/deepsleep_ertc_tamper/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/pwc/deepsleep_ertc_tamper/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/pwc/deepsleep_ertc_tamper/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/pwc/deepsleep_ertc_tamper/inc/at32f435_437_int.h b/project/at_start_f437/examples/pwc/deepsleep_ertc_tamper/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/pwc/deepsleep_ertc_tamper/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/pwc/deepsleep_ertc_tamper/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/pwc/deepsleep_ertc_tamper/readme.txt b/project/at_start_f437/examples/pwc/deepsleep_ertc_tamper/readme.txt index b830fcd1..338a2f8c 100644 --- a/project/at_start_f437/examples/pwc/deepsleep_ertc_tamper/readme.txt +++ b/project/at_start_f437/examples/pwc/deepsleep_ertc_tamper/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/pwc/deepsleep_ertc_tamper/src/at32f435_437_clock.c b/project/at_start_f437/examples/pwc/deepsleep_ertc_tamper/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/pwc/deepsleep_ertc_tamper/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/pwc/deepsleep_ertc_tamper/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/pwc/deepsleep_ertc_tamper/src/at32f435_437_int.c b/project/at_start_f437/examples/pwc/deepsleep_ertc_tamper/src/at32f435_437_int.c index 64348b8a..476ca049 100644 --- a/project/at_start_f437/examples/pwc/deepsleep_ertc_tamper/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/pwc/deepsleep_ertc_tamper/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/pwc/deepsleep_ertc_tamper/src/main.c b/project/at_start_f437/examples/pwc/deepsleep_ertc_tamper/src/main.c index cce81c22..01489695 100644 --- a/project/at_start_f437/examples/pwc/deepsleep_ertc_tamper/src/main.c +++ b/project/at_start_f437/examples/pwc/deepsleep_ertc_tamper/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/pwc/deepsleep_ertc_wakeup/inc/at32f435_437_clock.h b/project/at_start_f437/examples/pwc/deepsleep_ertc_wakeup/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/pwc/deepsleep_ertc_wakeup/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/pwc/deepsleep_ertc_wakeup/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/pwc/deepsleep_ertc_wakeup/inc/at32f435_437_conf.h b/project/at_start_f437/examples/pwc/deepsleep_ertc_wakeup/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/pwc/deepsleep_ertc_wakeup/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/pwc/deepsleep_ertc_wakeup/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/pwc/deepsleep_ertc_wakeup/inc/at32f435_437_int.h b/project/at_start_f437/examples/pwc/deepsleep_ertc_wakeup/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/pwc/deepsleep_ertc_wakeup/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/pwc/deepsleep_ertc_wakeup/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/pwc/deepsleep_ertc_wakeup/readme.txt b/project/at_start_f437/examples/pwc/deepsleep_ertc_wakeup/readme.txt index 18cfab64..16346ced 100644 --- a/project/at_start_f437/examples/pwc/deepsleep_ertc_wakeup/readme.txt +++ b/project/at_start_f437/examples/pwc/deepsleep_ertc_wakeup/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/pwc/deepsleep_ertc_wakeup/src/at32f435_437_clock.c b/project/at_start_f437/examples/pwc/deepsleep_ertc_wakeup/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/pwc/deepsleep_ertc_wakeup/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/pwc/deepsleep_ertc_wakeup/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/pwc/deepsleep_ertc_wakeup/src/at32f435_437_int.c b/project/at_start_f437/examples/pwc/deepsleep_ertc_wakeup/src/at32f435_437_int.c index 1b7d24d1..7b3406e8 100644 --- a/project/at_start_f437/examples/pwc/deepsleep_ertc_wakeup/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/pwc/deepsleep_ertc_wakeup/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/pwc/deepsleep_ertc_wakeup/src/main.c b/project/at_start_f437/examples/pwc/deepsleep_ertc_wakeup/src/main.c index f17c9e0c..9762b5fd 100644 --- a/project/at_start_f437/examples/pwc/deepsleep_ertc_wakeup/src/main.c +++ b/project/at_start_f437/examples/pwc/deepsleep_ertc_wakeup/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer @@ -101,7 +101,7 @@ void ertc_wakeup_timer_config(void) exint_init(&exint_init_struct); /* set wakeup timer clock 1hz */ - ertc_wakeup_clock_set(ERTC_WAT_CLK_CK_A_16BITS); + ertc_wakeup_clock_set(ERTC_WAT_CLK_CK_B_16BITS); /* set the wakeup time to 5s */ ertc_wakeup_counter_set(5 - 1); diff --git a/project/at_start_f437/examples/pwc/ldo_set/inc/at32f435_437_clock.h b/project/at_start_f437/examples/pwc/ldo_set/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/pwc/ldo_set/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/pwc/ldo_set/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/pwc/ldo_set/inc/at32f435_437_conf.h b/project/at_start_f437/examples/pwc/ldo_set/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/pwc/ldo_set/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/pwc/ldo_set/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/pwc/ldo_set/inc/at32f435_437_int.h b/project/at_start_f437/examples/pwc/ldo_set/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/pwc/ldo_set/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/pwc/ldo_set/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/pwc/ldo_set/readme.txt b/project/at_start_f437/examples/pwc/ldo_set/readme.txt index bfb917f5..56dd1faf 100644 --- a/project/at_start_f437/examples/pwc/ldo_set/readme.txt +++ b/project/at_start_f437/examples/pwc/ldo_set/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/pwc/ldo_set/src/at32f435_437_clock.c b/project/at_start_f437/examples/pwc/ldo_set/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/pwc/ldo_set/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/pwc/ldo_set/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/pwc/ldo_set/src/at32f435_437_int.c b/project/at_start_f437/examples/pwc/ldo_set/src/at32f435_437_int.c index 5546b201..b3161fd9 100644 --- a/project/at_start_f437/examples/pwc/ldo_set/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/pwc/ldo_set/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/pwc/ldo_set/src/main.c b/project/at_start_f437/examples/pwc/ldo_set/src/main.c index e49a766c..7cf9cefd 100644 --- a/project/at_start_f437/examples/pwc/ldo_set/src/main.c +++ b/project/at_start_f437/examples/pwc/ldo_set/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/pwc/power_voltage_monitor/inc/at32f435_437_clock.h b/project/at_start_f437/examples/pwc/power_voltage_monitor/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/pwc/power_voltage_monitor/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/pwc/power_voltage_monitor/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/pwc/power_voltage_monitor/inc/at32f435_437_conf.h b/project/at_start_f437/examples/pwc/power_voltage_monitor/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/pwc/power_voltage_monitor/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/pwc/power_voltage_monitor/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/pwc/power_voltage_monitor/inc/at32f435_437_int.h b/project/at_start_f437/examples/pwc/power_voltage_monitor/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/pwc/power_voltage_monitor/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/pwc/power_voltage_monitor/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/pwc/power_voltage_monitor/readme.txt b/project/at_start_f437/examples/pwc/power_voltage_monitor/readme.txt index dd229286..91430a4b 100644 --- a/project/at_start_f437/examples/pwc/power_voltage_monitor/readme.txt +++ b/project/at_start_f437/examples/pwc/power_voltage_monitor/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/pwc/power_voltage_monitor/src/at32f435_437_clock.c b/project/at_start_f437/examples/pwc/power_voltage_monitor/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/pwc/power_voltage_monitor/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/pwc/power_voltage_monitor/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/pwc/power_voltage_monitor/src/at32f435_437_int.c b/project/at_start_f437/examples/pwc/power_voltage_monitor/src/at32f435_437_int.c index 4ad0fed4..489cd604 100644 --- a/project/at_start_f437/examples/pwc/power_voltage_monitor/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/pwc/power_voltage_monitor/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/pwc/power_voltage_monitor/src/main.c b/project/at_start_f437/examples/pwc/power_voltage_monitor/src/main.c index d72856ad..b8271a95 100644 --- a/project/at_start_f437/examples/pwc/power_voltage_monitor/src/main.c +++ b/project/at_start_f437/examples/pwc/power_voltage_monitor/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/pwc/sleep_tmr2/inc/at32f435_437_clock.h b/project/at_start_f437/examples/pwc/sleep_tmr2/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/pwc/sleep_tmr2/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/pwc/sleep_tmr2/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/pwc/sleep_tmr2/inc/at32f435_437_conf.h b/project/at_start_f437/examples/pwc/sleep_tmr2/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/pwc/sleep_tmr2/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/pwc/sleep_tmr2/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/pwc/sleep_tmr2/inc/at32f435_437_int.h b/project/at_start_f437/examples/pwc/sleep_tmr2/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/pwc/sleep_tmr2/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/pwc/sleep_tmr2/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/pwc/sleep_tmr2/readme.txt b/project/at_start_f437/examples/pwc/sleep_tmr2/readme.txt index bd652ada..33dfba6c 100644 --- a/project/at_start_f437/examples/pwc/sleep_tmr2/readme.txt +++ b/project/at_start_f437/examples/pwc/sleep_tmr2/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/pwc/sleep_tmr2/src/at32f435_437_clock.c b/project/at_start_f437/examples/pwc/sleep_tmr2/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/pwc/sleep_tmr2/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/pwc/sleep_tmr2/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/pwc/sleep_tmr2/src/at32f435_437_int.c b/project/at_start_f437/examples/pwc/sleep_tmr2/src/at32f435_437_int.c index e9f31b7c..1330c8db 100644 --- a/project/at_start_f437/examples/pwc/sleep_tmr2/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/pwc/sleep_tmr2/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/pwc/sleep_tmr2/src/main.c b/project/at_start_f437/examples/pwc/sleep_tmr2/src/main.c index f6ce7f38..49ad6060 100644 --- a/project/at_start_f437/examples/pwc/sleep_tmr2/src/main.c +++ b/project/at_start_f437/examples/pwc/sleep_tmr2/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/pwc/sleep_usart1/inc/at32f435_437_clock.h b/project/at_start_f437/examples/pwc/sleep_usart1/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/pwc/sleep_usart1/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/pwc/sleep_usart1/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/pwc/sleep_usart1/inc/at32f435_437_conf.h b/project/at_start_f437/examples/pwc/sleep_usart1/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/pwc/sleep_usart1/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/pwc/sleep_usart1/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/pwc/sleep_usart1/inc/at32f435_437_int.h b/project/at_start_f437/examples/pwc/sleep_usart1/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/pwc/sleep_usart1/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/pwc/sleep_usart1/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/pwc/sleep_usart1/readme.txt b/project/at_start_f437/examples/pwc/sleep_usart1/readme.txt index 0b4d07a9..8d6a7dbc 100644 --- a/project/at_start_f437/examples/pwc/sleep_usart1/readme.txt +++ b/project/at_start_f437/examples/pwc/sleep_usart1/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/pwc/sleep_usart1/src/at32f435_437_clock.c b/project/at_start_f437/examples/pwc/sleep_usart1/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/pwc/sleep_usart1/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/pwc/sleep_usart1/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/pwc/sleep_usart1/src/at32f435_437_int.c b/project/at_start_f437/examples/pwc/sleep_usart1/src/at32f435_437_int.c index e4455169..23e02393 100644 --- a/project/at_start_f437/examples/pwc/sleep_usart1/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/pwc/sleep_usart1/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/pwc/sleep_usart1/src/main.c b/project/at_start_f437/examples/pwc/sleep_usart1/src/main.c index 35b35baa..764efc7d 100644 --- a/project/at_start_f437/examples/pwc/sleep_usart1/src/main.c +++ b/project/at_start_f437/examples/pwc/sleep_usart1/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/pwc/standby_ertc_alarm/inc/at32f435_437_clock.h b/project/at_start_f437/examples/pwc/standby_ertc_alarm/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/pwc/standby_ertc_alarm/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/pwc/standby_ertc_alarm/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/pwc/standby_ertc_alarm/inc/at32f435_437_conf.h b/project/at_start_f437/examples/pwc/standby_ertc_alarm/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/pwc/standby_ertc_alarm/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/pwc/standby_ertc_alarm/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/pwc/standby_ertc_alarm/inc/at32f435_437_int.h b/project/at_start_f437/examples/pwc/standby_ertc_alarm/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/pwc/standby_ertc_alarm/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/pwc/standby_ertc_alarm/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/pwc/standby_ertc_alarm/readme.txt b/project/at_start_f437/examples/pwc/standby_ertc_alarm/readme.txt index 87a532ef..752d1a76 100644 --- a/project/at_start_f437/examples/pwc/standby_ertc_alarm/readme.txt +++ b/project/at_start_f437/examples/pwc/standby_ertc_alarm/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/pwc/standby_ertc_alarm/src/at32f435_437_clock.c b/project/at_start_f437/examples/pwc/standby_ertc_alarm/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/pwc/standby_ertc_alarm/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/pwc/standby_ertc_alarm/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/pwc/standby_ertc_alarm/src/at32f435_437_int.c b/project/at_start_f437/examples/pwc/standby_ertc_alarm/src/at32f435_437_int.c index 50fa73fb..ed0f42cc 100644 --- a/project/at_start_f437/examples/pwc/standby_ertc_alarm/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/pwc/standby_ertc_alarm/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/pwc/standby_ertc_alarm/src/main.c b/project/at_start_f437/examples/pwc/standby_ertc_alarm/src/main.c index f919d68e..4e7e3249 100644 --- a/project/at_start_f437/examples/pwc/standby_ertc_alarm/src/main.c +++ b/project/at_start_f437/examples/pwc/standby_ertc_alarm/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/pwc/standby_wakeup_pin/inc/at32f435_437_clock.h b/project/at_start_f437/examples/pwc/standby_wakeup_pin/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/pwc/standby_wakeup_pin/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/pwc/standby_wakeup_pin/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/pwc/standby_wakeup_pin/inc/at32f435_437_conf.h b/project/at_start_f437/examples/pwc/standby_wakeup_pin/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/pwc/standby_wakeup_pin/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/pwc/standby_wakeup_pin/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/pwc/standby_wakeup_pin/inc/at32f435_437_int.h b/project/at_start_f437/examples/pwc/standby_wakeup_pin/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/pwc/standby_wakeup_pin/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/pwc/standby_wakeup_pin/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/pwc/standby_wakeup_pin/readme.txt b/project/at_start_f437/examples/pwc/standby_wakeup_pin/readme.txt index 3d3945f2..cb45a499 100644 --- a/project/at_start_f437/examples/pwc/standby_wakeup_pin/readme.txt +++ b/project/at_start_f437/examples/pwc/standby_wakeup_pin/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/pwc/standby_wakeup_pin/src/at32f435_437_clock.c b/project/at_start_f437/examples/pwc/standby_wakeup_pin/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/pwc/standby_wakeup_pin/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/pwc/standby_wakeup_pin/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/pwc/standby_wakeup_pin/src/at32f435_437_int.c b/project/at_start_f437/examples/pwc/standby_wakeup_pin/src/at32f435_437_int.c index 90a84d71..7dbe5f32 100644 --- a/project/at_start_f437/examples/pwc/standby_wakeup_pin/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/pwc/standby_wakeup_pin/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/pwc/standby_wakeup_pin/src/main.c b/project/at_start_f437/examples/pwc/standby_wakeup_pin/src/main.c index cdbadf15..b7bededa 100644 --- a/project/at_start_f437/examples/pwc/standby_wakeup_pin/src/main.c +++ b/project/at_start_f437/examples/pwc/standby_wakeup_pin/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/qspi/command_port_using_dma/inc/at32f435_437_clock.h b/project/at_start_f437/examples/qspi/command_port_using_dma/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/qspi/command_port_using_dma/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/qspi/command_port_using_dma/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/qspi/command_port_using_dma/inc/at32f435_437_conf.h b/project/at_start_f437/examples/qspi/command_port_using_dma/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/qspi/command_port_using_dma/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/qspi/command_port_using_dma/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/qspi/command_port_using_dma/inc/at32f435_437_int.h b/project/at_start_f437/examples/qspi/command_port_using_dma/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/qspi/command_port_using_dma/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/qspi/command_port_using_dma/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/qspi/command_port_using_dma/readme.txt b/project/at_start_f437/examples/qspi/command_port_using_dma/readme.txt index 33401e6e..018ddac6 100644 --- a/project/at_start_f437/examples/qspi/command_port_using_dma/readme.txt +++ b/project/at_start_f437/examples/qspi/command_port_using_dma/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/qspi/command_port_using_dma/src/at32f435_437_clock.c b/project/at_start_f437/examples/qspi/command_port_using_dma/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/qspi/command_port_using_dma/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/qspi/command_port_using_dma/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/qspi/command_port_using_dma/src/at32f435_437_int.c b/project/at_start_f437/examples/qspi/command_port_using_dma/src/at32f435_437_int.c index 5dbea411..70821844 100644 --- a/project/at_start_f437/examples/qspi/command_port_using_dma/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/qspi/command_port_using_dma/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/qspi/command_port_using_dma/src/main.c b/project/at_start_f437/examples/qspi/command_port_using_dma/src/main.c index 99c22e22..9475d9e1 100644 --- a/project/at_start_f437/examples/qspi/command_port_using_dma/src/main.c +++ b/project/at_start_f437/examples/qspi/command_port_using_dma/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/qspi/command_port_using_dma/src/qspi_cmd_esmt32m.c b/project/at_start_f437/examples/qspi/command_port_using_dma/src/qspi_cmd_esmt32m.c index dd5f1359..2773ba20 100644 --- a/project/at_start_f437/examples/qspi/command_port_using_dma/src/qspi_cmd_esmt32m.c +++ b/project/at_start_f437/examples/qspi/command_port_using_dma/src/qspi_cmd_esmt32m.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file qspi_cmd_esmt32m.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief qspi_cmd_esmt32m program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/qspi/command_port_using_dma_and_pem/inc/at32f435_437_clock.h b/project/at_start_f437/examples/qspi/command_port_using_dma_and_pem/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/qspi/command_port_using_dma_and_pem/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/qspi/command_port_using_dma_and_pem/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/qspi/command_port_using_dma_and_pem/inc/at32f435_437_conf.h b/project/at_start_f437/examples/qspi/command_port_using_dma_and_pem/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/qspi/command_port_using_dma_and_pem/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/qspi/command_port_using_dma_and_pem/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/qspi/command_port_using_dma_and_pem/inc/at32f435_437_int.h b/project/at_start_f437/examples/qspi/command_port_using_dma_and_pem/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/qspi/command_port_using_dma_and_pem/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/qspi/command_port_using_dma_and_pem/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/qspi/command_port_using_dma_and_pem/readme.txt b/project/at_start_f437/examples/qspi/command_port_using_dma_and_pem/readme.txt index 3b8b610c..244b86d0 100644 --- a/project/at_start_f437/examples/qspi/command_port_using_dma_and_pem/readme.txt +++ b/project/at_start_f437/examples/qspi/command_port_using_dma_and_pem/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/qspi/command_port_using_dma_and_pem/src/at32f435_437_clock.c b/project/at_start_f437/examples/qspi/command_port_using_dma_and_pem/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/qspi/command_port_using_dma_and_pem/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/qspi/command_port_using_dma_and_pem/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/qspi/command_port_using_dma_and_pem/src/at32f435_437_int.c b/project/at_start_f437/examples/qspi/command_port_using_dma_and_pem/src/at32f435_437_int.c index ae7ff18d..3640735c 100644 --- a/project/at_start_f437/examples/qspi/command_port_using_dma_and_pem/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/qspi/command_port_using_dma_and_pem/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/qspi/command_port_using_dma_and_pem/src/main.c b/project/at_start_f437/examples/qspi/command_port_using_dma_and_pem/src/main.c index cb698f68..5a9ed05c 100644 --- a/project/at_start_f437/examples/qspi/command_port_using_dma_and_pem/src/main.c +++ b/project/at_start_f437/examples/qspi/command_port_using_dma_and_pem/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/qspi/command_port_using_dma_and_pem/src/qspi_cmd_esmt32m.c b/project/at_start_f437/examples/qspi/command_port_using_dma_and_pem/src/qspi_cmd_esmt32m.c index 341af3ce..0279e804 100644 --- a/project/at_start_f437/examples/qspi/command_port_using_dma_and_pem/src/qspi_cmd_esmt32m.c +++ b/project/at_start_f437/examples/qspi/command_port_using_dma_and_pem/src/qspi_cmd_esmt32m.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file qspi_cmd_esmt32m.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief qspi_cmd_esmt32m program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/qspi/command_port_using_dma_qpi_mode/inc/at32f435_437_clock.h b/project/at_start_f437/examples/qspi/command_port_using_dma_qpi_mode/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/qspi/command_port_using_dma_qpi_mode/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/qspi/command_port_using_dma_qpi_mode/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/qspi/command_port_using_dma_qpi_mode/inc/at32f435_437_conf.h b/project/at_start_f437/examples/qspi/command_port_using_dma_qpi_mode/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/qspi/command_port_using_dma_qpi_mode/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/qspi/command_port_using_dma_qpi_mode/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/qspi/command_port_using_dma_qpi_mode/inc/at32f435_437_int.h b/project/at_start_f437/examples/qspi/command_port_using_dma_qpi_mode/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/qspi/command_port_using_dma_qpi_mode/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/qspi/command_port_using_dma_qpi_mode/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/qspi/command_port_using_dma_qpi_mode/readme.txt b/project/at_start_f437/examples/qspi/command_port_using_dma_qpi_mode/readme.txt index 1c6234cd..f66e75ef 100644 --- a/project/at_start_f437/examples/qspi/command_port_using_dma_qpi_mode/readme.txt +++ b/project/at_start_f437/examples/qspi/command_port_using_dma_qpi_mode/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/qspi/command_port_using_dma_qpi_mode/src/at32f435_437_clock.c b/project/at_start_f437/examples/qspi/command_port_using_dma_qpi_mode/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/qspi/command_port_using_dma_qpi_mode/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/qspi/command_port_using_dma_qpi_mode/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/qspi/command_port_using_dma_qpi_mode/src/at32f435_437_int.c b/project/at_start_f437/examples/qspi/command_port_using_dma_qpi_mode/src/at32f435_437_int.c index a09315ce..2e3d9960 100644 --- a/project/at_start_f437/examples/qspi/command_port_using_dma_qpi_mode/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/qspi/command_port_using_dma_qpi_mode/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/qspi/command_port_using_dma_qpi_mode/src/main.c b/project/at_start_f437/examples/qspi/command_port_using_dma_qpi_mode/src/main.c index 6922ac93..2312fb0f 100644 --- a/project/at_start_f437/examples/qspi/command_port_using_dma_qpi_mode/src/main.c +++ b/project/at_start_f437/examples/qspi/command_port_using_dma_qpi_mode/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/qspi/command_port_using_dma_qpi_mode/src/qspi_cmd_esmt32m.c b/project/at_start_f437/examples/qspi/command_port_using_dma_qpi_mode/src/qspi_cmd_esmt32m.c index a4f511f1..ce424b57 100644 --- a/project/at_start_f437/examples/qspi/command_port_using_dma_qpi_mode/src/qspi_cmd_esmt32m.c +++ b/project/at_start_f437/examples/qspi/command_port_using_dma_qpi_mode/src/qspi_cmd_esmt32m.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file qspi_cmd_esmt32m.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief qspi_cmd_esmt32m program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/qspi/command_port_using_interrupt/inc/at32f435_437_clock.h b/project/at_start_f437/examples/qspi/command_port_using_interrupt/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/qspi/command_port_using_interrupt/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/qspi/command_port_using_interrupt/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/qspi/command_port_using_interrupt/inc/at32f435_437_conf.h b/project/at_start_f437/examples/qspi/command_port_using_interrupt/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/qspi/command_port_using_interrupt/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/qspi/command_port_using_interrupt/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/qspi/command_port_using_interrupt/inc/at32f435_437_int.h b/project/at_start_f437/examples/qspi/command_port_using_interrupt/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/qspi/command_port_using_interrupt/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/qspi/command_port_using_interrupt/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/qspi/command_port_using_interrupt/readme.txt b/project/at_start_f437/examples/qspi/command_port_using_interrupt/readme.txt index e6ca12d4..b6c3cda0 100644 --- a/project/at_start_f437/examples/qspi/command_port_using_interrupt/readme.txt +++ b/project/at_start_f437/examples/qspi/command_port_using_interrupt/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/qspi/command_port_using_interrupt/src/at32f435_437_clock.c b/project/at_start_f437/examples/qspi/command_port_using_interrupt/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/qspi/command_port_using_interrupt/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/qspi/command_port_using_interrupt/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/qspi/command_port_using_interrupt/src/at32f435_437_int.c b/project/at_start_f437/examples/qspi/command_port_using_interrupt/src/at32f435_437_int.c index e5404621..13499271 100644 --- a/project/at_start_f437/examples/qspi/command_port_using_interrupt/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/qspi/command_port_using_interrupt/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/qspi/command_port_using_interrupt/src/main.c b/project/at_start_f437/examples/qspi/command_port_using_interrupt/src/main.c index 8524579d..0a133694 100644 --- a/project/at_start_f437/examples/qspi/command_port_using_interrupt/src/main.c +++ b/project/at_start_f437/examples/qspi/command_port_using_interrupt/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/qspi/command_port_using_interrupt/src/qspi_cmd_esmt32m.c b/project/at_start_f437/examples/qspi/command_port_using_interrupt/src/qspi_cmd_esmt32m.c index 82dee281..09f97f30 100644 --- a/project/at_start_f437/examples/qspi/command_port_using_interrupt/src/qspi_cmd_esmt32m.c +++ b/project/at_start_f437/examples/qspi/command_port_using_interrupt/src/qspi_cmd_esmt32m.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file qspi_cmd_esmt32m.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief qspi_cmd_esmt32m program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/qspi/command_port_using_polling/inc/at32f435_437_clock.h b/project/at_start_f437/examples/qspi/command_port_using_polling/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/qspi/command_port_using_polling/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/qspi/command_port_using_polling/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/qspi/command_port_using_polling/inc/at32f435_437_conf.h b/project/at_start_f437/examples/qspi/command_port_using_polling/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/qspi/command_port_using_polling/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/qspi/command_port_using_polling/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/qspi/command_port_using_polling/inc/at32f435_437_int.h b/project/at_start_f437/examples/qspi/command_port_using_polling/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/qspi/command_port_using_polling/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/qspi/command_port_using_polling/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/qspi/command_port_using_polling/readme.txt b/project/at_start_f437/examples/qspi/command_port_using_polling/readme.txt index 1aa294ea..4a5fca46 100644 --- a/project/at_start_f437/examples/qspi/command_port_using_polling/readme.txt +++ b/project/at_start_f437/examples/qspi/command_port_using_polling/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/qspi/command_port_using_polling/src/at32f435_437_clock.c b/project/at_start_f437/examples/qspi/command_port_using_polling/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/qspi/command_port_using_polling/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/qspi/command_port_using_polling/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/qspi/command_port_using_polling/src/at32f435_437_int.c b/project/at_start_f437/examples/qspi/command_port_using_polling/src/at32f435_437_int.c index 8d3f7086..1731cd05 100644 --- a/project/at_start_f437/examples/qspi/command_port_using_polling/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/qspi/command_port_using_polling/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/qspi/command_port_using_polling/src/main.c b/project/at_start_f437/examples/qspi/command_port_using_polling/src/main.c index 945ed3dc..c1b36810 100644 --- a/project/at_start_f437/examples/qspi/command_port_using_polling/src/main.c +++ b/project/at_start_f437/examples/qspi/command_port_using_polling/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/qspi/command_port_using_polling/src/qspi_cmd_esmt32m.c b/project/at_start_f437/examples/qspi/command_port_using_polling/src/qspi_cmd_esmt32m.c index a753d98c..4bf5f989 100644 --- a/project/at_start_f437/examples/qspi/command_port_using_polling/src/qspi_cmd_esmt32m.c +++ b/project/at_start_f437/examples/qspi/command_port_using_polling/src/qspi_cmd_esmt32m.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file qspi_cmd_esmt32m.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief qspi_cmd_esmt32m program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/qspi/command_port_using_rdsr_sw/inc/at32f435_437_clock.h b/project/at_start_f437/examples/qspi/command_port_using_rdsr_sw/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/qspi/command_port_using_rdsr_sw/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/qspi/command_port_using_rdsr_sw/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/qspi/command_port_using_rdsr_sw/inc/at32f435_437_conf.h b/project/at_start_f437/examples/qspi/command_port_using_rdsr_sw/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/qspi/command_port_using_rdsr_sw/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/qspi/command_port_using_rdsr_sw/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/qspi/command_port_using_rdsr_sw/inc/at32f435_437_int.h b/project/at_start_f437/examples/qspi/command_port_using_rdsr_sw/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/qspi/command_port_using_rdsr_sw/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/qspi/command_port_using_rdsr_sw/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/qspi/command_port_using_rdsr_sw/readme.txt b/project/at_start_f437/examples/qspi/command_port_using_rdsr_sw/readme.txt index a1f6a0e7..624eb5f8 100644 --- a/project/at_start_f437/examples/qspi/command_port_using_rdsr_sw/readme.txt +++ b/project/at_start_f437/examples/qspi/command_port_using_rdsr_sw/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/qspi/command_port_using_rdsr_sw/src/at32f435_437_clock.c b/project/at_start_f437/examples/qspi/command_port_using_rdsr_sw/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/qspi/command_port_using_rdsr_sw/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/qspi/command_port_using_rdsr_sw/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/qspi/command_port_using_rdsr_sw/src/at32f435_437_int.c b/project/at_start_f437/examples/qspi/command_port_using_rdsr_sw/src/at32f435_437_int.c index 790ee1b4..5464e4ff 100644 --- a/project/at_start_f437/examples/qspi/command_port_using_rdsr_sw/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/qspi/command_port_using_rdsr_sw/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/qspi/command_port_using_rdsr_sw/src/main.c b/project/at_start_f437/examples/qspi/command_port_using_rdsr_sw/src/main.c index 71a77f5d..da2e5580 100644 --- a/project/at_start_f437/examples/qspi/command_port_using_rdsr_sw/src/main.c +++ b/project/at_start_f437/examples/qspi/command_port_using_rdsr_sw/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/qspi/command_port_using_rdsr_sw/src/qspi_cmd_esmt32m.c b/project/at_start_f437/examples/qspi/command_port_using_rdsr_sw/src/qspi_cmd_esmt32m.c index 29516a13..6cf3f4d5 100644 --- a/project/at_start_f437/examples/qspi/command_port_using_rdsr_sw/src/qspi_cmd_esmt32m.c +++ b/project/at_start_f437/examples/qspi/command_port_using_rdsr_sw/src/qspi_cmd_esmt32m.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file qspi_cmd_esmt32m.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief qspi_cmd_esmt32m program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/qspi/xip_port_write_read/inc/at32f435_437_clock.h b/project/at_start_f437/examples/qspi/xip_port_write_read/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/qspi/xip_port_write_read/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/qspi/xip_port_write_read/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/qspi/xip_port_write_read/inc/at32f435_437_conf.h b/project/at_start_f437/examples/qspi/xip_port_write_read/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/qspi/xip_port_write_read/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/qspi/xip_port_write_read/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/qspi/xip_port_write_read/inc/at32f435_437_int.h b/project/at_start_f437/examples/qspi/xip_port_write_read/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/qspi/xip_port_write_read/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/qspi/xip_port_write_read/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/qspi/xip_port_write_read/readme.txt b/project/at_start_f437/examples/qspi/xip_port_write_read/readme.txt index 5b2a6d42..842f4391 100644 --- a/project/at_start_f437/examples/qspi/xip_port_write_read/readme.txt +++ b/project/at_start_f437/examples/qspi/xip_port_write_read/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/qspi/xip_port_write_read/src/at32f435_437_clock.c b/project/at_start_f437/examples/qspi/xip_port_write_read/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/qspi/xip_port_write_read/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/qspi/xip_port_write_read/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/qspi/xip_port_write_read/src/at32f435_437_int.c b/project/at_start_f437/examples/qspi/xip_port_write_read/src/at32f435_437_int.c index d64f4c20..6365dd28 100644 --- a/project/at_start_f437/examples/qspi/xip_port_write_read/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/qspi/xip_port_write_read/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/qspi/xip_port_write_read/src/main.c b/project/at_start_f437/examples/qspi/xip_port_write_read/src/main.c index 734b9976..fc838bda 100644 --- a/project/at_start_f437/examples/qspi/xip_port_write_read/src/main.c +++ b/project/at_start_f437/examples/qspi/xip_port_write_read/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/qspi/xip_port_write_read/src/qspi_xip_ly68l6400.c b/project/at_start_f437/examples/qspi/xip_port_write_read/src/qspi_xip_ly68l6400.c index b88abb3b..b064a11b 100644 --- a/project/at_start_f437/examples/qspi/xip_port_write_read/src/qspi_xip_ly68l6400.c +++ b/project/at_start_f437/examples/qspi/xip_port_write_read/src/qspi_xip_ly68l6400.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file qspi_cmd_esmt32m.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief qspi_cmd_esmt32m program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/scfg/mem_map_sel/inc/at32f435_437_clock.h b/project/at_start_f437/examples/scfg/mem_map_sel/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/scfg/mem_map_sel/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/scfg/mem_map_sel/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/scfg/mem_map_sel/inc/at32f435_437_conf.h b/project/at_start_f437/examples/scfg/mem_map_sel/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/scfg/mem_map_sel/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/scfg/mem_map_sel/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/scfg/mem_map_sel/inc/at32f435_437_int.h b/project/at_start_f437/examples/scfg/mem_map_sel/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/scfg/mem_map_sel/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/scfg/mem_map_sel/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/scfg/mem_map_sel/readme.txt b/project/at_start_f437/examples/scfg/mem_map_sel/readme.txt index ee99e4a2..c5d6a582 100644 --- a/project/at_start_f437/examples/scfg/mem_map_sel/readme.txt +++ b/project/at_start_f437/examples/scfg/mem_map_sel/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/scfg/mem_map_sel/src/at32f435_437_clock.c b/project/at_start_f437/examples/scfg/mem_map_sel/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/scfg/mem_map_sel/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/scfg/mem_map_sel/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/scfg/mem_map_sel/src/at32f435_437_int.c b/project/at_start_f437/examples/scfg/mem_map_sel/src/at32f435_437_int.c index c52a2d23..95f6e834 100644 --- a/project/at_start_f437/examples/scfg/mem_map_sel/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/scfg/mem_map_sel/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/scfg/mem_map_sel/src/main.c b/project/at_start_f437/examples/scfg/mem_map_sel/src/main.c index 803e5bd3..cc6d21ca 100644 --- a/project/at_start_f437/examples/scfg/mem_map_sel/src/main.c +++ b/project/at_start_f437/examples/scfg/mem_map_sel/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/sdio/sd_mmc_card/inc/at32_sdio.h b/project/at_start_f437/examples/sdio/sd_mmc_card/inc/at32_sdio.h index 1aecf03e..ac892757 100644 --- a/project/at_start_f437/examples/sdio/sd_mmc_card/inc/at32_sdio.h +++ b/project/at_start_f437/examples/sdio/sd_mmc_card/inc/at32_sdio.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32_sdio.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief this file contains all the functions prototypes for the sd/mmc * card at32_sdio driver firmware library. ************************************************************************** diff --git a/project/at_start_f437/examples/sdio/sd_mmc_card/inc/at32f435_437_clock.h b/project/at_start_f437/examples/sdio/sd_mmc_card/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/sdio/sd_mmc_card/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/sdio/sd_mmc_card/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/sdio/sd_mmc_card/inc/at32f435_437_conf.h b/project/at_start_f437/examples/sdio/sd_mmc_card/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/sdio/sd_mmc_card/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/sdio/sd_mmc_card/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/sdio/sd_mmc_card/inc/at32f435_437_int.h b/project/at_start_f437/examples/sdio/sd_mmc_card/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/sdio/sd_mmc_card/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/sdio/sd_mmc_card/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/sdio/sd_mmc_card/readme.txt b/project/at_start_f437/examples/sdio/sd_mmc_card/readme.txt index 11aabcfd..396ea008 100644 --- a/project/at_start_f437/examples/sdio/sd_mmc_card/readme.txt +++ b/project/at_start_f437/examples/sdio/sd_mmc_card/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/sdio/sd_mmc_card/src/at32_sdio.c b/project/at_start_f437/examples/sdio/sd_mmc_card/src/at32_sdio.c index 65b091f1..23df0b63 100644 --- a/project/at_start_f437/examples/sdio/sd_mmc_card/src/at32_sdio.c +++ b/project/at_start_f437/examples/sdio/sd_mmc_card/src/at32_sdio.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32_sdio.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief this file provides a set of functions needed to manage the * sdio/mmc card memory. ************************************************************************** @@ -26,6 +26,7 @@ */ #include "at32_sdio.h" +#include "at32f435_437_board.h" /** @addtogroup AT32F437_periph_examples * @{ @@ -101,7 +102,7 @@ sd_error_status_type sd_init(void) gpio_pin_mux_config(GPIOC, GPIO_PINS_SOURCE12, GPIO_MUX_12); gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE2, GPIO_MUX_12); - retry = 10; + retry = 3; while(retry--){ /* reset sdio */ sdio_reset(SDIOx); @@ -230,7 +231,7 @@ sd_error_status_type sd_power_on(void) /* enable to output sdio_ck */ sdio_clock_enable(SDIOx, TRUE); - for(retry = 0; retry < 10; retry++) + for(retry = 0; retry < 5; retry++) { /* send cmd0, get in idle stage */ sdio_command_init_struct.argument = 0x0; @@ -288,6 +289,8 @@ sd_error_status_type sd_power_on(void) /* send acmd41, check voltage operation range */ while((!valid_voltage) && (count < SD_MAX_VOLT_TRIAL)) { + delay_ms(10); + /* send cmd55 before acmd41 */ sdio_command_init_struct.argument = 0x00; sdio_command_init_struct.cmd_index = SD_CMD_APP_CMD; @@ -353,6 +356,8 @@ sd_error_status_type sd_power_on(void) /* send cmd1 */ while((!valid_voltage) && (count < SD_MAX_VOLT_TRIAL)) { + delay_ms(10); + sdio_command_init_struct.argument = SD_VOLTAGE_WINDOW_MMC; sdio_command_init_struct.cmd_index = SD_CMD_SEND_OP_COND; sdio_command_init_struct.rsp_type = SDIO_RESPONSE_SHORT; diff --git a/project/at_start_f437/examples/sdio/sd_mmc_card/src/at32f435_437_clock.c b/project/at_start_f437/examples/sdio/sd_mmc_card/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/sdio/sd_mmc_card/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/sdio/sd_mmc_card/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/sdio/sd_mmc_card/src/at32f435_437_int.c b/project/at_start_f437/examples/sdio/sd_mmc_card/src/at32f435_437_int.c index 506f84f8..8f12e807 100644 --- a/project/at_start_f437/examples/sdio/sd_mmc_card/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/sdio/sd_mmc_card/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/sdio/sd_mmc_card/src/main.c b/project/at_start_f437/examples/sdio/sd_mmc_card/src/main.c index c3fb488a..2244aab5 100644 --- a/project/at_start_f437/examples/sdio/sd_mmc_card/src/main.c +++ b/project/at_start_f437/examples/sdio/sd_mmc_card/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/sdio/sdio_fatfs/inc/at32_sdio.h b/project/at_start_f437/examples/sdio/sdio_fatfs/inc/at32_sdio.h index bebc0b58..8eef6175 100644 --- a/project/at_start_f437/examples/sdio/sdio_fatfs/inc/at32_sdio.h +++ b/project/at_start_f437/examples/sdio/sdio_fatfs/inc/at32_sdio.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32_sdio.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief this file contains all the functions prototypes for the sd/mmc * card at32_sdio driver firmware library. ************************************************************************** diff --git a/project/at_start_f437/examples/sdio/sdio_fatfs/inc/at32f435_437_clock.h b/project/at_start_f437/examples/sdio/sdio_fatfs/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/sdio/sdio_fatfs/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/sdio/sdio_fatfs/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/sdio/sdio_fatfs/inc/at32f435_437_conf.h b/project/at_start_f437/examples/sdio/sdio_fatfs/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/sdio/sdio_fatfs/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/sdio/sdio_fatfs/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/sdio/sdio_fatfs/inc/at32f435_437_int.h b/project/at_start_f437/examples/sdio/sdio_fatfs/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/sdio/sdio_fatfs/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/sdio/sdio_fatfs/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/sdio/sdio_fatfs/readme.txt b/project/at_start_f437/examples/sdio/sdio_fatfs/readme.txt index e1d684b5..74525c96 100644 --- a/project/at_start_f437/examples/sdio/sdio_fatfs/readme.txt +++ b/project/at_start_f437/examples/sdio/sdio_fatfs/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/sdio/sdio_fatfs/src/at32_sdio.c b/project/at_start_f437/examples/sdio/sdio_fatfs/src/at32_sdio.c index ac041cf0..cd9ff997 100644 --- a/project/at_start_f437/examples/sdio/sdio_fatfs/src/at32_sdio.c +++ b/project/at_start_f437/examples/sdio/sdio_fatfs/src/at32_sdio.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32_sdio.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief this file provides a set of functions needed to manage the * sdio/mmc card memory. ************************************************************************** @@ -27,6 +27,7 @@ #include #include "at32_sdio.h" +#include "at32f435_437_board.h" /** @addtogroup AT32F437_periph_examples * @{ @@ -102,7 +103,7 @@ sd_error_status_type sd_init(void) gpio_pin_mux_config(GPIOC, GPIO_PINS_SOURCE12, GPIO_MUX_12); gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE2, GPIO_MUX_12); - retry = 10; + retry = 3; while(retry--){ /* reset sdio */ sdio_reset(SDIOx); @@ -237,7 +238,7 @@ sd_error_status_type sd_power_on(void) /* enable to output sdio_ck */ sdio_clock_enable(SDIOx, TRUE); - for(retry = 0; retry < 10; retry++) + for(retry = 0; retry < 5; retry++) { /* send cmd0, get in idle stage */ sdio_command_init_struct.argument = 0x0; @@ -295,6 +296,8 @@ sd_error_status_type sd_power_on(void) /* send acmd41, check voltage operation range */ while((!valid_voltage) && (count < SD_MAX_VOLT_TRIAL)) { + delay_ms(10); + /* send cmd55 before acmd41 */ sdio_command_init_struct.argument = 0x00; sdio_command_init_struct.cmd_index = SD_CMD_APP_CMD; @@ -360,6 +363,8 @@ sd_error_status_type sd_power_on(void) /* send cmd1 */ while((!valid_voltage) && (count < SD_MAX_VOLT_TRIAL)) { + delay_ms(10); + sdio_command_init_struct.argument = SD_VOLTAGE_WINDOW_MMC; sdio_command_init_struct.cmd_index = SD_CMD_SEND_OP_COND; sdio_command_init_struct.rsp_type = SDIO_RESPONSE_SHORT; diff --git a/project/at_start_f437/examples/sdio/sdio_fatfs/src/at32f435_437_clock.c b/project/at_start_f437/examples/sdio/sdio_fatfs/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/sdio/sdio_fatfs/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/sdio/sdio_fatfs/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/sdio/sdio_fatfs/src/at32f435_437_int.c b/project/at_start_f437/examples/sdio/sdio_fatfs/src/at32f435_437_int.c index d47f80af..11932d86 100644 --- a/project/at_start_f437/examples/sdio/sdio_fatfs/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/sdio/sdio_fatfs/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/sdio/sdio_fatfs/src/main.c b/project/at_start_f437/examples/sdio/sdio_fatfs/src/main.c index 31b2eba0..175a4313 100644 --- a/project/at_start_f437/examples/sdio/sdio_fatfs/src/main.c +++ b/project/at_start_f437/examples/sdio/sdio_fatfs/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/spi/crc_transfer_polling/inc/at32f435_437_clock.h b/project/at_start_f437/examples/spi/crc_transfer_polling/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/spi/crc_transfer_polling/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/spi/crc_transfer_polling/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/spi/crc_transfer_polling/inc/at32f435_437_conf.h b/project/at_start_f437/examples/spi/crc_transfer_polling/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/spi/crc_transfer_polling/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/spi/crc_transfer_polling/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/spi/crc_transfer_polling/inc/at32f435_437_int.h b/project/at_start_f437/examples/spi/crc_transfer_polling/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/spi/crc_transfer_polling/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/spi/crc_transfer_polling/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/spi/crc_transfer_polling/mdk_v5/halfduplex_dma.uvoptx b/project/at_start_f437/examples/spi/crc_transfer_polling/mdk_v5/crc_transfer_polling.uvoptx similarity index 100% rename from project/at_start_f437/examples/spi/crc_transfer_polling/mdk_v5/halfduplex_dma.uvoptx rename to project/at_start_f437/examples/spi/crc_transfer_polling/mdk_v5/crc_transfer_polling.uvoptx diff --git a/project/at_start_f437/examples/spi/crc_transfer_polling/mdk_v5/halfduplex_dma.uvprojx b/project/at_start_f437/examples/spi/crc_transfer_polling/mdk_v5/crc_transfer_polling.uvprojx similarity index 100% rename from project/at_start_f437/examples/spi/crc_transfer_polling/mdk_v5/halfduplex_dma.uvprojx rename to project/at_start_f437/examples/spi/crc_transfer_polling/mdk_v5/crc_transfer_polling.uvprojx diff --git a/project/at_start_f437/examples/spi/crc_transfer_polling/readme.txt b/project/at_start_f437/examples/spi/crc_transfer_polling/readme.txt index 624ad6ec..a8f687d2 100644 --- a/project/at_start_f437/examples/spi/crc_transfer_polling/readme.txt +++ b/project/at_start_f437/examples/spi/crc_transfer_polling/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/spi/crc_transfer_polling/src/at32f435_437_clock.c b/project/at_start_f437/examples/spi/crc_transfer_polling/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/spi/crc_transfer_polling/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/spi/crc_transfer_polling/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/spi/crc_transfer_polling/src/at32f435_437_int.c b/project/at_start_f437/examples/spi/crc_transfer_polling/src/at32f435_437_int.c index cc3ebbfe..5be0835b 100644 --- a/project/at_start_f437/examples/spi/crc_transfer_polling/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/spi/crc_transfer_polling/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/spi/crc_transfer_polling/src/main.c b/project/at_start_f437/examples/spi/crc_transfer_polling/src/main.c index 746b8a1b..05a10237 100644 --- a/project/at_start_f437/examples/spi/crc_transfer_polling/src/main.c +++ b/project/at_start_f437/examples/spi/crc_transfer_polling/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/spi/fullduplex_polling/inc/at32f435_437_clock.h b/project/at_start_f437/examples/spi/fullduplex_polling/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/spi/fullduplex_polling/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/spi/fullduplex_polling/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/spi/fullduplex_polling/inc/at32f435_437_conf.h b/project/at_start_f437/examples/spi/fullduplex_polling/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/spi/fullduplex_polling/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/spi/fullduplex_polling/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/spi/fullduplex_polling/inc/at32f435_437_int.h b/project/at_start_f437/examples/spi/fullduplex_polling/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/spi/fullduplex_polling/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/spi/fullduplex_polling/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/spi/fullduplex_polling/readme.txt b/project/at_start_f437/examples/spi/fullduplex_polling/readme.txt index 34fe6451..d6d0e7a5 100644 --- a/project/at_start_f437/examples/spi/fullduplex_polling/readme.txt +++ b/project/at_start_f437/examples/spi/fullduplex_polling/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/spi/fullduplex_polling/src/at32f435_437_clock.c b/project/at_start_f437/examples/spi/fullduplex_polling/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/spi/fullduplex_polling/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/spi/fullduplex_polling/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/spi/fullduplex_polling/src/at32f435_437_int.c b/project/at_start_f437/examples/spi/fullduplex_polling/src/at32f435_437_int.c index 872bbf11..d5e02215 100644 --- a/project/at_start_f437/examples/spi/fullduplex_polling/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/spi/fullduplex_polling/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/spi/fullduplex_polling/src/main.c b/project/at_start_f437/examples/spi/fullduplex_polling/src/main.c index 0f81c546..b07265c4 100644 --- a/project/at_start_f437/examples/spi/fullduplex_polling/src/main.c +++ b/project/at_start_f437/examples/spi/fullduplex_polling/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/spi/halfduplex_interrupt/inc/at32f435_437_clock.h b/project/at_start_f437/examples/spi/halfduplex_interrupt/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/spi/halfduplex_interrupt/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/spi/halfduplex_interrupt/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/spi/halfduplex_interrupt/inc/at32f435_437_conf.h b/project/at_start_f437/examples/spi/halfduplex_interrupt/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/spi/halfduplex_interrupt/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/spi/halfduplex_interrupt/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/spi/halfduplex_interrupt/inc/at32f435_437_int.h b/project/at_start_f437/examples/spi/halfduplex_interrupt/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/spi/halfduplex_interrupt/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/spi/halfduplex_interrupt/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/spi/halfduplex_interrupt/readme.txt b/project/at_start_f437/examples/spi/halfduplex_interrupt/readme.txt index 28a84dcc..ce145cf2 100644 --- a/project/at_start_f437/examples/spi/halfduplex_interrupt/readme.txt +++ b/project/at_start_f437/examples/spi/halfduplex_interrupt/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/spi/halfduplex_interrupt/src/at32f435_437_clock.c b/project/at_start_f437/examples/spi/halfduplex_interrupt/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/spi/halfduplex_interrupt/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/spi/halfduplex_interrupt/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/spi/halfduplex_interrupt/src/at32f435_437_int.c b/project/at_start_f437/examples/spi/halfduplex_interrupt/src/at32f435_437_int.c index ee2c7705..3ef8a64f 100644 --- a/project/at_start_f437/examples/spi/halfduplex_interrupt/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/spi/halfduplex_interrupt/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/spi/halfduplex_interrupt/src/main.c b/project/at_start_f437/examples/spi/halfduplex_interrupt/src/main.c index 74283280..3700c051 100644 --- a/project/at_start_f437/examples/spi/halfduplex_interrupt/src/main.c +++ b/project/at_start_f437/examples/spi/halfduplex_interrupt/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/spi/halfduplex_transceiver_switch/inc/at32f435_437_clock.h b/project/at_start_f437/examples/spi/halfduplex_transceiver_switch/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/spi/halfduplex_transceiver_switch/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/spi/halfduplex_transceiver_switch/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/spi/halfduplex_transceiver_switch/inc/at32f435_437_conf.h b/project/at_start_f437/examples/spi/halfduplex_transceiver_switch/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/spi/halfduplex_transceiver_switch/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/spi/halfduplex_transceiver_switch/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/spi/halfduplex_transceiver_switch/inc/at32f435_437_int.h b/project/at_start_f437/examples/spi/halfduplex_transceiver_switch/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/spi/halfduplex_transceiver_switch/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/spi/halfduplex_transceiver_switch/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/spi/halfduplex_transceiver_switch/readme.txt b/project/at_start_f437/examples/spi/halfduplex_transceiver_switch/readme.txt index a4a1f1b7..fd3115f1 100644 --- a/project/at_start_f437/examples/spi/halfduplex_transceiver_switch/readme.txt +++ b/project/at_start_f437/examples/spi/halfduplex_transceiver_switch/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/spi/halfduplex_transceiver_switch/src/at32f435_437_clock.c b/project/at_start_f437/examples/spi/halfduplex_transceiver_switch/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/spi/halfduplex_transceiver_switch/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/spi/halfduplex_transceiver_switch/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/spi/halfduplex_transceiver_switch/src/at32f435_437_int.c b/project/at_start_f437/examples/spi/halfduplex_transceiver_switch/src/at32f435_437_int.c index ac255939..e8587616 100644 --- a/project/at_start_f437/examples/spi/halfduplex_transceiver_switch/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/spi/halfduplex_transceiver_switch/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer @@ -168,7 +168,7 @@ void SysTick_Handler(void) spi_enable(SPI3, TRUE); if(rx_index == BUFFERSIZE) { - spi_i2s_interrupt_enable(SPI3, SPI_I2S_RDBF_FLAG, FALSE); + spi_i2s_interrupt_enable(SPI3, SPI_I2S_RDBF_INT, FALSE); } } } diff --git a/project/at_start_f437/examples/spi/halfduplex_transceiver_switch/src/main.c b/project/at_start_f437/examples/spi/halfduplex_transceiver_switch/src/main.c index 4291fde9..4bf5f184 100644 --- a/project/at_start_f437/examples/spi/halfduplex_transceiver_switch/src/main.c +++ b/project/at_start_f437/examples/spi/halfduplex_transceiver_switch/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/spi/only_receive_mode_polling/inc/at32f435_437_clock.h b/project/at_start_f437/examples/spi/only_receive_mode_polling/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/spi/only_receive_mode_polling/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/spi/only_receive_mode_polling/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/spi/only_receive_mode_polling/inc/at32f435_437_conf.h b/project/at_start_f437/examples/spi/only_receive_mode_polling/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/spi/only_receive_mode_polling/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/spi/only_receive_mode_polling/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/spi/only_receive_mode_polling/inc/at32f435_437_int.h b/project/at_start_f437/examples/spi/only_receive_mode_polling/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/spi/only_receive_mode_polling/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/spi/only_receive_mode_polling/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/spi/only_receive_mode_polling/readme.txt b/project/at_start_f437/examples/spi/only_receive_mode_polling/readme.txt index 49eed1e5..81b925fa 100644 --- a/project/at_start_f437/examples/spi/only_receive_mode_polling/readme.txt +++ b/project/at_start_f437/examples/spi/only_receive_mode_polling/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/spi/only_receive_mode_polling/src/at32f435_437_clock.c b/project/at_start_f437/examples/spi/only_receive_mode_polling/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/spi/only_receive_mode_polling/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/spi/only_receive_mode_polling/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/spi/only_receive_mode_polling/src/at32f435_437_int.c b/project/at_start_f437/examples/spi/only_receive_mode_polling/src/at32f435_437_int.c index 6225879c..50138126 100644 --- a/project/at_start_f437/examples/spi/only_receive_mode_polling/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/spi/only_receive_mode_polling/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/spi/only_receive_mode_polling/src/main.c b/project/at_start_f437/examples/spi/only_receive_mode_polling/src/main.c index 481975eb..d8c0d772 100644 --- a/project/at_start_f437/examples/spi/only_receive_mode_polling/src/main.c +++ b/project/at_start_f437/examples/spi/only_receive_mode_polling/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/spi/ti_fullduplex_dma/inc/at32f435_437_clock.h b/project/at_start_f437/examples/spi/ti_fullduplex_dma/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/spi/ti_fullduplex_dma/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/spi/ti_fullduplex_dma/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/spi/ti_fullduplex_dma/inc/at32f435_437_conf.h b/project/at_start_f437/examples/spi/ti_fullduplex_dma/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/spi/ti_fullduplex_dma/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/spi/ti_fullduplex_dma/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/spi/ti_fullduplex_dma/inc/at32f435_437_int.h b/project/at_start_f437/examples/spi/ti_fullduplex_dma/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/spi/ti_fullduplex_dma/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/spi/ti_fullduplex_dma/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/spi/ti_fullduplex_dma/readme.txt b/project/at_start_f437/examples/spi/ti_fullduplex_dma/readme.txt index 19f6ba3d..ae32c4db 100644 --- a/project/at_start_f437/examples/spi/ti_fullduplex_dma/readme.txt +++ b/project/at_start_f437/examples/spi/ti_fullduplex_dma/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/spi/ti_fullduplex_dma/src/at32f435_437_clock.c b/project/at_start_f437/examples/spi/ti_fullduplex_dma/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/spi/ti_fullduplex_dma/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/spi/ti_fullduplex_dma/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/spi/ti_fullduplex_dma/src/at32f435_437_int.c b/project/at_start_f437/examples/spi/ti_fullduplex_dma/src/at32f435_437_int.c index 07fae504..e97dc1cb 100644 --- a/project/at_start_f437/examples/spi/ti_fullduplex_dma/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/spi/ti_fullduplex_dma/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/spi/ti_fullduplex_dma/src/main.c b/project/at_start_f437/examples/spi/ti_fullduplex_dma/src/main.c index 907b399d..0c62e074 100644 --- a/project/at_start_f437/examples/spi/ti_fullduplex_dma/src/main.c +++ b/project/at_start_f437/examples/spi/ti_fullduplex_dma/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/spi/use_jtagpin_hardwarecs_dma/inc/at32f435_437_clock.h b/project/at_start_f437/examples/spi/use_jtagpin_hardwarecs_dma/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/spi/use_jtagpin_hardwarecs_dma/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/spi/use_jtagpin_hardwarecs_dma/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/spi/use_jtagpin_hardwarecs_dma/inc/at32f435_437_conf.h b/project/at_start_f437/examples/spi/use_jtagpin_hardwarecs_dma/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/spi/use_jtagpin_hardwarecs_dma/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/spi/use_jtagpin_hardwarecs_dma/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/spi/use_jtagpin_hardwarecs_dma/inc/at32f435_437_int.h b/project/at_start_f437/examples/spi/use_jtagpin_hardwarecs_dma/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/spi/use_jtagpin_hardwarecs_dma/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/spi/use_jtagpin_hardwarecs_dma/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/spi/use_jtagpin_hardwarecs_dma/readme.txt b/project/at_start_f437/examples/spi/use_jtagpin_hardwarecs_dma/readme.txt index 4923c682..d44e112e 100644 --- a/project/at_start_f437/examples/spi/use_jtagpin_hardwarecs_dma/readme.txt +++ b/project/at_start_f437/examples/spi/use_jtagpin_hardwarecs_dma/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/spi/use_jtagpin_hardwarecs_dma/src/at32f435_437_clock.c b/project/at_start_f437/examples/spi/use_jtagpin_hardwarecs_dma/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/spi/use_jtagpin_hardwarecs_dma/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/spi/use_jtagpin_hardwarecs_dma/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/spi/use_jtagpin_hardwarecs_dma/src/at32f435_437_int.c b/project/at_start_f437/examples/spi/use_jtagpin_hardwarecs_dma/src/at32f435_437_int.c index 28307a33..943a578c 100644 --- a/project/at_start_f437/examples/spi/use_jtagpin_hardwarecs_dma/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/spi/use_jtagpin_hardwarecs_dma/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/spi/use_jtagpin_hardwarecs_dma/src/main.c b/project/at_start_f437/examples/spi/use_jtagpin_hardwarecs_dma/src/main.c index 55f329ff..ec7a1e84 100644 --- a/project/at_start_f437/examples/spi/use_jtagpin_hardwarecs_dma/src/main.c +++ b/project/at_start_f437/examples/spi/use_jtagpin_hardwarecs_dma/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/spi/w25q_flash/inc/at32f435_437_clock.h b/project/at_start_f437/examples/spi/w25q_flash/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/spi/w25q_flash/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/spi/w25q_flash/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/spi/w25q_flash/inc/at32f435_437_conf.h b/project/at_start_f437/examples/spi/w25q_flash/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/spi/w25q_flash/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/spi/w25q_flash/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/spi/w25q_flash/inc/at32f435_437_int.h b/project/at_start_f437/examples/spi/w25q_flash/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/spi/w25q_flash/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/spi/w25q_flash/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/spi/w25q_flash/inc/spi_flash.h b/project/at_start_f437/examples/spi/w25q_flash/inc/spi_flash.h index 31688533..d92ca270 100644 --- a/project/at_start_f437/examples/spi/w25q_flash/inc/spi_flash.h +++ b/project/at_start_f437/examples/spi/w25q_flash/inc/spi_flash.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file spi_flash.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of spi_flash ************************************************************************** * Copyright notice & Disclaimer @@ -45,8 +45,8 @@ * @{ */ -#define FLASH_CS_HIGH() gpio_bits_set(GPIOA, GPIO_PINS_4) -#define FLASH_CS_LOW() gpio_bits_reset(GPIOA, GPIO_PINS_4) +#define FLASH_CS_HIGH() gpio_bits_set(GPIOD, GPIO_PINS_0) +#define FLASH_CS_LOW() gpio_bits_reset(GPIOD, GPIO_PINS_0) /** * @} diff --git a/project/at_start_f437/examples/spi/w25q_flash/readme.txt b/project/at_start_f437/examples/spi/w25q_flash/readme.txt index ec7342d7..54bb421d 100644 --- a/project/at_start_f437/examples/spi/w25q_flash/readme.txt +++ b/project/at_start_f437/examples/spi/w25q_flash/readme.txt @@ -1,19 +1,19 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ - this demo is based on the at-start board, in this demo, shows how to use - only receive mode receive data by polling mode. + this demo is based on the at-start board and AT32-Comm-EV board, in this demo, + shows how to use spi access the w25q flash chip. the pins connection as follow: - - spi1 w25q128 - pa4(cs) <---> cs pin - pa5(sck) <---> clk pin - pa6(miso) <---> di pin - pa7(mosi) <---> do pin + - spi2 w25qxx + pd0(cs) <---> cs pin + pd1(sck) <---> clk pin + pc2(miso) <---> di pin + pd4(mosi) <---> do pin for more detailed information. please refer to the application note document AN0102. \ No newline at end of file diff --git a/project/at_start_f437/examples/spi/w25q_flash/src/at32f435_437_clock.c b/project/at_start_f437/examples/spi/w25q_flash/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/spi/w25q_flash/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/spi/w25q_flash/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/spi/w25q_flash/src/at32f435_437_int.c b/project/at_start_f437/examples/spi/w25q_flash/src/at32f435_437_int.c index a9976111..870c7c22 100644 --- a/project/at_start_f437/examples/spi/w25q_flash/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/spi/w25q_flash/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/spi/w25q_flash/src/main.c b/project/at_start_f437/examples/spi/w25q_flash/src/main.c index c5bb8695..5f9bc137 100644 --- a/project/at_start_f437/examples/spi/w25q_flash/src/main.c +++ b/project/at_start_f437/examples/spi/w25q_flash/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer @@ -96,7 +96,7 @@ int main(void) uart_print_init(115200); spiflash_init(); flash_id_index = spiflash_read_id(); - if(flash_id_index != W25Q128) + if((flash_id_index != W25Q128)&&(flash_id_index != W25Q80)&&(flash_id_index != W25Q16)&&(flash_id_index != W25Q32)&&(flash_id_index != W25Q64)) { printf("flash id check error!\r\n"); for(index = 0; index < 50; index++) diff --git a/project/at_start_f437/examples/spi/w25q_flash/src/spi_flash.c b/project/at_start_f437/examples/spi/w25q_flash/src/spi_flash.c index 1098f12c..95dc8f87 100644 --- a/project/at_start_f437/examples/spi/w25q_flash/src/spi_flash.c +++ b/project/at_start_f437/examples/spi/w25q_flash/src/spi_flash.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file spi_flash.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief spi_flash source code ************************************************************************** * Copyright notice & Disclaimer @@ -47,48 +47,49 @@ void spiflash_init(void) gpio_init_type gpio_initstructure; spi_init_type spi_init_struct; - crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE); + crm_periph_clock_enable(CRM_GPIOC_PERIPH_CLOCK, TRUE); + crm_periph_clock_enable(CRM_GPIOD_PERIPH_CLOCK, TRUE); crm_periph_clock_enable(CRM_DMA1_PERIPH_CLOCK, TRUE); - /* software cs, pa4 as a general io to control flash cs */ + /* software cs, pd0 as a general io to control flash cs */ gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; gpio_initstructure.gpio_pull = GPIO_PULL_UP; gpio_initstructure.gpio_mode = GPIO_MODE_OUTPUT; gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; - gpio_initstructure.gpio_pins = GPIO_PINS_4; - gpio_init(GPIOA, &gpio_initstructure); + gpio_initstructure.gpio_pins = GPIO_PINS_0; + gpio_init(GPIOD, &gpio_initstructure); /* sck */ gpio_initstructure.gpio_pull = GPIO_PULL_UP; gpio_initstructure.gpio_mode = GPIO_MODE_MUX; - gpio_initstructure.gpio_pins = GPIO_PINS_5; - gpio_init(GPIOA, &gpio_initstructure); - gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE5, GPIO_MUX_5); + gpio_initstructure.gpio_pins = GPIO_PINS_1; + gpio_init(GPIOD, &gpio_initstructure); + gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE1, GPIO_MUX_6); /* miso */ gpio_initstructure.gpio_pull = GPIO_PULL_UP; - gpio_initstructure.gpio_pins = GPIO_PINS_6; - gpio_init(GPIOA, &gpio_initstructure); - gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE6, GPIO_MUX_5); + gpio_initstructure.gpio_pins = GPIO_PINS_2; + gpio_init(GPIOC, &gpio_initstructure); + gpio_pin_mux_config(GPIOC, GPIO_PINS_SOURCE2, GPIO_MUX_5); /* mosi */ gpio_initstructure.gpio_pull = GPIO_PULL_UP; - gpio_initstructure.gpio_pins = GPIO_PINS_7; - gpio_init(GPIOA, &gpio_initstructure); - gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE7, GPIO_MUX_5); + gpio_initstructure.gpio_pins = GPIO_PINS_4; + gpio_init(GPIOD, &gpio_initstructure); + gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE4, GPIO_MUX_6); FLASH_CS_HIGH(); - crm_periph_clock_enable(CRM_SPI1_PERIPH_CLOCK, TRUE); + crm_periph_clock_enable(CRM_SPI2_PERIPH_CLOCK, TRUE); spi_default_para_init(&spi_init_struct); spi_init_struct.transmission_mode = SPI_TRANSMIT_FULL_DUPLEX; spi_init_struct.master_slave_mode = SPI_MODE_MASTER; - spi_init_struct.mclk_freq_division = SPI_MCLK_DIV_8; + spi_init_struct.mclk_freq_division = SPI_MCLK_DIV_32; spi_init_struct.first_bit_transmission = SPI_FIRST_BIT_MSB; spi_init_struct.frame_bit_num = SPI_FRAME_8BIT; spi_init_struct.clock_polarity = SPI_CLOCK_POLARITY_HIGH; spi_init_struct.clock_phase = SPI_CLOCK_PHASE_2EDGE; spi_init_struct.cs_mode_selection = SPI_CS_SOFTWARE_MODE; - spi_init(SPI1, &spi_init_struct); - spi_enable(SPI1, TRUE); + spi_init(SPI2, &spi_init_struct); + spi_enable(SPI2, TRUE); } @@ -317,30 +318,30 @@ void spi_bytes_write(uint8_t *pbuffer, uint32_t length) dma_init_struct.memory_base_addr = (uint32_t)&dummy_data; dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_BYTE; dma_init_struct.memory_inc_enable = FALSE; - dma_init_struct.peripheral_base_addr = (uint32_t)(&SPI1->dt); + dma_init_struct.peripheral_base_addr = (uint32_t)(&SPI2->dt); dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_BYTE; dma_init_struct.peripheral_inc_enable = FALSE; dma_init_struct.priority = DMA_PRIORITY_VERY_HIGH; dma_init_struct.loop_mode_enable = FALSE; dma_init(DMA1_CHANNEL2, &dma_init_struct); dmamux_enable(DMA1, TRUE); - dmamux_init(DMA1MUX_CHANNEL2, DMAMUX_DMAREQ_ID_SPI1_RX); + dmamux_init(DMA1MUX_CHANNEL2, DMAMUX_DMAREQ_ID_SPI2_RX); dma_init_struct.buffer_size = length; dma_init_struct.direction = DMA_DIR_MEMORY_TO_PERIPHERAL; dma_init_struct.memory_base_addr = (uint32_t)pbuffer; dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_BYTE; dma_init_struct.memory_inc_enable = TRUE; - dma_init_struct.peripheral_base_addr = (uint32_t)(&SPI1->dt); + dma_init_struct.peripheral_base_addr = (uint32_t)(&SPI2->dt); dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_BYTE; dma_init_struct.peripheral_inc_enable = FALSE; dma_init_struct.priority = DMA_PRIORITY_VERY_HIGH; dma_init_struct.loop_mode_enable = FALSE; dma_init(DMA1_CHANNEL3, &dma_init_struct); - dmamux_init(DMA1MUX_CHANNEL3, DMAMUX_DMAREQ_ID_SPI1_TX); + dmamux_init(DMA1MUX_CHANNEL3, DMAMUX_DMAREQ_ID_SPI2_TX); - spi_i2s_dma_transmitter_enable(SPI1, TRUE); - spi_i2s_dma_receiver_enable(SPI1, TRUE); + spi_i2s_dma_transmitter_enable(SPI2, TRUE); + spi_i2s_dma_receiver_enable(SPI2, TRUE); dma_channel_enable(DMA1_CHANNEL2, TRUE); dma_channel_enable(DMA1_CHANNEL3, TRUE); @@ -351,15 +352,15 @@ void spi_bytes_write(uint8_t *pbuffer, uint32_t length) dma_channel_enable(DMA1_CHANNEL2, FALSE); dma_channel_enable(DMA1_CHANNEL3, FALSE); - spi_i2s_dma_transmitter_enable(SPI1, FALSE); - spi_i2s_dma_receiver_enable(SPI1, FALSE); + spi_i2s_dma_transmitter_enable(SPI2, FALSE); + spi_i2s_dma_receiver_enable(SPI2, FALSE); #else while(length--) { - while(spi_i2s_flag_get(SPI1, SPI_I2S_TDBE_FLAG) == RESET); - spi_i2s_data_transmit(SPI1, *pbuffer); - while(spi_i2s_flag_get(SPI1, SPI_I2S_RDBF_FLAG) == RESET); - dummy_data = spi_i2s_data_receive(SPI1); + while(spi_i2s_flag_get(SPI2, SPI_I2S_TDBE_FLAG) == RESET); + spi_i2s_data_transmit(SPI2, *pbuffer); + while(spi_i2s_flag_get(SPI2, SPI_I2S_RDBF_FLAG) == RESET); + dummy_data = spi_i2s_data_receive(SPI2); pbuffer++; } #endif @@ -385,30 +386,30 @@ void spi_bytes_read(uint8_t *pbuffer, uint32_t length) dma_init_struct.memory_base_addr = (uint32_t)&write_value; dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_BYTE; dma_init_struct.memory_inc_enable = FALSE; - dma_init_struct.peripheral_base_addr = (uint32_t)(&SPI1->dt); + dma_init_struct.peripheral_base_addr = (uint32_t)(&SPI2->dt); dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_BYTE; dma_init_struct.peripheral_inc_enable = FALSE; dma_init_struct.priority = DMA_PRIORITY_VERY_HIGH; dma_init_struct.loop_mode_enable = FALSE; dma_init(DMA1_CHANNEL3, &dma_init_struct); dmamux_enable(DMA1, TRUE); - dmamux_init(DMA1MUX_CHANNEL3, DMAMUX_DMAREQ_ID_SPI1_TX); + dmamux_init(DMA1MUX_CHANNEL3, DMAMUX_DMAREQ_ID_SPI2_TX); dma_init_struct.buffer_size = length; dma_init_struct.direction = DMA_DIR_PERIPHERAL_TO_MEMORY; dma_init_struct.memory_base_addr = (uint32_t)pbuffer; dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_BYTE; dma_init_struct.memory_inc_enable = TRUE; - dma_init_struct.peripheral_base_addr = (uint32_t)(&SPI1->dt); + dma_init_struct.peripheral_base_addr = (uint32_t)(&SPI2->dt); dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_BYTE; dma_init_struct.peripheral_inc_enable = FALSE; dma_init_struct.priority = DMA_PRIORITY_VERY_HIGH; dma_init_struct.loop_mode_enable = FALSE; dma_init(DMA1_CHANNEL2, &dma_init_struct); - dmamux_init(DMA1MUX_CHANNEL2, DMAMUX_DMAREQ_ID_SPI1_RX); + dmamux_init(DMA1MUX_CHANNEL2, DMAMUX_DMAREQ_ID_SPI2_RX); - spi_i2s_dma_transmitter_enable(SPI1, TRUE); - spi_i2s_dma_receiver_enable(SPI1, TRUE); + spi_i2s_dma_transmitter_enable(SPI2, TRUE); + spi_i2s_dma_receiver_enable(SPI2, TRUE); dma_channel_enable(DMA1_CHANNEL2, TRUE); dma_channel_enable(DMA1_CHANNEL3, TRUE); @@ -418,15 +419,15 @@ void spi_bytes_read(uint8_t *pbuffer, uint32_t length) dma_channel_enable(DMA1_CHANNEL2, FALSE); dma_channel_enable(DMA1_CHANNEL3, FALSE); - spi_i2s_dma_transmitter_enable(SPI1, FALSE); - spi_i2s_dma_receiver_enable(SPI1, FALSE); + spi_i2s_dma_transmitter_enable(SPI2, FALSE); + spi_i2s_dma_receiver_enable(SPI2, FALSE); #else while(length--) { - while(spi_i2s_flag_get(SPI1, SPI_I2S_TDBE_FLAG) == RESET); - spi_i2s_data_transmit(SPI1, write_value); - while(spi_i2s_flag_get(SPI1, SPI_I2S_RDBF_FLAG) == RESET); - *pbuffer = spi_i2s_data_receive(SPI1); + while(spi_i2s_flag_get(SPI2, SPI_I2S_TDBE_FLAG) == RESET); + spi_i2s_data_transmit(SPI2, write_value); + while(spi_i2s_flag_get(SPI2, SPI_I2S_RDBF_FLAG) == RESET); + *pbuffer = spi_i2s_data_receive(SPI2); pbuffer++; } #endif @@ -496,12 +497,12 @@ uint16_t spiflash_read_id(void) uint8_t spi_byte_write(uint8_t data) { uint8_t brxbuff; - spi_i2s_dma_transmitter_enable(SPI1, FALSE); - spi_i2s_dma_receiver_enable(SPI1, FALSE); - spi_i2s_data_transmit(SPI1, data); - while(spi_i2s_flag_get(SPI1, SPI_I2S_RDBF_FLAG) == RESET); - brxbuff = spi_i2s_data_receive(SPI1); - while(spi_i2s_flag_get(SPI1, SPI_I2S_BF_FLAG) != RESET); + spi_i2s_dma_transmitter_enable(SPI2, FALSE); + spi_i2s_dma_receiver_enable(SPI2, FALSE); + spi_i2s_data_transmit(SPI2, data); + while(spi_i2s_flag_get(SPI2, SPI_I2S_RDBF_FLAG) == RESET); + brxbuff = spi_i2s_data_receive(SPI2); + while(spi_i2s_flag_get(SPI2, SPI_I2S_BF_FLAG) != RESET); return brxbuff; } diff --git a/project/at_start_f437/examples/sram/extend_sram/iar_v8.2/startup_at32f435_437_ext_ram.s b/project/at_start_f437/examples/sram/extend_sram/iar_v8.2/startup_at32f435_437_ext_ram.s index ce77e0a2..5049346d 100644 --- a/project/at_start_f437/examples/sram/extend_sram/iar_v8.2/startup_at32f435_437_ext_ram.s +++ b/project/at_start_f437/examples/sram/extend_sram/iar_v8.2/startup_at32f435_437_ext_ram.s @@ -1,7 +1,7 @@ ;************************************************************************** ;* @file startup_at32f435_437.s -;* @version v2.0.8 -;* @date 2022-04-25 +;* @version v2.0.9 +;* @date 2022-06-28 ;* @brief at32f435_437 startup file for IAR Systems ;************************************************************************** ; diff --git a/project/at_start_f437/examples/sram/extend_sram/inc/at32f435_437_clock.h b/project/at_start_f437/examples/sram/extend_sram/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/sram/extend_sram/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/sram/extend_sram/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/sram/extend_sram/inc/at32f435_437_conf.h b/project/at_start_f437/examples/sram/extend_sram/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/sram/extend_sram/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/sram/extend_sram/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/sram/extend_sram/inc/at32f435_437_int.h b/project/at_start_f437/examples/sram/extend_sram/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/sram/extend_sram/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/sram/extend_sram/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/sram/extend_sram/mdk_v5/startup_at32f435_437_ext_ram.s b/project/at_start_f437/examples/sram/extend_sram/mdk_v5/startup_at32f435_437_ext_ram.s index d0255b87..cbd62ba2 100644 --- a/project/at_start_f437/examples/sram/extend_sram/mdk_v5/startup_at32f435_437_ext_ram.s +++ b/project/at_start_f437/examples/sram/extend_sram/mdk_v5/startup_at32f435_437_ext_ram.s @@ -1,7 +1,7 @@ ;************************************************************************** ;* @file startup_at32f435_437.s -;* @version v2.0.8 -;* @date 2022-04-25 +;* @version v2.0.9 +;* @date 2022-06-28 ;* @brief at32f435_437 startup file for keil ;************************************************************************** ; diff --git a/project/at_start_f437/examples/sram/extend_sram/readme.txt b/project/at_start_f437/examples/sram/extend_sram/readme.txt index d2acced8..ff261d25 100644 --- a/project/at_start_f437/examples/sram/extend_sram/readme.txt +++ b/project/at_start_f437/examples/sram/extend_sram/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/sram/extend_sram/src/at32f435_437_clock.c b/project/at_start_f437/examples/sram/extend_sram/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/sram/extend_sram/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/sram/extend_sram/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/sram/extend_sram/src/at32f435_437_int.c b/project/at_start_f437/examples/sram/extend_sram/src/at32f435_437_int.c index 28728e35..cbdf7e1e 100644 --- a/project/at_start_f437/examples/sram/extend_sram/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/sram/extend_sram/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/sram/extend_sram/src/main.c b/project/at_start_f437/examples/sram/extend_sram/src/main.c index ab92864f..c4071a41 100644 --- a/project/at_start_f437/examples/sram/extend_sram/src/main.c +++ b/project/at_start_f437/examples/sram/extend_sram/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/6_steps/inc/at32f435_437_clock.h b/project/at_start_f437/examples/tmr/6_steps/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/tmr/6_steps/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/tmr/6_steps/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/6_steps/inc/at32f435_437_conf.h b/project/at_start_f437/examples/tmr/6_steps/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/tmr/6_steps/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/tmr/6_steps/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/6_steps/inc/at32f435_437_int.h b/project/at_start_f437/examples/tmr/6_steps/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/tmr/6_steps/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/tmr/6_steps/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/6_steps/mdk_v5/6_steps.uvprojx b/project/at_start_f437/examples/tmr/6_steps/mdk_v5/6_steps.uvprojx index 0a1ec0fd..4b76b40c 100644 --- a/project/at_start_f437/examples/tmr/6_steps/mdk_v5/6_steps.uvprojx +++ b/project/at_start_f437/examples/tmr/6_steps/mdk_v5/6_steps.uvprojx @@ -10,7 +10,7 @@ 6_steps 0x4 ARM-ADS - 5060750::V5.06 update 6 (build 750)::.\ARMCC + 5060750::V5.06 update 6 (build 750)::ARMCC 0 diff --git a/project/at_start_f437/examples/tmr/6_steps/readme.txt b/project/at_start_f437/examples/tmr/6_steps/readme.txt index af7e6415..28f6b1ee 100644 --- a/project/at_start_f437/examples/tmr/6_steps/readme.txt +++ b/project/at_start_f437/examples/tmr/6_steps/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/tmr/6_steps/src/at32f435_437_clock.c b/project/at_start_f437/examples/tmr/6_steps/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/tmr/6_steps/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/tmr/6_steps/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/6_steps/src/at32f435_437_int.c b/project/at_start_f437/examples/tmr/6_steps/src/at32f435_437_int.c index 934dbf07..55cae503 100644 --- a/project/at_start_f437/examples/tmr/6_steps/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/tmr/6_steps/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/6_steps/src/main.c b/project/at_start_f437/examples/tmr/6_steps/src/main.c index 61a6846f..99bac87f 100644 --- a/project/at_start_f437/examples/tmr/6_steps/src/main.c +++ b/project/at_start_f437/examples/tmr/6_steps/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer @@ -87,7 +87,7 @@ int main(void) gpio_init_struct.gpio_pins = GPIO_PINS_12; gpio_init_struct.gpio_mode = GPIO_MODE_MUX; gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; - gpio_init_struct.gpio_pull = GPIO_PULL_NONE; + gpio_init_struct.gpio_pull = GPIO_PULL_DOWN; gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; gpio_init(GPIOB, &gpio_init_struct); diff --git a/project/at_start_f437/examples/tmr/7_pwm_output/inc/at32f435_437_clock.h b/project/at_start_f437/examples/tmr/7_pwm_output/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/tmr/7_pwm_output/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/tmr/7_pwm_output/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/7_pwm_output/inc/at32f435_437_conf.h b/project/at_start_f437/examples/tmr/7_pwm_output/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/tmr/7_pwm_output/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/tmr/7_pwm_output/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/7_pwm_output/inc/at32f435_437_int.h b/project/at_start_f437/examples/tmr/7_pwm_output/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/tmr/7_pwm_output/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/tmr/7_pwm_output/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/7_pwm_output/readme.txt b/project/at_start_f437/examples/tmr/7_pwm_output/readme.txt index ebe565e2..1c8bc966 100644 --- a/project/at_start_f437/examples/tmr/7_pwm_output/readme.txt +++ b/project/at_start_f437/examples/tmr/7_pwm_output/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/tmr/7_pwm_output/src/at32f435_437_clock.c b/project/at_start_f437/examples/tmr/7_pwm_output/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/tmr/7_pwm_output/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/tmr/7_pwm_output/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/7_pwm_output/src/at32f435_437_int.c b/project/at_start_f437/examples/tmr/7_pwm_output/src/at32f435_437_int.c index 6af742b7..d3c006d8 100644 --- a/project/at_start_f437/examples/tmr/7_pwm_output/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/tmr/7_pwm_output/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/7_pwm_output/src/main.c b/project/at_start_f437/examples/tmr/7_pwm_output/src/main.c index 89500644..1af7dc76 100644 --- a/project/at_start_f437/examples/tmr/7_pwm_output/src/main.c +++ b/project/at_start_f437/examples/tmr/7_pwm_output/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/cascade_synchro/inc/at32f435_437_clock.h b/project/at_start_f437/examples/tmr/cascade_synchro/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/tmr/cascade_synchro/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/tmr/cascade_synchro/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/cascade_synchro/inc/at32f435_437_conf.h b/project/at_start_f437/examples/tmr/cascade_synchro/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/tmr/cascade_synchro/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/tmr/cascade_synchro/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/cascade_synchro/inc/at32f435_437_int.h b/project/at_start_f437/examples/tmr/cascade_synchro/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/tmr/cascade_synchro/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/tmr/cascade_synchro/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/cascade_synchro/readme.txt b/project/at_start_f437/examples/tmr/cascade_synchro/readme.txt index 4aa9303d..d5a805a3 100644 --- a/project/at_start_f437/examples/tmr/cascade_synchro/readme.txt +++ b/project/at_start_f437/examples/tmr/cascade_synchro/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/tmr/cascade_synchro/src/at32f435_437_clock.c b/project/at_start_f437/examples/tmr/cascade_synchro/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/tmr/cascade_synchro/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/tmr/cascade_synchro/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/cascade_synchro/src/at32f435_437_int.c b/project/at_start_f437/examples/tmr/cascade_synchro/src/at32f435_437_int.c index e37a39ca..9dc64590 100644 --- a/project/at_start_f437/examples/tmr/cascade_synchro/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/tmr/cascade_synchro/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/cascade_synchro/src/main.c b/project/at_start_f437/examples/tmr/cascade_synchro/src/main.c index ac271c5e..d8ff5ea2 100644 --- a/project/at_start_f437/examples/tmr/cascade_synchro/src/main.c +++ b/project/at_start_f437/examples/tmr/cascade_synchro/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/complementary_signals/inc/at32f435_437_clock.h b/project/at_start_f437/examples/tmr/complementary_signals/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/tmr/complementary_signals/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/tmr/complementary_signals/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/complementary_signals/inc/at32f435_437_conf.h b/project/at_start_f437/examples/tmr/complementary_signals/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/tmr/complementary_signals/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/tmr/complementary_signals/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/complementary_signals/inc/at32f435_437_int.h b/project/at_start_f437/examples/tmr/complementary_signals/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/tmr/complementary_signals/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/tmr/complementary_signals/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/complementary_signals/readme.txt b/project/at_start_f437/examples/tmr/complementary_signals/readme.txt index c7af8794..51cad7c3 100644 --- a/project/at_start_f437/examples/tmr/complementary_signals/readme.txt +++ b/project/at_start_f437/examples/tmr/complementary_signals/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/tmr/complementary_signals/src/at32f435_437_clock.c b/project/at_start_f437/examples/tmr/complementary_signals/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/tmr/complementary_signals/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/tmr/complementary_signals/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/complementary_signals/src/at32f435_437_int.c b/project/at_start_f437/examples/tmr/complementary_signals/src/at32f435_437_int.c index 40dfc5d0..0daab28f 100644 --- a/project/at_start_f437/examples/tmr/complementary_signals/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/tmr/complementary_signals/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/complementary_signals/src/main.c b/project/at_start_f437/examples/tmr/complementary_signals/src/main.c index 4564feed..c7a501c4 100644 --- a/project/at_start_f437/examples/tmr/complementary_signals/src/main.c +++ b/project/at_start_f437/examples/tmr/complementary_signals/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/dma/inc/at32f435_437_clock.h b/project/at_start_f437/examples/tmr/dma/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/tmr/dma/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/tmr/dma/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/dma/inc/at32f435_437_conf.h b/project/at_start_f437/examples/tmr/dma/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/tmr/dma/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/tmr/dma/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/dma/inc/at32f435_437_int.h b/project/at_start_f437/examples/tmr/dma/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/tmr/dma/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/tmr/dma/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/dma/readme.txt b/project/at_start_f437/examples/tmr/dma/readme.txt index 50163201..5b54727d 100644 --- a/project/at_start_f437/examples/tmr/dma/readme.txt +++ b/project/at_start_f437/examples/tmr/dma/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/tmr/dma/src/at32f435_437_clock.c b/project/at_start_f437/examples/tmr/dma/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/tmr/dma/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/tmr/dma/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/dma/src/at32f435_437_int.c b/project/at_start_f437/examples/tmr/dma/src/at32f435_437_int.c index ba91360d..50d34093 100644 --- a/project/at_start_f437/examples/tmr/dma/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/tmr/dma/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/dma/src/main.c b/project/at_start_f437/examples/tmr/dma/src/main.c index 9f52438a..55838a78 100644 --- a/project/at_start_f437/examples/tmr/dma/src/main.c +++ b/project/at_start_f437/examples/tmr/dma/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/dma_burst/inc/at32f435_437_clock.h b/project/at_start_f437/examples/tmr/dma_burst/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/tmr/dma_burst/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/tmr/dma_burst/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/dma_burst/inc/at32f435_437_conf.h b/project/at_start_f437/examples/tmr/dma_burst/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/tmr/dma_burst/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/tmr/dma_burst/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/dma_burst/inc/at32f435_437_int.h b/project/at_start_f437/examples/tmr/dma_burst/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/tmr/dma_burst/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/tmr/dma_burst/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/dma_burst/readme.txt b/project/at_start_f437/examples/tmr/dma_burst/readme.txt index d9a19164..ffd0ba27 100644 --- a/project/at_start_f437/examples/tmr/dma_burst/readme.txt +++ b/project/at_start_f437/examples/tmr/dma_burst/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/tmr/dma_burst/src/at32f435_437_clock.c b/project/at_start_f437/examples/tmr/dma_burst/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/tmr/dma_burst/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/tmr/dma_burst/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/dma_burst/src/at32f435_437_int.c b/project/at_start_f437/examples/tmr/dma_burst/src/at32f435_437_int.c index c85f32e1..6535c391 100644 --- a/project/at_start_f437/examples/tmr/dma_burst/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/tmr/dma_burst/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/dma_burst/src/main.c b/project/at_start_f437/examples/tmr/dma_burst/src/main.c index 10f4e00d..898d7276 100644 --- a/project/at_start_f437/examples/tmr/dma_burst/src/main.c +++ b/project/at_start_f437/examples/tmr/dma_burst/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/encoder_tmr2/inc/at32f435_437_clock.h b/project/at_start_f437/examples/tmr/encoder_tmr2/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/tmr/encoder_tmr2/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/tmr/encoder_tmr2/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/encoder_tmr2/inc/at32f435_437_conf.h b/project/at_start_f437/examples/tmr/encoder_tmr2/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/tmr/encoder_tmr2/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/tmr/encoder_tmr2/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/encoder_tmr2/inc/at32f435_437_int.h b/project/at_start_f437/examples/tmr/encoder_tmr2/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/tmr/encoder_tmr2/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/tmr/encoder_tmr2/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/encoder_tmr2/readme.txt b/project/at_start_f437/examples/tmr/encoder_tmr2/readme.txt index ce2b2218..fa0cbfce 100644 --- a/project/at_start_f437/examples/tmr/encoder_tmr2/readme.txt +++ b/project/at_start_f437/examples/tmr/encoder_tmr2/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/tmr/encoder_tmr2/src/at32f435_437_clock.c b/project/at_start_f437/examples/tmr/encoder_tmr2/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/tmr/encoder_tmr2/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/tmr/encoder_tmr2/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/encoder_tmr2/src/at32f435_437_int.c b/project/at_start_f437/examples/tmr/encoder_tmr2/src/at32f435_437_int.c index 48b1118d..a7401ecd 100644 --- a/project/at_start_f437/examples/tmr/encoder_tmr2/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/tmr/encoder_tmr2/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/encoder_tmr2/src/main.c b/project/at_start_f437/examples/tmr/encoder_tmr2/src/main.c index 30cd35f9..dac16379 100644 --- a/project/at_start_f437/examples/tmr/encoder_tmr2/src/main.c +++ b/project/at_start_f437/examples/tmr/encoder_tmr2/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/external_clock/inc/at32f435_437_clock.h b/project/at_start_f437/examples/tmr/external_clock/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/tmr/external_clock/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/tmr/external_clock/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/external_clock/inc/at32f435_437_conf.h b/project/at_start_f437/examples/tmr/external_clock/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/tmr/external_clock/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/tmr/external_clock/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/external_clock/inc/at32f435_437_int.h b/project/at_start_f437/examples/tmr/external_clock/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/tmr/external_clock/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/tmr/external_clock/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/external_clock/readme.txt b/project/at_start_f437/examples/tmr/external_clock/readme.txt index 6b5c747f..342e125f 100644 --- a/project/at_start_f437/examples/tmr/external_clock/readme.txt +++ b/project/at_start_f437/examples/tmr/external_clock/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/tmr/external_clock/src/at32f435_437_clock.c b/project/at_start_f437/examples/tmr/external_clock/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/tmr/external_clock/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/tmr/external_clock/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/external_clock/src/at32f435_437_int.c b/project/at_start_f437/examples/tmr/external_clock/src/at32f435_437_int.c index 5ced1e72..8291e582 100644 --- a/project/at_start_f437/examples/tmr/external_clock/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/tmr/external_clock/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/external_clock/src/main.c b/project/at_start_f437/examples/tmr/external_clock/src/main.c index c1c12ccb..2a3347b7 100644 --- a/project/at_start_f437/examples/tmr/external_clock/src/main.c +++ b/project/at_start_f437/examples/tmr/external_clock/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/hall_xor_tmr2/inc/at32f435_437_clock.h b/project/at_start_f437/examples/tmr/hall_xor_tmr2/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/tmr/hall_xor_tmr2/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/tmr/hall_xor_tmr2/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/hall_xor_tmr2/inc/at32f435_437_conf.h b/project/at_start_f437/examples/tmr/hall_xor_tmr2/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/tmr/hall_xor_tmr2/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/tmr/hall_xor_tmr2/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/hall_xor_tmr2/inc/at32f435_437_int.h b/project/at_start_f437/examples/tmr/hall_xor_tmr2/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/tmr/hall_xor_tmr2/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/tmr/hall_xor_tmr2/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/hall_xor_tmr2/readme.txt b/project/at_start_f437/examples/tmr/hall_xor_tmr2/readme.txt index d98aa001..94d7de2e 100644 --- a/project/at_start_f437/examples/tmr/hall_xor_tmr2/readme.txt +++ b/project/at_start_f437/examples/tmr/hall_xor_tmr2/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/tmr/hall_xor_tmr2/src/at32f435_437_clock.c b/project/at_start_f437/examples/tmr/hall_xor_tmr2/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/tmr/hall_xor_tmr2/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/tmr/hall_xor_tmr2/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/hall_xor_tmr2/src/at32f435_437_int.c b/project/at_start_f437/examples/tmr/hall_xor_tmr2/src/at32f435_437_int.c index 9c2559df..74a3fa20 100644 --- a/project/at_start_f437/examples/tmr/hall_xor_tmr2/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/tmr/hall_xor_tmr2/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/hall_xor_tmr2/src/main.c b/project/at_start_f437/examples/tmr/hall_xor_tmr2/src/main.c index 27cabc25..2739d4f7 100644 --- a/project/at_start_f437/examples/tmr/hall_xor_tmr2/src/main.c +++ b/project/at_start_f437/examples/tmr/hall_xor_tmr2/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/hang_mode/inc/at32f435_437_clock.h b/project/at_start_f437/examples/tmr/hang_mode/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/tmr/hang_mode/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/tmr/hang_mode/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/hang_mode/inc/at32f435_437_conf.h b/project/at_start_f437/examples/tmr/hang_mode/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/tmr/hang_mode/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/tmr/hang_mode/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/hang_mode/inc/at32f435_437_int.h b/project/at_start_f437/examples/tmr/hang_mode/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/tmr/hang_mode/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/tmr/hang_mode/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/hang_mode/readme.txt b/project/at_start_f437/examples/tmr/hang_mode/readme.txt index d0f2b96d..b2780dbe 100644 --- a/project/at_start_f437/examples/tmr/hang_mode/readme.txt +++ b/project/at_start_f437/examples/tmr/hang_mode/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/tmr/hang_mode/src/at32f435_437_clock.c b/project/at_start_f437/examples/tmr/hang_mode/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/tmr/hang_mode/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/tmr/hang_mode/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/hang_mode/src/at32f435_437_int.c b/project/at_start_f437/examples/tmr/hang_mode/src/at32f435_437_int.c index abfe91f7..156509e3 100644 --- a/project/at_start_f437/examples/tmr/hang_mode/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/tmr/hang_mode/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/hang_mode/src/main.c b/project/at_start_f437/examples/tmr/hang_mode/src/main.c index 295e2e2e..8ab769c6 100644 --- a/project/at_start_f437/examples/tmr/hang_mode/src/main.c +++ b/project/at_start_f437/examples/tmr/hang_mode/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/input_capture/inc/at32f435_437_clock.h b/project/at_start_f437/examples/tmr/input_capture/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/tmr/input_capture/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/tmr/input_capture/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/input_capture/inc/at32f435_437_conf.h b/project/at_start_f437/examples/tmr/input_capture/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/tmr/input_capture/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/tmr/input_capture/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/input_capture/inc/at32f435_437_int.h b/project/at_start_f437/examples/tmr/input_capture/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/tmr/input_capture/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/tmr/input_capture/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/input_capture/readme.txt b/project/at_start_f437/examples/tmr/input_capture/readme.txt index 818e72e5..463652d7 100644 --- a/project/at_start_f437/examples/tmr/input_capture/readme.txt +++ b/project/at_start_f437/examples/tmr/input_capture/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/tmr/input_capture/src/at32f435_437_clock.c b/project/at_start_f437/examples/tmr/input_capture/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/tmr/input_capture/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/tmr/input_capture/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/input_capture/src/at32f435_437_int.c b/project/at_start_f437/examples/tmr/input_capture/src/at32f435_437_int.c index ec41ab38..b2b04a64 100644 --- a/project/at_start_f437/examples/tmr/input_capture/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/tmr/input_capture/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/input_capture/src/main.c b/project/at_start_f437/examples/tmr/input_capture/src/main.c index 384364b3..996ccd98 100644 --- a/project/at_start_f437/examples/tmr/input_capture/src/main.c +++ b/project/at_start_f437/examples/tmr/input_capture/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/oc_high/inc/at32f435_437_clock.h b/project/at_start_f437/examples/tmr/oc_high/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/tmr/oc_high/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/tmr/oc_high/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/oc_high/inc/at32f435_437_conf.h b/project/at_start_f437/examples/tmr/oc_high/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/tmr/oc_high/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/tmr/oc_high/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/oc_high/inc/at32f435_437_int.h b/project/at_start_f437/examples/tmr/oc_high/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/tmr/oc_high/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/tmr/oc_high/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/oc_high/readme.txt b/project/at_start_f437/examples/tmr/oc_high/readme.txt index 93a61429..af149c36 100644 --- a/project/at_start_f437/examples/tmr/oc_high/readme.txt +++ b/project/at_start_f437/examples/tmr/oc_high/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/tmr/oc_high/src/at32f435_437_clock.c b/project/at_start_f437/examples/tmr/oc_high/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/tmr/oc_high/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/tmr/oc_high/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/oc_high/src/at32f435_437_int.c b/project/at_start_f437/examples/tmr/oc_high/src/at32f435_437_int.c index a307dfbd..30a47278 100644 --- a/project/at_start_f437/examples/tmr/oc_high/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/tmr/oc_high/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/oc_high/src/main.c b/project/at_start_f437/examples/tmr/oc_high/src/main.c index 8ba2eb7f..475aad93 100644 --- a/project/at_start_f437/examples/tmr/oc_high/src/main.c +++ b/project/at_start_f437/examples/tmr/oc_high/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/oc_low/inc/at32f435_437_clock.h b/project/at_start_f437/examples/tmr/oc_low/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/tmr/oc_low/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/tmr/oc_low/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/oc_low/inc/at32f435_437_conf.h b/project/at_start_f437/examples/tmr/oc_low/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/tmr/oc_low/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/tmr/oc_low/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/oc_low/inc/at32f435_437_int.h b/project/at_start_f437/examples/tmr/oc_low/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/tmr/oc_low/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/tmr/oc_low/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/oc_low/readme.txt b/project/at_start_f437/examples/tmr/oc_low/readme.txt index 26f08e86..d179a9f3 100644 --- a/project/at_start_f437/examples/tmr/oc_low/readme.txt +++ b/project/at_start_f437/examples/tmr/oc_low/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/tmr/oc_low/src/at32f435_437_clock.c b/project/at_start_f437/examples/tmr/oc_low/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/tmr/oc_low/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/tmr/oc_low/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/oc_low/src/at32f435_437_int.c b/project/at_start_f437/examples/tmr/oc_low/src/at32f435_437_int.c index f8e4ead4..37fe89b2 100644 --- a/project/at_start_f437/examples/tmr/oc_low/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/tmr/oc_low/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/oc_low/src/main.c b/project/at_start_f437/examples/tmr/oc_low/src/main.c index b421508e..8d9fe3ab 100644 --- a/project/at_start_f437/examples/tmr/oc_low/src/main.c +++ b/project/at_start_f437/examples/tmr/oc_low/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/oc_toggle_tmr3/inc/at32f435_437_clock.h b/project/at_start_f437/examples/tmr/oc_toggle_tmr3/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/tmr/oc_toggle_tmr3/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/tmr/oc_toggle_tmr3/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/oc_toggle_tmr3/inc/at32f435_437_conf.h b/project/at_start_f437/examples/tmr/oc_toggle_tmr3/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/tmr/oc_toggle_tmr3/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/tmr/oc_toggle_tmr3/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/oc_toggle_tmr3/inc/at32f435_437_int.h b/project/at_start_f437/examples/tmr/oc_toggle_tmr3/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/tmr/oc_toggle_tmr3/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/tmr/oc_toggle_tmr3/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/oc_toggle_tmr3/readme.txt b/project/at_start_f437/examples/tmr/oc_toggle_tmr3/readme.txt index 04ae45e1..8382bdf9 100644 --- a/project/at_start_f437/examples/tmr/oc_toggle_tmr3/readme.txt +++ b/project/at_start_f437/examples/tmr/oc_toggle_tmr3/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/tmr/oc_toggle_tmr3/src/at32f435_437_clock.c b/project/at_start_f437/examples/tmr/oc_toggle_tmr3/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/tmr/oc_toggle_tmr3/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/tmr/oc_toggle_tmr3/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/oc_toggle_tmr3/src/at32f435_437_int.c b/project/at_start_f437/examples/tmr/oc_toggle_tmr3/src/at32f435_437_int.c index 17a267ed..f6b64ffd 100644 --- a/project/at_start_f437/examples/tmr/oc_toggle_tmr3/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/tmr/oc_toggle_tmr3/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/oc_toggle_tmr3/src/main.c b/project/at_start_f437/examples/tmr/oc_toggle_tmr3/src/main.c index 701a9284..46f01306 100644 --- a/project/at_start_f437/examples/tmr/oc_toggle_tmr3/src/main.c +++ b/project/at_start_f437/examples/tmr/oc_toggle_tmr3/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/oc_toggle_tmr9/inc/at32f435_437_clock.h b/project/at_start_f437/examples/tmr/oc_toggle_tmr9/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/tmr/oc_toggle_tmr9/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/tmr/oc_toggle_tmr9/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/oc_toggle_tmr9/inc/at32f435_437_conf.h b/project/at_start_f437/examples/tmr/oc_toggle_tmr9/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/tmr/oc_toggle_tmr9/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/tmr/oc_toggle_tmr9/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/oc_toggle_tmr9/inc/at32f435_437_int.h b/project/at_start_f437/examples/tmr/oc_toggle_tmr9/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/tmr/oc_toggle_tmr9/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/tmr/oc_toggle_tmr9/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/oc_toggle_tmr9/readme.txt b/project/at_start_f437/examples/tmr/oc_toggle_tmr9/readme.txt index 7ee111cc..6b232f21 100644 --- a/project/at_start_f437/examples/tmr/oc_toggle_tmr9/readme.txt +++ b/project/at_start_f437/examples/tmr/oc_toggle_tmr9/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/tmr/oc_toggle_tmr9/src/at32f435_437_clock.c b/project/at_start_f437/examples/tmr/oc_toggle_tmr9/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/tmr/oc_toggle_tmr9/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/tmr/oc_toggle_tmr9/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/oc_toggle_tmr9/src/at32f435_437_int.c b/project/at_start_f437/examples/tmr/oc_toggle_tmr9/src/at32f435_437_int.c index 882e94cb..54a60779 100644 --- a/project/at_start_f437/examples/tmr/oc_toggle_tmr9/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/tmr/oc_toggle_tmr9/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/oc_toggle_tmr9/src/main.c b/project/at_start_f437/examples/tmr/oc_toggle_tmr9/src/main.c index 5954adea..6324bdb6 100644 --- a/project/at_start_f437/examples/tmr/oc_toggle_tmr9/src/main.c +++ b/project/at_start_f437/examples/tmr/oc_toggle_tmr9/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/one_cycle/inc/at32f435_437_clock.h b/project/at_start_f437/examples/tmr/one_cycle/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/tmr/one_cycle/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/tmr/one_cycle/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/one_cycle/inc/at32f435_437_conf.h b/project/at_start_f437/examples/tmr/one_cycle/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/tmr/one_cycle/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/tmr/one_cycle/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/one_cycle/inc/at32f435_437_int.h b/project/at_start_f437/examples/tmr/one_cycle/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/tmr/one_cycle/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/tmr/one_cycle/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/one_cycle/readme.txt b/project/at_start_f437/examples/tmr/one_cycle/readme.txt index 8adc990d..5c175348 100644 --- a/project/at_start_f437/examples/tmr/one_cycle/readme.txt +++ b/project/at_start_f437/examples/tmr/one_cycle/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/tmr/one_cycle/src/at32f435_437_clock.c b/project/at_start_f437/examples/tmr/one_cycle/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/tmr/one_cycle/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/tmr/one_cycle/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/one_cycle/src/at32f435_437_int.c b/project/at_start_f437/examples/tmr/one_cycle/src/at32f435_437_int.c index 626854da..caa53738 100644 --- a/project/at_start_f437/examples/tmr/one_cycle/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/tmr/one_cycle/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/one_cycle/src/main.c b/project/at_start_f437/examples/tmr/one_cycle/src/main.c index 0c2e1e85..b7ae4c87 100644 --- a/project/at_start_f437/examples/tmr/one_cycle/src/main.c +++ b/project/at_start_f437/examples/tmr/one_cycle/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/parallel_synchro/inc/at32f435_437_clock.h b/project/at_start_f437/examples/tmr/parallel_synchro/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/tmr/parallel_synchro/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/tmr/parallel_synchro/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/parallel_synchro/inc/at32f435_437_conf.h b/project/at_start_f437/examples/tmr/parallel_synchro/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/tmr/parallel_synchro/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/tmr/parallel_synchro/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/parallel_synchro/inc/at32f435_437_int.h b/project/at_start_f437/examples/tmr/parallel_synchro/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/tmr/parallel_synchro/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/tmr/parallel_synchro/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/parallel_synchro/readme.txt b/project/at_start_f437/examples/tmr/parallel_synchro/readme.txt index 8b50035d..ae9353f4 100644 --- a/project/at_start_f437/examples/tmr/parallel_synchro/readme.txt +++ b/project/at_start_f437/examples/tmr/parallel_synchro/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/tmr/parallel_synchro/src/at32f435_437_clock.c b/project/at_start_f437/examples/tmr/parallel_synchro/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/tmr/parallel_synchro/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/tmr/parallel_synchro/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/parallel_synchro/src/at32f435_437_int.c b/project/at_start_f437/examples/tmr/parallel_synchro/src/at32f435_437_int.c index 9ef3e161..b92cd407 100644 --- a/project/at_start_f437/examples/tmr/parallel_synchro/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/tmr/parallel_synchro/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/parallel_synchro/src/main.c b/project/at_start_f437/examples/tmr/parallel_synchro/src/main.c index 94007d3e..44cea903 100644 --- a/project/at_start_f437/examples/tmr/parallel_synchro/src/main.c +++ b/project/at_start_f437/examples/tmr/parallel_synchro/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/pwm_input/inc/at32f435_437_clock.h b/project/at_start_f437/examples/tmr/pwm_input/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/tmr/pwm_input/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/tmr/pwm_input/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/pwm_input/inc/at32f435_437_conf.h b/project/at_start_f437/examples/tmr/pwm_input/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/tmr/pwm_input/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/tmr/pwm_input/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/pwm_input/inc/at32f435_437_int.h b/project/at_start_f437/examples/tmr/pwm_input/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/tmr/pwm_input/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/tmr/pwm_input/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/pwm_input/readme.txt b/project/at_start_f437/examples/tmr/pwm_input/readme.txt index 58fde09a..0b1d660a 100644 --- a/project/at_start_f437/examples/tmr/pwm_input/readme.txt +++ b/project/at_start_f437/examples/tmr/pwm_input/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/tmr/pwm_input/src/at32f435_437_clock.c b/project/at_start_f437/examples/tmr/pwm_input/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/tmr/pwm_input/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/tmr/pwm_input/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/pwm_input/src/at32f435_437_int.c b/project/at_start_f437/examples/tmr/pwm_input/src/at32f435_437_int.c index eb2fe772..117b738f 100644 --- a/project/at_start_f437/examples/tmr/pwm_input/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/tmr/pwm_input/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/pwm_input/src/main.c b/project/at_start_f437/examples/tmr/pwm_input/src/main.c index 1103b6ec..51e2ae9f 100644 --- a/project/at_start_f437/examples/tmr/pwm_input/src/main.c +++ b/project/at_start_f437/examples/tmr/pwm_input/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/pwm_input_dma/inc/at32f435_437_clock.h b/project/at_start_f437/examples/tmr/pwm_input_dma/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/tmr/pwm_input_dma/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/tmr/pwm_input_dma/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/pwm_input_dma/inc/at32f435_437_conf.h b/project/at_start_f437/examples/tmr/pwm_input_dma/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/tmr/pwm_input_dma/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/tmr/pwm_input_dma/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/pwm_input_dma/inc/at32f435_437_int.h b/project/at_start_f437/examples/tmr/pwm_input_dma/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/tmr/pwm_input_dma/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/tmr/pwm_input_dma/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/pwm_input_dma/readme.txt b/project/at_start_f437/examples/tmr/pwm_input_dma/readme.txt index 65882022..40682b76 100644 --- a/project/at_start_f437/examples/tmr/pwm_input_dma/readme.txt +++ b/project/at_start_f437/examples/tmr/pwm_input_dma/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/tmr/pwm_input_dma/src/at32f435_437_clock.c b/project/at_start_f437/examples/tmr/pwm_input_dma/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/tmr/pwm_input_dma/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/tmr/pwm_input_dma/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/pwm_input_dma/src/at32f435_437_int.c b/project/at_start_f437/examples/tmr/pwm_input_dma/src/at32f435_437_int.c index 1c3d506c..21ab57f9 100644 --- a/project/at_start_f437/examples/tmr/pwm_input_dma/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/tmr/pwm_input_dma/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/pwm_input_dma/src/main.c b/project/at_start_f437/examples/tmr/pwm_input_dma/src/main.c index ed4832fc..729b892b 100644 --- a/project/at_start_f437/examples/tmr/pwm_input_dma/src/main.c +++ b/project/at_start_f437/examples/tmr/pwm_input_dma/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/pwm_output_simulate/inc/at32f435_437_clock.h b/project/at_start_f437/examples/tmr/pwm_output_simulate/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/tmr/pwm_output_simulate/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/tmr/pwm_output_simulate/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/pwm_output_simulate/inc/at32f435_437_conf.h b/project/at_start_f437/examples/tmr/pwm_output_simulate/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/tmr/pwm_output_simulate/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/tmr/pwm_output_simulate/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/pwm_output_simulate/inc/at32f435_437_int.h b/project/at_start_f437/examples/tmr/pwm_output_simulate/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/tmr/pwm_output_simulate/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/tmr/pwm_output_simulate/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/pwm_output_simulate/readme.txt b/project/at_start_f437/examples/tmr/pwm_output_simulate/readme.txt index bbe5ee06..7cb33c62 100644 --- a/project/at_start_f437/examples/tmr/pwm_output_simulate/readme.txt +++ b/project/at_start_f437/examples/tmr/pwm_output_simulate/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/tmr/pwm_output_simulate/src/at32f435_437_clock.c b/project/at_start_f437/examples/tmr/pwm_output_simulate/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/tmr/pwm_output_simulate/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/tmr/pwm_output_simulate/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/pwm_output_simulate/src/at32f435_437_int.c b/project/at_start_f437/examples/tmr/pwm_output_simulate/src/at32f435_437_int.c index 6fbea37e..514a04e1 100644 --- a/project/at_start_f437/examples/tmr/pwm_output_simulate/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/tmr/pwm_output_simulate/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/pwm_output_simulate/src/main.c b/project/at_start_f437/examples/tmr/pwm_output_simulate/src/main.c index 3b68811b..c02da1c7 100644 --- a/project/at_start_f437/examples/tmr/pwm_output_simulate/src/main.c +++ b/project/at_start_f437/examples/tmr/pwm_output_simulate/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/pwm_output_tmr10/inc/at32f435_437_clock.h b/project/at_start_f437/examples/tmr/pwm_output_tmr10/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/tmr/pwm_output_tmr10/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/tmr/pwm_output_tmr10/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/pwm_output_tmr10/inc/at32f435_437_conf.h b/project/at_start_f437/examples/tmr/pwm_output_tmr10/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/tmr/pwm_output_tmr10/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/tmr/pwm_output_tmr10/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/pwm_output_tmr10/inc/at32f435_437_int.h b/project/at_start_f437/examples/tmr/pwm_output_tmr10/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/tmr/pwm_output_tmr10/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/tmr/pwm_output_tmr10/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/pwm_output_tmr10/readme.txt b/project/at_start_f437/examples/tmr/pwm_output_tmr10/readme.txt index 0957b06a..7c2633e1 100644 --- a/project/at_start_f437/examples/tmr/pwm_output_tmr10/readme.txt +++ b/project/at_start_f437/examples/tmr/pwm_output_tmr10/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/tmr/pwm_output_tmr10/src/at32f435_437_clock.c b/project/at_start_f437/examples/tmr/pwm_output_tmr10/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/tmr/pwm_output_tmr10/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/tmr/pwm_output_tmr10/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/pwm_output_tmr10/src/at32f435_437_int.c b/project/at_start_f437/examples/tmr/pwm_output_tmr10/src/at32f435_437_int.c index 85fee443..6759b346 100644 --- a/project/at_start_f437/examples/tmr/pwm_output_tmr10/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/tmr/pwm_output_tmr10/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/pwm_output_tmr10/src/main.c b/project/at_start_f437/examples/tmr/pwm_output_tmr10/src/main.c index 2180dc07..30a2ba8d 100644 --- a/project/at_start_f437/examples/tmr/pwm_output_tmr10/src/main.c +++ b/project/at_start_f437/examples/tmr/pwm_output_tmr10/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/pwm_output_tmr3/inc/at32f435_437_clock.h b/project/at_start_f437/examples/tmr/pwm_output_tmr3/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/tmr/pwm_output_tmr3/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/tmr/pwm_output_tmr3/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/pwm_output_tmr3/inc/at32f435_437_conf.h b/project/at_start_f437/examples/tmr/pwm_output_tmr3/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/tmr/pwm_output_tmr3/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/tmr/pwm_output_tmr3/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/pwm_output_tmr3/inc/at32f435_437_int.h b/project/at_start_f437/examples/tmr/pwm_output_tmr3/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/tmr/pwm_output_tmr3/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/tmr/pwm_output_tmr3/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/pwm_output_tmr3/readme.txt b/project/at_start_f437/examples/tmr/pwm_output_tmr3/readme.txt index 7e0b44dd..89a627ea 100644 --- a/project/at_start_f437/examples/tmr/pwm_output_tmr3/readme.txt +++ b/project/at_start_f437/examples/tmr/pwm_output_tmr3/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/tmr/pwm_output_tmr3/src/at32f435_437_clock.c b/project/at_start_f437/examples/tmr/pwm_output_tmr3/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/tmr/pwm_output_tmr3/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/tmr/pwm_output_tmr3/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/pwm_output_tmr3/src/at32f435_437_int.c b/project/at_start_f437/examples/tmr/pwm_output_tmr3/src/at32f435_437_int.c index dfc963b6..acfb6343 100644 --- a/project/at_start_f437/examples/tmr/pwm_output_tmr3/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/tmr/pwm_output_tmr3/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/pwm_output_tmr3/src/main.c b/project/at_start_f437/examples/tmr/pwm_output_tmr3/src/main.c index c26cd931..b0bbeaac 100644 --- a/project/at_start_f437/examples/tmr/pwm_output_tmr3/src/main.c +++ b/project/at_start_f437/examples/tmr/pwm_output_tmr3/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/timer_base/inc/at32f435_437_clock.h b/project/at_start_f437/examples/tmr/timer_base/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/tmr/timer_base/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/tmr/timer_base/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/timer_base/inc/at32f435_437_conf.h b/project/at_start_f437/examples/tmr/timer_base/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/tmr/timer_base/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/tmr/timer_base/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/timer_base/inc/at32f435_437_int.h b/project/at_start_f437/examples/tmr/timer_base/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/tmr/timer_base/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/tmr/timer_base/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/timer_base/readme.txt b/project/at_start_f437/examples/tmr/timer_base/readme.txt index 4f8211d8..db9240ef 100644 --- a/project/at_start_f437/examples/tmr/timer_base/readme.txt +++ b/project/at_start_f437/examples/tmr/timer_base/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/tmr/timer_base/src/at32f435_437_clock.c b/project/at_start_f437/examples/tmr/timer_base/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/tmr/timer_base/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/tmr/timer_base/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/timer_base/src/at32f435_437_int.c b/project/at_start_f437/examples/tmr/timer_base/src/at32f435_437_int.c index a22c8179..fd569aa6 100644 --- a/project/at_start_f437/examples/tmr/timer_base/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/tmr/timer_base/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/timer_base/src/main.c b/project/at_start_f437/examples/tmr/timer_base/src/main.c index 7c356c9c..c909003e 100644 --- a/project/at_start_f437/examples/tmr/timer_base/src/main.c +++ b/project/at_start_f437/examples/tmr/timer_base/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/tmr1_synchro/inc/at32f435_437_clock.h b/project/at_start_f437/examples/tmr/tmr1_synchro/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/tmr/tmr1_synchro/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/tmr/tmr1_synchro/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/tmr1_synchro/inc/at32f435_437_conf.h b/project/at_start_f437/examples/tmr/tmr1_synchro/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/tmr/tmr1_synchro/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/tmr/tmr1_synchro/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/tmr1_synchro/inc/at32f435_437_int.h b/project/at_start_f437/examples/tmr/tmr1_synchro/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/tmr/tmr1_synchro/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/tmr/tmr1_synchro/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/tmr1_synchro/readme.txt b/project/at_start_f437/examples/tmr/tmr1_synchro/readme.txt index 5e3229e9..7365e955 100644 --- a/project/at_start_f437/examples/tmr/tmr1_synchro/readme.txt +++ b/project/at_start_f437/examples/tmr/tmr1_synchro/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/tmr/tmr1_synchro/src/at32f435_437_clock.c b/project/at_start_f437/examples/tmr/tmr1_synchro/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/tmr/tmr1_synchro/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/tmr/tmr1_synchro/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/tmr1_synchro/src/at32f435_437_int.c b/project/at_start_f437/examples/tmr/tmr1_synchro/src/at32f435_437_int.c index 251bd3df..3e71d131 100644 --- a/project/at_start_f437/examples/tmr/tmr1_synchro/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/tmr/tmr1_synchro/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/tmr1_synchro/src/main.c b/project/at_start_f437/examples/tmr/tmr1_synchro/src/main.c index 3aced486..d94db983 100644 --- a/project/at_start_f437/examples/tmr/tmr1_synchro/src/main.c +++ b/project/at_start_f437/examples/tmr/tmr1_synchro/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/tmr2_32bit/inc/at32f435_437_clock.h b/project/at_start_f437/examples/tmr/tmr2_32bit/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/tmr/tmr2_32bit/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/tmr/tmr2_32bit/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/tmr2_32bit/inc/at32f435_437_conf.h b/project/at_start_f437/examples/tmr/tmr2_32bit/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/tmr/tmr2_32bit/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/tmr/tmr2_32bit/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/tmr2_32bit/inc/at32f435_437_int.h b/project/at_start_f437/examples/tmr/tmr2_32bit/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/tmr/tmr2_32bit/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/tmr/tmr2_32bit/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/tmr2_32bit/readme.txt b/project/at_start_f437/examples/tmr/tmr2_32bit/readme.txt index 53ea3657..ae2e1756 100644 --- a/project/at_start_f437/examples/tmr/tmr2_32bit/readme.txt +++ b/project/at_start_f437/examples/tmr/tmr2_32bit/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/tmr/tmr2_32bit/src/at32f435_437_clock.c b/project/at_start_f437/examples/tmr/tmr2_32bit/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/tmr/tmr2_32bit/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/tmr/tmr2_32bit/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/tmr2_32bit/src/at32f435_437_int.c b/project/at_start_f437/examples/tmr/tmr2_32bit/src/at32f435_437_int.c index 5d7dd3bd..f1f146c0 100644 --- a/project/at_start_f437/examples/tmr/tmr2_32bit/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/tmr/tmr2_32bit/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/tmr/tmr2_32bit/src/main.c b/project/at_start_f437/examples/tmr/tmr2_32bit/src/main.c index 2501fd7a..48494b1d 100644 --- a/project/at_start_f437/examples/tmr/tmr2_32bit/src/main.c +++ b/project/at_start_f437/examples/tmr/tmr2_32bit/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usart/half_duplex/inc/at32f435_437_clock.h b/project/at_start_f437/examples/usart/half_duplex/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/usart/half_duplex/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/usart/half_duplex/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usart/half_duplex/inc/at32f435_437_conf.h b/project/at_start_f437/examples/usart/half_duplex/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/usart/half_duplex/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/usart/half_duplex/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usart/half_duplex/inc/at32f435_437_int.h b/project/at_start_f437/examples/usart/half_duplex/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/usart/half_duplex/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/usart/half_duplex/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usart/half_duplex/readme.txt b/project/at_start_f437/examples/usart/half_duplex/readme.txt index 706ade6b..3c973643 100644 --- a/project/at_start_f437/examples/usart/half_duplex/readme.txt +++ b/project/at_start_f437/examples/usart/half_duplex/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/usart/half_duplex/src/at32f435_437_clock.c b/project/at_start_f437/examples/usart/half_duplex/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/usart/half_duplex/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/usart/half_duplex/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usart/half_duplex/src/at32f435_437_int.c b/project/at_start_f437/examples/usart/half_duplex/src/at32f435_437_int.c index 77908793..7a14a13f 100644 --- a/project/at_start_f437/examples/usart/half_duplex/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/usart/half_duplex/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usart/half_duplex/src/main.c b/project/at_start_f437/examples/usart/half_duplex/src/main.c index 171f25c4..9842c2a3 100644 --- a/project/at_start_f437/examples/usart/half_duplex/src/main.c +++ b/project/at_start_f437/examples/usart/half_duplex/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usart/hw_flow_control/inc/at32f435_437_clock.h b/project/at_start_f437/examples/usart/hw_flow_control/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/usart/hw_flow_control/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/usart/hw_flow_control/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usart/hw_flow_control/inc/at32f435_437_conf.h b/project/at_start_f437/examples/usart/hw_flow_control/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/usart/hw_flow_control/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/usart/hw_flow_control/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usart/hw_flow_control/inc/at32f435_437_int.h b/project/at_start_f437/examples/usart/hw_flow_control/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/usart/hw_flow_control/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/usart/hw_flow_control/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usart/hw_flow_control/readme.txt b/project/at_start_f437/examples/usart/hw_flow_control/readme.txt index a405fcae..d7f04be1 100644 --- a/project/at_start_f437/examples/usart/hw_flow_control/readme.txt +++ b/project/at_start_f437/examples/usart/hw_flow_control/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/usart/hw_flow_control/src/at32f435_437_clock.c b/project/at_start_f437/examples/usart/hw_flow_control/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/usart/hw_flow_control/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/usart/hw_flow_control/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usart/hw_flow_control/src/at32f435_437_int.c b/project/at_start_f437/examples/usart/hw_flow_control/src/at32f435_437_int.c index 8985e812..aa2e581d 100644 --- a/project/at_start_f437/examples/usart/hw_flow_control/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/usart/hw_flow_control/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usart/hw_flow_control/src/main.c b/project/at_start_f437/examples/usart/hw_flow_control/src/main.c index 9c1010a9..5cf74515 100644 --- a/project/at_start_f437/examples/usart/hw_flow_control/src/main.c +++ b/project/at_start_f437/examples/usart/hw_flow_control/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usart/idle_detection/inc/at32f435_437_clock.h b/project/at_start_f437/examples/usart/idle_detection/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/usart/idle_detection/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/usart/idle_detection/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usart/idle_detection/inc/at32f435_437_conf.h b/project/at_start_f437/examples/usart/idle_detection/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/usart/idle_detection/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/usart/idle_detection/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usart/idle_detection/inc/at32f435_437_int.h b/project/at_start_f437/examples/usart/idle_detection/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/usart/idle_detection/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/usart/idle_detection/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usart/idle_detection/readme.txt b/project/at_start_f437/examples/usart/idle_detection/readme.txt index 3a126c9b..cd5f70c9 100644 --- a/project/at_start_f437/examples/usart/idle_detection/readme.txt +++ b/project/at_start_f437/examples/usart/idle_detection/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/usart/idle_detection/src/at32f435_437_clock.c b/project/at_start_f437/examples/usart/idle_detection/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/usart/idle_detection/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/usart/idle_detection/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usart/idle_detection/src/at32f435_437_int.c b/project/at_start_f437/examples/usart/idle_detection/src/at32f435_437_int.c index 4824d43c..2e4eb403 100644 --- a/project/at_start_f437/examples/usart/idle_detection/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/usart/idle_detection/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usart/idle_detection/src/main.c b/project/at_start_f437/examples/usart/idle_detection/src/main.c index 1fe18da1..10f4e0d8 100644 --- a/project/at_start_f437/examples/usart/idle_detection/src/main.c +++ b/project/at_start_f437/examples/usart/idle_detection/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usart/interrupt/inc/at32f435_437_clock.h b/project/at_start_f437/examples/usart/interrupt/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/usart/interrupt/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/usart/interrupt/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usart/interrupt/inc/at32f435_437_conf.h b/project/at_start_f437/examples/usart/interrupt/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/usart/interrupt/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/usart/interrupt/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usart/interrupt/inc/at32f435_437_int.h b/project/at_start_f437/examples/usart/interrupt/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/usart/interrupt/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/usart/interrupt/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usart/interrupt/readme.txt b/project/at_start_f437/examples/usart/interrupt/readme.txt index 15ab6f03..03a3d23d 100644 --- a/project/at_start_f437/examples/usart/interrupt/readme.txt +++ b/project/at_start_f437/examples/usart/interrupt/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/usart/interrupt/src/at32f435_437_clock.c b/project/at_start_f437/examples/usart/interrupt/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/usart/interrupt/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/usart/interrupt/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usart/interrupt/src/at32f435_437_int.c b/project/at_start_f437/examples/usart/interrupt/src/at32f435_437_int.c index 1c41e380..afed8a2e 100644 --- a/project/at_start_f437/examples/usart/interrupt/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/usart/interrupt/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usart/interrupt/src/main.c b/project/at_start_f437/examples/usart/interrupt/src/main.c index 1537695d..e28c1ed3 100644 --- a/project/at_start_f437/examples/usart/interrupt/src/main.c +++ b/project/at_start_f437/examples/usart/interrupt/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usart/irda/inc/at32f435_437_clock.h b/project/at_start_f437/examples/usart/irda/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/usart/irda/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/usart/irda/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usart/irda/inc/at32f435_437_conf.h b/project/at_start_f437/examples/usart/irda/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/usart/irda/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/usart/irda/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usart/irda/inc/at32f435_437_int.h b/project/at_start_f437/examples/usart/irda/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/usart/irda/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/usart/irda/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usart/irda/readme.txt b/project/at_start_f437/examples/usart/irda/readme.txt index 8abf3a1d..46bd3608 100644 --- a/project/at_start_f437/examples/usart/irda/readme.txt +++ b/project/at_start_f437/examples/usart/irda/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/usart/irda/src/at32f435_437_clock.c b/project/at_start_f437/examples/usart/irda/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/usart/irda/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/usart/irda/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usart/irda/src/at32f435_437_int.c b/project/at_start_f437/examples/usart/irda/src/at32f435_437_int.c index 7962ae49..eb327148 100644 --- a/project/at_start_f437/examples/usart/irda/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/usart/irda/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usart/irda/src/main.c b/project/at_start_f437/examples/usart/irda/src/main.c index c1052170..0fdd9cb0 100644 --- a/project/at_start_f437/examples/usart/irda/src/main.c +++ b/project/at_start_f437/examples/usart/irda/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usart/polling/inc/at32f435_437_clock.h b/project/at_start_f437/examples/usart/polling/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/usart/polling/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/usart/polling/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usart/polling/inc/at32f435_437_conf.h b/project/at_start_f437/examples/usart/polling/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/usart/polling/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/usart/polling/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usart/polling/inc/at32f435_437_int.h b/project/at_start_f437/examples/usart/polling/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/usart/polling/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/usart/polling/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usart/polling/readme.txt b/project/at_start_f437/examples/usart/polling/readme.txt index 3fc558c5..707f960c 100644 --- a/project/at_start_f437/examples/usart/polling/readme.txt +++ b/project/at_start_f437/examples/usart/polling/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/usart/polling/src/at32f435_437_clock.c b/project/at_start_f437/examples/usart/polling/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/usart/polling/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/usart/polling/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usart/polling/src/at32f435_437_int.c b/project/at_start_f437/examples/usart/polling/src/at32f435_437_int.c index 0a64eae9..a187d8fa 100644 --- a/project/at_start_f437/examples/usart/polling/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/usart/polling/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usart/polling/src/main.c b/project/at_start_f437/examples/usart/polling/src/main.c index 062ec569..f7d7d771 100644 --- a/project/at_start_f437/examples/usart/polling/src/main.c +++ b/project/at_start_f437/examples/usart/polling/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usart/printf/inc/at32f435_437_clock.h b/project/at_start_f437/examples/usart/printf/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/usart/printf/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/usart/printf/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usart/printf/inc/at32f435_437_conf.h b/project/at_start_f437/examples/usart/printf/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/usart/printf/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/usart/printf/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usart/printf/inc/at32f435_437_int.h b/project/at_start_f437/examples/usart/printf/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/usart/printf/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/usart/printf/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usart/printf/readme.txt b/project/at_start_f437/examples/usart/printf/readme.txt index f0d118e0..7bab9776 100644 --- a/project/at_start_f437/examples/usart/printf/readme.txt +++ b/project/at_start_f437/examples/usart/printf/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/usart/printf/src/at32f435_437_clock.c b/project/at_start_f437/examples/usart/printf/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/usart/printf/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/usart/printf/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usart/printf/src/at32f435_437_int.c b/project/at_start_f437/examples/usart/printf/src/at32f435_437_int.c index c9ab8b99..384efb5d 100644 --- a/project/at_start_f437/examples/usart/printf/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/usart/printf/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usart/printf/src/main.c b/project/at_start_f437/examples/usart/printf/src/main.c index 560ac04b..eec35bcf 100644 --- a/project/at_start_f437/examples/usart/printf/src/main.c +++ b/project/at_start_f437/examples/usart/printf/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usart/receiver_mute/inc/at32f435_437_clock.h b/project/at_start_f437/examples/usart/receiver_mute/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/usart/receiver_mute/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/usart/receiver_mute/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usart/receiver_mute/inc/at32f435_437_conf.h b/project/at_start_f437/examples/usart/receiver_mute/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/usart/receiver_mute/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/usart/receiver_mute/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usart/receiver_mute/inc/at32f435_437_int.h b/project/at_start_f437/examples/usart/receiver_mute/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/usart/receiver_mute/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/usart/receiver_mute/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usart/receiver_mute/readme.txt b/project/at_start_f437/examples/usart/receiver_mute/readme.txt index 025d3313..1518b7e1 100644 --- a/project/at_start_f437/examples/usart/receiver_mute/readme.txt +++ b/project/at_start_f437/examples/usart/receiver_mute/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/usart/receiver_mute/src/at32f435_437_clock.c b/project/at_start_f437/examples/usart/receiver_mute/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/usart/receiver_mute/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/usart/receiver_mute/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usart/receiver_mute/src/at32f435_437_int.c b/project/at_start_f437/examples/usart/receiver_mute/src/at32f435_437_int.c index 5c499eab..97f34d0e 100644 --- a/project/at_start_f437/examples/usart/receiver_mute/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/usart/receiver_mute/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usart/receiver_mute/src/main.c b/project/at_start_f437/examples/usart/receiver_mute/src/main.c index 2caabc8e..01c8350a 100644 --- a/project/at_start_f437/examples/usart/receiver_mute/src/main.c +++ b/project/at_start_f437/examples/usart/receiver_mute/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usart/rs485/inc/at32f435_437_clock.h b/project/at_start_f437/examples/usart/rs485/inc/at32f435_437_clock.h new file mode 100644 index 00000000..f2644edd --- /dev/null +++ b/project/at_start_f437/examples/usart/rs485/inc/at32f435_437_clock.h @@ -0,0 +1,46 @@ +/** + ************************************************************************** + * @file at32f435_437_clock.h + * @version v2.0.9 + * @date 2022-06-28 + * @brief header file of clock program + ************************************************************************** + * Copyright notice & Disclaimer + * + * The software Board Support Package (BSP) that is made available to + * download from Artery official website is the copyrighted work of Artery. + * Artery authorizes customers to use, copy, and distribute the BSP + * software and its related documentation for the purpose of design and + * development in conjunction with Artery microcontrollers. Use of the + * software is governed by this copyright notice and the following disclaimer. + * + * THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, + * GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, + * TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR + * STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, + * INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. + * + ************************************************************************** + */ + +/* define to prevent recursive inclusion -------------------------------------*/ +#ifndef __AT32F435_437_CLOCK_H +#define __AT32F435_437_CLOCK_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* includes ------------------------------------------------------------------*/ +#include "at32f435_437.h" + +/* exported functions ------------------------------------------------------- */ +void system_clock_config(void); + +#ifdef __cplusplus +} +#endif + +#endif + diff --git a/project/at_start_f437/examples/usart/rs485/inc/at32f435_437_conf.h b/project/at_start_f437/examples/usart/rs485/inc/at32f435_437_conf.h new file mode 100644 index 00000000..2f0db200 --- /dev/null +++ b/project/at_start_f437/examples/usart/rs485/inc/at32f435_437_conf.h @@ -0,0 +1,174 @@ +/** + ************************************************************************** + * @file at32f435_437_conf.h + * @version v2.0.9 + * @date 2022-06-28 + * @brief at32f435_437 config header file + ************************************************************************** + * Copyright notice & Disclaimer + * + * The software Board Support Package (BSP) that is made available to + * download from Artery official website is the copyrighted work of Artery. + * Artery authorizes customers to use, copy, and distribute the BSP + * software and its related documentation for the purpose of design and + * development in conjunction with Artery microcontrollers. Use of the + * software is governed by this copyright notice and the following disclaimer. + * + * THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, + * GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, + * TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR + * STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, + * INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. + * + ************************************************************************** + */ + +/* define to prevent recursive inclusion -------------------------------------*/ +#ifndef __AT32F435_437_CONF_H +#define __AT32F435_437_CONF_H + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @brief in the following line adjust the value of high speed exernal crystal (hext) + * used in your application + * + * tip: to avoid modifying this file each time you need to use different hext, you + * can define the hext value in your toolchain compiler preprocessor. + * + */ +#if !defined HEXT_VALUE +#define HEXT_VALUE ((uint32_t)8000000) /*!< value of the high speed exernal crystal in hz */ +#endif + +/** + * @brief in the following line adjust the high speed exernal crystal (hext) startup + * timeout value + */ +#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000) /*!< time out for hext start up */ +#define HICK_VALUE ((uint32_t)8000000) /*!< value of the high speed internal clock in hz */ + +/* module define -------------------------------------------------------------*/ +#define CRM_MODULE_ENABLED +#define TMR_MODULE_ENABLED +#define ERTC_MODULE_ENABLED +#define GPIO_MODULE_ENABLED +#define I2C_MODULE_ENABLED +#define USART_MODULE_ENABLED +#define PWC_MODULE_ENABLED +#define CAN_MODULE_ENABLED +#define ADC_MODULE_ENABLED +#define DAC_MODULE_ENABLED +#define SPI_MODULE_ENABLED +#define EDMA_MODULE_ENABLED +#define DMA_MODULE_ENABLED +#define DEBUG_MODULE_ENABLED +#define FLASH_MODULE_ENABLED +#define CRC_MODULE_ENABLED +#define WWDT_MODULE_ENABLED +#define WDT_MODULE_ENABLED +#define EXINT_MODULE_ENABLED +#define SDIO_MODULE_ENABLED +#define XMC_MODULE_ENABLED +#define USB_MODULE_ENABLED +#define ACC_MODULE_ENABLED +#define MISC_MODULE_ENABLED +#define QSPI_MODULE_ENABLED +#define DVP_MODULE_ENABLED +#define SCFG_MODULE_ENABLED +#define EMAC_MODULE_ENABLED + +/* includes ------------------------------------------------------------------*/ +#ifdef CRM_MODULE_ENABLED +#include "at32f435_437_crm.h" +#endif +#ifdef TMR_MODULE_ENABLED +#include "at32f435_437_tmr.h" +#endif +#ifdef ERTC_MODULE_ENABLED +#include "at32f435_437_ertc.h" +#endif +#ifdef GPIO_MODULE_ENABLED +#include "at32f435_437_gpio.h" +#endif +#ifdef I2C_MODULE_ENABLED +#include "at32f435_437_i2c.h" +#endif +#ifdef USART_MODULE_ENABLED +#include "at32f435_437_usart.h" +#endif +#ifdef PWC_MODULE_ENABLED +#include "at32f435_437_pwc.h" +#endif +#ifdef CAN_MODULE_ENABLED +#include "at32f435_437_can.h" +#endif +#ifdef ADC_MODULE_ENABLED +#include "at32f435_437_adc.h" +#endif +#ifdef DAC_MODULE_ENABLED +#include "at32f435_437_dac.h" +#endif +#ifdef SPI_MODULE_ENABLED +#include "at32f435_437_spi.h" +#endif +#ifdef DMA_MODULE_ENABLED +#include "at32f435_437_dma.h" +#endif +#ifdef DEBUG_MODULE_ENABLED +#include "at32f435_437_debug.h" +#endif +#ifdef FLASH_MODULE_ENABLED +#include "at32f435_437_flash.h" +#endif +#ifdef CRC_MODULE_ENABLED +#include "at32f435_437_crc.h" +#endif +#ifdef WWDT_MODULE_ENABLED +#include "at32f435_437_wwdt.h" +#endif +#ifdef WDT_MODULE_ENABLED +#include "at32f435_437_wdt.h" +#endif +#ifdef EXINT_MODULE_ENABLED +#include "at32f435_437_exint.h" +#endif +#ifdef SDIO_MODULE_ENABLED +#include "at32f435_437_sdio.h" +#endif +#ifdef XMC_MODULE_ENABLED +#include "at32f435_437_xmc.h" +#endif +#ifdef ACC_MODULE_ENABLED +#include "at32f435_437_acc.h" +#endif +#ifdef MISC_MODULE_ENABLED +#include "at32f435_437_misc.h" +#endif +#ifdef EDMA_MODULE_ENABLED +#include "at32f435_437_edma.h" +#endif +#ifdef QSPI_MODULE_ENABLED +#include "at32f435_437_qspi.h" +#endif +#ifdef SCFG_MODULE_ENABLED +#include "at32f435_437_scfg.h" +#endif +#ifdef EMAC_MODULE_ENABLED +#include "at32f435_437_emac.h" +#endif +#ifdef DVP_MODULE_ENABLED +#include "at32f435_437_dvp.h" +#endif +#ifdef USB_MODULE_ENABLED +#include "at32f435_437_usb.h" +#endif + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/project/at_start_f437/examples/usart/rs485/inc/at32f435_437_int.h b/project/at_start_f437/examples/usart/rs485/inc/at32f435_437_int.h new file mode 100644 index 00000000..61f0c193 --- /dev/null +++ b/project/at_start_f437/examples/usart/rs485/inc/at32f435_437_int.h @@ -0,0 +1,58 @@ +/** + ************************************************************************** + * @file at32f435_437_int.h + * @version v2.0.9 + * @date 2022-06-28 + * @brief header file of main interrupt service routines. + ************************************************************************** + * Copyright notice & Disclaimer + * + * The software Board Support Package (BSP) that is made available to + * download from Artery official website is the copyrighted work of Artery. + * Artery authorizes customers to use, copy, and distribute the BSP + * software and its related documentation for the purpose of design and + * development in conjunction with Artery microcontrollers. Use of the + * software is governed by this copyright notice and the following disclaimer. + * + * THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, + * GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, + * TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR + * STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, + * INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. + * + ************************************************************************** + */ + +/* define to prevent recursive inclusion -------------------------------------*/ +#ifndef __AT32F435_437_INT_H +#define __AT32F435_437_INT_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* includes ------------------------------------------------------------------*/ +#include "at32f435_437.h" + +/* exported types ------------------------------------------------------------*/ +/* exported constants --------------------------------------------------------*/ +/* exported macro ------------------------------------------------------------*/ +/* exported functions ------------------------------------------------------- */ + +void NMI_Handler(void); +void HardFault_Handler(void); +void MemManage_Handler(void); +void BusFault_Handler(void); +void UsageFault_Handler(void); +void SVC_Handler(void); +void DebugMon_Handler(void); +void PendSV_Handler(void); +void SysTick_Handler(void); + +#ifdef __cplusplus +} +#endif + +#endif + diff --git a/project/at_start_f437/examples/usart/rs485/mdk_v5/rs485.uvoptx b/project/at_start_f437/examples/usart/rs485/mdk_v5/rs485.uvoptx new file mode 100644 index 00000000..c484ee32 --- /dev/null +++ b/project/at_start_f437/examples/usart/rs485/mdk_v5/rs485.uvoptx @@ -0,0 +1,344 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj; *.o + *.lib + *.txt; *.h; *.inc + *.plm + *.cpp + 0 + + + + 0 + 0 + + + + rs485 + 0x4 + ARM-ADS + + 12000000 + + 0 + 1 + 0 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\listings\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 0 + 0 + 1 + + 0 + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 0 + + + + + + + + + + + BIN\CMSIS_AGDI.dll + + + + 0 + UL2CM3 + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0AT32F437_4032 -FS08000000 -FL03F0000 -FP0($$Device:-AT32F437ZMT7$Flash\AT32F437_4032.FLM)) + + + + + 0 + + + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + 0 + 0 + 0 + + + + + + + + + + + + + user + 0 + 0 + 0 + 0 + + 1 + 1 + 1 + 0 + 0 + 0 + ..\src\at32f435_437_clock.c + at32f435_437_clock.c + 0 + 0 + + + 1 + 2 + 1 + 0 + 0 + 0 + ..\src\at32f435_437_int.c + at32f435_437_int.c + 0 + 0 + + + 1 + 3 + 1 + 0 + 0 + 0 + ..\src\main.c + main.c + 0 + 0 + + + + + bsp + 0 + 0 + 0 + 0 + + 2 + 4 + 1 + 0 + 0 + 0 + ..\..\..\..\..\at32f435_437_board\at32f435_437_board.c + at32f435_437_board.c + 0 + 0 + + + + + firmware + 0 + 0 + 0 + 0 + + 3 + 5 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_gpio.c + at32f435_437_gpio.c + 0 + 0 + + + 3 + 6 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_misc.c + at32f435_437_misc.c + 0 + 0 + + + 3 + 7 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_crm.c + at32f435_437_crm.c + 0 + 0 + + + 3 + 8 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_usart.c + at32f435_437_usart.c + 0 + 0 + + + + + cmsis + 0 + 0 + 0 + 0 + + 4 + 9 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\libraries\cmsis\cm4\device_support\system_at32f435_437.c + system_at32f435_437.c + 0 + 0 + + + 4 + 10 + 2 + 0 + 0 + 0 + ..\..\..\..\..\..\libraries\cmsis\cm4\device_support\startup\mdk\startup_at32f435_437.s + startup_at32f435_437.s + 0 + 0 + + + + + readme + 0 + 0 + 0 + 0 + + 5 + 11 + 5 + 0 + 0 + 0 + ..\readme.txt + readme.txt + 0 + 0 + + + + diff --git a/project/at_start_f437/examples/usart/rs485/mdk_v5/rs485.uvprojx b/project/at_start_f437/examples/usart/rs485/mdk_v5/rs485.uvprojx new file mode 100644 index 00000000..d4984053 --- /dev/null +++ b/project/at_start_f437/examples/usart/rs485/mdk_v5/rs485.uvprojx @@ -0,0 +1,487 @@ + + + + 2.1 + +
### uVision Project, (C) Keil Software
+ + + + rs485 + 0x4 + ARM-ADS + 5060750::V5.06 update 6 (build 750)::ARMCC + 0 + + + -AT32F437ZMT7 + ArteryTek + ArteryTek.AT32F435_437_DFP.2.0.1 + IRAM(0x20000000,0x60000) IROM(0x08000000,0x3F0000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0AT32F437_4032 -FS08000000 -FL03F0000 -FP0($$Device:-AT32F437ZMT7$Flash\AT32F437_4032.FLM)) + 0 + $$Device:- + + + + + + + + + + $$Device:-AT32F437ZMT7$SVD\AT32F437xx_v2.svd + 0 + 0 + + + + AT32F437ZMT7$Device\Include\at32f435_437.h\ + AT32F437ZMT7$Device\Include\at32f435_437.h\ + + 0 + 0 + 0 + 0 + 1 + + .\objects\ + rs485 + 1 + 0 + 1 + 1 + 1 + .\listings\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 0 + + + SARMCM3.DLL + -REMAP -MPU + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM4 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 1 + 4096 + + 1 + BIN\UL2CM3.DLL + "" () + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M4" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 2 + 0 + 0 + 0 + 0 + 8 + 0 + 0 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x60000 + + + 1 + 0x8000000 + 0x3f0000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x8000000 + 0x3f0000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x60000 + + + 0 + 0x0 + 0x0 + + + + + + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 0 + + + AT32F437ZMT7,USE_STDPERIPH_DRIVER,AT_START_F437_V1 + + ..\inc;..\..\..\..\..\at32f435_437_board;..\..\..\..\..\..\middlewares\i2c_application_library;..\..\..\..\..\..\libraries\cmsis\cm4\core_support;..\..\..\..\..\..\libraries\cmsis\cm4\device_support;..\..\..\..\..\..\libraries\drivers\inc + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 4 + + + + + + + + + 1 + 0 + 0 + 0 + 1 + 0 + 0x08000000 + 0x20000000 + + + + + + + + + + + + + user + + + at32f435_437_clock.c + 1 + ..\src\at32f435_437_clock.c + + + at32f435_437_int.c + 1 + ..\src\at32f435_437_int.c + + + main.c + 1 + ..\src\main.c + + + + + bsp + + + at32f435_437_board.c + 1 + ..\..\..\..\..\at32f435_437_board\at32f435_437_board.c + + + + + firmware + + + at32f435_437_gpio.c + 1 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_gpio.c + + + at32f435_437_misc.c + 1 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_misc.c + + + at32f435_437_crm.c + 1 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_crm.c + + + at32f435_437_usart.c + 1 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_usart.c + + + + + cmsis + + + system_at32f435_437.c + 1 + ..\..\..\..\..\..\libraries\cmsis\cm4\device_support\system_at32f435_437.c + + + startup_at32f435_437.s + 2 + ..\..\..\..\..\..\libraries\cmsis\cm4\device_support\startup\mdk\startup_at32f435_437.s + + + + + readme + + + readme.txt + 5 + ..\readme.txt + + + + + + + + + + + + + + + + + <Project Info> + + + + + + 0 + 1 + + + + + diff --git a/project/at_start_f437/examples/usart/rs485/readme.txt b/project/at_start_f437/examples/usart/rs485/readme.txt new file mode 100644 index 00000000..30dc3784 --- /dev/null +++ b/project/at_start_f437/examples/usart/rs485/readme.txt @@ -0,0 +1,17 @@ +/** + ************************************************************************** + * @file readme.txt + * @version v2.0.9 + * @date 2022-06-28 + * @brief readme + ************************************************************************** + */ + + this demo is based on the at-start board and AT32-Comm-EV, in this demo, + shows how to use usart to achieve rs485 communication. + + set-up + - usart tx ---> pa2 + - usart rx ---> pa3 + - usart de ---> pa1 + \ No newline at end of file diff --git a/project/at_start_f437/examples/usart/rs485/src/at32f435_437_clock.c b/project/at_start_f437/examples/usart/rs485/src/at32f435_437_clock.c new file mode 100644 index 00000000..0d66e712 --- /dev/null +++ b/project/at_start_f437/examples/usart/rs485/src/at32f435_437_clock.c @@ -0,0 +1,106 @@ +/** + ************************************************************************** + * @file at32f435_437_clock.c + * @version v2.0.9 + * @date 2022-06-28 + * @brief system clock config program + ************************************************************************** + * Copyright notice & Disclaimer + * + * The software Board Support Package (BSP) that is made available to + * download from Artery official website is the copyrighted work of Artery. + * Artery authorizes customers to use, copy, and distribute the BSP + * software and its related documentation for the purpose of design and + * development in conjunction with Artery microcontrollers. Use of the + * software is governed by this copyright notice and the following disclaimer. + * + * THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, + * GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, + * TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR + * STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, + * INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. + * + ************************************************************************** + */ + +/* includes ------------------------------------------------------------------*/ +#include "at32f435_437_clock.h" + +/** + * @brief system clock config program + * @note the system clock is configured as follow: + * - system clock = (hext * pll_ns)/(pll_ms * pll_fr) + * - system clock source = pll (hext) + * - hext = 8000000 + * - sclk = 288000000 + * - ahbdiv = 1 + * - ahbclk = 288000000 + * - apb2div = 2 + * - apb2clk = 144000000 + * - apb1div = 2 + * - apb1clk = 144000000 + * - pll_ns = 72 + * - pll_ms = 1 + * - pll_fr = 2 + * @param none + * @retval none + */ +void system_clock_config(void) +{ + /* enable pwc periph clock */ + crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE); + + /* config ldo voltage */ + pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3); + + /* set the flash clock divider */ + flash_clock_divider_set(FLASH_CLOCK_DIV_3); + + /* reset crm */ + crm_reset(); + + crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE); + + /* wait till hext is ready */ + while(crm_hext_stable_wait() == ERROR) + { + } + + /* config pll clock resource */ + crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2); + + /* enable pll */ + crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE); + + /* wait till pll is ready */ + while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET) + { + } + + /* config ahbclk */ + crm_ahb_div_set(CRM_AHB_DIV_1); + + /* config apb2clk */ + crm_apb2_div_set(CRM_APB2_DIV_2); + + /* config apb1clk */ + crm_apb1_div_set(CRM_APB1_DIV_2); + + /* enable auto step mode */ + crm_auto_step_mode_enable(TRUE); + + /* select pll as system clock source */ + crm_sysclk_switch(CRM_SCLK_PLL); + + /* wait till pll is used as system clock source */ + while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL) + { + } + + /* disable auto step mode */ + crm_auto_step_mode_enable(FALSE); + + /* update system_core_clock global variable */ + system_core_clock_update(); +} diff --git a/project/at_start_f437/examples/usart/rs485/src/at32f435_437_int.c b/project/at_start_f437/examples/usart/rs485/src/at32f435_437_int.c new file mode 100644 index 00000000..1eb52c79 --- /dev/null +++ b/project/at_start_f437/examples/usart/rs485/src/at32f435_437_int.c @@ -0,0 +1,141 @@ +/** + ************************************************************************** + * @file at32f435_437_int.c + * @version v2.0.9 + * @date 2022-06-28 + * @brief main interrupt service routines. + ************************************************************************** + * Copyright notice & Disclaimer + * + * The software Board Support Package (BSP) that is made available to + * download from Artery official website is the copyrighted work of Artery. + * Artery authorizes customers to use, copy, and distribute the BSP + * software and its related documentation for the purpose of design and + * development in conjunction with Artery microcontrollers. Use of the + * software is governed by this copyright notice and the following disclaimer. + * + * THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, + * GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, + * TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR + * STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, + * INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. + * + ************************************************************************** + */ + +/* includes ------------------------------------------------------------------*/ +#include "at32f435_437_int.h" + +/** @addtogroup AT32F437_periph_examples + * @{ + */ + +/** @addtogroup 437_USART_rs485 + * @{ + */ + +/** + * @brief this function handles nmi exception. + * @param none + * @retval none + */ +void NMI_Handler(void) +{ +} + +/** + * @brief this function handles hard fault exception. + * @param none + * @retval none + */ +void HardFault_Handler(void) +{ + /* go to infinite loop when hard fault exception occurs */ + while(1) + { + } +} + +/** + * @brief this function handles memory manage exception. + * @param none + * @retval none + */ +void MemManage_Handler(void) +{ + /* go to infinite loop when memory manage exception occurs */ + while(1) + { + } +} + +/** + * @brief this function handles bus fault exception. + * @param none + * @retval none + */ +void BusFault_Handler(void) +{ + /* go to infinite loop when bus fault exception occurs */ + while(1) + { + } +} + +/** + * @brief this function handles usage fault exception. + * @param none + * @retval none + */ +void UsageFault_Handler(void) +{ + /* go to infinite loop when usage fault exception occurs */ + while(1) + { + } +} + +/** + * @brief this function handles svcall exception. + * @param none + * @retval none + */ +void SVC_Handler(void) +{ +} + +/** + * @brief this function handles debug monitor exception. + * @param none + * @retval none + */ +void DebugMon_Handler(void) +{ +} + +/** + * @brief this function handles pendsv_handler exception. + * @param none + * @retval none + */ +void PendSV_Handler(void) +{ +} + +/** + * @brief this function handles systick handler. + * @param none + * @retval none + */ +void SysTick_Handler(void) +{ +} + +/** + * @} + */ + +/** + * @} + */ diff --git a/project/at_start_f437/examples/usart/rs485/src/main.c b/project/at_start_f437/examples/usart/rs485/src/main.c new file mode 100644 index 00000000..9630b193 --- /dev/null +++ b/project/at_start_f437/examples/usart/rs485/src/main.c @@ -0,0 +1,161 @@ +/** + ************************************************************************** + * @file main.c + * @version v2.0.9 + * @date 2022-06-28 + * @brief main program + ************************************************************************** + * Copyright notice & Disclaimer + * + * The software Board Support Package (BSP) that is made available to + * download from Artery official website is the copyrighted work of Artery. + * Artery authorizes customers to use, copy, and distribute the BSP + * software and its related documentation for the purpose of design and + * development in conjunction with Artery microcontrollers. Use of the + * software is governed by this copyright notice and the following disclaimer. + * + * THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, + * GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, + * TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR + * STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, + * INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. + * + ************************************************************************** + */ + +#include "at32f435_437_board.h" +#include "at32f435_437_clock.h" + +/** @addtogroup AT32F437_periph_examples + * @{ + */ + +/** @addtogroup 437_USART_rs485 + * @{ + */ + +#define RS485_BAUDRATE 9600 +#define RS485_BUFFER_SIZE 128 + +uint8_t rs485_buffer_rx[RS485_BUFFER_SIZE]; +uint8_t rs485_buffer_rx_cnt = 0; + +/** + * @brief rs485 configiguration. + * @param none + * @retval none + */ +static void rs485_config(void) +{ + gpio_init_type gpio_init_struct; + + /* enable the uart2 and gpio clock */ + crm_periph_clock_enable(CRM_USART2_PERIPH_CLOCK, TRUE); + crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE); + + gpio_default_para_init(&gpio_init_struct); + + /* configure the uart2 tx,rx,de pin */ + gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; + gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_init_struct.gpio_mode = GPIO_MODE_MUX; + gpio_init_struct.gpio_pins = GPIO_PINS_2|GPIO_PINS_3; + gpio_init_struct.gpio_pull = GPIO_PULL_NONE; + gpio_init(GPIOA, &gpio_init_struct); + + gpio_init_struct.gpio_pins = GPIO_PINS_1; + gpio_init_struct.gpio_pull = GPIO_PULL_NONE; + gpio_init(GPIOA, &gpio_init_struct); + + gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE1, GPIO_MUX_7); + gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE2, GPIO_MUX_7); + gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE3, GPIO_MUX_7); + + /* configure uart2 param */ + usart_init(USART2, RS485_BAUDRATE, USART_DATA_8BITS, USART_STOP_1_BIT); + usart_rs485_delay_time_config(USART2, 2, 2); + usart_de_polarity_set(USART2, USART_DE_POLARITY_HIGH); + usart_rs485_mode_enable(USART2, TRUE); + + usart_flag_clear(USART2, USART_RDBF_FLAG); + usart_interrupt_enable(USART2, USART_RDBF_INT, TRUE); + + usart_receiver_enable(USART2, TRUE); + usart_transmitter_enable(USART2, TRUE); + usart_enable(USART2, TRUE); + + nvic_irq_enable(USART2_IRQn, 1, 0); +} + +/** + * @brief rs485 send data + * @param buf: pointer to the buffer that contain the data to be transferred. + * @param cnt: size of buffer in bytes. + * @retval none + */ +static void rs485_send_data(u8* buf, u8 cnt) +{ + while(cnt--){ + while(usart_flag_get(USART2, USART_TDBE_FLAG) == RESET); + usart_data_transmit(USART2, *buf++); + } +} + +/** + * @brief main function. + * @param none + * @retval none + */ +int main(void) +{ + char str[]="start test..\r\n"; + u8 len = 0; + + system_clock_config(); + at32_board_init(); + nvic_priority_group_config(NVIC_PRIORITY_GROUP_4); + + rs485_config(); + + len = sizeof(str); + rs485_send_data((u8*)str, len); + while(1) + { + if(usart_flag_get(USART2, USART_IDLEF_FLAG) != RESET) + { + usart_data_receive(USART2); + usart_interrupt_enable(USART2, USART_RDBF_INT, FALSE); + rs485_send_data(rs485_buffer_rx, rs485_buffer_rx_cnt); + rs485_buffer_rx_cnt = 0; + usart_interrupt_enable(USART2, USART_RDBF_INT, TRUE); + } + } +} + +/** + * @brief usart2 interrupt handler + * @param none + * @retval none + */ +void USART2_IRQHandler(void) +{ + uint16_t tmp; + + if(usart_flag_get(USART2, USART_RDBF_FLAG) != RESET) + { + tmp = usart_data_receive(USART2); + if(rs485_buffer_rx_cnt < RS485_BUFFER_SIZE) + { + rs485_buffer_rx[rs485_buffer_rx_cnt++] = tmp; + } + } +} + +/** + * @} + */ + +/** + * @} + */ diff --git a/project/at_start_f437/examples/usart/smartcard/inc/at32f435_437_clock.h b/project/at_start_f437/examples/usart/smartcard/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/usart/smartcard/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/usart/smartcard/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usart/smartcard/inc/at32f435_437_conf.h b/project/at_start_f437/examples/usart/smartcard/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/usart/smartcard/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/usart/smartcard/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usart/smartcard/inc/at32f435_437_int.h b/project/at_start_f437/examples/usart/smartcard/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/usart/smartcard/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/usart/smartcard/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usart/smartcard/inc/smartcard_config.h b/project/at_start_f437/examples/usart/smartcard/inc/smartcard_config.h index 8c508ccf..b71d786e 100644 --- a/project/at_start_f437/examples/usart/smartcard/inc/smartcard_config.h +++ b/project/at_start_f437/examples/usart/smartcard/inc/smartcard_config.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file smartcard_config.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usart/smartcard/readme.txt b/project/at_start_f437/examples/usart/smartcard/readme.txt index f60ceecf..be9303ca 100644 --- a/project/at_start_f437/examples/usart/smartcard/readme.txt +++ b/project/at_start_f437/examples/usart/smartcard/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/usart/smartcard/src/at32f435_437_clock.c b/project/at_start_f437/examples/usart/smartcard/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/usart/smartcard/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/usart/smartcard/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usart/smartcard/src/at32f435_437_int.c b/project/at_start_f437/examples/usart/smartcard/src/at32f435_437_int.c index 16f9b1a1..2706cc28 100644 --- a/project/at_start_f437/examples/usart/smartcard/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/usart/smartcard/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usart/smartcard/src/main.c b/project/at_start_f437/examples/usart/smartcard/src/main.c index a4bbeb13..8624cbd7 100644 --- a/project/at_start_f437/examples/usart/smartcard/src/main.c +++ b/project/at_start_f437/examples/usart/smartcard/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usart/synchronous/inc/at32f435_437_clock.h b/project/at_start_f437/examples/usart/synchronous/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/usart/synchronous/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/usart/synchronous/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usart/synchronous/inc/at32f435_437_conf.h b/project/at_start_f437/examples/usart/synchronous/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/usart/synchronous/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/usart/synchronous/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usart/synchronous/inc/at32f435_437_int.h b/project/at_start_f437/examples/usart/synchronous/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/usart/synchronous/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/usart/synchronous/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usart/synchronous/readme.txt b/project/at_start_f437/examples/usart/synchronous/readme.txt index 1ea7ff0a..9340b437 100644 --- a/project/at_start_f437/examples/usart/synchronous/readme.txt +++ b/project/at_start_f437/examples/usart/synchronous/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/usart/synchronous/src/at32f435_437_clock.c b/project/at_start_f437/examples/usart/synchronous/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/usart/synchronous/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/usart/synchronous/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usart/synchronous/src/at32f435_437_int.c b/project/at_start_f437/examples/usart/synchronous/src/at32f435_437_int.c index 1b63496a..185e2be8 100644 --- a/project/at_start_f437/examples/usart/synchronous/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/usart/synchronous/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usart/synchronous/src/main.c b/project/at_start_f437/examples/usart/synchronous/src/main.c index b1fa4c07..1ca20ffb 100644 --- a/project/at_start_f437/examples/usart/synchronous/src/main.c +++ b/project/at_start_f437/examples/usart/synchronous/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usart/transfer_by_dma_interrupt/inc/at32f435_437_clock.h b/project/at_start_f437/examples/usart/transfer_by_dma_interrupt/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/usart/transfer_by_dma_interrupt/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/usart/transfer_by_dma_interrupt/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usart/transfer_by_dma_interrupt/inc/at32f435_437_conf.h b/project/at_start_f437/examples/usart/transfer_by_dma_interrupt/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/usart/transfer_by_dma_interrupt/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/usart/transfer_by_dma_interrupt/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usart/transfer_by_dma_interrupt/inc/at32f435_437_int.h b/project/at_start_f437/examples/usart/transfer_by_dma_interrupt/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/usart/transfer_by_dma_interrupt/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/usart/transfer_by_dma_interrupt/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usart/transfer_by_dma_interrupt/readme.txt b/project/at_start_f437/examples/usart/transfer_by_dma_interrupt/readme.txt index 9370606e..b8781a04 100644 --- a/project/at_start_f437/examples/usart/transfer_by_dma_interrupt/readme.txt +++ b/project/at_start_f437/examples/usart/transfer_by_dma_interrupt/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/usart/transfer_by_dma_interrupt/src/at32f435_437_clock.c b/project/at_start_f437/examples/usart/transfer_by_dma_interrupt/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/usart/transfer_by_dma_interrupt/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/usart/transfer_by_dma_interrupt/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usart/transfer_by_dma_interrupt/src/at32f435_437_int.c b/project/at_start_f437/examples/usart/transfer_by_dma_interrupt/src/at32f435_437_int.c index 2e1e60ec..b51c200e 100644 --- a/project/at_start_f437/examples/usart/transfer_by_dma_interrupt/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/usart/transfer_by_dma_interrupt/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usart/transfer_by_dma_interrupt/src/main.c b/project/at_start_f437/examples/usart/transfer_by_dma_interrupt/src/main.c index 73608aa1..4b3266b8 100644 --- a/project/at_start_f437/examples/usart/transfer_by_dma_interrupt/src/main.c +++ b/project/at_start_f437/examples/usart/transfer_by_dma_interrupt/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usart/transfer_by_dma_polling/inc/at32f435_437_clock.h b/project/at_start_f437/examples/usart/transfer_by_dma_polling/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/usart/transfer_by_dma_polling/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/usart/transfer_by_dma_polling/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usart/transfer_by_dma_polling/inc/at32f435_437_conf.h b/project/at_start_f437/examples/usart/transfer_by_dma_polling/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/usart/transfer_by_dma_polling/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/usart/transfer_by_dma_polling/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usart/transfer_by_dma_polling/inc/at32f435_437_int.h b/project/at_start_f437/examples/usart/transfer_by_dma_polling/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/usart/transfer_by_dma_polling/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/usart/transfer_by_dma_polling/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usart/transfer_by_dma_polling/readme.txt b/project/at_start_f437/examples/usart/transfer_by_dma_polling/readme.txt index cb013aff..6dfa5991 100644 --- a/project/at_start_f437/examples/usart/transfer_by_dma_polling/readme.txt +++ b/project/at_start_f437/examples/usart/transfer_by_dma_polling/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/usart/transfer_by_dma_polling/src/at32f435_437_clock.c b/project/at_start_f437/examples/usart/transfer_by_dma_polling/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/usart/transfer_by_dma_polling/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/usart/transfer_by_dma_polling/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usart/transfer_by_dma_polling/src/at32f435_437_int.c b/project/at_start_f437/examples/usart/transfer_by_dma_polling/src/at32f435_437_int.c index 9dd40fea..e6067025 100644 --- a/project/at_start_f437/examples/usart/transfer_by_dma_polling/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/usart/transfer_by_dma_polling/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usart/transfer_by_dma_polling/src/main.c b/project/at_start_f437/examples/usart/transfer_by_dma_polling/src/main.c index ce6bec68..3569e042 100644 --- a/project/at_start_f437/examples/usart/transfer_by_dma_polling/src/main.c +++ b/project/at_start_f437/examples/usart/transfer_by_dma_polling/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usart/tx_rx_swap/inc/at32f435_437_clock.h b/project/at_start_f437/examples/usart/tx_rx_swap/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/usart/tx_rx_swap/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/usart/tx_rx_swap/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usart/tx_rx_swap/inc/at32f435_437_conf.h b/project/at_start_f437/examples/usart/tx_rx_swap/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/usart/tx_rx_swap/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/usart/tx_rx_swap/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usart/tx_rx_swap/inc/at32f435_437_int.h b/project/at_start_f437/examples/usart/tx_rx_swap/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/usart/tx_rx_swap/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/usart/tx_rx_swap/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usart/tx_rx_swap/readme.txt b/project/at_start_f437/examples/usart/tx_rx_swap/readme.txt index e22b8127..b15e452a 100644 --- a/project/at_start_f437/examples/usart/tx_rx_swap/readme.txt +++ b/project/at_start_f437/examples/usart/tx_rx_swap/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/usart/tx_rx_swap/src/at32f435_437_clock.c b/project/at_start_f437/examples/usart/tx_rx_swap/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/usart/tx_rx_swap/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/usart/tx_rx_swap/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usart/tx_rx_swap/src/at32f435_437_int.c b/project/at_start_f437/examples/usart/tx_rx_swap/src/at32f435_437_int.c index 5cc86b24..d6a871be 100644 --- a/project/at_start_f437/examples/usart/tx_rx_swap/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/usart/tx_rx_swap/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usart/tx_rx_swap/src/main.c b/project/at_start_f437/examples/usart/tx_rx_swap/src/main.c index 5eed0526..8b013773 100644 --- a/project/at_start_f437/examples/usart/tx_rx_swap/src/main.c +++ b/project/at_start_f437/examples/usart/tx_rx_swap/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_device/audio/inc/at32f435_437_clock.h b/project/at_start_f437/examples/usb_device/audio/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/usb_device/audio/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/usb_device/audio/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_device/audio/inc/at32f435_437_conf.h b/project/at_start_f437/examples/usb_device/audio/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/usb_device/audio/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/usb_device/audio/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_device/audio/inc/at32f435_437_int.h b/project/at_start_f437/examples/usb_device/audio/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/usb_device/audio/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/usb_device/audio/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_device/audio/inc/audio_codec.h b/project/at_start_f437/examples/usb_device/audio/inc/audio_codec.h index 71f926d3..a581fd0a 100644 --- a/project/at_start_f437/examples/usb_device/audio/inc/audio_codec.h +++ b/project/at_start_f437/examples/usb_device/audio/inc/audio_codec.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file audio_codec.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief audio codec header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_device/audio/inc/usb_conf.h b/project/at_start_f437/examples/usb_device/audio/inc/usb_conf.h index 2a762e11..25400d36 100644 --- a/project/at_start_f437/examples/usb_device/audio/inc/usb_conf.h +++ b/project/at_start_f437/examples/usb_device/audio/inc/usb_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file usb_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_device/audio/readme.txt b/project/at_start_f437/examples/usb_device/audio/readme.txt index 44e5d440..8bfdc5b1 100644 --- a/project/at_start_f437/examples/usb_device/audio/readme.txt +++ b/project/at_start_f437/examples/usb_device/audio/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/usb_device/audio/src/at32f435_437_clock.c b/project/at_start_f437/examples/usb_device/audio/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/usb_device/audio/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/usb_device/audio/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_device/audio/src/at32f435_437_int.c b/project/at_start_f437/examples/usb_device/audio/src/at32f435_437_int.c index c8dc6690..8d8e1003 100644 --- a/project/at_start_f437/examples/usb_device/audio/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/usb_device/audio/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_device/audio/src/audio_codec.c b/project/at_start_f437/examples/usb_device/audio/src/audio_codec.c index 90821bac..67815b6c 100644 --- a/project/at_start_f437/examples/usb_device/audio/src/audio_codec.c +++ b/project/at_start_f437/examples/usb_device/audio/src/audio_codec.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file audio_codec.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief audio codec function ************************************************************************** * Copyright notice & Disclaimer @@ -430,7 +430,7 @@ void i2c_lowlevel_init(i2c_handle_type* hi2c) gpio_init(I2Cx_SDA_GPIO_PORT, &gpio_init_structure); /* config i2c */ - i2c_init(hi2c->i2cx, 0, I2Cx_CLKCTRL); + i2c_init(hi2c->i2cx, 0x0F, I2Cx_CLKCTRL); i2c_own_address1_set(hi2c->i2cx, I2C_ADDRESS_MODE_7BIT, I2Cx_ADDRESS); } diff --git a/project/at_start_f437/examples/usb_device/audio/src/main.c b/project/at_start_f437/examples/usb_device/audio/src/main.c index 46accac3..5901ba9e 100644 --- a/project/at_start_f437/examples/usb_device/audio/src/main.c +++ b/project/at_start_f437/examples/usb_device/audio/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_device/composite_audio_hid/inc/at32f435_437_clock.h b/project/at_start_f437/examples/usb_device/composite_audio_hid/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/usb_device/composite_audio_hid/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/usb_device/composite_audio_hid/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_device/composite_audio_hid/inc/at32f435_437_conf.h b/project/at_start_f437/examples/usb_device/composite_audio_hid/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/usb_device/composite_audio_hid/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/usb_device/composite_audio_hid/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_device/composite_audio_hid/inc/at32f435_437_int.h b/project/at_start_f437/examples/usb_device/composite_audio_hid/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/usb_device/composite_audio_hid/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/usb_device/composite_audio_hid/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_device/composite_audio_hid/inc/audio_codec.h b/project/at_start_f437/examples/usb_device/composite_audio_hid/inc/audio_codec.h index 5e92df2d..e21b1a56 100644 --- a/project/at_start_f437/examples/usb_device/composite_audio_hid/inc/audio_codec.h +++ b/project/at_start_f437/examples/usb_device/composite_audio_hid/inc/audio_codec.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file audio_codec.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief audio codec header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_device/composite_audio_hid/inc/usb_conf.h b/project/at_start_f437/examples/usb_device/composite_audio_hid/inc/usb_conf.h index ac602451..da3dd840 100644 --- a/project/at_start_f437/examples/usb_device/composite_audio_hid/inc/usb_conf.h +++ b/project/at_start_f437/examples/usb_device/composite_audio_hid/inc/usb_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file usb_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_device/composite_audio_hid/readme.txt b/project/at_start_f437/examples/usb_device/composite_audio_hid/readme.txt index 0df996c9..4605d95f 100644 --- a/project/at_start_f437/examples/usb_device/composite_audio_hid/readme.txt +++ b/project/at_start_f437/examples/usb_device/composite_audio_hid/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/usb_device/composite_audio_hid/src/at32f435_437_clock.c b/project/at_start_f437/examples/usb_device/composite_audio_hid/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/usb_device/composite_audio_hid/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/usb_device/composite_audio_hid/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_device/composite_audio_hid/src/at32f435_437_int.c b/project/at_start_f437/examples/usb_device/composite_audio_hid/src/at32f435_437_int.c index 6293eaf5..8203d3ed 100644 --- a/project/at_start_f437/examples/usb_device/composite_audio_hid/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/usb_device/composite_audio_hid/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_device/composite_audio_hid/src/audio_codec.c b/project/at_start_f437/examples/usb_device/composite_audio_hid/src/audio_codec.c index 6d0d40a3..b8f8ebe7 100644 --- a/project/at_start_f437/examples/usb_device/composite_audio_hid/src/audio_codec.c +++ b/project/at_start_f437/examples/usb_device/composite_audio_hid/src/audio_codec.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file audio_codec.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief audio codec function ************************************************************************** * Copyright notice & Disclaimer @@ -430,7 +430,7 @@ void i2c_lowlevel_init(i2c_handle_type* hi2c) gpio_init(I2Cx_SDA_GPIO_PORT, &gpio_init_structure); /* config i2c */ - i2c_init(hi2c->i2cx, 0, I2Cx_CLKCTRL); + i2c_init(hi2c->i2cx, 0x0F, I2Cx_CLKCTRL); i2c_own_address1_set(hi2c->i2cx, I2C_ADDRESS_MODE_7BIT, I2Cx_ADDRESS); } diff --git a/project/at_start_f437/examples/usb_device/composite_audio_hid/src/main.c b/project/at_start_f437/examples/usb_device/composite_audio_hid/src/main.c index 6cd2bf3c..0ecd5dd1 100644 --- a/project/at_start_f437/examples/usb_device/composite_audio_hid/src/main.c +++ b/project/at_start_f437/examples/usb_device/composite_audio_hid/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_device/composite_vcp_keyboard/inc/at32f435_437_clock.h b/project/at_start_f437/examples/usb_device/composite_vcp_keyboard/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/usb_device/composite_vcp_keyboard/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/usb_device/composite_vcp_keyboard/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_device/composite_vcp_keyboard/inc/at32f435_437_conf.h b/project/at_start_f437/examples/usb_device/composite_vcp_keyboard/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/usb_device/composite_vcp_keyboard/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/usb_device/composite_vcp_keyboard/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_device/composite_vcp_keyboard/inc/at32f435_437_int.h b/project/at_start_f437/examples/usb_device/composite_vcp_keyboard/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/usb_device/composite_vcp_keyboard/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/usb_device/composite_vcp_keyboard/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_device/composite_vcp_keyboard/inc/usb_conf.h b/project/at_start_f437/examples/usb_device/composite_vcp_keyboard/inc/usb_conf.h index 10f78f65..3505858f 100644 --- a/project/at_start_f437/examples/usb_device/composite_vcp_keyboard/inc/usb_conf.h +++ b/project/at_start_f437/examples/usb_device/composite_vcp_keyboard/inc/usb_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file usb_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_device/composite_vcp_keyboard/readme.txt b/project/at_start_f437/examples/usb_device/composite_vcp_keyboard/readme.txt index c276c458..6c28bae2 100644 --- a/project/at_start_f437/examples/usb_device/composite_vcp_keyboard/readme.txt +++ b/project/at_start_f437/examples/usb_device/composite_vcp_keyboard/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/usb_device/composite_vcp_keyboard/src/at32f435_437_clock.c b/project/at_start_f437/examples/usb_device/composite_vcp_keyboard/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/usb_device/composite_vcp_keyboard/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/usb_device/composite_vcp_keyboard/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_device/composite_vcp_keyboard/src/at32f435_437_int.c b/project/at_start_f437/examples/usb_device/composite_vcp_keyboard/src/at32f435_437_int.c index 9637a3b7..0a1b5096 100644 --- a/project/at_start_f437/examples/usb_device/composite_vcp_keyboard/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/usb_device/composite_vcp_keyboard/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_device/composite_vcp_keyboard/src/main.c b/project/at_start_f437/examples/usb_device/composite_vcp_keyboard/src/main.c index 96b75551..705e1a24 100644 --- a/project/at_start_f437/examples/usb_device/composite_vcp_keyboard/src/main.c +++ b/project/at_start_f437/examples/usb_device/composite_vcp_keyboard/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_device/composite_vcp_msc/inc/at32f435_437_clock.h b/project/at_start_f437/examples/usb_device/composite_vcp_msc/inc/at32f435_437_clock.h new file mode 100644 index 00000000..86a4b828 --- /dev/null +++ b/project/at_start_f437/examples/usb_device/composite_vcp_msc/inc/at32f435_437_clock.h @@ -0,0 +1,46 @@ +/** + ************************************************************************** + * @file at32f435_437_clock.h + * @version v2.0.9 + * @date 2022-06-28 + * @brief header file of clock program + ************************************************************************** + * Copyright notice & Disclaimer + * + * The software Board Support Package (BSP) that is made available to + * download from Artery official website is the copyrighted work of Artery. + * Artery authorizes customers to use, copy, and distribute the BSP + * software and its related documentation for the purpose of design and + * development in conjunction with Artery microcontrollers. Use of the + * software is governed by this copyright notice and the following disclaimer. + * + * THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, + * GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, + * TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR + * STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, + * INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. + * + ************************************************************************** + */ + +/* define to prevent recursive inclusion -------------------------------------*/ +#ifndef __AT32F435_437_CLOCK_H +#define __AT32F435_437_CLOCK_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* includes ------------------------------------------------------------------*/ +#include "at32f435_437.h" + +/* exported functions ------------------------------------------------------- */ +void system_clock_config(void); + +#ifdef __cplusplus +} +#endif + +#endif + diff --git a/project/at_start_f437/examples/usb_device/composite_vcp_msc/inc/at32f435_437_conf.h b/project/at_start_f437/examples/usb_device/composite_vcp_msc/inc/at32f435_437_conf.h new file mode 100644 index 00000000..e2816415 --- /dev/null +++ b/project/at_start_f437/examples/usb_device/composite_vcp_msc/inc/at32f435_437_conf.h @@ -0,0 +1,174 @@ +/** + ************************************************************************** + * @file at32f435_437_conf.h + * @version v2.0.9 + * @date 2022-06-28 + * @brief at32f435_437 config header file + ************************************************************************** + * Copyright notice & Disclaimer + * + * The software Board Support Package (BSP) that is made available to + * download from Artery official website is the copyrighted work of Artery. + * Artery authorizes customers to use, copy, and distribute the BSP + * software and its related documentation for the purpose of design and + * development in conjunction with Artery microcontrollers. Use of the + * software is governed by this copyright notice and the following disclaimer. + * + * THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, + * GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, + * TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR + * STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, + * INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. + * + ************************************************************************** + */ + +/* define to prevent recursive inclusion -------------------------------------*/ +#ifndef __AT32F435_437_CONF_H +#define __AT32F435_437_CONF_H + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @brief in the following line adjust the value of high speed exernal crystal (hext) + * used in your application + * + * tip: to avoid modifying this file each time you need to use different hext, you + * can define the hext value in your toolchain compiler preprocessor. + * + */ +#if !defined HEXT_VALUE +#define HEXT_VALUE ((uint32_t)8000000) /*!< value of the high speed exernal crystal in hz */ +#endif + +/** + * @brief in the following line adjust the high speed exernal crystal (hext) startup + * timeout value + */ +#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000) /*!< time out for hext start up */ +#define HICK_VALUE ((uint32_t)8000000) /*!< value of the high speed internal clock in hz */ + +/* module define -------------------------------------------------------------*/ +#define CRM_MODULE_ENABLED +#define TMR_MODULE_ENABLED +#define ERTC_MODULE_ENABLED +#define GPIO_MODULE_ENABLED +#define I2C_MODULE_ENABLED +#define USART_MODULE_ENABLED +#define PWC_MODULE_ENABLED +#define CAN_MODULE_ENABLED +#define ADC_MODULE_ENABLED +#define DAC_MODULE_ENABLED +#define SPI_MODULE_ENABLED +#define EDMA_MODULE_ENABLED +#define DMA_MODULE_ENABLED +#define DEBUG_MODULE_ENABLED +#define FLASH_MODULE_ENABLED +#define CRC_MODULE_ENABLED +#define WWDT_MODULE_ENABLED +#define WDT_MODULE_ENABLED +#define EXINT_MODULE_ENABLED +#define SDIO_MODULE_ENABLED +#define XMC_MODULE_ENABLED +#define USB_MODULE_ENABLED +#define ACC_MODULE_ENABLED +#define MISC_MODULE_ENABLED +#define QSPI_MODULE_ENABLED +#define DVP_MODULE_ENABLED +#define SCFG_MODULE_ENABLED +#define EMAC_MODULE_ENABLED + +/* includes ------------------------------------------------------------------*/ +#ifdef CRM_MODULE_ENABLED +#include "at32f435_437_crm.h" +#endif +#ifdef TMR_MODULE_ENABLED +#include "at32f435_437_tmr.h" +#endif +#ifdef ERTC_MODULE_ENABLED +#include "at32f435_437_ertc.h" +#endif +#ifdef GPIO_MODULE_ENABLED +#include "at32f435_437_gpio.h" +#endif +#ifdef I2C_MODULE_ENABLED +#include "at32f435_437_i2c.h" +#endif +#ifdef USART_MODULE_ENABLED +#include "at32f435_437_usart.h" +#endif +#ifdef PWC_MODULE_ENABLED +#include "at32f435_437_pwc.h" +#endif +#ifdef CAN_MODULE_ENABLED +#include "at32f435_437_can.h" +#endif +#ifdef ADC_MODULE_ENABLED +#include "at32f435_437_adc.h" +#endif +#ifdef DAC_MODULE_ENABLED +#include "at32f435_437_dac.h" +#endif +#ifdef SPI_MODULE_ENABLED +#include "at32f435_437_spi.h" +#endif +#ifdef DMA_MODULE_ENABLED +#include "at32f435_437_dma.h" +#endif +#ifdef DEBUG_MODULE_ENABLED +#include "at32f435_437_debug.h" +#endif +#ifdef FLASH_MODULE_ENABLED +#include "at32f435_437_flash.h" +#endif +#ifdef CRC_MODULE_ENABLED +#include "at32f435_437_crc.h" +#endif +#ifdef WWDT_MODULE_ENABLED +#include "at32f435_437_wwdt.h" +#endif +#ifdef WDT_MODULE_ENABLED +#include "at32f435_437_wdt.h" +#endif +#ifdef EXINT_MODULE_ENABLED +#include "at32f435_437_exint.h" +#endif +#ifdef SDIO_MODULE_ENABLED +#include "at32f435_437_sdio.h" +#endif +#ifdef XMC_MODULE_ENABLED +#include "at32f435_437_xmc.h" +#endif +#ifdef ACC_MODULE_ENABLED +#include "at32f435_437_acc.h" +#endif +#ifdef MISC_MODULE_ENABLED +#include "at32f435_437_misc.h" +#endif +#ifdef EDMA_MODULE_ENABLED +#include "at32f435_437_edma.h" +#endif +#ifdef QSPI_MODULE_ENABLED +#include "at32f435_437_qspi.h" +#endif +#ifdef SCFG_MODULE_ENABLED +#include "at32f435_437_scfg.h" +#endif +#ifdef EMAC_MODULE_ENABLED +#include "at32f435_437_emac.h" +#endif +#ifdef DVP_MODULE_ENABLED +#include "at32f435_437_dvp.h" +#endif +#ifdef USB_MODULE_ENABLED +#include "at32f435_437_usb.h" +#endif + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/project/at_start_f437/examples/usb_device/composite_vcp_msc/inc/at32f435_437_int.h b/project/at_start_f437/examples/usb_device/composite_vcp_msc/inc/at32f435_437_int.h new file mode 100644 index 00000000..80aec042 --- /dev/null +++ b/project/at_start_f437/examples/usb_device/composite_vcp_msc/inc/at32f435_437_int.h @@ -0,0 +1,58 @@ +/** + ************************************************************************** + * @file at32f435_437_int.h + * @version v2.0.9 + * @date 2022-06-28 + * @brief header file of main interrupt service routines. + ************************************************************************** + * Copyright notice & Disclaimer + * + * The software Board Support Package (BSP) that is made available to + * download from Artery official website is the copyrighted work of Artery. + * Artery authorizes customers to use, copy, and distribute the BSP + * software and its related documentation for the purpose of design and + * development in conjunction with Artery microcontrollers. Use of the + * software is governed by this copyright notice and the following disclaimer. + * + * THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, + * GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, + * TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR + * STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, + * INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. + * + ************************************************************************** + */ + +/* define to prevent recursive inclusion -------------------------------------*/ +#ifndef __AT32F435_437_INT_H +#define __AT32F435_437_INT_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* includes ------------------------------------------------------------------*/ +#include "at32f435_437.h" + +/* exported types ------------------------------------------------------------*/ +/* exported constants --------------------------------------------------------*/ +/* exported macro ------------------------------------------------------------*/ +/* exported functions ------------------------------------------------------- */ + +void NMI_Handler(void); +void HardFault_Handler(void); +void MemManage_Handler(void); +void BusFault_Handler(void); +void UsageFault_Handler(void); +void SVC_Handler(void); +void DebugMon_Handler(void); +void PendSV_Handler(void); +void SysTick_Handler(void); + +#ifdef __cplusplus +} +#endif + +#endif + diff --git a/project/at_start_f437/examples/usb_device/composite_vcp_msc/inc/msc_diskio.h b/project/at_start_f437/examples/usb_device/composite_vcp_msc/inc/msc_diskio.h new file mode 100644 index 00000000..99b46845 --- /dev/null +++ b/project/at_start_f437/examples/usb_device/composite_vcp_msc/inc/msc_diskio.h @@ -0,0 +1,74 @@ +/** + ************************************************************************** + * @file msc_diskio.h + * @version v2.0.9 + * @date 2022-06-28 + * @brief usb mass storage disk interface header file + ************************************************************************** + * Copyright notice & Disclaimer + * + * The software Board Support Package (BSP) that is made available to + * download from Artery official website is the copyrighted work of Artery. + * Artery authorizes customers to use, copy, and distribute the BSP + * software and its related documentation for the purpose of design and + * development in conjunction with Artery microcontrollers. Use of the + * software is governed by this copyright notice and the following disclaimer. + * + * THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, + * GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, + * TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR + * STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, + * INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. + * + ************************************************************************** + */ +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __MSC_DISKIO_H +#define __MSC_DISKIO_H + +#ifdef __cplusplus +extern "C" { +#endif + + +#include "usb_conf.h" +#include "usb_std.h" + +/** @addtogroup AT32F437_periph_examples + * @{ + */ + +/** @addtogroup 437_USB_device_msc + * @{ + */ +#define INTERNAL_FLASH_LUN 0 +#define SPI_FLASH_LUN 1 +#define SD_LUN 2 + +#define USB_FLASH_ADDR_OFFSET 0x08005000 + +#define SECTOR_SIZE_1K 1024 +#define SECTOR_SIZE_2K 2048 +#define SECTOR_SIZE_4K 4096 + +uint8_t *get_inquiry(uint8_t lun); +usb_sts_type msc_disk_read(uint8_t lun, uint32_t addr, uint8_t *read_buf, uint32_t len); +usb_sts_type msc_disk_write(uint8_t lun, uint32_t addr, uint8_t *buf, uint32_t len); +usb_sts_type msc_disk_capacity(uint8_t lun, uint32_t *blk_nbr, uint32_t *blk_size); + +/** + * @} + */ + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif + + diff --git a/project/at_start_f437/examples/usb_device/composite_vcp_msc/inc/usb_conf.h b/project/at_start_f437/examples/usb_device/composite_vcp_msc/inc/usb_conf.h new file mode 100644 index 00000000..9e840c52 --- /dev/null +++ b/project/at_start_f437/examples/usb_device/composite_vcp_msc/inc/usb_conf.h @@ -0,0 +1,223 @@ +/** + ************************************************************************** + * @file usb_conf.h + * @version v2.0.9 + * @date 2022-06-28 + * @brief usb config header file + ************************************************************************** + * Copyright notice & Disclaimer + * + * The software Board Support Package (BSP) that is made available to + * download from Artery official website is the copyrighted work of Artery. + * Artery authorizes customers to use, copy, and distribute the BSP + * software and its related documentation for the purpose of design and + * development in conjunction with Artery microcontrollers. Use of the + * software is governed by this copyright notice and the following disclaimer. + * + * THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, + * GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, + * TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR + * STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, + * INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. + * + ************************************************************************** + */ + +/* define to prevent recursive inclusion -------------------------------------*/ +#ifndef __USB_CONF_H +#define __USB_CONF_H + +#ifdef __cplusplus +extern "C" { +#endif + +#include "at32f435_437_usb.h" +#include "at32f435_437.h" +#include "stdio.h" + + +/** @addtogroup AT32F437_periph_examples + * @{ + */ + +/** @addtogroup 437_USB_device_composite_vcp_msc + * @{ + */ + + +/** + * @brief enable usb device mode + */ +#define USE_OTG_DEVICE_MODE + +/** + * @brief enable usb host mode + */ +/* #define USE_OTG_HOST_MODE */ + +/** + * @brief select otgfs1 or otgfs2 define + */ + +/* use otgfs1 */ +#define OTG_USB_ID 1 + +/* use otgfs2 */ +/* #define OTG_USB_ID 2 */ + +#if (OTG_USB_ID == 1) +#define USB_ID 0 +#define OTG_CLOCK CRM_OTGFS1_PERIPH_CLOCK +#define OTG_IRQ OTGFS1_IRQn +#define OTG_IRQ_HANDLER OTGFS1_IRQHandler +#define OTG_WKUP_IRQ OTGFS1_WKUP_IRQn +#define OTG_WKUP_HANDLER OTGFS1_WKUP_IRQHandler +#define OTG_WKUP_EXINT_LINE EXINT_LINE_18 + +#define OTG_PIN_GPIO GPIOA +#define OTG_PIN_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK + +#define OTG_PIN_DP GPIO_PINS_12 +#define OTG_PIN_DP_SOURCE GPIO_PINS_SOURCE12 + +#define OTG_PIN_DM GPIO_PINS_11 +#define OTG_PIN_DM_SOURCE GPIO_PINS_SOURCE11 + +#define OTG_PIN_VBUS GPIO_PINS_9 +#define OTG_PIN_VBUS_SOURCE GPIO_PINS_SOURCE9 + +#define OTG_PIN_ID GPIO_PINS_10 +#define OTG_PIN_ID_SOURCE GPIO_PINS_SOURCE10 + +#define OTG_PIN_SOF_GPIO GPIOA +#define OTG_PIN_SOF_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK +#define OTG_PIN_SOF GPIO_PINS_8 +#define OTG_PIN_SOF_SOURCE GPIO_PINS_SOURCE8 + +#define OTG_PIN_MUX GPIO_MUX_10 +#endif + +#if (OTG_USB_ID == 2) +#define USB_ID 1 +#define OTG_CLOCK CRM_OTGFS2_PERIPH_CLOCK +#define OTG_IRQ OTGFS2_IRQn +#define OTG_IRQ_HANDLER OTGFS2_IRQHandler +#define OTG_WKUP_IRQ OTGFS2_WKUP_IRQn +#define OTG_WKUP_HANDLER OTGFS2_WKUP_IRQHandler +#define OTG_WKUP_EXINT_LINE EXINT_LINE_20 + +#define OTG_PIN_GPIO GPIOB +#define OTG_PIN_GPIO_CLOCK CRM_GPIOB_PERIPH_CLOCK + +#define OTG_PIN_DP GPIO_PINS_15 +#define OTG_PIN_DP_SOURCE GPIO_PINS_SOURCE15 + +#define OTG_PIN_DM GPIO_PINS_14 +#define OTG_PIN_DM_SOURCE GPIO_PINS_SOURCE14 + +#define OTG_PIN_VBUS GPIO_PINS_13 +#define OTG_PIN_VBUS_SOURCE GPIO_PINS_SOURCE13 + +#define OTG_PIN_ID GPIO_PINS_12 +#define OTG_PIN_ID_SOURCE GPIO_PINS_SOURCE10 + +#define OTG_PIN_SOF_GPIO GPIOA +#define OTG_PIN_SOF_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK +#define OTG_PIN_SOF GPIO_PINS_4 +#define OTG_PIN_SOF_SOURCE GPIO_PINS_SOURCE4 + +#define OTG_PIN_MUX GPIO_MUX_12 +#endif + + +/** + * @brief usb device mode config + */ +#ifdef USE_OTG_DEVICE_MODE +/** + * @brief usb device mode fifo + */ +/* otg1 device fifo */ +#define USBD_RX_SIZE 128 +#define USBD_EP0_TX_SIZE 24 +#define USBD_EP1_TX_SIZE 20 +#define USBD_EP2_TX_SIZE 20 +#define USBD_EP3_TX_SIZE 20 +#define USBD_EP4_TX_SIZE 20 +#define USBD_EP5_TX_SIZE 20 +#define USBD_EP6_TX_SIZE 20 +#define USBD_EP7_TX_SIZE 20 + +/* otg2 device fifo */ +#define USBD2_RX_SIZE 128 +#define USBD2_EP0_TX_SIZE 24 +#define USBD2_EP1_TX_SIZE 20 +#define USBD2_EP2_TX_SIZE 20 +#define USBD2_EP3_TX_SIZE 20 +#define USBD2_EP4_TX_SIZE 20 +#define USBD2_EP5_TX_SIZE 20 +#define USBD2_EP6_TX_SIZE 20 +#define USBD2_EP7_TX_SIZE 20 + +/** + * @brief usb endpoint max num define + */ +#ifndef USB_EPT_MAX_NUM +#define USB_EPT_MAX_NUM 8 +#endif +#endif + +/** + * @brief usb host mode config + */ +#ifdef USE_OTG_HOST_MODE +#ifndef USB_HOST_CHANNEL_NUM +#define USB_HOST_CHANNEL_NUM 16 +#endif + +/** + * @brief usb host mode fifo + */ +/* otg1 host fifo */ +#define USBH_RX_FIFO_SIZE 128 +#define USBH_NP_TX_FIFO_SIZE 96 +#define USBH_P_TX_FIFO_SIZE 96 + +/* otg2 host fifo */ +#define USBH2_RX_FIFO_SIZE 128 +#define USBH2_NP_TX_FIFO_SIZE 96 +#define USBH2_P_TX_FIFO_SIZE 96 +#endif + +/** + * @brief usb sof output enable + */ +/* #define USB_SOF_OUTPUT_ENABLE */ + +/** + * @brief usb vbus ignore + */ +#define USB_VBUS_IGNORE + +/** + * @brief usb low power wakeup handler enable + */ +#define USB_LOW_POWER_WAKUP + +void usb_delay_ms(uint32_t ms); +void usb_delay_us(uint32_t us); + +/** + * @} + */ + +/** + * @} + */ +#ifdef __cplusplus +} +#endif + +#endif + diff --git a/project/at_start_f437/examples/usb_device/composite_vcp_msc/mdk_v5/composite_vcp_msc.uvoptx b/project/at_start_f437/examples/usb_device/composite_vcp_msc/mdk_v5/composite_vcp_msc.uvoptx new file mode 100644 index 00000000..414cb909 --- /dev/null +++ b/project/at_start_f437/examples/usb_device/composite_vcp_msc/mdk_v5/composite_vcp_msc.uvoptx @@ -0,0 +1,744 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
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+ at32f435_437_dac.c + 0 + 0 + + + 3 + 12 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_debug.c + at32f435_437_debug.c + 0 + 0 + + + 3 + 13 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_dma.c + at32f435_437_dma.c + 0 + 0 + + + 3 + 14 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_dvp.c + at32f435_437_dvp.c + 0 + 0 + + + 3 + 15 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_edma.c + at32f435_437_edma.c + 0 + 0 + + + 3 + 16 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_emac.c + at32f435_437_emac.c + 0 + 0 + + + 3 + 17 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_ertc.c + at32f435_437_ertc.c + 0 + 0 + + + 3 + 18 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_exint.c + at32f435_437_exint.c + 0 + 0 + + + 3 + 19 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_flash.c + at32f435_437_flash.c + 0 + 0 + + + 3 + 20 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_gpio.c + at32f435_437_gpio.c + 0 + 0 + + + 3 + 21 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_i2c.c + at32f435_437_i2c.c + 0 + 0 + + + 3 + 22 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_misc.c + at32f435_437_misc.c + 0 + 0 + + + 3 + 23 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_pwc.c + at32f435_437_pwc.c + 0 + 0 + + + 3 + 24 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_qspi.c + at32f435_437_qspi.c + 0 + 0 + + + 3 + 25 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_scfg.c + at32f435_437_scfg.c + 0 + 0 + + + 3 + 26 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_sdio.c + at32f435_437_sdio.c + 0 + 0 + + + 3 + 27 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_spi.c + at32f435_437_spi.c + 0 + 0 + + + 3 + 28 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_tmr.c + at32f435_437_tmr.c + 0 + 0 + + + 3 + 29 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_usart.c + at32f435_437_usart.c + 0 + 0 + + + 3 + 30 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_usb.c + at32f435_437_usb.c + 0 + 0 + + + 3 + 31 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_wdt.c + at32f435_437_wdt.c + 0 + 0 + + + 3 + 32 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_wwdt.c + at32f435_437_wwdt.c + 0 + 0 + + + 3 + 33 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_xmc.c + at32f435_437_xmc.c + 0 + 0 + + + + + cmsis + 0 + 0 + 0 + 0 + + 4 + 34 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\libraries\cmsis\cm4\device_support\system_at32f435_437.c + system_at32f435_437.c + 0 + 0 + + + 4 + 35 + 2 + 0 + 0 + 0 + ..\..\..\..\..\..\libraries\cmsis\cm4\device_support\startup\mdk\startup_at32f435_437.s + startup_at32f435_437.s + 0 + 0 + + + + + usbd_driver + 0 + 0 + 0 + 0 + + 5 + 36 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\middlewares\usb_drivers\src\usb_core.c + usb_core.c + 0 + 0 + + + 5 + 37 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\middlewares\usb_drivers\src\usbd_core.c + usbd_core.c + 0 + 0 + + + 5 + 38 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\middlewares\usb_drivers\src\usbd_int.c + usbd_int.c + 0 + 0 + + + 5 + 39 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\middlewares\usb_drivers\src\usbd_sdr.c + usbd_sdr.c + 0 + 0 + + + + + usbd_class + 0 + 0 + 0 + 0 + + 6 + 40 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\middlewares\usbd_class\composite_cdc_msc\cdc_msc_class.c + cdc_msc_class.c + 0 + 0 + + + 6 + 41 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\middlewares\usbd_class\composite_cdc_msc\cdc_msc_desc.c + cdc_msc_desc.c + 0 + 0 + + + 6 + 42 + 1 + 0 + 0 + 0 + ..\..\..\..\..\..\middlewares\usbd_class\composite_cdc_msc\msc_bot_scsi.c + msc_bot_scsi.c + 0 + 0 + + + + + readme + 0 + 0 + 0 + 0 + + 7 + 43 + 5 + 0 + 0 + 0 + ..\readme.txt + readme.txt + 0 + 0 + + + + diff --git a/project/at_start_f437/examples/usb_device/composite_vcp_msc/mdk_v5/composite_vcp_msc.uvprojx b/project/at_start_f437/examples/usb_device/composite_vcp_msc/mdk_v5/composite_vcp_msc.uvprojx new file mode 100644 index 00000000..5d8deabd --- /dev/null +++ b/project/at_start_f437/examples/usb_device/composite_vcp_msc/mdk_v5/composite_vcp_msc.uvprojx @@ -0,0 +1,657 @@ + + + + 2.1 + +
### uVision Project, (C) Keil Software
+ + + + composite_vcp_msc + 0x4 + ARM-ADS + 5060960::V5.06 update 7 (build 960)::.\ARMCC + 0 + + + -AT32F437ZMT7 + ArteryTek + ArteryTek.AT32F435_437_DFP.2.0.1 + IRAM(0x20000000,0x60000) IROM(0x08000000,0x400000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0AT32F437_4032 -FS08000000 -FL03F0000 -FP0($$Device:-AT32F437ZMT7$Flash\AT32F437_4032.FLM)) + 0 + $$Device:- + + + + + + + + + + $$Device:-AT32F437ZMT7$SVD\AT32F437xx_v2.svd + 0 + 0 + + + + AT32F437ZMT7$Device\Include\at32f435_437.h\ + AT32F437ZMT7$Device\Include\at32f435_437.h\ + + 0 + 0 + 0 + 0 + 1 + + .\objects\ + composite_vcp_msc + 1 + 0 + 1 + 1 + 1 + .\listings\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 0 + + + SARMCM3.DLL + -REMAP -MPU + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM4 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 1 + 4096 + + 1 + BIN\UL2CM3.DLL + + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M4" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 2 + 0 + 0 + 0 + 0 + 8 + 0 + 0 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x60000 + + + 1 + 0x8000000 + 0x400000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x8000000 + 0x400000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x60000 + + + 0 + 0x0 + 0x0 + + + + + + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + 0 + 0 + 0 + 0 + 5 + 3 + 1 + 1 + 0 + 0 + 0 + + + AT32F437ZMT7,USE_STDPERIPH_DRIVER,AT_START_F437_V1 + + ..\..\..\..\..\..\libraries\cmsis\cm4\core_support;..\..\..\..\..\..\libraries\cmsis\cm4\device_support;..\..\..\..\..\..\libraries\drivers\inc;..\..\..\..\..\at32f435_437_board;..\inc;..\..\..\..\..\..\middlewares\usb_drivers\inc;..\..\..\..\..\..\middlewares\usbd_class\composite_cdc_msc + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 4 + + + + + + + + + 1 + 0 + 0 + 0 + 1 + 0 + 0x08000000 + 0x20000000 + + + + + + + + + + + + + user + + + at32f435_437_clock.c + 1 + ..\src\at32f435_437_clock.c + + + at32f435_437_int.c + 1 + ..\src\at32f435_437_int.c + + + main.c + 1 + ..\src\main.c + + + msc_diskio.c + 1 + ..\src\msc_diskio.c + + + + + bsp + + + at32f435_437_board.c + 1 + ..\..\..\..\..\at32f435_437_board\at32f435_437_board.c + + + + + firmware + + + at32f435_437_acc.c + 1 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_acc.c + + + at32f435_437_adc.c + 1 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_adc.c + + + at32f435_437_can.c + 1 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_can.c + + + at32f435_437_crc.c + 1 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_crc.c + + + at32f435_437_crm.c + 1 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_crm.c + + + at32f435_437_dac.c + 1 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_dac.c + + + at32f435_437_debug.c + 1 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_debug.c + + + at32f435_437_dma.c + 1 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_dma.c + + + at32f435_437_dvp.c + 1 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_dvp.c + + + at32f435_437_edma.c + 1 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_edma.c + + + at32f435_437_emac.c + 1 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_emac.c + + + at32f435_437_ertc.c + 1 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_ertc.c + + + at32f435_437_exint.c + 1 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_exint.c + + + at32f435_437_flash.c + 1 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_flash.c + + + at32f435_437_gpio.c + 1 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_gpio.c + + + at32f435_437_i2c.c + 1 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_i2c.c + + + at32f435_437_misc.c + 1 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_misc.c + + + at32f435_437_pwc.c + 1 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_pwc.c + + + at32f435_437_qspi.c + 1 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_qspi.c + + + at32f435_437_scfg.c + 1 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_scfg.c + + + at32f435_437_sdio.c + 1 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_sdio.c + + + at32f435_437_spi.c + 1 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_spi.c + + + at32f435_437_tmr.c + 1 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_tmr.c + + + at32f435_437_usart.c + 1 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_usart.c + + + at32f435_437_usb.c + 1 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_usb.c + + + at32f435_437_wdt.c + 1 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_wdt.c + + + at32f435_437_wwdt.c + 1 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_wwdt.c + + + at32f435_437_xmc.c + 1 + ..\..\..\..\..\..\libraries\drivers\src\at32f435_437_xmc.c + + + + + cmsis + + + system_at32f435_437.c + 1 + ..\..\..\..\..\..\libraries\cmsis\cm4\device_support\system_at32f435_437.c + + + startup_at32f435_437.s + 2 + ..\..\..\..\..\..\libraries\cmsis\cm4\device_support\startup\mdk\startup_at32f435_437.s + + + + + usbd_driver + + + usb_core.c + 1 + ..\..\..\..\..\..\middlewares\usb_drivers\src\usb_core.c + + + usbd_core.c + 1 + ..\..\..\..\..\..\middlewares\usb_drivers\src\usbd_core.c + + + usbd_int.c + 1 + ..\..\..\..\..\..\middlewares\usb_drivers\src\usbd_int.c + + + usbd_sdr.c + 1 + ..\..\..\..\..\..\middlewares\usb_drivers\src\usbd_sdr.c + + + + + usbd_class + + + cdc_msc_class.c + 1 + ..\..\..\..\..\..\middlewares\usbd_class\composite_cdc_msc\cdc_msc_class.c + + + cdc_msc_desc.c + 1 + ..\..\..\..\..\..\middlewares\usbd_class\composite_cdc_msc\cdc_msc_desc.c + + + msc_bot_scsi.c + 1 + ..\..\..\..\..\..\middlewares\usbd_class\composite_cdc_msc\msc_bot_scsi.c + + + + + readme + + + readme.txt + 5 + ..\readme.txt + + + + + + + + + + + + + + + + + <Project Info> + + + + + + 0 + 1 + + + + + diff --git a/project/at_start_f437/examples/usb_device/composite_vcp_msc/readme.txt b/project/at_start_f437/examples/usb_device/composite_vcp_msc/readme.txt new file mode 100644 index 00000000..df9fb854 --- /dev/null +++ b/project/at_start_f437/examples/usb_device/composite_vcp_msc/readme.txt @@ -0,0 +1,13 @@ +/** + ************************************************************************** + * @file readme.txt + * @version v2.0.9 + * @date 2022-06-28 + * @brief readme + ************************************************************************** + */ + + this demo is based on the at-start board, in this demo, show how to build + a composite device of usb cdc class and mass storage protocol. + for more detailed information, please refer to the application note document AN0097. + diff --git a/project/at_start_f437/examples/usb_device/composite_vcp_msc/src/at32f435_437_clock.c b/project/at_start_f437/examples/usb_device/composite_vcp_msc/src/at32f435_437_clock.c new file mode 100644 index 00000000..5eb8f824 --- /dev/null +++ b/project/at_start_f437/examples/usb_device/composite_vcp_msc/src/at32f435_437_clock.c @@ -0,0 +1,121 @@ +/** + ************************************************************************** + * @file at32f435_437_clock.c + * @version v2.0.9 + * @date 2022-06-28 + * @brief system clock config program + ************************************************************************** + * Copyright notice & Disclaimer + * + * The software Board Support Package (BSP) that is made available to + * download from Artery official website is the copyrighted work of Artery. + * Artery authorizes customers to use, copy, and distribute the BSP + * software and its related documentation for the purpose of design and + * development in conjunction with Artery microcontrollers. Use of the + * software is governed by this copyright notice and the following disclaimer. + * + * THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, + * GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, + * TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR + * STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, + * INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. + * + ************************************************************************** + */ + +/* includes ------------------------------------------------------------------*/ +#include "at32f435_437_clock.h" + +/** + * @brief system clock config program + * @note the system clock is configured as follow: + * - system clock = (hext * pll_ns)/(pll_ms * pll_fr) + * - system clock source = pll (hext) + * - hext = 8000000 + * - sclk = 288000000 + * - ahbdiv = 1 + * - ahbclk = 288000000 + * - apb2div = 2 + * - apb2clk = 144000000 + * - apb1div = 2 + * - apb1clk = 144000000 + * - pll_ns = 72 + * - pll_ms = 1 + * - pll_fr = 2 + * @param none + * @retval none + */ +void system_clock_config(void) +{ + /* enable pwc periph clock */ + crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE); + + /* config ldo voltage */ + pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3); + + /* set the flash clock divider */ + flash_clock_divider_set(FLASH_CLOCK_DIV_3); + + /* reset crm */ + crm_reset(); + + crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE); + + /* wait till hext is ready */ + while(crm_hext_stable_wait() == ERROR) + { + } + + /* config pll clock resource + common frequency config list: pll source selected hick or hext(8mhz) + _______________________________________________________________________________________ + | | | | | | | | | | + |pll(mhz)| 288 | 252 | 216 | 180 | 144 | 108 | 72 | 36 | + |________|_________|_________|_________|_________|_________|_________|_________________| + | | | | | | | | | | + |pll_ns | 72 | 63 | 108 | 90 | 72 | 108 | 72 | 72 | + | | | | | | | | | | + |pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | + | | | | | | | | | | + |pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_8 | FR_8 | FR_16| + |________|_________|_________|_________|_________|_________|_________|________|________| + + if pll clock source selects hext with other frequency values, or configure pll to other + frequency values, please use the at32 new clock configuration tool for configuration. */ + crm_pll_config(CRM_PLL_SOURCE_HEXT, 72, 1, CRM_PLL_FR_2); + + /* enable pll */ + crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE); + + /* wait till pll is ready */ + while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET) + { + } + + /* config ahbclk */ + crm_ahb_div_set(CRM_AHB_DIV_1); + + /* config apb2clk */ + crm_apb2_div_set(CRM_APB2_DIV_2); + + /* config apb1clk */ + crm_apb1_div_set(CRM_APB1_DIV_2); + + /* enable auto step mode */ + crm_auto_step_mode_enable(TRUE); + + /* select pll as system clock source */ + crm_sysclk_switch(CRM_SCLK_PLL); + + /* wait till pll is used as system clock source */ + while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL) + { + } + + /* disable auto step mode */ + crm_auto_step_mode_enable(FALSE); + + /* update system_core_clock global variable */ + system_core_clock_update(); +} diff --git a/project/at_start_f437/examples/usb_device/composite_vcp_msc/src/at32f435_437_int.c b/project/at_start_f437/examples/usb_device/composite_vcp_msc/src/at32f435_437_int.c new file mode 100644 index 00000000..3dbb8249 --- /dev/null +++ b/project/at_start_f437/examples/usb_device/composite_vcp_msc/src/at32f435_437_int.c @@ -0,0 +1,142 @@ +/** + ************************************************************************** + * @file at32f435_437_int.c + * @version v2.0.9 + * @date 2022-06-28 + * @brief main interrupt service routines. + ************************************************************************** + * Copyright notice & Disclaimer + * + * The software Board Support Package (BSP) that is made available to + * download from Artery official website is the copyrighted work of Artery. + * Artery authorizes customers to use, copy, and distribute the BSP + * software and its related documentation for the purpose of design and + * development in conjunction with Artery microcontrollers. Use of the + * software is governed by this copyright notice and the following disclaimer. + * + * THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, + * GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, + * TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR + * STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, + * INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. + * + ************************************************************************** + */ + +/* includes ------------------------------------------------------------------*/ +#include "at32f435_437_int.h" + +/** @addtogroup AT32F437_periph_examples + * @{ + */ + +/** @addtogroup 437_USB_device_composite_vcp_msc + * @{ + */ + +/** + * @brief this function handles nmi exception. + * @param none + * @retval none + */ +void NMI_Handler(void) +{ +} + +/** + * @brief this function handles hard fault exception. + * @param none + * @retval none + */ +void HardFault_Handler(void) +{ + /* go to infinite loop when hard fault exception occurs */ + while(1) + { + } +} + +/** + * @brief this function handles memory manage exception. + * @param none + * @retval none + */ +void MemManage_Handler(void) +{ + /* go to infinite loop when memory manage exception occurs */ + while(1) + { + } +} + +/** + * @brief this function handles bus fault exception. + * @param none + * @retval none + */ +void BusFault_Handler(void) +{ + /* go to infinite loop when bus fault exception occurs */ + while(1) + { + } +} + +/** + * @brief this function handles usage fault exception. + * @param none + * @retval none + */ +void UsageFault_Handler(void) +{ + /* go to infinite loop when usage fault exception occurs */ + while(1) + { + } +} + +/** + * @brief this function handles svcall exception. + * @param none + * @retval none + */ +void SVC_Handler(void) +{ +} + +/** + * @brief this function handles debug monitor exception. + * @param none + * @retval none + */ +void DebugMon_Handler(void) +{ +} + +/** + * @brief this function handles pendsv_handler exception. + * @param none + * @retval none + */ +void PendSV_Handler(void) +{ +} + +/** + * @brief this function handles systick handler. + * @param none + * @retval none + */ +void SysTick_Handler(void) +{ +} + +/** + * @} + */ + +/** + * @} + */ + diff --git a/project/at_start_f437/examples/usb_device/composite_vcp_msc/src/main.c b/project/at_start_f437/examples/usb_device/composite_vcp_msc/src/main.c new file mode 100644 index 00000000..a28ebcbd --- /dev/null +++ b/project/at_start_f437/examples/usb_device/composite_vcp_msc/src/main.c @@ -0,0 +1,384 @@ +/** + ************************************************************************** + * @file main.c + * @version v2.0.9 + * @date 2022-06-28 + * @brief main program + ************************************************************************** + * Copyright notice & Disclaimer + * + * The software Board Support Package (BSP) that is made available to + * download from Artery official website is the copyrighted work of Artery. + * Artery authorizes customers to use, copy, and distribute the BSP + * software and its related documentation for the purpose of design and + * development in conjunction with Artery microcontrollers. Use of the + * software is governed by this copyright notice and the following disclaimer. + * + * THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, + * GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, + * TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR + * STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, + * INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. + * + ************************************************************************** + */ + +#include "at32f435_437_board.h" +#include "at32f435_437_clock.h" +#include "usb_conf.h" +#include "usb_core.h" +#include "usbd_int.h" +#include "cdc_msc_class.h" +#include "cdc_msc_desc.h" + + +/** @addtogroup AT32F437_periph_examples + * @{ + */ + +/** @addtogroup 437_USB_device_composite_vcp_msc USB_device_composite_vcp_msc + * @{ + */ + +/* usb global struct define */ +otg_core_type otg_core_struct; +uint8_t usb_buffer[256]; + +void usb_clock48m_select(usb_clk48_s clk_s); +void usb_gpio_config(void); +void usb_low_power_wakeup_config(void); +void button_exint_init(void); +void button_isr(void); + +/** + * @brief configure button exint + * @param none + * @retval none + */ +void button_exint_init(void) +{ + exint_init_type exint_init_struct; + + crm_periph_clock_enable(CRM_SCFG_PERIPH_CLOCK, TRUE); + scfg_exint_line_config(SCFG_PORT_SOURCE_GPIOA, SCFG_PINS_SOURCE0); + + exint_default_para_init(&exint_init_struct); + exint_init_struct.line_enable = TRUE; + exint_init_struct.line_mode = EXINT_LINE_INTERRUPUT; + exint_init_struct.line_select = EXINT_LINE_0; + exint_init_struct.line_polarity = EXINT_TRIGGER_RISING_EDGE; + exint_init(&exint_init_struct); + + nvic_priority_group_config(NVIC_PRIORITY_GROUP_4); + nvic_irq_enable(EXINT0_IRQn, 0, 0); +} + +/** + * @brief button handler function + * @param none + * @retval none + */ +void button_isr(void) +{ + /* delay 5ms */ + delay_ms(5); + + /* clear interrupt pending bit */ + exint_flag_clear(EXINT_LINE_0); +} + +/** + * @brief exint0 interrupt handler + * @param none + * @retval none + */ +void EXINT0_IRQHandler(void) +{ + button_isr(); +} + + + +/** + * @brief main function. + * @param none + * @retval none + */ +int main(void) +{ + uint16_t data_len; + + uint32_t timeout; + + uint8_t send_zero_packet = 0; + + nvic_priority_group_config(NVIC_PRIORITY_GROUP_4); + + system_clock_config(); + + at32_board_init(); + + button_exint_init(); + + /* usb gpio config */ + usb_gpio_config(); + +#ifdef USB_LOW_POWER_WAKUP + usb_low_power_wakeup_config(); +#endif + + /* enable otgfs clock */ + crm_periph_clock_enable(OTG_CLOCK, TRUE); + + /* select usb 48m clcok source */ + usb_clock48m_select(USB_CLK_HEXT); + + /* enable otgfs irq */ + nvic_irq_enable(OTG_IRQ, 0, 0); + + /* init usb */ + usbd_init(&otg_core_struct, + USB_FULL_SPEED_CORE_ID, + USB_ID, + &cdc_msc_class_handler, + &cdc_msc_desc_handler); + + while(1) + { + /* get usb vcp receive data */ + data_len = usb_vcp_get_rxdata(&otg_core_struct.dev, usb_buffer); + + if(data_len > 0 || send_zero_packet == 1) + { + /* bulk transfer is complete when the endpoint does one of the following + 1 has transferred exactly the amount of data expected + 2 transfers a packet with a payload size less than wMaxPacketSize or transfers a zero-length packet + */ + + if(data_len > 0) + send_zero_packet = 1; + + if(data_len == 0) + send_zero_packet = 0; + + timeout = 5000000; + do + { + /* send data to host */ + if(usb_vcp_send_data(&otg_core_struct.dev, usb_buffer, data_len) == SUCCESS) + { + break; + } + }while(timeout --); + } + + } +} + +/** + * @brief usb 48M clock select + * @param clk_s:USB_CLK_HICK, USB_CLK_HEXT + * @retval none + */ +void usb_clock48m_select(usb_clk48_s clk_s) +{ + if(clk_s == USB_CLK_HICK) + { + crm_usb_clock_source_select(CRM_USB_CLOCK_SOURCE_HICK); + + /* enable the acc calibration ready interrupt */ + crm_periph_clock_enable(CRM_ACC_PERIPH_CLOCK, TRUE); + + /* update the c1\c2\c3 value */ + acc_write_c1(7980); + acc_write_c2(8000); + acc_write_c3(8020); +#if (USB_ID == 0) + acc_sof_select(ACC_SOF_OTG1); +#else + acc_sof_select(ACC_SOF_OTG2); +#endif + /* open acc calibration */ + acc_calibration_mode_enable(ACC_CAL_HICKTRIM, TRUE); + } + else + { + switch(system_core_clock) + { + /* 48MHz */ + case 48000000: + crm_usb_clock_div_set(CRM_USB_DIV_1); + break; + + /* 72MHz */ + case 72000000: + crm_usb_clock_div_set(CRM_USB_DIV_1_5); + break; + + /* 96MHz */ + case 96000000: + crm_usb_clock_div_set(CRM_USB_DIV_2); + break; + + /* 120MHz */ + case 120000000: + crm_usb_clock_div_set(CRM_USB_DIV_2_5); + break; + + /* 144MHz */ + case 144000000: + crm_usb_clock_div_set(CRM_USB_DIV_3); + break; + + /* 168MHz */ + case 168000000: + crm_usb_clock_div_set(CRM_USB_DIV_3_5); + break; + + /* 192MHz */ + case 192000000: + crm_usb_clock_div_set(CRM_USB_DIV_4); + break; + + /* 216MHz */ + case 216000000: + crm_usb_clock_div_set(CRM_USB_DIV_4_5); + break; + + /* 240MHz */ + case 240000000: + crm_usb_clock_div_set(CRM_USB_DIV_5); + break; + + /* 264MHz */ + case 264000000: + crm_usb_clock_div_set(CRM_USB_DIV_5_5); + break; + + /* 288MHz */ + case 288000000: + crm_usb_clock_div_set(CRM_USB_DIV_6); + break; + + default: + break; + + } + } +} + + +/** + * @brief this function config gpio. + * @param none + * @retval none + */ +void usb_gpio_config(void) +{ + gpio_init_type gpio_init_struct; + + crm_periph_clock_enable(OTG_PIN_GPIO_CLOCK, TRUE); + gpio_default_para_init(&gpio_init_struct); + + gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; + gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; + gpio_init_struct.gpio_mode = GPIO_MODE_MUX; + gpio_init_struct.gpio_pull = GPIO_PULL_NONE; + + /* dp and dm */ + gpio_init_struct.gpio_pins = OTG_PIN_DP | OTG_PIN_DM; + gpio_init(OTG_PIN_GPIO, &gpio_init_struct); + + gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_DP_SOURCE, OTG_PIN_MUX); + gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_DM_SOURCE, OTG_PIN_MUX); + +#ifdef USB_SOF_OUTPUT_ENABLE + crm_periph_clock_enable(OTG_PIN_SOF_GPIO_CLOCK, TRUE); + gpio_init_struct.gpio_pins = OTG_PIN_SOF; + gpio_init(OTG_PIN_SOF_GPIO, &gpio_init_struct); + gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_SOF_SOURCE, OTG_PIN_MUX); +#endif + + /* otgfs use vbus pin */ +#ifndef USB_VBUS_IGNORE + gpio_init_struct.gpio_pins = OTG_PIN_VBUS; + gpio_init_struct.gpio_pull = GPIO_PULL_DOWN; + gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_VBUS_SOURCE, OTG_PIN_MUX); + gpio_init(OTG_PIN_GPIO, &gpio_init_struct); +#endif + + +} +#ifdef USB_LOW_POWER_WAKUP +/** + * @brief usb low power wakeup interrupt config + * @param none + * @retval none + */ +void usb_low_power_wakeup_config(void) +{ + exint_init_type exint_init_struct; + + crm_periph_clock_enable(CRM_SCFG_PERIPH_CLOCK, TRUE); + exint_default_para_init(&exint_init_struct); + + exint_init_struct.line_enable = TRUE; + exint_init_struct.line_mode = EXINT_LINE_INTERRUPUT; + exint_init_struct.line_select = OTG_WKUP_EXINT_LINE; + exint_init_struct.line_polarity = EXINT_TRIGGER_RISING_EDGE; + exint_init(&exint_init_struct); + + nvic_irq_enable(OTG_WKUP_IRQ, 0, 0); +} + +/** + * @brief this function handles otgfs wakup interrupt. + * @param none + * @retval none + */ +void OTG_WKUP_HANDLER(void) +{ + exint_flag_clear(OTG_WKUP_EXINT_LINE); +} + +#endif + +/** + * @brief this function handles otgfs interrupt. + * @param none + * @retval none + */ +void OTG_IRQ_HANDLER(void) +{ + usbd_irq_handler(&otg_core_struct); +} + +/** + * @brief usb delay millisecond function. + * @param ms: number of millisecond delay + * @retval none + */ +void usb_delay_ms(uint32_t ms) +{ + /* user can define self delay function */ + delay_ms(ms); +} + +/** + * @brief usb delay microsecond function. + * @param us: number of microsecond delay + * @retval none + */ +void usb_delay_us(uint32_t us) +{ + delay_us(us); +} + +/** + * @} + */ + +/** + * @} + */ diff --git a/project/at_start_f437/examples/usb_device/composite_vcp_msc/src/msc_diskio.c b/project/at_start_f437/examples/usb_device/composite_vcp_msc/src/msc_diskio.c new file mode 100644 index 00000000..e7d09f5e --- /dev/null +++ b/project/at_start_f437/examples/usb_device/composite_vcp_msc/src/msc_diskio.c @@ -0,0 +1,185 @@ +/** + ************************************************************************** + * @file msc_diskio.c + * @version v2.0.9 + * @date 2022-06-28 + * @brief usb mass storage disk function + ************************************************************************** + * Copyright notice & Disclaimer + * + * The software Board Support Package (BSP) that is made available to + * download from Artery official website is the copyrighted work of Artery. + * Artery authorizes customers to use, copy, and distribute the BSP + * software and its related documentation for the purpose of design and + * development in conjunction with Artery microcontrollers. Use of the + * software is governed by this copyright notice and the following disclaimer. + * + * THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, + * GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, + * TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR + * STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, + * INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. + * + ************************************************************************** + */ +#include "msc_diskio.h" +#include "cdc_msc_class.h" + +/** @addtogroup AT32F437_periph_examples + * @{ + */ + +/** @addtogroup 437_USB_device_cdc_msc + * @{ + */ +uint32_t sector_size = 2048; +uint32_t msc_flash_size; +uint8_t scsi_inquiry[MSC_SUPPORT_MAX_LUN][SCSI_INQUIRY_DATA_LENGTH] = +{ + /* lun = 0 */ + { + 0x00, /* peripheral device type (direct-access device) */ + 0x80, /* removable media bit */ + 0x00, /* ansi version, ecma version, iso version */ + 0x01, /* respond data format */ + SCSI_INQUIRY_DATA_LENGTH - 5, /* additional length */ + 0x00, 0x00, 0x00, /* reserved */ + 'A', 'T', '3', '2', ' ', ' ', ' ', ' ', /* vendor information "AT32" */ + 'D', 'i', 's', 'k', '0', ' ', ' ', ' ', ' ', ' ', ' ', ' ', ' ', ' ', ' ', ' ', /* Product identification "Disk" */ + '2', '.', '0', '0' /* product revision level */ + } +}; + +/** + * @brief get disk inquiry + * @param lun: logical units number + * @retval inquiry string + */ +uint8_t *get_inquiry(uint8_t lun) +{ + if(lun < MSC_SUPPORT_MAX_LUN) + return (uint8_t *)scsi_inquiry[lun]; + else + return NULL; +} + +/** + * @brief disk read + * @param lun: logical units number + * @param addr: logical address + * @param read_buf: pointer to read buffer + * @param len: read length + * @retval status of usb_sts_type + */ +usb_sts_type msc_disk_read(uint8_t lun, uint32_t addr, uint8_t *read_buf, uint32_t len) +{ + uint32_t i = 0; + uint32_t flash_addr = addr + USB_FLASH_ADDR_OFFSET; + switch(lun) + { + case INTERNAL_FLASH_LUN: + for(i = 0; i < len; i ++) + { + read_buf[i] = *((uint8_t *)flash_addr); + flash_addr += 1; + } + break; + case SPI_FLASH_LUN: + break; + case SD_LUN: + break; + default: + break; + } + return USB_OK; +} + +/** + * @brief disk write + * @param lun: logical units number + * @param addr: logical address + * @param buf: pointer to write buffer + * @param len: write length + * @retval status of usb_sts_type + */ +usb_sts_type msc_disk_write(uint8_t lun, uint32_t addr, uint8_t *buf, uint32_t len) +{ + uint32_t flash_addr = addr + USB_FLASH_ADDR_OFFSET; + uint32_t i = 0, tolen = len; + uint32_t erase_addr = flash_addr; + switch(lun) + { + case INTERNAL_FLASH_LUN: + flash_unlock(); + while(tolen >= sector_size) + { + flash_sector_erase(erase_addr); + tolen -= sector_size; + erase_addr += sector_size; + } + for(i = 0; i < len; i ++) + { + flash_byte_program(flash_addr+i, buf[i]); + } + flash_lock(); + break; + case SPI_FLASH_LUN: + break; + case SD_LUN: + break; + default: + break;; + } + return USB_OK; +} + +/** + * @brief disk capacity + * @param lun: logical units number + * @param blk_nbr: pointer to number of block + * @param blk_size: pointer to block size + * @retval status of usb_sts_type + */ +usb_sts_type msc_disk_capacity(uint8_t lun, uint32_t *blk_nbr, uint32_t *blk_size) +{ + uint32_t devid = (*((uint32_t *)DEBUG_BASE) & 0x00007000) >> 12; + msc_flash_size = (*((uint32_t *)0x1FFFF7E0) << 10) - (USB_FLASH_ADDR_OFFSET - FLASH_BASE); + switch(devid) + { + case 2: + sector_size = SECTOR_SIZE_1K; + break; + case 3: + sector_size = SECTOR_SIZE_2K; + break; + case 4: + sector_size = SECTOR_SIZE_4K; + break; + default: + sector_size = SECTOR_SIZE_2K; + break; + } + switch(lun) + { + case INTERNAL_FLASH_LUN: + *blk_nbr = msc_flash_size / sector_size; + *blk_size = sector_size; + break; + case SPI_FLASH_LUN: + break; + case SD_LUN: + break; + default: + break; + } + return USB_OK; +} + +/** + * @} + */ + +/** + * @} + */ diff --git a/project/at_start_f437/examples/usb_device/custom_hid/inc/at32f435_437_clock.h b/project/at_start_f437/examples/usb_device/custom_hid/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/usb_device/custom_hid/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/usb_device/custom_hid/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_device/custom_hid/inc/at32f435_437_conf.h b/project/at_start_f437/examples/usb_device/custom_hid/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/usb_device/custom_hid/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/usb_device/custom_hid/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_device/custom_hid/inc/at32f435_437_int.h b/project/at_start_f437/examples/usb_device/custom_hid/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/usb_device/custom_hid/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/usb_device/custom_hid/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_device/custom_hid/inc/usb_conf.h b/project/at_start_f437/examples/usb_device/custom_hid/inc/usb_conf.h index 0e1f95c4..caa6f73b 100644 --- a/project/at_start_f437/examples/usb_device/custom_hid/inc/usb_conf.h +++ b/project/at_start_f437/examples/usb_device/custom_hid/inc/usb_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file usb_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_device/custom_hid/readme.txt b/project/at_start_f437/examples/usb_device/custom_hid/readme.txt index e910ec15..1a8a2dac 100644 --- a/project/at_start_f437/examples/usb_device/custom_hid/readme.txt +++ b/project/at_start_f437/examples/usb_device/custom_hid/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/usb_device/custom_hid/src/at32f435_437_clock.c b/project/at_start_f437/examples/usb_device/custom_hid/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/usb_device/custom_hid/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/usb_device/custom_hid/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_device/custom_hid/src/at32f435_437_int.c b/project/at_start_f437/examples/usb_device/custom_hid/src/at32f435_437_int.c index c01bdcf1..9979ca88 100644 --- a/project/at_start_f437/examples/usb_device/custom_hid/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/usb_device/custom_hid/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_device/custom_hid/src/main.c b/project/at_start_f437/examples/usb_device/custom_hid/src/main.c index a3fec9a4..202f99d1 100644 --- a/project/at_start_f437/examples/usb_device/custom_hid/src/main.c +++ b/project/at_start_f437/examples/usb_device/custom_hid/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_device/keyboard/inc/at32f435_437_clock.h b/project/at_start_f437/examples/usb_device/keyboard/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/usb_device/keyboard/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/usb_device/keyboard/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_device/keyboard/inc/at32f435_437_conf.h b/project/at_start_f437/examples/usb_device/keyboard/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/usb_device/keyboard/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/usb_device/keyboard/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_device/keyboard/inc/at32f435_437_int.h b/project/at_start_f437/examples/usb_device/keyboard/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/usb_device/keyboard/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/usb_device/keyboard/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_device/keyboard/inc/usb_conf.h b/project/at_start_f437/examples/usb_device/keyboard/inc/usb_conf.h index 1c317aed..bedc4011 100644 --- a/project/at_start_f437/examples/usb_device/keyboard/inc/usb_conf.h +++ b/project/at_start_f437/examples/usb_device/keyboard/inc/usb_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file usb_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_device/keyboard/readme.txt b/project/at_start_f437/examples/usb_device/keyboard/readme.txt index 10eba00d..2012e9ea 100644 --- a/project/at_start_f437/examples/usb_device/keyboard/readme.txt +++ b/project/at_start_f437/examples/usb_device/keyboard/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/usb_device/keyboard/src/at32f435_437_clock.c b/project/at_start_f437/examples/usb_device/keyboard/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/usb_device/keyboard/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/usb_device/keyboard/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_device/keyboard/src/at32f435_437_int.c b/project/at_start_f437/examples/usb_device/keyboard/src/at32f435_437_int.c index 83175deb..b84beb52 100644 --- a/project/at_start_f437/examples/usb_device/keyboard/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/usb_device/keyboard/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_device/keyboard/src/main.c b/project/at_start_f437/examples/usb_device/keyboard/src/main.c index 2a090e5f..ad1db02b 100644 --- a/project/at_start_f437/examples/usb_device/keyboard/src/main.c +++ b/project/at_start_f437/examples/usb_device/keyboard/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_device/mouse/inc/at32f435_437_clock.h b/project/at_start_f437/examples/usb_device/mouse/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/usb_device/mouse/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/usb_device/mouse/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_device/mouse/inc/at32f435_437_conf.h b/project/at_start_f437/examples/usb_device/mouse/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/usb_device/mouse/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/usb_device/mouse/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_device/mouse/inc/at32f435_437_int.h b/project/at_start_f437/examples/usb_device/mouse/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/usb_device/mouse/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/usb_device/mouse/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_device/mouse/inc/usb_conf.h b/project/at_start_f437/examples/usb_device/mouse/inc/usb_conf.h index 2ad9b648..ea4cb8fe 100644 --- a/project/at_start_f437/examples/usb_device/mouse/inc/usb_conf.h +++ b/project/at_start_f437/examples/usb_device/mouse/inc/usb_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file usb_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_device/mouse/readme.txt b/project/at_start_f437/examples/usb_device/mouse/readme.txt index 0542f5c6..d06f55e4 100644 --- a/project/at_start_f437/examples/usb_device/mouse/readme.txt +++ b/project/at_start_f437/examples/usb_device/mouse/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/usb_device/mouse/src/at32f435_437_clock.c b/project/at_start_f437/examples/usb_device/mouse/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/usb_device/mouse/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/usb_device/mouse/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_device/mouse/src/at32f435_437_int.c b/project/at_start_f437/examples/usb_device/mouse/src/at32f435_437_int.c index 6e050e78..9ac74bab 100644 --- a/project/at_start_f437/examples/usb_device/mouse/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/usb_device/mouse/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_device/mouse/src/main.c b/project/at_start_f437/examples/usb_device/mouse/src/main.c index 89a2ee00..2c4e61a3 100644 --- a/project/at_start_f437/examples/usb_device/mouse/src/main.c +++ b/project/at_start_f437/examples/usb_device/mouse/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_device/msc/inc/at32f435_437_clock.h b/project/at_start_f437/examples/usb_device/msc/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/usb_device/msc/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/usb_device/msc/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_device/msc/inc/at32f435_437_conf.h b/project/at_start_f437/examples/usb_device/msc/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/usb_device/msc/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/usb_device/msc/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_device/msc/inc/at32f435_437_int.h b/project/at_start_f437/examples/usb_device/msc/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/usb_device/msc/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/usb_device/msc/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_device/msc/inc/msc_diskio.h b/project/at_start_f437/examples/usb_device/msc/inc/msc_diskio.h index 0b439774..99b46845 100644 --- a/project/at_start_f437/examples/usb_device/msc/inc/msc_diskio.h +++ b/project/at_start_f437/examples/usb_device/msc/inc/msc_diskio.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file msc_diskio.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb mass storage disk interface header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_device/msc/inc/usb_conf.h b/project/at_start_f437/examples/usb_device/msc/inc/usb_conf.h index 9a666a5b..80ce2a06 100644 --- a/project/at_start_f437/examples/usb_device/msc/inc/usb_conf.h +++ b/project/at_start_f437/examples/usb_device/msc/inc/usb_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file usb_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_device/msc/readme.txt b/project/at_start_f437/examples/usb_device/msc/readme.txt index 9bc584ca..c572a7a9 100644 --- a/project/at_start_f437/examples/usb_device/msc/readme.txt +++ b/project/at_start_f437/examples/usb_device/msc/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/usb_device/msc/src/at32f435_437_clock.c b/project/at_start_f437/examples/usb_device/msc/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/usb_device/msc/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/usb_device/msc/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_device/msc/src/at32f435_437_int.c b/project/at_start_f437/examples/usb_device/msc/src/at32f435_437_int.c index 0ef5e685..ce9cbd99 100644 --- a/project/at_start_f437/examples/usb_device/msc/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/usb_device/msc/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_device/msc/src/main.c b/project/at_start_f437/examples/usb_device/msc/src/main.c index 363a9aea..40a6012a 100644 --- a/project/at_start_f437/examples/usb_device/msc/src/main.c +++ b/project/at_start_f437/examples/usb_device/msc/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_device/msc/src/msc_diskio.c b/project/at_start_f437/examples/usb_device/msc/src/msc_diskio.c index 27002e3c..8c2fc232 100644 --- a/project/at_start_f437/examples/usb_device/msc/src/msc_diskio.c +++ b/project/at_start_f437/examples/usb_device/msc/src/msc_diskio.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file msc_diskio.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb mass storage disk function ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_device/otg1_host_otg2_device_demo/inc/at32f435_437_clock.h b/project/at_start_f437/examples/usb_device/otg1_host_otg2_device_demo/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/usb_device/otg1_host_otg2_device_demo/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/usb_device/otg1_host_otg2_device_demo/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_device/otg1_host_otg2_device_demo/inc/at32f435_437_conf.h b/project/at_start_f437/examples/usb_device/otg1_host_otg2_device_demo/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/usb_device/otg1_host_otg2_device_demo/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/usb_device/otg1_host_otg2_device_demo/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_device/otg1_host_otg2_device_demo/inc/at32f435_437_int.h b/project/at_start_f437/examples/usb_device/otg1_host_otg2_device_demo/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/usb_device/otg1_host_otg2_device_demo/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/usb_device/otg1_host_otg2_device_demo/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h b/project/at_start_f437/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h index 92f7e455..dec0498d 100644 --- a/project/at_start_f437/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h +++ b/project/at_start_f437/examples/usb_device/otg1_host_otg2_device_demo/inc/usb_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file usb_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_device/otg1_host_otg2_device_demo/readme.txt b/project/at_start_f437/examples/usb_device/otg1_host_otg2_device_demo/readme.txt index 298c6dee..4c4796e7 100644 --- a/project/at_start_f437/examples/usb_device/otg1_host_otg2_device_demo/readme.txt +++ b/project/at_start_f437/examples/usb_device/otg1_host_otg2_device_demo/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/usb_device/otg1_host_otg2_device_demo/src/at32f435_437_clock.c b/project/at_start_f437/examples/usb_device/otg1_host_otg2_device_demo/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/usb_device/otg1_host_otg2_device_demo/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/usb_device/otg1_host_otg2_device_demo/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_device/otg1_host_otg2_device_demo/src/at32f435_437_int.c b/project/at_start_f437/examples/usb_device/otg1_host_otg2_device_demo/src/at32f435_437_int.c index 7079e004..4c377797 100644 --- a/project/at_start_f437/examples/usb_device/otg1_host_otg2_device_demo/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/usb_device/otg1_host_otg2_device_demo/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_device/otg1_host_otg2_device_demo/src/main.c b/project/at_start_f437/examples/usb_device/otg1_host_otg2_device_demo/src/main.c index 3f5a0431..c62bc685 100644 --- a/project/at_start_f437/examples/usb_device/otg1_host_otg2_device_demo/src/main.c +++ b/project/at_start_f437/examples/usb_device/otg1_host_otg2_device_demo/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_device/otg1_host_otg2_device_demo/src/usbh_user.c b/project/at_start_f437/examples/usb_device/otg1_host_otg2_device_demo/src/usbh_user.c index 15d277f8..221102b6 100644 --- a/project/at_start_f437/examples/usb_device/otg1_host_otg2_device_demo/src/usbh_user.c +++ b/project/at_start_f437/examples/usb_device/otg1_host_otg2_device_demo/src/usbh_user.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file usbh_user.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb user function ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_device/otg1_host_otg2_device_demo/src/usbh_user.h b/project/at_start_f437/examples/usb_device/otg1_host_otg2_device_demo/src/usbh_user.h index a2d68cb3..2cdf5389 100644 --- a/project/at_start_f437/examples/usb_device/otg1_host_otg2_device_demo/src/usbh_user.h +++ b/project/at_start_f437/examples/usb_device/otg1_host_otg2_device_demo/src/usbh_user.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file usbh_user.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb host user header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_device/printer/inc/at32f435_437_clock.h b/project/at_start_f437/examples/usb_device/printer/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/usb_device/printer/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/usb_device/printer/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_device/printer/inc/at32f435_437_conf.h b/project/at_start_f437/examples/usb_device/printer/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/usb_device/printer/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/usb_device/printer/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_device/printer/inc/at32f435_437_int.h b/project/at_start_f437/examples/usb_device/printer/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/usb_device/printer/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/usb_device/printer/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_device/printer/inc/usb_conf.h b/project/at_start_f437/examples/usb_device/printer/inc/usb_conf.h index 59cfddb0..40d7b4d9 100644 --- a/project/at_start_f437/examples/usb_device/printer/inc/usb_conf.h +++ b/project/at_start_f437/examples/usb_device/printer/inc/usb_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file usb_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_device/printer/readme.txt b/project/at_start_f437/examples/usb_device/printer/readme.txt index e03d74e3..09eb766b 100644 --- a/project/at_start_f437/examples/usb_device/printer/readme.txt +++ b/project/at_start_f437/examples/usb_device/printer/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/usb_device/printer/src/at32f435_437_clock.c b/project/at_start_f437/examples/usb_device/printer/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/usb_device/printer/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/usb_device/printer/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_device/printer/src/at32f435_437_int.c b/project/at_start_f437/examples/usb_device/printer/src/at32f435_437_int.c index b73e45f5..51a3289c 100644 --- a/project/at_start_f437/examples/usb_device/printer/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/usb_device/printer/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_device/printer/src/main.c b/project/at_start_f437/examples/usb_device/printer/src/main.c index bb2910ac..0a2a8c6e 100644 --- a/project/at_start_f437/examples/usb_device/printer/src/main.c +++ b/project/at_start_f437/examples/usb_device/printer/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_device/two_otg_device_demo/inc/at32f435_437_clock.h b/project/at_start_f437/examples/usb_device/two_otg_device_demo/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/usb_device/two_otg_device_demo/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/usb_device/two_otg_device_demo/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_device/two_otg_device_demo/inc/at32f435_437_conf.h b/project/at_start_f437/examples/usb_device/two_otg_device_demo/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/usb_device/two_otg_device_demo/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/usb_device/two_otg_device_demo/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_device/two_otg_device_demo/inc/at32f435_437_int.h b/project/at_start_f437/examples/usb_device/two_otg_device_demo/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/usb_device/two_otg_device_demo/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/usb_device/two_otg_device_demo/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_device/two_otg_device_demo/inc/usb_conf.h b/project/at_start_f437/examples/usb_device/two_otg_device_demo/inc/usb_conf.h index 1eae85e1..4bab7215 100644 --- a/project/at_start_f437/examples/usb_device/two_otg_device_demo/inc/usb_conf.h +++ b/project/at_start_f437/examples/usb_device/two_otg_device_demo/inc/usb_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file usb_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_device/two_otg_device_demo/readme.txt b/project/at_start_f437/examples/usb_device/two_otg_device_demo/readme.txt index c624e59e..827f2b42 100644 --- a/project/at_start_f437/examples/usb_device/two_otg_device_demo/readme.txt +++ b/project/at_start_f437/examples/usb_device/two_otg_device_demo/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/usb_device/two_otg_device_demo/src/at32f435_437_clock.c b/project/at_start_f437/examples/usb_device/two_otg_device_demo/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/usb_device/two_otg_device_demo/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/usb_device/two_otg_device_demo/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_device/two_otg_device_demo/src/at32f435_437_int.c b/project/at_start_f437/examples/usb_device/two_otg_device_demo/src/at32f435_437_int.c index bd81de2c..e2942058 100644 --- a/project/at_start_f437/examples/usb_device/two_otg_device_demo/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/usb_device/two_otg_device_demo/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_device/two_otg_device_demo/src/main.c b/project/at_start_f437/examples/usb_device/two_otg_device_demo/src/main.c index e764b3c5..792c1744 100644 --- a/project/at_start_f437/examples/usb_device/two_otg_device_demo/src/main.c +++ b/project/at_start_f437/examples/usb_device/two_otg_device_demo/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_device/vcp_loopback/inc/at32f435_437_clock.h b/project/at_start_f437/examples/usb_device/vcp_loopback/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/usb_device/vcp_loopback/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/usb_device/vcp_loopback/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_device/vcp_loopback/inc/at32f435_437_conf.h b/project/at_start_f437/examples/usb_device/vcp_loopback/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/usb_device/vcp_loopback/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/usb_device/vcp_loopback/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_device/vcp_loopback/inc/at32f435_437_int.h b/project/at_start_f437/examples/usb_device/vcp_loopback/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/usb_device/vcp_loopback/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/usb_device/vcp_loopback/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_device/vcp_loopback/inc/usb_conf.h b/project/at_start_f437/examples/usb_device/vcp_loopback/inc/usb_conf.h index 1c76f208..82656c55 100644 --- a/project/at_start_f437/examples/usb_device/vcp_loopback/inc/usb_conf.h +++ b/project/at_start_f437/examples/usb_device/vcp_loopback/inc/usb_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file usb_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_device/vcp_loopback/readme.txt b/project/at_start_f437/examples/usb_device/vcp_loopback/readme.txt index 19379ec5..831b99fe 100644 --- a/project/at_start_f437/examples/usb_device/vcp_loopback/readme.txt +++ b/project/at_start_f437/examples/usb_device/vcp_loopback/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/usb_device/vcp_loopback/src/at32f435_437_clock.c b/project/at_start_f437/examples/usb_device/vcp_loopback/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/usb_device/vcp_loopback/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/usb_device/vcp_loopback/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_device/vcp_loopback/src/at32f435_437_int.c b/project/at_start_f437/examples/usb_device/vcp_loopback/src/at32f435_437_int.c index 9d700996..41e163c5 100644 --- a/project/at_start_f437/examples/usb_device/vcp_loopback/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/usb_device/vcp_loopback/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_device/vcp_loopback/src/main.c b/project/at_start_f437/examples/usb_device/vcp_loopback/src/main.c index 6b466404..1bbaba24 100644 --- a/project/at_start_f437/examples/usb_device/vcp_loopback/src/main.c +++ b/project/at_start_f437/examples/usb_device/vcp_loopback/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_device/virtual_comport/inc/at32f435_437_clock.h b/project/at_start_f437/examples/usb_device/virtual_comport/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/usb_device/virtual_comport/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/usb_device/virtual_comport/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_device/virtual_comport/inc/at32f435_437_conf.h b/project/at_start_f437/examples/usb_device/virtual_comport/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/usb_device/virtual_comport/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/usb_device/virtual_comport/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_device/virtual_comport/inc/at32f435_437_int.h b/project/at_start_f437/examples/usb_device/virtual_comport/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/usb_device/virtual_comport/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/usb_device/virtual_comport/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_device/virtual_comport/inc/usb_conf.h b/project/at_start_f437/examples/usb_device/virtual_comport/inc/usb_conf.h index 26397a3a..f0c38fce 100644 --- a/project/at_start_f437/examples/usb_device/virtual_comport/inc/usb_conf.h +++ b/project/at_start_f437/examples/usb_device/virtual_comport/inc/usb_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file usb_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_device/virtual_comport/readme.txt b/project/at_start_f437/examples/usb_device/virtual_comport/readme.txt index 9f3f669f..b4667dc1 100644 --- a/project/at_start_f437/examples/usb_device/virtual_comport/readme.txt +++ b/project/at_start_f437/examples/usb_device/virtual_comport/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/usb_device/virtual_comport/src/at32f435_437_clock.c b/project/at_start_f437/examples/usb_device/virtual_comport/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/usb_device/virtual_comport/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/usb_device/virtual_comport/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_device/virtual_comport/src/at32f435_437_int.c b/project/at_start_f437/examples/usb_device/virtual_comport/src/at32f435_437_int.c index b476eb08..0181c020 100644 --- a/project/at_start_f437/examples/usb_device/virtual_comport/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/usb_device/virtual_comport/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_device/virtual_comport/src/main.c b/project/at_start_f437/examples/usb_device/virtual_comport/src/main.c index 898f808e..85025230 100644 --- a/project/at_start_f437/examples/usb_device/virtual_comport/src/main.c +++ b/project/at_start_f437/examples/usb_device/virtual_comport/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_device/virtual_msc_iap/inc/at32f435_437_clock.h b/project/at_start_f437/examples/usb_device/virtual_msc_iap/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/usb_device/virtual_msc_iap/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/usb_device/virtual_msc_iap/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_device/virtual_msc_iap/inc/at32f435_437_conf.h b/project/at_start_f437/examples/usb_device/virtual_msc_iap/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/usb_device/virtual_msc_iap/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/usb_device/virtual_msc_iap/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_device/virtual_msc_iap/inc/at32f435_437_int.h b/project/at_start_f437/examples/usb_device/virtual_msc_iap/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/usb_device/virtual_msc_iap/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/usb_device/virtual_msc_iap/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_device/virtual_msc_iap/inc/flash_fat16.h b/project/at_start_f437/examples/usb_device/virtual_msc_iap/inc/flash_fat16.h index 8070d470..8f652c35 100644 --- a/project/at_start_f437/examples/usb_device/virtual_msc_iap/inc/flash_fat16.h +++ b/project/at_start_f437/examples/usb_device/virtual_msc_iap/inc/flash_fat16.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file flash_fat16.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief fat16 file system header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_device/virtual_msc_iap/inc/msc_diskio.h b/project/at_start_f437/examples/usb_device/virtual_msc_iap/inc/msc_diskio.h index 7f8aab6f..5fcb16c8 100644 --- a/project/at_start_f437/examples/usb_device/virtual_msc_iap/inc/msc_diskio.h +++ b/project/at_start_f437/examples/usb_device/virtual_msc_iap/inc/msc_diskio.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file msc_diskio.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb mass storage disk interface header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_device/virtual_msc_iap/inc/usb_conf.h b/project/at_start_f437/examples/usb_device/virtual_msc_iap/inc/usb_conf.h index 6c59f0e1..08d90c69 100644 --- a/project/at_start_f437/examples/usb_device/virtual_msc_iap/inc/usb_conf.h +++ b/project/at_start_f437/examples/usb_device/virtual_msc_iap/inc/usb_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file usb_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_device/virtual_msc_iap/readme.txt b/project/at_start_f437/examples/usb_device/virtual_msc_iap/readme.txt index b691b16f..6abcf7b3 100644 --- a/project/at_start_f437/examples/usb_device/virtual_msc_iap/readme.txt +++ b/project/at_start_f437/examples/usb_device/virtual_msc_iap/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/usb_device/virtual_msc_iap/src/at32f435_437_clock.c b/project/at_start_f437/examples/usb_device/virtual_msc_iap/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/usb_device/virtual_msc_iap/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/usb_device/virtual_msc_iap/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_device/virtual_msc_iap/src/at32f435_437_int.c b/project/at_start_f437/examples/usb_device/virtual_msc_iap/src/at32f435_437_int.c index 27e44a52..e937947c 100644 --- a/project/at_start_f437/examples/usb_device/virtual_msc_iap/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/usb_device/virtual_msc_iap/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_device/virtual_msc_iap/src/flash_fat16.c b/project/at_start_f437/examples/usb_device/virtual_msc_iap/src/flash_fat16.c index 0e223253..3dd46d20 100644 --- a/project/at_start_f437/examples/usb_device/virtual_msc_iap/src/flash_fat16.c +++ b/project/at_start_f437/examples/usb_device/virtual_msc_iap/src/flash_fat16.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file flash_fat16.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief fat16 file system ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_device/virtual_msc_iap/src/main.c b/project/at_start_f437/examples/usb_device/virtual_msc_iap/src/main.c index aaef42a6..354a5a39 100644 --- a/project/at_start_f437/examples/usb_device/virtual_msc_iap/src/main.c +++ b/project/at_start_f437/examples/usb_device/virtual_msc_iap/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_device/virtual_msc_iap/src/msc_diskio.c b/project/at_start_f437/examples/usb_device/virtual_msc_iap/src/msc_diskio.c index ae46eea4..b8e27248 100644 --- a/project/at_start_f437/examples/usb_device/virtual_msc_iap/src/msc_diskio.c +++ b/project/at_start_f437/examples/usb_device/virtual_msc_iap/src/msc_diskio.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file msc_diskio.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb mass storage disk function ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_host/hid_demo/inc/at32f435_437_clock.h b/project/at_start_f437/examples/usb_host/hid_demo/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/usb_host/hid_demo/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/usb_host/hid_demo/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_host/hid_demo/inc/at32f435_437_conf.h b/project/at_start_f437/examples/usb_host/hid_demo/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/usb_host/hid_demo/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/usb_host/hid_demo/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_host/hid_demo/inc/at32f435_437_int.h b/project/at_start_f437/examples/usb_host/hid_demo/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/usb_host/hid_demo/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/usb_host/hid_demo/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_host/hid_demo/inc/usb_conf.h b/project/at_start_f437/examples/usb_host/hid_demo/inc/usb_conf.h index d3fb8b32..c95567f3 100644 --- a/project/at_start_f437/examples/usb_host/hid_demo/inc/usb_conf.h +++ b/project/at_start_f437/examples/usb_host/hid_demo/inc/usb_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file usb_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_host/hid_demo/inc/usbh_user.h b/project/at_start_f437/examples/usb_host/hid_demo/inc/usbh_user.h index a2d68cb3..2cdf5389 100644 --- a/project/at_start_f437/examples/usb_host/hid_demo/inc/usbh_user.h +++ b/project/at_start_f437/examples/usb_host/hid_demo/inc/usbh_user.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file usbh_user.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb host user header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_host/hid_demo/readme.txt b/project/at_start_f437/examples/usb_host/hid_demo/readme.txt index 88c8ebfd..b3a6d952 100644 --- a/project/at_start_f437/examples/usb_host/hid_demo/readme.txt +++ b/project/at_start_f437/examples/usb_host/hid_demo/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/usb_host/hid_demo/src/at32f435_437_clock.c b/project/at_start_f437/examples/usb_host/hid_demo/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/usb_host/hid_demo/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/usb_host/hid_demo/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_host/hid_demo/src/at32f435_437_int.c b/project/at_start_f437/examples/usb_host/hid_demo/src/at32f435_437_int.c index 0fb01c08..26c6d823 100644 --- a/project/at_start_f437/examples/usb_host/hid_demo/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/usb_host/hid_demo/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_host/hid_demo/src/main.c b/project/at_start_f437/examples/usb_host/hid_demo/src/main.c index fd7f8d9d..cf2325f8 100644 --- a/project/at_start_f437/examples/usb_host/hid_demo/src/main.c +++ b/project/at_start_f437/examples/usb_host/hid_demo/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_host/hid_demo/src/usbh_user.c b/project/at_start_f437/examples/usb_host/hid_demo/src/usbh_user.c index 705e73cc..98a86765 100644 --- a/project/at_start_f437/examples/usb_host/hid_demo/src/usbh_user.c +++ b/project/at_start_f437/examples/usb_host/hid_demo/src/usbh_user.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file usbh_user.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb user function ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_host/msc_only_fat32/inc/at32f435_437_clock.h b/project/at_start_f437/examples/usb_host/msc_only_fat32/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/usb_host/msc_only_fat32/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/usb_host/msc_only_fat32/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_host/msc_only_fat32/inc/at32f435_437_conf.h b/project/at_start_f437/examples/usb_host/msc_only_fat32/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/usb_host/msc_only_fat32/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/usb_host/msc_only_fat32/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_host/msc_only_fat32/inc/at32f435_437_int.h b/project/at_start_f437/examples/usb_host/msc_only_fat32/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/usb_host/msc_only_fat32/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/usb_host/msc_only_fat32/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_host/msc_only_fat32/inc/usb_conf.h b/project/at_start_f437/examples/usb_host/msc_only_fat32/inc/usb_conf.h index 14375c91..529b43e8 100644 --- a/project/at_start_f437/examples/usb_host/msc_only_fat32/inc/usb_conf.h +++ b/project/at_start_f437/examples/usb_host/msc_only_fat32/inc/usb_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file usb_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_host/msc_only_fat32/inc/usbh_user.h b/project/at_start_f437/examples/usb_host/msc_only_fat32/inc/usbh_user.h index a2d68cb3..2cdf5389 100644 --- a/project/at_start_f437/examples/usb_host/msc_only_fat32/inc/usbh_user.h +++ b/project/at_start_f437/examples/usb_host/msc_only_fat32/inc/usbh_user.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file usbh_user.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb host user header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_host/msc_only_fat32/readme.txt b/project/at_start_f437/examples/usb_host/msc_only_fat32/readme.txt index e9419339..745c4434 100644 --- a/project/at_start_f437/examples/usb_host/msc_only_fat32/readme.txt +++ b/project/at_start_f437/examples/usb_host/msc_only_fat32/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/usb_host/msc_only_fat32/src/at32f435_437_clock.c b/project/at_start_f437/examples/usb_host/msc_only_fat32/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/usb_host/msc_only_fat32/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/usb_host/msc_only_fat32/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_host/msc_only_fat32/src/at32f435_437_int.c b/project/at_start_f437/examples/usb_host/msc_only_fat32/src/at32f435_437_int.c index 35d53e6c..748d991e 100644 --- a/project/at_start_f437/examples/usb_host/msc_only_fat32/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/usb_host/msc_only_fat32/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_host/msc_only_fat32/src/main.c b/project/at_start_f437/examples/usb_host/msc_only_fat32/src/main.c index 37494206..f7ff6ac5 100644 --- a/project/at_start_f437/examples/usb_host/msc_only_fat32/src/main.c +++ b/project/at_start_f437/examples/usb_host/msc_only_fat32/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_host/msc_only_fat32/src/usbh_msc_diskio.c b/project/at_start_f437/examples/usb_host/msc_only_fat32/src/usbh_msc_diskio.c index 1bc54912..7222663a 100644 --- a/project/at_start_f437/examples/usb_host/msc_only_fat32/src/usbh_msc_diskio.c +++ b/project/at_start_f437/examples/usb_host/msc_only_fat32/src/usbh_msc_diskio.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file usbh_msc_diskio.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb mass storage disk io ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_host/msc_only_fat32/src/usbh_user.c b/project/at_start_f437/examples/usb_host/msc_only_fat32/src/usbh_user.c index 56e30469..6d5b38d1 100644 --- a/project/at_start_f437/examples/usb_host/msc_only_fat32/src/usbh_user.c +++ b/project/at_start_f437/examples/usb_host/msc_only_fat32/src/usbh_user.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file usbh_user.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb user function ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_host/two_otg_host_demo/inc/at32f435_437_clock.h b/project/at_start_f437/examples/usb_host/two_otg_host_demo/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/usb_host/two_otg_host_demo/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/usb_host/two_otg_host_demo/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_host/two_otg_host_demo/inc/at32f435_437_conf.h b/project/at_start_f437/examples/usb_host/two_otg_host_demo/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/usb_host/two_otg_host_demo/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/usb_host/two_otg_host_demo/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_host/two_otg_host_demo/inc/at32f435_437_int.h b/project/at_start_f437/examples/usb_host/two_otg_host_demo/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/usb_host/two_otg_host_demo/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/usb_host/two_otg_host_demo/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_host/two_otg_host_demo/inc/usb_conf.h b/project/at_start_f437/examples/usb_host/two_otg_host_demo/inc/usb_conf.h index 429002db..8d2b9fde 100644 --- a/project/at_start_f437/examples/usb_host/two_otg_host_demo/inc/usb_conf.h +++ b/project/at_start_f437/examples/usb_host/two_otg_host_demo/inc/usb_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file usb_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_host/two_otg_host_demo/inc/usbh_user.h b/project/at_start_f437/examples/usb_host/two_otg_host_demo/inc/usbh_user.h index a2d68cb3..2cdf5389 100644 --- a/project/at_start_f437/examples/usb_host/two_otg_host_demo/inc/usbh_user.h +++ b/project/at_start_f437/examples/usb_host/two_otg_host_demo/inc/usbh_user.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file usbh_user.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb host user header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_host/two_otg_host_demo/readme.txt b/project/at_start_f437/examples/usb_host/two_otg_host_demo/readme.txt index cdb0aa42..32b82d13 100644 --- a/project/at_start_f437/examples/usb_host/two_otg_host_demo/readme.txt +++ b/project/at_start_f437/examples/usb_host/two_otg_host_demo/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/usb_host/two_otg_host_demo/src/at32f435_437_clock.c b/project/at_start_f437/examples/usb_host/two_otg_host_demo/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/usb_host/two_otg_host_demo/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/usb_host/two_otg_host_demo/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_host/two_otg_host_demo/src/at32f435_437_int.c b/project/at_start_f437/examples/usb_host/two_otg_host_demo/src/at32f435_437_int.c index ef06691c..7908bc57 100644 --- a/project/at_start_f437/examples/usb_host/two_otg_host_demo/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/usb_host/two_otg_host_demo/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_host/two_otg_host_demo/src/main.c b/project/at_start_f437/examples/usb_host/two_otg_host_demo/src/main.c index 6d3fbd4b..62da6813 100644 --- a/project/at_start_f437/examples/usb_host/two_otg_host_demo/src/main.c +++ b/project/at_start_f437/examples/usb_host/two_otg_host_demo/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_host/two_otg_host_demo/src/usbh_msc_diskio.c b/project/at_start_f437/examples/usb_host/two_otg_host_demo/src/usbh_msc_diskio.c index c8933bcf..0585270c 100644 --- a/project/at_start_f437/examples/usb_host/two_otg_host_demo/src/usbh_msc_diskio.c +++ b/project/at_start_f437/examples/usb_host/two_otg_host_demo/src/usbh_msc_diskio.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file usbh_msc_diskio.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb mass storage disk io ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/usb_host/two_otg_host_demo/src/usbh_user.c b/project/at_start_f437/examples/usb_host/two_otg_host_demo/src/usbh_user.c index 48ef55c1..e16c8185 100644 --- a/project/at_start_f437/examples/usb_host/two_otg_host_demo/src/usbh_user.c +++ b/project/at_start_f437/examples/usb_host/two_otg_host_demo/src/usbh_user.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file usbh_user.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief usb user function ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/wdt/wdt_reset/inc/at32f435_437_clock.h b/project/at_start_f437/examples/wdt/wdt_reset/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/wdt/wdt_reset/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/wdt/wdt_reset/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/wdt/wdt_reset/inc/at32f435_437_conf.h b/project/at_start_f437/examples/wdt/wdt_reset/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/wdt/wdt_reset/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/wdt/wdt_reset/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/wdt/wdt_reset/inc/at32f435_437_int.h b/project/at_start_f437/examples/wdt/wdt_reset/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/wdt/wdt_reset/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/wdt/wdt_reset/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/wdt/wdt_reset/readme.txt b/project/at_start_f437/examples/wdt/wdt_reset/readme.txt index 30c53871..197a4406 100644 --- a/project/at_start_f437/examples/wdt/wdt_reset/readme.txt +++ b/project/at_start_f437/examples/wdt/wdt_reset/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/wdt/wdt_reset/src/at32f435_437_clock.c b/project/at_start_f437/examples/wdt/wdt_reset/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/wdt/wdt_reset/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/wdt/wdt_reset/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/wdt/wdt_reset/src/at32f435_437_int.c b/project/at_start_f437/examples/wdt/wdt_reset/src/at32f435_437_int.c index 51ba9504..b8764894 100644 --- a/project/at_start_f437/examples/wdt/wdt_reset/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/wdt/wdt_reset/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/wdt/wdt_reset/src/main.c b/project/at_start_f437/examples/wdt/wdt_reset/src/main.c index 140f08eb..814d5925 100644 --- a/project/at_start_f437/examples/wdt/wdt_reset/src/main.c +++ b/project/at_start_f437/examples/wdt/wdt_reset/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/wdt/wdt_standby/inc/at32f435_437_clock.h b/project/at_start_f437/examples/wdt/wdt_standby/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/wdt/wdt_standby/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/wdt/wdt_standby/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/wdt/wdt_standby/inc/at32f435_437_conf.h b/project/at_start_f437/examples/wdt/wdt_standby/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/wdt/wdt_standby/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/wdt/wdt_standby/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/wdt/wdt_standby/inc/at32f435_437_int.h b/project/at_start_f437/examples/wdt/wdt_standby/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/wdt/wdt_standby/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/wdt/wdt_standby/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/wdt/wdt_standby/readme.txt b/project/at_start_f437/examples/wdt/wdt_standby/readme.txt index b5a54423..fbae13c0 100644 --- a/project/at_start_f437/examples/wdt/wdt_standby/readme.txt +++ b/project/at_start_f437/examples/wdt/wdt_standby/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file wdt_standby/readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/wdt/wdt_standby/src/at32f435_437_clock.c b/project/at_start_f437/examples/wdt/wdt_standby/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/wdt/wdt_standby/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/wdt/wdt_standby/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/wdt/wdt_standby/src/at32f435_437_int.c b/project/at_start_f437/examples/wdt/wdt_standby/src/at32f435_437_int.c index b14a6078..06eda308 100644 --- a/project/at_start_f437/examples/wdt/wdt_standby/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/wdt/wdt_standby/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/wdt/wdt_standby/src/main.c b/project/at_start_f437/examples/wdt/wdt_standby/src/main.c index 6076a671..2afedee3 100644 --- a/project/at_start_f437/examples/wdt/wdt_standby/src/main.c +++ b/project/at_start_f437/examples/wdt/wdt_standby/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/wwdt/wwdt_reset/inc/at32f435_437_clock.h b/project/at_start_f437/examples/wwdt/wwdt_reset/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/wwdt/wwdt_reset/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/wwdt/wwdt_reset/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/wwdt/wwdt_reset/inc/at32f435_437_conf.h b/project/at_start_f437/examples/wwdt/wwdt_reset/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/wwdt/wwdt_reset/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/wwdt/wwdt_reset/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/wwdt/wwdt_reset/inc/at32f435_437_int.h b/project/at_start_f437/examples/wwdt/wwdt_reset/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/wwdt/wwdt_reset/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/wwdt/wwdt_reset/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/wwdt/wwdt_reset/readme.txt b/project/at_start_f437/examples/wwdt/wwdt_reset/readme.txt index dcf991e0..76d1e3dc 100644 --- a/project/at_start_f437/examples/wwdt/wwdt_reset/readme.txt +++ b/project/at_start_f437/examples/wwdt/wwdt_reset/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/wwdt/wwdt_reset/src/at32f435_437_clock.c b/project/at_start_f437/examples/wwdt/wwdt_reset/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/wwdt/wwdt_reset/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/wwdt/wwdt_reset/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/wwdt/wwdt_reset/src/at32f435_437_int.c b/project/at_start_f437/examples/wwdt/wwdt_reset/src/at32f435_437_int.c index dfa34bc3..0a198dd4 100644 --- a/project/at_start_f437/examples/wwdt/wwdt_reset/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/wwdt/wwdt_reset/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/wwdt/wwdt_reset/src/main.c b/project/at_start_f437/examples/wwdt/wwdt_reset/src/main.c index 4abfcf1d..e013b89a 100644 --- a/project/at_start_f437/examples/wwdt/wwdt_reset/src/main.c +++ b/project/at_start_f437/examples/wwdt/wwdt_reset/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/xmc/lcd_8bit/inc/at32f435_437_clock.h b/project/at_start_f437/examples/xmc/lcd_8bit/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/xmc/lcd_8bit/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/xmc/lcd_8bit/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/xmc/lcd_8bit/inc/at32f435_437_conf.h b/project/at_start_f437/examples/xmc/lcd_8bit/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/xmc/lcd_8bit/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/xmc/lcd_8bit/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/xmc/lcd_8bit/inc/at32f435_437_int.h b/project/at_start_f437/examples/xmc/lcd_8bit/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/xmc/lcd_8bit/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/xmc/lcd_8bit/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/xmc/lcd_8bit/inc/picture.h b/project/at_start_f437/examples/xmc/lcd_8bit/inc/picture.h index 14f7f7dc..644f2214 100644 --- a/project/at_start_f437/examples/xmc/lcd_8bit/inc/picture.h +++ b/project/at_start_f437/examples/xmc/lcd_8bit/inc/picture.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file picture.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief this file contains all the picture used for lcd display. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/xmc/lcd_8bit/inc/xmc_lcd.h b/project/at_start_f437/examples/xmc/lcd_8bit/inc/xmc_lcd.h index a735f16f..f5c0abf3 100644 --- a/project/at_start_f437/examples/xmc/lcd_8bit/inc/xmc_lcd.h +++ b/project/at_start_f437/examples/xmc/lcd_8bit/inc/xmc_lcd.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file xmc_lcd.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief xmc_lcd header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/xmc/lcd_8bit/readme.txt b/project/at_start_f437/examples/xmc/lcd_8bit/readme.txt index 49441d20..623fe0ad 100644 --- a/project/at_start_f437/examples/xmc/lcd_8bit/readme.txt +++ b/project/at_start_f437/examples/xmc/lcd_8bit/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/xmc/lcd_8bit/src/at32f435_437_clock.c b/project/at_start_f437/examples/xmc/lcd_8bit/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/xmc/lcd_8bit/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/xmc/lcd_8bit/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/xmc/lcd_8bit/src/at32f435_437_int.c b/project/at_start_f437/examples/xmc/lcd_8bit/src/at32f435_437_int.c index d84a365b..b055a27b 100644 --- a/project/at_start_f437/examples/xmc/lcd_8bit/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/xmc/lcd_8bit/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/xmc/lcd_8bit/src/main.c b/project/at_start_f437/examples/xmc/lcd_8bit/src/main.c index e8f6c844..45988fad 100644 --- a/project/at_start_f437/examples/xmc/lcd_8bit/src/main.c +++ b/project/at_start_f437/examples/xmc/lcd_8bit/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/xmc/lcd_8bit/src/xmc_lcd.c b/project/at_start_f437/examples/xmc/lcd_8bit/src/xmc_lcd.c index 1533c29f..c6380658 100644 --- a/project/at_start_f437/examples/xmc/lcd_8bit/src/xmc_lcd.c +++ b/project/at_start_f437/examples/xmc/lcd_8bit/src/xmc_lcd.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file xmc_lcd.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief xmc_lcd config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/xmc/lcd_touch_16bit/inc/at32f435_437_clock.h b/project/at_start_f437/examples/xmc/lcd_touch_16bit/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/xmc/lcd_touch_16bit/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/xmc/lcd_touch_16bit/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/xmc/lcd_touch_16bit/inc/at32f435_437_conf.h b/project/at_start_f437/examples/xmc/lcd_touch_16bit/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/xmc/lcd_touch_16bit/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/xmc/lcd_touch_16bit/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/xmc/lcd_touch_16bit/inc/at32f435_437_int.h b/project/at_start_f437/examples/xmc/lcd_touch_16bit/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/xmc/lcd_touch_16bit/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/xmc/lcd_touch_16bit/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/xmc/lcd_touch_16bit/inc/touch.h b/project/at_start_f437/examples/xmc/lcd_touch_16bit/inc/touch.h index f6104a5b..a530c554 100644 --- a/project/at_start_f437/examples/xmc/lcd_touch_16bit/inc/touch.h +++ b/project/at_start_f437/examples/xmc/lcd_touch_16bit/inc/touch.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file touch.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief this file contains all the functions prototypes for the * touch firmware driver. ************************************************************************** diff --git a/project/at_start_f437/examples/xmc/lcd_touch_16bit/inc/xmc_lcd.h b/project/at_start_f437/examples/xmc/lcd_touch_16bit/inc/xmc_lcd.h index b4a76176..eb6b65cb 100644 --- a/project/at_start_f437/examples/xmc/lcd_touch_16bit/inc/xmc_lcd.h +++ b/project/at_start_f437/examples/xmc/lcd_touch_16bit/inc/xmc_lcd.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file xmc_lcd.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief xmc_lcd program header ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/xmc/lcd_touch_16bit/readme.txt b/project/at_start_f437/examples/xmc/lcd_touch_16bit/readme.txt index 70221dea..baa183c8 100644 --- a/project/at_start_f437/examples/xmc/lcd_touch_16bit/readme.txt +++ b/project/at_start_f437/examples/xmc/lcd_touch_16bit/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/xmc/lcd_touch_16bit/src/at32f435_437_clock.c b/project/at_start_f437/examples/xmc/lcd_touch_16bit/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/xmc/lcd_touch_16bit/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/xmc/lcd_touch_16bit/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/xmc/lcd_touch_16bit/src/at32f435_437_int.c b/project/at_start_f437/examples/xmc/lcd_touch_16bit/src/at32f435_437_int.c index 37a5f92c..b98b09b8 100644 --- a/project/at_start_f437/examples/xmc/lcd_touch_16bit/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/xmc/lcd_touch_16bit/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/xmc/lcd_touch_16bit/src/main.c b/project/at_start_f437/examples/xmc/lcd_touch_16bit/src/main.c index a53f8816..b05f2da9 100644 --- a/project/at_start_f437/examples/xmc/lcd_touch_16bit/src/main.c +++ b/project/at_start_f437/examples/xmc/lcd_touch_16bit/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/xmc/lcd_touch_16bit/src/touch.c b/project/at_start_f437/examples/xmc/lcd_touch_16bit/src/touch.c index a374abc5..271f8b6b 100644 --- a/project/at_start_f437/examples/xmc/lcd_touch_16bit/src/touch.c +++ b/project/at_start_f437/examples/xmc/lcd_touch_16bit/src/touch.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file touch.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief this file contains all the functions prototypes for the * touch firmware driver. ************************************************************************** diff --git a/project/at_start_f437/examples/xmc/lcd_touch_16bit/src/xmc_lcd.c b/project/at_start_f437/examples/xmc/lcd_touch_16bit/src/xmc_lcd.c index 7b62825f..406d9e69 100644 --- a/project/at_start_f437/examples/xmc/lcd_touch_16bit/src/xmc_lcd.c +++ b/project/at_start_f437/examples/xmc/lcd_touch_16bit/src/xmc_lcd.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file xmc_lcd.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief xmc_lcd program file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/xmc/nand_flash/ecc/inc/at32f435_437_clock.h b/project/at_start_f437/examples/xmc/nand_flash/ecc/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/xmc/nand_flash/ecc/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/xmc/nand_flash/ecc/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/xmc/nand_flash/ecc/inc/at32f435_437_conf.h b/project/at_start_f437/examples/xmc/nand_flash/ecc/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/xmc/nand_flash/ecc/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/xmc/nand_flash/ecc/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/xmc/nand_flash/ecc/inc/at32f435_437_int.h b/project/at_start_f437/examples/xmc/nand_flash/ecc/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/xmc/nand_flash/ecc/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/xmc/nand_flash/ecc/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/xmc/nand_flash/ecc/inc/xmc_ecc.h b/project/at_start_f437/examples/xmc/nand_flash/ecc/inc/xmc_ecc.h index a13e0816..e2095fa6 100644 --- a/project/at_start_f437/examples/xmc/nand_flash/ecc/inc/xmc_ecc.h +++ b/project/at_start_f437/examples/xmc/nand_flash/ecc/inc/xmc_ecc.h @@ -1,8 +1,8 @@ /** ****************************************************************************** * @file xmc_ecc.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file for the nand ecc configuration. ****************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/xmc/nand_flash/ecc/readme.txt b/project/at_start_f437/examples/xmc/nand_flash/ecc/readme.txt index cd716ce1..d70fc433 100644 --- a/project/at_start_f437/examples/xmc/nand_flash/ecc/readme.txt +++ b/project/at_start_f437/examples/xmc/nand_flash/ecc/readme.txt @@ -1,8 +1,8 @@ /** ****************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ****************************************************************************** */ diff --git a/project/at_start_f437/examples/xmc/nand_flash/ecc/src/at32f435_437_clock.c b/project/at_start_f437/examples/xmc/nand_flash/ecc/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/xmc/nand_flash/ecc/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/xmc/nand_flash/ecc/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/xmc/nand_flash/ecc/src/at32f435_437_int.c b/project/at_start_f437/examples/xmc/nand_flash/ecc/src/at32f435_437_int.c index 2ef41185..1e5a982a 100644 --- a/project/at_start_f437/examples/xmc/nand_flash/ecc/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/xmc/nand_flash/ecc/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/xmc/nand_flash/ecc/src/main.c b/project/at_start_f437/examples/xmc/nand_flash/ecc/src/main.c index 76daf0eb..7f9240fc 100644 --- a/project/at_start_f437/examples/xmc/nand_flash/ecc/src/main.c +++ b/project/at_start_f437/examples/xmc/nand_flash/ecc/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/xmc/nand_flash/ecc/src/xmc_ecc.c b/project/at_start_f437/examples/xmc/nand_flash/ecc/src/xmc_ecc.c index f75fc266..9e2f2a86 100644 --- a/project/at_start_f437/examples/xmc/nand_flash/ecc/src/xmc_ecc.c +++ b/project/at_start_f437/examples/xmc/nand_flash/ecc/src/xmc_ecc.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file xmc_ecc.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief nand ecc configuration ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/xmc/nand_flash/nand/inc/at32f435_437_clock.h b/project/at_start_f437/examples/xmc/nand_flash/nand/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/xmc/nand_flash/nand/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/xmc/nand_flash/nand/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/xmc/nand_flash/nand/inc/at32f435_437_conf.h b/project/at_start_f437/examples/xmc/nand_flash/nand/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/xmc/nand_flash/nand/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/xmc/nand_flash/nand/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/xmc/nand_flash/nand/inc/at32f435_437_int.h b/project/at_start_f437/examples/xmc/nand_flash/nand/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/xmc/nand_flash/nand/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/xmc/nand_flash/nand/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/xmc/nand_flash/nand/inc/xmc_nand.h b/project/at_start_f437/examples/xmc/nand_flash/nand/inc/xmc_nand.h index 350f792c..4f692bce 100644 --- a/project/at_start_f437/examples/xmc/nand_flash/nand/inc/xmc_nand.h +++ b/project/at_start_f437/examples/xmc/nand_flash/nand/inc/xmc_nand.h @@ -1,8 +1,8 @@ /** ****************************************************************************** * @file xmc_nand.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file for the nand configuration. ****************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/xmc/nand_flash/nand/readme.txt b/project/at_start_f437/examples/xmc/nand_flash/nand/readme.txt index 91774b3e..387fed05 100644 --- a/project/at_start_f437/examples/xmc/nand_flash/nand/readme.txt +++ b/project/at_start_f437/examples/xmc/nand_flash/nand/readme.txt @@ -1,8 +1,8 @@ /** ****************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ****************************************************************************** */ diff --git a/project/at_start_f437/examples/xmc/nand_flash/nand/src/at32f435_437_clock.c b/project/at_start_f437/examples/xmc/nand_flash/nand/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/xmc/nand_flash/nand/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/xmc/nand_flash/nand/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/xmc/nand_flash/nand/src/at32f435_437_int.c b/project/at_start_f437/examples/xmc/nand_flash/nand/src/at32f435_437_int.c index ea997569..649bfd8d 100644 --- a/project/at_start_f437/examples/xmc/nand_flash/nand/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/xmc/nand_flash/nand/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/xmc/nand_flash/nand/src/main.c b/project/at_start_f437/examples/xmc/nand_flash/nand/src/main.c index 56eeea5c..6c1d5262 100644 --- a/project/at_start_f437/examples/xmc/nand_flash/nand/src/main.c +++ b/project/at_start_f437/examples/xmc/nand_flash/nand/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/xmc/nand_flash/nand/src/xmc_nand.c b/project/at_start_f437/examples/xmc/nand_flash/nand/src/xmc_nand.c index 7ecfa805..0886e11b 100644 --- a/project/at_start_f437/examples/xmc/nand_flash/nand/src/xmc_nand.c +++ b/project/at_start_f437/examples/xmc/nand_flash/nand/src/xmc_nand.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file xmc_nand.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief nand configuration ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/xmc/nor_flash/inc/at32f435_437_clock.h b/project/at_start_f437/examples/xmc/nor_flash/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/xmc/nor_flash/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/xmc/nor_flash/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/xmc/nor_flash/inc/at32f435_437_conf.h b/project/at_start_f437/examples/xmc/nor_flash/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/xmc/nor_flash/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/xmc/nor_flash/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/xmc/nor_flash/inc/at32f435_437_int.h b/project/at_start_f437/examples/xmc/nor_flash/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/xmc/nor_flash/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/xmc/nor_flash/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/xmc/nor_flash/inc/xmc_nor.h b/project/at_start_f437/examples/xmc/nor_flash/inc/xmc_nor.h index f95d9765..820d3b7c 100644 --- a/project/at_start_f437/examples/xmc/nor_flash/inc/xmc_nor.h +++ b/project/at_start_f437/examples/xmc/nor_flash/inc/xmc_nor.h @@ -1,8 +1,8 @@ /** ****************************************************************************** * @file xmc_sram.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file for the nand configuration. ****************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/xmc/nor_flash/readme.txt b/project/at_start_f437/examples/xmc/nor_flash/readme.txt index b57b0309..413fe489 100644 --- a/project/at_start_f437/examples/xmc/nor_flash/readme.txt +++ b/project/at_start_f437/examples/xmc/nor_flash/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/xmc/nor_flash/src/at32f435_437_clock.c b/project/at_start_f437/examples/xmc/nor_flash/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/xmc/nor_flash/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/xmc/nor_flash/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/xmc/nor_flash/src/at32f435_437_int.c b/project/at_start_f437/examples/xmc/nor_flash/src/at32f435_437_int.c index 424593bd..3fc80250 100644 --- a/project/at_start_f437/examples/xmc/nor_flash/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/xmc/nor_flash/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/xmc/nor_flash/src/main.c b/project/at_start_f437/examples/xmc/nor_flash/src/main.c index c138ef42..e12b663d 100644 --- a/project/at_start_f437/examples/xmc/nor_flash/src/main.c +++ b/project/at_start_f437/examples/xmc/nor_flash/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/xmc/nor_flash/src/xmc_nor.c b/project/at_start_f437/examples/xmc/nor_flash/src/xmc_nor.c index 59e8b573..b98e1567 100644 --- a/project/at_start_f437/examples/xmc/nor_flash/src/xmc_nor.c +++ b/project/at_start_f437/examples/xmc/nor_flash/src/xmc_nor.c @@ -1,8 +1,8 @@ /** ****************************************************************************** * @file xmc_nor.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file for the nor configuration. ****************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/xmc/psram/inc/at32f435_437_clock.h b/project/at_start_f437/examples/xmc/psram/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/xmc/psram/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/xmc/psram/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/xmc/psram/inc/at32f435_437_conf.h b/project/at_start_f437/examples/xmc/psram/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/xmc/psram/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/xmc/psram/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/xmc/psram/inc/at32f435_437_int.h b/project/at_start_f437/examples/xmc/psram/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/xmc/psram/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/xmc/psram/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/xmc/psram/inc/xmc_psram.h b/project/at_start_f437/examples/xmc/psram/inc/xmc_psram.h index 35d21ad9..4b22a0b5 100644 --- a/project/at_start_f437/examples/xmc/psram/inc/xmc_psram.h +++ b/project/at_start_f437/examples/xmc/psram/inc/xmc_psram.h @@ -1,8 +1,8 @@ /** ****************************************************************************** * @file xmc_sram.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file for the nand configuration. ****************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/xmc/psram/readme.txt b/project/at_start_f437/examples/xmc/psram/readme.txt index cd32fb3b..351c28eb 100644 --- a/project/at_start_f437/examples/xmc/psram/readme.txt +++ b/project/at_start_f437/examples/xmc/psram/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/xmc/psram/src/at32f435_437_clock.c b/project/at_start_f437/examples/xmc/psram/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/xmc/psram/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/xmc/psram/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/xmc/psram/src/at32f435_437_int.c b/project/at_start_f437/examples/xmc/psram/src/at32f435_437_int.c index 3acf0876..6bd941f3 100644 --- a/project/at_start_f437/examples/xmc/psram/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/xmc/psram/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/xmc/psram/src/main.c b/project/at_start_f437/examples/xmc/psram/src/main.c index 47b3898b..3021ac61 100644 --- a/project/at_start_f437/examples/xmc/psram/src/main.c +++ b/project/at_start_f437/examples/xmc/psram/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/xmc/psram/src/xmc_psram.c b/project/at_start_f437/examples/xmc/psram/src/xmc_psram.c index 5ec272d5..1931a1cb 100644 --- a/project/at_start_f437/examples/xmc/psram/src/xmc_psram.c +++ b/project/at_start_f437/examples/xmc/psram/src/xmc_psram.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file xmc_psram.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief xmc_psram program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/xmc/sdram_basic/inc/at32f435_437_clock.h b/project/at_start_f437/examples/xmc/sdram_basic/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/xmc/sdram_basic/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/xmc/sdram_basic/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/xmc/sdram_basic/inc/at32f435_437_conf.h b/project/at_start_f437/examples/xmc/sdram_basic/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/xmc/sdram_basic/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/xmc/sdram_basic/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/xmc/sdram_basic/inc/at32f435_437_int.h b/project/at_start_f437/examples/xmc/sdram_basic/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/xmc/sdram_basic/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/xmc/sdram_basic/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/xmc/sdram_basic/inc/xmc_sdram.h b/project/at_start_f437/examples/xmc/sdram_basic/inc/xmc_sdram.h index 436c2480..f83fc184 100644 --- a/project/at_start_f437/examples/xmc/sdram_basic/inc/xmc_sdram.h +++ b/project/at_start_f437/examples/xmc/sdram_basic/inc/xmc_sdram.h @@ -1,8 +1,8 @@ /** ****************************************************************************** * @file xmc_sdram.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file for the sdram configuration. ****************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/xmc/sdram_basic/readme.txt b/project/at_start_f437/examples/xmc/sdram_basic/readme.txt index 89815480..1229c477 100644 --- a/project/at_start_f437/examples/xmc/sdram_basic/readme.txt +++ b/project/at_start_f437/examples/xmc/sdram_basic/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/xmc/sdram_basic/src/at32f435_437_clock.c b/project/at_start_f437/examples/xmc/sdram_basic/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/xmc/sdram_basic/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/xmc/sdram_basic/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/xmc/sdram_basic/src/at32f435_437_int.c b/project/at_start_f437/examples/xmc/sdram_basic/src/at32f435_437_int.c index 9ec04ebe..ed33ea82 100644 --- a/project/at_start_f437/examples/xmc/sdram_basic/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/xmc/sdram_basic/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/xmc/sdram_basic/src/main.c b/project/at_start_f437/examples/xmc/sdram_basic/src/main.c index e4b81d68..e2e5e36e 100644 --- a/project/at_start_f437/examples/xmc/sdram_basic/src/main.c +++ b/project/at_start_f437/examples/xmc/sdram_basic/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/xmc/sdram_basic/src/xmc_sdram.c b/project/at_start_f437/examples/xmc/sdram_basic/src/xmc_sdram.c index 0750845d..dc949c9c 100644 --- a/project/at_start_f437/examples/xmc/sdram_basic/src/xmc_sdram.c +++ b/project/at_start_f437/examples/xmc/sdram_basic/src/xmc_sdram.c @@ -1,8 +1,8 @@ /** ****************************************************************************** * @file xmc_sdram.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief sdram program. ****************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/xmc/sdram_dma/inc/at32f435_437_clock.h b/project/at_start_f437/examples/xmc/sdram_dma/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/xmc/sdram_dma/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/xmc/sdram_dma/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/xmc/sdram_dma/inc/at32f435_437_conf.h b/project/at_start_f437/examples/xmc/sdram_dma/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/xmc/sdram_dma/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/xmc/sdram_dma/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/xmc/sdram_dma/inc/at32f435_437_int.h b/project/at_start_f437/examples/xmc/sdram_dma/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/xmc/sdram_dma/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/xmc/sdram_dma/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/xmc/sdram_dma/inc/xmc_sdram.h b/project/at_start_f437/examples/xmc/sdram_dma/inc/xmc_sdram.h index 690732f5..5b258358 100644 --- a/project/at_start_f437/examples/xmc/sdram_dma/inc/xmc_sdram.h +++ b/project/at_start_f437/examples/xmc/sdram_dma/inc/xmc_sdram.h @@ -1,8 +1,8 @@ /** ****************************************************************************** * @file xmc_sdram.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file for the sdram configuration. ****************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/xmc/sdram_dma/readme.txt b/project/at_start_f437/examples/xmc/sdram_dma/readme.txt index 7b249bee..df0cadf1 100644 --- a/project/at_start_f437/examples/xmc/sdram_dma/readme.txt +++ b/project/at_start_f437/examples/xmc/sdram_dma/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/xmc/sdram_dma/src/at32f435_437_clock.c b/project/at_start_f437/examples/xmc/sdram_dma/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/xmc/sdram_dma/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/xmc/sdram_dma/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/xmc/sdram_dma/src/at32f435_437_int.c b/project/at_start_f437/examples/xmc/sdram_dma/src/at32f435_437_int.c index 322545c4..59af9aab 100644 --- a/project/at_start_f437/examples/xmc/sdram_dma/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/xmc/sdram_dma/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/xmc/sdram_dma/src/main.c b/project/at_start_f437/examples/xmc/sdram_dma/src/main.c index 952c09dd..7f85c0e7 100644 --- a/project/at_start_f437/examples/xmc/sdram_dma/src/main.c +++ b/project/at_start_f437/examples/xmc/sdram_dma/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/xmc/sdram_dma/src/xmc_sdram.c b/project/at_start_f437/examples/xmc/sdram_dma/src/xmc_sdram.c index 81327672..1e54c618 100644 --- a/project/at_start_f437/examples/xmc/sdram_dma/src/xmc_sdram.c +++ b/project/at_start_f437/examples/xmc/sdram_dma/src/xmc_sdram.c @@ -1,8 +1,8 @@ /** ****************************************************************************** * @file xmc_sdram.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief sdram program. ****************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/xmc/sram/inc/at32f435_437_clock.h b/project/at_start_f437/examples/xmc/sram/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/examples/xmc/sram/inc/at32f435_437_clock.h +++ b/project/at_start_f437/examples/xmc/sram/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/xmc/sram/inc/at32f435_437_conf.h b/project/at_start_f437/examples/xmc/sram/inc/at32f435_437_conf.h index f630a4a2..e2816415 100644 --- a/project/at_start_f437/examples/xmc/sram/inc/at32f435_437_conf.h +++ b/project/at_start_f437/examples/xmc/sram/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/xmc/sram/inc/at32f435_437_int.h b/project/at_start_f437/examples/xmc/sram/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/examples/xmc/sram/inc/at32f435_437_int.h +++ b/project/at_start_f437/examples/xmc/sram/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/xmc/sram/inc/xmc_sram.h b/project/at_start_f437/examples/xmc/sram/inc/xmc_sram.h index b56d6e50..ea8fb1da 100644 --- a/project/at_start_f437/examples/xmc/sram/inc/xmc_sram.h +++ b/project/at_start_f437/examples/xmc/sram/inc/xmc_sram.h @@ -1,8 +1,8 @@ /** ****************************************************************************** * @file xmc_sram.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file for the nand configuration. ****************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/xmc/sram/readme.txt b/project/at_start_f437/examples/xmc/sram/readme.txt index b93199d1..68eaa7db 100644 --- a/project/at_start_f437/examples/xmc/sram/readme.txt +++ b/project/at_start_f437/examples/xmc/sram/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/examples/xmc/sram/src/at32f435_437_clock.c b/project/at_start_f437/examples/xmc/sram/src/at32f435_437_clock.c index 35fcdfaa..5eb8f824 100644 --- a/project/at_start_f437/examples/xmc/sram/src/at32f435_437_clock.c +++ b/project/at_start_f437/examples/xmc/sram/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/xmc/sram/src/at32f435_437_int.c b/project/at_start_f437/examples/xmc/sram/src/at32f435_437_int.c index 6484f0cf..f806ceb8 100644 --- a/project/at_start_f437/examples/xmc/sram/src/at32f435_437_int.c +++ b/project/at_start_f437/examples/xmc/sram/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/xmc/sram/src/main.c b/project/at_start_f437/examples/xmc/sram/src/main.c index 57ef8049..900c19e6 100644 --- a/project/at_start_f437/examples/xmc/sram/src/main.c +++ b/project/at_start_f437/examples/xmc/sram/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/examples/xmc/sram/src/xmc_sram.c b/project/at_start_f437/examples/xmc/sram/src/xmc_sram.c index 1ccbed04..ee025f21 100644 --- a/project/at_start_f437/examples/xmc/sram/src/xmc_sram.c +++ b/project/at_start_f437/examples/xmc/sram/src/xmc_sram.c @@ -1,8 +1,8 @@ /** ****************************************************************************** * @file xmc_sram.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief sram program. ****************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/templates/at32_ide/.cproject b/project/at_start_f437/templates/at32_ide/.cproject new file mode 100644 index 00000000..61fac0b1 --- /dev/null +++ b/project/at_start_f437/templates/at32_ide/.cproject @@ -0,0 +1,222 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + \ No newline at end of file diff --git a/project/at_start_f437/templates/at32_ide/.project b/project/at_start_f437/templates/at32_ide/.project new file mode 100644 index 00000000..9bbd94a7 --- /dev/null +++ b/project/at_start_f437/templates/at32_ide/.project @@ -0,0 +1,198 @@ + + + template + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + bsp/at32f435_437_board.c + 1 + PARENT-3-PROJECT_LOC/at32f435_437_board/at32f435_437_board.c + + + cmsis/startup_at32f435_437.s + 1 + PARENT-4-PROJECT_LOC/libraries/cmsis/cm4/device_support/startup/gcc/startup_at32f435_437.s + + + cmsis/system_at32f435_437.c + 1 + PARENT-4-PROJECT_LOC/libraries/cmsis/cm4/device_support/system_at32f435_437.c + + + firmware/at32f435_437_acc.c + 1 + PARENT-4-PROJECT_LOC/libraries/drivers/src/at32f435_437_acc.c + + + firmware/at32f435_437_adc.c + 1 + PARENT-4-PROJECT_LOC/libraries/drivers/src/at32f435_437_adc.c + + + firmware/at32f435_437_can.c + 1 + PARENT-4-PROJECT_LOC/libraries/drivers/src/at32f435_437_can.c + + + firmware/at32f435_437_crc.c + 1 + PARENT-4-PROJECT_LOC/libraries/drivers/src/at32f435_437_crc.c + + + firmware/at32f435_437_crm.c + 1 + PARENT-4-PROJECT_LOC/libraries/drivers/src/at32f435_437_crm.c + + + firmware/at32f435_437_dac.c + 1 + PARENT-4-PROJECT_LOC/libraries/drivers/src/at32f435_437_dac.c + + + firmware/at32f435_437_debug.c + 1 + PARENT-4-PROJECT_LOC/libraries/drivers/src/at32f435_437_debug.c + + + firmware/at32f435_437_dma.c + 1 + PARENT-4-PROJECT_LOC/libraries/drivers/src/at32f435_437_dma.c + + + firmware/at32f435_437_dvp.c + 1 + PARENT-4-PROJECT_LOC/libraries/drivers/src/at32f435_437_dvp.c + + + firmware/at32f435_437_edma.c + 1 + PARENT-4-PROJECT_LOC/libraries/drivers/src/at32f435_437_edma.c + + + firmware/at32f435_437_emac.c + 1 + PARENT-4-PROJECT_LOC/libraries/drivers/src/at32f435_437_emac.c + + + firmware/at32f435_437_ertc.c + 1 + PARENT-4-PROJECT_LOC/libraries/drivers/src/at32f435_437_ertc.c + + + firmware/at32f435_437_exint.c + 1 + PARENT-4-PROJECT_LOC/libraries/drivers/src/at32f435_437_exint.c + + + firmware/at32f435_437_flash.c + 1 + PARENT-4-PROJECT_LOC/libraries/drivers/src/at32f435_437_flash.c + + + firmware/at32f435_437_gpio.c + 1 + PARENT-4-PROJECT_LOC/libraries/drivers/src/at32f435_437_gpio.c + + + firmware/at32f435_437_i2c.c + 1 + PARENT-4-PROJECT_LOC/libraries/drivers/src/at32f435_437_i2c.c + + + firmware/at32f435_437_misc.c + 1 + PARENT-4-PROJECT_LOC/libraries/drivers/src/at32f435_437_misc.c + + + firmware/at32f435_437_pwc.c + 1 + PARENT-4-PROJECT_LOC/libraries/drivers/src/at32f435_437_pwc.c + + + firmware/at32f435_437_qspi.c + 1 + PARENT-4-PROJECT_LOC/libraries/drivers/src/at32f435_437_qspi.c + + + firmware/at32f435_437_scfg.c + 1 + PARENT-4-PROJECT_LOC/libraries/drivers/src/at32f435_437_scfg.c + + + firmware/at32f435_437_sdio.c + 1 + PARENT-4-PROJECT_LOC/libraries/drivers/src/at32f435_437_sdio.c + + + firmware/at32f435_437_spi.c + 1 + PARENT-4-PROJECT_LOC/libraries/drivers/src/at32f435_437_spi.c + + + firmware/at32f435_437_tmr.c + 1 + PARENT-4-PROJECT_LOC/libraries/drivers/src/at32f435_437_tmr.c + + + firmware/at32f435_437_usart.c + 1 + PARENT-4-PROJECT_LOC/libraries/drivers/src/at32f435_437_usart.c + + + firmware/at32f435_437_usb.c + 1 + PARENT-4-PROJECT_LOC/libraries/drivers/src/at32f435_437_usb.c + + + firmware/at32f435_437_wdt.c + 1 + PARENT-4-PROJECT_LOC/libraries/drivers/src/at32f435_437_wdt.c + + + firmware/at32f435_437_wwdt.c + 1 + PARENT-4-PROJECT_LOC/libraries/drivers/src/at32f435_437_wwdt.c + + + firmware/at32f435_437_xmc.c + 1 + PARENT-4-PROJECT_LOC/libraries/drivers/src/at32f435_437_xmc.c + + + user/at32f435_437_clock.c + 1 + PARENT-1-PROJECT_LOC/src/at32f435_437_clock.c + + + user/at32f435_437_int.c + 1 + PARENT-1-PROJECT_LOC/src/at32f435_437_int.c + + + user/main.c + 1 + PARENT-1-PROJECT_LOC/src/main.c + + + diff --git a/project/at_start_f437/templates/at32_ide/.settings/language.settings.xml b/project/at_start_f437/templates/at32_ide/.settings/language.settings.xml new file mode 100644 index 00000000..364880ab --- /dev/null +++ b/project/at_start_f437/templates/at32_ide/.settings/language.settings.xml @@ -0,0 +1,25 @@ + + + + + + + + + + + + + + + + + + + + + + + + + \ No newline at end of file diff --git a/project/at_start_f437/templates/at32_ide/.settings/org.eclipse.core.runtime.prefs b/project/at_start_f437/templates/at32_ide/.settings/org.eclipse.core.runtime.prefs new file mode 100644 index 00000000..9620bec4 --- /dev/null +++ b/project/at_start_f437/templates/at32_ide/.settings/org.eclipse.core.runtime.prefs @@ -0,0 +1,3 @@ +content-types/enabled=true +content-types/org.eclipse.cdt.core.asmSource/file-extensions=s +eclipse.preferences.version=1 diff --git a/project/at_start_f437/templates/at32_ide/SVD/AT32F437xx_v2.svd b/project/at_start_f437/templates/at32_ide/SVD/AT32F437xx_v2.svd new file mode 100644 index 00000000..78d88865 --- /dev/null +++ b/project/at_start_f437/templates/at32_ide/SVD/AT32F437xx_v2.svd @@ -0,0 +1,58291 @@ + + + + + + + + Keil + ArteryTek + AT32F437xx_v2 + AT32F437 + 1.0 + ARM 32-bit Cortex-M4 Microcontroller based device, CPU clock up to 288MHz, etc. + + ARM Limited (ARM) is supplying this software for use with Cortex-M\n + processor based microcontroller, but can be equally used for other\n + suitable processor architectures. This file can be freely distributed.\n + Modifications to this file shall be clearly marked.\n + \n + THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED\n + OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF\n + MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.\n + ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR\n + CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. + + + CM4 + r0p1 + little + false + true + 4 + false + + 8 + 32 + + 32 + read-write + 0x00000000 + 0xFFFFFFFF + + + + XMC + Flexible static memory controller + XMC + 0xA0000000 + + 0x0 + 0x1000 + registers + + + XMC + XMC global interrupt + 48 + + + + BK1CTRL1 + BK1CTRL1 + SRAM/NOR-Flash chip-select control register + 1 + 0x0 + 0x20 + read-write + 0x000030DB + + + MWMC + Memory write mode control + 19 + 1 + + + CRPGS + CRAM page size + 16 + 3 + + + NWASEN + NWAIT in asynchronous transfer enable + 15 + 1 + + + RWTD + Read-write timing different + 14 + 1 + + + NWSEN + NWAIT in synchronous transfer enable + 13 + 1 + + + WEN + Write enable + 12 + 1 + + + NWTCFG + Wait timing configuration + 11 + 1 + + + WRAPEN + Wrapped enable + 10 + 1 + + + NWPOL + NWAIT polarity + 9 + 1 + + + SYNCBEN + Synchronous burst enable + 8 + 1 + + + NOREN + Nor flash access enable + 6 + 1 + + + EXTMDBW + External memory data bus width + 4 + 2 + + + DEV + Memory device type + 2 + 2 + + + ADMUXEN + Address and data multiplexing enable + 1 + 1 + + + EN + Memory bank enable + 0 + 1 + + + + + BK1TMG1 + BK1TMG1 + SRAM/NOR-Flash chip-select timing register + 1 + 0x4 + 0x20 + read-write + 0x0FFFFFFF + + + ASYNCM + Asynchronous mode + 28 + 2 + + + DTLAT + Data latency + 24 + 4 + + + CLKPSC + Clock prescale + 20 + 4 + + + BUSLAT + Bus latency + 16 + 4 + + + DTST + Asynchronous data setup time + 8 + 8 + + + ADDRHT + Address-hold time + 4 + 4 + + + ADDRST + Address setup time + 0 + 4 + + + + + BK1CTRL2 + BK1CTRL2 + SRAM/NOR-Flash chip-select control register + 2 + 0x8 + 0x20 + read-write + 0x000030D2 + + + MWMC + Memory write mode control + 19 + 1 + + + CRPGS + CRAM page size + 16 + 3 + + + NWASEN + NWAIT in asynchronous transfer enable + 15 + 1 + + + RWTD + Read-write timing different + 14 + 1 + + + NWSEN + NWAIT in synchronous transfer enable + 13 + 1 + + + WEN + Write enable + 12 + 1 + + + NWTCFG + Wait timing configuration + 11 + 1 + + + WRAPEN + Wrapped enable + 10 + 1 + + + NWPOL + NWAIT polarity + 9 + 1 + + + SYNCBEN + Synchronous burst enable + 8 + 1 + + + NOREN + Nor flash access enable + 6 + 1 + + + EXTMDBW + External memory data bus width + 4 + 2 + + + DEV + Memory device type + 2 + 2 + + + ADMUXEN + Address and data multiplexing enable + 1 + 1 + + + EN + Memory bank enable + 0 + 1 + + + + + BK1TMG2 + BK1TMG2 + SRAM/NOR-Flash chip-select timing register + 2 + 0xC + 0x20 + read-write + 0x0FFFFFFF + + + ASYNCM + Asynchronous mode + 28 + 2 + + + DTLAT + Data latency + 24 + 4 + + + CLKPSC + Clock prescale + 20 + 4 + + + BUSLAT + Bus latency + 16 + 4 + + + DTST + Asynchronous data setup time + 8 + 8 + + + ADDRHT + Address-hold time + 4 + 4 + + + ADDRST + Address setup time + 0 + 4 + + + + + BK1CTRL3 + BK1CTRL3 + SRAM/NOR-Flash chip-select control register + 3 + 0x10 + 0x20 + read-write + 0x000030D2 + + + MWMC + Memory write mode control + 19 + 1 + + + CRPGS + CRAM page size + 16 + 3 + + + NWASEN + NWAIT in asynchronous transfer enable + 15 + 1 + + + RWTD + Read-write timing different + 14 + 1 + + + NWSEN + NWAIT in synchronous transfer enable + 13 + 1 + + + WEN + Write enable + 12 + 1 + + + NWTCFG + Wait timing configuration + 11 + 1 + + + WRAPEN + Wrapped enable + 10 + 1 + + + NWPOL + NWAIT polarity + 9 + 1 + + + SYNCBEN + Synchronous burst enable + 8 + 1 + + + NOREN + Nor flash access enable + 6 + 1 + + + EXTMDBW + External memory data bus width + 4 + 2 + + + DEV + Memory device type + 2 + 2 + + + ADMUXEN + Address and data multiplexing enable + 1 + 1 + + + EN + Memory bank enable + 0 + 1 + + + + + BK1TMG3 + BK1TMG3 + SRAM/NOR-Flash chip-select timing register + 3 + 0x14 + 0x20 + read-write + 0x0FFFFFFF + + + ASYNCM + Asynchronous mode + 28 + 2 + + + DTLAT + Data latency + 24 + 4 + + + CLKPSC + Clock prescale + 20 + 4 + + + BUSLAT + Bus latency + 16 + 4 + + + DTST + Asynchronous data setup time + 8 + 8 + + + ADDRHT + Address-hold time + 4 + 4 + + + ADDRST + Address setup time + 0 + 4 + + + + + BK1CTRL4 + BK1CTRL4 + SRAM/NOR-Flash chip-select control register + 4 + 0x18 + 0x20 + read-write + 0x000030D2 + + + MWMC + Memory write mode control + 19 + 1 + + + CRPGS + CRAM page size + 16 + 3 + + + NWASEN + NWAIT in asynchronous transfer enable + 15 + 1 + + + RWTD + Read-write timing different + 14 + 1 + + + NWSEN + NWAIT in synchronous transfer enable + 13 + 1 + + + WEN + Write enable + 12 + 1 + + + NWTCFG + Wait timing configuration + 11 + 1 + + + WRAPEN + Wrapped enable + 10 + 1 + + + NWPOL + NWAIT polarity + 9 + 1 + + + SYNCBEN + Synchronous burst enable + 8 + 1 + + + NOREN + Nor flash access enable + 6 + 1 + + + EXTMDBW + External memory data bus width + 4 + 2 + + + DEV + Memory device type + 2 + 2 + + + ADMUXEN + Address and data multiplexing enable + 1 + 1 + + + EN + Memory bank enable + 0 + 1 + + + + + BK1TMG4 + BK1TMG4 + SRAM/NOR-Flash chip-select timing register + 4 + 0x1C + 0x20 + read-write + 0x0FFFFFFF + + + ASYNCM + Asynchronous mode + 28 + 2 + + + DTLAT + Data latency + 24 + 4 + + + CLKPSC + Clock prescale + 20 + 4 + + + BUSLAT + Bus latency + 16 + 4 + + + DTST + Asynchronous data setup time + 8 + 8 + + + ADDRHT + Address-hold time + 4 + 4 + + + ADDRST + Address setup time + 0 + 4 + + + + + BK2CTRL + BK2CTRL + PC Card/NAND Flash control register + 2 + 0x60 + 0x20 + read-write + 0x00000018 + + + ECCPGS + ECC page size + 17 + 3 + + + TAR + ALE to RE delay + 13 + 4 + + + TCR + CLE to RE delay + 9 + 4 + + + ECCEN + ECC enable + 6 + 1 + + + EXTMDBW + External memory data bus width + 4 + 2 + + + DEV + Memory device type + 3 + 1 + + + EN + Memory bank enable + 2 + 1 + + + NWEN + Wait feature enable + 1 + 1 + + + + + BK2IS + BK2IS + FIFO status and interrupt register + 2 + 0x64 + 0x20 + 0x00000040 + + + FIFOE + FIFO empty + 6 + 1 + read-only + + + FEIEN + Falling edge interrupt enable + 5 + 1 + read-write + + + HLIEN + High-level interrupt enable + 4 + 1 + read-write + + + REIEN + Rising edge interrupt enable + 3 + 1 + read-write + + + FES + Falling edge status + 2 + 1 + read-write + + + HLS + High-level status + 1 + 1 + read-write + + + RES + Rising edge capture status + 0 + 1 + read-write + + + + + BK2TMGRG + BK2TMGRG + Regular memory space timing register + 2 + 0x68 + 0x20 + read-write + 0xFCFCFCFC + + + RGDHIZT + Regular memory databus High resistance time + 24 + 8 + + + RGHT + Regular memory hold time + 16 + 8 + + + RGWT + Regular memory wait time + 8 + 8 + + + RGST + Regular memory setup time + 0 + 8 + + + + + BK2TMGSP + BK2TMGSP + special memory space timing register + 2 + 0x6C + 0x20 + read-write + 0xFCFCFCFC + + + SPDHIZT + special memory databus High resistance time + 24 + 8 + + + SPHT + special memory hold time + 16 + 8 + + + SPWT + special memory wait time + 8 + 8 + + + SPST + special memory setup time + 0 + 8 + + + + + BK2ECC + BK2ECC + ECC result register 2 + 0x74 + 0x20 + read-write + 0x00000000 + + + ECC + ECC result + 0 + 32 + + + + + BK3CTRL + BK3CTRL + PC Card/NAND Flash control register + 3 + 0x80 + 0x20 + read-write + 0x00000018 + + + ECCPGS + ECC page size + 17 + 3 + + + TAR + ALE to RE delay + 13 + 4 + + + TCR + CLE to RE delay + 9 + 4 + + + ECCEN + ECC enable + 6 + 1 + + + EXTMDBW + External memory data bus width + 4 + 2 + + + DEV + Memory device type + 3 + 1 + + + EN + Memory bank enable + 2 + 1 + + + NWEN + Wait feature enable + 1 + 1 + + + + + BK3IS + BK3IS + FIFO status and interrupt register + 3 + 0x84 + 0x20 + 0x00000040 + + + FIFOE + FIFO empty + 6 + 1 + read-only + + + FEIEN + Falling edge interrupt enable + 5 + 1 + read-write + + + HLIEN + High-level interrupt enable + 4 + 1 + read-write + + + REIEN + Rising edge interrupt enable + 3 + 1 + read-write + + + FES + Falling edge status + 2 + 1 + read-write + + + HLS + High-level status + 1 + 1 + read-write + + + RES + Rising edge capture status + 0 + 1 + read-write + + + + + BK3TMGRG + BK3TMGRG + Regular memory space timing register + 3 + 0x88 + 0x20 + read-write + 0xFCFCFCFC + + + RGDHIZT + Regular memory databus High resistance time + 24 + 8 + + + RGHT + Regular memory hold time + 16 + 8 + + + RGWT + Regular memory wait time + 8 + 8 + + + RGST + Regular memory setup time + 0 + 8 + + + + + BK3TMGSP + BK3TMGSP + special memory space timing register + 3 + 0x8C + 0x20 + read-write + 0xFCFCFCFC + + + SPDHIZT + special memory databus High resistance time + 24 + 8 + + + SPHT + special memory hold time + 16 + 8 + + + SPWT + special memory wait time + 8 + 8 + + + SPST + special memory setup time + 0 + 8 + + + + + BK3ECC + BK3ECC + ECC result register 3 + 0x94 + 0x20 + read-write + 0x00000000 + + + ECC + ECC result + 0 + 32 + + + + + BK4CTRL + BK4CTRL + PC Card/NAND Flash control register + 4 + 0xA0 + 0x20 + read-write + 0x00000018 + + + EN + Memory bank enable + 2 + 1 + + + NWEN + Wait feature enable + 1 + 1 + + + + + BK4IS + BK4IS + FIFO status and interrupt register + 4 + 0xA4 + 0x20 + 0x00000040 + + + FIFOE + FIFO empty + 6 + 1 + read-only + + + FEIEN + Falling edge interrupt enable + 5 + 1 + read-write + + + HLIEN + High-level interrupt enable + 4 + 1 + read-write + + + REIEN + Rising edge interrupt enable + 3 + 1 + read-write + + + FES + Falling edge status + 2 + 1 + read-write + + + HLS + High-level status + 1 + 1 + read-write + + + RES + Rising edge capture status + 0 + 1 + read-write + + + + + BK4TMGCM + BK4TMGCM + Regular memory space timing register + 4 + 0xA8 + 0x20 + read-write + 0xFCFCFCFC + + + CMDHIZT + Regular memory databus High resistance time + 24 + 8 + + + CMHT + Regular memory hold time + 16 + 8 + + + CMWT + Regular memory wait time + 8 + 8 + + + CMST + Regular memory setup time + 0 + 8 + + + + + BK4TMGAT + BK4TMGAT + special memory space timing register + 4 + 0xAC + 0x20 + read-write + 0xFCFCFCFC + + + ATDHIZT + special memory databus High resistance time + 24 + 8 + + + ATHT + special memory hold time + 16 + 8 + + + ATWT + special memory wait time + 8 + 8 + + + ATST + special memory setup time + 0 + 8 + + + + + BK4TMGIO + BK4TMGIO + I/O space timing register 4 + 0xB0 + 0x20 + read-write + 0xFCFCFCFC + + + IODHIZT + WRSTP + 24 + 8 + + + IOHT + HLD + 16 + 8 + + + IOWT + OP + 8 + 8 + + + IOST + STP + 0 + 8 + + + + + BK1TMGWR1 + BK1TMGWR1 + SRAM/NOR-Flash write timing registers + 1 + 0x104 + 0x20 + read-write + 0x0FFFFFFF + + + ASYNCM + Asynchronous mode + 28 + 2 + + + BUSLAT + Bus latency + 16 + 4 + + + DTST + Asynchronous data setup time + 8 + 8 + + + ADDRHT + Address-hold time + 4 + 4 + + + ADDRST + Address setup time + 0 + 4 + + + + + BK1TMGWR2 + BK1TMGWR2 + SRAM/NOR-Flash write timing registers + 2 + 0x10C + 0x20 + read-write + 0x0FFFFFFF + + + ASYNCM + Asynchronous mode + 28 + 2 + + + BUSLAT + Bus latency + 16 + 4 + + + DTST + Asynchronous data setup time + 8 + 8 + + + ADDRHT + Address-hold time + 4 + 4 + + + ADDRST + Address setup time + 0 + 4 + + + + + BK1TMGWR3 + BK1TMGWR3 + SRAM/NOR-Flash write timing registers + 3 + 0x114 + 0x20 + read-write + 0x0FFFFFFF + + + ASYNCM + Asynchronous mode + 28 + 2 + + + BUSLAT + Bus latency + 16 + 4 + + + DTST + Asynchronous data setup time + 8 + 8 + + + ADDRHT + Address-hold time + 4 + 4 + + + ADDRST + Address setup time + 0 + 4 + + + + + BK1TMGWR4 + BK1TMGWR4 + SRAM/NOR-Flash write timing registers + 4 + 0x11C + 0x20 + read-write + 0x0FFFFFFF + + + ASYNCM + Asynchronous mode + 28 + 2 + + + BUSLAT + Bus latency + 16 + 4 + + + DTST + Asynchronous data setup time + 8 + 8 + + + ADDRHT + Address-hold time + 4 + 4 + + + ADDRST + Address setup time + 0 + 4 + + + + + CTRL1 + CTRL1 + SDRAM Control Register 1 + 0x140 + 0x20 + read-write + 0x000002D0 + + + CA + Number of column address + bits + 0 + 2 + + + RA + Number of row address bits + 2 + 2 + + + DB + Memory data bus width + 4 + 2 + + + INBK + Number of internal banks + 6 + 1 + + + CAS + CAS latency + 7 + 2 + + + WRP + Write protection + 9 + 1 + + + CLKDIV + Clock division configuration + 10 + 2 + + + BSTR + Burst read + 12 + 1 + + + RD + Read delay + 13 + 2 + + + + + CTRL2 + CTRL2 + SDRAM Control Register 2 + 0x144 + 0x20 + read-write + 0x000002D0 + + + CA + Number of column address + bits + 0 + 2 + + + RA + Number of row address bits + 2 + 2 + + + DB + Memory data bus width + 4 + 2 + + + INBK + Number of internal banks + 6 + 1 + + + CAS + CAS latency + 7 + 2 + + + WRP + Write protection + 9 + 1 + + + CLKDIV + Clock division configuration + 10 + 2 + + + BSTR + Burst read + 12 + 1 + + + RD + Read pipe + 13 + 2 + + + + + TM1 + TM1 + SDRAM Timing register 1 + 0x148 + 0x20 + read-write + 0x0FFFFFFF + + + TMRD + Mode register program to active delay + 0 + 4 + + + TXSR + Exit Self-refresh to active delay + 4 + 4 + + + TRAS + Self refresh time + 8 + 4 + + + TRC + Refresh to active delay + 12 + 4 + + + TWR + Write Recovery delay + 16 + 4 + + + TRP + Precharge to active delay + 20 + 4 + + + TRCD + Row active to Read/Write delay + 24 + 4 + + + + + TM2 + TM2 + SDRAM Timing register 2 + 0x14C + 0x20 + read-write + 0x0FFFFFFF + + + TMRD + Mode register program to active delay + 0 + 4 + + + TXSR + Exit Self-refresh to active delay + 4 + 4 + + + TRAS + Self refresh time + 8 + 4 + + + TRC + Refresh to active delay + 12 + 4 + + + TWR + Write Recovery delay + 16 + 4 + + + TRP + Precharge to active delay + 20 + 4 + + + TRCD + Row active to Read/Write delay + 24 + 4 + + + + + CMD + CMD + SDRAM Command Mode register + 0x150 + 0x20 + 0x00000000 + + + CMD + SDRAM Command + 0 + 3 + write-only + + + BK2 + SDRAM Bank 2 + 3 + 1 + write-only + + + BK1 + SDRAM Bank 1 + 4 + 1 + write-only + + + ART + Auto-refresh times + 5 + 4 + read-write + + + MRD + Mode register data + 9 + 13 + read-write + + + + + RCNT + RCNT + SDRAM Refresh Timer register + 0x154 + 0x20 + 0x00000000 + + + ERRC + error flag clear + 0 + 1 + write-only + + + RC + Refresh Count + 1 + 13 + read-write + + + ERIEN + error Interrupt Enable + 14 + 1 + read-write + + + + + STS + STS + SDRAM Status register + 0x158 + 0x20 + read-only + 0x00000000 + + + ERR + error flag + 0 + 1 + + + BK1STS + Bank 1 Status + 1 + 2 + + + BK2STS + Bank 2 Status + 3 + 2 + + + BUSY + Busy status + 5 + 1 + + + + + EXT1 + EXT1 + externl timeing register 1 + 0x220 + 0x20 + read-write + 0x00000808 + + + BUSLATW2W + Bus turnaround phase for consecutive write duration + 0 + 8 + + + BUSLATR2R + Bus turnaround phase for consecutive read duration + 8 + 8 + + + + + EXT2 + EXT2 + externl timeing register 2 + 0x224 + 0x20 + read-write + 0x00000808 + + + BUSLATW2W + Bus turnaround phase for consecutive write duration + 0 + 8 + + + BUSLATR2R + Bus turnaround phase for consecutive read duration + 8 + 8 + + + + + EXT3 + EXT3 + externl timeing register 3 + 0x228 + 0x20 + read-write + 0x00000808 + + + BUSLATW2W + Bus turnaround phase for consecutive write duration + 0 + 8 + + + BUSLATR2R + Bus turnaround phase for consecutive read duration + 8 + 8 + + + + + EXT4 + EXT4 + externl timeing register 4 + 0x22C + 0x20 + read-write + 0x00000808 + + + BUSLATW2W + Bus turnaround phase for consecutive write duration + 0 + 8 + + + BUSLATR2R + Bus turnaround phase for consecutive read duration + 8 + 8 + + + + + + + PWC + Power control + PWC + 0x40007000 + + 0x0 + 0x400 + registers + + + + CTRL + CTRL + Power control register + (PWC_CTRL) + 0x0 + 0x20 + read-write + 0x00000000 + + + VRSEL + Voltage regulator state select when deepsleep mode + 0 + 1 + + + LPSEL + Low power mode select when Cortex-M4F sleepdeep + 1 + 1 + + + CLSWEF + Clear SWEF flag + 2 + 1 + + + CLSEF + Clear SEF flag + 3 + 1 + + + PVMEN + Power voltage monitoring enable + 4 + 1 + + + PVMSEL + Power voltage monitoring boundary select + 5 + 3 + + + BPWEN + Battery powered domain write enable + 8 + 1 + + + + + CTRLSTS + CTRLSTS + Power control and status register + (PWC_CTRLSTS) + 0x4 + 0x20 + 0x00000000 + + + SWEF + Standby wake-up event flag + 0 + 1 + read-only + + + SEF + Standby mode entry flag + 1 + 1 + read-only + + + PVMOF + Power voltage monitoring output flag + 2 + 1 + read-only + + + SWPEN1 + Standby wake-up pin 1 enable + 8 + 1 + read-write + + + SWPEN2 + Standby wake-up pin 2 enable + 9 + 1 + read-write + + + + + LDOOV + LDOOV + LDO output voltage register + 0x10 + 0x20 + 0x00000000 + + + LDOOVSEL + LDO output voltage select + 0 + 3 + read-write + + + + + + + CRM + Clock and reset management + CRM + 0x40023800 + + 0x0 + 0x400 + registers + + + CRM + CRM global interrupt + 5 + + + + CTRL + CTRL + Clock control register + 0x0 + 0x20 + 0x00000083 + + + HICKEN + High speed internal clock enable + 0 + 1 + read-write + + + HICKSTBL + High speed internal clock ready flag + 1 + 1 + read-only + + + HICKTRIM + High speed internal clock trimming + 2 + 6 + read-write + + + HICKCAL + High speed internal clock calibration + 8 + 8 + read-only + + + HEXTEN + High speed exernal crystal enable + 16 + 1 + read-write + + + HEXTSTBL + High speed exernal crystal ready flag + 17 + 1 + read-only + + + HEXTBYPS + High speed exernal crystal bypass + 18 + 1 + read-write + + + CFDEN + Clock failure detection enable + 19 + 1 + read-write + + + PLLEN + PLL enable + 24 + 1 + read-write + + + PLLSTBL + PLL clock ready flag + 25 + 1 + read-only + + + + + PLLCFG + PLLCFG + PLL configuration register + (CRM_PLLCFG) + 0x4 + 0x20 + 0x00033002 + + + PLL_MS + PLL pre-division + 0 + 4 + read-write + + + PLL_NS + PLL frequency multiplication factor + 6 + 9 + read-write + + + PLL_FR + PLL post-division + 16 + 3 + read-write + + + PLLRCS + PLL reference clock select + 22 + 1 + read-write + + + + + CFG + CFG + Clock configuration register(CRM_CFG) + 0x8 + 0x20 + 0x00000000 + + + SCLKSEL + System clock select + 0 + 2 + read-write + + + SCLKSTS + System Clock select Status + 2 + 2 + read-only + + + AHBDIV + AHB division + 4 + 4 + read-write + + + APB1DIV + APB1 division + 10 + 3 + read-write + + + APB2DIV + APB2 division + 13 + 3 + read-write + + + ERTCDIV + HEXT division for ERTC clock + 16 + 5 + read-write + + + CLKOUT1_SEL + Clock output1 selection + 21 + 2 + read-write + + + CLKOUT1DIV1 + Clock output1 division1 + 24 + 3 + read-write + + + CLKOUT2DIV1 + Clock output2 division1 + 27 + 3 + read-write + + + CLKOUT2_SEL1 + Clock output2 selection1 + 30 + 2 + read-write + + + + + CLKINT + CLKINT + Clock interrupt register + (CRM_CLKINT) + 0xC + 0x20 + 0x00000000 + + + LICKSTBLF + LICK ready interrupt flag + 0 + 1 + read-only + + + LEXTSTBLF + LEXT ready interrupt flag + 1 + 1 + read-only + + + HICKSTBLF + HICK ready interrupt flag + 2 + 1 + read-only + + + HEXTSTBLF + HEXT ready interrupt flag + 3 + 1 + read-only + + + PLLSTBLF + PLL ready interrupt flag + 4 + 1 + read-only + + + CFDF + Clock failure detection interrupt flag + 7 + 1 + read-only + + + LICKSTBLIEN + LICK ready interrupt enable + 8 + 1 + read-write + + + LEXTSTBLIEN + LEXT ready interrupt enable + 9 + 1 + read-write + + + HICKSTBLIEN + HICK ready interrupt enable + 10 + 1 + read-write + + + HEXTSTBLIEN + HEXT ready interrupt enable + 11 + 1 + read-write + + + PLLSTBLIEN + PLL ready interrupt enable + 12 + 1 + read-write + + + LICKSTBLFC + LICK ready interrupt clear + 16 + 1 + write-only + + + LEXTSTBLFC + LEXT ready interrupt clear + 17 + 1 + write-only + + + HICKSTBLFC + HICK ready interrupt clear + 18 + 1 + write-only + + + HEXTSTBLFC + HEXT ready interrupt clear + 19 + 1 + write-only + + + PLLSTBLFC + PLL ready interrupt clear + 20 + 1 + write-only + + + CFDFC + Clock failure detection interrupt clear + 23 + 1 + write-only + + + + + AHBRST1 + AHBRST1 + AHB peripheral reset register1 + (CRM_AHBRST1) + 0x10 + 0x20 + read-write + 0x000000000 + + + GPIOARST + IO port A reset + 0 + 1 + + + GPIOBRST + IO port B reset + 1 + 1 + + + GPIOCRST + IO port C reset + 2 + 1 + + + GPIODRST + IO port D reset + 3 + 1 + + + GPIOERST + IO port E reset + 4 + 1 + + + GPIOFRST + IO port F reset + 5 + 1 + + + GPIOGRST + IO port G reset + 6 + 1 + + + GPIOHRST + IO port H reset + 7 + 1 + + + CRCRST + CRC reset + 12 + 1 + + + EDMARST + EDMA reset + 21 + 1 + + + DMA1RST + DMA1 reset + 22 + 1 + + + DMA2RST + DMA2 reset + 24 + 1 + + + EMACRST + EMAC reset + 25 + 1 + + + OTGFS2RST + OTGFS2 interface reset + 29 + 1 + + + + + AHBRST2 + AHBRST2 + AHB peripheral reset register 2 + (CRM_AHBRST2) + 0x14 + 0x20 + read-write + 0x00000000 + + + DVPRST + DVP reset + 0 + 1 + + + OTGFS1RST + OTGFS1 reset + 7 + 1 + + + SDIO1RST + SDIO1 reset + 15 + 1 + + + + + AHBRST3 + AHBRST3 + AHB peripheral reset register 3 + (CRM_AHBRST3) + 0x18 + 0x20 + read-write + 0x00000000 + + + XMCRST + XMC reset + 0 + 1 + + + QSPI1RST + QSPI1 reset + 1 + 1 + + + QSPI2RST + QSPI2 reset + 14 + 1 + + + SDIO2RST + SDIO2 reset + 15 + 1 + + + + + APB1RST + APB1RST + APB1 peripheral reset register + (CRM_APB1RST) + 0x20 + 0x20 + read-write + 0x00000000 + + + TMR2RST + Timer2 reset + 0 + 1 + + + TMR3RST + Timer3 reset + 1 + 1 + + + TMR4RST + Timer4 reset + 2 + 1 + + + TMR5RST + Timer5 reset + 3 + 1 + + + TMR6RST + Timer6 reset + 4 + 1 + + + TMR7RST + Timer7 reset + 5 + 1 + + + TMR12RST + Timer12 reset + 6 + 1 + + + TMR13RST + Timer13 reset + 7 + 1 + + + TMR14RST + Timer14 reset + 8 + 1 + + + WWDTRST + Window watchdog reset + 11 + 1 + + + SPI2RST + SPI2 reset + 14 + 1 + + + SPI3RST + SPI3 reset + 15 + 1 + + + USART2RST + USART2 reset + 17 + 1 + + + USART3RST + USART3 reset + 18 + 1 + + + UART4RST + UART4 reset + 19 + 1 + + + UART5RST + UART5 reset + 20 + 1 + + + I2C1RST + I2C1 reset + 21 + 1 + + + I2C2RST + I2C2 reset + 22 + 1 + + + I2C3RST + I2C3 reset + 23 + 1 + + + CAN1RST + CAN1 reset + 25 + 1 + + + CAN2RST + CAN2 reset + 26 + 1 + + + PWCRST + PWC reset + 28 + 1 + + + DACRST + DAC reset + 29 + 1 + + + UART7RST + UART7 reset + 30 + 1 + + + UART8RST + UART8 reset + 31 + 1 + + + + + APB2RST + APB2RST + APB2 peripheral reset register + (CRM_APB2RST) + 0x24 + 0x20 + read-write + 0x00000000 + + + TMR1RST + Timer1 reset + 0 + 1 + + + TMR8RST + Timer8 reset + 1 + 1 + + + USART1RST + USART1 reset + 4 + 1 + + + USART6RST + USART6 reset + 5 + 1 + + + ADCRST + ADC reset + 8 + 1 + + + SPI1RST + SPI1 reset + 12 + 1 + + + SPI4RST + SPI4 reset + 13 + 1 + + + SCFGRST + SCFG reset + 14 + 1 + + + TMR9RST + Timer9 reset + 16 + 1 + + + TMR10RST + Timer10 reset + 17 + 1 + + + TMR11RST + Timer 11 reset + 18 + 1 + + + TMR20RST + Timer20 reset + 20 + 1 + + + ACCRST + ACC reset + 29 + 1 + + + + + AHBEN1 + AHBEN1 + AHB Peripheral Clock enable register 1 + (CRM_AHBEN1) + 0x30 + 0x20 + read-write + 0x00000000 + + + GPIOAEN + IO A clock enable + 0 + 1 + + + GPIOBEN + IO B clock enable + 1 + 1 + + + GPIOCEN + IO C clock enable + 2 + 1 + + + GPIODEN + IO D clock enable + 3 + 1 + + + GPIOEEN + IO E clock enable + 4 + 1 + + + GPIOFEN + IO F clock enable + 5 + 1 + + + GPIOGEN + IO G clock enable + 6 + 1 + + + GPIOHEN + IO H clock enable + 7 + 1 + + + CRCEN + CRC clock enable + 12 + 1 + + + EDMAEN + DMA1 clock enable + 21 + 1 + + + DMA1EN + DMA1 clock enable + 22 + 1 + + + DMA2EN + DMA2 clock enable + 24 + 1 + + + EMACEN + EMAC clock enable + 25 + 1 + + + EMACTXEN + EMAC Tx clock enable + 26 + 1 + + + EMACRXEN + EMAC Rx clock enable + 27 + 1 + + + EMACPTPEN + EMAC PTP clock enable + 28 + 1 + + + OTGFS2EN + OTGFS2 clock enable + 29 + 1 + + + + + AHBEN2 + AHBEN2 + AHB peripheral clock enable register 2 + (CRM_AHBEN2) + 0x34 + 0x20 + read-write + 0x00000000 + + + DVPEN + DVP clock enable + 0 + 1 + + + OTGFS1EN + OTGFS1 clock enable + 7 + 1 + + + SDIO1EN + SDIO1 clock enable + 15 + 1 + + + + + AHBEN3 + AHBEN3 + AHB peripheral clock enable register 3 + (CRM_AHBEN3) + 0x38 + 0x20 + read-write + 0x00000000 + + + XMCEN + XMC clock enable + 0 + 1 + + + QSPI1EN + QSPI1 clock enable + 1 + 1 + + + QSPI2EN + QSPI2 clock enable + 14 + 1 + + + SDIO2EN + SDIO 2 clock enable + 15 + 1 + + + + + APB1EN + APB1EN + APB1 peripheral clock enable register + (CRM_APB1EN) + 0x40 + 0x20 + read-write + 0x00000000 + + + TMR2EN + Timer2 clock enable + 0 + 1 + + + TMR3EN + Timer3 clock enable + 1 + 1 + + + TMR4EN + Timer4 clock enable + 2 + 1 + + + TMR5EN + Timer5 clock enable + 3 + 1 + + + TMR6EN + Timer6 clock enable + 4 + 1 + + + TMR7EN + Timer7 clock enable + 5 + 1 + + + TMR12EN + Timer12 clock enable + 6 + 1 + + + TMR13EN + Timer13 clock enable + 7 + 1 + + + TMR14EN + Timer14 clock enable + 8 + 1 + + + WWDTEN + WWDT clock enable + 11 + 1 + + + SPI2EN + SPI2 clock enable + 14 + 1 + + + SPI3EN + SPI3 clock enable + 15 + 1 + + + USART2EN + USART2 clock enable + 17 + 1 + + + USART3EN + USART3 clock enable + 18 + 1 + + + UART4EN + UART4 clock enable + 19 + 1 + + + UART5EN + UART5 clock enable + 20 + 1 + + + I2C1EN + I2C1 clock enable + 21 + 1 + + + I2C2EN + I2C2 clock enable + 22 + 1 + + + I2C3EN + I2C3 clock enable + 23 + 1 + + + CAN1EN + CAN1 clock enable + 25 + 1 + + + CAN2EN + CAN2 clock enable + 26 + 1 + + + PWCEN + PWC clock enable + 28 + 1 + + + DACEN + DAC clock enable + 29 + 1 + + + UART7EN + UART7 clock enable + 30 + 1 + + + UART8EN + UART8 clock enable + 31 + 1 + + + + + APB2EN + APB2EN + APB2 peripheral clock enable register + (CRM_APB2EN) + 0x44 + 0x20 + read-write + 0x00000000 + + + TMR1EN + Timer1 clock enable + 0 + 1 + + + TMR8EN + Timer8 clock enable + 1 + 1 + + + USART1EN + USART1 clock enable + 4 + 1 + + + USART6EN + USART6 clock enable + 5 + 1 + + + ADC1EN + ADC1 clock enable + 8 + 1 + + + ADC2EN + ADC2 clock enable + 9 + 1 + + + ADC3EN + ADC3 clock enable + 10 + 1 + + + SPI1EN + SPI1 clock enable + 12 + 1 + + + SPI4EN + SPI4 clock enable + 13 + 1 + + + SCFGEN + SCFG clock enable + 14 + 1 + + + TMR9EN + Timer9 clock enable + 16 + 1 + + + TMR10EN + Timer10 clock enable + 17 + 1 + + + TMR11EN + Timer11 clock enable + 18 + 1 + + + TMR20EN + Timer20 clock enable + 20 + 1 + + + ACCEN + ACC clock enable + 29 + 1 + + + + + AHBLPEN1 + AHBLPEN1 + AHB Low-power Peripheral Clock enable + register 1 (CRM_AHBLPEN1) + 0x50 + 0x20 + read-write + 0x3E6390FF + + + GPIOALPEN + IO A clock enable during sleep mode + 0 + 1 + + + GPIOBLPEN + IO B clock enable during sleep mode + 1 + 1 + + + GPIOCLPEN + IO C clock enable during sleep mode + 2 + 1 + + + GPIODLPEN + IO D clock enable during sleep mode + 3 + 1 + + + GPIOELPEN + IO E clock enable during sleep mode + 4 + 1 + + + GPIOFLPEN + IO F clock enable during sleep mode + 5 + 1 + + + GPIOGLPEN + IO G clock enable during sleep mode + 6 + 1 + + + GPIOHLPEN + IO H clock enable during sleep mode + 7 + 1 + + + CRCLPEN + CRC clock enable during sleep mode + 12 + 1 + + + FLASHLPEN + Flash clock enable during sleep mode + 15 + 1 + + + SRAM1LPEN + SRAM1 clock enable during sleep mode + 16 + 1 + + + SRAM2LPEN + SRAM2 clock enable during sleep mode + 17 + 1 + + + EDMALPEN + EDMA clock enable during sleep mode + 21 + 1 + + + DMA1LPEN + DMA1 clock enable during sleep mode + 22 + 1 + + + DMA2LPEN + DMA2 clock enable during sleep mode + 24 + 1 + + + EMACLPEN + EMAC clock enable during sleep mode + 25 + 1 + + + EMACTXLPEN + EMAC Tx clock enable during sleep mode + 26 + 1 + + + EMACRXLPEN + EMAC Rx clock enable during sleep mode + 27 + 1 + + + EMACPTPLPEN + EMAC PTP clock enable during sleep mode + 28 + 1 + + + OTGFS2LPEN + OTGFS2 clock enable during sleep mode + 29 + 1 + + + + + AHBLPEN2 + AHBLPEN2 + AHB peripheral Low-power clock + enable register 2 (CRM_AHBLPEN2) + 0x54 + 0x20 + read-write + 0x00008081 + + + DVPLPEN + DVP clock enable during sleep mode + 0 + 1 + + + OTGFS1LPEN + OTGFS1 clock enable during sleep mode + 7 + 1 + + + SDIO1LPEN + SDIO1 clock enable during sleep mode + 15 + 1 + + + + + AHBLPEN3 + AHBLPEN3 + AHB peripheral Low-power clock + enable register 3 (CRM_AHBLPEN3) + 0x58 + 0x20 + read-write + 0x0000C003 + + + XMCLPEN + XMC clock enable during sleep mode + 0 + 1 + + + QSPI1LPEN + QSPI1 clock enable during sleep mode + 1 + 1 + + + QSPI2LPEN + QSPI2 clock enable during sleep mode + 14 + 1 + + + SDIO2LPEN + SDIO2 clock enable during sleep mode + 15 + 1 + + + + + APB1LPEN + APB1LPEN + APB1 peripheral Low-power clock + enable register (CRM_APB1LPEN) + 0x60 + 0x20 + read-write + 0xF6FEE9FF + + + TMR2LPEN + Timer2 clock enable during sleep mode + 0 + 1 + + + TMR3LPEN + Timer3 clock enable during sleep mode + 1 + 1 + + + TMR4LPEN + Timer4 clock enable during sleep mode + 2 + 1 + + + TMR5LPEN + Timer5 clock enable during sleep mode + 3 + 1 + + + TMR6LPEN + Timer6 clock enable during sleep mode + 4 + 1 + + + TMR7LPEN + Timer7 clock enable during sleep mode + 5 + 1 + + + TMR12LPEN + Timer12 clock enable during sleep mode + 6 + 1 + + + TMR13LPEN + Timer13 clock enable during sleep mode + 7 + 1 + + + TMR14LPEN + Timer14 clock enable during sleep mode + 8 + 1 + + + WWDTLPEN + WWDT clock enable during sleep mode + 11 + 1 + + + SPI2LPEN + SPI2 clock enable during sleep mode + 14 + 1 + + + SPI3LPEN + SPI3 clock enable during sleep mode + 15 + 1 + + + USART2LPEN + USART2 clock enable during sleep mode + 17 + 1 + + + USART3LPEN + USART3 clock enable during sleep mode + 18 + 1 + + + UART4LPEN + UART4 clock enable during sleep mode + 19 + 1 + + + UART5LPEN + UART5 clock enable during sleep mode + 20 + 1 + + + I2C1CPEN + I2C1 clock enable during sleep mode + 21 + 1 + + + I2C2CPEN + I2C2 clock enable during sleep mode + 22 + 1 + + + I2C3CPEN + I2C3 clock enable during sleep mode + 23 + 1 + + + CAN1LPEN + CAN1 clock enable during sleep mode + 25 + 1 + + + CAN2LPEN + CAN2 clock enable during sleep mode + 26 + 1 + + + PWCLPEN + PWC clock enable during sleep mode + 28 + 1 + + + DACLPEN + DAC clock enable during sleep mode + 29 + 1 + + + UART7LPEN + UART7 clock enable during sleep mode + 30 + 1 + + + UART8LPEN + UART8 clock enable during sleep mode + 31 + 1 + + + + + APB2LPEN + APB2LPEN + APB2 peripheral Low-power clock + enable register (CRM_APB2LPEN) + 0x64 + 0x20 + read-write + 0x20177733 + + + TMR1LPEN + Timer1 clock enable during sleep mode + 0 + 1 + + + TMR8LPEN + Timer8 clock enable during sleep mode + 1 + 1 + + + USART1LPEN + USART1 clock enable during sleep mode + 4 + 1 + + + USART6LPEN + USART6 clock enable during sleep mode + 5 + 1 + + + ADC1CPEN + ADC1 clock enable during sleep mode + 8 + 1 + + + ADC2CPEN + ADC2 clock enable during sleep mode + 9 + 1 + + + ADC3EN + ADC3 clock enable during sleep mode + 10 + 1 + + + SPI1LPEN + SPI1 clock enable during sleep mode + 12 + 1 + + + SPI4LPEN + SPI4 clock enable during sleep mode + 13 + 1 + + + SCFGLPEN + SCFG clock enable during sleep mode + 14 + 1 + + + TMR9LPEN + Timer9 clock enable during sleep mode + 16 + 1 + + + TMR10LPEN + Timer10 clock enable during sleep mode + 17 + 1 + + + TMR11LPEN + Timer11 clock enable during sleep mode + 18 + 1 + + + TMR20LPEN + Timer20 clock enable during sleep mode + 20 + 1 + + + ACCLPEN + ACC clock enable during sleep mode + 29 + 1 + + + + + BPDC + BPDC + Battery powered domain control register + (CRM_BPDC) + 0x70 + 0x20 + 0x00000000 + + + LEXTEN + Low speed external crystal enable + 0 + 1 + read-write + + + LEXTSTBL + Low speed external crystal ready + 1 + 1 + read-only + + + LEXTBYPS + Low speed external crystal bypass + 2 + 1 + read-write + + + ERTCSEL + ERTC clock source selection + 8 + 2 + read-write + + + ERTCEN + ERTC clock enable + 15 + 1 + read-write + + + BPDRST + Battery powered domain software reset + 16 + 1 + read-write + + + + + CTRLSTS + CTRLSTS + Control/status register + (CRM_CTRLSTS) + 0x74 + 0x20 + 0x0C000000 + + + LICKEN + Low speed internal clock enable + 0 + 1 + read-write + + + LICKSTBL + Low speed internal clock ready + 1 + 1 + read-only + + + RSTFC + Reset reset flag + 24 + 1 + read-write + + + NRSTF + PIN reset flag + 26 + 1 + read-write + + + PORRSTF + POR/LVR reset flag + 27 + 1 + read-write + + + SWRSTF + Software reset flag + 28 + 1 + read-write + + + WDTRSTF + Watchdog timer reset flag + 29 + 1 + read-write + + + WWDTRSTF + Window watchdog timer reset flag + 30 + 1 + read-write + + + LPRSTF + Low-power reset flag + 31 + 1 + read-write + + + + + MISC1 + MISC1 + Miscellaneous register1 + 0xA0 + 0x20 + 0x00000000 + + + HICKCAL_KEY + HICKCAL write key value + 0 + 8 + read-write + + + HICKDIV + HICK 6 divider selection + 12 + 1 + read-write + + + HICK_TO_USB + HICK to usb clock + 13 + 1 + read-write + + + HICK_TO_SCLK + HICK to system clock + 14 + 1 + read-write + + + CLKOUT2_SEL2 + Clock output2 select2 + 16 + 4 + read-write + + + CLKOUT1DIV2 + Clock output1 division2 + 24 + 4 + read-write + + + CLKOUT2DIV2 + Clock output2 division2 + 28 + 4 + read-write + + + + + MISC2 + MISC2 + Miscellaneous register2 + 0xA4 + 0x20 + 0x0000000D + + + AUTO_STEP_EN + AUTO_STEP_EN + 4 + 2 + read-write + + + CLK_TO_TMR + Clock output internal connect to timer10 + 8 + 1 + read-write + + + USBDIV + USB division + 12 + 4 + read-write + + + + + + + GPIOA + General purpose I/Os + GPIO + 0x40020000 + + 0x0 + 0x400 + registers + + + + CFGR + CFGR + GPIO configuration register + 0x0 + 0x20 + read-write + 0x00000000 + + + IOMC15 + GPIOx pin 15 mode configurate + 30 + 2 + + + IOMC14 + GPIOx pin 14 mode configurate + 28 + 2 + + + IOMC13 + GPIOx pin 13 mode configurate + 26 + 2 + + + IOMC12 + GPIOx pin 12 mode configurate + 24 + 2 + + + IOMC11 + GPIOx pin 11 mode configurate + 22 + 2 + + + IOMC10 + GPIOx pin 10 mode configurate + 20 + 2 + + + IOMC9 + GPIOx pin 9 mode configurate + 18 + 2 + + + IOMC8 + GPIOx pin 8 mode configurate + 16 + 2 + + + IOMC7 + GPIOx pin 7 mode configurate + 14 + 2 + + + IOMC6 + GPIOx pin 6 mode configurate + 12 + 2 + + + IOMC5 + GPIOx pin 5 mode configurate + 10 + 2 + + + IOMC4 + GPIOx pin 4 mode configurate + 8 + 2 + + + IOMC3 + GPIOx pin 3 mode configurate + 6 + 2 + + + IOMC2 + GPIOx pin 2 mode configurate + 4 + 2 + + + IOMC1 + GPIOx pin 1 mode configurate + 2 + 2 + + + IOMC0 + GPIOx pin 0 mode configurate + 0 + 2 + + + + + OMODE + OMODE + GPIO output mode register + 0x4 + 0x20 + read-write + 0x00000000 + + + OM15 + GPIOx pin 15 outpu mode configurate + 15 + 1 + + + OM14 + GPIOx pin 14 outpu mode configurate + 14 + 1 + + + OM13 + GPIOx pin 13 outpu mode configurate + 13 + 1 + + + OM12 + GPIOx pin 12 outpu mode configurate + 12 + 1 + + + OM11 + GPIOx pin 11 outpu mode configurate + 11 + 1 + + + OM10 + GPIOx pin 10 outpu mode configurate + 10 + 1 + + + OM9 + GPIOx pin 9 outpu mode configurate + 9 + 1 + + + OM8 + GPIOx pin 8 outpu mode configurate + 8 + 1 + + + OM7 + GPIOx pin 7 outpu mode configurate + 7 + 1 + + + OM6 + GPIOx pin 6 outpu mode configurate + 6 + 1 + + + OM5 + GPIOx pin 5 outpu mode configurate + 5 + 1 + + + OM4 + GPIOx pin 4 outpu mode configurate + 4 + 1 + + + OM3 + GPIOx pin 3 outpu mode configurate + 3 + 1 + + + OM2 + GPIOx pin 2 outpu mode configurate + 2 + 1 + + + OM1 + GPIOx pin 1 outpu mode configurate + 1 + 1 + + + OM0 + GPIOx pin 0 outpu mode configurate + 0 + 1 + + + + + ODRVR + ODRVR + GPIO drive capability register + 0x8 + 0x20 + read-write + 0x00000000 + + + ODRV15 + GPIOx pin 15 output drive capability + 30 + 2 + + + ODRV14 + GPIOx pin 14 output drive capability + 28 + 2 + + + ODRV13 + GPIOx pin 13 output drive capability + 26 + 2 + + + ODRV12 + GPIOx pin 12 output drive capability + 24 + 2 + + + ODRV11 + GPIOx pin 11 output drive capability + 22 + 2 + + + ODRV10 + GPIOx pin 10 output drive capability + 20 + 2 + + + ODRV9 + GPIOx pin 9 output drive capability + 18 + 2 + + + ODRV8 + GPIOx pin 8 output drive capability + 16 + 2 + + + ODRV7 + GPIOx pin 7 output drive capability + 14 + 2 + + + ODRV6 + GPIOx pin 6 output drive capability + 12 + 2 + + + ODRV5 + GPIOx pin 5 output drive capability + 10 + 2 + + + ODRV4 + GPIOx pin 4 output drive capability + 8 + 2 + + + ODRV3 + GPIOx pin 3 output drive capability + 6 + 2 + + + ODRV2 + GPIOx pin 2 output drive capability + 4 + 2 + + + ODRV1 + GPIOx pin 1 output drive capability + 2 + 2 + + + ODRV0 + GPIOx pin 0 output drive capability + 0 + 2 + + + + + PULL + PULL + GPIO pull-up/pull-down register + 0xC + 0x20 + read-write + 0x00000000 + + + PULL15 + GPIOx pin 15 pull configuration + 30 + 2 + + + PULL14 + GPIOx pin 14 pull configuration + 28 + 2 + + + PULL13 + GPIOx pin 13 pull configuration + 26 + 2 + + + PULL12 + GPIOx pin 12 pull configuration + 24 + 2 + + + PULL11 + GPIOx pin 11 pull configuration + 22 + 2 + + + PULL10 + GPIOx pin 10 pull configuration + 20 + 2 + + + PULL9 + GPIOx pin 9 pull configuration + 18 + 2 + + + PULL8 + GPIOx pin 8 pull configuration + 16 + 2 + + + PULL7 + GPIOx pin 7 pull configuration + 14 + 2 + + + PULL6 + GPIOx pin 6 pull configuration + 12 + 2 + + + PULL5 + GPIOx pin 5 pull configuration + 10 + 2 + + + PULL4 + GPIOx pin 4 pull configuration + 8 + 2 + + + PULL3 + GPIOx pin 3 pull configuration + 6 + 2 + + + PULL2 + GPIOx pin 2 pull configuration + 4 + 2 + + + PULL1 + GPIOx pin 1 pull configuration + 2 + 2 + + + PULL0 + GPIOx pin 0 pull configuration + 0 + 2 + + + + + IDT + IDT + GPIO input data register + 0x10 + 0x20 + read-only + 0x00000000 + + + IDT0 + Port input data + 0 + 1 + + + IDT1 + Port input data + 1 + 1 + + + IDT2 + Port input data + 2 + 1 + + + IDT3 + Port input data + 3 + 1 + + + IDT4 + Port input data + 4 + 1 + + + IDT5 + Port input data + 5 + 1 + + + IDT6 + Port input data + 6 + 1 + + + IDT7 + Port input data + 7 + 1 + + + IDT8 + Port input data + 8 + 1 + + + IDT9 + Port input data + 9 + 1 + + + IDT10 + Port input data + 10 + 1 + + + IDT11 + Port input data + 11 + 1 + + + IDT12 + Port input data + 12 + 1 + + + IDT13 + Port input data + 13 + 1 + + + IDT14 + Port input data + 14 + 1 + + + IDT15 + Port input data + 15 + 1 + + + + + ODT + ODT + GPIO output data register + 0x14 + 0x20 + read-write + 0x00000000 + + + ODT0 + Port output data + 0 + 1 + + + ODT1 + Port output data + 1 + 1 + + + ODT2 + Port output data + 2 + 1 + + + ODT3 + Port output data + 3 + 1 + + + ODT4 + Port output data + 4 + 1 + + + ODT5 + Port output data + 5 + 1 + + + ODT6 + Port output data + 6 + 1 + + + ODT7 + Port output data + 7 + 1 + + + ODT8 + Port output data + 8 + 1 + + + ODT9 + Port output data + 9 + 1 + + + ODT10 + Port output data + 10 + 1 + + + ODT11 + Port output data + 11 + 1 + + + ODT12 + Port output data + 12 + 1 + + + ODT13 + Port output data + 13 + 1 + + + ODT14 + Port output data + 14 + 1 + + + ODT15 + Port output data + 15 + 1 + + + + + SCR + SCR + Port bit set/clear register + 0x18 + 0x20 + write-only + 0x00000000 + + + IOSB0 + Set bit 0 + 0 + 1 + + + IOSB1 + Set bit 1 + 1 + 1 + + + IOSB2 + Set bit 1 + 2 + 1 + + + IOSB3 + Set bit 3 + 3 + 1 + + + IOSB4 + Set bit 4 + 4 + 1 + + + IOSB5 + Set bit 5 + 5 + 1 + + + IOSB6 + Set bit 6 + 6 + 1 + + + IOSB7 + Set bit 7 + 7 + 1 + + + IOSB8 + Set bit 8 + 8 + 1 + + + IOSB9 + Set bit 9 + 9 + 1 + + + IOSB10 + Set bit 10 + 10 + 1 + + + IOSB11 + Set bit 11 + 11 + 1 + + + IOSB12 + Set bit 12 + 12 + 1 + + + IOSB13 + Set bit 13 + 13 + 1 + + + IOSB14 + Set bit 14 + 14 + 1 + + + IOSB15 + Set bit 15 + 15 + 1 + + + IOCB0 + Clear bit 0 + 16 + 1 + + + IOCB1 + Clear bit 1 + 17 + 1 + + + IOCB2 + Clear bit 2 + 18 + 1 + + + IOCB3 + Clear bit 3 + 19 + 1 + + + IOCB4 + Clear bit 4 + 20 + 1 + + + IOCB5 + Clear bit 5 + 21 + 1 + + + IOCB6 + Clear bit 6 + 22 + 1 + + + IOCB7 + Clear bit 7 + 23 + 1 + + + IOCB8 + Clear bit 8 + 24 + 1 + + + IOCB9 + Clear bit 9 + 25 + 1 + + + IOCB10 + Clear bit 10 + 26 + 1 + + + IOCB11 + Clear bit 11 + 27 + 1 + + + IOCB12 + Clear bit 12 + 28 + 1 + + + IOCB13 + Clear bit 13 + 29 + 1 + + + IOCB14 + Clear bit 14 + 30 + 1 + + + IOCB15 + Clear bit 15 + 31 + 1 + + + + + WPR + WPR + Port write protect + register + 0x1C + 0x20 + read-write + 0x00000000 + + + WPEN0 + Write protect enable 0 + 0 + 1 + + + WPEN1 + Write protect enable 1 + 1 + 1 + + + WPEN2 + Write protect enable 2 + 2 + 1 + + + WPEN3 + Write protect enable 3 + 3 + 1 + + + WPEN4 + Write protect enable 4 + 4 + 1 + + + WPEN5 + Write protect enable 5 + 5 + 1 + + + WPEN6 + Write protect enable 6 + 6 + 1 + + + WPEN7 + Write protect enable 7 + 7 + 1 + + + WPEN8 + Write protect enable 8 + 8 + 1 + + + WPEN9 + Write protect enable 9 + 9 + 1 + + + WPEN10 + Write protect enable 10 + 10 + 1 + + + WPEN11 + Write protect enable 11 + 11 + 1 + + + WPEN12 + Write protect enable 12 + 12 + 1 + + + WPEN13 + Write protect enable 13 + 13 + 1 + + + WPEN14 + Write protect enable 14 + 14 + 1 + + + WPEN15 + Write protect enable 15 + 15 + 1 + + + WPSEQ + Write protect sequence + 16 + 1 + + + + + MUXL + MUXL + GPIO muxing function low register + 0x20 + 0x20 + read-write + 0x00000000 + + + MUXL7 + GPIOx pin 7 muxing + 28 + 4 + + + MUXL6 + GPIOx pin 6 muxing + 24 + 4 + + + MUXL5 + GPIOx pin 5 muxing + 20 + 4 + + + MUXL4 + GPIOx pin 4 muxing + 16 + 4 + + + MUXL3 + GPIOx pin 3 muxing + 12 + 4 + + + MUXL2 + GPIOx pin 2 muxing + 8 + 4 + + + MUXL1 + GPIOx pin 1 muxing + 4 + 4 + + + MUXL0 + GPIOx pin 0 muxing + 0 + 4 + + + + + MUXH + MUXH + GPIO muxing function high register + 0x24 + 0x20 + read-write + 0x00000000 + + + MUXH15 + GPIOx pin 15 muxing + 28 + 4 + + + MUXH14 + GPIOx pin 14 muxing + 24 + 4 + + + MUXH13 + GPIOx pin 13 muxing + 20 + 4 + + + MUXH12 + GPIOx pin 12 muxing + 16 + 4 + + + MUXH11 + GPIOx pin 11 muxing + 12 + 4 + + + MUXH10 + GPIOx pin 10 muxing + 8 + 4 + + + MUXH9 + GPIOx pin 9 muxing + 4 + 4 + + + MUXH8 + GPIOx pin 8 muxing + 0 + 4 + + + + + CLR + CLR + GPIO bit reset register + 0x28 + 0x20 + write-only + 0x00000000 + + + IOCB0 + Clear bit 0 + 0 + 1 + + + IOCB1 + Clear bit 1 + 1 + 1 + + + IOCB2 + Clear bit 1 + 2 + 1 + + + IOCB3 + Clear bit 3 + 3 + 1 + + + IOCB4 + Clear bit 4 + 4 + 1 + + + IOCB5 + Clear bit 5 + 5 + 1 + + + IOCB6 + Clear bit 6 + 6 + 1 + + + IOCB7 + Clear bit 7 + 7 + 1 + + + IOCB8 + Clear bit 8 + 8 + 1 + + + IOCB9 + Clear bit 9 + 9 + 1 + + + IOCB10 + Clear bit 10 + 10 + 1 + + + IOCB11 + Clear bit 11 + 11 + 1 + + + IOCB12 + Clear bit 12 + 12 + 1 + + + IOCB13 + Clear bit 13 + 13 + 1 + + + IOCB14 + Clear bit 14 + 14 + 1 + + + IOCB15 + Clear bit 15 + 15 + 1 + + + + + HDRV + HDRV + Huge current driver + 0x3C + 0x20 + read-write + 0x00000000 + + + HDRV0 + Port x driver bit y + 0 + 1 + + + HDRV1 + Port x driver bit y + 1 + 1 + + + HDRV2 + Port x driver bit y + 2 + 1 + + + HDRV3 + Port x driver bit y + 3 + 1 + + + HDRV4 + Port x driver bit y + 4 + 1 + + + HDRV5 + Port x driver bit y + 5 + 1 + + + HDRV6 + Port x driver bit y + 6 + 1 + + + HDRV7 + Port x driver bit y + 7 + 1 + + + HDRV8 + Port x driver bit y + 8 + 1 + + + HDRV9 + Port x driver bit y + 9 + 1 + + + HDRV10 + Port x driver bit y + 10 + 1 + + + HDRV11 + Port x driver bit y + 11 + 1 + + + HDRV12 + Port x driver bit y + 12 + 1 + + + HDRV13 + Port x driver bit y + 13 + 1 + + + HDRV14 + Port x driver bit y + 14 + 1 + + + HDRV15 + Port x driver bit y + 15 + 1 + + + + + + + GPIOB + 0x40020400 + + + GPIOC + 0x40020800 + + + GPIOD + 0x40020C00 + + + GPIOE + 0x40021000 + + + GPIOF + 0x40021400 + + + GPIOG + 0x40021800 + + + GPIOH + 0x40021C00 + + + EXINT + EXINT + EXINT + 0x40013C00 + + 0x0 + 0x400 + registers + + + EXINT0 + EXINT Line0 interrupt + 6 + + + EXINT1 + EXINT Line1 interrupt + 7 + + + EXINT2 + EXINT Line2 interrupt + 8 + + + EXINT3 + EXINT Line3 interrupt + 9 + + + EXINT4 + EXINT Line4 interrupt + 10 + + + EXINT9_5 + EXINT Line[9:5] interrupts + 23 + + + EXINT15_10 + EXINT Line[15:10] interrupts + 40 + + + PVM + PVM interrupt connect to EXINT line16 + 1 + + + ERTCALARM + ERTC Alarm interrupt connect to EXINT line17 + 41 + + + OTGFS1_WKUP + OTGFS1_WKUP interrupt connect to EXINT line18 + 42 + + + EMAC_WKUP + EMAC_WKUP interrupt connect to EXINT line19 + 62 + + + OTGFS2_WKUP + OTGFS2_WKUP interrupt connect to EXINT line20 + 76 + + + TAMPER + Tamper interrupt connect to EXINT line21 + 2 + + + ERTC_WKUP + ERTC Global interrupt connect to EXINT line22 + 3 + + + + INTEN + INTEN + Interrupt enable register + 0x0 + 0x20 + read-write + 0x00000000 + + + INTEN0 + Interrupt enable or disable on line 0 + 0 + 1 + + + INTEN1 + Interrupt enable or disable on line 1 + 1 + 1 + + + INTEN2 + Interrupt enable or disable on line 2 + 2 + 1 + + + INTEN3 + Interrupt enable or disable on line 3 + 3 + 1 + + + INTEN4 + Interrupt enable or disable on line 4 + 4 + 1 + + + INTEN5 + Interrupt enable or disable on line 5 + 5 + 1 + + + INTEN6 + Interrupt enable or disable on line 6 + 6 + 1 + + + INTEN7 + Interrupt enable or disable on line 7 + 7 + 1 + + + INTEN8 + Interrupt enable or disable on line 8 + 8 + 1 + + + INTEN9 + Interrupt enable or disable on line 9 + 9 + 1 + + + INTEN10 + Interrupt enable or disable on line 10 + 10 + 1 + + + INTEN11 + Interrupt enable or disable on line 11 + 11 + 1 + + + INTEN12 + Interrupt enable or disable on line 12 + 12 + 1 + + + INTEN13 + Interrupt enable or disable on line 13 + 13 + 1 + + + INTEN14 + Interrupt enable or disable on line 14 + 14 + 1 + + + INTEN15 + Interrupt enable or disable on line 15 + 15 + 1 + + + INTEN16 + Interrupt enable or disable on line 16 + 16 + 1 + + + INTEN17 + Interrupt enable or disable on line 17 + 17 + 1 + + + INTEN18 + Interrupt enable or disable on line 18 + 18 + 1 + + + INTEN19 + Interrupt enable or disable on line 19 + 19 + 1 + + + INTEN20 + Interrupt enable or disable on line 20 + 20 + 1 + + + INTEN21 + Interrupt enable or disable on line 21 + 21 + 1 + + + INTEN22 + Interrupt enable or disable on line 22 + 22 + 1 + + + + + EVTEN + EVTEN + Event enable register + 0x4 + 0x20 + read-write + 0x00000000 + + + EVTEN0 + Event enable or disable on line 0 + 0 + 1 + + + EVTEN1 + Event enable or disable on line 1 + 1 + 1 + + + EVTEN2 + Event enable or disable on line 2 + 2 + 1 + + + EVTEN3 + Event enable or disable on line 3 + 3 + 1 + + + EVTEN4 + Event enable or disable on line 4 + 4 + 1 + + + EVTEN5 + Event enable or disable on line 5 + 5 + 1 + + + EVTEN6 + Event enable or disable on line 6 + 6 + 1 + + + EVTEN7 + Event enable or disable on line 7 + 7 + 1 + + + EVTEN8 + Event enable or disable on line 8 + 8 + 1 + + + EVTEN9 + Event enable or disable on line 9 + 9 + 1 + + + EVTEN10 + Event enable or disable on line 10 + 10 + 1 + + + EVTEN11 + Event enable or disable on line 11 + 11 + 1 + + + EVTEN12 + Event enable or disable on line 12 + 12 + 1 + + + EVTEN13 + Event enable or disable on line 13 + 13 + 1 + + + EVTEN14 + Event enable or disable on line 14 + 14 + 1 + + + EVTEN15 + Event enable or disable on line 15 + 15 + 1 + + + EVTEN16 + Event enable or disable on line 16 + 16 + 1 + + + EVTEN17 + Event enable or disable on line 17 + 17 + 1 + + + EVTEN18 + Event enable or disable on line 18 + 18 + 1 + + + EVTEN19 + Event enable or disable on line 19 + 19 + 1 + + + EVTEN20 + Event enable or disable on line 20 + 20 + 1 + + + EVTEN21 + Event enable or disable on line 21 + 21 + 1 + + + EVTEN22 + Event enable or disable on line 22 + 22 + 1 + + + + + POLCFG1 + POLCFG1 + Rising polarity configuration register + 0x8 + 0x20 + read-write + 0x00000000 + + + RP0 + Rising polarity configuration bit of line 0 + 0 + 1 + + + RP1 + Rising polarity configuration bit of line 1 + 1 + 1 + + + RP2 + Rising polarity configuration bit of line 2 + 2 + 1 + + + RP3 + Rising polarity configuration bit of line 3 + 3 + 1 + + + RP4 + Rising polarity configuration bit of line 4 + 4 + 1 + + + RP5 + Rising polarity configuration bit of line 5 + 5 + 1 + + + RP6 + Rising polarity configuration bit of linee 6 + 6 + 1 + + + RP7 + Rising polarity configuration bit of line 7 + 7 + 1 + + + RP8 + Rising polarity configuration bit of line 8 + 8 + 1 + + + RP9 + Rising polarity configuration bit of line 9 + 9 + 1 + + + RP10 + Rising polarity configuration bit of line 10 + 10 + 1 + + + RP11 + Rising polarity configuration bit of line 11 + 11 + 1 + + + RP12 + Rising polarity configuration bit of line 12 + 12 + 1 + + + RP13 + Rising polarity configuration bit of line 13 + 13 + 1 + + + RP14 + Rising polarity configuration bit of line 14 + 14 + 1 + + + RP15 + Rising polarity configuration bit of line 15 + 15 + 1 + + + RP16 + Rising polarity configuration bit of line 16 + 16 + 1 + + + RP17 + Rising polarity configuration bit of line 17 + 17 + 1 + + + RP18 + Rising polarity configuration bit of line 18 + 18 + 1 + + + RP19 + Rising polarity configuration bit of line 19 + 19 + 1 + + + RP20 + Rising polarity configuration bit of line 20 + 20 + 1 + + + RP21 + Rising polarity configuration bit of line 21 + 21 + 1 + + + RP22 + Rising polarity configuration bit of line 22 + 22 + 1 + + + + + POLCFG2 + POLCFG2 + Falling polarity configuration register + 0xC + 0x20 + read-write + 0x00000000 + + + FP0 + Falling polarity event configuration bit of line 0 + 0 + 1 + + + FP1 + Falling polarity event configuration bit of line 1 + 1 + 1 + + + FP2 + Falling polarity event configuration bit of line 2 + 2 + 1 + + + FP3 + Falling polarity event configuration bit of line 3 + 3 + 1 + + + FP4 + Falling polarity event configuration bit of line 4 + 4 + 1 + + + FP5 + Falling polarity event configuration bit of line 5 + 5 + 1 + + + FP6 + Falling polarity event configuration bit of line 6 + 6 + 1 + + + FP7 + Falling polarity event configuration bit of line 7 + 7 + 1 + + + FP8 + Falling polarity event configuration bit of line 8 + 8 + 1 + + + FP9 + Falling polarity event configuration bit of line 9 + 9 + 1 + + + FP10 + Falling polarity event configuration bit of line 10 + 10 + 1 + + + FP11 + Falling polarity event configuration bit of line 11 + 11 + 1 + + + FP12 + Falling polarity event configuration bit of line 12 + 12 + 1 + + + FP13 + Falling polarity event configuration bit of line 13 + 13 + 1 + + + FP14 + Falling polarity event configuration bit of line 14 + 14 + 1 + + + FP15 + Falling polarity event configuration bit of line 15 + 15 + 1 + + + FP16 + Falling polarity event configuration bit of line 16 + 16 + 1 + + + FP17 + Falling polarity event configuration bit of line 17 + 17 + 1 + + + FP18 + Falling polarity event configuration bit of line 18 + 18 + 1 + + + FP19 + Falling polarity event configuration bit of line 19 + 19 + 1 + + + FP20 + Falling polarity event configuration bit of line 20 + 20 + 1 + + + FP21 + Falling polarity event configuration bit of line 21 + 21 + 1 + + + FP22 + Falling polarity event configuration bit of line 22 + 22 + 1 + + + + + SWTRG + SWTRG + Software triggle register + 0x10 + 0x20 + read-write + 0x00000000 + + + SWT0 + Software triggle on line 0 + 0 + 1 + + + SWT1 + Software triggle on line 1 + 1 + 1 + + + SWT2 + Software triggle on line 2 + 2 + 1 + + + SWT3 + Software triggle on line 3 + 3 + 1 + + + SWT4 + Software triggle on line 4 + 4 + 1 + + + SWT5 + Software triggle on line 5 + 5 + 1 + + + SWT6 + Software triggle on line 6 + 6 + 1 + + + SWT7 + Software triggle on line 7 + 7 + 1 + + + SWT8 + Software triggle on line 8 + 8 + 1 + + + SWT9 + Software triggle on line 9 + 9 + 1 + + + SWT10 + Software triggle on line 10 + 10 + 1 + + + SWT11 + Software triggle on line 11 + 11 + 1 + + + SWT12 + Software triggle on line 12 + 12 + 1 + + + SWT13 + Software triggle on line 13 + 13 + 1 + + + SWT14 + Software triggle on line 14 + 14 + 1 + + + SWT15 + Software triggle on line 15 + 15 + 1 + + + SWT16 + Software triggle on line 16 + 16 + 1 + + + SWT17 + Software triggle on line 17 + 17 + 1 + + + SWT18 + Software triggle on line 18 + 18 + 1 + + + SWT19 + Software triggle on line 19 + 19 + 1 + + + SWT20 + Software triggle on line 20 + 20 + 1 + + + SWT21 + Software triggle on line 21 + 21 + 1 + + + SWT22 + Software triggle on line 22 + 22 + 1 + + + + + INTSTS + INTSTS + Interrupt status register + 0x14 + 0x20 + read-write + 0x00000000 + + + LINE0 + Line 0 state bit + 0 + 1 + + + LINE1 + Line 1 state bit + 1 + 1 + + + LINE2 + Line 2 state bit + 2 + 1 + + + LINE3 + Line 3 state bit + 3 + 1 + + + LINE4 + Line 4 state bit + 4 + 1 + + + LINE5 + Line 5 state bit + 5 + 1 + + + LINE6 + Line 6 state bit + 6 + 1 + + + LINE7 + Line 7 state bit + 7 + 1 + + + LINE8 + Line 8 state bit + 8 + 1 + + + LINE9 + Line 9 state bit + 9 + 1 + + + LINE10 + Line 10 state bit + 10 + 1 + + + LINE11 + Line 11 state bit + 11 + 1 + + + LINE12 + Line 12 state bit + 12 + 1 + + + LINE13 + Line 13 state bit + 13 + 1 + + + LINE14 + Line 14 state bit + 14 + 1 + + + LINE15 + Line 15 state bit + 15 + 1 + + + LINE16 + Line 16 state bit + 16 + 1 + + + LINE17 + Line 17 state bit + 17 + 1 + + + LINE18 + Line 18 state bit + 18 + 1 + + + LINE19 + Line 19 state bit + 19 + 1 + + + LINE20 + Line 20 state bit + 20 + 1 + + + LINE21 + Line 21 state bit + 21 + 1 + + + LINE22 + Line 22 state bit + 22 + 1 + + + + + + + EDMA + EDMA controller + EDMA + 0x40026000 + + 0x0 + 0x400 + registers + + + EDMA_Stream1 + EDMA Stream1 global interrupt + 11 + + + EDMA_Stream2 + EDMA Stream2 global interrupt + 12 + + + EDMA_Stream3 + EDMA Stream3 global interrupt + 13 + + + EDMA_Stream4 + EDMA Stream4 global interrupt + 14 + + + EDMA_Stream5 + EDMA Stream5 global interrupt + 15 + + + EDMA_Stream6 + EDMA Stream6 global interrupt + 16 + + + EDMA_Stream7 + EDMA Stream7 global interrupt + 17 + + + EDMA_Stream8 + EDMA Stream8 global interrupt + 47 + + + + STS1 + STS1 + Interrupt status register1 + 0x0 + 0x20 + read-only + 0x00000000 + + + FDTF4 + Stream 4 Full data transfer interrupt flag + + 27 + 1 + + + HDTF4 + Stream 4 half data transfer interrupt flag + + 26 + 1 + + + DTERRF4 + Stream 4 transfer error interrupt flag + + 25 + 1 + + + DMERRF4 + Stream 4 direct mode error interrupt flag + + 24 + 1 + + + FERRF4 + Stream 4 FIFO error interrupt flag + + 22 + 1 + + + FDTF3 + Stream 3 Full data transfer interrupt flag + + 21 + 1 + + + HDTF3 + Stream 3 half data transfer interrupt flag + + 20 + 1 + + + DTERRF3 + Stream 3 transfer error interrupt flag + + 19 + 1 + + + DMERRF3 + Stream 3 direct mode error interrupt flag + + 18 + 1 + + + FERRF3 + Stream 3 FIFO error interrupt flag + + 16 + 1 + + + FDTF2 + Stream 2 Full data transfer interrupt flag + + 11 + 1 + + + HDTF2 + Stream 2 half data transfer interrupt flag + + 10 + 1 + + + DTERRF2 + Stream 2 transfer error interrupt flag + + 9 + 1 + + + DMERRF2 + Stream 2 direct mode error interrupt flag + + 8 + 1 + + + FERRF2 + Stream 2 FIFO error interrupt flag + + 6 + 1 + + + FDTF1 + Stream 1 Full data transfer interrupt flag + + 5 + 1 + + + HDTF1 + Stream 1 half data transfer interrupt flag + + 4 + 1 + + + DTERRF1 + Stream 1 transfer error interrupt flag + + 3 + 1 + + + DMERRF1 + Stream 1 direct mode error interrupt flag + + 2 + 1 + + + FERRF1 + Stream 1 FIFO error interrupt flag + + 0 + 1 + + + + + STS2 + STS2 + Interrupt status register2 + 0x4 + 0x20 + read-only + 0x00000000 + + + FDTF8 + Stream 8 full data transfer interrupt flag + + 27 + 1 + + + HDTF8 + Stream 8 half data transfer interrupt flag + + 26 + 1 + + + DTERRF8 + Stream 8 transfer error interrupt flag + + 25 + 1 + + + DMERRF8 + Stream 8 direct mode error interrupt flag + + 24 + 1 + + + FERRF8 + Stream 8 FIFO error interrupt flag + + 22 + 1 + + + FDTF7 + Stream 7 full data transfer interrupt flag + + 21 + 1 + + + HDTF7 + Stream 7 half data transfer interrupt flag + + 20 + 1 + + + DTERRF7 + Stream 7 transfer error interrupt flag + + 19 + 1 + + + DMERRF7 + Stream 7 direct mode error interrupt flag + + 18 + 1 + + + FERRF7 + Stream 7 FIFO error interrupt flag + + 16 + 1 + + + FDTF6 + Stream 6 full data transfer interrupt flag + + 11 + 1 + + + HDTF6 + Stream 6 half data transfer interrupt flag + + 10 + 1 + + + DTERRF6 + Stream 6 transfer error interrupt flag + + 9 + 1 + + + DMERRF6 + Stream 6 direct mode error interrupt flag + + 8 + 1 + + + FERRF6 + Stream 6 FIFO error interrupt flag + + 6 + 1 + + + FDTF5 + Stream 5 full data transfer interrupt flag + + 5 + 1 + + + HDTF5 + Stream 5 half data transfer interrupt flag + + 4 + 1 + + + DTERRF5 + Stream 5 transfer error interrupt flag + + 3 + 1 + + + DMERRF5 + Stream 5 direct mode error interrupt flag + + 2 + 1 + + + FERRF5 + Stream 5 FIFO error interrupt flag + + 0 + 1 + + + + + CLR1 + CLR1 + Interrupt flag clear register1 + + 0x8 + 0x20 + read-write + 0x00000000 + + + FDTFC4 + Stream 4 clear full data transfer complete interrupt flag + + 27 + 1 + + + HDTFC4 + Stream 4 clear half data transfer interrupt flag + + 26 + 1 + + + DTERRFC4 + Stream 4 clear transfer error interrupt flag + + 25 + 1 + + + DMERRFC4 + Stream 4 clear direct mode error interrupt flag + + 24 + 1 + + + FERRFC4 + Stream 4 clear FIFO error interrupt flag + + 22 + 1 + + + FDTFC3 + Stream 3 clear full data transfer complete interrupt flag + + 21 + 1 + + + HDTFC3 + Stream 3 clear half data transfer interrupt flag + + 20 + 1 + + + DTERRFC3 + Stream 3 clear transfer error interrupt flag + + 19 + 1 + + + DMERRFC3 + Stream 3 clear direct mode error interrupt flag + + 18 + 1 + + + FERRFC3 + Stream 3 clear FIFO error interrupt flag + + 16 + 1 + + + FDTFC2 + Stream 2 clear full data transfer complete interrupt flag + + 11 + 1 + + + HDTFC2 + Stream 2 clear half data transfer interrupt flag + + 10 + 1 + + + DTERRFC2 + Stream 2 clear transfer error interrupt flag + + 9 + 1 + + + DMERRFC2 + Stream 2 clear direct mode error interrupt flag + + 8 + 1 + + + FERRFC2 + Stream 2 clear FIFO error interrupt flag + + 6 + 1 + + + FDTFC1 + Stream 1 clear full data transfer complete interrupt flag + + 5 + 1 + + + HDTFC1 + Stream 1 clear half data transfer interrupt flag + + 4 + 1 + + + DTERRFC1 + Stream 1 clear transfer error interrupt flag + + 3 + 1 + + + DMERRFC1 + Stream 1 clear direct mode error interrupt flag + + 2 + 1 + + + FERRFC1 + Stream 1 clear FIFO error interrupt flag + + 0 + 1 + + + + + CLR2 + CLR2 + Interrupt flag clear register2 + + 0xC + 0x20 + read-write + 0x00000000 + + + FDTFC8 + Stream 8 clear full data transfer complete interrupt flag + + 27 + 1 + + + HDTFC8 + Stream 8 clear half data transfer interrupt flag + + 26 + 1 + + + DTERRFC8 + Stream 8 clear transfer error interrupt flag + + 25 + 1 + + + DMERRFC8 + Stream 8 clear direct mode error interrupt flag + + 24 + 1 + + + FERRFC8 + Stream 8 clear FIFO error interrupt flag + + 22 + 1 + + + FDTFC7 + Stream 7 clear full data transfer complete interrupt flag + + 21 + 1 + + + HDTFC7 + Stream 7 clear half data transfer interrupt flag + + 20 + 1 + + + DTERRFC7 + Stream 7 clear transfer error interrupt flag + + 19 + 1 + + + DMERRFC7 + Stream 7 clear direct mode error interrupt flag + + 18 + 1 + + + FERRFC7 + Stream 7 clear FIFO error interrupt flag + + 16 + 1 + + + FDTFC6 + Stream 6 clear full data transfer complete interrupt flag + + 11 + 1 + + + HDTFC6 + Stream 6 clear half data transfer interrupt flag + + 10 + 1 + + + DTERRFC6 + Stream 6 clear transfer error interrupt flag + + 9 + 1 + + + DMERRFC6 + Stream 6 clear direct mode error interrupt flag + + 8 + 1 + + + FERRFC6 + Stream 6 clear FIFO error interrupt flag + + 6 + 1 + + + FDTFC5 + Stream 5 clear full data transfer complete interrupt flag + + 5 + 1 + + + HDTFC5 + Stream 5 clear half data transfer interrupt flag + + 4 + 1 + + + DTERRFC5 + Stream 5 clear transfer error interrupt flag + + 3 + 1 + + + DMERRFC5 + Stream 5 clear direct mode error interrupt flag + + 2 + 1 + + + FERRFC5 + Stream 5 clear FIFO error interrupt flag + + 0 + 1 + + + + + S1CTRL + S1CTRL + stream 1 control + register + 0x10 + 0x20 + read-write + 0x00000000 + + + MBURST + Memory burst transmission + + 23 + 2 + + + PBURST + Peripheral burst transmission + + 21 + 2 + + + CM + Current memory (only in double buffer + mode) + 19 + 1 + + + DMM + Double memory mode + 18 + 1 + + + SPL + Stream priority level + 16 + 2 + + + PINCOS + Peripheral increment offset + size + 15 + 1 + + + MWIDTH + Memory data width + 13 + 2 + + + PWIDTH + Peripheral data width + 11 + 2 + + + MINCM + Memory increment mode + 10 + 1 + + + PINCM + Peripheral increment mode + 9 + 1 + + + LM + Loop mode + 8 + 1 + + + DTD + Data transfer direction + 6 + 2 + + + PFCTRL + Peripheral flow controller + 5 + 1 + + + FDTIEN + Full data transfer complete interrupt + enable + 4 + 1 + + + HDTIEN + Half data transfer interrupt + enable + 3 + 1 + + + DTERRIEN + Transfer error interrupt + enable + 2 + 1 + + + DMERRIEN + Direct mode error interrupt + enable + 1 + 1 + + + SEN + Stream enable / flag stream ready when + read low + 0 + 1 + + + + + S1DTCNT + S1DTCNT + stream 1 number of data + register + 0x14 + 0x20 + read-write + 0x00000000 + + + CNT + Number of data items to + transfer + 0 + 16 + + + + + S1PADDR + S1PADDR + stream 1 peripheral address + register + 0x18 + 0x20 + read-write + 0x00000000 + + + PADDR + Peripheral address + 0 + 32 + + + + + S1M0ADDR + S1M0ADDR + stream 1 memory 0 address + register + 0x1C + 0x20 + read-write + 0x00000000 + + + M0ADDR + Memory 0 address + 0 + 32 + + + + + S1M1ADDR + S1M1ADDR + stream 1 memory 1 address + register + 0x20 + 0x20 + read-write + 0x00000000 + + + M1ADDR + Memory 1 address (used in case of Double + buffer mode) + 0 + 32 + + + + + S1FCTRL + S1FCTRL + stream 1 FIFO control register + 0x24 + 0x20 + 0x00000021 + + + FERRIEN + FIFO error interrupt + enable + 7 + 1 + read-write + + + FSTS + FIFO status + 3 + 3 + read-only + + + FEN + FIFO mode enable + 2 + 1 + read-write + + + FTHSEL + FIFO threshold selection + 0 + 2 + read-write + + + + + S2CTRL + S2CTRL + stream 2 control + register + 0x28 + 0x20 + read-write + 0x00000000 + + + MBURST + Memory burst transmission + + 23 + 2 + + + PBURST + Peripheral burst transmission + + 21 + 2 + + + CM + Current memory (only in double buffer + mode) + 19 + 1 + + + DMM + Double memory mode + 18 + 1 + + + SPL + Stream priority level + 16 + 2 + + + PINCOS + Peripheral increment offset + size + 15 + 1 + + + MWIDTH + Memory data width + 13 + 2 + + + PWIDTH + Peripheral data width + 11 + 2 + + + MINCM + Memory increment mode + 10 + 1 + + + PINCM + Peripheral increment mode + 9 + 1 + + + LM + Loop mode + 8 + 1 + + + DTD + Data transfer direction + 6 + 2 + + + PFCTRL + Peripheral flow controller + 5 + 1 + + + FDTIEN + Full data transfer complete interrupt + enable + 4 + 1 + + + HDTIEN + Half data transfer interrupt + enable + 3 + 1 + + + DTERRIEN + Transfer error interrupt + enable + 2 + 1 + + + DMERRIEN + Direct mode error interrupt + enable + 1 + 1 + + + SEN + Stream enable / flag stream ready when + read low + 0 + 1 + + + + + S2DTCNT + S2DTCNT + stream 2 number of data + register + 0x2C + 0x20 + read-write + 0x00000000 + + + CNT + Number of data items to + transfer + 0 + 16 + + + + + S2PADDR + S2PADDR + stream 2 peripheral address + register + 0x30 + 0x20 + read-write + 0x00000000 + + + PADDR + Peripheral address + 0 + 32 + + + + + S2M0ADDR + S2M0ADDR + stream 2 memory 0 address + register + 0x34 + 0x20 + read-write + 0x00000000 + + + M0ADDR + Memory 0 address + 0 + 32 + + + + + S2M1ADDR + S2M1ADDR + stream 2 memory 1 address + register + 0x38 + 0x20 + read-write + 0x00000000 + + + M1ADDR + Memory 1 address (used in case of Double + buffer mode) + 0 + 32 + + + + + S2FCTRL + S2FCTRL + stream 2 FIFO control register + 0x3C + 0x20 + 0x00000021 + + + FERRIEN + FIFO error interrupt + enable + 7 + 1 + read-write + + + FSTS + FIFO status + 3 + 3 + read-only + + + FEN + FIFO mode enable + 2 + 1 + read-write + + + FTHSEL + FIFO threshold selection + 0 + 2 + read-write + + + + + S3CTRL + S3CTRL + stream 3 control + register + 0x40 + 0x20 + read-write + 0x00000000 + + + MBURST + Memory burst transmission + + 23 + 2 + + + PBURST + Peripheral burst transmission + + 21 + 2 + + + CM + Current memory (only in double buffer + mode) + 19 + 1 + + + DMM + Double memory mode + 18 + 1 + + + SPL + Stream priority level + 16 + 2 + + + PINCOS + Peripheral increment offset + size + 15 + 1 + + + MWIDTH + Memory data width + 13 + 2 + + + PWIDTH + Peripheral data width + 11 + 2 + + + MINCM + Memory increment mode + 10 + 1 + + + PINCM + Peripheral increment mode + 9 + 1 + + + LM + Loop mode + 8 + 1 + + + DTD + Data transfer direction + 6 + 2 + + + PFCTRL + Peripheral flow controller + 5 + 1 + + + FDTIEN + Full data transfer complete interrupt + enable + 4 + 1 + + + HDTIEN + Half data transfer interrupt + enable + 3 + 1 + + + DTERRIEN + Transfer error interrupt + enable + 2 + 1 + + + DMERRIEN + Direct mode error interrupt + enable + 1 + 1 + + + SEN + Stream enable / flag stream ready when + read low + 0 + 1 + + + + + S3DTCNT + S3DTCNT + stream 3 number of data + register + 0x44 + 0x20 + read-write + 0x00000000 + + + CNT + Number of data items to + transfer + 0 + 16 + + + + + S3PADDR + S3PADDR + stream 3 peripheral address + register + 0x48 + 0x20 + read-write + 0x00000000 + + + PADDR + Peripheral address + 0 + 32 + + + + + S3M0ADDR + S3M0ADDR + stream 3 memory 0 address + register + 0x4C + 0x20 + read-write + 0x00000000 + + + M0ADDR + Memory 0 address + 0 + 32 + + + + + S3M1ADDR + S3M1ADDR + stream 3 memory 1 address + register + 0x50 + 0x20 + read-write + 0x00000000 + + + M1ADDR + Memory 1 address (used in case of Double + buffer mode) + 0 + 32 + + + + + S3FCTRL + S3FCTRL + stream 3 FIFO control register + 0x54 + 0x20 + 0x00000021 + + + FERRIEN + FIFO error interrupt + enable + 7 + 1 + read-write + + + FSTS + FIFO status + 3 + 3 + read-only + + + FEN + FIFO mode enable + 2 + 1 + read-write + + + FTHSEL + FIFO threshold selection + 0 + 2 + read-write + + + + + S4CTRL + S4CTRL + stream 4 control + register + 0x58 + 0x20 + read-write + 0x00000000 + + + MBURST + Memory burst transmission + + 23 + 2 + + + PBURST + Peripheral burst transmission + + 21 + 2 + + + CM + Current memory (only in double buffer + mode) + 19 + 1 + + + DMM + Double memory mode + 18 + 1 + + + SPL + Stream priority level + 16 + 2 + + + PINCOS + Peripheral increment offset + size + 15 + 1 + + + MWIDTH + Memory data width + 13 + 2 + + + PWIDTH + Peripheral data width + 11 + 2 + + + MINCM + Memory increment mode + 10 + 1 + + + PINCM + Peripheral increment mode + 9 + 1 + + + LM + Loop mode + 8 + 1 + + + DTD + Data transfer direction + 6 + 2 + + + PFCTRL + Peripheral flow controller + 5 + 1 + + + FDTIEN + Full data transfer complete interrupt + enable + 4 + 1 + + + HDTIEN + Half data transfer interrupt + enable + 3 + 1 + + + DTERRIEN + Transfer error interrupt + enable + 2 + 1 + + + DMERRIEN + Direct mode error interrupt + enable + 1 + 1 + + + SEN + Stream enable / flag stream ready when + read low + 0 + 1 + + + + + S4DTCNT + S4DTCNT + stream 4 number of data + register + 0x5C + 0x20 + read-write + 0x00000000 + + + CNT + Number of data items to + transfer + 0 + 16 + + + + + S4PADDR + S4PADDR + stream 4 peripheral address + register + 0x60 + 0x20 + read-write + 0x00000000 + + + PADDR + Peripheral address + 0 + 32 + + + + + S4M0ADDR + S4M0ADDR + stream 4 memory 0 address + register + 0x64 + 0x20 + read-write + 0x00000000 + + + M0ADDR + Memory 0 address + 0 + 32 + + + + + S4M1ADDR + S4M1ADDR + stream 4 memory 1 address + register + 0x68 + 0x20 + read-write + 0x00000000 + + + M1ADDR + Memory 1 address (used in case of Double + buffer mode) + 0 + 32 + + + + + S4FCTRL + S4FCTRL + stream 4 FIFO control register + 0x6C + 0x20 + 0x00000021 + + + FERRIEN + FIFO error interrupt + enable + 7 + 1 + read-write + + + FSTS + FIFO status + 3 + 3 + read-only + + + FEN + FIFO mode enable + 2 + 1 + read-write + + + FTHSEL + FIFO threshold selection + 0 + 2 + read-write + + + + + S5CTRL + S5CTRL + stream 5 control + register + 0x70 + 0x20 + read-write + 0x00000000 + + + MBURST + Memory burst transmission + + 23 + 2 + + + PBURST + Peripheral burst transmission + + 21 + 2 + + + CM + Current memory (only in double buffer + mode) + 19 + 1 + + + DMM + Double memory mode + 18 + 1 + + + SPL + Stream priority level + 16 + 2 + + + PINCOS + Peripheral increment offset + size + 15 + 1 + + + MWIDTH + Memory data width + 13 + 2 + + + PWIDTH + Peripheral data width + 11 + 2 + + + MINCM + Memory increment mode + 10 + 1 + + + PINCM + Peripheral increment mode + 9 + 1 + + + LM + Loop mode + 8 + 1 + + + DTD + Data transfer direction + 6 + 2 + + + PFCTRL + Peripheral flow controller + 5 + 1 + + + FDTIEN + Full data transfer complete interrupt + enable + 4 + 1 + + + HDTIEN + Half data transfer interrupt + enable + 3 + 1 + + + DTERRIEN + Transfer error interrupt + enable + 2 + 1 + + + DMERRIEN + Direct mode error interrupt + enable + 1 + 1 + + + SEN + Stream enable / flag stream ready when + read low + 0 + 1 + + + + + S5DTCNT + S5DTCNT + stream 5 number of data + register + 0x74 + 0x20 + read-write + 0x00000000 + + + CNT + Number of data items to + transfer + 0 + 16 + + + + + S5PADDR + S5PADDR + stream 5 peripheral address + register + 0x78 + 0x20 + read-write + 0x00000000 + + + PADDR + Peripheral address + 0 + 32 + + + + + S5M0ADDR + S5M0ADDR + stream 5 memory 0 address + register + 0x7C + 0x20 + read-write + 0x00000000 + + + M0ADDR + Memory 0 address + 0 + 32 + + + + + S5M1ADDR + S5M1ADDR + stream 5 memory 1 address + register + 0x80 + 0x20 + read-write + 0x00000000 + + + M1ADDR + Memory 1 address (used in case of Double + buffer mode) + 0 + 32 + + + + + S5FCTRL + S5FCTRL + stream 5 FIFO control register + 0x84 + 0x20 + 0x00000021 + + + FERRIEN + FIFO error interrupt + enable + 7 + 1 + read-write + + + FSTS + FIFO status + 3 + 3 + read-only + + + FEN + FIFO mode enable + 2 + 1 + read-write + + + FTHSEL + FIFO threshold selection + 0 + 2 + read-write + + + + + S6CTRL + S6CTRL + stream 6 control + register + 0x88 + 0x20 + read-write + 0x00000000 + + + MBURST + Memory burst transmission + + 23 + 2 + + + PBURST + Peripheral burst transmission + + 21 + 2 + + + CM + Current memory (only in double buffer + mode) + 19 + 1 + + + DMM + Double memory mode + 18 + 1 + + + SPL + Stream priority level + 16 + 2 + + + PINCOS + Peripheral increment offset + size + 15 + 1 + + + MWIDTH + Memory data width + 13 + 2 + + + PWIDTH + Peripheral data width + 11 + 2 + + + MINCM + Memory increment mode + 10 + 1 + + + PINCM + Peripheral increment mode + 9 + 1 + + + LM + Loop mode + 8 + 1 + + + DTD + Data transfer direction + 6 + 2 + + + PFCTRL + Peripheral flow controller + 5 + 1 + + + FDTIEN + Full data transfer complete interrupt + enable + 4 + 1 + + + HDTIEN + Half data transfer interrupt + enable + 3 + 1 + + + DTERRIEN + Transfer error interrupt + enable + 2 + 1 + + + DMERRIEN + Direct mode error interrupt + enable + 1 + 1 + + + SEN + Stream enable / flag stream ready when + read low + 0 + 1 + + + + + S6DTCNT + S6DTCNT + stream 6 number of data + register + 0x8C + 0x20 + read-write + 0x00000000 + + + CNT + Number of data items to + transfer + 0 + 16 + + + + + S6PADDR + S6PADDR + stream 6 peripheral address + register + 0x90 + 0x20 + read-write + 0x00000000 + + + PADDR + Peripheral address + 0 + 32 + + + + + S6M0ADDR + S6M0ADDR + stream 6 memory 0 address + register + 0x94 + 0x20 + read-write + 0x00000000 + + + M0ADDR + Memory 0 address + 0 + 32 + + + + + S6M1ADDR + S6M1ADDR + stream 6 memory 1 address + register + 0x98 + 0x20 + read-write + 0x00000000 + + + M1ADDR + Memory 1 address (used in case of Double + buffer mode) + 0 + 32 + + + + + S6FCTRL + S6FCTRL + stream 6 FIFO control register + 0x9C + 0x20 + 0x00000021 + + + FERRIEN + FIFO error interrupt + enable + 7 + 1 + read-write + + + FSTS + FIFO status + 3 + 3 + read-only + + + FEN + FIFO mode enable + 2 + 1 + read-write + + + FTHSEL + FIFO threshold selection + 0 + 2 + read-write + + + + + S7CTRL + S7CTRL + stream 7 control + register + 0xA0 + 0x20 + read-write + 0x00000000 + + + MBURST + Memory burst transmission + + 23 + 2 + + + PBURST + Peripheral burst transmission + + 21 + 2 + + + CM + Current memory (only in double buffer + mode) + 19 + 1 + + + DMM + Double memory mode + 18 + 1 + + + SPL + Stream priority level + 16 + 2 + + + PINCOS + Peripheral increment offset + size + 15 + 1 + + + MWIDTH + Memory data width + 13 + 2 + + + PWIDTH + Peripheral data width + 11 + 2 + + + MINCM + Memory increment mode + 10 + 1 + + + PINCM + Peripheral increment mode + 9 + 1 + + + LM + Loop mode + 8 + 1 + + + DTD + Data transfer direction + 6 + 2 + + + PFCTRL + Peripheral flow controller + 5 + 1 + + + FDTIEN + Full data transfer complete interrupt + enable + 4 + 1 + + + HDTIEN + Half data transfer interrupt + enable + 3 + 1 + + + DTERRIEN + Transfer error interrupt + enable + 2 + 1 + + + DMERRIEN + Direct mode error interrupt + enable + 1 + 1 + + + SEN + Stream enable / flag stream ready when + read low + 0 + 1 + + + + + S7DTCNT + S7DTCNT + stream 7 number of data + register + 0xA4 + 0x20 + read-write + 0x00000000 + + + CNT + Number of data items to + transfer + 0 + 16 + + + + + S7PADDR + S7PADDR + stream 7 peripheral address + register + 0xA8 + 0x20 + read-write + 0x00000000 + + + PADDR + Peripheral address + 0 + 32 + + + + + S7M0ADDR + S7M0ADDR + stream 7 memory 0 address + register + 0xAC + 0x20 + read-write + 0x00000000 + + + M0ADDR + Memory 0 address + 0 + 32 + + + + + S7M1ADDR + S7M1ADDR + stream 7 memory 1 address + register + 0xB0 + 0x20 + read-write + 0x00000000 + + + M1ADDR + Memory 1 address (used in case of Double + buffer mode) + 0 + 32 + + + + + S7FCTRL + S7FCTRL + stream 7 FIFO control register + 0xB4 + 0x20 + 0x00000021 + + + FERRIEN + FIFO error interrupt + enable + 7 + 1 + read-write + + + FSTS + FIFO status + 3 + 3 + read-only + + + FEN + FIFO mode enable + 2 + 1 + read-write + + + FTHSEL + FIFO threshold selection + 0 + 2 + read-write + + + + + S8CTRL + S8CTRL + stream 8 control + register + 0xB8 + 0x20 + read-write + 0x00000000 + + + MBURST + Memory burst transmission + + 23 + 2 + + + PBURST + Peripheral burst transmission + + 21 + 2 + + + CM + Current memory (only in double buffer + mode) + 19 + 1 + + + DMM + Double memory mode + 18 + 1 + + + SPL + Stream priority level + 16 + 2 + + + PINCOS + Peripheral increment offset + size + 15 + 1 + + + MWIDTH + Memory data width + 13 + 2 + + + PWIDTH + Peripheral data width + 11 + 2 + + + MINCM + Memory increment mode + 10 + 1 + + + PINCM + Peripheral increment mode + 9 + 1 + + + LM + Loop mode + 8 + 1 + + + DTD + Data transfer direction + 6 + 2 + + + PFCTRL + Peripheral flow controller + 5 + 1 + + + FDTIEN + Full data transfer complete interrupt + enable + 4 + 1 + + + HDTIEN + Half data transfer interrupt + enable + 3 + 1 + + + DTERRIEN + Transfer error interrupt + enable + 2 + 1 + + + DMERRIEN + Direct mode error interrupt + enable + 1 + 1 + + + SEN + Stream enable / flag stream ready when + read low + 0 + 1 + + + + + S8DTCNT + S8DTCNT + stream 8 number of data + register + 0xBC + 0x20 + read-write + 0x00000000 + + + CNT + Number of data items to + transfer + 0 + 16 + + + + + S8PADDR + S8PADDR + stream 8 peripheral address + register + 0xC0 + 0x20 + read-write + 0x00000000 + + + PADDR + Peripheral address + 0 + 32 + + + + + S8M0ADDR + S8M0ADDR + stream 8 memory 0 address + register + 0xC4 + 0x20 + read-write + 0x00000000 + + + M0ADDR + Memory 0 address + 0 + 32 + + + + + S8M1ADDR + S8M1ADDR + stream 8 memory 1 address + register + 0xC8 + 0x20 + read-write + 0x00000000 + + + M1ADDR + Memory 1 address (used in case of Double + buffer mode) + 0 + 32 + + + + + S8FCTRL + S8FCTRL + stream 8 FIFO control register + 0xCC + 0x20 + 0x00000021 + + + FERRIEN + FIFO error interrupt + enable + 7 + 1 + read-write + + + FSTS + FIFO status + 3 + 3 + read-only + + + FEN + FIFO mode enable + 2 + 1 + read-write + + + FTHSEL + FIFO threshold selection + 0 + 2 + read-write + + + + + LLCTRL + LLCTRL + DMA Link List Control Register + 0xD0 + 0x20 + 0x00000000 + + + S1LLEN + Stream 1 link list enable + 0 + 1 + read-write + + + S2LLEN + Stream 2 link list enable + 1 + 1 + read-write + + + S3LLEN + Stream 3 link list enable + 2 + 1 + read-write + + + S4LLEN + Stream 4 link list enable + 3 + 1 + read-write + + + S5LLEN + Stream 5 link list enable + 4 + 1 + read-write + + + S6LLEN + Stream 6 link list enable + 5 + 1 + read-write + + + S7LLEN + Stream 7 link list enable + 6 + 1 + read-write + + + S8LLEN + Stream 8 link list enable + 7 + 1 + read-write + + + + + S1LLP + S1LLP + Stream 1 Link List Pointer + 0xD4 + 0x20 + 0x00000000 + + + LLP + Link list pointer + 0 + 32 + read-write + + + + + S2LLP + S2LLP + Stream 2 Link List Pointer + 0xD8 + 0x20 + 0x00000000 + + + LLP + Link list pointer + 0 + 32 + read-write + + + + + S3LLP + S3LLP + Stream 3 Link List Pointer + 0xDC + 0x20 + 0x00000000 + + + LLP + Link list pointer + 0 + 32 + read-write + + + + + S4LLP + S4LLP + Stream 4 Link List Pointer + 0xE0 + 0x20 + 0x00000000 + + + LLP + Link list pointer + 0 + 32 + read-write + + + + + S5LLP + S5LLP + Stream 5 Link List Pointer + 0xE4 + 0x20 + 0x00000000 + + + LLP + Link list pointer + 0 + 32 + read-write + + + + + S6LLP + S6LLP + Stream 6 Link List Pointer + 0xE8 + 0x20 + 0x00000000 + + + LLP + Link list pointer + 0 + 32 + read-write + + + + + S7LLP + S7LLP + Stream 7 Link List Pointer + 0xEC + 0x20 + 0x00000000 + + + LLP + Link list pointer + 0 + 32 + read-write + + + + + S8LLP + S8LLP + Stream 8 Link List Pointer + 0xF0 + 0x20 + 0x00000000 + + + LLP + Link list pointer + 0 + 32 + read-write + + + + + S2DCTRL + S2DCTRL + EDMA 2D Transfer Control Register + 0xF4 + 0x20 + 0x00000000 + + + S1_2DEN + Stream 1 2D transfer enable + 0 + 1 + read-write + + + S2_2DEN + Stream 2 2D transfer enable + 1 + 1 + read-write + + + S3_2DEN + Stream 3 2D transfer enable + 2 + 1 + read-write + + + S4_2DEN + Stream 4 2D transfer enable + 3 + 1 + read-write + + + S5_2DEN + Stream 5 2D transfer enable + 4 + 1 + read-write + + + S6_2DEN + Stream 6 2D transfer enable + 5 + 1 + read-write + + + S7_2DEN + Stream 7 2D transfer enable + 6 + 1 + read-write + + + S8_2DEN + Stream 8 2D transfer enable + 7 + 1 + read-write + + + + + S1_2DCNT + S1_2DCNT + Stream 1 2D Transfer Count + 0xF8 + 0x20 + 0x00000000 + + + XCONUT + X dimension transfer count + 0 + 16 + read-write + + + YCONUT + Y dimension transfer count + 16 + 16 + read-write + + + + + S1_STRIDE + S1_STRIDE + Stream 1 2D Transfer Stride + 0xFC + 0x20 + 0x00000000 + + + SRCSTD + Source stride + 0 + 16 + read-write + + + DSTSTD + Destination stride + 16 + 16 + read-write + + + + + S2_2DCNT + S2_2DCNT + Stream 2 2D Transfer Count + 0x100 + 0x20 + 0x00000000 + + + XCONUT + X dimension transfer count + 0 + 16 + read-write + + + YCONUT + Y dimension transfer count + 16 + 16 + read-write + + + + + S2_STRIDE + S2_STRIDE + Stream 2 2D Transfer Stride + 0x104 + 0x20 + 0x00000000 + + + SRCSTD + Source stride + 0 + 16 + read-write + + + DSTSTD + Destination stride + 16 + 16 + read-write + + + + + S3_2DCNT + S3_2DCNT + Stream 3 2D Transfer Count + 0x108 + 0x20 + 0x00000000 + + + XCONUT + X dimension transfer count + 0 + 16 + read-write + + + YCONUT + Y dimension transfer count + 16 + 16 + read-write + + + + + S3_STRIDE + S3_STRIDE + Stream 3 2D Transfer Stride + 0x10C + 0x20 + 0x00000000 + + + SRCSTD + Source stride + 0 + 16 + read-write + + + DSTSTD + Destination stride + 16 + 16 + read-write + + + + + S4_2DCNT + S4_2DCNT + Stream 4 2D Transfer Count + 0x110 + 0x20 + 0x00000000 + + + XCONUT + X dimension transfer count + 0 + 16 + read-write + + + YCONUT + Y dimension transfer count + 16 + 16 + read-write + + + + + S4_STRIDE + S4_STRIDE + Stream 4 2D Transfer Stride + 0x114 + 0x20 + 0x00000000 + + + SRCSTD + Source stride + 0 + 16 + read-write + + + DSTSTD + Destination stride + 16 + 16 + read-write + + + + + S5_2DCNT + S5_2DCNT + Stream 5 2D Transfer Count + 0x118 + 0x20 + 0x00000000 + + + XCONUT + X dimension transfer count + 0 + 16 + read-write + + + YCONUT + Y dimension transfer count + 16 + 16 + read-write + + + + + S5_STRIDE + S5_STRIDE + Stream 5 2D Transfer Stride + 0x11C + 0x20 + 0x00000000 + + + SRCSTD + Source stride + 0 + 16 + read-write + + + DSTSTD + Destination stride + 16 + 16 + read-write + + + + + S6_2DCNT + S6_2DCNT + Stream 6 2D Transfer Count + 0x120 + 0x20 + 0x00000000 + + + XCONUT + X dimension transfer count + 0 + 16 + read-write + + + YCONUT + Y dimension transfer count + 16 + 16 + read-write + + + + + S6_STRIDE + S6_STRIDE + Stream 6 2D Transfer Stride + 0x124 + 0x20 + 0x00000000 + + + SRCSTD + Source stride + 0 + 16 + read-write + + + DSTSTD + Destination stride + 16 + 16 + read-write + + + + + S7_2DCNT + S7_2DCNT + Stream 7 2D Transfer Count + 0x128 + 0x20 + 0x00000000 + + + XCONUT + X dimension transfer count + 0 + 16 + read-write + + + YCONUT + Y dimension transfer count + 16 + 16 + read-write + + + + + S7_STRIDE + S7_STRIDE + Stream 7 2D Transfer Stride + 0x12C + 0x20 + 0x00000000 + + + SRCSTD + Source stride + 0 + 16 + read-write + + + DSTSTD + Destination stride + 16 + 16 + read-write + + + + + S8_2DCNT + S8_2DCNT + Stream 8 2D Transfer Count + 0x130 + 0x20 + 0x00000000 + + + XCONUT + X dimension transfer count + 0 + 16 + read-write + + + YCONUT + Y dimension transfer count + 16 + 16 + read-write + + + + + S8_STRIDE + S8_STRIDE + Stream 8 2D Transfer Stride + 0x134 + 0x20 + 0x00000000 + + + SRCSTD + Source stride + 0 + 16 + read-write + + + DSTSTD + Destination stride + 16 + 16 + read-write + + + + + SYNCEN + SYNCEN + Sync Enable + 0x138 + 0x20 + 0x00000000 + + + S1SYNC + Stream 1 sync enable + 0 + 1 + read-write + + + S2SYNC + Stream 2 sync enable + 1 + 1 + read-write + + + S3SYNC + Stream 3 sync enable + 2 + 1 + read-write + + + S4SYNC + Stream 4 sync enable + 3 + 1 + read-write + + + S5SYNC + Stream 5 sync enable + 4 + 1 + read-write + + + S6SYNC + Stream 6 sync enable + 5 + 1 + read-write + + + S7SYNC + Stream 7 sync enable + 6 + 1 + read-write + + + S8SYNC + Stream 8 sync enable + 7 + 1 + read-write + + + + + MUXSEL + MUXSEL + EDMA MUX Table Selection + 0x13C + 0x20 + 0x00000000 + + + TBL_SEL + Multiplexer Table Select + 0 + 1 + read-write + + + + + MUXS1CTRL + MUXS1CTRL + Stream 1 Configuration Register + 0x140 + 0x20 + 0x00000000 + + + REQSEL + DMA request select + 0 + 7 + read-write + + + SYNCOVIEN + Synchronization overrun interrupt enable + 8 + 1 + read-write + + + EVTGEN + Event generation enable + 9 + 1 + read-write + + + SYNCEN + Synchroniztion enable + 16 + 1 + read-write + + + SYNCPOL + Synchronization polarity + 17 + 2 + read-write + + + REQCNT + Number of DMA requests + 19 + 5 + read-write + + + SYNCSEL + Synchronization select + 24 + 5 + read-write + + + + + MUXS2CTRL + MUXS2CTRL + Stream 2 Configuration Register + 0x144 + 0x20 + 0x00000000 + + + REQSEL + DMA request select + 0 + 7 + read-write + + + SYNCOVIEN + Synchronization overrun interrupt enable + 8 + 1 + read-write + + + EVTGEN + Event generation enable + 9 + 1 + read-write + + + SYNCEN + Synchroniztion enable + 16 + 1 + read-write + + + SYNCPOL + Synchronization polarity + 17 + 2 + read-write + + + REQCNT + Number of DMA requests + 19 + 5 + read-write + + + SYNCSEL + Synchronization select + 24 + 5 + read-write + + + + + MUXS3CTRL + MUXS3CTRL + Stream 3 Configuration Register + 0x148 + 0x20 + 0x00000000 + + + REQSEL + DMA request select + 0 + 7 + read-write + + + SYNCOVIEN + Synchronization overrun interrupt enable + 8 + 1 + read-write + + + EVTGEN + Event generation enable + 9 + 1 + read-write + + + SYNCEN + Synchroniztion enable + 16 + 1 + read-write + + + SYNCPOL + Synchronization polarity + 17 + 2 + read-write + + + REQCNT + Number of DMA requests + 19 + 5 + read-write + + + SYNCSEL + Synchronization select + 24 + 5 + read-write + + + + + MUXS4CTRL + MUXS4CTRL + Stream 4 Configuration Register + 0x14C + 0x20 + 0x00000000 + + + REQSEL + DMA request select + 0 + 7 + read-write + + + SYNCOVIEN + Synchronization overrun interrupt enable + 8 + 1 + read-write + + + EVTGEN + Event generation enable + 9 + 1 + read-write + + + SYNCEN + Synchroniztion enable + 16 + 1 + read-write + + + SYNCPOL + Synchronization polarity + 17 + 2 + read-write + + + REQCNT + Number of DMA requests + 19 + 5 + read-write + + + SYNCSEL + Synchronization select + 24 + 5 + read-write + + + + + MUXS5CTRL + MUXS5CTRL + Stream x Configuration Register + 0x150 + 0x20 + 0x00000000 + + + REQSEL + DMA request select + 0 + 7 + read-write + + + SYNCOVIEN + Synchronization overrun interrupt enable + 8 + 1 + read-write + + + EVTGEN + Event generation enable + 9 + 1 + read-write + + + SYNCEN + Synchroniztion enable + 16 + 1 + read-write + + + SYNCPOL + Synchronization polarity + 17 + 2 + read-write + + + REQCNT + Number of DMA requests + 19 + 5 + read-write + + + SYNCSEL + Synchronization select + 24 + 5 + read-write + + + + + MUXS6CTRL + MUXS6CTRL + Stream 6 Configuration Register + 0x154 + 0x20 + 0x00000000 + + + REQSEL + DMA request select + 0 + 7 + read-write + + + SYNCOVIEN + Synchronization overrun interrupt enable + 8 + 1 + read-write + + + EVTGEN + Event generation enable + 9 + 1 + read-write + + + SYNCEN + Synchroniztion enable + 16 + 1 + read-write + + + SYNCPOL + Synchronization polarity + 17 + 2 + read-write + + + REQCNT + Number of DMA requests + 19 + 5 + read-write + + + SYNCSEL + Synchronization select + 24 + 5 + read-write + + + + + MUXS7CTRL + MUXS7CTRL + Stream 7 Configuration Register + 0x158 + 0x20 + 0x00000000 + + + REQSEL + DMA request select + 0 + 7 + read-write + + + SYNCOVIEN + Synchronization overrun interrupt enable + 8 + 1 + read-write + + + EVTGEN + Event generation enable + 9 + 1 + read-write + + + SYNCEN + Synchroniztion enable + 16 + 1 + read-write + + + SYNCPOL + Synchronization polarity + 17 + 2 + read-write + + + REQCNT + Number of DMA requests + 19 + 5 + read-write + + + SYNCSEL + Synchronization select + 24 + 5 + read-write + + + + + MUXS8CTRL + MUXS8CTRL + Stream 8 Configuration Register + 0x15C + 0x20 + 0x00000000 + + + REQSEL + DMA request select + 0 + 7 + read-write + + + SYNCOVIEN + Synchronization overrun interrupt enable + 8 + 1 + read-write + + + EVTGEN + Event generation enable + 9 + 1 + read-write + + + SYNCEN + Synchroniztion enable + 16 + 1 + read-write + + + SYNCPOL + Synchronization polarity + 17 + 2 + read-write + + + REQCNT + Number of DMA requests + 19 + 5 + read-write + + + SYNCSEL + Synchronization select + 24 + 5 + read-write + + + + + MUXG1CTRL + MUXG1CTRL + Generator 1 Configuration Register + 0x160 + 0x20 + 0x00000000 + + + SIGSEL + Signal select + 0 + 5 + read-write + + + TRGOVIEN + Trigger overrun interrupt enable + 8 + 1 + read-write + + + GEN + DMA request generator enable + 16 + 1 + read-write + + + GPOL + DMA request generator trigger polarity + 17 + 2 + read-write + + + GREQCNT + Number of DMA requests to be generated + 19 + 5 + read-write + + + + + MUXG2CTRL + MUXG2CTRL + Generator 2 Configuration Register + 0x164 + 0x20 + 0x00000000 + + + SIGSEL + Signal select + 0 + 5 + read-write + + + TRGOVIEN + Trigger overrun interrupt enable + 8 + 1 + read-write + + + GEN + DMA request generator enable + 16 + 1 + read-write + + + GPOL + DMA request generator trigger polarity + 17 + 2 + read-write + + + GREQCNT + Number of DMA requests to be generated + 19 + 5 + read-write + + + + + MUXG3CTRL + MUXG3CTRL + Generator 3 Configuration Register + 0x168 + 0x20 + 0x00000000 + + + SIGSEL + Signal select + 0 + 5 + read-write + + + TRGOVIEN + Trigger overrun interrupt enable + 8 + 1 + read-write + + + GEN + DMA request generator enable + 16 + 1 + read-write + + + GPOL + DMA request generator trigger polarity + 17 + 2 + read-write + + + GREQCNT + Number of DMA requests to be generated + 19 + 5 + read-write + + + + + MUXG4CTRL + MUXG4CTRL + Generator 4 Configuration Register + 0x16C + 0x20 + 0x00000000 + + + SIGSEL + Signal select + 0 + 5 + read-write + + + TRGOVIEN + Trigger overrun interrupt enable + 8 + 1 + read-write + + + GEN + DMA request generator enable + 16 + 1 + read-write + + + GPOL + DMA request generator trigger polarity + 17 + 2 + read-write + + + GREQCNT + Number of DMA requests to be generated + 19 + 5 + read-write + + + + + MUXSYNCSTS + MUXSYNCSTS + Channel Interrupt Status Register + 0x170 + 0x20 + 0x00000000 + + + SYNCOVF1 + Synchronizaton overrun interrupt flag + 0 + 1 + read-only + + + SYNCOVF2 + Synchronizaton overrun interrupt flag + 1 + 1 + read-only + + + SYNCOVF3 + Synchronizaton overrun interrupt flag + 2 + 1 + read-only + + + SYNCOVF4 + Synchronizaton overrun interrupt flag + 3 + 1 + read-only + + + SYNCOVF5 + Synchronizaton overrun interrupt flag + 4 + 1 + read-only + + + SYNCOVF6 + Synchronizaton overrun interrupt flag + 5 + 1 + read-only + + + SYNCOVF7 + Synchronizaton overrun interrupt flag + 6 + 1 + read-only + + + SYNCOVF8 + Synchronizaton overrun interrupt flag + 7 + 1 + read-only + + + + + MUXSYNCCLR + MUXSYNCCLR + Channel Interrupt Clear Flag Register + 0x174 + 0x20 + 0x00000000 + + + SYNCOVFC1 + Clear synchronizaton overrun interrupt flag + 0 + 1 + read-write + + + SYNCOVFC2 + Clear synchronizaton overrun interrupt flag + 1 + 1 + read-write + + + SYNCOVFC3 + Clear synchronizaton overrun interrupt flag + 2 + 1 + read-write + + + SYNCOVFC4 + Clear synchronizaton overrun interrupt flag + 3 + 1 + read-write + + + SYNCOVFC5 + Clear synchronizaton overrun interrupt flag + 4 + 1 + read-write + + + SYNCOVFC6 + Clear synchronizaton overrun interrupt flag + 5 + 1 + read-write + + + SYNCOVFC7 + Clear synchronizaton overrun interrupt flag + 6 + 1 + read-write + + + SYNCOVFC8 + Clear synchronizaton overrun interrupt flag + 7 + 1 + read-write + + + + + MUXGSTS + MUXGSTS + Generator Interrupt Status Register + 0x178 + 0x20 + 0x00000000 + + + TRGOVF1 + Trigger overrun interrupt flag + 0 + 1 + read-write + + + TRGOVF2 + Trigger overrun interrupt flag + 1 + 1 + read-write + + + TRGOVF3 + Trigger overrun interrupt flag + 2 + 1 + read-write + + + TRGOVF4 + Trigger overrun interrupt flag + 3 + 1 + read-write + + + + + MUXGCLR + MUXGCLR + Generator Interrupt Clear Flag Register + 0x17C + 0x20 + 0x00000000 + + + TRGOVFC1 + Clear trigger overrun interrupt flag + 0 + 1 + read-write + + + + TRGOVFC2 + Clear trigger overrun interrupt flag + 1 + 1 + read-write + + + TRGOVFC3 + Clear trigger overrun interrupt flag + 2 + 1 + read-write + + + TRGOVFC4 + Clear trigger overrun interrupt flag + 3 + 1 + read-write + + + + + + + DMA1 + DMA controller + DMA + 0x40026400 + + 0x0 + 0x200 + registers + + + DMA1_Channel1 + DMA1 Channel1 global interrupt + 56 + + + DMA1_Channel2 + DMA1 Channel2 global interrupt + 57 + + + DMA1_Channel3 + DMA1 Channel3 global interrupt + 58 + + + DMA1_Channel4 + DMA1 Channel4 global interrupt + 59 + + + DMA1_Channel5 + DMA1 Channel5 global interrupt + 60 + + + DMA1_Channel6 + DMA1 Channel6 global interrupt + 68 + + + DMA1_Channel7 + DMA1 Channel7 global interrupt + 69 + + + + STS + STS + DMA interrupt status register + (DMA_STS) + 0x0 + 0x20 + read-only + 0x00000000 + + + GF1 + Channel 1 Global event flag + 0 + 1 + + + FDTF1 + Channel 1 full data transfer event flag + 1 + 1 + + + HDTF1 + Channel 1 half data transfer event flag + 2 + 1 + + + DTERRF1 + Channel 1 data transfer error event flag + 3 + 1 + + + GF2 + Channel 2 Global event flag + 4 + 1 + + + FDTF2 + Channel 2 full data transfer event flag + 5 + 1 + + + HDTF2 + Channel 2 half data transfer event flag + 6 + 1 + + + DTERRF2 + Channel 2 data transfer error event flag + 7 + 1 + + + GF3 + Channel 3 Global event flag + 8 + 1 + + + FDTF3 + Channel 3 full data transfer event flag + 9 + 1 + + + HDTF3 + Channel 3 half data transfer event flag + 10 + 1 + + + DTERRF3 + Channel 3 data transfer error event flag + 11 + 1 + + + GF4 + Channel 4 Global event flag + 12 + 1 + + + FDTF4 + Channel 4 full data transfer event flag + 13 + 1 + + + HDTF4 + Channel 4 half data transfer event flag + 14 + 1 + + + DTERRF4 + Channel 4 data transfer error event flag + 15 + 1 + + + GF5 + Channel 5 Global event flag + 16 + 1 + + + FDTF5 + Channel 5 full data transfer event flag + 17 + 1 + + + HDTF5 + Channel 5 half data transfer event flag + 18 + 1 + + + DTERRF5 + Channel 5 data transfer error event flag + 19 + 1 + + + GF6 + Channel 6 Global event flag + 20 + 1 + + + FDTF6 + Channel 6 full data transfer event flag + 21 + 1 + + + HDTF6 + Channel 6 half data transfer event flag + 22 + 1 + + + DTERRF6 + Channel 6 data transfer error event flag + 23 + 1 + + + GF7 + Channel 7 Global event flag + 24 + 1 + + + FDTF7 + Channel 7 full data transfer event flag + 25 + 1 + + + HDTF7 + Channel 7 half data transfer event flag + 26 + 1 + + + DTERRF7 + Channel 7 data transfer error event flag + 27 + 1 + + + + + CLR + CLR + DMA interrupt flag clear register + (DMA_CLR) + 0x4 + 0x20 + read-write + 0x00000000 + + + GFC1 + Channel 1 Global flag clear + 0 + 1 + + + GFC2 + Channel 2 Global flag clear + 4 + 1 + + + GFC3 + Channel 3 Global flag clear + 8 + 1 + + + GFC4 + Channel 4 Global flag clear + 12 + 1 + + + GFC5 + Channel 5 Global flag clear + 16 + 1 + + + GFC6 + Channel 6 Global flag clear + 20 + 1 + + + GFC7 + Channel 7 Global flag clear + 24 + 1 + + + FDTFC1 + Channel 1 full data transfer flag clear + 1 + 1 + + + FDTFC2 + Channel 2 full data transfer flag clear + 5 + 1 + + + FDTFC3 + Channel 3 full data transfer flag clear + 9 + 1 + + + FDTFC4 + Channel 4 full data transfer flag clear + 13 + 1 + + + FDTFC5 + Channel 5 full data transfer flag clear + 17 + 1 + + + FDTFC6 + Channel 6 full data transfer flag clear + 21 + 1 + + + FDTFC7 + Channel 7 full data transfer flag clear + 25 + 1 + + + HDTFC1 + Channel 1 half data transfer flag clear + 2 + 1 + + + HDTFC2 + Channel 2 half data transfer flag clear + 6 + 1 + + + HDTFC3 + Channel 3 half data transfer flag clear + 10 + 1 + + + HDTFC4 + Channel 4 half data transfer flag clear + 14 + 1 + + + HDTFC5 + Channel 5 half data transfer flag clear + 18 + 1 + + + HDTFC6 + Channel 6 half data transfer flag clear + 22 + 1 + + + HDTFC7 + Channel 7 half data transfer flag clear + 26 + 1 + + + DTERRFC1 + Channel 1 data transfer error flag clear + 3 + 1 + + + DTERRFC2 + Channel 2 data transfer error flag clear + 7 + 1 + + + DTERRFC3 + Channel 3 data transfer error flag clear + 11 + 1 + + + DTERRFC4 + Channel 4 data transfer error flag clear + 15 + 1 + + + DTERRFC5 + Channel 5 data transfer error flag clear + 19 + 1 + + + DTERRFC6 + Channel 6 data transfer error flag clear + 23 + 1 + + + DTERRFC7 + Channel 7 data transfer error flag clear + 27 + 1 + + + + + C1CTRL + C1CTRL + DMA channel configuration register(DMA_C1CTRL) + 0x8 + 0x20 + read-write + 0x00000000 + + + CHEN + Channel enable + 0 + 1 + + + FDTIEN + Transfer complete interrupt enable + 1 + 1 + + + HDTIEN + Half transfer interrupt enable + 2 + 1 + + + DTERRIEN + Transfer error interrupt enable + 3 + 1 + + + DTD + Data transfer direction + 4 + 1 + + + LM + Loop mode + 5 + 1 + + + PINCM + Peripheral increment mode + 6 + 1 + + + MINCM + Memory increment mode + 7 + 1 + + + PWIDTH + Peripheral data bit width + 8 + 2 + + + MWIDTH + Memory data bit width + 10 + 2 + + + CHPL + Channel Priority level + 12 + 2 + + + M2M + Memory to memory mode + 14 + 1 + + + + + C1DTCNT + C1DTCNT + DMA channel 1 number of data to transfer register + 0xC + 0x20 + read-write + 0x00000000 + + + CNT + Number of data to transfer + 0 + 16 + + + + + C1PADDR + C1PADDR + DMA channel 1 peripheral base address register + 0x10 + 0x20 + read-write + 0x00000000 + + + PADDR + Peripheral address + 0 + 32 + + + + + C1MADDR + C1MADDR + DMA channel 1 memory base address register + 0x14 + 0x20 + read-write + 0x00000000 + + + MADDR + Memory address + 0 + 32 + + + + + C2CTRL + C2CTRL + DMA channel configuration register (DMA_C2CTRL) + 0x1C + 0x20 + read-write + 0x00000000 + + + CHEN + Channel enable + 0 + 1 + + + FDTIEN + Transfer complete interrupt enable + 1 + 1 + + + HDTIEN + Half transfer interrupt enable + 2 + 1 + + + DTERRIEN + Transfer error interrupt enable + 3 + 1 + + + DTD + Data transfer direction + 4 + 1 + + + LM + Loop mode + 5 + 1 + + + PINCM + Peripheral increment mode + 6 + 1 + + + MINCM + Memory increment mode + 7 + 1 + + + PWIDTH + Peripheral data bit width + 8 + 2 + + + MWIDTH + Memory data bit width + 10 + 2 + + + CHPL + Channel Priority level + 12 + 2 + + + M2M + Memory to memory mode + 14 + 1 + + + + + C2DTCNT + C2DTCNT + DMA channel 2 number of data to transferregister + 0x20 + 0x20 + read-write + 0x00000000 + + + CNT + Number of data to transfer + 0 + 16 + + + + + C2PADDR + C2PADDR + DMA channel 2 peripheral base address register + 0x24 + 0x20 + read-write + 0x00000000 + + + PADDR + Peripheral address + 0 + 32 + + + + + C2MADDR + C2MADDR + DMA channel 2 memory base address register + 0x28 + 0x20 + read-write + 0x00000000 + + + MADDR + Memory address + 0 + 32 + + + + + C3CTRL + C3CTRL + DMA channel configuration register (DMA_C3CTRL) + 0x30 + 0x20 + read-write + 0x00000000 + + + CHEN + Channel enable + 0 + 1 + + + FDTIEN + Transfer complete interrupt enable + 1 + 1 + + + HDTIEN + Half transfer interrupt enable + 2 + 1 + + + DTERRIEN + Transfer error interrupt enable + 3 + 1 + + + DTD + Data transfer direction + 4 + 1 + + + LM + Loop mode + 5 + 1 + + + PINCM + Peripheral increment mode + 6 + 1 + + + MINCM + Memory increment mode + 7 + 1 + + + PWIDTH + Peripheral data bit width + 8 + 2 + + + MWIDTH + Memory data bit width + 10 + 2 + + + CHPL + Channel Priority level + 12 + 2 + + + M2M + Memory to memory mode + 14 + 1 + + + + + C3DTCNT + C3DTCNT + DMA channel 3 number of data to transfer register + 0x34 + 0x20 + read-write + 0x00000000 + + + CNT + Number of data to transfer + 0 + 16 + + + + + C3PADDR + C3PADDR + DMA channel 3 peripheral base address register + 0x38 + 0x20 + read-write + 0x00000000 + + + PADDR + Peripheral address + 0 + 32 + + + + + C3MADDR + C3MADDR + DMA channel 3 memory base address register + 0x3C + 0x20 + read-write + 0x00000000 + + + MADDR + Memory address + 0 + 32 + + + + + C4CTRL + C4CTRL + DMA channel configuration register (DMA_C4CTRL) + 0x44 + 0x20 + read-write + 0x00000000 + + + CHEN + Channel enable + 0 + 1 + + + FDTIEN + Transfer complete interrupt enable + 1 + 1 + + + HDTIEN + Half transfer interrupt enable + 2 + 1 + + + DTERRIEN + Transfer error interrupt enable + 3 + 1 + + + DTD + Data transfer direction + 4 + 1 + + + LM + Loop mode + 5 + 1 + + + PINCM + Peripheral increment mode + 6 + 1 + + + MINCM + Memory increment mode + 7 + 1 + + + PWIDTH + Peripheral data bit width + 8 + 2 + + + MWIDTH + Memory data bit width + 10 + 2 + + + CHPL + Channel Priority level + 12 + 2 + + + M2M + Memory to memory mode + 14 + 1 + + + + + C4DTCNT + C4DTCNT + DMA channel 4 number of data to transfer register + 0x48 + 0x20 + read-write + 0x00000000 + + + CNT + Number of data to transfer + 0 + 16 + + + + + C4PADDR + C4PADDR + DMA channel 4 peripheral base address register + 0x4C + 0x20 + read-write + 0x00000000 + + + PADDR + Peripheral address + 0 + 32 + + + + + C4MADDR + C4MADDR + DMA channel 4 memory base address register + 0x50 + 0x20 + read-write + 0x00000000 + + + MADDR + Memory address + 0 + 32 + + + + + C5CTRL + C5CTRL + DMA channel configuration register (DMA_C5CTRL) + 0x58 + 0x20 + read-write + 0x00000000 + + + CHEN + Channel enable + 0 + 1 + + + FDTIEN + Transfer complete interrupt enable + 1 + 1 + + + HDTIEN + Half transfer interrupt enable + 2 + 1 + + + DTERRIEN + Transfer error interrupt enable + 3 + 1 + + + DTD + Data transfer direction + 4 + 1 + + + LM + Loop mode + 5 + 1 + + + PINCM + Peripheral increment mode + 6 + 1 + + + MINCM + Memory increment mode + 7 + 1 + + + PWIDTH + Peripheral data bit width + 8 + 2 + + + MWIDTH + Memory data bit width + 10 + 2 + + + CHPL + Channel Priority level + 12 + 2 + + + M2M + Memory to memory mode + 14 + 1 + + + + + C5DTCNT + C5DTCNT + DMA channel 5 number of data to transfer register + 0x5C + 0x20 + read-write + 0x00000000 + + + CNT + Number of data to transfer + 0 + 16 + + + + + C5PADDR + C5PADDR + DMA channel 5 peripheral base address register + 0x60 + 0x20 + read-write + 0x00000000 + + + PADDR + Peripheral address + 0 + 32 + + + + + C5MADDR + C5MADDR + DMA channel 5 memory base address register + 0x64 + 0x20 + read-write + 0x00000000 + + + MADDR + Memory address + 0 + 32 + + + + + C6CTRL + C6CTRL + DMA channel configuration register(DMA_C6CTRL) + 0x6C + 0x20 + read-write + 0x00000000 + + + CHEN + Channel enable + 0 + 1 + + + FDTIEN + Transfer complete interrupt enable + 1 + 1 + + + HDTIEN + Half transfer interrupt enable + 2 + 1 + + + DTERRIEN + Transfer error interrupt enable + 3 + 1 + + + DTD + Data transfer direction + 4 + 1 + + + LM + Loop mode + 5 + 1 + + + PINCM + Peripheral increment mode + 6 + 1 + + + MINCM + Memory increment mode + 7 + 1 + + + PWIDTH + Peripheral data bit width + 8 + 2 + + + MWIDTH + Memory data bit width + 10 + 2 + + + CHPL + Channel Priority level + 12 + 2 + + + M2M + Memory to memory mode + 14 + 1 + + + + + C6DTCNT + C6DTCNT + DMA channel 6 number of data to transfer register + 0x70 + 0x20 + read-write + 0x00000000 + + + CNT + Number of data to transfer + 0 + 16 + + + + + C6PADDR + C6PADDR + DMA channel 6 peripheral address base register + 0x74 + 0x20 + read-write + 0x00000000 + + + PADDR + Peripheral address + 0 + 32 + + + + + C6MADDR + C6MADDR + DMA channel 6 memory address base register + 0x78 + 0x20 + read-write + 0x00000000 + + + MADDR + Memory address + 0 + 32 + + + + + C7CTRL + C7CTRL + DMA channel configuration register(DMA_C7CTRL) + 0x80 + 0x20 + read-write + 0x00000000 + + + CHEN + Channel enable + 0 + 1 + + + FDTIEN + Transfer complete interrupt enable + 1 + 1 + + + HDTIEN + Half transfer interrupt enable + 2 + 1 + + + DTERRIEN + Transfer error interrupt enable + 3 + 1 + + + DTD + Data transfer direction + 4 + 1 + + + LM + Loop mode + 5 + 1 + + + PINCM + Peripheral increment mode + 6 + 1 + + + MINCM + Memory increment mode + 7 + 1 + + + PWIDTH + Peripheral data bit width + 8 + 2 + + + MWIDTH + Memory data bit width + 10 + 2 + + + CHPL + Channel Priority level + 12 + 2 + + + M2M + Memory to memory mode + 14 + 1 + + + + + C7DTCNT + C7DTCNT + DMA channel 7 number of data to transfer register + 0x84 + 0x20 + read-write + 0x00000000 + + + CNT + Number of data to transfer + 0 + 16 + + + + + C7PADDR + C7PADDR + DMA channel 7 peripheral base address register + 0x88 + 0x20 + read-write + 0x00000000 + + + PADDR + Peripheral address + 0 + 32 + + + + + C7MADDR + C7MADDR + DMA channel 7 memory base address register + 0x8C + 0x20 + read-write + 0x00000000 + + + MADDR + Memory address + 0 + 32 + + + + + DMA_MUXSEL + DMA_MUXSEL + DMAMUX Table Selection + 0x100 + 0x20 + 0x00000000 + + + TBL_SEL + Multiplexer Table Select + 0 + 1 + read-write + + + + + MUXC1CTRL + MUXC1CTRL + Channel 1 Configuration Register + 0x104 + 0x20 + 0x00000000 + + + REQSEL + DMA request select + 0 + 7 + read-write + + + SYNCOVIEN + Synchronization overrun interrupt enable + 8 + 1 + read-write + + + EVTGEN + Event generation enable + 9 + 1 + read-write + + + SYNCEN + Synchroniztion enable + 16 + 1 + read-write + + + SYNCPOL + Synchronization polarity + 17 + 2 + read-write + + + REQCNT + Number of DMA requests + 19 + 5 + read-write + + + SYNCSEL + Synchronization Identification + 24 + 5 + read-write + + + + + MUXC2CTRL + MUXC2CTRL + Channel 2 Configuration Register + 0x108 + 0x20 + 0x00000000 + + + REQSEL + DMA request select + 0 + 7 + read-write + + + SYNCOVIEN + Synchronization overrun interrupt enable + 8 + 1 + read-write + + + EVTGEN + Event generation enable + 9 + 1 + read-write + + + SYNCEN + Synchroniztion enable + 16 + 1 + read-write + + + SYNCPOL + Synchronization polarity + 17 + 2 + read-write + + + REQCNT + Number of DMA requests + 19 + 5 + read-write + + + SYNCSEL + Synchronization Identification + 24 + 5 + read-write + + + + + MUXC3CTRL + MUXC3CTRL + Channel 3 Configuration Register + 0x10C + 0x20 + 0x00000000 + + + REQSEL + DMA request select + 0 + 7 + read-write + + + SYNCOVIEN + Synchronization overrun interrupt enable + 8 + 1 + read-write + + + EVTGEN + Event generation enable + 9 + 1 + read-write + + + SYNCEN + Synchroniztion enable + 16 + 1 + read-write + + + SYNCPOL + Synchronization polarity + 17 + 2 + read-write + + + REQCNT + Number of DMA requests + 19 + 5 + read-write + + + SYNCSEL + Synchronization Identification + 24 + 5 + read-write + + + + + MUXC4CTRL + MUXC4CTRL + Channel 4 Configuration Register + 0x110 + 0x20 + 0x00000000 + + + REQSEL + DMA request select + 0 + 7 + read-write + + + SYNCOVIEN + Synchronization overrun interrupt enable + 8 + 1 + read-write + + + EVTGEN + Event generation enable + 9 + 1 + read-write + + + SYNCEN + Synchroniztion enable + 16 + 1 + read-write + + + SYNCPOL + Synchronization polarity + 17 + 2 + read-write + + + REQCNT + Number of DMA requests + 19 + 5 + read-write + + + SYNCSEL + Synchronization Identification + 24 + 5 + read-write + + + + + MUXC5CTRL + MUXC5CTRL + Channel 5 Configuration Register + 0x114 + 0x20 + 0x00000000 + + + REQSEL + DMA request select + 0 + 7 + read-write + + + SYNCOVIEN + Synchronization overrun interrupt enable + 8 + 1 + read-write + + + EVTGEN + Event generation enable + 9 + 1 + read-write + + + SYNCEN + Synchroniztion enable + 16 + 1 + read-write + + + SYNCPOL + Synchronization polarity + 17 + 2 + read-write + + + REQCNT + Number of DMA requests + 19 + 5 + read-write + + + SYNCSEL + Synchronization Identification + 24 + 5 + read-write + + + + + MUXC6CTRL + MUXC6CTRL + Channel 6 Configuration Register + 0x118 + 0x20 + 0x00000000 + + + REQSEL + DMA request select + 0 + 7 + read-write + + + SYNCOVIEN + Synchronization overrun interrupt enable + 8 + 1 + read-write + + + EVTGEN + Event generation enable + 9 + 1 + read-write + + + SYNCEN + Synchroniztion enable + 16 + 1 + read-write + + + SYNCPOL + Synchronization polarity + 17 + 2 + read-write + + + REQCNT + Number of DMA requests + 19 + 5 + read-write + + + SYNCSEL + Synchronization Identification + 24 + 5 + read-write + + + + + MUXC7CTRL + MUXC7CTRL + Channel 7 Configuration Register + 0x11C + 0x20 + 0x00000000 + + + REQSEL + DMA request select + 0 + 7 + read-write + + + SYNCOVIEN + Synchronization overrun interrupt enable + 8 + 1 + read-write + + + EVTGEN + Event generation enable + 9 + 1 + read-write + + + SYNCEN + Synchroniztion enable + 16 + 1 + read-write + + + SYNCPOL + Synchronization polarity + 17 + 2 + read-write + + + REQCNT + Number of DMA requests + 19 + 5 + read-write + + + SYNCSEL + Synchronization Identification + 24 + 5 + read-write + + + + + MUXG1CTRL + MUXG1CTRL + Generator 1 Configuration Register + 0x120 + 0x20 + 0x00000000 + + + SIGSEL + Signal select + 0 + 5 + read-write + + + TRGOVIEN + Trigger overrun interrupt enable + 8 + 1 + read-write + + + GEN + DMA request generator enable + 16 + 1 + read-write + + + GPOL + DMA request generator trigger polarity + 17 + 2 + read-write + + + GREQCNT + Number of DMA requests to be generated + 19 + 5 + read-write + + + + + MUXG2CTRL + MUXG2CTRL + Generator 2 Configuration Register + 0x124 + 0x20 + 0x00000000 + + + SIGSEL + Signal select + 0 + 5 + read-write + + + TRGOVIEN + Trigger overrun interrupt enable + 8 + 1 + read-write + + + GEN + DMA request generator enable + 16 + 1 + read-write + + + GPOL + DMA request generator trigger polarity + 17 + 2 + read-write + + + GREQCNT + Number of DMA requests to be generated + 19 + 5 + read-write + + + + + MUXG3CTRL + MUXG3CTRL + Generator 3 Configuration Register + 0x128 + 0x20 + 0x00000000 + + + SIGSEL + Signal select + 0 + 5 + read-write + + + TRGOVIEN + Trigger overrun interrupt enable + 8 + 1 + read-write + + + GEN + DMA request generator enable + 16 + 1 + read-write + + + GPOL + DMA request generator trigger polarity + 17 + 2 + read-write + + + GREQCNT + Number of DMA requests to be generated + 19 + 5 + read-write + + + + + MUXG4CTRL + MUXG4CTRL + Generator 4 Configuration Register + 0x12C + 0x20 + 0x00000000 + + + SIGSEL + Signal select + 0 + 5 + read-write + + + TRGOVIEN + Trigger overrun interrupt enable + 8 + 1 + read-write + + + GEN + DMA request generator enable + 16 + 1 + read-write + + + GPOL + DMA request generator trigger polarity + 17 + 2 + read-write + + + GREQCNT + Number of DMA requests to be generated + 19 + 5 + read-write + + + + + MUXSYNCSTS + MUXSYNCSTS + Channel Interrupt Status Register + 0x130 + 0x20 + 0x00000000 + + + SYNCOVF1 + Synchronizaton overrun interrupt flag + 0 + 1 + read-only + + + SYNCOVF2 + Synchronizaton overrun interrupt flag + 1 + 1 + read-only + + + SYNCOVF3 + Synchronizaton overrun interrupt flag + 2 + 1 + read-only + + + SYNCOVF4 + Synchronizaton overrun interrupt flag + 3 + 1 + read-only + + + SYNCOVF5 + Synchronizaton overrun interrupt flag + 4 + 1 + read-only + + + SYNCOVF6 + Synchronizaton overrun interrupt flag + 5 + 1 + read-only + + + SYNCOVF7 + Synchronizaton overrun interrupt flag + 6 + 1 + read-only + + + + + MUXSYNCCLR + MUXSYNCCLR + Channel Interrupt Clear Flag Register + 0x134 + 0x20 + 0x00000000 + + + SYNCOVFC1 + Clear synchronizaton overrun interrupt flag + 0 + 1 + read-write + + + SYNCOVFC2 + Clear synchronizaton overrun interrupt flag + 1 + 1 + read-write + + + SYNCOVFC3 + Clear synchronizaton overrun interrupt flag + 2 + 1 + read-write + + + SYNCOVFC4 + Clear synchronizaton overrun interrupt flag + 3 + 1 + read-write + + + SYNCOVFC5 + Clear synchronizaton overrun interrupt flag + 4 + 1 + read-write + + + SYNCOVFC6 + Clear synchronizaton overrun interrupt flag + 5 + 1 + read-write + + + SYNCOVFC7 + Clear synchronizaton overrun interrupt flag + 6 + 1 + read-write + + + + + MUXGSTS + MUXGSTS + Generator Interrupt Status Register + 0x138 + 0x20 + 0x00000000 + + + TRGOVF1 + Trigger overrun interrupt flag + 0 + 1 + read-write + + + TRGOVF2 + Trigger overrun interrupt flag + 1 + 1 + read-write + + + TRGOVF3 + Trigger overrun interrupt flag + 2 + 1 + read-write + + + TRGOVF4 + Trigger overrun interrupt flag + 3 + 1 + read-write + + + + + MUXGCLR + MUXGCLR + Generator Interrupt Clear Flag Register + 0x13C + 0x20 + 0x00000000 + + + TRGOVFC1 + Clear trigger overrun interrupt flag + 0 + 1 + read-write + + + TRGOVFC2 + Clear trigger overrun interrupt flag + 1 + 1 + read-write + + + TRGOVFC3 + Clear trigger overrun interrupt flag + 2 + 1 + read-write + + + TRGOVFC4 + Clear trigger overrun interrupt flag + 3 + 1 + read-write + + + + + + + DMA2 + 0x40026600 + + + SDIO1 + Secure digital input/output + interface + SDIO + 0x4002C400 + + 0x0 + 0x400 + registers + + + SDIO1 + SDIO1 global interrupt + 49 + + + + PWRCTRL + PWRCTRL + Bits 1:0 = PWRCTRL: Power supply control + bits + 0x0 + 0x20 + read-write + 0x00000000 + + + PS + Power switch + 0 + 2 + + + + + CLKCTRL + CLKCTRL + SD clock control register + (SDIO_CLKCTRL) + 0x4 + 0x20 + read-write + 0x00000000 + + + CLKDIV + Clock division + 0 + 8 + + + CLKOEN + Clock output enable + 8 + 1 + + + PWRSVEN + Power saving mode enable + 9 + 1 + + + BYPSEN + Clock divider bypass enable + bit + 10 + 1 + + + BUSWS + Bus width selection + 11 + 2 + + + CLKEDS + SDIO_CK edge selection bit + 13 + 1 + + + HFCEN + Hardware flow control enable + 14 + 1 + + + CLKDIV98 + Clock divide factor bit9 and bit8 + 15 + 2 + + + + + ARGU + ARGU + Bits 31:0 = : Command argument + 0x8 + 0x20 + read-write + 0x00000000 + + + ARGU + Command argument + 0 + 32 + + + + + CMDCTRL + CMDCTRL + SDIO command control register + (SDIO_CMDCTRL) + 0xC + 0x20 + read-write + 0x00000000 + + + CMDIDX + CMDIDX + 0 + 6 + + + RSPWT + Wait for response + 6 + 2 + + + INTWT + CCSM wait for interrupt + 8 + 1 + + + PNDWT + CCSM wait for end of transfer + 9 + 1 + + + CCSMEN + Command channel state machine + 10 + 1 + + + IOSUSP + SD I/O suspend command + 11 + 1 + + + + + RSPCMD + RSPCMD + SDIO command register + 0x10 + 0x20 + read-only + 0x00000000 + + + RSPCMD + RSPCMD + 0 + 6 + + + + + RSP1 + RSP1 + Bits 31:0 = CARDSTATUS1 + 0x14 + 0x20 + read-only + 0x00000000 + + + CARDSTS1 + CARDSTATUS1 + 0 + 32 + + + + + RSP2 + RSP2 + Bits 31:0 = CARDSTATUS2 + 0x18 + 0x20 + read-only + 0x00000000 + + + CARDSTS2 + CARDSTATUS2 + 0 + 32 + + + + + RSP3 + RSP3 + Bits 31:0 = CARDSTATUS3 + 0x1C + 0x20 + read-only + 0x00000000 + + + CARDSTS2 + CARDSTATUS3 + 0 + 32 + + + + + RSP4 + RSP4 + Bits 31:0 = CARDSTATUS4 + 0x20 + 0x20 + read-only + 0x00000000 + + + CARDSTS2 + CARDSTATUS4 + 0 + 32 + + + + + DTTMR + DTTMR + Bits 31:0 = TIMEOUT: Data timeout + period + 0x24 + 0x20 + read-write + 0x00000000 + + + TIMEOUT + Data timeout period + 0 + 32 + + + + + DTLEN + DTLEN + Bits 24:0 = DATALENGTH: Data length + value + 0x28 + 0x20 + read-write + 0x00000000 + + + DTLEN + Data length value + 0 + 25 + + + + + DTCTRL + DTCTRL + SDIO data control register + (SDIO_DCTRL) + 0x2C + 0x20 + read-write + 0x00000000 + + + TFREN + DTEN + 0 + 1 + + + TFRDIR + DTDIR + 1 + 1 + + + TFRMODE + DTMODE + 2 + 1 + + + DMAEN + DMAEN + 3 + 1 + + + BLKSIZE + DBLOCKSIZE + 4 + 4 + + + RDWTSTART + PWSTART + 8 + 1 + + + RDWTSTOP + PWSTOP + 9 + 1 + + + RDWTMODE + RWMOD + 10 + 1 + + + IOEN + SD I/O function enable + 11 + 1 + + + + + DTCNT + DTCNT + Bits 24:0 = DATACOUNT: Data count + value + 0x30 + 0x20 + read-only + 0x00000000 + + + CNT + Data count value + 0 + 25 + + + + + STS + STS + SDIO status register + (SDIO_STA) + 0x34 + 0x20 + read-only + 0x00000000 + + + CMDFAIL + Command crc fail + 0 + 1 + + + DTFAIL + Data crc fail + 1 + 1 + + + CMDTIMEOUT + Command timeout + 2 + 1 + + + DTTIMEOUT + Data timeout + 3 + 1 + + + TXERRU + Tx under run error + 4 + 1 + + + RXERRO + Rx over run error + 5 + 1 + + + CMDRSPCMPL + Command response complete + 6 + 1 + + + CMDCMPL + Command sent + 7 + 1 + + + DTCMPL + Data sent + 8 + 1 + + + SBITERR + Start bit error + 9 + 1 + + + DTBLKCMPL + Data block sent + 10 + 1 + + + DOCMD + Command transfer in progress + 11 + 1 + + + DOTX + Data transmit in progress + 12 + 1 + + + DORX + Data receive in progress + 13 + 1 + + + TXBUFH + Tx buffer half empty + 14 + 1 + + + RXBUFH + Rx buffer half empty + 15 + 1 + + + TXBUFF + Tx buffer full + 16 + 1 + + + RXBUFF + Rx buffer full + 17 + 1 + + + TXBUFE + Tx buffer empty + 18 + 1 + + + RXBUFE + Rx buffer empty + 19 + 1 + + + TXBUF + Tx data vaild + 20 + 1 + + + RXBUF + Rx data vaild + 21 + 1 + + + IOIF + SD I/O interrupt + 22 + 1 + + + + + INTCLR + INTCLR + SDIO interrupt clear register + (SDIO_INTCLR) + 0x38 + 0x20 + read-write + 0x00000000 + + + CMDFAIL + Command crc fail flag clear + 0 + 1 + + + DTFAIL + Data crc fail flag clear + 1 + 1 + + + CMDTIMEOUT + Command timeout flag clear + 2 + 1 + + + DTTIMEOUT + Data timeout flag clear + 3 + 1 + + + TXERRU + Tx under run error flag clear + 4 + 1 + + + RXERRU + Rx over run error flag clear + 5 + 1 + + + CMDRSPCMPL + Command response complete flag clear + 6 + 1 + + + CMDCMPL + Command sent flag clear + 7 + 1 + + + DTCMPL + Data sent flag clear + 8 + 1 + + + SBITERR + Start bit error flag clear + 9 + 1 + + + DTBLKCMPL + Data block sent clear + 10 + 1 + + + IOIF + SD I/O interrupt flag clear + 22 + 1 + + + + + INTEN + INTEN + SDIO mask register (SDIO_MASK) + 0x3C + 0x20 + read-write + 0x00000000 + + + CMDFAILIEN + Command crc fail interrupt enable + 0 + 1 + + + DTFAILIEN + Data crc fail interrupt enable + 1 + 1 + + + CMDTIMEOUTIEN + Command timeout interrupt enable + 2 + 1 + + + DTTIMEOUTIEN + Data timeout interrupt enable + 3 + 1 + + + TXERRUIEN + Tx under run interrupt enable + 4 + 1 + + + RXERRUIEN + Rx over run interrupt enable + 5 + 1 + + + CMDRSPCMPLIEN + Command response complete interrupt enable + 6 + 1 + + + CMDCMPLIEN + Command sent complete interrupt enable + 7 + 1 + + + DTCMPLIEN + Data sent complete interrupt enable + 8 + 1 + + + SBITERRIEN + Start bit error interrupt enable + 9 + 1 + + + DTBLKCMPLIEN + Data block sent complete interrupt enable + 10 + 1 + + + DOCMDIEN + Command acting interrupt enable + 11 + 1 + + + DOTXIEN + Data transmit acting interrupt enable + 12 + 1 + + + DORXIEN + Data receive acting interrupt enable + 13 + 1 + + + TXBUFHIEN + Tx buffer half empty interrupt enable + 14 + 1 + + + RXBUFHIEN + Rx buffer half empty interrupt enable + 15 + 1 + + + TXBUFFIEN + Tx buffer full interrupt enable + 16 + 1 + + + RXBUFFIEN + Rx buffer full interrupt enable + 17 + 1 + + + TXBUFEIEN + Tx buffer empty interrupt enable + 18 + 1 + + + RXBUFEIEN + Rx buffer empty interrupt enable + 19 + 1 + + + TXBUFIEN + Tx buffer data vaild interrupt enable + 20 + 1 + + + RXBUFIEN + Rx buffer data vaild interrupt enable + 21 + 1 + + + IOIFIEN + SD I/O interrupt enable + 22 + 1 + + + + + BUFCNT + BUFCNT + Bits 23:0 = BUFCOUNT: Remaining number of + words to be written to or read from the + FIFO + 0x48 + 0x20 + read-only + 0x00000000 + + + CNT + FIF0COUNT + 0 + 24 + + + + + BUF + BUF + bits 31:0 = Buffer Data: Receive and transmit + buffer data + 0x80 + 0x20 + read-write + 0x00000000 + + + DT + Buffer data + 0 + 32 + + + + + + + SDIO2 + 0x50061000 + + SDIO2 + SDIO2 global interrupt + 102 + + + + ERTC + Real-time clock + ERTC + 0x40002800 + + 0x0 + 0x400 + registers + + + + TIME + TIME + time register + 0x0 + 0x20 + read-write + 0x00000000 + + + AMPM + AM/PM notation + 22 + 1 + + + HT + Hour tens + 20 + 2 + + + HU + Hour units + 16 + 4 + + + MT + Minute tens + 12 + 3 + + + MU + Minute units + 8 + 4 + + + ST + Second tens + 4 + 3 + + + SU + Second units + 0 + 4 + + + + + DATE + DATE + date register + 0x4 + 0x20 + read-write + 0x00002101 + + + YT + Year tens + 20 + 4 + + + YU + Year units + 16 + 4 + + + WK + Week + 13 + 3 + + + MT + Month tens + 12 + 1 + + + MU + Month units + 8 + 4 + + + DT + Date tens + 4 + 2 + + + DU + Date units + 0 + 4 + + + + + CTRL + CTRL + control register + 0x8 + 0x20 + read-write + 0x00000000 + + + CALOEN + Calibration output enable + 23 + 1 + + + OUTSEL + Output source selection + 21 + 2 + + + OUTP + Output polarity + 20 + 1 + + + CALOSEL + Calibration output selection + 19 + 1 + + + BPR + Battery power domain data register + 18 + 1 + + + DEC1H + Decrease 1 hour + 17 + 1 + + + ADD1H + Add 1 hour + 16 + 1 + + + TSIEN + Timestamp interrupt enable + 15 + 1 + + + WATIEN + Wakeup timer interrupt enable + 14 + 1 + + + ALBIEN + Alarm B interrupt enable + 13 + 1 + + + ALAIEN + Alarm A interrupt enable + 12 + 1 + + + TSEN + Timestamp enable + 11 + 1 + + + WATEN + Wakeup timer enable + 10 + 1 + + + ALBEN + Alarm B enable + 9 + 1 + + + ALAEN + Alarm A enable + 8 + 1 + + + CCALEN + Coarse calibration enable + 7 + 1 + + + HM + Hour mode + 6 + 1 + + + DREN + Date/time register direct read enable + 5 + 1 + + + RCDEN + Reference clock detection enable + 4 + 1 + + + TSEDG + Timestamp trigger edge + 3 + 1 + + + WATCLK + Wakeup timer clock selection + 0 + 3 + + + + + STS + STS + initialization and status + register + 0xC + 0x20 + 0x00000007 + + + ALAWF + Alarm A register allows write flag + 0 + 1 + read-only + + + ALBWF + Alarm B register allows write flag + 1 + 1 + read-only + + + WATWF + Wakeup timer register allows write flag + 2 + 1 + read-only + + + TADJF + Time adjustment flag + 3 + 1 + read-write + + + INITF + Calendar initialization flag + 4 + 1 + read-only + + + UPDF + Calendar update flag + 5 + 1 + read-write + + + IMF + Enter initialization mode flag + 6 + 1 + read-only + + + IMEN + Initialization mode enable + 7 + 1 + read-write + + + ALAF + Alarm A flag + 8 + 1 + read-write + + + ALBF + Alarm B flag + 9 + 1 + read-write + + + WATF + Wakeup timer flag + 10 + 1 + read-write + + + TSF + Timestamp flag + 11 + 1 + read-write + + + TSOF + Timestamp overflow flag + 12 + 1 + read-write + + + TP1F + Tamper detection 1 flag + 13 + 1 + read-write + + + TP2F + Tamper detection 2 flag + 14 + 1 + read-write + + + CALUPDF + Calibration value update completed flag + 16 + 1 + read-only + + + + + DIV + DIV + Diveder register + 0x10 + 0x20 + read-write + 0x007F00FF + + + DIVA + Diveder A + 16 + 7 + + + DIVB + Diveder B + 0 + 15 + + + + + WAT + WAT + Wakeup timer register + 0x14 + 0x20 + read-write + 0x0000FFFF + + + VAL + Wakeup timer reload value + 0 + 16 + + + + + CCAL + CCAL + Calibration register + 0x18 + 0x20 + read-write + 0x00000000 + + + CALDIR + Calibration direction + 7 + 1 + + + CALVAL + Calibration value + 0 + 5 + + + + + ALA + ALA + Alarm A register + 0x1C + 0x20 + read-write + 0x00000000 + + + MASK4 + Date/week mask + 31 + 1 + + + WKSEL + Date/week mode select + 30 + 1 + + + DT + Date tens + 28 + 2 + + + DU + Date units + 24 + 4 + + + MASK3 + Hours mask + 23 + 1 + + + AMPM + AM/PM + 22 + 1 + + + HT + Hour tens + 20 + 2 + + + HU + Hour units + 16 + 4 + + + MASK2 + Minutes mask + 15 + 1 + + + MT + Minute tens + 12 + 3 + + + MU + Minute units + 8 + 4 + + + MASK1 + Seconds mask + 7 + 1 + + + ST + Second tens + 4 + 3 + + + SU + Second units + 0 + 4 + + + + + ALB + ALB + Alarm B register + 0x20 + 0x20 + read-write + 0x00000000 + + + MASK4 + Date/week mask + 31 + 1 + + + WKSEL + Date/week mode select + 30 + 1 + + + DT + Date tens + 28 + 2 + + + DU + Date units + 24 + 4 + + + MASK3 + Hours mask + 23 + 1 + + + AMPM + AM/PM + 22 + 1 + + + HT + Hour tens + 20 + 2 + + + HU + Hour units + 16 + 4 + + + MASK2 + Minutes mask + 15 + 1 + + + MT + Minute tens + 12 + 3 + + + MU + Minute units + 8 + 4 + + + MASK1 + Seconds mask + 7 + 1 + + + ST + Second tens + 4 + 3 + + + SU + Second units + 0 + 4 + + + + + WP + WP + write protection register + 0x24 + 0x20 + write-only + 0x00000000 + + + CMD + Command register + 0 + 8 + + + + + SBS + SBS + sub second register + 0x28 + 0x20 + read-only + 0x00000000 + + + SBS + Sub second value + 0 + 16 + + + + + TADJ + TADJ + time adjust register + 0x2C + 0x20 + write-only + 0x00000000 + + + ADD1S + Add 1 second + 31 + 1 + + + DECSBS + Decrease sub-second value + 0 + 15 + + + + + TSTM + TSTM + time stamp time register + 0x30 + 0x20 + read-only + 0x00000000 + + + AMPM + AMPM + 22 + 1 + + + HT + Hour tens + 20 + 2 + + + HU + Hour units + 16 + 4 + + + MT + Minute tens + 12 + 3 + + + MU + Minute units + 8 + 4 + + + ST + Second tens + 4 + 3 + + + SU + Second units + 0 + 4 + + + + + TSDT + TSDT + timestamp date register + 0x34 + 0x20 + read-only + 0x00000000 + + + WK + Week + 13 + 3 + + + MT + Month tens + 12 + 1 + + + MU + Month units + 8 + 4 + + + DT + Date tens + 4 + 2 + + + DU + Date units + 0 + 4 + + + + + TSSBS + TSSBS + timestamp sub second register + 0x38 + 0x20 + read-only + 0x00000000 + + + SBS + Sub second value + 0 + 16 + + + + + SCAL + SCAL + calibration register + 0x3C + 0x20 + read-write + 0x00000000 + + + ADD + Add ERTC clock + 15 + 1 + + + CAL8 + 8-second calibration period + 14 + 1 + + + CAL16 + 16 second calibration period + 13 + 1 + + + DEC + Decrease ERTC clock + 0 + 9 + + + + + TAMP + TAMP + tamper and alternate function configuration + register + 0x40 + 0x20 + read-write + 0x00000000 + + + OUTTYPE + Output type + 18 + 1 + + + TSPIN + Time stamp detection pin selection + 17 + 1 + + + TP1PIN + Tamper detection pin selection + 16 + 1 + + + TPPU + Tamper detection pull-up + 15 + 1 + + + TPPR + Tamper detection pre-charge time + 13 + 2 + + + TPFLT + Tamper detection filter time + 11 + 2 + + + TPFREQ + Tamper detection frequency + 8 + 3 + + + TPTSEN + Tamper detection timestamp enable + 7 + 1 + + + TP2EDG + Tamper detection 2 valid edge + 4 + 1 + + + TP2EN + Tamper detection 2 enable + 3 + 1 + + + TPIEN + Tamper detection interrupt enable + 2 + 1 + + + TP1EDG + Tamper detection 1 valid edge + 1 + 1 + + + TP1EN + Tamper detection 1 enable + 0 + 1 + + + + + ALASBS + ALASBS + alarm A sub second register + 0x44 + 0x20 + read-write + 0x00000000 + + + SBSMSK + Sub-second mask + 24 + 4 + + + SBS + Sub-seconds value + 0 + 15 + + + + + ALBSBS + ALBSBS + alarm B sub second register + 0x48 + 0x20 + read-write + 0x00000000 + + + SBSMSK + Sub-second mask + 24 + 4 + + + SBS + Sub-seconds value + 0 + 15 + + + + + BPR1DT + BPR1DT + Battery powered domain register + 0x50 + 0x20 + read-write + 0x00000000 + + + DT + Battery powered domain data + 0 + 32 + + + + + BPR2DT + BPR2DT + Battery powered domain register + 0x54 + 0x20 + read-write + 0x00000000 + + + DT + Battery powered domain data + 0 + 32 + + + + + BPR3DT + BPR3DT + Battery powered domain register + 0x58 + 0x20 + read-write + 0x00000000 + + + DT + Battery powered domain data + 0 + 32 + + + + + BPR4DT + BPR4DT + Battery powered domain register + 0x5C + 0x20 + read-write + 0x00000000 + + + DT + Battery powered domain data + 0 + 32 + + + + + BPR5DT + BPR5DT + Battery powered domain register + 0x60 + 0x20 + read-write + 0x00000000 + + + DT + Battery powered domain data + 0 + 32 + + + + + BPR6DT + BPR6DT + Battery powered domain register + 0x64 + 0x20 + read-write + 0x00000000 + + + DT + Battery powered domain data + 0 + 32 + + + + + BPR7DT + BPR7DT + Battery powered domain register + 0x68 + 0x20 + read-write + 0x00000000 + + + DT + Battery powered domain data + 0 + 32 + + + + + BPR8DT + BPR8DT + Battery powered domain register + 0x6C + 0x20 + read-write + 0x00000000 + + + DT + Battery powered domain data + 0 + 32 + + + + + BPR9DT + BPR9DT + Battery powered domain register + 0x70 + 0x20 + read-write + 0x00000000 + + + DT + Battery powered domain data + 0 + 32 + + + + + BPR10DT + BPR10DT + Battery powered domain register + 0x74 + 0x20 + read-write + 0x00000000 + + + DT + Battery powered domain data + 0 + 32 + + + + + BPR11DT + BPR11DT + Battery powered domain register + 0x78 + 0x20 + read-write + 0x00000000 + + + DT + Battery powered domain data + 0 + 32 + + + + + BPR12DT + BPR12DT + Battery powered domain register + 0x7C + 0x20 + read-write + 0x00000000 + + + DT + Battery powered domain data + 0 + 32 + + + + + BPR13DT + BPR13DT + Battery powered domain register + 0x80 + 0x20 + read-write + 0x00000000 + + + DT + Battery powered domain data + 0 + 32 + + + + + BPR14DT + BPR14DT + Battery powered domain register + 0x84 + 0x20 + read-write + 0x00000000 + + + DT + Battery powered domain data + 0 + 32 + + + + + BPR15DT + BPR15DT + Battery powered domain register + 0x88 + 0x20 + read-write + 0x00000000 + + + DT + Battery powered domain data + 0 + 32 + + + + + BPR16DT + BPR16DT + Battery powered domain register + 0x8C + 0x20 + read-write + 0x00000000 + + + DT + Battery powered domain data + 0 + 32 + + + + + BPR17DT + BPR17DT + Battery powered domain register + 0x90 + 0x20 + read-write + 0x00000000 + + + DT + Battery powered domain data + 0 + 32 + + + + + BPR18DT + BPR18DT + Battery powered domain register + 0x94 + 0x20 + read-write + 0x00000000 + + + DT + Battery powered domain data + 0 + 32 + + + + + BPR19DT + BPR19DT + Battery powered domain register + 0x98 + 0x20 + read-write + 0x00000000 + + + DT + Battery powered domain data + 0 + 32 + + + + + BPR20DT + BPR20DT + Battery powered domain register + 0x9C + 0x20 + read-write + 0x00000000 + + + DT + Battery powered domain data + 0 + 32 + + + + + + + WDT + Watchdog + WDT + 0x40003000 + + 0x0 + 0x400 + registers + + + + CMD + CMD + Command register + 0x0 + 0x20 + write-only + 0x00000000 + + + CMD + Command register + 0 + 16 + + + + + DIV + DIV + Division register + 0x4 + 0x20 + read-write + 0x00000000 + + + DIV + Division divider + 0 + 3 + + + + + RLD + RLD + Reload register + 0x8 + 0x20 + read-write + 0x00000FFF + + + RLD + Reload value + 0 + 12 + + + + + STS + STS + Status register + 0xC + 0x20 + read-only + 0x00000000 + + + DIVF + Division value update complete flag + 0 + 1 + + + RLDF + Reload value update complete flag + 1 + 1 + + + WINF + Window value update complete flag + 2 + 1 + + + + + WIN + WIN + Window register + 0x10 + 0x20 + read-write + 0x00000FFF + + + WIN + Window value + 0 + 12 + + + + + + + WWDT + Window watchdog + WWDT + 0x40002C00 + + 0x0 + 0x400 + registers + + + WWDT + Window Watchdog interrupt + 0 + + + + CTRL + CTRL + Control register + 0x0 + 0x20 + read-write + 0x0000007F + + + CNT + Decrement counter + 0 + 7 + + + WWDTEN + Window watchdog enable + 7 + 1 + + + + + CFG + CFG + Configuration register + 0x4 + 0x20 + read-write + 0x0000007F + + + WIN + Window value + 0 + 7 + + + DIV + Clock division value + 7 + 2 + + + RLDIEN + Reload counter interrupt + 9 + 1 + + + + + STS + STS + Status register + 0x8 + 0x20 + read-write + 0x00000000 + + + RLDF + Reload counter interrupt flag + 0 + 1 + + + + + + + TMR1 + Advanced timer + TIMER + 0x40010000 + + 0x0 + 0x400 + registers + + + TMR1_BRK_TMR9 + TMR1 brake interrupt and TMR9 global + interrupt + 24 + + + TMR1_OVF_TMR10 + TMR1 overflow interrupt and TMR10 global + interrupt + 25 + + + TMR1_TRG_HALL_TMR11 + TMR1 trigger and HALL interrupts and + TMR11 global interrupt + 26 + + + TMR1_CH + TMR1 channel interrupt + 27 + + + + CTRL1 + CTRL1 + Control register 1 + 0x0 + 0x20 + read-write + 0x0000 + + + CLKDIV + Clock divider + 8 + 2 + + + PRBEN + Period buffer enable + 7 + 1 + + + TWCMSEL + Two-way count mode + selection + 5 + 2 + + + OWCDIR + One-way count direction + 4 + 1 + + + OCMEN + One cycle mode enable + 3 + 1 + + + OVFS + Overflow event source + 2 + 1 + + + OVFEN + Overflow event enable + 1 + 1 + + + TMREN + TMR enable + 0 + 1 + + + + + CTRL2 + CTRL2 + Control register 2 + 0x4 + 0x20 + read-write + 0x0000 + + + TRGOUT2EN + TRGOUT2 enable + 31 + 1 + + + C4IOS + Channel 4 idle output state + 14 + 1 + + + C3CIOS + Channel 3 complementary idle output state + 13 + 1 + + + C3IOS + Channel 3 idle output state + 12 + 1 + + + C2CIOS + Channel 2 complementary idle output state + 11 + 1 + + + C2IOS + Channel 2 idle output state + 10 + 1 + + + C1CIOS + Channel 1 complementary idle output state + 9 + 1 + + + C1IOS + Channel 1 idle output state + 8 + 1 + + + C1INSEL + C1IN selection + 7 + 1 + + + PTOS + Primary TMR output selection + 4 + 3 + + + DRS + DMA request source + 3 + 1 + + + CCFS + Channel control bit flash select + 2 + 1 + + + CBCTRL + Channel buffer control + 0 + 1 + + + + + STCTRL + STCTRL + Subordinate TMR control register + 0x8 + 0x20 + read-write + 0x0000 + + + ESP + External signal polarity + 15 + 1 + + + ECMBEN + External clock mode B enable + 14 + 1 + + + ESDIV + External signal divider + 12 + 2 + + + ESF + External signal filter + 8 + 4 + + + STS + Subordinate TMR synchronization + 7 + 1 + + + STIS + Subordinate TMR input selection + 4 + 3 + + + SMSEL + Subordinate TMR mode selection + 0 + 3 + + + + + IDEN + IDEN + Interrupt/DMA enable register + 0xC + 0x20 + read-write + 0x0000 + + + TDEN + Trigger DMA request enable + 14 + 1 + + + HALLDE + HALL DMA request enable + 13 + 1 + + + C4DEN + Channel 4 DMA request + enable + 12 + 1 + + + C3DEN + Channel 3 DMA request + enable + 11 + 1 + + + C2DEN + Channel 2 DMA request + enable + 10 + 1 + + + C1DEN + Channel 1 DMA request + enable + 9 + 1 + + + OVFDEN + Overflow DMA request enable + 8 + 1 + + + BRKIE + Brake interrupt enable + 7 + 1 + + + TIEN + Trigger interrupt enable + 6 + 1 + + + HALLIEN + HALL interrupt enable + 5 + 1 + + + C4IEN + Channel 4 interrupt + enable + 4 + 1 + + + C3IEN + Channel 3 interrupt + enable + 3 + 1 + + + C2IEN + Channel 2 interrupt + enable + 2 + 1 + + + C1IEN + Channel 1 interrupt + enable + 1 + 1 + + + OVFIEN + Overflow interrupt enable + 0 + 1 + + + + + ISTS + ISTS + Interrupt status register + 0x10 + 0x20 + read-write + 0x0000 + + + C4RF + Channel 4 recapture flag + 12 + 1 + + + C3RF + Channel 3 recapture flag + 11 + 1 + + + C2RF + Channel 2 recapture flag + 10 + 1 + + + C1RF + Channel 1 recapture flag + 9 + 1 + + + BRKIF + Brake interrupt flag + 7 + 1 + + + TRGIF + Trigger interrupt flag + 6 + 1 + + + HALLIF + HALL interrupt flag + 5 + 1 + + + C4IF + Channel 4 interrupt flag + 4 + 1 + + + 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Overflow interrupt flag + 0 + 1 + + + + + SWEVT + SWEVT + Software event register + 0x14 + 0x20 + read-write + 0x0000 + + + TRGSWTR + Trigger event triggered by software + 6 + 1 + + + C4SWTR + Channel 4 event triggered by software + 4 + 1 + + + C3SWTR + Channel 3 event triggered by software + 3 + 1 + + + C2SWTR + Channel 2 event triggered by software + 2 + 1 + + + C1SWTR + Channel 1 event triggered by software + 1 + 1 + + + OVFSWTR + Overflow event triggered by software + 0 + 1 + + + + + CM1_OUTPUT + CM1_OUTPUT + Channel output mode register + 0x18 + 0x20 + read-write + 0x00000000 + + + C2OSEN + Channel 2 output switch enable + 15 + 1 + + + C2OCTRL + Channel 2 output control + 12 + 3 + + + C2OBEN + Channel 2 output buffer enable + 11 + 1 + + + C2OIEN + Channel 2 output immediately enable + 10 + 1 + + + C2C + Channel 2 configure + 8 + 2 + + + C1OSEN + Channel 1 output switch enable + 7 + 1 + + + C1OCTRL + Channel 1 output control + 4 + 3 + + + C1OBEN + Channel 1 output buffer enable + 3 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read-write + 0x0000 + + + DMADT + DMA data register + 0 + 16 + + + + + TMR5_RMP + TMR5_RMP + TMR5 channel input remap register + 0x50 + 0x20 + read-write + 0x0000 + + + TMR5_CH4_IRMP + TMR5 channel 4 input remap + 6 + 2 + + + + + + + TMR9 + General purpose timer + TIMER + 0x40014000 + + 0x0 + 0x400 + registers + + + TMR1_BRK_TMR9 + TMR1 brake interrupt and TMR9 global + interrupt + 24 + + + + CTRL1 + CTRL1 + Control register 1 + 0x0 + 0x20 + read-write + 0x0000 + + + CLKDIV + Clock divider + 8 + 2 + + + PRBEN + Period buffer enable + 7 + 1 + + + OCMEN + One cycle mode enable + 3 + 1 + + + OVFS + Overflow event source + 2 + 1 + + + OVFEN + Overflow event enable + 1 + 1 + + + TMREN + TMR enable + 0 + 1 + + + + + STCTRL + STCTRL + Subordinate TMR control register + 0x8 + 0x20 + read-write + 0x0000 + + + STIS + Subordinate TMR input selection + 4 + 3 + + + SMSEL + Subordinate TMR mode selection + 0 + 3 + + + + + IDEN + IDEN + Interrupt/DMA enable register + 0xC + 0x20 + read-write + 0x0000 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C2OCTRL + Channel 2 output control + 12 + 3 + + + C2OBEN + Channel 2 output buffer enable + 11 + 1 + + + C2OIEN + Channel 2 output immediately enable + 10 + 1 + + + C2C + Channel 2 configure + 8 + 2 + + + C1OCTRL + Channel 1 output control + 4 + 3 + + + C1OBEN + Channel 1 output buffer enable + 3 + 1 + + + C1OIEN + Channel 1 output immediately enable + 2 + 1 + + + C1C + Channel 1 configure + 0 + 2 + + + + + CM1_INPUT + CM1_INPUT + Channel input mode register 1 + CM1_OUTPUT + 0x18 + 0x20 + read-write + 0x00000000 + + + C2DF + Channel 2 digital filter + 12 + 4 + + + C2IDIV + Channel 2 input divider + 10 + 2 + + + C2C + Channel 2 configure + 8 + 2 + + + C1DF + Channel 1 digital filter + 4 + 4 + + + C1IDIV + Channel 1 input divider + 2 + 2 + + + C1C + Channel 1 configure + 0 + 2 + + + + + CCTRL + CCTRL + Channel control + register + 0x20 + 0x20 + read-write + 0x0000 + + + C2CP + Channel 2 complementary polarity + 7 + 1 + + + C2CEN + Channel 2 complementary enable + 6 + 1 + + + C2P + Channel 2 Polarity + 5 + 1 + + + C2EN + Channel 2 enable + 4 + 1 + + + C1CP + Channel 1 complementary polarity + 3 + 1 + + + C1CEN + Channel 1 complementary enable + 2 + 1 + + + C1P + Channel 1 Polarity + 1 + 1 + + + C1EN + Channel 1 enable + 0 + 1 + + + + + CVAL + CVAL + Counter value + 0x24 + 0x20 + read-write + 0x00000000 + + + CVAL + Counter value + 0 + 16 + + + + + DIV + DIV + Divider value + 0x28 + 0x20 + read-write + 0x0000 + + + DIV + Divider value + 0 + 16 + + + + + PR + PR + Period value + 0x2C + 0x20 + read-write + 0x00000000 + + + PR + Period value + 0 + 16 + + + + + C1DT + C1DT + Channel 1 data register + 0x34 + 0x20 + read-write + 0x00000000 + + + C1DT + Channel 1 data register + 0 + 16 + + + + + C2DT + C2DT + Channel 2 data register + 0x38 + 0x20 + read-write + 0x00000000 + + + C2DT + Channel 2 data register + 0 + 16 + + + + + + + TMR12 + 0x40001800 + + TMR8_BRK_TMR12 + TMR8 brake interrupt and TMR12 global + interrupt + 43 + + + + TMR10 + General purpose timer + TIMER + 0x40014400 + + 0x0 + 0x400 + registers + + + TMR1_OVF_TMR10 + TMR1 overflow interrupt and TMR10 global + interrupt + 25 + + + + CTRL1 + CTRL1 + Control register 1 + 0x0 + 0x20 + read-write + 0x0000 + + + CLKDIV + Clock divider + 8 + 2 + + + PRBEN + Period buffer enable + 7 + 1 + + + OCMEN + One cycle mode enable + 3 + 1 + + + OVFS + Overflow event source + 2 + 1 + + + OVFEN + Overflow event enable + 1 + 1 + + + TMREN + TMR enable + 0 + 1 + + + + + IDEN + IDEN + Interrupt/DMA enable register + 0xC + 0x20 + read-write + 0x0000 + + + C1IEN + Channel 1 interrupt + enable + 1 + 1 + + + OVFIEN + Overflow interrupt enable + 0 + 1 + + + + + ISTS + ISTS + Interrupt status register + 0x10 + 0x20 + read-write + 0x0000 + + + C1RF + Channel 1 recapture flag + 9 + 1 + + + C1IF + Channel 1 interrupt flag + 1 + 1 + + + OVFIF + Overflow interrupt flag + 0 + 1 + + + + + SWEVT + SWEVT + Software event register + 0x14 + 0x20 + read-write + 0x0000 + + + C1SWTR + Channel 1 event triggered by software + 1 + 1 + + + OVFSWTR + Overflow event triggered by software + 0 + 1 + + + + + CM1_OUTPUT + CM1_OUTPUT + Channel output mode register + 0x18 + 0x20 + read-write + 0x00000000 + + + C1OCTRL + Channel 1 output control + 4 + 3 + + + C1OBEN + Channel 1 output buffer enable + 3 + 1 + + + C1OIEN + Channel 1 output immediately enable + 2 + 1 + + + C1C + Channel 1 configure + 0 + 2 + + + + + CM1_INPUT + CM1_INPUT + Channel input mode register 1 + CM1_OUTPUT + 0x18 + 0x20 + read-write + 0x00000000 + + + C1DF + Channel 1 digital filter + 4 + 4 + + + C1IDIV + Channel 1 input divider + 2 + 2 + + + C1C + Channel 1 configure + 0 + 2 + + + + + CCTRL + CCTRL + Channel control + register + 0x20 + 0x20 + read-write + 0x0000 + + + C1CP + Channel 1 complementary polarity + 3 + 1 + + + C1P + Channel 1 Polarity + 1 + 1 + + + C1EN + Channel 1 enable + 0 + 1 + + + + + CVAL + CVAL + Counter value + 0x24 + 0x20 + read-write + 0x00000000 + + + CVAL + Counter value + 0 + 16 + + + + + DIV + DIV + Divider value + 0x28 + 0x20 + read-write + 0x0000 + + + DIV + Divider value + 0 + 16 + + + + + PR + PR + Period value + 0x2C + 0x20 + read-write + 0x00000000 + + + PR + Period value + 0 + 16 + + + + + C1DT + C1DT + Channel 1 data register + 0x34 + 0x20 + read-write + 0x00000000 + + + C1DT + Channel 1 data register + 0 + 16 + + + + + + + TMR11 + 0x40014800 + + TMR1_TRG_HALL_TMR11 + TMR1 trigger and HALL interrupts and + TMR11 global interrupt + 26 + + + + TMR13 + 0x40001C00 + + TMR8_OVF_TMR13 + TMR8 overflow interrupt and TMR13 global + interrupt + 44 + + + + TMR14 + 0x40002000 + + TMR8_TRG_HALL_TMR14 + TMR8 trigger and HALL interrupts and + TMR14 global interrupt + 45 + + + + TMR6 + Basic timer + TIMER + 0x40001000 + + 0x0 + 0x400 + registers + + + TMR6 + TMR6 global interrupt + 54 + + + + CTRL1 + CTRL1 + Control register 1 + 0x0 + 0x20 + read-write + 0x0000 + + + PRBEN + Period buffer enable + 7 + 1 + + + OCMEN + One cycle mode enable + 3 + 1 + + + OVFS + Overflow event source + 2 + 1 + + + OVFEN + Overflow event enable + 1 + 1 + + + TMREN + TMR enable + 0 + 1 + + + + + CTRL2 + CTRL2 + Control register 2 + 0x4 + 0x20 + read-write + 0x0000 + + + PTOS + Primary TMR output selection + 4 + 3 + + + + + IDEN + IDEN + Interrupt/DMA enable register + 0xC + 0x20 + read-write + 0x0000 + + + OVFDEN + Overflow DMA request enable + 8 + 1 + + + OVFIEN + Overflow interrupt enable + 0 + 1 + + + + + ISTS + ISTS + Interrupt status register + 0x10 + 0x20 + read-write + 0x0000 + + + OVFIF + Overflow interrupt flag + 0 + 1 + + + + + SWEVT + SWEVT + Software event register + 0x14 + 0x20 + read-write + 0x0000 + + + OVFSWTR + Overflow event triggered by software + 0 + 1 + + + + + CVAL + CVAL + Counter value + 0x24 + 0x20 + read-write + 0x00000000 + + + CVAL + Counter value + 0 + 16 + + + + + DIV + DIV + Divider value + 0x28 + 0x20 + read-write + 0x0000 + + + DIV + Divider value + 0 + 16 + + + + + PR + PR + Period value + 0x2C + 0x20 + read-write + 0x00000000 + + + PR + Period value + 0 + 16 + + + + + + + TMR7 + 0x40001400 + + TMR7 + TMR7 global interrupt + 55 + + + + ACC + HSI Auto Clock Calibration + ACC + 0x40017400 + + 0x0 + 0x400 + registers + + + + STS + STS + status register + 0x0 + 0x20 + 0x0000 + + + RSLOST + Reference Signal Lost + read-write + 1 + 1 + + + CALRDY + Internal high-speed clock calibration ready + read-write + 0 + 1 + + + + + CTRL1 + CTRL1 + control register 1 + 0x04 + 0x20 + 0x0100 + + + STEP + STEP + read-write + 8 + 4 + + + CALRDYIEN + CALRDY interrupt enable + read-write + 5 + 1 + + + EIEN + RSLOST error interrupt enable + read-write + 4 + 1 + + + SOFSEL + SOF Select + read-write + 2 + 1 + + + ENTRIM + Enable trim + read-write + 1 + 1 + + + CALON + Calibration on + read-write + 0 + 1 + + + + + CTRL2 + CTRL2 + control register 2 + 0x08 + 0x20 + 0x2080 + + + HICKTWK + Internal high-speed auto clock trimming + read-only + 8 + 6 + + + HICKCAL + Internal high-speed auto clock calibration + read-only + 0 + 8 + + + + + C1 + C1 + compare value 1 + 0x0C + 0x20 + 0x1F2C + + + C1 + Compare 1 + read-write + 0 + 16 + + + + + C2 + C2 + compare value 2 + 0x10 + 0x20 + 0x1F40 + + + C2 + Compare 2 + read-write + 0 + 16 + + + + + C3 + C3 + compare value 3 + 0x14 + 0x20 + 0x1F54 + + + C3 + Compare 3 + read-write + 0 + 16 + + + + + + + I2C1 + Inter-integrated circuit + I2C + 0x40005400 + + 0x0 + 0x400 + registers + + + I2C1_EVT + I2C1 event interrupt + 31 + + + I2C1_ERR + I2C1 error interrupt + 32 + + + + CTRL1 + CTRL1 + Control register 1 + 0x0 + 0x20 + 0x00000000 + + + I2CEN + I2C peripheral enable + 0 + 1 + read-write + + + TDIEN + Transmit data interrupt enable + 1 + 1 + read-write + + + RDIEN + Receive data interrupt enable + 2 + 1 + read-write + + + ADDRIEN + Address match interrupt enable + 3 + 1 + read-write + + + ACKFAILIEN + Acknowledge fail interrupt enable + 4 + 1 + read-write + + + STOPIEN + Stop generation complete interrupt enable + 5 + 1 + read-write + + + TDCIEN + Transfer data complete interrupt enable + 6 + 1 + read-write + + + ERRIEN + Error interrupts enable + 7 + 1 + read-write + + + DFLT + Digital filter value + 8 + 4 + read-write + + + DMATEN + DMA Transmit data request enable + 14 + 1 + read-write + + + DMAREN + DMA receive data request enable + 15 + 1 + read-write + + + SCTRL + Slave receiving data control + 16 + 1 + read-write + + + STRETCH + Clock stretching mode + 17 + 1 + read-write + + + GCAEN + General call address enable + 19 + 1 + read-write + + + HADDREN + SMBus host address enable + 20 + 1 + read-write + + + DEVADDREN + SMBus device default address enable + 21 + 1 + read-write + + + SMBALERT + SMBus alert enable / pin set + 22 + 1 + read-write + + + PECEN + PEC calculation enable + 23 + 1 + read-write + + + + + CTRL2 + CTRL2 + Control register 2 + 0x4 + 0x20 + read-write + 0x00000000 + + + PECTEN + Request PEC transmission enable + 26 + 1 + + + ASTOPEN + Automatically send stop condition enable + 25 + 1 + + + RLDEN + Send data reload mode enable + 24 + 1 + + + CNT + Transmit data counter + 16 + 8 + + + NACKEN + Not acknowledge enable + 15 + 1 + + + GENSTOP + Generate stop condition + 14 + 1 + + + GENSTART + Generate start condition + 13 + 1 + + + READH10 + 10-bit address header read enable + 12 + 1 + + + ADDR10 + Host send 10-bit address mode enable + 11 + 1 + + + DIR + Master data transmission direction + 10 + 1 + + + SADDR + Slave address + 0 + 10 + + + + + OADDR1 + OADDR1 + Own address register 1 + 0x8 + 0x20 + read-write + 0x00000000 + + + ADDR1 + Interface address + 0 + 10 + + + ADDR1MODE + Own Address mode + 10 + 1 + + + ADDR1EN + Own address 1 enable + 15 + 1 + + + + + OADDR2 + OADDR2 + Own address register 2 + 0xC + 0x20 + read-write + 0x00000000 + + + ADDR2 + Own address 2 + 1 + 7 + + + ADDR2MASK + Own address 2-bit mask + 8 + 3 + + + ADDR2EN + Own address 2 enable + 15 + 1 + + + + + CLKCTRL + CLKCTRL + Clock contorl register + 0x10 + 0x20 + read-write + 0x00000000 + + + SCLL + SCL low level + 0 + 8 + + + SCLH + SCL high level + 8 + 8 + + + SDAD + SDA output delay + 16 + 4 + + + SCLD + SCL output delay + 20 + 4 + + + DIVH + High 4 bits of clock divider value + 24 + 4 + + + DIVL + Low 4 bits of clock divider value + 28 + 4 + + + + + TIMEOUT + TIMEOUT + Timeout register + 0x14 + 0x20 + read-write + 0x00000000 + + + TOTIME + Clock timeout detection time + 0 + 12 + + + TOMOED + Clock timeout detection mode + 12 + 1 + + + TOEN + Detect clock low/high timeout enable + 15 + 1 + + + EXTTIME + Cumulative clock low extend timeout value + 16 + 12 + + + EXTEN + Cumulative clock low extend timeout enable + 31 + 1 + + + + + STS + STS + Interrupt and Status register + 0x18 + 0x20 + 0x00000001 + + + ADDR + Slave address matching value + 17 + 7 + read-only + + + SDIR + Slave data transmit direction + 16 + 1 + read-only + + + BUSYF + Bus busy + 15 + 1 + read-only + + + ALERTF + SMBus alert flag + 13 + 1 + read-only + + + TMOUT + SMBus timeout flag + 12 + 1 + read-only + + + PECERR + PEC receive error flag + 11 + 1 + read-only + + + OUF + Overflow or underflow flag + 10 + 1 + read-only + + + ARLOST + Arbitration lost flag + 9 + 1 + read-only + + + BUSERR + Bus error flag + 8 + 1 + read-only + + + TCRLD + Transmission is complete, waiting to load data + 7 + 1 + read-only + + + TDC + Transmit data complete flag + 6 + 1 + read-only + + + STOPF + Stop condition generation complete flag + 5 + 1 + read-only + + + ACKFAIL + Acknowledge failure flag + 4 + 1 + read-only + + + ADDRF + 0~7 bit address match flag + 3 + 1 + read-only + + + RDBF + Receive data buffer full flag + 2 + 1 + read-only + + + TDIS + Send interrupt status + 1 + 1 + read-write + + + TDBE + Transmit data buffer empty flag + 0 + 1 + read-write + + + + + CLR + CLR + Interrupt clear register + 0x1C + 0x20 + write-only + 0x00000000 + + + ALERTC + Clear SMBus alert flag + 13 + 1 + + + TMOUTC + Clear SMBus timeout flag + 12 + 1 + + + PECERRC + Clear PEC receive error flag + 11 + 1 + + + OUFC + Clear overload / underload flag + 10 + 1 + + + ARLOSTC + Clear arbitration lost flag + 9 + 1 + + + BUSERRC + Clear bus error flag + 8 + 1 + + + STOPC + Clear stop condition generation complete flag + 5 + 1 + + + ACKFAILC + Clear acknowledge failure flag + 4 + 1 + + + ADDRC + Clear 0~7 bit address match flag + 3 + 1 + + + + + PEC + PEC + PEC register + 0x20 + 0x20 + read-only + 0x00000000 + + + PECVAL + PEC value + 0 + 8 + + + + + RXDT + RXDT + Receive data register + 0x24 + 0x20 + read-only + 0x00000000 + + + DT + Receive data register + 0 + 8 + + + + + TXDT + TXDT + Transmit data register + 0x28 + 0x20 + read-write + 0x00000000 + + + DT + Transmit data register + 0 + 8 + + + + + + + I2C2 + 0x40005800 + + I2C2_EVT + I2C2 event interrupt + 33 + + + I2C2_ERR + I2C2 error interrupt + 34 + + + + I2C3 + 0x40005C00 + + I2C3_EVT + I2C3 event interrupt + 72 + + + I2C3_ERR + I2C3 error interrupt + 73 + + + + SPI1 + Serial peripheral interface + SPI + 0x40013000 + + 0x0 + 0x400 + registers + + + SPI1 + SPI1 global interrupt + 35 + + + + CTRL1 + CTRL1 + control register 1 + 0x0 + 0x20 + read-write + 0x0000 + + + SLBEN + Single line bidirectional half-duplex enable + 15 + 1 + + + SLBTD + Single line bidirectional half-duplex transmission direction + 14 + 1 + + + CCEN + CRC calculation enable + 13 + 1 + + + NTC + Next transmission CRC + 12 + 1 + + + FBN + frame bit num + 11 + 1 + + + ORA + Only receive active + 10 + 1 + + + SWCSEN + Software CS enable + 9 + 1 + + + SWCSIL + Software CS internal level + 8 + 1 + + + LTF + LSB transmit first + 7 + 1 + + + SPIEN + SPI enable + 6 + 1 + + + MDIV2_0 + Master clock frequency division bit2-0 + 3 + 3 + + + MSTEN + Master enable + 2 + 1 + + + CLKPOL + Clock polarity + 1 + 1 + + + CLKPHA + Clock phase + 0 + 1 + + + + + CTRL2 + CTRL2 + control register 2 + 0x4 + 0x20 + read-write + 0x0000 + + + MDIV3EN + Master clock frequency3 division enable + 9 + 1 + + + MDIV3 + Master clock frequency division bit3 + 8 + 1 + + + TDBEIE + Transmit data buffer empty interrupt enable + 7 + 1 + + + RDBFIE + Receive data buffer full interrupt enable + 6 + 1 + + + ERRIE + Error interrupt enable + 5 + 1 + + + TIEN + TI mode enable + 4 + 1 + + + HWCSOE + Hardware CS output enable + 2 + 1 + + + DMATEN + DMA transmit enable + 1 + 1 + + + DMAREN + DMA receive enable + 0 + 1 + + + + + STS + STS + status register + 0x8 + 0x20 + 0x0002 + + + CSPAS + CS pulse abnormal setting fiag + 8 + 1 + read-write + + + BF + Busy flag + 7 + 1 + read-only + + + ROERR + Receiver overflow error + 6 + 1 + read-only + + + MMERR + Master mode error + 5 + 1 + read-only + + + CCERR + CRC calculation error + 4 + 1 + read-write + + + TUERR + Transmitter underload error + 3 + 1 + read-only + + + ACS + Audio channel state + 2 + 1 + read-only + + + TDBE + Transmit data buffer empty + 1 + 1 + read-only + + + RDBF + Receive data buffer full + 0 + 1 + read-only + + + + + DT + DT + data register + 0xC + 0x20 + read-write + 0x0000 + + + DT + Data value + 0 + 16 + + + + + CPOLY + CPOLY + CRC polynomial register + 0x10 + 0x20 + read-write + 0x0007 + + + CPOLY + CRC polynomial + 0 + 16 + + + + + RCRC + RCRC + Receive CRC register + 0x14 + 0x20 + read-only + 0x0000 + + + RCRC + Receive CRC + 0 + 16 + + + + + TCRC + TCRC + Transmit CRC register + 0x18 + 0x20 + read-only + 0x0000 + + + TCRC + Transmit CRC + 0 + 16 + + + + + I2SCTRL + I2SCTRL + I2S control register + 0x1C + 0x20 + read-write + 0x0000 + + + I2SMSEL + I2S mode select + 11 + 1 + + + I2SEN + I2S Enable + 10 + 1 + + + OPERSEL + I2S operation select + 8 + 2 + + + PCMFSSEL + PCM frame synchronization select + 7 + 1 + + + STDSEL + I2S standard select + 4 + 2 + + + I2SCLKPOL + I2S clock polarity + 3 + 1 + + + I2SDBN + I2S data bit num + 1 + 2 + + + I2SCBN + I2S channel bit num + 0 + 1 + + + + + I2SCLK + I2SCLK + I2S clock register + 0x20 + 0x20 + read-write + 00000010 + + + I2SDIV9_8 + I2S division bit9 and bit8 + 10 + 2 + + + I2SMCLKOE + I2S master clock output enable + 9 + 1 + + + I2SODD + Odd result for I2S division + 8 + 1 + + + I2SDIV7_0 + I2S division bit7 to bit0 + 0 + 8 + + + + + + + SPI2 + 0x40003800 + + SPI2 + SPI2 global interrupt + 36 + + + + SPI3 + 0x40003C00 + + SPI3 + SPI3 global interrupt + 51 + + + + SPI4 + 0x40013400 + + SPI4 + SPI4 global interrupt + 84 + + + + I2S2_EXT + 0x40017800 + + + I2S3_EXT + 0x40017C00 + + + USART1 + Universal synchronous asynchronous receiver + transmitter + USART + 0x40011000 + + 0x0 + 0x400 + registers + + + USART1 + USART1 global interrupt + 37 + + + + STS + STS + Status register + 0x0 + 0x20 + 0x00C0 + + + CTSCF + CTS change flag + 9 + 1 + read-write + + + BFF + Break frame flag + 8 + 1 + read-write + + + TDBE + Transmit data buffer empty + 7 + 1 + read-only + + + TDC + Transmit data complete + 6 + 1 + read-write + + + RDBF + Receive data buffer full + 5 + 1 + read-write + + + IDLEF + IDLE flag + 4 + 1 + read-only + + + ROERR + Receiver overflow error + 3 + 1 + read-only + + + NERR + Noise error + 2 + 1 + read-only + + + FERR + Framing error + 1 + 1 + read-only + + + PERR + Parity error + 0 + 1 + read-only + + + + + DT + DT + Data register + 0x4 + 0x20 + read-write + 0x00000000 + + + DT + Data value + 0 + 9 + + + + + BAUDR + BAUDR + Baud rate register + 0x8 + 0x20 + read-write + 0x0000 + + + DIV + Division + 0 + 16 + + + + + CTRL1 + CTRL1 + Control register 1 + 0xC + 0x20 + read-write + 0x0000 + + + DBN1 + high bit for Data bit num + 28 + 1 + + + TSDT + transmit start delay time + 21 + 5 + + + TCDT + transmit complete delay time + 16 + 5 + + + UEN + USART enable + 13 + 1 + + + DBN0 + low bit for Data bit num + 12 + 1 + + + WUM + Wake up mode + 11 + 1 + + + PEN + Parity enable + 10 + 1 + + + PSEL + Parity selection + 9 + 1 + + + PERRIEN + PERR interrupt enable + 8 + 1 + + + TDBEIEN + TDBE interrupt enable + 7 + 1 + + + TDCIEN + TDC interrupt enable + 6 + 1 + + + RDBFIEN + RDBF interrupt enable + 5 + 1 + + + IDLEIEN + IDLE interrupt enable + 4 + 1 + + + TEN + Transmitter enable + 3 + 1 + + + REN + Receiver enable + 2 + 1 + + + RM + Receiver mute + 1 + 1 + + + SBF + Send break frame + 0 + 1 + + + + + CTRL2 + CTRL2 + Control register 2 + 0x10 + 0x20 + read-write + 0x0000 + + + ID7_4 + bit 7-4 for usart identification + 28 + 4 + + + TRPSWAP + Transmit receive pin swap + 15 + 1 + + + LINEN + LIN mode enable + 14 + 1 + + + STOPBN + STOP bit num + 12 + 2 + + + CLKEN + Clock enable + 11 + 1 + + + CLKPOL + Clock polarity + 10 + 1 + + + CLKPHA + Clock phase + 9 + 1 + + + LBCP + Last bit clock pulse + 8 + 1 + + + BFIEN + Break frame interrupt enable + 6 + 1 + + + BFBN + Break frame bit num + 5 + 1 + + + IDBN + Identification bit num + 4 + 1 + + + ID3_0 + bit 3-0 for usart identification + 0 + 4 + + + + + CTRL3 + CTRL3 + Control register 3 + 0x14 + 0x20 + read-write + 0x0000 + + + DEP + DE polarity selection + 15 + 1 + + + RS485EN + RS485 enable + 14 + 1 + + + CTSCFIEN + CTSCF interrupt enable + 10 + 1 + + + CTSEN + CTS enable + 9 + 1 + + + RTSEN + RTS enable + 8 + 1 + + + DMATEN + DMA transmitter enable + 7 + 1 + + + DMAREN + DMA receiver enable + 6 + 1 + + + SCMEN + Smartcard mode enable + 5 + 1 + + + SCNACKEN + Smartcard NACK enable + 4 + 1 + + + SLBEN + Single line bidirectional half-duplex enable + 3 + 1 + + + IRDALP + IrDA low-power mode + 2 + 1 + + + IRDAEN + IrDA enable + 1 + 1 + + + ERRIEN + Error interrupt enable + 0 + 1 + + + + + GDIV + GDIV + Guard time and division register + 0x18 + 0x20 + read-write + 0x0000 + + + SCGT + Smart card guard time value + 8 + 8 + + + ISDIV + IrDA/smartcard division value + 0 + 8 + + + + + + + USART2 + 0x40004400 + + USART2 + USART2 global interrupt + 38 + + + + USART3 + 0x40004800 + + USART3 + USART3 global interrupt + 39 + + + + USART6 + 0x40011400 + + USART6 + USART6 global interrupt + 71 + + + + ADC1 + Analog to digital converter + ADC + 0x40012000 + + 0x0 + 0x100 + registers + + + ADC + ADC1 global interrupt + 18 + + + + STS + STS + status register + 0x0 + 0x20 + read-write + 0x00000000 + + + RDY + ADC ready to conversion flag + 6 + 1 + read-only + + + OCCO + Ordinary channel conversion overflow flag + 5 + 1 + + + OCCS + Ordinary channel conversion start flag + 4 + 1 + + + PCCS + Preempted channel conversion start flag + 3 + 1 + + + PCCE + Preempted channels conversion end flag + 2 + 1 + + + OCCE + Ordinary channels conversion end flag + 1 + 1 + + + VMOR + Voltage monitoring out of range flag + 0 + 1 + + + + + CTRL1 + CTRL1 + control register 1 + 0x4 + 0x20 + read-write + 0x00000000 + + + OCCOIEN + Ordinary channel conversion overflow interrupt enable + 26 + 1 + + + CRSEL + Conversion resolution select + 24 + 2 + + + OCVMEN + Voltage monitoring enable on ordinary channels + 23 + 1 + + + PCVMEN + Voltage monitoring enable on preempted channels + 22 + 1 + + + OCPCNT + Partitioned mode conversion count of ordinary channels + 13 + 3 + + + PCPEN + Partitioned mode enable on preempted channels + 12 + 1 + + + OCPEN + Partitioned mode enable on ordinary channels + 11 + 1 + + + PCAUTOEN + Preempted group automatic conversion enable after ordinary group + 10 + 1 + + + VMSGEN + Voltage monitoring enable on a single channel + 9 + 1 + + + SQEN + Sequence mode enable + 8 + 1 + + + PCCEIEN + Conversion end interrupt enable for preempted channels + 7 + 1 + + + VMORIEN + Voltage monitoring out of range interrupt enable + 6 + 1 + + + OCCEIEN + Ordinary channel conversion end interrupt enable + 5 + 1 + + + VMCSEL + Voltage monitoring channel select + 0 + 5 + + + + + CTRL2 + CTRL2 + control register 2 + 0x8 + 0x20 + read-write + 0x00000000 + + + OCTESEL_H + High bit of trigger event select for ordinary channels conversion + 31 + 1 + + + OCSWTRG + Ordinary channel software conversion trigger + 30 + 1 + + + OCETE + Ordinary channel external trigger edge select + 28 + 2 + + + OCTESEL_L + Low bit of trigger event select for ordinary channels conversion + 24 + 4 + + + PCTESEL_H + High bit of trigger event select for preempted channels conversion + 23 + 1 + + + PCSWTRG + Preempted channel software conversion trigger + 22 + 1 + + + PCETE + Preempted channel external trigger edge select + 20 + 2 + + + PCTESEL_L + Low bit of trigger event select for preempted channels conversion + 16 + 4 + + + DTALIGN + Data alignment + 11 + 1 + + + EOCSFEN + Each ordinary channel conversion set OCCE flag enable + 10 + 1 + + + OCDRCEN + Ordinary channel DMA request continuation enable for independent mode + 9 + 1 + + + OCDMAEN + Ordinary channel DMA transfer enable for independent mode + 8 + 1 + + + ADABRT + ADC conversion abort + 4 + 1 + + + ADCALINIT + Initialize A/D calibration + 3 + 1 + + + ADCAL + A/D Calibration + 2 + 1 + + + RPEN + Repeat mode enable + 1 + 1 + + + ADCEN + A/D converter enable + 0 + 1 + + + + + SPT1 + SPT1 + sample time register 1 + 0xC + 0x20 + read-write + 0x00000000 + + + CSPT18 + Selection sample time of channel ADC_IN18 + 24 + 3 + + + CSPT17 + Selection sample time of channel ADC_IN17 + 21 + 3 + + + CSPT16 + Selection sample time of channel ADC_IN16 + 18 + 3 + + + CSPT15 + Selection sample time of channel ADC_IN15 + 15 + 3 + + + CSPT14 + Selection sample time of channel ADC_IN14 + 12 + 3 + + + CSPT13 + Selection sample time of channel ADC_IN13 + 9 + 3 + + + CSPT12 + Selection sample time of channel ADC_IN12 + 6 + 3 + + + CSPT11 + Selection sample time of channel ADC_IN11 + 3 + 3 + + + CSPT10 + Selection sample time of channel ADC_IN10 + 0 + 3 + + + + + SPT2 + SPT2 + sample time register 2 + 0x10 + 0x20 + read-write + 0x00000000 + + + CSPT9 + Selection sample time of channel ADC_IN9 + 27 + 3 + + + CSPT8 + Selection sample time of channel ADC_IN8 + 24 + 3 + + + CSPT7 + Selection sample time of channel ADC_IN7 + 21 + 3 + + + CSPT6 + Selection sample time of channel ADC_IN6 + 18 + 3 + + + CSPT5 + Selection sample time of channel ADC_IN5 + 15 + 3 + + + CSPT4 + Selection sample time of channel ADC_IN4 + 12 + 3 + + + CSPT3 + Selection sample time of channel ADC_IN3 + 9 + 3 + + + CSPT2 + Selection sample time of channel ADC_IN2 + 6 + 3 + + + CSPT1 + Selection sample time of channel ADC_IN1 + 3 + 3 + + + CSPT0 + Selection sample time of channel ADC_IN0 + 0 + 3 + + + + + PCDTO1 + PCDTO1 + Preempted channel 1 data offset register + 0x14 + 0x20 + read-write + 0x00000000 + + + PCDTO1 + Data offset for Preempted channel 1 + 0 + 12 + + + + + PCDTO2 + PCDTO2 + Preempted channel 2 data offset register + 0x18 + 0x20 + read-write + 0x00000000 + + + PCDTO2 + Data offset for Preempted channel 2 + 0 + 12 + + + + + PCDTO3 + PCDTO3 + Preempted channel 3 data offset register + 0x1C + 0x20 + read-write + 0x00000000 + + + PCDTO3 + Data offset for Preempted channel 3 + 0 + 12 + + + + + PCDTO4 + PCDTO4 + Preempted channel 4 data offset register + 0x20 + 0x20 + read-write + 0x00000000 + + + PCDTO4 + Data offset for Preempted channel 4 + 0 + 12 + + + + + VMHB + VMHB + Voltage monitoring high boundary register + 0x24 + 0x20 + read-write + 0x00000FFF + + + VMHB + Voltage monitoring high boundary + 0 + 12 + + + + + VMLB + VMLB + Voltage monitoring low boundary register + 0x28 + 0x20 + read-write + 0x00000000 + + + VMLB + Voltage monitoring low boundary + 0 + 12 + + + + + OSQ1 + OSQ1 + Ordinary sequence register 1 + 0x2C + 0x20 + read-write + 0x00000000 + + + OCLEN + Ordinary conversion sequence length + 20 + 4 + + + OSN16 + Number of 16th conversion in ordinary sequence + 15 + 5 + + + OSN15 + Number of 15th conversion in ordinary sequence + 10 + 5 + + + OSN14 + Number of 14th conversion in ordinary sequence + 5 + 5 + + + OSN13 + Number of 13th conversion in ordinary sequence + 0 + 5 + + + + + OSQ2 + OSQ2 + Ordinary sequence register 2 + 0x30 + 0x20 + read-write + 0x00000000 + + + OSN12 + Number of 12th conversion in ordinary sequence + 25 + 5 + + + OSN11 + Number of 11th conversion in ordinary sequence + 20 + 5 + + + OSN10 + Number of 10th conversion in ordinary sequence + 15 + 5 + + + OSN9 + Number of 8th conversion in ordinary sequence + 10 + 5 + + + OSN8 + Number of 7th conversion in ordinary sequence + 5 + 5 + + + OSN7 + Number of 13th conversion in ordinary sequence + 0 + 5 + + + + + OSQ3 + OSQ3 + Ordinary sequence register 3 + 0x34 + 0x20 + read-write + 0x00000000 + + + OSN6 + Number of 6th conversion in ordinary sequence + 25 + 5 + + + OSN5 + Number of 5th conversion in ordinary sequence + 20 + 5 + + + OSN4 + Number of 4th conversion in ordinary sequence + 15 + 5 + + + OSN3 + number of 3rd conversion in ordinary sequence + 10 + 5 + + + OSN2 + Number of 2nd conversion in ordinary sequence + 5 + 5 + + + OSN1 + Number of 1st conversion in ordinary sequence + 0 + 5 + + + + + PSQ + PSQ + Preempted sequence register + 0x38 + 0x20 + read-write + 0x00000000 + + + PCLEN + Preempted conversion sequence length + 20 + 2 + + + PSN4 + Number of 4th conversion in Preempted sequence + 15 + 5 + + + PSN3 + Number of 3rd conversion in Preempted sequence + 10 + 5 + + + PSN2 + Number of 2nd conversion in Preempted sequence + 5 + 5 + + + PSN1 + Number of 1st conversion in Preempted sequence + 0 + 5 + + + + + PDT1 + PDT1 + Preempted data register 1 + 0x3C + 0x20 + read-only + 0x00000000 + + + PDT1 + Preempted data + 0 + 16 + + + + + PDT2 + PDT2 + Preempted data register 2 + 0x40 + 0x20 + read-only + 0x00000000 + + + PDT2 + Preempted data + 0 + 16 + + + + + PDT3 + PDT3 + Preempted data register 3 + 0x44 + 0x20 + read-only + 0x00000000 + + + PDT3 + Preempted data + 0 + 16 + + + + + PDT4 + PDT4 + Preempted data register 4 + 0x48 + 0x20 + read-only + 0x00000000 + + + PDT4 + Preempted data + 0 + 16 + + + + + ODT + ODT + Ordinary data register + 0x4C + 0x20 + read-only + 0x00000000 + + + ODT + Conversion data of ordinary channel + 0 + 16 + + + + + OVSP + OVSP + oversampling register + 0x80 + 0x20 + read-write + 0x00000000 + + + OOSRSEL + Ordinary oversampling recovery mode select + 10 + 1 + + + OOSTREN + Ordinary oversampling trigger mode enable + 9 + 1 + + + OSSSEL + Oversampling shift select + 5 + 4 + + + OSRSEL + Oversampling ratio select + 2 + 3 + + + POSEN + Preempted oversampling enable + 1 + 1 + + + OOSEN + Ordinary oversampling enable + 0 + 1 + + + + + CALVAL + CALVAL + Calibration value register + 0xB4 + 0x20 + read-write + 0x00000000 + + + CALVAL + A/D Calibration value + 0 + 7 + + + + + + + ADC2 + 0x40012100 + + ADC + ADC2 global interrupts + 18 + + + + ADC3 + 0x40012200 + + ADC + ADC3 global interrupts + 18 + + + + ADCCOM + ADC common area + ADC + 0x40012300 + + 0x0 + 0x100 + registers + + + + CSTS + CSTS + Common status register + 0x0 + 0x20 + read-only + 0x00000000 + + + RDY3 + ADC ready to conversion flag of ADC3 + 22 + 1 + + + OCCO3 + Ordinary channel conversion overflow flag of ADC3 + 21 + 1 + + + OCCS3 + Ordinary channel conversion start flag of ADC3 + 20 + 1 + + + PCCS3 + Preempted channel conversion start flag of ADC3 + 19 + 1 + + + PCCE3 + Preempted channels conversion end flag of ADC3 + 18 + 1 + + + OCCE3 + Ordinary channels conversion end flag of ADC3 + 17 + 1 + + + VMOR3 + Voltage monitoring out of range flag of ADC3 + 16 + 1 + + + RDY2 + ADC ready to conversion flag of ADC2 + 14 + 1 + + + OCCO2 + Ordinary channel conversion overflow flag of ADC2 + 13 + 1 + + + OCCS2 + Ordinary channel conversion start flag of ADC2 + 12 + 1 + + + PCCS2 + Preempted channel conversion start flag of ADC2 + 11 + 1 + + + PCCE2 + Preempted channels conversion end flag of ADC2 + 10 + 1 + + + OCCE2 + Ordinary channels conversion end flag of ADC2 + 9 + 1 + + + VMOR2 + Voltage monitoring out of range flag of ADC2 + 8 + 1 + + + RDY1 + ADC ready to conversion flag of ADC1 + 6 + 1 + + + OCCO1 + Ordinary channel conversion overflow flag of ADC1 + 5 + 1 + + + OCCS1 + Ordinary channel conversion start flag of ADC1 + 4 + 1 + + + PCCS1 + Preempted channel conversion start flag of ADC1 + 3 + 1 + + + PCCE1 + Preempted channels conversion end flag of ADC1 + 2 + 1 + + + OCCE1 + Ordinary channels conversion end flag of ADC1 + 1 + 1 + + + VMOR1 + Voltage monitoring out of range flag of ADC1 + 0 + 1 + + + + + CCTRL + CCTRL + Common control register + 0x4 + 0x20 + read-write + 0x00000000 + + + MSDMASEL_H + High bit of ordinary channel DMA transfer mode select for master slave mode + 28 + 1 + + + ITSRVEN + Internal temperature sensor and VINTRV enable + 23 + 1 + + + VBATEN + VBAT enable + 22 + 1 + + + ADCDIV + ADC division + 16 + 4 + + + MSDMASEL_L + Low bit of ordinary channel DMA transfer mode select for master slave mode + 14 + 2 + + + MSDRCEN + Ordinary channel DMA request continuation enable for master slave mode + 13 + 1 + + + ASISEL + Adjacent ADC sampling interval select for ordinary shifting mode + 8 + 4 + + + MSSEL + Master slave mode select + 0 + 5 + + + + + CODT + CODT + Common Ordinary data register + 0x8 + 0x20 + read-only + 0x00000000 + + + CODTH + Ordinary conversion high halfword data for master slave mode + 16 + 16 + + + CODTL + Ordinary conversion low halfword data for master slave mode + 0 + 16 + + + + + + + CAN1 + Can controller area network + CAN + 0x40006400 + + 0x0 + 0x400 + registers + + + CAN1_TX + CAN1 TX interrupt + 19 + + + CAN1_RX0 + CAN1 RX0 interrupt + 20 + + + CAN_RX1 + CAN1 RX1 interrupt + 21 + + + CAN_SE + CAN1 SE interrupt + 22 + + + + MCTRL + MCTRL + Main control register + 0x0 + 0x20 + read-write + 0x00010002 + + + PTD + Prohibit transmission when debug + 16 + 1 + + + SPRST + Software partial reset + 15 + 1 + + + TTCEN + Time triggered communication mode enable + 7 + 1 + + + AEBOEN + Automatic exit bus-off enable + 6 + 1 + + + AEDEN + Automatic exit doze mode enable + 5 + 1 + + + PRSFEN + Prohibit retransmission when sending fails enable + 4 + 1 + + + MDRSEL + Message discarding rule select when overflow + 3 + 1 + + + MMSSR + Multiple message sending sequence rule + 2 + 1 + + + DZEN + Doze mode enable + 1 + 1 + + + FZEN + Freeze mode enable + 0 + 1 + + + + + MSTS + MSTS + Main status register + 0x4 + 0x20 + 0x00000C02 + + + REALRX + Real time level of RX pin + 11 + 1 + read-only + + + LSAMPRX + Last sample level of RX pin + 10 + 1 + read-only + + + CURS + Currently receiving status + 9 + 1 + read-only + + + CUSS + Currently sending status + 8 + 1 + read-only + + + EDZIF + Enter doze mode interrupt flag + 4 + 1 + read-write + + + QDZIF + Quit doze mode interrupt flag + 3 + 1 + read-write + + + EOIF + Error occur Interrupt flag + 2 + 1 + read-write + + + DZC + Doze mode confirm + 1 + 1 + read-only + + + FZC + Freeze mode confirm + 0 + 1 + read-only + + + + + TSTS + TSTS + Transmit status register + 0x8 + 0x20 + 0x1C000000 + + + TM2LPF + Transmit mailbox 2 lowest priority flag + 31 + 1 + read-only + + + TM1LPF + Transmit mailbox 1 lowest priority flag + 30 + 1 + read-only + + + TM0LPF + Transmit mailbox 0 lowest priority flag + 29 + 1 + read-only + + + TM2EF + Transmit mailbox 2 empty flag + 28 + 1 + read-only + + + TM1EF + Transmit mailbox 1 empty flag + 27 + 1 + read-only + + + TM0EF + Transmit mailbox 0 empty flag + 26 + 1 + read-only + + + TMNR + Transmit Mailbox number record + 24 + 2 + read-only + + + TM2CT + Transmit mailbox 2 cancel transmission + 23 + 1 + read-write + + + TM2TEF + Transmit mailbox 2 transmission error flag + 19 + 1 + read-write + + + TM2ALF + Transmit mailbox 2 arbitration lost flag + 18 + 1 + read-write + + + TM2TSF + Transmit mailbox 2 transmission success flag + 17 + 1 + read-write + + + TM2TCF + transmit mailbox 2 transmission complete flag + 16 + 1 + read-write + + + TM1CT + Transmit mailbox 1 cancel transmission + 15 + 1 + read-write + + + TM1TEF + Transmit mailbox 1 transmission error flag + 11 + 1 + read-write + + + TM1ALF + Transmit mailbox 1 arbitration lost flag + 10 + 1 + read-write + + + TM1TSF + Transmit mailbox 1 transmission success flag + 9 + 1 + read-write + + + TM1TCF + Transmit mailbox 1 transmission complete flag + 8 + 1 + read-write + + + TM0CT + Transmit mailbox 0 cancel transmission + 7 + 1 + read-write + + + TM0TEF + Transmit mailbox 0 transmission error flag + 3 + 1 + read-write + + + TM0ALF + Transmit mailbox 0 arbitration lost flag + 2 + 1 + read-write + + + TM0TSF + Transmit mailbox 0 transmission success flag + 1 + 1 + read-write + + + TM0TCF + Transmit mailbox 0 transmission complete flag + 0 + 1 + read-write + + + + + RF0 + RF0 + Receive FIFO 0 register + 0xC + 0x20 + 0x00000000 + + + RF0R + Receive FIFO 0 release + 5 + 1 + read-write + + + RF0OF + Receive FIFO 0 overflow flag + 4 + 1 + read-write + + + RF0FF + Receive FIFO 0 full flag + 3 + 1 + read-write + + + RF0MN + Receive FIFO 0 message num + 0 + 2 + read-only + + + + + RF1 + RF1 + Receive FIFO 1 register + 0x10 + 0x20 + 0x00000000 + + + RF1R + Receive FIFO 1 release + 5 + 1 + read-write + + + RF1OF + Receive FIFO 1 overflow flag + 4 + 1 + read-write + + + RF1FF + Receive FIFO 1 full flag + 3 + 1 + read-write + + + RF1MN + Receive FIFO 1 message num + 0 + 2 + read-only + + + + + INTEN + INTEN + Interrupt enable register + 0x14 + 0x20 + read-write + 0x00000000 + + + EDZIEN + Enter doze mode interrupt enable + 17 + 1 + + + QDZIEN + Quit doze mode interrupt enable + 16 + 1 + + + EOIEN + Error occur interrupt enable + 15 + 1 + + + ETRIEN + Error type record interrupt enable + 11 + 1 + + + BOIEN + Bus-off interrupt enable + 10 + 1 + + + EPIEN + Error passive interrupt enable + 9 + 1 + + + EAIEN + Error active interrupt enable + 8 + 1 + + + RF1OIEN + Receive FIFO 1 overflow interrupt enable + 6 + 1 + + + RF1FIEN + Receive FIFO 1 full interrupt enable + 5 + 1 + + + RF1MIEN + FIFO 1 receive message interrupt enable + 4 + 1 + + + RF0OIEN + Receive FIFO 0 overflow interrupt enable + 3 + 1 + + + RF0FIEN + Receive FIFO 0 full interrupt enable + 2 + 1 + + + RF0MIEN + FIFO 0 receive message interrupt enable + 1 + 1 + + + TCIEN + Transmission complete interrupt enable + 0 + 1 + + + + + ESTS + ESTS + Error status register + 0x18 + 0x20 + 0x00000000 + + + REC + Receive error counter + 24 + 8 + read-only + + + TEC + Transmit error counter + 16 + 8 + read-only + + + ETR + Error type record + 4 + 3 + read-write + + + BOF + Bus-off flag + 2 + 1 + read-only + + + EPF + Error passive flag + 1 + 1 + read-only + + + EAF + Error active flag + 0 + 1 + read-only + + + + + BTMG + BTMG + Bit timing register + 0x1C + 0x20 + read-write + 0x00000000 + + + LOEN + Listen-Only mode + 31 + 1 + + + LBEN + Loop back mode + 30 + 1 + + + RSAW + Resynchronization adjust width + 24 + 2 + + + BTS2 + Bit time segment 2 + 20 + 3 + + + BTS1 + Bit time segment 1 + 16 + 4 + + + BRDIV + Baud rate division + 0 + 12 + + + + + TMI0 + TMI0 + Transmit mailbox 0 identifier register + 0x180 + 0x20 + read-write + 0x00000000 + + + TMSID + Transmit mailbox standard identifier or extended identifier high bytes + 21 + 11 + + + TMEID + Ttransmit mailbox extended identifier + 3 + 18 + + + TMIDSEL + Transmit mailbox identifier type select + 2 + 1 + + + TMFRSEL + Transmit mailbox frame type select + 1 + 1 + + + TMSR + Transmit mailbox send request + 0 + 1 + + + + + TMC0 + TMC0 + Transmit mailbox 0 data length and time stamp register + 0x184 + 0x20 + read-write + 0x00000000 + + + TMTS + Transmit mailbox time stamp + 16 + 16 + + + TMTSTEN + Transmit mailbox time stamp transmit enable + 8 + 1 + + + TMDTBL + Transmit mailbox data byte length + 0 + 4 + + + + + TMDTL0 + TMDTL0 + Transmit mailbox 0 low byte data register + 0x188 + 0x20 + read-write + 0x00000000 + + + TMDT3 + Transmit mailbox data byte 3 + 24 + 8 + + + TMDT2 + Transmit mailbox data byte 2 + 16 + 8 + + + TMDT1 + Transmit mailbox data byte 1 + 8 + 8 + + + TMDT0 + Transmit mailbox data byte 0 + 0 + 8 + + + + + TMDTH0 + TMDTH0 + Transmit mailbox 0 high byte data register + 0x18C + 0x20 + read-write + 0x00000000 + + + TMDT7 + Transmit mailbox data byte 7 + 24 + 8 + + + TMDT6 + Transmit mailbox data byte 6 + 16 + 8 + + + TMDT5 + Transmit mailbox data byte 5 + 8 + 8 + + + TMDT4 + Transmit mailbox data byte 4 + 0 + 8 + + + + + TMI1 + TMI1 + Transmit mailbox 1 identifier register + 0x190 + 0x20 + read-write + 0x00000000 + + + TMSID + Transmit mailbox standard identifier or extended identifier high bytes + 21 + 11 + + + TMEID + Ttransmit mailbox extended identifier + 3 + 18 + + + TMIDSEL + Transmit mailbox identifier type select + 2 + 1 + + + TMFRSEL + Transmit mailbox frame type select + 1 + 1 + + + TMSR + Transmit mailbox send request + 0 + 1 + + + + + TMC1 + TMC1 + Transmit mailbox 1 data length and time stamp register + 0x194 + 0x20 + read-write + 0x00000000 + + + TMTS + Transmit mailbox time stamp + 16 + 16 + + + TMTSTEN + Transmit mailbox time stamp transmit enable + 8 + 1 + + + TMDTBL + Transmit mailbox data byte length + 0 + 4 + + + + + TMDTL1 + TMDTL1 + Transmit mailbox 1 low byte data register + 0x198 + 0x20 + read-write + 0x00000000 + + + TMDT3 + Transmit mailbox data byte 3 + 24 + 8 + + + TMDT2 + Transmit mailbox data byte 2 + 16 + 8 + + + TMDT1 + Transmit mailbox data byte 1 + 8 + 8 + + + TMDT0 + Transmit mailbox data byte 0 + 0 + 8 + + + + + TMDTH1 + TMDTH1 + Transmit mailbox 1 high byte data register + 0x19C + 0x20 + read-write + 0x00000000 + + + TMDT7 + Transmit mailbox data byte 7 + 24 + 8 + + + TMDT6 + Transmit mailbox data byte 6 + 16 + 8 + + + TMDT5 + Transmit mailbox data byte 5 + 8 + 8 + + + TMDT4 + Transmit mailbox data byte 4 + 0 + 8 + + + + + TMI2 + TMI2 + Transmit mailbox 2 identifier register + 0x1A0 + 0x20 + read-write + 0x00000000 + + + TMSID + Transmit mailbox standard identifier or extended identifier high bytes + 21 + 11 + + + TMEID + Ttransmit mailbox extended identifier + 3 + 18 + + + TMIDSEL + Transmit mailbox identifier type select + 2 + 1 + + + TMFRSEL + Transmit mailbox frame type select + 1 + 1 + + + TMSR + Transmit mailbox send request + 0 + 1 + + + + + TMC2 + TMC2 + Transmit mailbox 2 data length and time stamp register + 0x1A4 + 0x20 + read-write + 0x00000000 + + + TMTS + Transmit mailbox time stamp + 16 + 16 + + + TMTSTEN + Transmit mailbox time stamp transmit enable + 8 + 1 + + + TMDTBL + Transmit mailbox data byte length + 0 + 4 + + + + + TMDTL2 + TMDTL2 + Transmit mailbox 2 low byte data register + 0x1A8 + 0x20 + read-write + 0x00000000 + + + TMDT3 + Transmit mailbox data byte 3 + 24 + 8 + + + TMDT2 + Transmit mailbox data byte 2 + 16 + 8 + + + TMDT1 + Transmit mailbox data byte 1 + 8 + 8 + + + TMDT0 + Transmit mailbox data byte 0 + 0 + 8 + + + + + TMDTH2 + TMDTH2 + Transmit mailbox 2 high byte data register + 0x1AC + 0x20 + read-write + 0x00000000 + + + TMDT7 + Transmit mailbox data byte 7 + 24 + 8 + + + TMDT6 + Transmit mailbox data byte 6 + 16 + 8 + + + TMDT5 + Transmit mailbox data byte 5 + 8 + 8 + + + TMDT4 + Transmit mailbox data byte 4 + 0 + 8 + + + + + RFI0 + RFI0 + Receive FIFO 0 register + 0x1B0 + 0x20 + read-only + 0x00000000 + + + RFSID + Receive FIFO standard identifier or receive FIFO extended identifier + 21 + 11 + + + RFEID + Receive FIFO extended identifier + 3 + 18 + + + RFIDI + Receive FIFO identifier type indication + 2 + 1 + + + RFFRI + Receive FIFO frame type indication + 1 + 1 + + + + + RFC0 + RFC0 + Receive FIFO 0 data length and time stamp register + 0x1B4 + 0x20 + read-only + 0x00000000 + + + RFTS + Receive FIFO time stamp + 16 + 16 + + + RFFMN + Receive FIFO filter match number + 8 + 8 + + + RFDTL + Receive FIFO data length + 0 + 4 + + + + + RFDTL0 + RFDTL0 + Receive FIFO 0 low byte data register + 0x1B8 + 0x20 + read-only + 0x00000000 + + + RFDT3 + Receive FIFO data byte 3 + 24 + 8 + + + RFDT2 + Receive FIFO data byte 2 + 16 + 8 + + + RFDT1 + Receive FIFO data byte 1 + 8 + 8 + + + RFDT0 + Receive FIFO data byte 0 + 0 + 8 + + + + + RFDTH0 + RFDTH0 + Receive FIFO 0 high byte data register + 0x1BC + 0x20 + read-only + 0x00000000 + + + RFDT7 + Receive FIFO data byte 7 + 24 + 8 + + + RFDT6 + Receive FIFO data byte 6 + 16 + 8 + + + RFDT5 + Receive FIFO data byte 5 + 8 + 8 + + + RFDT4 + Receive FIFO data byte 4 + 0 + 8 + + + + + RFI1 + RFI1 + Receive FIFO 1 register + 0x1C0 + 0x20 + read-only + 0x00000000 + + + RFSID + Receive FIFO standard identifier or receive FIFO extended identifier + 21 + 11 + + + RFEID + Receive FIFO extended identifier + 3 + 18 + + + RFIDI + Receive FIFO identifier type indication + 2 + 1 + + + RFFRI + Receive FIFO frame type indication + 1 + 1 + + + + + RFC1 + RFC1 + Receive FIFO 1 data length and time stamp register + 0x1C4 + 0x20 + read-only + 0x00000000 + + + RFTS + Receive FIFO time stamp + 16 + 16 + + + RFFMN + Receive FIFO filter match number + 8 + 8 + + + RFDTL + Receive FIFO data length + 0 + 4 + + + + + RFDTL1 + RFDTL1 + Receive FIFO 1 low byte data register + 0x1C8 + 0x20 + read-only + 0x00000000 + + + RFDT3 + Receive FIFO data byte 3 + 24 + 8 + + + RFDT2 + Receive FIFO data byte 2 + 16 + 8 + + + RFDT1 + Receive FIFO data byte 1 + 8 + 8 + + + RFDT0 + Receive FIFO data byte 0 + 0 + 8 + + + + + RFDTH1 + RFDTH1 + Receive FIFO 1 high byte data register + 0x1CC + 0x20 + read-only + 0x00000000 + + + RFDT7 + Receive FIFO data byte 7 + 24 + 8 + + + RFDT6 + Receive FIFO data byte 6 + 16 + 8 + + + RFDT5 + Receive FIFO data byte 5 + 8 + 8 + + + RFDT4 + Receive FIFO data byte 4 + 0 + 8 + + + + + FCTRL + FCTRL + Filter control register + 0x200 + 0x20 + read-write + 0x00000000 + + + FCS + Filters configure switch + 0 + 1 + + + + + FMCFG + FMCFG + Filter mode config register + 0x204 + 0x20 + read-write + 0x00000000 + + + FMSEL0 + Filter mode select + 0 + 1 + + + FMSEL1 + Filter mode select + 1 + 1 + + + FMSEL2 + Filter mode select + 2 + 1 + + + FMSEL3 + Filter mode select + 3 + 1 + + + FMSEL4 + Filter mode select + 4 + 1 + + + FMSEL5 + Filter mode select + 5 + 1 + + + FMSEL6 + Filter mode select + 6 + 1 + + + FMSEL7 + Filter mode select + 7 + 1 + + + FMSEL8 + Filter mode select + 8 + 1 + + + FMSEL9 + Filter mode select + 9 + 1 + + + FMSEL10 + Filter mode select + 10 + 1 + + + FMSEL11 + Filter mode select + 11 + 1 + + + FMSEL12 + Filter mode select + 12 + 1 + + + FMSEL13 + Filter mode select + 13 + 1 + + + FMSEL14 + Filter mode select + 14 + 1 + + + FMSEL15 + Filter mode select + 15 + 1 + + + FMSEL16 + Filter mode select + 16 + 1 + + + FMSEL17 + Filter mode select + 17 + 1 + + + FMSEL18 + Filter mode select + 18 + 1 + + + FMSEL19 + Filter mode select + 19 + 1 + + + FMSEL20 + Filter mode select + 20 + 1 + + + FMSEL21 + Filter mode select + 21 + 1 + + + FMSEL22 + Filter mode select + 22 + 1 + + + FMSEL23 + Filter mode select + 23 + 1 + + + FMSEL24 + Filter mode select + 24 + 1 + + + FMSEL25 + Filter mode select + 25 + 1 + + + FMSEL26 + Filter mode select + 26 + 1 + + + FMSEL27 + Filter mode select + 27 + 1 + + + + + FBWCFG + FBWCFG + Filter bit width config register + 0x20C + 0x20 + read-write + 0x00000000 + + + FBWSEL0 + Filter bit width select + 0 + 1 + + + FBWSEL1 + Filter bit width select + 1 + 1 + + + FBWSEL2 + Filter bit width select + 2 + 1 + + + FBWSEL3 + Filter bit width select + 3 + 1 + + + FBWSEL4 + Filter bit width select + 4 + 1 + + + FBWSEL5 + Filter bit width select + 5 + 1 + + + FBWSEL6 + Filter bit width select + 6 + 1 + + + FBWSEL7 + Filter bit width select + 7 + 1 + + + FBWSEL8 + Filter bit width select + 8 + 1 + + + FBWSEL9 + Filter bit width select + 9 + 1 + + + FBWSEL10 + Filter bit width select + 10 + 1 + + + FBWSEL11 + Filter bit width select + 11 + 1 + + + FBWSEL12 + Filter bit width select + 12 + 1 + + + FBWSEL13 + Filter bit width select + 13 + 1 + + + FBWSEL14 + Filter bit width select + 14 + 1 + + + FBWSEL15 + Filter bit width select + 15 + 1 + + + FBWSEL16 + Filter bit width select + 16 + 1 + + + FBWSEL17 + Filter bit width select + 17 + 1 + + + FBWSEL18 + Filter bit width select + 18 + 1 + + + FBWSEL19 + Filter bit width select + 19 + 1 + + + FBWSEL20 + Filter bit width select + 20 + 1 + + + FBWSEL21 + Filter bit width select + 21 + 1 + + + FBWSEL22 + Filter bit width select + 22 + 1 + + + FBWSEL23 + Filter bit width select + 23 + 1 + + + FBWSEL24 + Filter bit width select + 24 + 1 + + + FBWSEL25 + Filter bit width select + 25 + 1 + + + FBWSEL26 + Filter bit width select + 26 + 1 + + + FBWSEL27 + Filter bit width select + 27 + 1 + + + + + FRF + FRF + Filter related FIFO register + 0x214 + 0x20 + read-write + 0x00000000 + + + FRFSEL0 + Filter relation FIFO select + 0 + 1 + + + FRFSEL1 + Filter relation FIFO select + 1 + 1 + + + FRFSEL2 + Filter relation FIFO select + 2 + 1 + + + FRFSEL3 + Filter relation FIFO select + 3 + 1 + + + FRFSEL4 + Filter relation FIFO select + 4 + 1 + + + FRFSEL5 + Filter relation FIFO select + 5 + 1 + + + FRFSEL6 + Filter relation FIFO select + 6 + 1 + + + FRFSEL7 + Filter relation FIFO select + 7 + 1 + + + FRFSEL8 + Filter relation FIFO select + 8 + 1 + + + FRFSEL9 + Filter relation FIFO select + 9 + 1 + + + FRFSEL10 + Filter relation FIFO select + 10 + 1 + + + FRFSEL11 + Filter relation FIFO select + 11 + 1 + + + FRFSEL12 + Filter relation FIFO select + 12 + 1 + + + FRFSEL13 + Filter relation FIFO select + 13 + 1 + + + FRFSEL14 + Filter relation FIFO select + 14 + 1 + + + FRFSEL15 + Filter relation FIFO select + 15 + 1 + + + FRFSEL16 + Filter relation FIFO select + 16 + 1 + + FRFSEL17 + Filter relation FIFO select + 17 + 1 + + + FRFSEL18 + Filter relation FIFO select + 18 + 1 + + + FRFSEL19 + Filter relation FIFO select + 19 + 1 + + + FRFSEL20 + Filter relation FIFO select + 20 + 1 + + + FRFSEL21 + Filter relation FIFO select + 21 + 1 + + + FRFSEL22 + Filter relation FIFO select + 22 + 1 + + + FRFSEL23 + Filter relation FIFO select + 23 + 1 + + + FRFSEL24 + Filter relation FIFO select + 24 + 1 + + + FRFSEL25 + Filter relation FIFO select + 25 + 1 + + + FRFSEL26 + Filter relation FIFO select + 26 + 1 + + + FRFSEL27 + Filter relation FIFO select + 27 + 1 + + + + + FACFG + FACFG + Filter activate configuration register + 0x21C + 0x20 + read-write + 0x00000000 + + + FAEN0 + Filter activate enable + 0 + 1 + + + FAEN1 + Filter activate enable + 1 + 1 + + + FAEN2 + Filter activate enable + 2 + 1 + + + FAEN3 + Filter activate enable + 3 + 1 + + + FAEN4 + Filter activate enable + 4 + 1 + + + FAEN5 + Filter activate enable + 5 + 1 + + + FAEN6 + Filter activate enable + 6 + 1 + + + FAEN7 + Filter activate enable + 7 + 1 + + + FAEN8 + Filter activate enable + 8 + 1 + + + FAEN9 + Filter activate enable + 9 + 1 + + + FAEN10 + Filter activate enable + 10 + 1 + + + FAEN11 + Filter activate enable + 11 + 1 + + + FAEN12 + Filter activate enable + 12 + 1 + + + FAEN13 + Filter activate enable + 13 + 1 + + + FAEN14 + Filter activate enable + 14 + 1 + + FAEN15 + Filter activate enable + 15 + 1 + + + FAEN16 + Filter activate enable + 16 + 1 + + + FAEN17 + Filter activate enable + 17 + 1 + + + FAEN18 + Filter activate enable + 18 + 1 + + + FAEN19 + Filter activate enable + 19 + 1 + + + FAEN20 + Filter activate enable + 20 + 1 + + + FAEN21 + Filter activate enable + 21 + 1 + + + FAEN22 + Filter activate enable + 22 + 1 + + + FAEN23 + Filter activate enable + 23 + 1 + + + FAEN24 + Filter activate enable + 24 + 1 + + + FAEN25 + Filter activate enable + 25 + 1 + + + FAEN26 + Filter activate enable + 26 + 1 + + + FAEN27 + Filter activate enable + 27 + 1 + + + + + F0FB1 + F0FB1 + Filter bank 0 filtrate bit register 1 + 0x240 + 0x20 + read-write + 0x00000000 + + + FFDB0 + Filter data bit + 0 + 1 + + + FFDB1 + Filter data bit + 1 + 1 + + + FFDB2 + Filter data bit + 2 + 1 + + + FFDB3 + Filter data bit + 3 + 1 + + + FFDB4 + Filter data bit + 4 + 1 + + + FFDB5 + Filter data bit + 5 + 1 + + + FFDB6 + Filter data bit + 6 + 1 + + + FFDB7 + Filter data bit + 7 + 1 + + + FFDB8 + Filter data bit + 8 + 1 + + + FFDB9 + Filter data bit + 9 + 1 + + + FFDB10 + Filter data bit + 10 + 1 + + + FFDB11 + Filter data bit + 11 + 1 + + + FFDB12 + Filter data bit + 12 + 1 + + + FFDB13 + Filter data bit + 13 + 1 + + + FFDB14 + Filter data bit + 14 + 1 + + + FFDB15 + Filter data bit + 15 + 1 + + + FFDB16 + Filter data bit + 16 + 1 + + + FFDB17 + Filter data bit + 17 + 1 + + + FFDB18 + Filter data bit + 18 + 1 + + + FFDB19 + Filter data bit + 19 + 1 + + + FFDB20 + Filter data bit + 20 + 1 + + + FFDB21 + Filter data bit + 21 + 1 + + + FFDB22 + Filter data bit + 22 + 1 + + + FFDB23 + Filter data bit + 23 + 1 + + + FFDB24 + Filter data bit + 24 + 1 + + + FFDB25 + Filter data bit + 25 + 1 + + + FFDB26 + Filter data bit + 26 + 1 + + + FFDB27 + Filter data bit + 27 + 1 + + + FFDB28 + Filter data bit + 28 + 1 + + + FFDB29 + Filter data bit + 29 + 1 + + + FFDB30 + Filter data bit + 30 + 1 + + + FFDB31 + Filter data bit + 31 + 1 + + + + + F0FB2 + F0FB2 + Filter bank 0 filtrate bit register 2 + 0x244 + 0x20 + read-write + 0x00000000 + + + FFDB0 + Filter data bit + 0 + 1 + + + FFDB1 + Filter data bit + 1 + 1 + + + FFDB2 + Filter data bit + 2 + 1 + + + FFDB3 + Filter data bit + 3 + 1 + + + FFDB4 + Filter data bit + 4 + 1 + + + FFDB5 + Filter data bit + 5 + 1 + + + FFDB6 + Filter data bit + 6 + 1 + + + FFDB7 + Filter data bit + 7 + 1 + + + FFDB8 + Filter data bit + 8 + 1 + + + FFDB9 + Filter data bit + 9 + 1 + + + FFDB10 + Filter data bit + 10 + 1 + + + FFDB11 + Filter data bit + 11 + 1 + + + FFDB12 + Filter data bit + 12 + 1 + + + FFDB13 + Filter data bit + 13 + 1 + + + FFDB14 + Filter data bit + 14 + 1 + + + FFDB15 + Filter data bit + 15 + 1 + + + FFDB16 + Filter data bit + 16 + 1 + + + FFDB17 + Filter data bit + 17 + 1 + + + FFDB18 + Filter data bit + 18 + 1 + + + FFDB19 + Filter data bit + 19 + 1 + + + FFDB20 + Filter data bit + 20 + 1 + + + FFDB21 + Filter data bit + 21 + 1 + + + FFDB22 + Filter data bit + 22 + 1 + + + FFDB23 + Filter data bit + 23 + 1 + + + FFDB24 + Filter data bit + 24 + 1 + + + FFDB25 + Filter data bit + 25 + 1 + + + FFDB26 + Filter data bit + 26 + 1 + + + FFDB27 + Filter data bit + 27 + 1 + + + FFDB28 + Filter data bit + 28 + 1 + + + FFDB29 + Filter data bit + 29 + 1 + + + FFDB30 + Filter data bit + 30 + 1 + + + FFDB31 + Filter data bit + 31 + 1 + + + + + F1FB1 + F1FB1 + Filter bank 1 filtrate bit register 1 + 0x248 + 0x20 + read-write + 0x00000000 + + + FFDB0 + Filter data bit + 0 + 1 + + + FFDB1 + Filter data bit + 1 + 1 + + + FFDB2 + Filter data bit + 2 + 1 + + + FFDB3 + Filter data bit + 3 + 1 + + + FFDB4 + Filter data bit + 4 + 1 + + + FFDB5 + Filter data bit + 5 + 1 + + + FFDB6 + Filter data bit + 6 + 1 + + + FFDB7 + Filter data bit + 7 + 1 + + + FFDB8 + Filter data bit + 8 + 1 + + + FFDB9 + Filter data bit + 9 + 1 + + + FFDB10 + Filter data bit + 10 + 1 + + + FFDB11 + Filter data bit + 11 + 1 + + + FFDB12 + Filter data bit + 12 + 1 + + + FFDB13 + Filter data bit + 13 + 1 + + + FFDB14 + Filter data bit + 14 + 1 + + + FFDB15 + Filter data bit + 15 + 1 + + + FFDB16 + Filter data bit + 16 + 1 + + + FFDB17 + Filter data bit + 17 + 1 + + + FFDB18 + Filter data bit + 18 + 1 + + + FFDB19 + Filter data bit + 19 + 1 + + + FFDB20 + Filter data bit + 20 + 1 + + + FFDB21 + Filter data bit + 21 + 1 + + + FFDB22 + Filter data bit + 22 + 1 + + + FFDB23 + Filter data bit + 23 + 1 + + + FFDB24 + Filter data bit + 24 + 1 + + + FFDB25 + Filter data bit + 25 + 1 + + + FFDB26 + Filter data bit + 26 + 1 + + + FFDB27 + Filter data bit + 27 + 1 + + + FFDB28 + Filter data bit + 28 + 1 + + + FFDB29 + Filter data bit + 29 + 1 + + + FFDB30 + Filter data bit + 30 + 1 + + + FFDB31 + Filter data bit + 31 + 1 + + + + + F1FB2 + F1FB2 + Filter bank 1 filtrate bit register 2 + 0x24C + 0x20 + read-write + 0x00000000 + + + FFDB0 + Filter data bit + 0 + 1 + + + FFDB1 + Filter data bit + 1 + 1 + + + FFDB2 + Filter data bit + 2 + 1 + + + FFDB3 + Filter data bit + 3 + 1 + + + FFDB4 + Filter data bit + 4 + 1 + + + FFDB5 + Filter data bit + 5 + 1 + + + FFDB6 + Filter data bit + 6 + 1 + + + FFDB7 + Filter data bit + 7 + 1 + + + FFDB8 + Filter data bit + 8 + 1 + + + FFDB9 + Filter data bit + 9 + 1 + + + FFDB10 + Filter data bit + 10 + 1 + + + FFDB11 + Filter data bit + 11 + 1 + + + FFDB12 + Filter data bit + 12 + 1 + + + FFDB13 + Filter data bit + 13 + 1 + + + FFDB14 + Filter data bit + 14 + 1 + + + FFDB15 + Filter data bit + 15 + 1 + + + FFDB16 + Filter data bit + 16 + 1 + + + FFDB17 + Filter data bit + 17 + 1 + + + FFDB18 + Filter data bit + 18 + 1 + + + FFDB19 + Filter data bit + 19 + 1 + + + FFDB20 + Filter data bit + 20 + 1 + + + FFDB21 + Filter data bit + 21 + 1 + + + FFDB22 + Filter data bit + 22 + 1 + + + FFDB23 + Filter data bit + 23 + 1 + + + FFDB24 + Filter data bit + 24 + 1 + + + FFDB25 + Filter data bit + 25 + 1 + + + FFDB26 + Filter data bit + 26 + 1 + + + FFDB27 + Filter data bit + 27 + 1 + + + FFDB28 + Filter data bit + 28 + 1 + + + FFDB29 + Filter data bit + 29 + 1 + + + FFDB30 + Filter data bit + 30 + 1 + + + FFDB31 + Filter data bit + 31 + 1 + + + + + F2FB1 + F2FB1 + Filter bank 2 filtrate bit register 1 + 0x250 + 0x20 + read-write + 0x00000000 + + + FFDB0 + Filter data bit + 0 + 1 + + + FFDB1 + Filter data bit + 1 + 1 + + + FFDB2 + Filter data bit + 2 + 1 + + + FFDB3 + Filter data bit + 3 + 1 + + + FFDB4 + Filter data bit + 4 + 1 + + + FFDB5 + Filter data bit + 5 + 1 + + + FFDB6 + Filter data bit + 6 + 1 + + + FFDB7 + Filter data bit + 7 + 1 + + + FFDB8 + Filter data bit + 8 + 1 + + + FFDB9 + Filter data bit + 9 + 1 + + + FFDB10 + Filter data bit + 10 + 1 + + + FFDB11 + Filter data bit + 11 + 1 + + + FFDB12 + Filter data bit + 12 + 1 + + + FFDB13 + Filter data bit + 13 + 1 + + + FFDB14 + Filter data bit + 14 + 1 + + + FFDB15 + Filter data bit + 15 + 1 + + + FFDB16 + Filter data bit + 16 + 1 + + + FFDB17 + Filter data bit + 17 + 1 + + + FFDB18 + Filter data bit + 18 + 1 + + + FFDB19 + Filter data bit + 19 + 1 + + + FFDB20 + Filter data bit + 20 + 1 + + + FFDB21 + Filter data bit + 21 + 1 + + + FFDB22 + Filter data bit + 22 + 1 + + + FFDB23 + Filter data bit + 23 + 1 + + + FFDB24 + Filter data bit + 24 + 1 + + + FFDB25 + Filter data bit + 25 + 1 + + + FFDB26 + Filter data bit + 26 + 1 + + + FFDB27 + Filter data bit + 27 + 1 + + + FFDB28 + Filter data bit + 28 + 1 + + + FFDB29 + Filter data bit + 29 + 1 + + + FFDB30 + Filter data bit + 30 + 1 + + + FFDB31 + Filter data bit + 31 + 1 + + + + + F2FB2 + F2FB2 + Filter bank 2 filtrate bit register 2 + 0x254 + 0x20 + read-write + 0x00000000 + + + FFDB0 + Filter data bit + 0 + 1 + + + FFDB1 + Filter data bit + 1 + 1 + + + FFDB2 + Filter data bit + 2 + 1 + + + FFDB3 + Filter data bit + 3 + 1 + + + FFDB4 + Filter data bit + 4 + 1 + + + FFDB5 + Filter data bit + 5 + 1 + + + FFDB6 + Filter data bit + 6 + 1 + + + FFDB7 + Filter data bit + 7 + 1 + + + FFDB8 + Filter data bit + 8 + 1 + + + FFDB9 + Filter data bit + 9 + 1 + + + FFDB10 + Filter data bit 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FFDB5 + Filter data bit + 5 + 1 + + + FFDB6 + Filter data bit + 6 + 1 + + + FFDB7 + Filter data bit + 7 + 1 + + + FFDB8 + Filter data bit + 8 + 1 + + + FFDB9 + Filter data bit + 9 + 1 + + + FFDB10 + Filter data bit + 10 + 1 + + + FFDB11 + Filter data bit + 11 + 1 + + + FFDB12 + Filter data bit + 12 + 1 + + + FFDB13 + Filter data bit + 13 + 1 + + + FFDB14 + Filter data bit + 14 + 1 + + + FFDB15 + Filter data bit + 15 + 1 + + + FFDB16 + Filter data bit + 16 + 1 + + + FFDB17 + Filter data bit + 17 + 1 + + + FFDB18 + Filter data bit + 18 + 1 + + + FFDB19 + Filter data bit + 19 + 1 + + + FFDB20 + Filter data bit + 20 + 1 + + + FFDB21 + Filter data bit + 21 + 1 + + + FFDB22 + Filter data bit + 22 + 1 + + + FFDB23 + Filter data bit + 23 + 1 + + + FFDB24 + Filter data bit + 24 + 1 + + + FFDB25 + Filter data bit + 25 + 1 + + + FFDB26 + Filter data bit + 26 + 1 + + + FFDB27 + Filter data bit + 27 + 1 + + + FFDB28 + Filter data bit + 28 + 1 + + + FFDB29 + Filter data bit + 29 + 1 + + + FFDB30 + Filter data bit + 30 + 1 + + + FFDB31 + Filter data bit + 31 + 1 + + + + + F25FB1 + F25FB1 + Filter bank 25 filtrate bit register 1 + 0x308 + 0x20 + read-write + 0x00000000 + + + FFDB0 + Filter data bit + 0 + 1 + + + FFDB1 + Filter data bit + 1 + 1 + + + FFDB2 + Filter data bit + 2 + 1 + + + FFDB3 + Filter data bit + 3 + 1 + + + FFDB4 + Filter data bit + 4 + 1 + + + FFDB5 + Filter data bit + 5 + 1 + + + FFDB6 + Filter data bit + 6 + 1 + + + FFDB7 + Filter data bit + 7 + 1 + + + FFDB8 + Filter data bit + 8 + 1 + + + FFDB9 + Filter data bit + 9 + 1 + + + FFDB10 + Filter data bit + 10 + 1 + + + FFDB11 + Filter data bit + 11 + 1 + + + FFDB12 + Filter data bit + 12 + 1 + + + FFDB13 + Filter data bit + 13 + 1 + + + FFDB14 + Filter data bit + 14 + 1 + + + FFDB15 + Filter data bit + 15 + 1 + + + FFDB16 + Filter data bit + 16 + 1 + + + FFDB17 + Filter data bit + 17 + 1 + + + FFDB18 + Filter data bit + 18 + 1 + + + FFDB19 + Filter data bit + 19 + 1 + + + FFDB20 + Filter data bit + 20 + 1 + + + FFDB21 + Filter data bit + 21 + 1 + + + FFDB22 + Filter data bit + 22 + 1 + + + FFDB23 + Filter data bit + 23 + 1 + + + FFDB24 + Filter data bit + 24 + 1 + + + FFDB25 + Filter data bit + 25 + 1 + + + FFDB26 + Filter data bit + 26 + 1 + + + FFDB27 + Filter data bit + 27 + 1 + + + FFDB28 + Filter data bit + 28 + 1 + + + FFDB29 + Filter data bit + 29 + 1 + + + FFDB30 + Filter data bit + 30 + 1 + + + FFDB31 + Filter data bit + 31 + 1 + + + + + F25FB2 + F25FB2 + Filter bank 25 filtrate bit register 2 + 0x30C + 0x20 + read-write + 0x00000000 + + + FFDB0 + Filter data bit + 0 + 1 + + + FFDB1 + Filter data bit + 1 + 1 + + + FFDB2 + Filter data bit + 2 + 1 + + + FFDB3 + Filter data bit + 3 + 1 + + + FFDB4 + Filter data bit + 4 + 1 + + + FFDB5 + Filter data bit + 5 + 1 + + + FFDB6 + Filter data bit + 6 + 1 + + + FFDB7 + Filter data bit + 7 + 1 + + + FFDB8 + Filter data bit + 8 + 1 + + + FFDB9 + Filter data bit + 9 + 1 + + + FFDB10 + Filter data bit + 10 + 1 + + + FFDB11 + Filter data bit + 11 + 1 + + + FFDB12 + Filter data bit + 12 + 1 + + + FFDB13 + Filter data bit + 13 + 1 + + + FFDB14 + Filter data bit + 14 + 1 + + + FFDB15 + Filter data bit + 15 + 1 + + + FFDB16 + Filter data bit + 16 + 1 + + + FFDB17 + Filter data bit + 17 + 1 + + + FFDB18 + Filter data bit + 18 + 1 + + + FFDB19 + Filter data bit + 19 + 1 + + + FFDB20 + Filter data bit + 20 + 1 + + + FFDB21 + Filter data bit + 21 + 1 + + + FFDB22 + Filter data bit + 22 + 1 + + + FFDB23 + Filter data bit + 23 + 1 + + + FFDB24 + Filter data bit + 24 + 1 + + + FFDB25 + Filter data bit + 25 + 1 + + + FFDB26 + Filter data bit + 26 + 1 + + + FFDB27 + Filter data bit + 27 + 1 + + + FFDB28 + Filter data bit + 28 + 1 + + + FFDB29 + Filter data bit + 29 + 1 + + + FFDB30 + Filter data bit + 30 + 1 + + + FFDB31 + Filter data bit + 31 + 1 + + + + + F26FB1 + F26FB1 + Filter bank 26 filtrate bit register 1 + 0x310 + 0x20 + read-write + 0x00000000 + + + FFDB0 + Filter data bit + 0 + 1 + + + FFDB1 + Filter data bit + 1 + 1 + + + FFDB2 + Filter data bit + 2 + 1 + + + FFDB3 + Filter data bit + 3 + 1 + + + FFDB4 + Filter data bit + 4 + 1 + + + FFDB5 + Filter data bit + 5 + 1 + + + FFDB6 + Filter data bit + 6 + 1 + + + FFDB7 + Filter data bit + 7 + 1 + + + FFDB8 + Filter data bit + 8 + 1 + + + FFDB9 + Filter data bit + 9 + 1 + + + FFDB10 + Filter data bit + 10 + 1 + + + FFDB11 + Filter data bit + 11 + 1 + + + FFDB12 + Filter data bit + 12 + 1 + + + FFDB13 + Filter data bit + 13 + 1 + + + FFDB14 + Filter data bit + 14 + 1 + + + FFDB15 + Filter data bit + 15 + 1 + + + FFDB16 + Filter data bit + 16 + 1 + + + FFDB17 + Filter data bit + 17 + 1 + + + FFDB18 + Filter data bit + 18 + 1 + + + FFDB19 + Filter data bit + 19 + 1 + + + FFDB20 + Filter data bit + 20 + 1 + + + FFDB21 + Filter data bit + 21 + 1 + + + FFDB22 + Filter data bit + 22 + 1 + + + FFDB23 + Filter data bit + 23 + 1 + + + FFDB24 + Filter data bit + 24 + 1 + + + FFDB25 + Filter data bit + 25 + 1 + + + FFDB26 + Filter data bit + 26 + 1 + + + FFDB27 + Filter data bit + 27 + 1 + + + FFDB28 + Filter data bit + 28 + 1 + + + FFDB29 + Filter data bit + 29 + 1 + + + FFDB30 + Filter data bit + 30 + 1 + + + FFDB31 + Filter data bit + 31 + 1 + + + + + F26FB2 + F26FB2 + Filter bank 26 filtrate bit register 2 + 0x314 + 0x20 + read-write + 0x00000000 + + + FFDB0 + Filter data bit + 0 + 1 + + + FFDB1 + Filter data bit + 1 + 1 + + + FFDB2 + Filter data bit + 2 + 1 + + + FFDB3 + Filter data bit + 3 + 1 + + + FFDB4 + Filter data bit + 4 + 1 + + + FFDB5 + Filter data bit + 5 + 1 + + + FFDB6 + Filter data bit + 6 + 1 + + + FFDB7 + Filter data bit + 7 + 1 + + + FFDB8 + Filter data bit + 8 + 1 + + + FFDB9 + Filter data bit + 9 + 1 + + + FFDB10 + Filter data bit + 10 + 1 + + + FFDB11 + Filter data bit + 11 + 1 + + + FFDB12 + Filter data bit + 12 + 1 + + + FFDB13 + Filter data bit + 13 + 1 + + + FFDB14 + Filter data bit + 14 + 1 + + + FFDB15 + Filter data bit + 15 + 1 + + + FFDB16 + Filter data bit + 16 + 1 + + + FFDB17 + Filter data bit + 17 + 1 + + + FFDB18 + Filter data bit + 18 + 1 + + + FFDB19 + Filter data bit + 19 + 1 + + + FFDB20 + Filter data bit + 20 + 1 + + + FFDB21 + Filter data bit + 21 + 1 + + + FFDB22 + Filter data bit + 22 + 1 + + + FFDB23 + Filter data bit + 23 + 1 + + + FFDB24 + Filter data bit + 24 + 1 + + + FFDB25 + Filter data bit + 25 + 1 + + + FFDB26 + Filter data bit + 26 + 1 + + + FFDB27 + Filter data bit + 27 + 1 + + + FFDB28 + Filter data bit + 28 + 1 + + + FFDB29 + Filter data bit + 29 + 1 + + + FFDB30 + Filter data bit + 30 + 1 + + + FFDB31 + Filter data bit + 31 + 1 + + + + + F27FB1 + F27FB1 + Filter bank 27 filtrate bit register 1 + 0x318 + 0x20 + read-write + 0x00000000 + + + FFDB0 + Filter data bit + 0 + 1 + + + FFDB1 + Filter data bit + 1 + 1 + + + FFDB2 + Filter data bit + 2 + 1 + + + FFDB3 + Filter data bit + 3 + 1 + + + FFDB4 + Filter data bit + 4 + 1 + + + FFDB5 + Filter data bit + 5 + 1 + + + FFDB6 + Filter data bit + 6 + 1 + + + FFDB7 + Filter data bit + 7 + 1 + + + FFDB8 + Filter data bit + 8 + 1 + + + FFDB9 + Filter data bit + 9 + 1 + + + FFDB10 + Filter data bit + 10 + 1 + + + FFDB11 + Filter data bit + 11 + 1 + + + FFDB12 + Filter data bit + 12 + 1 + + + FFDB13 + Filter data bit + 13 + 1 + + + FFDB14 + Filter data bit + 14 + 1 + + + FFDB15 + Filter data bit + 15 + 1 + + + FFDB16 + Filter data bit + 16 + 1 + + + FFDB17 + Filter data bit + 17 + 1 + + + FFDB18 + Filter data bit + 18 + 1 + + + FFDB19 + Filter data bit + 19 + 1 + + + FFDB20 + Filter data bit + 20 + 1 + + + FFDB21 + Filter data bit + 21 + 1 + + + FFDB22 + Filter data bit + 22 + 1 + + + FFDB23 + Filter data bit + 23 + 1 + + + FFDB24 + Filter data bit + 24 + 1 + + + FFDB25 + Filter data bit + 25 + 1 + + + FFDB26 + Filter data bit + 26 + 1 + + + FFDB27 + Filter data bit + 27 + 1 + + + FFDB28 + Filter data bit + 28 + 1 + + + FFDB29 + Filter data bit + 29 + 1 + + + FFDB30 + Filter data bit + 30 + 1 + + + FFDB31 + Filter data bit + 31 + 1 + + + + + F27FB2 + F27FB2 + Filter bank 27 filtrate bit register 2 + 0x31C + 0x20 + read-write + 0x00000000 + + + FFDB0 + Filter data bit + 0 + 1 + + + FFDB1 + Filter data bit + 1 + 1 + + + FFDB2 + Filter data bit + 2 + 1 + + + FFDB3 + Filter data bit + 3 + 1 + + + FFDB4 + Filter data bit + 4 + 1 + + + FFDB5 + Filter data bit + 5 + 1 + + + FFDB6 + Filter data bit + 6 + 1 + + + FFDB7 + Filter data bit + 7 + 1 + + + FFDB8 + Filter data bit + 8 + 1 + + + FFDB9 + Filter data bit + 9 + 1 + + + FFDB10 + Filter data bit + 10 + 1 + + + FFDB11 + Filter data bit + 11 + 1 + + + FFDB12 + Filter data bit + 12 + 1 + + + FFDB13 + Filter data bit + 13 + 1 + + + FFDB14 + Filter data bit + 14 + 1 + + + FFDB15 + Filter data bit + 15 + 1 + + + FFDB16 + Filter data bit + 16 + 1 + + + FFDB17 + Filter data bit + 17 + 1 + + + FFDB18 + Filter data bit + 18 + 1 + + + FFDB19 + Filter data bit + 19 + 1 + + + FFDB20 + Filter data bit + 20 + 1 + + + FFDB21 + Filter data bit + 21 + 1 + + + FFDB22 + Filter data bit + 22 + 1 + + + FFDB23 + Filter data bit + 23 + 1 + + + FFDB24 + Filter data bit + 24 + 1 + + + FFDB25 + Filter data bit + 25 + 1 + + + FFDB26 + Filter data bit + 26 + 1 + + + FFDB27 + Filter data bit + 27 + 1 + + + FFDB28 + Filter data bit + 28 + 1 + + + FFDB29 + Filter data bit + 29 + 1 + + + FFDB30 + Filter data bit + 30 + 1 + + + FFDB31 + Filter data bit + 31 + 1 + + + + + + + CAN2 + 0x40006800 + + CAN2_TX + CAN2 TX interrupt + 63 + + + CAN2_RX0 + CAN2 RX0 interrupt + 64 + + + CAN2_RX1 + CAN2 RX1 interrupt + 65 + + + CAN2_SE + CAN2 SE interrupt + 66 + + + + DAC + Digital to analog converter + DAC + 0x40007400 + + 0x0 + 0x400 + registers + + + + CTRL + CTRL + Control register (DAC_CTRL) + 0x0 + 0x20 + read-write + 0x00000000 + + + D1EN + DAC1 enable + 0 + 1 + + + D1OBDIS + DAC1 output buffer disable + 1 + 1 + + + D1TRGEN + DAC1 trigger enable + 2 + 1 + + + D1TRGSEL + DAC1 trigger selection + 3 + 3 + + + D1NM + DAC1 noise/triangle wave generation enable + 6 + 2 + + + D1NBSEL + DAC1 mask/amplitude selector + 8 + 4 + + + D1DMAEN + DAC1 DMA enable + 12 + 1 + + + D1DMAUDRIEN + DAC1 DMA underrun interrupt enable + 13 + 1 + + + D2EN + DAC2 enable + 16 + 1 + + + D2OBDIS + DAC2 output buffer disable + 17 + 1 + + + D2TRGEN + DAC2 trigger enable + 18 + 1 + + + D2TRGSEL + DAC2 trigger selection + 19 + 3 + + + D2NM + DAC2 noise/triangle wave generation enable + 22 + 2 + + + D2NBSEL + DAC2 mask/amplitude selector + 24 + 4 + + + D2DMAEN + DAC2 DMA enable + 28 + 1 + + + D2DMAUDRIEN + DAC2 DMA underrun interrupt enable + 29 + 1 + + + + + SWTRG + SWTRG + DAC software trigger register(DAC_SWTRIGR) + 0x4 + 0x20 + write-only + 0x00000000 + + + D1SWTRG + DAC1 software trigger + 0 + 1 + + + D2SWTRG + DAC2 software trigger + 1 + 1 + + + + + D1DTH12R + D1DTH12R + DAC1 12-bit right-aligned data holding register(DAC_D1DTH12R) + 0x8 + 0x20 + read-write + 0x00000000 + + + D1DT12R + DAC1 12-bit right-aligned data + 0 + 12 + + + + + D1DTH12L + D1DTH12L + DAC1 12-bit left aligned data holding register (DAC_D1DTH12L) + 0xC + 0x20 + read-write + 0x00000000 + + + D1DT12L + DAC1 12-bit left-aligned data + 4 + 12 + + + + + D1DTH8R + D1DTH8R + DAC1 8-bit right aligned data holding register (DAC_D1DTH8R) + 0x10 + 0x20 + read-write + 0x00000000 + + + D1DT8R + DAC1 8-bit right-aligned data + 0 + 8 + + + + + D2DTH12R + D2DTH12R + DAC2 12-bit right aligned data holding register (DAC_D2DTH12R) + 0x14 + 0x20 + read-write + 0x00000000 + + + D2DT12R + DAC2 12-bit right-aligned + data + 0 + 12 + + + + + D2DTH12L + D2DTH12L + DAC2 12-bit left aligned data holding register (DAC_D2DTH12L) + 0x18 + 0x20 + read-write + 0x00000000 + + + D2DT12L + DAC2 12-bit left-aligned data + 4 + 12 + + + + + D2DTH8R + D2DTH8R + DAC2 8-bit right-aligned data holding register (DAC_D2DTH8R) + 0x1C + 0x20 + read-write + 0x00000000 + + + D2DT8R + DAC2 8-bit right-aligned + data + 0 + 8 + + + + + DDTH12R + DDTH12R + Dual DAC 12-bit right-aligned data holding register (DAC_DDTH12R), Bits 31:28 Reserved, Bits 15:12 Reserved + 0x20 + 0x20 + read-write + 0x00000000 + + + DD1DT12R + DAC1 12-bit right-aligned data + 0 + 12 + + + DD2DT12R + DAC2 12-bit right-aligned data + 16 + 12 + + + + + DDTH12L + DDTH12L + DUAL DAC 12-bit left aligned data holding register (DAC_DDTH12L), Bits 19:16 Reserved, Bits 3:0 Reserved + 0x24 + 0x20 + read-write + 0x00000000 + + + DD1DT12L + DAC1 12-bit left-aligned data + 4 + 12 + + + DD2DT12L + DAC2 12-bit right-aligned data + 20 + 12 + + + + + DDTH8R + DDTH8R + DUAL DAC 8-bit right aligned data holding register (DAC_DDTH8R), Bits 31:16 Reserved + 0x28 + 0x20 + read-write + 0x00000000 + + + DD1DT8R + DAC1 8-bit right-aligned data + 0 + 8 + + + DD2DT8R + DAC2 8-bit right-aligned data + 8 + 8 + + + + + D1ODT + D1ODT + DAC1 data output register (DAC_D1ODT) + 0x2C + 0x20 + read-only + 0x00000000 + + + D1ODT + DAC1 data output + 0 + 12 + + + + + D2ODT + D2ODT + DAC2 data output register (DAC_D2ODT) + 0x30 + 0x20 + read-only + 0x00000000 + + + D2ODT + DAC2 data output + 0 + 12 + + + + + STS + STS + DAC2 status register + (DAC_STS) + 0x34 + 0x20 + read-write + 0x00000000 + + + DMAUDR1 + DAC1 DMA underrun flag + 13 + 1 + + + DMAUDR2 + DAC2 DMA underrun flag + 29 + 1 + + + + + + + DEBUG + Debug support + DEBUG + 0xE0042000 + + 0x0 + 0x400 + registers + + + + IDCODE + IDCODE + DEBUG IDCODE + 0x0 + 0x20 + read-only + 0x0 + + + PID + Product ID + 0 + 32 + + + + + CTRL + CTRL + DEBUG CTRL + 0x4 + 0x20 + read-write + 0x0 + + + SLEEP_DEBUG + SLEEP_DEBUG + 0 + 1 + + + DEEPSLEEP_DEBUG + DEEPSLEEP_DEBUG + 1 + 1 + + + STANDBY_DEBUG + STANDBY_DEBUG + 2 + 1 + + + + + APB1_PAUSE + APB1_PAUSE + DEBUG APB1 PAUSE + 0x8 + 0x20 + read-write + 0x0 + + + TMR2_PAUSE + TMR2_PAUSE + 0 + 1 + + + TMR3_PAUSE + TMR3_PAUSE + 1 + 1 + + + TMR4_PAUSE + TMR4_PAUSE + 2 + 1 + + + TMR5_PAUSE + TMR5_PAUSE + 3 + 1 + + + TMR6_PAUSE + TMR6_PAUSE + 4 + 1 + + + TMR7_PAUSE + TMR7_PAUSE + 5 + 1 + + + TMR12_PAUSE + TMR12_PAUSE + 6 + 1 + + + TMR13_PAUSE + TMR13_PAUSE + 7 + 1 + + + TMR14_PAUSE + TMR14_PAUSE + 8 + 1 + + + ERTC_PAUSE + ERTC_PAUSE + 10 + 1 + + + WWDT_PAUSE + WWDT_PAUSE + 11 + 1 + + + WDT_PAUSE + WDT_PAUSE + 12 + 1 + + + ERTC512_PAUSE + ERTC512_PAUSE + 15 + 1 + + + I2C1_SMBUS_TIMEOUT + I2C1_SMBUS_TIMEOUT + 24 + 1 + + + CAN1_PAUSE + CAN1_PAUSE + 25 + 1 + + + CAN2_PAUSE + CAN2_PAUSE + 26 + 1 + + + I2C2_SMBUS_TIMEOUT + I2C2_SMBUS_TIMEOUT + 27 + 1 + + + I2C3_SMBUS_TIMEOUT + I2C3_SMBUS_TIMEOUT + 28 + 1 + + + + + APB2_PAUSE + APB2_PAUSE + DEBUG APB2 PAUSE + 0xC + 0x20 + read-write + 0x0 + + + TMR1_PAUSE + TMR1_PAUSE + 0 + 1 + + + TMR8_PAUSE + TMR8_PAUSE + 1 + 1 + + + TMR20_PAUSE + TIM20_PAUSE + 6 + 1 + + + TMR9_PAUSE + TMR9_PAUSE + 16 + 1 + + + TMR10_PAUSE + TMR10_PAUSE + 17 + 1 + + + TMR11_PAUSE + TMR11_PAUSE + 18 + 1 + + + + + SER_ID + SER_ID + SERIES ID + 0x20 + 0x20 + read-only + 0x0 + + + REV_ID + version ID + 0 + 3 + + + SER_ID + series ID + 8 + 8 + + + + + + + UART4 + Universal asynchronous receiver transmitter + 0x40004C00 + + UART4 + UART4 global interrupt + 52 + + + + UART5 + Universal asynchronous receiver transmitter + 0x40005000 + + UART5 + UART5 global interrupt + 53 + + + + UART7 + Universal asynchronous receiver transmitter + 0x40007800 + + UART7 + UART7 global interrupt + 82 + + + + UART8 + Universal asynchronous receiver transmitter + 0x40007C00 + + UART8 + UART8 global interrupt + 83 + + + + CRC + CRC calculation unit + CRC + 0x40023000 + + 0x0 + 0x400 + registers + + + + DT + DT + Data register + 0x0 + 0x20 + read-write + 0xFFFFFFFF + + + DT + Data Register + 0 + 32 + + + + + CDT + CDT + Common data register + 0x4 + 0x20 + read-write + 0x00000000 + + + CDT + Common Data + 0 + 1 + + + + + CTRL + CTRL + Control register + 0x8 + 0x20 + read-write + 0x00000000 + + + RST + Reset bit + 0 + 1 + + + REVID + Reverse input data + 5 + 2 + + + REVOD + Reverse output data + 7 + 1 + + + + + IDT + IDT + Initial data register + 0x10 + 0x20 + read-write + 0xFFFFFFFF + + + IDT + Initial Data + 0 + 32 + + + + + + + FLASH + Flash memory controler + FLASH + 0x40023C00 + + 0x0 + 0x400 + registers + + + FLASH + Flash global interrupt + 4 + + + + PSR + PSR + Performance selection register + 0x0 + 0x20 + 0x00000330 + + + NZW_BST_STS + Flash non-zero wait area boost status + 13 + 1 + read-only + + + NZW_BST + Flash non-zero wait area boost + 12 + 1 + read-write + + + + + UNLOCK + UNLOCK + Unlock register + 0x4 + 0x20 + write-only + 0x00000000 + + + UKVAL + Unlock key value + 0 + 32 + + + + + USD_UNLOCK + USD_UNLOCK + USD unlock register + 0x8 + 0x20 + write-only + 0x00000000 + + + USD_UKVAL + User system data Unlock key value + 0 + 32 + + + + + STS + STS + Status register + 0xC + 0x20 + 0x00000000 + + + ODF + Operate done flag + 5 + 1 + read-write + + + EPPERR + Erase/program protection error + 4 + 1 + read-write + + + PRGMERR + program error + 2 + 1 + read-write + + + OBF + Operate busy flag + 0 + 1 + read-only + + + + + CTRL + CTRL + Control register + 0x10 + 0x20 + read-write + 0x00000080 + + + FPRGM + Flash program + 0 + 1 + + + SECERS + Sector erase + 1 + 1 + + + BANKERS + Bank erase + 2 + 1 + + + BLKERS + Block erase + 3 + 1 + + + USDPRGM + User system data program + 4 + 1 + + + USDERS + User system data erase + 5 + 1 + + + ERSTR + Erasing start + 6 + 1 + + + OPLK + Operation lock + 7 + 1 + + + USDULKS + User system data unlock success + 9 + 1 + + + ERRIE + Error interrupt enable + 10 + 1 + + + ODFIE + Operation done flag interrupt enable + 12 + 1 + + + + + ADDR + ADDR + Address register + 0x14 + 0x20 + write-only + 0x00000000 + + + FA + Flash Address + 0 + 32 + + + + + USD + USD + User system data register + 0x1C + 0x20 + read-only + 0x03FFFFFC + + + USDERR + User system data error + 0 + 1 + + + FAP + FLASH access protection + 1 + 1 + + + nWDT_ATO_EN + WDT auto enable + 2 + 1 + + + nDEPSLP_RST + Deepsleep reset + 3 + 1 + + + nSTDBY_RST + Standby reset + 4 + 1 + + + BTOPT + boot option + 5 + 1 + + + nWDT_DEPSLP + WDT deep sleep + 7 + 1 + + + nWDT_STDBY + WDT standby + 8 + 1 + + + USER_D0 + User data 0 + 10 + 8 + + + USER_D1 + User data 1 + 18 + 8 + + + + + EPPS0 + EPPS0 + Erase/program protection status register 0 + 0x20 + 0x20 + read-only + 0xFFFFFFFF + + + EPPS + Erase/program protection status + 0 + 32 + + + + + EPPS1 + EPPS1 + Erase/program protection status register 1 + 0x2C + 0x20 + read-only + 0xFFFFFFFF + + + EPPS + Erase/program protection status + 0 + 32 + + + + + UNLOCK2 + UNLOCK2 + Unlock 2 register + 0x44 + 0x20 + write-only + 0x00000000 + + + UKVAL + Unlock key value + 0 + 32 + + + + + STS2 + STS2 + Status 2 register + 0x4C + 0x20 + 0x00000000 + + + OBF + Operate busy flag + 0 + 1 + read-only + + + PRGMERR + program error + 2 + 1 + read-write + + + EPPERR + Erase/program protection error + 4 + 1 + read-write + + + ODF + Operate done flag + 5 + 1 + read-write + + + + + CTRL2 + CTRL2 + Control 2 register + 0x50 + 0x20 + read-write + 0x00000080 + + + FPRGM + Flash program + 0 + 1 + + + SECERS + Sector erase + 1 + 1 + + + BANKERS + Bank erase + 2 + 1 + + + BLKERS + Block erase + 3 + 1 + + + ERSTR + Erasing start + 6 + 1 + + + OPLK + Operation lock + 7 + 1 + + + ERRIE + Error interrupt enable + 10 + 1 + + + ODFIE + Operation done flag interrupt enable + 12 + 1 + + + + + ADDR2 + ADDR2 + Address 2 register + 0x54 + 0x20 + write-only + 0x00000000 + + + FA + Flash Address + 0 + 32 + + + + + CONTR + CONTR + Flash continue read register + 0x58 + 0x20 + read-write + 0x00000080 + + + FCONTR_EN + Flash continue read enable + 31 + 1 + + + + + DIVR + DIVR + Flash divider register + 0x60 + 0x20 + 0x00000022 + + + FDIV + Flash divider + 0 + 2 + read-write + + + FDIV_STS + Flash divider status + 4 + 2 + read-only + + + + + SLIB_STS2 + SLIB_STS2 + sLib status 2 register + 0xC8 + 0x20 + 0x0000FFFF + + + SLIB_INST_SS + sLib instruction start sector + 0 + 16 + read-only + + + + + SLIB_STS0 + SLIB_STS0 + sLib status 0 register + 0xCC + 0x20 + 0x00000000 + + + SLIB_ENF + sLib enabled flag + 3 + 1 + read-only + + + + + SLIB_STS1 + SLIB_STS1 + sLib status 1 register + 0xD0 + 0x20 + 0xFFFFFFFF + + + SLIB_SS + sLib start sector + 0 + 16 + read-only + + + SLIB_ES + sLib end sector + 16 + 16 + read-only + + + + + SLIB_PWD_CLR + SLIB_PWD_CLR + SLIB password clear register + 0xD4 + 0x20 + 0x00000000 + write-only + + + SLIB_PCLR_VAL + sLib password clear value + 0 + 32 + + + + + SLIB_MISC_STS + SLIB_MISC_STS + sLib misc status register + 0xD8 + 0x20 + 0x01000000 + + + SLIB_PWD_ERR + sLib password error + 0 + 1 + read-only + + + SLIB_PWD_OK + sLib password ok + 1 + 1 + read-only + + + SLIB_ULKF + sLib unlock flag + 2 + 1 + read-only + + + SLIB_RCNT + sLib remaining count + 16 + 9 + read-only + + + + + SLIB_SET_PWD + SLIB_SET_PWD + sLib password setting register + 0xDC + 0x20 + 0x00000000 + write-only + + + SLIB_PSET_VAL + sLib password setting val + 0 + 32 + + + + + SLIB_SET_RANGE0 + SLIB_SET_RANGE0 + Configure sLib range register 0 + 0xE0 + 0x20 + 0x00000000 + write-only + + + SLIB_SS_SET + sLib start sector setting + 0 + 16 + + + SLIB_ES_SET + sLib end sector setting + 16 + 16 + + + + + SLIB_SET_RANGE1 + SLIB_SET_RANGE1 + Configure sLib range register 1 + 0xE4 + 0x20 + 0x00000000 + write-only + + + SLIB_ISS_SET + sLib instruction start sector setting + 0 + 16 + + + SET_SLIB_STRT + sLib start setting + 31 + 1 + + + + + SLIB_UNLOCK + SLIB_UNLOCK + sLib unlock register + 0xF0 + 0x20 + 0x00000000 + write-only + + + SLIB_UKVAL + sLib unlock key value + 0 + 32 + + + + + CRC_CTRL + CRC_CTRL + CRC controler register + 0xF4 + 0x20 + 0x00000000 + write-only + + + CRC_SS + CRC start sector + 0 + 12 + + + CRC_SN + CRC sector numbler + 12 + 12 + + + CRC_STRT + CRC start + 31 + 1 + + + + + CRC_CHKR + CRC_CHKR + CRC check result register + 0xF8 + 0x20 + 0x00000000 + read-only + + + CRC_CHKR + CRC check result + 0 + 32 + + + + + + + NVIC + Nested Vectored Interrupt + Controller + NVIC + 0xE000E000 + + 0x0 + 0x1001 + registers + + + + ICTR + ICTR + Interrupt Controller Type + Register + 0x4 + 0x20 + read-only + 0x00000000 + + + INTLINESNUM + Total number of interrupt lines in + groups + 0 + 4 + + + + + STIR + STIR + Software Triggered Interrupt + Register + 0xF00 + 0x20 + write-only + 0x00000000 + + + INTID + interrupt to be triggered + 0 + 9 + + + + + ISER0 + ISER0 + Interrupt Set-Enable Register + 0x100 + 0x20 + read-write + 0x00000000 + + + SETENA + SETENA + 0 + 32 + + + + + ISER1 + ISER1 + Interrupt Set-Enable Register + 0x104 + 0x20 + read-write + 0x00000000 + + + SETENA + SETENA + 0 + 32 + + + + + ICER0 + ICER0 + Interrupt Clear-Enable + Register + 0x180 + 0x20 + read-write + 0x00000000 + + + CLRENA + CLRENA + 0 + 32 + + + + + ICER1 + ICER1 + Interrupt Clear-Enable + Register + 0x184 + 0x20 + read-write + 0x00000000 + + + CLRENA + CLRENA + 0 + 32 + + + + + ISPR0 + ISPR0 + Interrupt Set-Pending Register + 0x200 + 0x20 + read-write + 0x00000000 + + + SETPEND + SETPEND + 0 + 32 + + + + + ISPR1 + ISPR1 + Interrupt Set-Pending Register + 0x204 + 0x20 + read-write + 0x00000000 + + + SETPEND + SETPEND + 0 + 32 + + + + + ICPR0 + ICPR0 + Interrupt Clear-Pending + Register + 0x280 + 0x20 + read-write + 0x00000000 + + + CLRPEND + CLRPEND + 0 + 32 + + + + + ICPR1 + ICPR1 + Interrupt Clear-Pending + Register + 0x284 + 0x20 + read-write + 0x00000000 + + + CLRPEND + CLRPEND + 0 + 32 + + + + + IABR0 + IABR0 + Interrupt Active Bit Register + 0x300 + 0x20 + read-only + 0x00000000 + + + ACTIVE + ACTIVE + 0 + 32 + + + + + IABR1 + IABR1 + Interrupt Active Bit Register + 0x304 + 0x20 + read-only + 0x00000000 + + + ACTIVE + ACTIVE + 0 + 32 + + + + + IPR0 + IPR0 + Interrupt Priority Register + 0x400 + 0x20 + read-write + 0x00000000 + + + IPR_N0 + IPR_N0 + 0 + 8 + + + IPR_N1 + IPR_N1 + 8 + 8 + + + IPR_N2 + IPR_N2 + 16 + 8 + + + IPR_N3 + IPR_N3 + 24 + 8 + + + + + IPR1 + IPR1 + Interrupt Priority Register + 0x404 + 0x20 + read-write + 0x00000000 + + + IPR_N0 + IPR_N0 + 0 + 8 + + + IPR_N1 + IPR_N1 + 8 + 8 + + + IPR_N2 + IPR_N2 + 16 + 8 + + + IPR_N3 + IPR_N3 + 24 + 8 + + + + + IPR2 + IPR2 + Interrupt Priority Register + 0x408 + 0x20 + read-write + 0x00000000 + + + IPR_N0 + IPR_N0 + 0 + 8 + + + IPR_N1 + IPR_N1 + 8 + 8 + + + IPR_N2 + IPR_N2 + 16 + 8 + + + IPR_N3 + IPR_N3 + 24 + 8 + + + + + IPR3 + IPR3 + Interrupt Priority Register + 0x40C + 0x20 + read-write + 0x00000000 + + + IPR_N0 + IPR_N0 + 0 + 8 + + + IPR_N1 + IPR_N1 + 8 + 8 + + + IPR_N2 + IPR_N2 + 16 + 8 + + + IPR_N3 + IPR_N3 + 24 + 8 + + + + + IPR4 + IPR4 + Interrupt Priority Register + 0x410 + 0x20 + read-write + 0x00000000 + + + IPR_N0 + IPR_N0 + 0 + 8 + + + IPR_N1 + IPR_N1 + 8 + 8 + + + IPR_N2 + IPR_N2 + 16 + 8 + + + IPR_N3 + IPR_N3 + 24 + 8 + + + + + IPR5 + IPR5 + Interrupt Priority Register + 0x414 + 0x20 + read-write + 0x00000000 + + + IPR_N0 + IPR_N0 + 0 + 8 + + + IPR_N1 + IPR_N1 + 8 + 8 + + + IPR_N2 + IPR_N2 + 16 + 8 + + + IPR_N3 + IPR_N3 + 24 + 8 + + + + + IPR6 + IPR6 + Interrupt Priority Register + 0x418 + 0x20 + read-write + 0x00000000 + + + IPR_N0 + IPR_N0 + 0 + 8 + + + IPR_N1 + IPR_N1 + 8 + 8 + + + IPR_N2 + IPR_N2 + 16 + 8 + + + IPR_N3 + IPR_N3 + 24 + 8 + + + + + IPR7 + IPR7 + Interrupt Priority Register + 0x41C + 0x20 + read-write + 0x00000000 + + + IPR_N0 + IPR_N0 + 0 + 8 + + + IPR_N1 + IPR_N1 + 8 + 8 + + + IPR_N2 + IPR_N2 + 16 + 8 + + + IPR_N3 + IPR_N3 + 24 + 8 + + + + + IPR8 + IPR8 + Interrupt Priority Register + 0x420 + 0x20 + read-write + 0x00000000 + + + IPR_N0 + IPR_N0 + 0 + 8 + + + IPR_N1 + IPR_N1 + 8 + 8 + + + IPR_N2 + IPR_N2 + 16 + 8 + + + IPR_N3 + IPR_N3 + 24 + 8 + + + + + IPR9 + IPR9 + Interrupt Priority Register + 0x424 + 0x20 + read-write + 0x00000000 + + + IPR_N0 + IPR_N0 + 0 + 8 + + + IPR_N1 + IPR_N1 + 8 + 8 + + + IPR_N2 + IPR_N2 + 16 + 8 + + + IPR_N3 + IPR_N3 + 24 + 8 + + + + + IPR10 + IPR10 + Interrupt Priority Register + 0x428 + 0x20 + read-write + 0x00000000 + + + IPR_N0 + IPR_N0 + 0 + 8 + + + IPR_N1 + IPR_N1 + 8 + 8 + + + IPR_N2 + IPR_N2 + 16 + 8 + + + IPR_N3 + IPR_N3 + 24 + 8 + + + + + IPR11 + IPR11 + Interrupt Priority Register + 0x42C + 0x20 + read-write + 0x00000000 + + + IPR_N0 + IPR_N0 + 0 + 8 + + + IPR_N1 + IPR_N1 + 8 + 8 + + + IPR_N2 + IPR_N2 + 16 + 8 + + + IPR_N3 + IPR_N3 + 24 + 8 + + + + + IPR12 + IPR12 + Interrupt Priority Register + 0x430 + 0x20 + read-write + 0x00000000 + + + IPR_N0 + IPR_N0 + 0 + 8 + + + IPR_N1 + IPR_N1 + 8 + 8 + + + IPR_N2 + IPR_N2 + 16 + 8 + + + IPR_N3 + IPR_N3 + 24 + 8 + + + + + IPR13 + IPR13 + Interrupt Priority Register + 0x434 + 0x20 + read-write + 0x00000000 + + + IPR_N0 + IPR_N0 + 0 + 8 + + + IPR_N1 + IPR_N1 + 8 + 8 + + + IPR_N2 + IPR_N2 + 16 + 8 + + + IPR_N3 + IPR_N3 + 24 + 8 + + + + + IPR14 + IPR14 + Interrupt Priority Register + 0x438 + 0x20 + read-write + 0x00000000 + + + IPR_N0 + IPR_N0 + 0 + 8 + + + IPR_N1 + IPR_N1 + 8 + 8 + + + IPR_N2 + IPR_N2 + 16 + 8 + + + IPR_N3 + IPR_N3 + 24 + 8 + + + + + + + DVP + Digital video parallel interface + DVP + 0x50050000 + + 0x0 + 0x400 + registers + + + DVP + DVP global interrupt + 78 + + + + CTRL + CTRL + Control register + 0x0 + 0x20 + 0x0000 + + + LCDS + Line capture/drop selection + 20 + 1 + read-write + + + LCDC + Line capture/drop control + + 19 + 1 + read-write + + + PCDS + Pixel capture/drop selection + + 18 + 1 + read-write + + + PCDC + Basic pixel capture/drop control + + 16 + 2 + read-write + + + ENA + DVP enable + 14 + 1 + read-write + + + PDL + Pixel data length + 10 + 2 + read-write + + + BFRC + Basic frame rate control + 8 + 2 + read-write + + + VSP + Vertical synchronization + polarity + 7 + 1 + read-write + + + HSP + Horizontal synchronization polarity + + 6 + 1 + read-write + + + CKP + Pixel clock polarity + 5 + 1 + read-write + + + SM + synchronization mode + 4 + 1 + read-write + + + JPEG + JPEG format + 3 + 1 + read-write + + + CRP + Cropping function enable + 2 + 1 + read-write + + + CFM + Capture fire mode + 1 + 1 + read-write + + + CAP + Capture function enable + 0 + 1 + read-write + + + + + STS + STS + status register + 0x4 + 0x20 + read-only + 0x0000 + + + OFNE + Output FIFO Non-empty + 2 + 1 + + + VSYN + Vertical synchronization status + 1 + 1 + + + HSYN + Horizontal synchronization status + 0 + 1 + + + + + ESTS + ESTS + Event status register + 0x8 + 0x20 + read-only + 0x0000 + + + HSES + Horizontal synchronization event status + 4 + 1 + + + VSES + Vertical synchronization event status + 3 + 1 + + + ESEES + Embedded synchronization error event status + + 2 + 1 + + + OVRES + Data FIFO overrun event status + + 1 + 1 + + + CFDES + Capture frame done event status + + 0 + 1 + + + + + IENA + IENA + interrupt enable register + 0xC + 0x20 + read-write + 0x0000 + + + HSIE + Horizontal synchronization interrupt enable + + 4 + 1 + + + VSIE + Vertical synchronization interrupt enablee + + 3 + 1 + + + ESEIE + Embedded synchronization error interrupt + enable + 2 + 1 + + + OVRIE + Data FIFO overrun interrupt enable + + 1 + 1 + + + CFDIE + Capture frame done interrupt enable + + 0 + 1 + + + + + ISTS + ISTS + Interrupt status register + 0x10 + 0x20 + read-only + 0x0000 + + + HSIS + Horizontal synchronization interrupt + status + 4 + 1 + + + VSIS + Vertical synchronization interrupt + status + 3 + 1 + + + ESEIS + Embedded synchronization error + interrupt status + 2 + 1 + + + OVRIS + Data FIFO overrun interrupt + status + 1 + 1 + + + CFDIS + Capture frame done interrupt + status + 0 + 1 + + + + + ICLR + ICLR + Interrupt clear register + 0x14 + 0x20 + write-only + 0x0000 + + + HSIC + Horizontal synchronization + interrupt clear + 4 + 1 + + + VSIC + Vertical synchronization + interrupt clear + 3 + 1 + + + ESEIC + Embedded synchronization + error interrupt clear + 2 + 1 + + + OVRIC + Data FIFO overrun + interrupt clear + 1 + 1 + + + CFDIC + Capture frame done + interrupt clear + 0 + 1 + + + + + SCR + SCR + Synchronization code + register + 0x18 + 0x20 + read-write + 0x0000 + + + FMEC + Frame end code + 24 + 8 + + + LNEC + Line end code + 16 + 8 + + + LNSC + Line start code + 8 + 8 + + + FMSC + Frame start code + 0 + 8 + + + + + SUR + SUR + Synchronization unmask + register + 0x1C + 0x20 + read-write + 0x0000 + + + FMEU + Frame end unmask + 24 + 8 + + + LNEU + Line end unmask + 16 + 8 + + + LNSU + Line start unmask + + 8 + 8 + + + FMSU + Frame start unmask + + 0 + 8 + + + + + CWST + CWST + Crop window start + 0x20 + 0x20 + read-write + 0x0000 + + + CVSTR + Cropping window vertical start line + + 16 + 13 + + + CHSTR + Cropping window horizontal start pixel + + 0 + 14 + + + + + CWSZ + CWSZ + Crop window size + 0x24 + 0x20 + read-write + 0x0000 + + + CVNUM + Cropping window vertical line number + + 16 + 14 + + + CHNUM + Cropping window horizontal pixel number + + 0 + 14 + + + + + DT + DT + Data register + 0x28 + 0x20 + read-only + 0x0000 + + + DT + Data Port + 0 + 32 + + + + + ACTRL + ACTRL + Advanced Control register + + 0x40 + 0x20 + read-write + 0x0000 + + + VSEID + Vertical synchonization event and interrupt + definition + 17 + 1 + + + HSEID + Horizontal synchonization event and interrupt + definition + 16 + 1 + + + DMABT + DMA burst transfer configuration + + 12 + 1 + + + IDUS + Input data un-used setting + + 10 + 1 + + + IDUN + Input data un-used number + + 8 + 2 + + + EFDM + Enhanced function data format management + + 6 + 1 + + + EFDF + Enhanced function data format + + 4 + 2 + + + PCDES + Basic pixel capture/drop extended + selection + 3 + 1 + + + MIBE + Monochrome image binarization + enable + 2 + 1 + + + EFRCE + Enhanced frame rate control + enable + 1 + 1 + + + EISRE + Enhanced image scaling resize + enable + 0 + 1 + + + + + HSCF + HSCF + Horizontal scaling control flow + + 0x48 + 0x20 + read-write + 0x0000 + + + HSRTF + Horizontal scaling resize target factor + + 16 + 13 + + + HSRSF + Horizontal scaling resize source factor + + 0 + 13 + + + + + VSCF + VSCF + Vertical scaling control flow + + 0x4C + 0x20 + read-write + 0x0000 + + + VSRTF + Vertical scaling resize target factor + + 16 + 13 + + + VSRSF + Vertical scaling resize source factor + + 0 + 13 + + + + + FRF + FRF + Frame rate flow + + 0x50 + 0x20 + read-write + 0x0000 + + + EFRCTF + Enhanced frame rate control target factor + + 8 + 5 + + + EFRCSF + Enhanced frame rate contorl source factor + + 0 + 5 + + + + + BTH + BTH + Binarization threshold + + 0x54 + 0x20 + read-write + 0x0000 + + + MIBTHD + Monochrome image binarization threshold + + 0 + 8 + + + + + + + USB_OTG1_GLOBAL + USB on-the-go full speed + USB_OTG1 + 0x50000000 + + 0x0 + 0x400 + registers + + + OTGFS1 + USB On The Go FS global + interrupt + 67 + + + + GOTGCTL + GOTGCTL + OTGFS control and status register + (OTGFS_GOTGCTL) + 0x0 + 0x20 + 0x00000800 + + + CONIDSTS + Connector ID status + 16 + 1 + read-only + + + CURMOD + Current Mode of Operation + 21 + 1 + read-only + + + + + GOTGINT + GOTGINT + OTGFS interrupt register + (OTGFS_GOTGINT) + 0x4 + 0x20 + 0x00000000 + + + SESENDDET + VBUS is deasserted + 2 + 1 + read-write + + + + + GAHBCFG + GAHBCFG + OTGFS AHB configuration register + (OTGFS_GAHBCFG) + 0x8 + 0x20 + read-write + 0x00000000 + + + GLBINTMSK + Global interrupt mask + 0 + 1 + + + NPTXFEMPLVL + Non-Periodic TxFIFO empty level + 7 + 1 + + + PTXFEMPLVL + Periodic TxFIFO empty + level + 8 + 1 + + + + + GUSBCFG + GUSBCFG + USB configuration register + (OTGFS_GUSBCFG) + 0xC + 0x20 + 0x00000A00 + + + TOUTCAL + FS timeout calibration + 0 + 3 + read-write + + + USBTRDTIM + USB turnaround time + 10 + 4 + read-write + + + FHSTMODE + Force host mode + 29 + 1 + read-write + + + FDEVMODE + Force device mode + 30 + 1 + read-write + + + COTXPKT + Corrupt Tx packet + 31 + 1 + read-write + + + + + GRSTCTL + GRSTCTL + OTGFS reset register + (OTGFS_GRSTCTL) + 0x10 + 0x20 + 0x20000000 + + + CSFTRST + Core soft reset + 0 + 1 + read-write + + + PIUSFTRST + PIU FS Dedicated Controller Soft Reset + 1 + 1 + read-write + + + FRMCNTRST + Host frame counter reset + 2 + 1 + read-write + + + RXFFLSH + RxFIFO flush + 4 + 1 + read-write + + + TXFFLSH + TxFIFO flush + 5 + 1 + read-write + + + TXFNUM + TxFIFO number + 6 + 5 + read-write + + + AHBIDLE + AHB master idle + 31 + 1 + read-only + + + + + GINTSTS + GINTSTS + OTGFS core interrupt register + (OTGFS_GINTSTS) + 0x14 + 0x20 + 0x04000020 + + + CURMOD + Current mode of operation + 0 + 1 + read-only + + + MODEMIS + Mode mismatch interrupt + 1 + 1 + read-write + + + OTGINT + OTG interrupt + 2 + 1 + read-only + + + SOF + Start of frame + 3 + 1 + read-write + + + RXFLVL + RxFIFO non-empty + 4 + 1 + read-only + + + NPTXFEMP + Non-periodic TxFIFO empty + 5 + 1 + read-only + + + GINNAKEFF + Global IN non-periodic NAK + effective + 6 + 1 + read-only + + + GOUTNAKEFF + Global OUT NAK effective + 7 + 1 + read-only + + + ERLYSUSP + Early suspend + 10 + 1 + read-write + + + USBSUSP + USB suspend + 11 + 1 + read-write + + + USBRST + USB reset + 12 + 1 + read-write + + + ENUMDONE + Enumeration done + 13 + 1 + read-write + + + ISOOUTDROP + Isochronous OUT packet dropped + interrupt + 14 + 1 + read-write + + + EOPF + End of periodic frame + interrupt + 15 + 1 + read-write + + + IEPTINT + IN endpoint interrupt + 18 + 1 + read-only + + + OEPTINT + OUT endpoint interrupt + 19 + 1 + read-only + + + INCOMPISOIN + Incomplete isochronous IN + transfer + 20 + 1 + read-write + + + INCOMPIP_INCOMPISOOUT + Incomplete periodic transfer(Host + mode)/Incomplete isochronous OUT transfer(Device + mode) + 21 + 1 + read-write + + + PRTINT + Host port interrupt + 24 + 1 + read-only + + + HCHINT + Host channels interrupt + 25 + 1 + read-only + + + PTXFEMP + Periodic TxFIFO empty + 26 + 1 + read-only + + + CONIDSCHG + Connector ID status change + 28 + 1 + read-write + + + DISCONINT + Disconnect detected + interrupt + 29 + 1 + read-write + + + WKUPINT + Resume/remote wakeup detected + interrupt + 31 + 1 + read-write + + + + + GINTMSK + GINTMSK + OTG_FS interrupt mask register + (OTG_FS_GINTMSK) + 0x18 + 0x20 + 0x00000000 + + + MODEMISMSK + Mode mismatch interrupt + mask + 1 + 1 + read-write + + + OTGINTMSK + OTG interrupt mask + 2 + 1 + read-write + + + SOFMSK + Start of frame mask + 3 + 1 + read-write + + + RXFLVLMSK + Receive FIFO non-empty + mask + 4 + 1 + read-write + + + NPTXFEMPMSK + Non-periodic TxFIFO empty + mask + 5 + 1 + read-write + + + GINNAKEFFMSK + Global non-periodic IN NAK effective + mask + 6 + 1 + read-write + + + GOUTNAKEFFMSK + Global OUT NAK effective + mask + 7 + 1 + read-write + + + ERLYSUSPMSK + Early suspend mask + 10 + 1 + read-write + + + USBSUSPMSK + USB suspend mask + 11 + 1 + read-write + + + USBRSTMSK + USB reset mask + 12 + 1 + read-write + + + ENUMDONEMSK + Enumeration done mask + 13 + 1 + read-write + + + ISOOUTDROPMSK + Isochronous OUT packet dropped interrupt + mask + 14 + 1 + read-write + + + EOPFMSK + End of periodic frame interrupt + mask + 15 + 1 + read-write + + + IEPTINTMSK + IN endpoints interrupt + mask + 18 + 1 + read-write + + + OEPTINTMSK + OUT endpoints interrupt + mask + 19 + 1 + read-write + + + INCOMISOINMSK + Incomplete isochronous IN transfer + mask + 20 + 1 + read-write + + + INCOMPIP_INCOMPISOOUTMSK + Incomplete periodic transfer mask(Host + mode)/Incomplete isochronous OUT transfer mask(Device + mode) + 21 + 1 + read-write + + + PRTINTMSK + Host port interrupt mask + 24 + 1 + read-write + + + HCHINTMSK + Host channels interrupt + mask + 25 + 1 + read-write + + + PTXFEMPMSK + Periodic TxFIFO empty mask + 26 + 1 + read-write + + + CONIDSCHGMSK + Connector ID status change + mask + 28 + 1 + read-write + + + DISCONINTMSK + Disconnect detected interrupt + mask + 29 + 1 + read-write + + + WKUPINTMSK + Resume/remote wakeup detected interrupt + mask + 31 + 1 + read-write + + + + + GRXSTSR_Device + GRXSTSR_Device + OTGFS Receive status debug read(Device + mode) + 0x1C + 0x20 + read-only + 0x00000000 + + + EPTNUM + Endpoint number + 0 + 4 + + + BCNT + Byte count + 4 + 11 + + + DPID + Data PID + 15 + 2 + + + PKTSTS + Packet status + 17 + 4 + + + FN + Frame number + 21 + 4 + + + + + GRXSTSR_Host + GRXSTSR_Host + OTGFS Receive status debug read(Host + mode) + GRXSTSR_Device + 0x1C + 0x20 + read-only + 0x00000000 + + + CHNUM + Channel number + 0 + 4 + + + BCNT + Byte count + 4 + 11 + + + DPID + Data PID + 15 + 2 + + + PKTSTS + Packet status + 17 + 4 + + + + + GRXFSIZ + GRXFSIZ + OTGFS Receive FIFO size register + (OTGFS_GRXFSIZ) + 0x24 + 0x20 + read-write + 0x00000200 + + + RXFDEP + RxFIFO depth + 0 + 16 + + + + + DIEPTXF0 + DIEPTXF0 + IN Endpoint TxFIFO 0 transmit FIFO size + register (Device mode) + 0x28 + 0x20 + read-write + 0x00000200 + + + INEPT0TXSTADDR + Endpoint 0 transmit RAM start + address + 0 + 16 + + + INEPT0TXDEP + Endpoint 0 TxFIFO depth + 16 + 16 + + + + + GNPTXFSIZ + GNPTXFSIZ + OTGFS non-periodic transmit FIFO size + register (Host mode) + DIEPTXF0 + 0x28 + 0x20 + read-write + 0x00000200 + + + NPTXFSTADDR + Non-periodic Transmit RAM Start + address + 0 + 16 + + + NPTXFDEP + Non-periodic TxFIFO depth + 16 + 16 + + + + + GNPTXSTS + GNPTXSTS + OTGFS non-periodic transmit FIFO/queue + status register (OTGFS_GNPTXSTS) + 0x2C + 0x20 + read-only + 0x00080200 + + + NPTXFSPCAVAIL + Non-periodic TxFIFO space + available + 0 + 16 + + + NPTXQSPCAVAIL + Non-periodic transmit request queue + space available + 16 + 8 + + + NPTXQTOP + Top of the non-periodic transmit request + queue + 24 + 7 + + + + + GCCFG + GCCFG + OTGFS general core configuration register + (OTGFS_GCCFG) + 0x38 + 0x20 + read-write + 0x00000000 + + + PWRDOWN + Power down + 16 + 1 + + + LP_MODE + Low power mode + 17 + 1 + + + SOFOUTEN + SOF output enable + 20 + 1 + + + VBUSIG + VBUS Ignored + 21 + 1 + + + + + GUID + GUID + Product ID register + 0x3C + 0x20 + read-write + 0x00001000 + + + USERID + Product ID field + 0 + 32 + + + + + HPTXFSIZ + HPTXFSIZ + OTGFS Host periodic transmit FIFO size + register (OTGFS_HPTXFSIZ) + 0x100 + 0x20 + read-write + 0x02000600 + + + PTXFSTADDR + Host periodic TxFIFO start + address + 0 + 16 + + + PTXFSIZE + Host periodic TxFIFO depth + 16 + 16 + + + + + DIEPTXF1 + DIEPTXF1 + OTGFS device IN endpoint transmit FIFO size + register (OTGFS_DIEPTXF1) + 0x104 + 0x20 + read-write + 0x02000400 + + + INEPTXFSTADDR + IN endpoint FIFO1 transmit RAM start + address + 0 + 16 + + + INEPTXFDEP + IN endpoint TxFIFO depth + 16 + 16 + + + + + DIEPTXF2 + DIEPTXF2 + OTGFS device IN endpoint transmit FIFO size + register (OTGFS_DIEPTXF2) + 0x108 + 0x20 + read-write + 0x02000400 + + + INEPTXFSTADDR + IN endpoint FIFO2 transmit RAM start + address + 0 + 16 + + + INEPTXFDEP + IN endpoint TxFIFO depth + 16 + 16 + + + + + DIEPTXF3 + DIEPTXF3 + OTGFS device IN endpoint transmit FIFO size + register (OTGFS_DIEPTXF3) + 0x10C + 0x20 + read-write + 0x02000400 + + + INEPTXFSTADDR + IN endpoint FIFO3 transmit RAM start + address + 0 + 16 + + + INEPTXFDEP + IN endpoint TxFIFO depth + 16 + 16 + + + + + DIEPTXF4 + DIEPTXF4 + OTGFS device IN endpoint transmit FIFO size + register (OTGFS_DIEPTXF4) + 0x110 + 0x20 + read-write + 0x02000400 + + + INEPTXFSTADDR + IN endpoint FIFO4 transmit RAM start + address + 0 + 16 + + + INEPTXFDEP + IN endpoint TxFIFO depth + 16 + 16 + + + + + DIEPTXF5 + DIEPTXF5 + OTGFS device IN endpoint transmit FIFO size + register (OTGFS_DIEPTXF5) + 0x114 + 0x20 + read-write + 0x02000400 + + + INEPTXFSTADDR + IN endpoint FIFO5 transmit RAM start + address + 0 + 16 + + + INEPTXFDEP + IN endpoint TxFIFO depth + 16 + 16 + + + + + DIEPTXF6 + DIEPTXF6 + OTGFS device IN endpoint transmit FIFO size + register (OTGFS_DIEPTXF6) + 0x118 + 0x20 + read-write + 0x02000400 + + + INEPTXFSTADDR + IN endpoint FIFO6 transmit RAM start + address + 0 + 16 + + + INEPTXFDEP + IN endpoint TxFIFO depth + 16 + 16 + + + + + DIEPTXF7 + DIEPTXF7 + OTGFS device IN endpoint transmit FIFO size + register (OTGFS_DIEPTXF7) + 0x11C + 0x20 + read-write + 0x02000400 + + + INEPTXFSTADDR + IN endpoint FIFO7 transmit RAM start + address + 0 + 16 + + + INEPTXFDEP + IN endpoint TxFIFO depth + 16 + 16 + + + + + + + USB_OTG1_HOST + USB on the go full speed + USB_OTG1 + 0x50000400 + + 0x0 + 0x400 + registers + + + + HCFG + HCFG + OTGFS host configuration register + (OTGFS_HCFG) + 0x0 + 0x20 + 0x00000000 + + + FSLSPCLKSEL + FS/LS PHY clock select + 0 + 2 + read-write + + + FSLSSUPP + FS- and LS-only support + 2 + 1 + read-only + + + + + HFIR + HFIR + OTGFS Host frame interval + register + 0x4 + 0x20 + read-write + 0x0000EA60 + + + FRINT + Frame interval + 0 + 16 + + + + + HFNUM + HFNUM + OTGFS host frame number/frame time + remaining register (OTGFS_HFNUM) + 0x8 + 0x20 + read-only + 0x00003FFF + + + FRNUM + Frame number + 0 + 16 + + + FTREM + Frame time remaining + 16 + 16 + + + + + HPTXSTS + HPTXSTS + OTGFS_Host periodic transmit FIFO/queue + status register (OTGFS_HPTXSTS) + 0x10 + 0x20 + 0x00080100 + + + PTXFSPCAVAIL + Periodic transmit data FIFO space + available + 0 + 16 + read-write + + + PTXQSPCAVAIL + Periodic transmit request queue space + available + 16 + 8 + read-only + + + PTXQTOP + Top of the periodic transmit request + queue + 24 + 8 + read-only + + + + + HAINT + HAINT + OTGFS Host all channels interrupt + register + 0x14 + 0x20 + read-only + 0x00000000 + + + HAINT + Channel interrupts + 0 + 16 + + + + + HAINTMSK + HAINTMSK + OTGFS host all channels interrupt mask + register + 0x18 + 0x20 + read-write + 0x00000000 + + + HAINTMSK + Channel interrupt mask + 0 + 16 + + + + + HPRT + HPRT + OTGFS host port control and status register + (OTGFS_HPRT) + 0x40 + 0x20 + 0x00000000 + + + PRTCONSTS + Port connect status + 0 + 1 + read-only + + + PRTCONDET + Port connect detected + 1 + 1 + read-write + + + PRTENA + Port enable + 2 + 1 + read-write + + + PRTENCHNG + Port enable/disable change + 3 + 1 + read-write + + + PRTOVRCACT + Port overcurrent active + 4 + 1 + read-only + + + PRTOVRCCHNG + Port overcurrent change + 5 + 1 + read-write + + + PRTRES + Port resume + 6 + 1 + read-write + + + PRTSUSP + Port suspend + 7 + 1 + read-write + + + PRTRST + Port reset + 8 + 1 + read-write + + + PRTLNSTS + Port line status + 10 + 2 + read-only + + + PRTPWR + Port power + 12 + 1 + read-write + + + PRTTSTCTL + Port test control + 13 + 4 + read-write + + + PRTSPD + Port speed + 17 + 2 + read-only + + + + + HCCHAR0 + HCCHAR0 + OTGFS host channel-0 characteristics + register (OTGFS_HCCHAR0) + 0x100 + 0x20 + read-write + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + + + EPTNUM + Endpoint number + 11 + 4 + + + EPTDIR + Endpoint direction + 15 + 1 + + + LSPDDEV + Low-speed device + 17 + 1 + + + EPTYPE + Endpoint type + 18 + 2 + + + MC + Multicount + 20 + 2 + + + DEVADDR + Device address + 22 + 7 + + + ODDFRM + Odd frame + 29 + 1 + + + CHDIS + Channel disable + 30 + 1 + + + CHENA + Channel enable + 31 + 1 + + + + + HCCHAR1 + HCCHAR1 + OTGFS host channel-1 characteristics + register (OTGFS_HCCHAR1) + 0x120 + 0x20 + read-write + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + + + EPTNUM + Endpoint number + 11 + 4 + + + EPTDIR + Endpoint direction + 15 + 1 + + + LSPDDEV + Low-speed device + 17 + 1 + + + EPTYPE + Endpoint type + 18 + 2 + + + MC + Multicount + 20 + 2 + + + DEVADDR + Device address + 22 + 7 + + + ODDFRM + Odd frame + 29 + 1 + + + CHDIS + Channel disable + 30 + 1 + + + CHENA + Channel enable + 31 + 1 + + + + + HCCHAR2 + HCCHAR2 + OTGFS host channel-2 characteristics + register (OTGFS_HCCHAR2) + 0x140 + 0x20 + read-write + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + + + EPTNUM + Endpoint number + 11 + 4 + + + EPTDIR + Endpoint direction + 15 + 1 + + + LSPDDEV + Low-speed device + 17 + 1 + + + EPTYPE + Endpoint type + 18 + 2 + + + MC + Multicount + 20 + 2 + + + DEVADDR + Device address + 22 + 7 + + + ODDFRM + Odd frame + 29 + 1 + + + CHDIS + Channel disable + 30 + 1 + + + CHENA + Channel enable + 31 + 1 + + + + + HCCHAR3 + HCCHAR3 + OTGFS host channel-3 characteristics + register (OTGFS_HCCHAR3) + 0x160 + 0x20 + read-write + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + + + EPTNUM + Endpoint number + 11 + 4 + + + EPTDIR + Endpoint direction + 15 + 1 + + + LSPDDEV + Low-speed device + 17 + 1 + + + EPTYPE + Endpoint type + 18 + 2 + + + MC + Multicount + 20 + 2 + + + DEVADDR + Device address + 22 + 7 + + + ODDFRM + Odd frame + 29 + 1 + + + CHDIS + Channel disable + 30 + 1 + + + CHENA + Channel enable + 31 + 1 + + + + + HCCHAR4 + HCCHAR4 + OTGFS host channel-4 characteristics + register (OTGFS_HCCHAR4) + 0x180 + 0x20 + read-write + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + + + EPTNUM + Endpoint number + 11 + 4 + + + EPTDIR + Endpoint direction + 15 + 1 + + + LSPDDEV + Low-speed device + 17 + 1 + + + EPTYPE + Endpoint type + 18 + 2 + + + MC + Multicount + 20 + 2 + + + DEVADDR + Device address + 22 + 7 + + + ODDFRM + Odd frame + 29 + 1 + + + CHDIS + Channel disable + 30 + 1 + + + CHENA + Channel enable + 31 + 1 + + + + + HCCHAR5 + HCCHAR5 + OTGFS host channel-5 characteristics + register (OTGFS_HCCHAR5) + 0x1A0 + 0x20 + read-write + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + + + EPTNUM + Endpoint number + 11 + 4 + + + EPTDIR + Endpoint direction + 15 + 1 + + + LSPDDEV + Low-speed device + 17 + 1 + + + EPTYPE + Endpoint type + 18 + 2 + + + MC + Multicount + 20 + 2 + + + DEVADDR + Device address + 22 + 7 + + + ODDFRM + Odd frame + 29 + 1 + + + CHDIS + Channel disable + 30 + 1 + + + CHENA + Channel enable + 31 + 1 + + + + + HCCHAR6 + HCCHAR6 + OTGFS host channel-6 characteristics + register (OTGFS_HCCHAR6) + 0x1C0 + 0x20 + read-write + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + + + EPTNUM + Endpoint number + 11 + 4 + + + EPTDIR + Endpoint direction + 15 + 1 + + + LSPDDEV + Low-speed device + 17 + 1 + + + EPTYPE + Endpoint type + 18 + 2 + + + MC + Multicount + 20 + 2 + + + DEVADDR + Device address + 22 + 7 + + + ODDFRM + Odd frame + 29 + 1 + + + CHDIS + Channel disable + 30 + 1 + + + CHENA + Channel enable + 31 + 1 + + + + + HCCHAR7 + HCCHAR7 + OTGFS host channel-7 characteristics + register (OTGFS_HCCHAR7) + 0x1E0 + 0x20 + read-write + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + + + EPTNUM + Endpoint number + 11 + 4 + + + EPTDIR + Endpoint direction + 15 + 1 + + + LSPDDEV + Low-speed device + 17 + 1 + + + EPTYPE + Endpoint type + 18 + 2 + + + MC + Multicount + 20 + 2 + + + DEVADDR + Device address + 22 + 7 + + + ODDFRM + Odd frame + 29 + 1 + + + CHDIS + Channel disable + 30 + 1 + + + CHENA + Channel enable + 31 + 1 + + + + + HCCHAR8 + HCCHAR8 + OTGFS host channel-8 characteristics + register (OTGFS_HCCHAR8) + 0x200 + 0x20 + read-write + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + + + EPTNUM + Endpoint number + 11 + 4 + + + EPTDIR + Endpoint direction + 15 + 1 + + + LSPDDEV + Low-speed device + 17 + 1 + + + EPTYPE + Endpoint type + 18 + 2 + + + MC + Multicount + 20 + 2 + + + DEVADDR + Device address + 22 + 7 + + + ODDFRM + Odd frame + 29 + 1 + + + CHDIS + Channel disable + 30 + 1 + + + CHENA + Channel enable + 31 + 1 + + + + + HCCHAR9 + HCCHAR9 + OTGFS host channel-9 characteristics + register (OTGFS_HCCHAR9) + 0x220 + 0x20 + read-write + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + + + EPTNUM + Endpoint number + 11 + 4 + + + EPTDIR + Endpoint direction + 15 + 1 + + + LSPDDEV + Low-speed device + 17 + 1 + + + EPTYPE + Endpoint type + 18 + 2 + + + MC + Multicount + 20 + 2 + + + DEVADDR + Device address + 22 + 7 + + + ODDFRM + Odd frame + 29 + 1 + + + CHDIS + Channel disable + 30 + 1 + + + CHENA + Channel enable + 31 + 1 + + + + + HCCHAR10 + HCCHAR10 + OTGFS host channel-10 characteristics + register (OTGFS_HCCHAR10) + 0x240 + 0x20 + read-write + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + + + EPTNUM + Endpoint number + 11 + 4 + + + EPTDIR + Endpoint direction + 15 + 1 + + + LSPDDEV + Low-speed device + 17 + 1 + + + EPTYPE + Endpoint type + 18 + 2 + + + MC + Multicount + 20 + 2 + + + DEVADDR + Device address + 22 + 7 + + + ODDFRM + Odd frame + 29 + 1 + + + CHDIS + Channel disable + 30 + 1 + + + CHENA + Channel enable + 31 + 1 + + + + + HCCHAR11 + HCCHAR11 + OTGFS host channel-7 characteristics + register (OTGFS_HCCHAR11) + 0x260 + 0x20 + read-write + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + + + EPTNUM + Endpoint number + 11 + 4 + + + EPTDIR + Endpoint direction + 15 + 1 + + + LSPDDEV + Low-speed device + 17 + 1 + + + EPTYPE + Endpoint type + 18 + 2 + + + MC + Multicount + 20 + 2 + + + DEVADDR + Device address + 22 + 7 + + + ODDFRM + Odd frame + 29 + 1 + + + CHDIS + Channel disable + 30 + 1 + + + CHENA + Channel enable + 31 + 1 + + + + + HCCHAR12 + HCCHAR12 + OTGFS host channel-12 characteristics + register (OTGFS_HCCHAR12) + 0x280 + 0x20 + read-write + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + + + EPTNUM + Endpoint number + 11 + 4 + + + EPTDIR + Endpoint direction + 15 + 1 + + + LSPDDEV + Low-speed device + 17 + 1 + + + EPTYPE + Endpoint type + 18 + 2 + + + MC + Multicount + 20 + 2 + + + DEVADDR + Device address + 22 + 7 + + + ODDFRM + Odd frame + 29 + 1 + + + CHDIS + Channel disable + 30 + 1 + + + CHENA + Channel enable + 31 + 1 + + + + + HCCHAR13 + HCCHAR13 + OTGFS host channel-13 characteristics + register (OTGFS_HCCHAR13) + 0x2A0 + 0x20 + read-write + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + + + EPTNUM + Endpoint number + 11 + 4 + + + EPTDIR + Endpoint direction + 15 + 1 + + + LSPDDEV + Low-speed device + 17 + 1 + + + EPTYPE + Endpoint type + 18 + 2 + + + MC + Multicount + 20 + 2 + + + DEVADDR + Device address + 22 + 7 + + + ODDFRM + Odd frame + 29 + 1 + + + CHDIS + Channel disable + 30 + 1 + + + CHENA + Channel enable + 31 + 1 + + + + + HCCHAR14 + HCCHAR14 + OTGFS host channel-14 characteristics + register (OTGFS_HCCHAR14) + 0x2C0 + 0x20 + read-write + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + + + EPTNUM + Endpoint number + 11 + 4 + + + EPTDIR + Endpoint direction + 15 + 1 + + + LSPDDEV + Low-speed device + 17 + 1 + + + EPTYPE + Endpoint type + 18 + 2 + + + MC + Multicount + 20 + 2 + + + DEVADDR + Device address + 22 + 7 + + + ODDFRM + Odd frame + 29 + 1 + + + CHDIS + Channel disable + 30 + 1 + + + CHENA + Channel enable + 31 + 1 + + + + + HCCHAR15 + HCCHAR15 + OTGFS host channel-15 characteristics + register (OTGFS_HCCHAR15) + 0x2E0 + 0x20 + read-write + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + + + EPTNUM + Endpoint number + 11 + 4 + + + EPTDIR + Endpoint direction + 15 + 1 + + + LSPDDEV + Low-speed device + 17 + 1 + + + EPTYPE + Endpoint type + 18 + 2 + + + MC + Multicount + 20 + 2 + + + DEVADDR + Device address + 22 + 7 + + + ODDFRM + Odd frame + 29 + 1 + + + CHDIS + Channel disable + 30 + 1 + + + CHENA + Channel enable + 31 + 1 + + + + + HCINT0 + HCINT0 + OTGFS host channel-0 interrupt register + (OTGFS_HCINT0) + 0x108 + 0x20 + read-write + 0x00000000 + + + XFERC + Transfer completed + 0 + 1 + + + CHHLTD + Channel halted + 1 + 1 + + + STALL + STALL response received + interrupt + 3 + 1 + + + NAK + NAK response received + interrupt + 4 + 1 + + + ACK + ACK response received/transmitted + interrupt + 5 + 1 + + + XACTERR + Transaction error + 7 + 1 + + + BBLERR + Babble error + 8 + 1 + + + FRMOVRUN + Frame overrun + 9 + 1 + + + DTGLERR + Data toggle error + 10 + 1 + + + + + HCINT1 + HCINT1 + OTG_FS host channel-1 interrupt register + (OTG_FS_HCINT1) + 0x128 + 0x20 + read-write + 0x00000000 + + + XFERC + Transfer completed + 0 + 1 + + + CHHLTD + Channel halted + 1 + 1 + + + STALL + STALL response received + interrupt + 3 + 1 + + + NAK + NAK response received + interrupt + 4 + 1 + + + ACK + ACK response received/transmitted + interrupt + 5 + 1 + + + XACTERR + Transaction error + 7 + 1 + + + BBLERR + Babble error + 8 + 1 + + + FRMOVRUN + Frame overrun + 9 + 1 + + + DTGLERR + Data toggle error + 10 + 1 + + + + + HCINT2 + HCINT2 + OTGFS host channel-2 interrupt register + (OTGFS_HCINT2) + 0x148 + 0x20 + read-write + 0x00000000 + + + XFERC + Transfer completed + 0 + 1 + + + CHHLTD + Channel halted + 1 + 1 + + + STALL + STALL response received + interrupt + 3 + 1 + + + NAK + NAK response received + interrupt + 4 + 1 + + + ACK + ACK response received/transmitted + interrupt + 5 + 1 + + + XACTERR + Transaction error + 7 + 1 + + + BBLERR + Babble error + 8 + 1 + + + FRMOVRUN + Frame overrun + 9 + 1 + + + DTGLERR + Data toggle error + 10 + 1 + + + + + HCINT3 + HCINT3 + OTGFS host channel-3 interrupt register + (OTGFS_HCINT3) + 0x168 + 0x20 + read-write + 0x00000000 + + + XFERC + Transfer completed + 0 + 1 + + + CHHLTD + Channel halted + 1 + 1 + + + STALL + STALL response received + interrupt + 3 + 1 + + + NAK + NAK response received + interrupt + 4 + 1 + + + ACK + ACK response received/transmitted + interrupt + 5 + 1 + + + XACTERR + Transaction error + 7 + 1 + + + BBLERR + Babble error + 8 + 1 + + + FRMOVRUN + Frame overrun + 9 + 1 + + + DTGLERR + Data toggle error + 10 + 1 + + + + + HCINT4 + HCINT4 + OTGFS host channel-4 interrupt register + (OTGFS_HCINT4) + 0x188 + 0x20 + read-write + 0x00000000 + + + XFERC + Transfer completed + 0 + 1 + + + CHHLTD + Channel halted + 1 + 1 + + + STALL + STALL response received + interrupt + 3 + 1 + + + NAK + NAK response received + interrupt + 4 + 1 + + + ACK + ACK response received/transmitted + interrupt + 5 + 1 + + + XACTERR + Transaction error + 7 + 1 + + + BBLERR + Babble error + 8 + 1 + + + FRMOVRUN + Frame overrun + 9 + 1 + + + DTGLERR + Data toggle error + 10 + 1 + + + + + HCINT5 + HCINT5 + OTGFS host channel-5 interrupt register + (OTGFS_HCINT5) + 0x1A8 + 0x20 + read-write + 0x00000000 + + + XFERC + Transfer completed + 0 + 1 + + + CHHLTD + Channel halted + 1 + 1 + + + STALL + STALL response received + interrupt + 3 + 1 + + + NAK + NAK response received + interrupt + 4 + 1 + + + ACK + ACK response received/transmitted + interrupt + 5 + 1 + + + XACTERR + Transaction error + 7 + 1 + + + BBLERR + Babble error + 8 + 1 + + + FRMOVRUN + Frame overrun + 9 + 1 + + + DTGLERR + Data toggle error + 10 + 1 + + + + + HCINT6 + HCINT6 + OTGFS host channel-6 interrupt register + (OTGFS_HCINT6) + 0x1C8 + 0x20 + read-write + 0x00000000 + + + XFERC + Transfer completed + 0 + 1 + + + CHHLTD + Channel halted + 1 + 1 + + + STALL + STALL response received + interrupt + 3 + 1 + + + NAK + NAK response received + interrupt + 4 + 1 + + + ACK + ACK response received/transmitted + interrupt + 5 + 1 + + + XACTERR + Transaction error + 7 + 1 + + + BBLERR + Babble error + 8 + 1 + + + FRMOVRUN + Frame overrun + 9 + 1 + + + DTGLERR + Data toggle error + 10 + 1 + + + + + HCINT7 + HCINT7 + OTGFS host channel-7 interrupt register + (OTGFS_HCINT7) + 0x1E8 + 0x20 + read-write + 0x00000000 + + + XFERC + Transfer completed + 0 + 1 + + + CHHLTD + Channel halted + 1 + 1 + + + STALL + STALL response received + interrupt + 3 + 1 + + + NAK + NAK response received + interrupt + 4 + 1 + + + ACK + ACK response received/transmitted + interrupt + 5 + 1 + + + XACTERR + Transaction error + 7 + 1 + + + BBLERR + Babble error + 8 + 1 + + + FRMOVRUN + Frame overrun + 9 + 1 + + + DTGLERR + Data toggle error + 10 + 1 + + + + + HCINT8 + HCINT8 + OTGFS host channel-8 interrupt register + (OTGFS_HCINT8) + 0x208 + 0x20 + read-write + 0x00000000 + + + XFERC + Transfer completed + 0 + 1 + + + CHHLTD + Channel halted + 1 + 1 + + + STALL + STALL response received + interrupt + 3 + 1 + + + NAK + NAK response received + interrupt + 4 + 1 + + + ACK + ACK response received/transmitted + interrupt + 5 + 1 + + + XACTERR + Transaction error + 7 + 1 + + + BBLERR + Babble error + 8 + 1 + + + FRMOVRUN + Frame overrun + 9 + 1 + + + DTGLERR + Data toggle error + 10 + 1 + + + + + HCINT9 + HCINT9 + OTGFS host channel-9 interrupt register + (OTGFS_HCINT9) + 0x228 + 0x20 + read-write + 0x00000000 + + + XFERC + Transfer completed + 0 + 1 + + + CHHLTD + Channel halted + 1 + 1 + + + STALL + STALL response received + interrupt + 3 + 1 + + + NAK + NAK response received + interrupt + 4 + 1 + + + ACK + ACK response received/transmitted + interrupt + 5 + 1 + + + XACTERR + Transaction error + 7 + 1 + + + BBLERR + Babble error + 8 + 1 + + + FRMOVRUN + Frame overrun + 9 + 1 + + + DTGLERR + Data toggle error + 10 + 1 + + + + + HCINT10 + HCINT10 + OTGFS host channel-10 interrupt register + (OTGFS_HCINT10) + 0x248 + 0x20 + read-write + 0x00000000 + + + XFERC + Transfer completed + 0 + 1 + + + CHHLTD + Channel halted + 1 + 1 + + + STALL + STALL response received + interrupt + 3 + 1 + + + NAK + NAK response received + interrupt + 4 + 1 + + + ACK + ACK response received/transmitted + interrupt + 5 + 1 + + + XACTERR + Transaction error + 7 + 1 + + + BBLERR + Babble error + 8 + 1 + + + FRMOVRUN + Frame overrun + 9 + 1 + + + DTGLERR + Data toggle error + 10 + 1 + + + + + HCINT11 + HCINT11 + OTGFS host channel-11 interrupt register + (OTGFS_HCINT11) + 0x268 + 0x20 + read-write + 0x00000000 + + + XFERC + Transfer completed + 0 + 1 + + + CHHLTD + Channel halted + 1 + 1 + + + STALL + STALL response received + interrupt + 3 + 1 + + + NAK + NAK response received + interrupt + 4 + 1 + + + ACK + ACK response received/transmitted + interrupt + 5 + 1 + + + XACTERR + Transaction error + 7 + 1 + + + BBLERR + Babble error + 8 + 1 + + + FRMOVRUN + Frame overrun + 9 + 1 + + + DTGLERR + Data toggle error + 10 + 1 + + + + + HCINT12 + HCINT12 + OTGFS host channel-12 interrupt register + (OTGFS_HCINT12) + 0x288 + 0x20 + read-write + 0x00000000 + + + XFERC + Transfer completed + 0 + 1 + + + CHHLTD + Channel halted + 1 + 1 + + + STALL + STALL response received + interrupt + 3 + 1 + + + NAK + NAK response received + interrupt + 4 + 1 + + + ACK + ACK response received/transmitted + interrupt + 5 + 1 + + + XACTERR + Transaction error + 7 + 1 + + + BBLERR + Babble error + 8 + 1 + + + FRMOVRUN + Frame overrun + 9 + 1 + + + DTGLERR + Data toggle error + 10 + 1 + + + + + HCINT13 + HCINT13 + OTGFS host channel-13 interrupt register + (OTGFS_HCINT13) + 0x2A8 + 0x20 + read-write + 0x00000000 + + + XFERC + Transfer completed + 0 + 1 + + + CHHLTD + Channel halted + 1 + 1 + + + STALL + STALL response received + interrupt + 3 + 1 + + + NAK + NAK response received + interrupt + 4 + 1 + + + ACK + ACK response received/transmitted + interrupt + 5 + 1 + + + XACTERR + Transaction error + 7 + 1 + + + BBLERR + Babble error + 8 + 1 + + + FRMOVRUN + Frame overrun + 9 + 1 + + + DTGLERR + Data toggle error + 10 + 1 + + + + + HCINT14 + HCINT14 + OTGFS host channel-14 interrupt register + (OTGFS_HCINT14) + 0x2C8 + 0x20 + read-write + 0x00000000 + + + XFERC + Transfer completed + 0 + 1 + + + CHHLTD + Channel halted + 1 + 1 + + + STALL + STALL response received + interrupt + 3 + 1 + + + NAK + NAK response received + interrupt + 4 + 1 + + + ACK + ACK response received/transmitted + interrupt + 5 + 1 + + + XACTERR + Transaction error + 7 + 1 + + + BBLERR + Babble error + 8 + 1 + + + FRMOVRUN + Frame overrun + 9 + 1 + + + DTGLERR + Data toggle error + 10 + 1 + + + + + HCINT15 + HCINT15 + OTGFS host channel-15 interrupt register + (OTGFS_HCINT15) + 0x2E8 + 0x20 + read-write + 0x00000000 + + + XFERC + Transfer completed + 0 + 1 + + + CHHLTD + Channel halted + 1 + 1 + + + STALL + STALL response received + interrupt + 3 + 1 + + + NAK + NAK response received + interrupt + 4 + 1 + + + ACK + ACK response received/transmitted + interrupt + 5 + 1 + + + XACTERR + Transaction error + 7 + 1 + + + BBLERR + Babble error + 8 + 1 + + + FRMOVRUN + Frame overrun + 9 + 1 + + + DTGLERR + Data toggle error + 10 + 1 + + + + + HCINTMSK0 + HCINTMSK0 + OTGFS host channel-0 mask register + (OTGFS_HCINTMSK0) + 0x10C + 0x20 + read-write + 0x00000000 + + + XFERCMSK + Transfer completed mask + 0 + 1 + + + CHHLTDMSK + Channel halted mask + 1 + 1 + + + STALLMSK + STALL response received interrupt + mask + 3 + 1 + + + NAKMSK + NAK response received interrupt + mask + 4 + 1 + + + ACKMSK + ACK response received/transmitted + interrupt mask + 5 + 1 + + + XACTERRMSK + Transaction error mask + 7 + 1 + + + BBLERRMSK + Babble error mask + 8 + 1 + + + FRMOVRUNMSK + Frame overrun mask + 9 + 1 + + + DTGLERRMSK + Data toggle error mask + 10 + 1 + + + + + HCINTMSK1 + HCINTMSK1 + OTGFS host channel-1 mask register + (OTGFS_HCINTMSK1) + 0x12C + 0x20 + read-write + 0x00000000 + + + XFERCMSK + Transfer completed mask + 0 + 1 + + + CHHLTDMSK + Channel halted mask + 1 + 1 + + + STALLMSK + STALL response received interrupt + mask + 3 + 1 + + + NAKMSK + NAK response received interrupt + mask + 4 + 1 + + + ACKMSK + ACK response received/transmitted + interrupt mask + 5 + 1 + + + XACTERRMSK + Transaction error mask + 7 + 1 + + + BBLERRMSK + Babble error mask + 8 + 1 + + + FRMOVRUNMSK + Frame overrun mask + 9 + 1 + + + DTGLERRMSK + Data toggle error mask + 10 + 1 + + + + + HCINTMSK2 + HCINTMSK2 + OTGFS host channel-2 mask register + (OTGFS_HCINTMSK2) + 0x14C + 0x20 + read-write + 0x00000000 + + + XFERCMSK + Transfer completed mask + 0 + 1 + + + CHHLTDMSK + Channel halted mask + 1 + 1 + + + STALLMSK + STALL response received interrupt + mask + 3 + 1 + + + NAKMSK + NAK response received interrupt + mask + 4 + 1 + + + ACKMSK + ACK response received/transmitted + interrupt mask + 5 + 1 + + + XACTERRMSK + Transaction error mask + 7 + 1 + + + BBLERRMSK + Babble error mask + 8 + 1 + + + FRMOVRUNMSK + Frame overrun mask + 9 + 1 + + + DTGLERRMSK + Data toggle error mask + 10 + 1 + + + + + HCINTMSK3 + HCINTMSK3 + OTGFS host channel-3 mask register + (OTGFS_HCINTMSK3) + 0x16C + 0x20 + read-write + 0x00000000 + + + XFERCMSK + Transfer completed mask + 0 + 1 + + + CHHLTDMSK + Channel halted mask + 1 + 1 + + + STALLMSK + STALL response received interrupt + mask + 3 + 1 + + + NAKMSK + NAK response received interrupt + mask + 4 + 1 + + + ACKMSK + ACK response received/transmitted + interrupt mask + 5 + 1 + + + XACTERRMSK + Transaction error mask + 7 + 1 + + + BBLERRMSK + Babble error mask + 8 + 1 + + + FRMOVRUNMSK + Frame overrun mask + 9 + 1 + + + DTGLERRMSK + Data toggle error mask + 10 + 1 + + + + + HCINTMSK4 + HCINTMSK4 + OTGFS host channel-4 mask register + (OTGFS_HCINTMSK4) + 0x18C + 0x20 + read-write + 0x00000000 + + + XFERCMSK + Transfer completed mask + 0 + 1 + + + CHHLTDMSK + Channel halted mask + 1 + 1 + + + STALLMSK + STALL response received interrupt + mask + 3 + 1 + + + NAKMSK + NAK response received interrupt + mask + 4 + 1 + + + ACKMSK + ACK response received/transmitted + interrupt mask + 5 + 1 + + + XACTERRMSK + Transaction error mask + 7 + 1 + + + BBLERRMSK + Babble error mask + 8 + 1 + + + FRMOVRUNMSK + Frame overrun mask + 9 + 1 + + + DTGLERRMSK + Data toggle error mask + 10 + 1 + + + + + HCINTMSK5 + HCINTMSK5 + OTGFS host channel-5 mask register + (OTGFS_HCINTMSK5) + 0x1AC + 0x20 + read-write + 0x00000000 + + + XFERCMSK + Transfer completed mask + 0 + 1 + + + CHHLTDMSK + Channel halted mask + 1 + 1 + + + STALLMSK + STALL response received interrupt + mask + 3 + 1 + + + NAKMSK + NAK response received interrupt + mask + 4 + 1 + + + ACKMSK + ACK response received/transmitted + interrupt mask + 5 + 1 + + + XACTERRMSK + Transaction error mask + 7 + 1 + + + BBLERRMSK + Babble error mask + 8 + 1 + + + FRMOVRUNMSK + Frame overrun mask + 9 + 1 + + + DTGLERRMSK + Data toggle error mask + 10 + 1 + + + + + HCINTMSK6 + HCINTMSK6 + OTGFS host channel-6 mask register + (OTGFS_HCINTMSK6) + 0x1CC + 0x20 + read-write + 0x00000000 + + + XFERCMSK + Transfer completed mask + 0 + 1 + + + CHHLTDMSK + Channel halted mask + 1 + 1 + + + STALLMSK + STALL response received interrupt + mask + 3 + 1 + + + NAKMSK + NAK response received interrupt + mask + 4 + 1 + + + ACKMSK + ACK response received/transmitted + interrupt mask + 5 + 1 + + + XACTERRMSK + Transaction error mask + 7 + 1 + + + BBLERRMSK + Babble error mask + 8 + 1 + + + FRMOVRUNMSK + Frame overrun mask + 9 + 1 + + + DTGLERRMSK + Data toggle error mask + 10 + 1 + + + + + HCINTMSK7 + HCINTMSK7 + OTGFS host channel-7 mask register + (OTGFS_HCINTMSK7) + 0x1EC + 0x20 + read-write + 0x00000000 + + + XFERCMSK + Transfer completed mask + 0 + 1 + + + CHHLTDMSK + Channel halted mask + 1 + 1 + + + STALLMSK + STALL response received interrupt + mask + 3 + 1 + + + NAKMSK + NAK response received interrupt + mask + 4 + 1 + + + ACKMSK + ACK response received/transmitted + interrupt mask + 5 + 1 + + + XACTERRMSK + Transaction error mask + 7 + 1 + + + BBLERRMSK + Babble error mask + 8 + 1 + + + FRMOVRUNMSK + Frame overrun mask + 9 + 1 + + + DTGLERRMSK + Data toggle error mask + 10 + 1 + + + + + HCINTMSK8 + HCINTMSK8 + OTGFS host channel-8 mask register + (OTGFS_HCINTMSK8) + 0x20C + 0x20 + read-write + 0x00000000 + + + XFERCMSK + Transfer completed mask + 0 + 1 + + + CHHLTDMSK + Channel halted mask + 1 + 1 + + + STALLMSK + STALL response received interrupt + mask + 3 + 1 + + + NAKMSK + NAK response received interrupt + mask + 4 + 1 + + + ACKMSK + ACK response received/transmitted + interrupt mask + 5 + 1 + + + XACTERRMSK + Transaction error mask + 7 + 1 + + + BBLERRMSK + Babble error mask + 8 + 1 + + + FRMOVRUNMSK + Frame overrun mask + 9 + 1 + + + DTGLERRMSK + Data toggle error mask + 10 + 1 + + + + + HCINTMSK9 + HCINTMSK9 + OTGFS host channel-9 mask register + (OTGFS_HCINTMSK9) + 0x22C + 0x20 + read-write + 0x00000000 + + + XFERCMSK + Transfer completed mask + 0 + 1 + + + CHHLTDMSK + Channel halted mask + 1 + 1 + + + STALLMSK + STALL response received interrupt + mask + 3 + 1 + + + NAKMSK + NAK response received interrupt + mask + 4 + 1 + + + ACKMSK + ACK response received/transmitted + interrupt mask + 5 + 1 + + + XACTERRMSK + Transaction error mask + 7 + 1 + + + BBLERRMSK + Babble error mask + 8 + 1 + + + FRMOVRUNMSK + Frame overrun mask + 9 + 1 + + + DTGLERRMSK + Data toggle error mask + 10 + 1 + + + + + HCINTMSK10 + HCINTMSK10 + OTGFS host channel-10 mask register + (OTGFS_HCINTMSK10) + 0x24C + 0x20 + read-write + 0x00000000 + + + XFERCMSK + Transfer completed mask + 0 + 1 + + + CHHLTDMSK + Channel halted mask + 1 + 1 + + + STALLMSK + STALL response received interrupt + mask + 3 + 1 + + + NAKMSK + NAK response received interrupt + mask + 4 + 1 + + + ACKMSK + ACK response received/transmitted + interrupt mask + 5 + 1 + + + XACTERRMSK + Transaction error mask + 7 + 1 + + + BBLERRMSK + Babble error mask + 8 + 1 + + + FRMOVRUNMSK + Frame overrun mask + 9 + 1 + + + DTGLERRMSK + Data toggle error mask + 10 + 1 + + + + + HCINTMSK11 + HCINTMSK11 + OTGFS host channel-11 mask register + (OTGFS_HCINTMSK11) + 0x26C + 0x20 + read-write + 0x00000000 + + + XFERCMSK + Transfer completed mask + 0 + 1 + + + CHHLTDMSK + Channel halted mask + 1 + 1 + + + STALLMSK + STALL response received interrupt + mask + 3 + 1 + + + NAKMSK + NAK response received interrupt + mask + 4 + 1 + + + ACKMSK + ACK response received/transmitted + interrupt mask + 5 + 1 + + + XACTERRMSK + Transaction error mask + 7 + 1 + + + BBLERRMSK + Babble error mask + 8 + 1 + + + FRMOVRUNMSK + Frame overrun mask + 9 + 1 + + + DTGLERRMSK + Data toggle error mask + 10 + 1 + + + + + HCINTMSK12 + HCINTMSK12 + OTGFS host channel-12 mask register + (OTGFS_HCINTMSK12) + 0x28C + 0x20 + read-write + 0x00000000 + + + XFERCMSK + Transfer completed mask + 0 + 1 + + + CHHLTDMSK + Channel halted mask + 1 + 1 + + + STALLMSK + STALL response received interrupt + mask + 3 + 1 + + + NAKMSK + NAK response received interrupt + mask + 4 + 1 + + + ACKMSK + ACK response received/transmitted + interrupt mask + 5 + 1 + + + XACTERRMSK + Transaction error mask + 7 + 1 + + + BBLERRMSK + Babble error mask + 8 + 1 + + + FRMOVRUNMSK + Frame overrun mask + 9 + 1 + + + DTGLERRMSK + Data toggle error mask + 10 + 1 + + + + + HCINTMSK13 + HCINTMSK13 + OTGFS host channel-13 mask register + (OTGFS_HCINTMSK13) + 0x2AC + 0x20 + read-write + 0x00000000 + + + XFERCMSK + Transfer completed mask + 0 + 1 + + + CHHLTDMSK + Channel halted mask + 1 + 1 + + + STALLMSK + STALL response received interrupt + mask + 3 + 1 + + + NAKMSK + NAK response received interrupt + mask + 4 + 1 + + + ACKMSK + ACK response received/transmitted + interrupt mask + 5 + 1 + + + XACTERRMSK + Transaction error mask + 7 + 1 + + + BBLERRMSK + Babble error mask + 8 + 1 + + + FRMOVRUNMSK + Frame overrun mask + 9 + 1 + + + DTGLERRMSK + Data toggle error mask + 10 + 1 + + + + + HCINTMSK14 + HCINTMSK14 + OTGFS host channel-14 mask register + (OTGFS_HCINTMSK14) + 0x2CC + 0x20 + read-write + 0x00000000 + + + XFERCMSK + Transfer completed mask + 0 + 1 + + + CHHLTDMSK + Channel halted mask + 1 + 1 + + + STALLMSK + STALL response received interrupt + mask + 3 + 1 + + + NAKMSK + NAK response received interrupt + mask + 4 + 1 + + + ACKMSK + ACK response received/transmitted + interrupt mask + 5 + 1 + + + XACTERRMSK + Transaction error mask + 7 + 1 + + + BBLERRMSK + Babble error mask + 8 + 1 + + + FRMOVRUNMSK + Frame overrun mask + 9 + 1 + + + DTGLERRMSK + Data toggle error mask + 10 + 1 + + + + + HCINTMSK15 + HCINTMSK15 + OTGFS host channel-15 mask register + (OTGFS_HCINTMSK15) + 0x2EC + 0x20 + read-write + 0x00000000 + + + XFERCMSK + Transfer completed mask + 0 + 1 + + + CHHLTDMSK + Channel halted mask + 1 + 1 + + + STALLMSK + STALL response received interrupt + mask + 3 + 1 + + + NAKMSK + NAK response received interrupt + mask + 4 + 1 + + + ACKMSK + ACK response received/transmitted + interrupt mask + 5 + 1 + + + XACTERRMSK + Transaction error mask + 7 + 1 + + + BBLERRMSK + Babble error mask + 8 + 1 + + + FRMOVRUNMSK + Frame overrun mask + 9 + 1 + + + DTGLERRMSK + Data toggle error mask + 10 + 1 + + + + + HCTSIZ0 + HCTSIZ0 + OTGFS host channel-0 transfer size + register + 0x110 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + PID + PID + 29 + 2 + + + + + HCTSIZ1 + HCTSIZ1 + OTGFS host channel-1 transfer size + register + 0x130 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + PID + PID + 29 + 2 + + + + + HCTSIZ2 + HCTSIZ2 + OTGFS host channel-2 transfer size + register + 0x150 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + PID + PID + 29 + 2 + + + + + HCTSIZ3 + HCTSIZ3 + OTGFS host channel-3 transfer size + register + 0x170 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + PID + PID + 29 + 2 + + + + + HCTSIZ4 + HCTSIZ4 + OTGFS host channel-4 transfer size + register + 0x190 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + PID + PID + 29 + 2 + + + + + HCTSIZ5 + HCTSIZ5 + OTGFS host channel-5 transfer size + register + 0x1B0 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + PID + PID + 29 + 2 + + + + + HCTSIZ6 + HCTSIZ6 + OTGFS host channel-6 transfer size + register + 0x1D0 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + PID + PID + 29 + 2 + + + + + HCTSIZ7 + HCTSIZ7 + OTGFS host channel-7 transfer size + register + 0x1F0 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + PID + PID + 29 + 2 + + + + + HCTSIZ8 + HCTSIZ8 + OTGFS host channel-8 transfer size + register + 0x210 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + PID + PID + 29 + 2 + + + + + HCTSIZ9 + HCTSIZ9 + OTGFS host channel-9 transfer size + register + 0x230 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + PID + PID + 29 + 2 + + + + + HCTSIZ10 + HCTSIZ10 + OTGFS host channel-10 transfer size + register + 0x250 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + PID + PID + 29 + 2 + + + + + HCTSIZ11 + HCTSIZ11 + OTGFS host channel-11 transfer size + register + 0x270 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + PID + PID + 29 + 2 + + + + + HCTSIZ12 + HCTSIZ12 + OTGFS host channel-12 transfer size + register + 0x290 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + PID + PID + 29 + 2 + + + + + HCTSIZ13 + HCTSIZ13 + OTGFS host channel-13 transfer size + register + 0x2B0 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + PID + PID + 29 + 2 + + + + + HCTSIZ14 + HCTSIZ14 + OTGFS host channel-14 transfer size + register + 0x2D0 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + PID + PID + 29 + 2 + + + + + HCTSIZ15 + HCTSIZ15 + OTGFS host channel-15 transfer size + register + 0x2F0 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + PID + PID + 29 + 2 + + + + + + + USB_OTG1_DEVICE + USB on the go full speed + USB_OTG1 + 0x50000800 + + 0x0 + 0x400 + registers + + + + DCFG + DCFG + OTGFS device configuration register + (OTGFS_DCFG) + 0x0 + 0x20 + read-write + 0x02200000 + + + DEVSPD + Device speed + 0 + 2 + + + NZSTSOUTHSHK + Non-zero-length status OUT + handshake + 2 + 1 + + + DEVADDR + Device address + 4 + 7 + + + PERFRINT + Periodic frame interval + 11 + 2 + + + + + DCTL + DCTL + OTGFS device control register + (OTGFS_DCTL) + 0x4 + 0x20 + 0x00000000 + + + RWKUPSIG + Remote wakeup signaling + 0 + 1 + read-write + + + SFTDISCON + Soft disconnect + 1 + 1 + read-write + + + GNPINNAKSTS + Global IN NAK status + 2 + 1 + read-only + + + GOUTNAKSTS + Global OUT NAK status + 3 + 1 + read-only + + + TSTCTL + Test control + 4 + 3 + read-write + + + SGNPINNAK + Set global IN NAK + 7 + 1 + read-write + + + CGNPINNAK + Clear global IN NAK + 8 + 1 + read-write + + + SGOUTNAK + Set global OUT NAK + 9 + 1 + read-write + + + CGOUTNAK + Clear global OUT NAK + 10 + 1 + read-write + + + PWROPRGDNE + Power-on programming done + 11 + 1 + read-write + + + + + DSTS + DSTS + OTGFS device status register + (OTGFS_DSTS) + 0x8 + 0x20 + read-only + 0x00000010 + + + SUSPSTS + Suspend status + 0 + 1 + + + ENUMSPD + Enumerated speed + 1 + 2 + + + ETICERR + Erratic error + 3 + 1 + + + SOFFN + Frame number of the received + SOF + 8 + 14 + + + + + DIEPMSK + DIEPMSK + OTGFS device IN endpoint common interrupt + mask register (OTGFS_DIEPMSK) + 0x10 + 0x20 + read-write + 0x00000000 + + + XFERCMSK + Transfer completed interrupt + mask + 0 + 1 + + + EPTDISMSK + Endpoint disabled interrupt + mask + 1 + 1 + + + TIMEOUTMSK + Timeout condition mask (Non-isochronous + endpoints) + 3 + 1 + + + INTKNTXFEMPMSK + IN token received when TxFIFO empty + mask + 4 + 1 + + + INTKNEPTMISMSK + IN token received with EP mismatch + mask + 5 + 1 + + + INEPTNAKMSK + IN endpoint NAK effective + mask + 6 + 1 + + + TXFIFOUDRMSK + FIFO underrun + mask + 8 + 1 + + + BNAINMSK + BNA interrupt + mask + 9 + 1 + + + + + DOEPMSK + DOEPMSK + OTGFS device OUT endpoint common interrupt + mask register (OTGFS_DOEPMSK) + 0x14 + 0x20 + read-write + 0x00000000 + + + XFERCMSK + Transfer completed interrupt + mask + 0 + 1 + + + EPTDISMSK + Endpoint disabled interrupt + mask + 1 + 1 + + + SETUPMSK + SETUP phase done mask + 3 + 1 + + + OUTTEPDMSK + OUT token received when endpoint + disabled mask + 4 + 1 + + + B2BSETUPMSK + Back-to-back SETUP packets + received mask + 6 + 1 + + + OUTPERRMSK + OUT packet error + mask + 8 + 1 + + + BNAOUTMSK + BNA interrupt + mask + 9 + 1 + + + + + DAINT + DAINT + OTGFS device all endpoints interrupt + register (OTGFS_DAINT) + 0x18 + 0x20 + read-only + 0x00000000 + + + INEPTINT + IN endpoint interrupt bits + 0 + 16 + + + OUTEPTINT + OUT endpoint interrupt + bits + 16 + 16 + + + + + DAINTMSK + DAINTMSK + OTGFS all endpoints interrupt mask register + (OTGFS_DAINTMSK) + 0x1C + 0x20 + read-write + 0x00000000 + + + INEPTMSK + IN EP interrupt mask bits + 0 + 16 + + + OUTEPTMSK + OUT endpoint interrupt + bits + 16 + 16 + + + + + DIEPEMPMSK + DIEPEMPMSK + OTGFS device IN endpoint FIFO empty + interrupt mask register + 0x34 + 0x20 + read-write + 0x00000000 + + + INEPTXFEMSK + IN EP Tx FIFO empty interrupt mask + bits + 0 + 16 + + + + + DIEPCTL0 + DIEPCTL0 + OTGFS device control IN endpoint 0 control + register (OTGFS_DIEPCTL0) + 0x100 + 0x20 + 0x00000000 + + + MPS + Maximum packet size + 0 + 2 + read-write + + + USBACEPT + USB active endpoint + 15 + 1 + read-only + + + NAKSTS + NAK status + 17 + 1 + read-only + + + EPTYPE + Endpoint type + 18 + 2 + read-only + + + STALL + STALL handshake + 21 + 1 + read-write + + + TXFNUM + TxFIFO number + 22 + 4 + read-write + + + CNAK + Clear NAK + 26 + 1 + write-only + + + SNAK + Set NAK + 27 + 1 + write-only + + + EPTDIS + Endpoint disable + 30 + 1 + read-only + + + EPTENA + Endpoint enable + 31 + 1 + read-only + + + + + DIEPCTL1 + DIEPCTL1 + OTGFS device IN endpoint-1 control + register + 0x120 + 0x20 + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + read-write + + + USBACEPT + USB active endpoint + 15 + 1 + read-write + + + DPID + Endpoint Data PID + 16 + 1 + read-only + + + NAKSTS + NAK status + 17 + 1 + read-only + + + EPTYPE + Endpoint type + 18 + 2 + read-write + + + STALL + STALL handshake + 21 + 1 + read-write + + + TXFNUM + TxFIFO number + 22 + 4 + read-write + + + CNAK + Clear NAK + 26 + 1 + write-only + + + SNAK + Set NAK + 27 + 1 + write-only + + + SETD0PID + Set DATA0 PID + 28 + 1 + write-only + + + SETD1PID + Set DATA1 PID + 29 + 1 + write-only + + + EPTDIS + Endpoint disable + 30 + 1 + read-write + + + EPTENA + Endpoint enable + 31 + 1 + read-write + + + + + DIEPCTL2 + DIEPCTL2 + OTGFS device IN endpoint-2 control + register + 0x140 + 0x20 + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + read-write + + + USBACEPT + USB active endpoint + 15 + 1 + read-write + + + DPID + Endpoint Data PID + 16 + 1 + read-only + + + NAKSTS + NAK status + 17 + 1 + read-only + + + EPTYPE + Endpoint type + 18 + 2 + read-write + + + STALL + STALL handshake + 21 + 1 + read-write + + + TXFNUM + TxFIFO number + 22 + 4 + read-write + + + CNAK + Clear NAK + 26 + 1 + write-only + + + SNAK + Set NAK + 27 + 1 + write-only + + + SETD0PID + Set DATA0 PID + 28 + 1 + write-only + + + SETD1PID + Set DATA1 PID + 29 + 1 + write-only + + + EPTDIS + Endpoint disable + 30 + 1 + read-write + + + EPTENA + Endpoint enable + 31 + 1 + read-write + + + + + DIEPCTL3 + DIEPCTL3 + OTGFS device IN endpoint-3 control + register + 0x160 + 0x20 + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + read-write + + + USBACEPT + USB active endpoint + 15 + 1 + read-write + + + DPID + Endpoint Data PID + 16 + 1 + read-only + + + NAKSTS + NAK status + 17 + 1 + read-only + + + EPTYPE + Endpoint type + 18 + 2 + read-write + + + STALL + STALL handshake + 21 + 1 + read-write + + + TXFNUM + TxFIFO number + 22 + 4 + read-write + + + CNAK + Clear NAK + 26 + 1 + write-only + + + SNAK + Set NAK + 27 + 1 + write-only + + + SETD0PID + Set DATA0 PID + 28 + 1 + write-only + + + SETD1PID + Set DATA1 PID + 29 + 1 + write-only + + + EPTDIS + Endpoint disable + 30 + 1 + read-write + + + EPTENA + Endpoint enable + 31 + 1 + read-write + + + + + DIEPCTL4 + DIEPCTL4 + OTGFS device IN endpoint-4 control + register + 0x180 + 0x20 + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + read-write + + + USBACEPT + USB active endpoint + 15 + 1 + read-write + + + DPID + Endpoint Data PID + 16 + 1 + read-only + + + NAKSTS + NAK status + 17 + 1 + read-only + + + EPTYPE + Endpoint type + 18 + 2 + read-write + + + STALL + STALL handshake + 21 + 1 + read-write + + + TXFNUM + TxFIFO number + 22 + 4 + read-write + + + CNAK + Clear NAK + 26 + 1 + write-only + + + SNAK + Set NAK + 27 + 1 + write-only + + + SETD0PID + Set DATA0 PID + 28 + 1 + write-only + + + SETD1PID + Set DATA1 PID + 29 + 1 + write-only + + + EPTDIS + Endpoint disable + 30 + 1 + read-write + + + EPTENA + Endpoint enable + 31 + 1 + read-write + + + + + DIEPCTL5 + DIEPCTL5 + OTGFS device IN endpoint-5 control + register + 0x1A0 + 0x20 + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + read-write + + + USBACEPT + USB active endpoint + 15 + 1 + read-write + + + DPID + Endpoint Data PID + 16 + 1 + read-only + + + NAKSTS + NAK status + 17 + 1 + read-only + + + EPTYPE + Endpoint type + 18 + 2 + read-write + + + STALL + STALL handshake + 21 + 1 + read-write + + + TXFNUM + TxFIFO number + 22 + 4 + read-write + + + CNAK + Clear NAK + 26 + 1 + write-only + + + SNAK + Set NAK + 27 + 1 + write-only + + + SETD0PID + Set DATA0 PID + 28 + 1 + write-only + + + SETD1PID + Set DATA1 PID + 29 + 1 + write-only + + + EPTDIS + Endpoint disable + 30 + 1 + read-write + + + EPTENA + Endpoint enable + 31 + 1 + read-write + + + + + DIEPCTL6 + DIEPCTL6 + OTGFS device IN endpoint-6 control + register + 0x1C0 + 0x20 + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + read-write + + + USBACEPT + USB active endpoint + 15 + 1 + read-write + + + DPID + Endpoint Data PID + 16 + 1 + read-only + + + NAKSTS + NAK status + 17 + 1 + read-only + + + EPTYPE + Endpoint type + 18 + 2 + read-write + + + STALL + STALL handshake + 21 + 1 + read-write + + + TXFNUM + TxFIFO number + 22 + 4 + read-write + + + CNAK + Clear NAK + 26 + 1 + write-only + + + SNAK + Set NAK + 27 + 1 + write-only + + + SETD0PID + Set DATA0 PID + 28 + 1 + write-only + + + SETD1PID + Set DATA1 PID + 29 + 1 + write-only + + + EPTDIS + Endpoint disable + 30 + 1 + read-write + + + EPTENA + Endpoint enable + 31 + 1 + read-write + + + + + DIEPCTL7 + DIEPCTL7 + OTGFS device IN endpoint-7 control + register + 0x1E0 + 0x20 + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + read-write + + + USBACEPT + USB active endpoint + 15 + 1 + read-write + + + DPID + Endpoint Data PID + 16 + 1 + read-only + + + NAKSTS + NAK status + 17 + 1 + read-only + + + EPTYPE + Endpoint type + 18 + 2 + read-write + + + STALL + STALL handshake + 21 + 1 + read-write + + + TXFNUM + TxFIFO number + 22 + 4 + read-write + + + CNAK + Clear NAK + 26 + 1 + write-only + + + SNAK + Set NAK + 27 + 1 + write-only + + + SETD0PID + Set DATA0 PID + 28 + 1 + write-only + + + SETD1PID + Set DATA1 PID + 29 + 1 + write-only + + + EPTDIS + Endpoint disable + 30 + 1 + read-write + + + EPTENA + Endpoint enable + 31 + 1 + read-write + + + + + DOEPCTL0 + DOEPCTL0 + OTGFS device OUT endpoint-0 control + register + 0x300 + 0x20 + 0x00008000 + + + MPS + Maximum packet size + 0 + 2 + read-only + + + USBACEPT + USB active endpoint + 15 + 1 + read-only + + + NAKSTS + NAK status + 17 + 1 + read-only + + + EPTYPE + Endpoint type + 18 + 2 + read-only + + + SNP + Snoop mode + 20 + 1 + read-write + + + STALL + STALL handshake + 21 + 1 + read-write + + + CNAK + Clear NAK + 26 + 1 + write-only + + + SNAK + Set NAK + 27 + 1 + write-only + + + EPTDIS + Endpoint disable + 30 + 1 + read-write + + + EPTENA + Endpoint enable + 31 + 1 + read-write + + + + + DOEPCTL1 + DOEPCTL1 + OTGFS device OUT endpoint-1 control + register + 0x320 + 0x20 + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + read-write + + + USBACEPT + USB active endpoint + 15 + 1 + read-write + + + DPID + Endpoint data PID + 16 + 1 + read-only + + + NAKSTS + NAK status + 17 + 1 + read-only + + + EPTYPE + Endpoint type + 18 + 2 + read-write + + + SNP + Snoop mode + 20 + 1 + read-write + + + STALL + STALL handshake + 21 + 1 + read-write + + + CNAK + Clear NAK + 26 + 1 + write-only + + + SNAK + Set NAK + 27 + 1 + write-only + + + EPTDIS + Endpoint disable + 30 + 1 + read-write + + + EPTENA + Endpoint enable + 31 + 1 + read-write + + + + + DOEPCTL2 + DOEPCTL2 + OTGFS device OUT endpoint-2 control + register + 0x340 + 0x20 + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + read-write + + + USBACEPT + USB active endpoint + 15 + 1 + read-write + + + DPID + Endpoint data PID + 16 + 1 + read-only + + + NAKSTS + NAK status + 17 + 1 + read-only + + + EPTYPE + Endpoint type + 18 + 2 + read-write + + + SNP + Snoop mode + 20 + 1 + read-write + + + STALL + STALL handshake + 21 + 1 + read-write + + + CNAK + Clear NAK + 26 + 1 + write-only + + + SNAK + Set NAK + 27 + 1 + write-only + + + EPTDIS + Endpoint disable + 30 + 1 + read-write + + + EPTENA + Endpoint enable + 31 + 1 + read-write + + + + + DOEPCTL3 + DOEPCTL3 + OTGFS device OUT endpoint-3 control + register + 0x360 + 0x20 + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + read-write + + + USBACEPT + USB active endpoint + 15 + 1 + read-write + + + DPID + Endpoint data PID + 16 + 1 + read-only + + + NAKSTS + NAK status + 17 + 1 + read-only + + + EPTYPE + Endpoint type + 18 + 2 + read-write + + + SNP + Snoop mode + 20 + 1 + read-write + + + STALL + STALL handshake + 21 + 1 + read-write + + + CNAK + Clear NAK + 26 + 1 + write-only + + + SNAK + Set NAK + 27 + 1 + write-only + + + EPTDIS + Endpoint disable + 30 + 1 + read-write + + + EPTENA + Endpoint enable + 31 + 1 + read-write + + + + + DOEPCTL4 + DOEPCTL4 + OTGFS device OUT endpoint-4 control + register + 0x380 + 0x20 + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + read-write + + + USBACEPT + USB active endpoint + 15 + 1 + read-write + + + DPID + Endpoint data PID + 16 + 1 + read-only + + + NAKSTS + NAK status + 17 + 1 + read-only + + + EPTYPE + Endpoint type + 18 + 2 + read-write + + + SNP + Snoop mode + 20 + 1 + read-write + + + STALL + STALL handshake + 21 + 1 + read-write + + + CNAK + Clear NAK + 26 + 1 + write-only + + + SNAK + Set NAK + 27 + 1 + write-only + + + EPTDIS + Endpoint disable + 30 + 1 + read-write + + + EPTENA + Endpoint enable + 31 + 1 + read-write + + + + + DOEPCTL5 + DOEPCTL5 + OTGFS device OUT endpoint-5 control + register + 0x3A0 + 0x20 + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + read-write + + + USBACEPT + USB active endpoint + 15 + 1 + read-write + + + DPID + Endpoint data PID + 16 + 1 + read-only + + + NAKSTS + NAK status + 17 + 1 + read-only + + + EPTYPE + Endpoint type + 18 + 2 + read-write + + + SNP + Snoop mode + 20 + 1 + read-write + + + STALL + STALL handshake + 21 + 1 + read-write + + + CNAK + Clear NAK + 26 + 1 + write-only + + + SNAK + Set NAK + 27 + 1 + write-only + + + EPTDIS + Endpoint disable + 30 + 1 + read-write + + + EPTENA + Endpoint enable + 31 + 1 + read-write + + + + + DOEPCTL6 + DOEPCTL6 + OTGFS device OUT endpoint-6 control + register + 0x3C0 + 0x20 + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + read-write + + + USBACEPT + USB active endpoint + 15 + 1 + read-write + + + DPID + Endpoint data PID + 16 + 1 + read-only + + + NAKSTS + NAK status + 17 + 1 + read-only + + + EPTYPE + Endpoint type + 18 + 2 + read-write + + + SNP + Snoop mode + 20 + 1 + read-write + + + STALL + STALL handshake + 21 + 1 + read-write + + + CNAK + Clear NAK + 26 + 1 + write-only + + + SNAK + Set NAK + 27 + 1 + write-only + + + EPTDIS + Endpoint disable + 30 + 1 + read-write + + + EPTENA + Endpoint enable + 31 + 1 + read-write + + + + + DOEPCTL7 + DOEPCTL7 + OTGFS device OUT endpoint-7 control + register + 0x3E0 + 0x20 + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + read-write + + + USBACEPT + USB active endpoint + 15 + 1 + read-write + + + DPID + Endpoint data PID + 16 + 1 + read-only + + + NAKSTS + NAK status + 17 + 1 + read-only + + + EPTYPE + Endpoint type + 18 + 2 + read-write + + + SNP + Snoop mode + 20 + 1 + read-write + + + STALL + STALL handshake + 21 + 1 + read-write + + + CNAK + Clear NAK + 26 + 1 + write-only + + + SNAK + Set NAK + 27 + 1 + write-only + + + EPTDIS + Endpoint disable + 30 + 1 + read-write + + + EPTENA + Endpoint enable + 31 + 1 + read-write + + + + + DIEPINT0 + DIEPINT0 + OTGFS device IN endpoint-0 interrupt + register + 0x108 + 0x20 + 0x00000080 + + + XFERC + Transfer completed + interrupt + 0 + 1 + read-write + + + EPTDISD + Endpoint disabled + interrupt + 1 + 1 + read-write + + + TIMEOUT + Timeout condition + 3 + 1 + read-write + + + INTKNTXFEMP + IN token received when + TxFIFO is empty + 4 + 1 + read-write + + + INEPTNAK + IN endpoint NAK + effective + 6 + 1 + read-write + + + TXFEMP + Transmit FIFO + empty + 7 + 1 + read-only + + + + + DIEPINT1 + DIEPINT1 + OTGFS device IN endpoint-1 interrupt + register + 0x128 + 0x20 + 0x00000080 + + + XFERC + Transfer completed + interrupt + 0 + 1 + read-write + + + EPTDISD + Endpoint disabled + interrupt + 1 + 1 + read-write + + + TIMEOUT + Timeout condition + 3 + 1 + read-write + + + INTKNTXFEMP + IN token received when + TxFIFO is empty + 4 + 1 + read-write + + + INEPTNAK + IN endpoint NAK + effective + 6 + 1 + read-write + + + TXFEMP + Transmit FIFO + empty + 7 + 1 + read-only + + + + + DIEPINT2 + DIEPINT2 + OTGFS device IN endpoint-2 interrupt + register + 0x148 + 0x20 + 0x00000080 + + + XFERC + Transfer completed + interrupt + 0 + 1 + read-write + + + EPTDISD + Endpoint disabled + interrupt + 1 + 1 + read-write + + + TIMEOUT + Timeout condition + 3 + 1 + read-write + + + INTKNTXFEMP + IN token received when + TxFIFO is empty + 4 + 1 + read-write + + + INEPTNAK + IN endpoint NAK + effective + 6 + 1 + read-write + + + TXFEMP + Transmit FIFO + empty + 7 + 1 + read-only + + + + + DIEPINT3 + DIEPINT3 + OTGFS device IN endpoint-3 interrupt + register + 0x168 + 0x20 + 0x00000080 + + + XFERC + Transfer completed + interrupt + 0 + 1 + read-write + + + EPTDISD + Endpoint disabled + interrupt + 1 + 1 + read-write + + + TIMEOUT + Timeout condition + 3 + 1 + read-write + + + INTKNTXFEMP + IN token received when + TxFIFO is empty + 4 + 1 + read-write + + + INEPTNAK + IN endpoint NAK + effective + 6 + 1 + read-write + + + TXFEMP + Transmit FIFO + empty + 7 + 1 + read-only + + + + + DIEPINT4 + DIEPINT4 + OTGFS device IN endpoint-4 interrupt + register + 0x188 + 0x20 + 0x00000080 + + + XFERC + Transfer completed + interrupt + 0 + 1 + read-write + + + EPTDISD + Endpoint disabled + interrupt + 1 + 1 + read-write + + + TIMEOUT + Timeout condition + 3 + 1 + read-write + + + INTKNTXFEMP + IN token received when + TxFIFO is empty + 4 + 1 + read-write + + + INEPTNAK + IN endpoint NAK + effective + 6 + 1 + read-write + + + TXFEMP + Transmit FIFO + empty + 7 + 1 + read-only + + + + + DIEPINT5 + DIEPINT5 + OTGFS device IN endpoint-5 interrupt + register + 0x1A8 + 0x20 + 0x00000080 + + + XFERC + Transfer completed + interrupt + 0 + 1 + read-write + + + EPTDISD + Endpoint disabled + interrupt + 1 + 1 + read-write + + + TIMEOUT + Timeout condition + 3 + 1 + read-write + + + INTKNTXFEMP + IN token received when + TxFIFO is empty + 4 + 1 + read-write + + + INEPTNAK + IN endpoint NAK + effective + 6 + 1 + read-write + + + TXFEMP + Transmit FIFO + empty + 7 + 1 + read-only + + + + + DIEPINT6 + DIEPINT6 + OTGFS device IN endpoint-6 interrupt + register + 0x1C8 + 0x20 + 0x00000080 + + + XFERC + Transfer completed + interrupt + 0 + 1 + read-write + + + EPTDISD + Endpoint disabled + interrupt + 1 + 1 + read-write + + + TIMEOUT + Timeout condition + 3 + 1 + read-write + + + INTKNTXFEMP + IN token received when + TxFIFO is empty + 4 + 1 + read-write + + + INEPTNAK + IN endpoint NAK + effective + 6 + 1 + read-write + + + TXFEMP + Transmit FIFO + empty + 7 + 1 + read-only + + + + + DIEPINT7 + DIEPINT7 + OTGFS device IN endpoint-7 interrupt + register + 0x1E8 + 0x20 + 0x00000080 + + + XFERC + Transfer completed + interrupt + 0 + 1 + read-write + + + EPTDISD + Endpoint disabled + interrupt + 1 + 1 + read-write + + + TIMEOUT + Timeout condition + 3 + 1 + read-write + + + INTKNTXFEMP + IN token received when + TxFIFO is empty + 4 + 1 + read-write + + + INEPTNAK + IN endpoint NAK + effective + 6 + 1 + read-write + + + TXFEMP + Transmit FIFO + empty + 7 + 1 + read-only + + + + + DOEPINT0 + DOEPINT0 + OTGFS device OUT endpoint-0 interrupt + register + 0x308 + 0x20 + read-write + 0x00000080 + + + XFERC + Transfer completed interrupt + 0 + 1 + + + EPTDISD + Endpoint disabled interrupt + 1 + 1 + + + SETUP + SETUP phase done + 3 + 1 + + + OUTTEPD + OUT token received when + endpoint disabled + 4 + 1 + + + B2BSTUP + Back-to-back SETUP + packets received + 6 + 1 + + + + + DOEPINT1 + DOEPINT1 + OTGFS device OUT endpoint-1 interrupt + register + 0x328 + 0x20 + read-write + 0x00000080 + + + XFERC + Transfer completed interrupt + 0 + 1 + + + EPTDISD + Endpoint disabled interrupt + 1 + 1 + + + SETUP + SETUP phase done + 3 + 1 + + + OUTTEPD + OUT token received when + endpoint disabled + 4 + 1 + + + B2BSTUP + Back-to-back SETUP + packets received + 6 + 1 + + + + + DOEPINT2 + DOEPINT2 + OTGFS device OUT endpoint-2 interrupt + register + 0x348 + 0x20 + read-write + 0x00000080 + + + XFERC + Transfer completed interrupt + 0 + 1 + + + EPTDISD + Endpoint disabled interrupt + 1 + 1 + + + SETUP + SETUP phase done + 3 + 1 + + + OUTTEPD + OUT token received when + endpoint disabled + 4 + 1 + + + B2BSTUP + Back-to-back SETUP + packets received + 6 + 1 + + + + + DOEPINT3 + DOEPINT3 + OTGFS device OUT endpoint-3 interrupt + register + 0x368 + 0x20 + read-write + 0x00000080 + + + XFERC + Transfer completed interrupt + 0 + 1 + + + EPTDISD + Endpoint disabled interrupt + 1 + 1 + + + SETUP + SETUP phase done + 3 + 1 + + + OUTTEPD + OUT token received when + endpoint disabled + 4 + 1 + + + B2BSTUP + Back-to-back SETUP + packets received + 6 + 1 + + + + + DOEPINT4 + DOEPINT4 + OTGFS device OUT endpoint-4 interrupt + register + 0x388 + 0x20 + read-write + 0x00000080 + + + XFERC + Transfer completed interrupt + 0 + 1 + + + EPTDISD + Endpoint disabled interrupt + 1 + 1 + + + SETUP + SETUP phase done + 3 + 1 + + + OUTTEPD + OUT token received when + endpoint disabled + 4 + 1 + + + B2BSTUP + Back-to-back SETUP + packets received + 6 + 1 + + + + + DOEPINT5 + DOEPINT5 + OTGFS device OUT endpoint-5 interrupt + register + 0x3A8 + 0x20 + read-write + 0x00000080 + + + XFERC + Transfer completed interrupt + 0 + 1 + + + EPTDISD + Endpoint disabled interrupt + 1 + 1 + + + SETUP + SETUP phase done + 3 + 1 + + + OUTTEPD + OUT token received when + endpoint disabled + 4 + 1 + + + B2BSTUP + Back-to-back SETUP + packets received + 6 + 1 + + + + + DOEPINT6 + DOEPINT6 + OTGFS device OUT endpoint-6 interrupt + register + 0x3C8 + 0x20 + read-write + 0x00000080 + + + XFERC + Transfer completed interrupt + 0 + 1 + + + EPTDISD + Endpoint disabled interrupt + 1 + 1 + + + SETUP + SETUP phase done + 3 + 1 + + + OUTTEPD + OUT token received when + endpoint disabled + 4 + 1 + + + B2BSTUP + Back-to-back SETUP + packets received + 6 + 1 + + + + + DOEPINT7 + DOEPINT7 + OTGFS device OUT endpoint-7 interrupt + register + 0x3E8 + 0x20 + read-write + 0x00000080 + + + XFERC + Transfer completed interrupt + 0 + 1 + + + EPTDISD + Endpoint disabled interrupt + 1 + 1 + + + SETUP + SETUP phase done + 3 + 1 + + + OUTTEPD + OUT token received when + endpoint disabled + 4 + 1 + + + B2BSTUP + Back-to-back SETUP + packets received + 6 + 1 + + + + + DIEPTSIZ0 + DIEPTSIZ0 + OTGFS device IN endpoint-0 transfer size + register + 0x110 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 7 + + + PKTCNT + Packet count + 19 + 2 + + + + + DOEPTSIZ0 + DOEPTSIZ0 + OTGFS device OUT endpoint-0 transfer size + register + 0x310 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 7 + + + PKTCNT + Packet count + 19 + 1 + + + SETUPCNT + SETUP packet count + 29 + 2 + + + + + DIEPTSIZ1 + DIEPTSIZ1 + OTGFS device IN endpoint-1 transfer size + register + 0x130 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + MC + Multi count + 29 + 2 + + + + + DIEPTSIZ2 + DIEPTSIZ2 + OTGFS device IN endpoint-2 transfer size + register + 0x150 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + MC + Multi count + 29 + 2 + + + + + DIEPTSIZ3 + DIEPTSIZ3 + OTG device IN endpoint-3 transfer size + register + 0x170 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + MC + Multi count + 29 + 2 + + + + + DIEPTSIZ4 + DIEPTSIZ4 + OTG device IN endpoint-4 transfer size + register + 0x190 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + MC + Multi count + 29 + 2 + + + + + DIEPTSIZ5 + DIEPTSIZ5 + OTG device IN endpoint-5 transfer size + register + 0x1B0 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + MC + Multi count + 29 + 2 + + + + + DIEPTSIZ6 + DIEPTSIZ6 + OTG device IN endpoint-6 transfer size + register + 0x1D0 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + MC + Multi count + 29 + 2 + + + + + DIEPTSIZ7 + DIEPTSIZ7 + OTG device IN endpoint-7 transfer size + register + 0x1F0 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + MC + Multi count + 29 + 2 + + + + + DTXFSTS0 + DTXFSTS0 + OTGFS device IN endpoint-0 transmit FIFO + status register + 0x118 + 0x20 + read-only + 0x00000000 + + + INEPTXFSAV + IN endpoint TxFIFO space + available + 0 + 16 + + + + + DTXFSTS1 + DTXFSTS1 + OTGFS device IN endpoint-1 transmit FIFO + status register + 0x138 + 0x20 + read-only + 0x00000000 + + + INEPTXFSAV + IN endpoint TxFIFO space + available + 0 + 16 + + + + + DTXFSTS2 + DTXFSTS2 + OTGFS device IN endpoint-2 transmit FIFO + status register + 0x158 + 0x20 + read-only + 0x00000000 + + + INEPTXFSAV + IN endpoint TxFIFO space + available + 0 + 16 + + + + + DTXFSTS3 + DTXFSTS3 + OTGFS device IN endpoint-3 transmit FIFO + status register + 0x178 + 0x20 + read-only + 0x00000000 + + + INEPTXFSAV + IN endpoint TxFIFO space + available + 0 + 16 + + + + + DTXFSTS4 + DTXFSTS4 + OTGFS device IN endpoint-4 transmit FIFO + status register + 0x198 + 0x20 + read-only + 0x00000000 + + + INEPTXFSAV + IN endpoint TxFIFO space + available + 0 + 16 + + + + + DTXFSTS5 + DTXFSTS5 + OTGFS device IN endpoint-5 transmit FIFO + status register + 0x1B8 + 0x20 + read-only + 0x00000000 + + + INEPTXFSAV + IN endpoint TxFIFO space + available + 0 + 16 + + + + + DTXFSTS6 + DTXFSTS6 + OTGFS device IN endpoint-6 transmit FIFO + status register + 0x1D8 + 0x20 + read-only + 0x00000000 + + + INEPTXFSAV + IN endpoint TxFIFO space + available + 0 + 16 + + + + + DTXFSTS7 + DTXFSTS7 + OTGFS device IN endpoint-7 transmit FIFO + status register + 0x1F8 + 0x20 + read-only + 0x00000000 + + + INEPTXFSAV + IN endpoint TxFIFO space + available + 0 + 16 + + + + + DOEPTSIZ1 + DOEPTSIZ1 + OTGFS device OUT endpoint-1 transfer size + register + 0x330 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + RXDPID + Received data PID + 29 + 2 + + + + + DOEPTSIZ2 + DOEPTSIZ2 + OTGFS device OUT endpoint-2 transfer size + register + 0x350 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + RXDPID + Received data PID + 29 + 2 + + + + + DOEPTSIZ3 + DOEPTSIZ3 + OTGFS device OUT endpoint-3 transfer size + register + 0x370 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + RXDPID + Received data PID + 29 + 2 + + + + + DOEPTSIZ4 + DOEPTSIZ4 + OTGFS device OUT endpoint-4 transfer size + register + 0x390 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + RXDPID + Received data PID + 29 + 2 + + + + + DOEPTSIZ5 + DOEPTSIZ5 + OTGFS device OUT endpoint-5 transfer size + register + 0x3B0 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + RXDPID + Received data PID + 29 + 2 + + + + + DOEPTSIZ6 + DOEPTSIZ6 + OTGFS device OUT endpoint-6 transfer size + register + 0x3D0 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + RXDPID + Received data PID + 29 + 2 + + + + + DOEPTSIZ7 + DOEPTSIZ7 + OTGFS device OUT endpoint-7 transfer size + register + 0x3F0 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + RXDPID + Received data PID + 29 + 2 + + + + + + + USB_OTG1_PWRCLK + USB on the go full speed + USB_OTG1 + 0x50000E00 + + 0x0 + 0x400 + registers + + + + PCGCCTL + PCGCCTL + OTGFS power and clock gating control + register (OTGFS_PCGCCTL) + 0x0 + 0x20 + 0x00000000 + + + STOPPCLK + Stop PHY clock + 0 + 1 + read-write + + + SUSPENDM + PHY Suspended + 4 + 1 + read-only + + + + + + + USB_OTG2_GLOBAL + USB on the go full speed + USB_OTG2 + 0x40040000 + + 0x0 + 0x400 + registers + + + OTGFS2 + USB On The Go FS2 global + interrupt + 77 + + + + GOTGCTL + GOTGCTL + OTGFS control and status register + (OTGFS_GOTGCTL) + 0x0 + 0x20 + 0x00000800 + + + CONIDSTS + Connector ID status + 16 + 1 + read-only + + + CURMOD + Current Mode of Operation + 21 + 1 + read-only + + + + + GOTGINT + GOTGINT + OTGFS interrupt register + (OTGFS_GOTGINT) + 0x4 + 0x20 + 0x00000000 + + + SESENDDET + VBUS is deasserted + 2 + 1 + read-write + + + + + GAHBCFG + GAHBCFG + OTGFS AHB configuration register + (OTGFS_GAHBCFG) + 0x8 + 0x20 + read-write + 0x00000000 + + + GLBINTMSK + Global interrupt mask + 0 + 1 + + + NPTXFEMPLVL + Non-Periodic TxFIFO empty level + 7 + 1 + + + PTXFEMPLVL + Periodic TxFIFO empty + level + 8 + 1 + + + + + GUSBCFG + GUSBCFG + USB configuration register + (OTGFS_GUSBCFG) + 0xC + 0x20 + 0x00000A00 + + + TOUTCAL + FS timeout calibration + 0 + 3 + read-write + + + USBTRDTIM + USB turnaround time + 10 + 4 + read-write + + + FHSTMODE + Force host mode + 29 + 1 + read-write + + + FDEVMODE + Force device mode + 30 + 1 + read-write + + + COTXPKT + Corrupt Tx packet + 31 + 1 + read-write + + + + + GRSTCTL + GRSTCTL + OTGFS reset register + (OTGFS_GRSTCTL) + 0x10 + 0x20 + 0x20000000 + + + CSFTRST + Core soft reset + 0 + 1 + read-write + + + PIUSFTRST + PIU FS Dedicated Controller Soft Reset + 1 + 1 + read-write + + + FRMCNTRST + Host frame counter reset + 2 + 1 + read-write + + + RXFFLSH + RxFIFO flush + 4 + 1 + read-write + + + TXFFLSH + TxFIFO flush + 5 + 1 + read-write + + + TXFNUM + TxFIFO number + 6 + 5 + read-write + + + AHBIDLE + AHB master idle + 31 + 1 + read-only + + + + + GINTSTS + GINTSTS + OTGFS core interrupt register + (OTGFS_GINTSTS) + 0x14 + 0x20 + 0x04000020 + + + CURMOD + Current mode of operation + 0 + 1 + read-only + + + MODEMIS + Mode mismatch interrupt + 1 + 1 + read-write + + + OTGINT + OTG interrupt + 2 + 1 + read-only + + + SOF + Start of frame + 3 + 1 + read-write + + + RXFLVL + RxFIFO non-empty + 4 + 1 + read-only + + + NPTXFEMP + Non-periodic TxFIFO empty + 5 + 1 + read-only + + + GINNAKEFF + Global IN non-periodic NAK + effective + 6 + 1 + read-only + + + GOUTNAKEFF + Global OUT NAK effective + 7 + 1 + read-only + + + ERLYSUSP + Early suspend + 10 + 1 + read-write + + + USBSUSP + USB suspend + 11 + 1 + read-write + + + USBRST + USB reset + 12 + 1 + read-write + + + ENUMDONE + Enumeration done + 13 + 1 + read-write + + + ISOOUTDROP + Isochronous OUT packet dropped + interrupt + 14 + 1 + read-write + + + EOPF + End of periodic frame + interrupt + 15 + 1 + read-write + + + IEPTINT + IN endpoint interrupt + 18 + 1 + read-only + + + OEPTINT + OUT endpoint interrupt + 19 + 1 + read-only + + + INCOMPISOIN + Incomplete isochronous IN + transfer + 20 + 1 + read-write + + + INCOMPIP_INCOMPISOOUT + Incomplete periodic transfer(Host + mode)/Incomplete isochronous OUT transfer(Device + mode) + 21 + 1 + read-write + + + PRTINT + Host port interrupt + 24 + 1 + read-only + + + HCHINT + Host channels interrupt + 25 + 1 + read-only + + + PTXFEMP + Periodic TxFIFO empty + 26 + 1 + read-only + + + CONIDSCHG + Connector ID status change + 28 + 1 + read-write + + + DISCONINT + Disconnect detected + interrupt + 29 + 1 + read-write + + + WKUPINT + Resume/remote wakeup detected + interrupt + 31 + 1 + read-write + + + + + GINTMSK + GINTMSK + OTG_FS interrupt mask register + (OTG_FS_GINTMSK) + 0x18 + 0x20 + 0x00000000 + + + MODEMISMSK + Mode mismatch interrupt + mask + 1 + 1 + read-write + + + OTGINTMSK + OTG interrupt mask + 2 + 1 + read-write + + + SOFMSK + Start of frame mask + 3 + 1 + read-write + + + RXFLVLMSK + Receive FIFO non-empty + mask + 4 + 1 + read-write + + + NPTXFEMPMSK + Non-periodic TxFIFO empty + mask + 5 + 1 + read-write + + + GINNAKEFFMSK + Global non-periodic IN NAK effective + mask + 6 + 1 + read-write + + + GOUTNAKEFFMSK + Global OUT NAK effective + mask + 7 + 1 + read-write + + + ERLYSUSPMSK + Early suspend mask + 10 + 1 + read-write + + + USBSUSPMSK + USB suspend mask + 11 + 1 + read-write + + + USBRSTMSK + USB reset mask + 12 + 1 + read-write + + + ENUMDONEMSK + Enumeration done mask + 13 + 1 + read-write + + + ISOOUTDROPMSK + Isochronous OUT packet dropped interrupt + mask + 14 + 1 + read-write + + + EOPFMSK + End of periodic frame interrupt + mask + 15 + 1 + read-write + + + IEPTINTMSK + IN endpoints interrupt + mask + 18 + 1 + read-write + + + OEPTINTMSK + OUT endpoints interrupt + mask + 19 + 1 + read-write + + + INCOMISOINMSK + Incomplete isochronous IN transfer + mask + 20 + 1 + read-write + + + INCOMPIP_INCOMPISOOUTMSK + Incomplete periodic transfer mask(Host + mode)/Incomplete isochronous OUT transfer mask(Device + mode) + 21 + 1 + read-write + + + PRTINTMSK + Host port interrupt mask + 24 + 1 + read-only + + + HCHINTMSK + Host channels interrupt + mask + 25 + 1 + read-write + + + PTXFEMPMSK + Periodic TxFIFO empty mask + 26 + 1 + read-write + + + CONIDSCHGMSK + Connector ID status change + mask + 28 + 1 + read-write + + + DISCONINTMSK + Disconnect detected interrupt + mask + 29 + 1 + read-write + + + WKUPINTMSK + Resume/remote wakeup detected interrupt + mask + 31 + 1 + read-write + + + + + GRXSTSR_Device + GRXSTSR_Device + OTGFS Receive status debug read(Device + mode) + 0x1C + 0x20 + read-only + 0x00000000 + + + EPTNUM + Endpoint number + 0 + 4 + + + BCNT + Byte count + 4 + 11 + + + DPID + Data PID + 15 + 2 + + + PKTSTS + Packet status + 17 + 4 + + + FN + Frame number + 21 + 4 + + + + + GRXSTSR_Host + GRXSTSR_Host + OTGFS Receive status debug read(Host + mode) + GRXSTSR_Device + 0x1C + 0x20 + read-only + 0x00000000 + + + CHNUM + Channel number + 0 + 4 + + + BCNT + Byte count + 4 + 11 + + + DPID + Data PID + 15 + 2 + + + PKTSTS + Packet status + 17 + 4 + + + + + GRXFSIZ + GRXFSIZ + OTGFS Receive FIFO size register + (OTGFS_GRXFSIZ) + 0x24 + 0x20 + read-write + 0x00000200 + + + RXFDEP + RxFIFO depth + 0 + 16 + + + + + DIEPTXF0 + DIEPTXF0 + IN Endpoint TxFIFO 0 transmit FIFO size + register (Device mode) + 0x28 + 0x20 + read-write + 0x00000200 + + + INEPT0TXSTADDR + Endpoint 0 transmit RAM start + address + 0 + 16 + + + INEPT0TXDEP + Endpoint 0 TxFIFO depth + 16 + 16 + + + + + GNPTXFSIZ + GNPTXFSIZ + OTGFS non-periodic transmit FIFO size + register (Host mode) + DIEPTXF0 + 0x28 + 0x20 + read-write + 0x00000200 + + + NPTXFSTADDR + Non-periodic Transmit RAM Start + address + 0 + 16 + + + NPTXFDEP + Non-periodic TxFIFO depth + 16 + 16 + + + + + GNPTXSTS + GNPTXSTS + OTGFS non-periodic transmit FIFO/queue + status register (OTGFS_GNPTXSTS) + 0x2C + 0x20 + read-only + 0x00080200 + + + NPTXFSPCAVAIL + Non-periodic TxFIFO space + available + 0 + 16 + + + NPTXQSPCAVAIL + Non-periodic transmit request queue + space available + 16 + 8 + + + NPTXQTOP + Top of the non-periodic transmit request + queue + 24 + 7 + + + + + GCCFG + GCCFG + OTGFS general core configuration register + (OTGFS_GCCFG) + 0x38 + 0x20 + read-write + 0x00000000 + + + PWRDOWN + Power down + 16 + 1 + + + LP_MODE + Low power mode + 17 + 1 + + + SOFOUTEN + SOF output enable + 20 + 1 + + + VBUSIG + VBUS Ignored + 21 + 1 + + + + + GUID + GUID + Product ID register + 0x3C + 0x20 + read-write + 0x00001000 + + + USERID + Product ID field + 0 + 32 + + + + + HPTXFSIZ + HPTXFSIZ + OTGFS Host periodic transmit FIFO size + register (OTGFS_HPTXFSIZ) + 0x100 + 0x20 + read-write + 0x02000600 + + + PTXFSTADDR + Host periodic TxFIFO start + address + 0 + 16 + + + PTXFSIZE + Host periodic TxFIFO depth + 16 + 16 + + + + + DIEPTXF1 + DIEPTXF1 + OTGFS device IN endpoint transmit FIFO size + register (OTGFS_DIEPTXF1) + 0x104 + 0x20 + read-write + 0x02000400 + + + INEPTXFSTADDR + IN endpoint FIFO1 transmit RAM start + address + 0 + 16 + + + INEPTXFDEP + IN endpoint TxFIFO depth + 16 + 16 + + + + + DIEPTXF2 + DIEPTXF2 + OTGFS device IN endpoint transmit FIFO size + register (OTGFS_DIEPTXF2) + 0x108 + 0x20 + read-write + 0x02000400 + + + INEPTXFSTADDR + IN endpoint FIFO2 transmit RAM start + address + 0 + 16 + + + INEPTXFDEP + IN endpoint TxFIFO depth + 16 + 16 + + + + + DIEPTXF3 + DIEPTXF3 + OTGFS device IN endpoint transmit FIFO size + register (OTGFS_DIEPTXF3) + 0x10C + 0x20 + read-write + 0x02000400 + + + INEPTXFSTADDR + IN endpoint FIFO3 transmit RAM start + address + 0 + 16 + + + INEPTXFDEP + IN endpoint TxFIFO depth + 16 + 16 + + + + + DIEPTXF4 + DIEPTXF4 + OTGFS device IN endpoint transmit FIFO size + register (OTGFS_DIEPTXF4) + 0x110 + 0x20 + read-write + 0x02000400 + + + INEPTXFSTADDR + IN endpoint FIFO4 transmit RAM start + address + 0 + 16 + + + INEPTXFDEP + IN endpoint TxFIFO depth + 16 + 16 + + + + + DIEPTXF5 + DIEPTXF5 + OTGFS device IN endpoint transmit FIFO size + register (OTGFS_DIEPTXF5) + 0x114 + 0x20 + read-write + 0x02000400 + + + INEPTXFSTADDR + IN endpoint FIFO5 transmit RAM start + address + 0 + 16 + + + INEPTXFDEP + IN endpoint TxFIFO depth + 16 + 16 + + + + + DIEPTXF6 + DIEPTXF6 + OTGFS device IN endpoint transmit FIFO size + register (OTGFS_DIEPTXF6) + 0x118 + 0x20 + read-write + 0x02000400 + + + INEPTXFSTADDR + IN endpoint FIFO6 transmit RAM start + address + 0 + 16 + + + INEPTXFDEP + IN endpoint TxFIFO depth + 16 + 16 + + + + + DIEPTXF7 + DIEPTXF7 + OTGFS device IN endpoint transmit FIFO size + register (OTGFS_DIEPTXF7) + 0x11C + 0x20 + read-write + 0x02000400 + + + INEPTXFSTADDR + IN endpoint FIFO7 transmit RAM start + address + 0 + 16 + + + INEPTXFDEP + IN endpoint TxFIFO depth + 16 + 16 + + + + + + + USB_OTG2_HOST + USB on the go full speed + USB_OTG2 + 0x40040400 + + 0x0 + 0x400 + registers + + + + HCFG + HCFG + OTGFS host configuration register + (OTGFS_HCFG) + 0x0 + 0x20 + 0x00000000 + + + FSLSPCLKSEL + FS/LS PHY clock select + 0 + 2 + read-write + + + FSLSSUPP + FS- and LS-only support + 2 + 1 + read-only + + + + + HFIR + HFIR + OTGFS Host frame interval + register + 0x4 + 0x20 + read-write + 0x0000EA60 + + + FRINT + Frame interval + 0 + 16 + + + + + HFNUM + HFNUM + OTGFS host frame number/frame time + remaining register (OTGFS_HFNUM) + 0x8 + 0x20 + read-only + 0x00003FFF + + + FRNUM + Frame number + 0 + 16 + + + FTREM + Frame time remaining + 16 + 16 + + + + + HPTXSTS + HPTXSTS + OTGFS_Host periodic transmit FIFO/queue + status register (OTGFS_HPTXSTS) + 0x10 + 0x20 + 0x00080100 + + + PTXFSPCAVAIL + Periodic transmit data FIFO space + available + 0 + 16 + read-write + + + PTXQSPCAVAIL + Periodic transmit request queue space + available + 16 + 8 + read-only + + + PTXQTOP + Top of the periodic transmit request + queue + 24 + 8 + read-only + + + + + HAINT + HAINT + OTGFS Host all channels interrupt + register + 0x14 + 0x20 + read-only + 0x00000000 + + + HAINT + Channel interrupts + 0 + 16 + + + + + HAINTMSK + HAINTMSK + OTGFS host all channels interrupt mask + register + 0x18 + 0x20 + read-write + 0x00000000 + + + HAINTMSK + Channel interrupt mask + 0 + 16 + + + + + HPRT + HPRT + OTGFS host port control and status register + (OTGFS_HPRT) + 0x40 + 0x20 + 0x00000000 + + + PRTCONSTS + Port connect status + 0 + 1 + read-only + + + PRTCONDET + Port connect detected + 1 + 1 + read-write + + + PRTENA + Port enable + 2 + 1 + read-write + + + PRTENCHNG + Port enable/disable change + 3 + 1 + read-write + + + PRTOVRCACT + Port overcurrent active + 4 + 1 + read-only + + + PRTOVRCCHNG + Port overcurrent change + 5 + 1 + read-write + + + PRTRES + Port resume + 6 + 1 + read-write + + + PRTSUSP + Port suspend + 7 + 1 + read-write + + + PRTRST + Port reset + 8 + 1 + read-write + + + PRTLNSTS + Port line status + 10 + 2 + read-only + + + PRTPWR + Port power + 12 + 1 + read-write + + + PRTTSTCTL + Port test control + 13 + 4 + read-write + + + PRTSPD + Port speed + 17 + 2 + read-only + + + + + HCCHAR0 + HCCHAR0 + OTGFS host channel-0 characteristics + register (OTGFS_HCCHAR0) + 0x100 + 0x20 + read-write + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + + + EPTNUM + Endpoint number + 11 + 4 + + + EPTDIR + Endpoint direction + 15 + 1 + + + LSPDDEV + Low-speed device + 17 + 1 + + + EPTYPE + Endpoint type + 18 + 2 + + + MC + Multicount + 20 + 2 + + + DEVADDR + Device address + 22 + 7 + + + ODDFRM + Odd frame + 29 + 1 + + + CHDIS + Channel disable + 30 + 1 + + + CHENA + Channel enable + 31 + 1 + + + + + HCCHAR1 + HCCHAR1 + OTGFS host channel-1 characteristics + register (OTGFS_HCCHAR1) + 0x120 + 0x20 + read-write + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + + + EPTNUM + Endpoint number + 11 + 4 + + + EPTDIR + Endpoint direction + 15 + 1 + + + LSPDDEV + Low-speed device + 17 + 1 + + + EPTYPE + Endpoint type + 18 + 2 + + + MC + Multicount + 20 + 2 + + + DEVADDR + Device address + 22 + 7 + + + ODDFRM + Odd frame + 29 + 1 + + + CHDIS + Channel disable + 30 + 1 + + + CHENA + Channel enable + 31 + 1 + + + + + HCCHAR2 + HCCHAR2 + OTGFS host channel-2 characteristics + register (OTGFS_HCCHAR2) + 0x140 + 0x20 + read-write + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + + + EPTNUM + Endpoint number + 11 + 4 + + + EPTDIR + Endpoint direction + 15 + 1 + + + LSPDDEV + Low-speed device + 17 + 1 + + + EPTYPE + Endpoint type + 18 + 2 + + + MC + Multicount + 20 + 2 + + + DEVADDR + Device address + 22 + 7 + + + ODDFRM + Odd frame + 29 + 1 + + + CHDIS + Channel disable + 30 + 1 + + + CHENA + Channel enable + 31 + 1 + + + + + HCCHAR3 + HCCHAR3 + OTGFS host channel-3 characteristics + register (OTGFS_HCCHAR3) + 0x160 + 0x20 + read-write + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + + + EPTNUM + Endpoint number + 11 + 4 + + + EPTDIR + Endpoint direction + 15 + 1 + + + LSPDDEV + Low-speed device + 17 + 1 + + + EPTYPE + Endpoint type + 18 + 2 + + + MC + Multicount + 20 + 2 + + + DEVADDR + Device address + 22 + 7 + + + ODDFRM + Odd frame + 29 + 1 + + + CHDIS + Channel disable + 30 + 1 + + + CHENA + Channel enable + 31 + 1 + + + + + HCCHAR4 + HCCHAR4 + OTGFS host channel-4 characteristics + register (OTGFS_HCCHAR4) + 0x180 + 0x20 + read-write + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + + + EPTNUM + Endpoint number + 11 + 4 + + + EPTDIR + Endpoint direction + 15 + 1 + + + LSPDDEV + Low-speed device + 17 + 1 + + + EPTYPE + Endpoint type + 18 + 2 + + + MC + Multicount + 20 + 2 + + + DEVADDR + Device address + 22 + 7 + + + ODDFRM + Odd frame + 29 + 1 + + + CHDIS + Channel disable + 30 + 1 + + + CHENA + Channel enable + 31 + 1 + + + + + HCCHAR5 + HCCHAR5 + OTGFS host channel-5 characteristics + register (OTGFS_HCCHAR5) + 0x1A0 + 0x20 + read-write + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + + + EPTNUM + Endpoint number + 11 + 4 + + + EPTDIR + Endpoint direction + 15 + 1 + + + LSPDDEV + Low-speed device + 17 + 1 + + + EPTYPE + Endpoint type + 18 + 2 + + + MC + Multicount + 20 + 2 + + + DEVADDR + Device address + 22 + 7 + + + ODDFRM + Odd frame + 29 + 1 + + + CHDIS + Channel disable + 30 + 1 + + + CHENA + Channel enable + 31 + 1 + + + + + HCCHAR6 + HCCHAR6 + OTGFS host channel-6 characteristics + register (OTGFS_HCCHAR6) + 0x1C0 + 0x20 + read-write + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + + + EPTNUM + Endpoint number + 11 + 4 + + + EPTDIR + Endpoint direction + 15 + 1 + + + LSPDDEV + Low-speed device + 17 + 1 + + + EPTYPE + Endpoint type + 18 + 2 + + + MC + Multicount + 20 + 2 + + + DEVADDR + Device address + 22 + 7 + + + ODDFRM + Odd frame + 29 + 1 + + + CHDIS + Channel disable + 30 + 1 + + + CHENA + Channel enable + 31 + 1 + + + + + HCCHAR7 + HCCHAR7 + OTGFS host channel-7 characteristics + register (OTGFS_HCCHAR7) + 0x1E0 + 0x20 + read-write + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + + + EPTNUM + Endpoint number + 11 + 4 + + + EPTDIR + Endpoint direction + 15 + 1 + + + LSPDDEV + Low-speed device + 17 + 1 + + + EPTYPE + Endpoint type + 18 + 2 + + + MC + Multicount + 20 + 2 + + + DEVADDR + Device address + 22 + 7 + + + ODDFRM + Odd frame + 29 + 1 + + + CHDIS + Channel disable + 30 + 1 + + + CHENA + Channel enable + 31 + 1 + + + + + HCCHAR8 + HCCHAR8 + OTGFS host channel-8 characteristics + register (OTGFS_HCCHAR8) + 0x200 + 0x20 + read-write + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + + + EPTNUM + Endpoint number + 11 + 4 + + + EPTDIR + Endpoint direction + 15 + 1 + + + LSPDDEV + Low-speed device + 17 + 1 + + + EPTYPE + Endpoint type + 18 + 2 + + + MC + Multicount + 20 + 2 + + + DEVADDR + Device address + 22 + 7 + + + ODDFRM + Odd frame + 29 + 1 + + + CHDIS + Channel disable + 30 + 1 + + + CHENA + Channel enable + 31 + 1 + + + + + HCCHAR9 + HCCHAR9 + OTGFS host channel-9 characteristics + register (OTGFS_HCCHAR9) + 0x220 + 0x20 + read-write + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + + + EPTNUM + Endpoint number + 11 + 4 + + + EPTDIR + Endpoint direction + 15 + 1 + + + LSPDDEV + Low-speed device + 17 + 1 + + + EPTYPE + Endpoint type + 18 + 2 + + + MC + Multicount + 20 + 2 + + + DEVADDR + Device address + 22 + 7 + + + ODDFRM + Odd frame + 29 + 1 + + + CHDIS + Channel disable + 30 + 1 + + + CHENA + Channel enable + 31 + 1 + + + + + HCCHAR10 + HCCHAR10 + OTGFS host channel-10 characteristics + register (OTGFS_HCCHAR10) + 0x240 + 0x20 + read-write + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + + + EPTNUM + Endpoint number + 11 + 4 + + + EPTDIR + Endpoint direction + 15 + 1 + + + LSPDDEV + Low-speed device + 17 + 1 + + + EPTYPE + Endpoint type + 18 + 2 + + + MC + Multicount + 20 + 2 + + + DEVADDR + Device address + 22 + 7 + + + ODDFRM + Odd frame + 29 + 1 + + + CHDIS + Channel disable + 30 + 1 + + + CHENA + Channel enable + 31 + 1 + + + + + HCCHAR11 + HCCHAR11 + OTGFS host channel-7 characteristics + register (OTGFS_HCCHAR11) + 0x260 + 0x20 + read-write + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + + + EPTNUM + Endpoint number + 11 + 4 + + + EPTDIR + Endpoint direction + 15 + 1 + + + LSPDDEV + Low-speed device + 17 + 1 + + + EPTYPE + Endpoint type + 18 + 2 + + + MC + Multicount + 20 + 2 + + + DEVADDR + Device address + 22 + 7 + + + ODDFRM + Odd frame + 29 + 1 + + + CHDIS + Channel disable + 30 + 1 + + + CHENA + Channel enable + 31 + 1 + + + + + HCCHAR12 + HCCHAR12 + OTGFS host channel-12 characteristics + register (OTGFS_HCCHAR12) + 0x280 + 0x20 + read-write + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + + + EPTNUM + Endpoint number + 11 + 4 + + + EPTDIR + Endpoint direction + 15 + 1 + + + LSPDDEV + Low-speed device + 17 + 1 + + + EPTYPE + Endpoint type + 18 + 2 + + + MC + Multicount + 20 + 2 + + + DEVADDR + Device address + 22 + 7 + + + ODDFRM + Odd frame + 29 + 1 + + + CHDIS + Channel disable + 30 + 1 + + + CHENA + Channel enable + 31 + 1 + + + + + HCCHAR13 + HCCHAR13 + OTGFS host channel-13 characteristics + register (OTGFS_HCCHAR13) + 0x2A0 + 0x20 + read-write + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + + + EPTNUM + Endpoint number + 11 + 4 + + + EPTDIR + Endpoint direction + 15 + 1 + + + LSPDDEV + Low-speed device + 17 + 1 + + + EPTYPE + Endpoint type + 18 + 2 + + + MC + Multicount + 20 + 2 + + + DEVADDR + Device address + 22 + 7 + + + ODDFRM + Odd frame + 29 + 1 + + + CHDIS + Channel disable + 30 + 1 + + + CHENA + Channel enable + 31 + 1 + + + + + HCCHAR14 + HCCHAR14 + OTGFS host channel-14 characteristics + register (OTGFS_HCCHAR14) + 0x2C0 + 0x20 + read-write + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + + + EPTNUM + Endpoint number + 11 + 4 + + + EPTDIR + Endpoint direction + 15 + 1 + + + LSPDDEV + Low-speed device + 17 + 1 + + + EPTYPE + Endpoint type + 18 + 2 + + + MC + Multicount + 20 + 2 + + + DEVADDR + Device address + 22 + 7 + + + ODDFRM + Odd frame + 29 + 1 + + + CHDIS + Channel disable + 30 + 1 + + + CHENA + Channel enable + 31 + 1 + + + + + HCCHAR15 + HCCHAR15 + OTGFS host channel-15 characteristics + register (OTGFS_HCCHAR15) + 0x2E0 + 0x20 + read-write + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + + + EPTNUM + Endpoint number + 11 + 4 + + + EPTDIR + Endpoint direction + 15 + 1 + + + LSPDDEV + Low-speed device + 17 + 1 + + + EPTYPE + Endpoint type + 18 + 2 + + + MC + Multicount + 20 + 2 + + + DEVADDR + Device address + 22 + 7 + + + ODDFRM + Odd frame + 29 + 1 + + + CHDIS + Channel disable + 30 + 1 + + + CHENA + Channel enable + 31 + 1 + + + + + HCINT0 + HCINT0 + OTGFS host channel-0 interrupt register + (OTGFS_HCINT0) + 0x108 + 0x20 + read-write + 0x00000000 + + + XFERC + Transfer completed + 0 + 1 + + + CHHLTD + Channel halted + 1 + 1 + + + STALL + STALL response received + interrupt + 3 + 1 + + + NAK + NAK response received + interrupt + 4 + 1 + + + ACK + ACK response received/transmitted + interrupt + 5 + 1 + + + XACTERR + Transaction error + 7 + 1 + + + BBLERR + Babble error + 8 + 1 + + + FRMOVRUN + Frame overrun + 9 + 1 + + + DTGLERR + Data toggle error + 10 + 1 + + + + + HCINT1 + HCINT1 + OTG_FS host channel-1 interrupt register + (OTG_FS_HCINT1) + 0x128 + 0x20 + read-write + 0x00000000 + + + XFERC + Transfer completed + 0 + 1 + + + CHHLTD + Channel halted + 1 + 1 + + + STALL + STALL response received + interrupt + 3 + 1 + + + NAK + NAK response received + interrupt + 4 + 1 + + + ACK + ACK response received/transmitted + interrupt + 5 + 1 + + + XACTERR + Transaction error + 7 + 1 + + + BBLERR + Babble error + 8 + 1 + + + FRMOVRUN + Frame overrun + 9 + 1 + + + DTGLERR + Data toggle error + 10 + 1 + + + + + HCINT2 + HCINT2 + OTGFS host channel-2 interrupt register + (OTGFS_HCINT2) + 0x148 + 0x20 + read-write + 0x00000000 + + + XFERC + Transfer completed + 0 + 1 + + + CHHLTD + Channel halted + 1 + 1 + + + STALL + STALL response received + interrupt + 3 + 1 + + + NAK + NAK response received + interrupt + 4 + 1 + + + ACK + ACK response received/transmitted + interrupt + 5 + 1 + + + XACTERR + Transaction error + 7 + 1 + + + BBLERR + Babble error + 8 + 1 + + + FRMOVRUN + Frame overrun + 9 + 1 + + + DTGLERR + Data toggle error + 10 + 1 + + + + + HCINT3 + HCINT3 + OTGFS host channel-3 interrupt register + (OTGFS_HCINT3) + 0x168 + 0x20 + read-write + 0x00000000 + + + XFERC + Transfer completed + 0 + 1 + + + CHHLTD + Channel halted + 1 + 1 + + + STALL + STALL response received + interrupt + 3 + 1 + + + NAK + NAK response received + interrupt + 4 + 1 + + + ACK + ACK response received/transmitted + interrupt + 5 + 1 + + + XACTERR + Transaction error + 7 + 1 + + + BBLERR + Babble error + 8 + 1 + + + FRMOVRUN + Frame overrun + 9 + 1 + + + DTGLERR + Data toggle error + 10 + 1 + + + + + HCINT4 + HCINT4 + OTGFS host channel-4 interrupt register + (OTGFS_HCINT4) + 0x188 + 0x20 + read-write + 0x00000000 + + + XFERC + Transfer completed + 0 + 1 + + + CHHLTD + Channel halted + 1 + 1 + + + STALL + STALL response received + interrupt + 3 + 1 + + + NAK + NAK response received + interrupt + 4 + 1 + + + ACK + ACK response received/transmitted + interrupt + 5 + 1 + + + XACTERR + Transaction error + 7 + 1 + + + BBLERR + Babble error + 8 + 1 + + + FRMOVRUN + Frame overrun + 9 + 1 + + + DTGLERR + Data toggle error + 10 + 1 + + + + + HCINT5 + HCINT5 + OTGFS host channel-5 interrupt register + (OTGFS_HCINT5) + 0x1A8 + 0x20 + read-write + 0x00000000 + + + XFERC + Transfer completed + 0 + 1 + + + CHHLTD + Channel halted + 1 + 1 + + + STALL + STALL response received + interrupt + 3 + 1 + + + NAK + NAK response received + interrupt + 4 + 1 + + + ACK + ACK response received/transmitted + interrupt + 5 + 1 + + + XACTERR + Transaction error + 7 + 1 + + + BBLERR + Babble error + 8 + 1 + + + FRMOVRUN + Frame overrun + 9 + 1 + + + DTGLERR + Data toggle error + 10 + 1 + + + + + HCINT6 + HCINT6 + OTGFS host channel-6 interrupt register + (OTGFS_HCINT6) + 0x1C8 + 0x20 + read-write + 0x00000000 + + + XFERC + Transfer completed + 0 + 1 + + + CHHLTD + Channel halted + 1 + 1 + + + STALL + STALL response received + interrupt + 3 + 1 + + + NAK + NAK response received + interrupt + 4 + 1 + + + ACK + ACK response received/transmitted + interrupt + 5 + 1 + + + XACTERR + Transaction error + 7 + 1 + + + BBLERR + Babble error + 8 + 1 + + + FRMOVRUN + Frame overrun + 9 + 1 + + + DTGLERR + Data toggle error + 10 + 1 + + + + + HCINT7 + HCINT7 + OTGFS host channel-7 interrupt register + (OTGFS_HCINT7) + 0x1E8 + 0x20 + read-write + 0x00000000 + + + XFERC + Transfer completed + 0 + 1 + + + CHHLTD + Channel halted + 1 + 1 + + + STALL + STALL response received + interrupt + 3 + 1 + + + NAK + NAK response received + interrupt + 4 + 1 + + + ACK + ACK response received/transmitted + interrupt + 5 + 1 + + + XACTERR + Transaction error + 7 + 1 + + + BBLERR + Babble error + 8 + 1 + + + FRMOVRUN + Frame overrun + 9 + 1 + + + DTGLERR + Data toggle error + 10 + 1 + + + + + HCINT8 + HCINT8 + OTGFS host channel-8 interrupt register + (OTGFS_HCINT8) + 0x208 + 0x20 + read-write + 0x00000000 + + + XFERC + Transfer completed + 0 + 1 + + + CHHLTD + Channel halted + 1 + 1 + + + STALL + STALL response received + interrupt + 3 + 1 + + + NAK + NAK response received + interrupt + 4 + 1 + + + ACK + ACK response received/transmitted + interrupt + 5 + 1 + + + XACTERR + Transaction error + 7 + 1 + + + BBLERR + Babble error + 8 + 1 + + + FRMOVRUN + Frame overrun + 9 + 1 + + + DTGLERR + Data toggle error + 10 + 1 + + + + + HCINT9 + HCINT9 + OTGFS host channel-9 interrupt register + (OTGFS_HCINT9) + 0x228 + 0x20 + read-write + 0x00000000 + + + XFERC + Transfer completed + 0 + 1 + + + CHHLTD + Channel halted + 1 + 1 + + + STALL + STALL response received + interrupt + 3 + 1 + + + NAK + NAK response received + interrupt + 4 + 1 + + + ACK + ACK response received/transmitted + interrupt + 5 + 1 + + + XACTERR + Transaction error + 7 + 1 + + + BBLERR + Babble error + 8 + 1 + + + FRMOVRUN + Frame overrun + 9 + 1 + + + DTGLERR + Data toggle error + 10 + 1 + + + + + HCINT10 + HCINT10 + OTGFS host channel-10 interrupt register + (OTGFS_HCINT10) + 0x248 + 0x20 + read-write + 0x00000000 + + + XFERC + Transfer completed + 0 + 1 + + + CHHLTD + Channel halted + 1 + 1 + + + STALL + STALL response received + interrupt + 3 + 1 + + + NAK + NAK response received + interrupt + 4 + 1 + + + ACK + ACK response received/transmitted + interrupt + 5 + 1 + + + XACTERR + Transaction error + 7 + 1 + + + BBLERR + Babble error + 8 + 1 + + + FRMOVRUN + Frame overrun + 9 + 1 + + + DTGLERR + Data toggle error + 10 + 1 + + + + + HCINT11 + HCINT11 + OTGFS host channel-11 interrupt register + (OTGFS_HCINT11) + 0x268 + 0x20 + read-write + 0x00000000 + + + XFERC + Transfer completed + 0 + 1 + + + CHHLTD + Channel halted + 1 + 1 + + + STALL + STALL response received + interrupt + 3 + 1 + + + NAK + NAK response received + interrupt + 4 + 1 + + + ACK + ACK response received/transmitted + interrupt + 5 + 1 + + + XACTERR + Transaction error + 7 + 1 + + + BBLERR + Babble error + 8 + 1 + + + FRMOVRUN + Frame overrun + 9 + 1 + + + DTGLERR + Data toggle error + 10 + 1 + + + + + HCINT12 + HCINT12 + OTGFS host channel-12 interrupt register + (OTGFS_HCINT12) + 0x288 + 0x20 + read-write + 0x00000000 + + + XFERC + Transfer completed + 0 + 1 + + + CHHLTD + Channel halted + 1 + 1 + + + STALL + STALL response received + interrupt + 3 + 1 + + + NAK + NAK response received + interrupt + 4 + 1 + + + ACK + ACK response received/transmitted + interrupt + 5 + 1 + + + XACTERR + Transaction error + 7 + 1 + + + BBLERR + Babble error + 8 + 1 + + + FRMOVRUN + Frame overrun + 9 + 1 + + + DTGLERR + Data toggle error + 10 + 1 + + + + + HCINT13 + HCINT13 + OTGFS host channel-13 interrupt register + (OTGFS_HCINT13) + 0x2A8 + 0x20 + read-write + 0x00000000 + + + XFERC + Transfer completed + 0 + 1 + + + CHHLTD + Channel halted + 1 + 1 + + + STALL + STALL response received + interrupt + 3 + 1 + + + NAK + NAK response received + interrupt + 4 + 1 + + + ACK + ACK response received/transmitted + interrupt + 5 + 1 + + + XACTERR + Transaction error + 7 + 1 + + + BBLERR + Babble error + 8 + 1 + + + FRMOVRUN + Frame overrun + 9 + 1 + + + DTGLERR + Data toggle error + 10 + 1 + + + + + HCINT14 + HCINT14 + OTGFS host channel-14 interrupt register + (OTGFS_HCINT14) + 0x2C8 + 0x20 + read-write + 0x00000000 + + + XFERC + Transfer completed + 0 + 1 + + + CHHLTD + Channel halted + 1 + 1 + + + STALL + STALL response received + interrupt + 3 + 1 + + + NAK + NAK response received + interrupt + 4 + 1 + + + ACK + ACK response received/transmitted + interrupt + 5 + 1 + + + XACTERR + Transaction error + 7 + 1 + + + BBLERR + Babble error + 8 + 1 + + + FRMOVRUN + Frame overrun + 9 + 1 + + + DTGLERR + Data toggle error + 10 + 1 + + + + + HCINT15 + HCINT15 + OTGFS host channel-15 interrupt register + (OTGFS_HCINT15) + 0x2E8 + 0x20 + read-write + 0x00000000 + + + XFERC + Transfer completed + 0 + 1 + + + CHHLTD + Channel halted + 1 + 1 + + + STALL + STALL response received + interrupt + 3 + 1 + + + NAK + NAK response received + interrupt + 4 + 1 + + + ACK + ACK response received/transmitted + interrupt + 5 + 1 + + + XACTERR + Transaction error + 7 + 1 + + + BBLERR + Babble error + 8 + 1 + + + FRMOVRUN + Frame overrun + 9 + 1 + + + DTGLERR + Data toggle error + 10 + 1 + + + + + HCINTMSK0 + HCINTMSK0 + OTGFS host channel-0 mask register + (OTGFS_HCINTMSK0) + 0x10C + 0x20 + read-write + 0x00000000 + + + XFERCMSK + Transfer completed mask + 0 + 1 + + + CHHLTDMSK + Channel halted mask + 1 + 1 + + + STALLMSK + STALL response received interrupt + mask + 3 + 1 + + + NAKMSK + NAK response received interrupt + mask + 4 + 1 + + + ACKMSK + ACK response received/transmitted + interrupt mask + 5 + 1 + + + XACTERRMSK + Transaction error mask + 7 + 1 + + + BBLERRMSK + Babble error mask + 8 + 1 + + + FRMOVRUNMSK + Frame overrun mask + 9 + 1 + + + DTGLERRMSK + Data toggle error mask + 10 + 1 + + + + + HCINTMSK1 + HCINTMSK1 + OTGFS host channel-1 mask register + (OTGFS_HCINTMSK1) + 0x12C + 0x20 + read-write + 0x00000000 + + + XFERCMSK + Transfer completed mask + 0 + 1 + + + CHHLTDMSK + Channel halted mask + 1 + 1 + + + STALLMSK + STALL response received interrupt + mask + 3 + 1 + + + NAKMSK + NAK response received interrupt + mask + 4 + 1 + + + ACKMSK + ACK response received/transmitted + interrupt mask + 5 + 1 + + + XACTERRMSK + Transaction error mask + 7 + 1 + + + BBLERRMSK + Babble error mask + 8 + 1 + + + FRMOVRUNMSK + Frame overrun mask + 9 + 1 + + + DTGLERRMSK + Data toggle error mask + 10 + 1 + + + + + HCINTMSK2 + HCINTMSK2 + OTGFS host channel-2 mask register + (OTGFS_HCINTMSK2) + 0x14C + 0x20 + read-write + 0x00000000 + + + XFERCMSK + Transfer completed mask + 0 + 1 + + + CHHLTDMSK + Channel halted mask + 1 + 1 + + + STALLMSK + STALL response received interrupt + mask + 3 + 1 + + + NAKMSK + NAK response received interrupt + mask + 4 + 1 + + + ACKMSK + ACK response received/transmitted + interrupt mask + 5 + 1 + + + XACTERRMSK + Transaction error mask + 7 + 1 + + + BBLERRMSK + Babble error mask + 8 + 1 + + + FRMOVRUNMSK + Frame overrun mask + 9 + 1 + + + DTGLERRMSK + Data toggle error mask + 10 + 1 + + + + + HCINTMSK3 + HCINTMSK3 + OTGFS host channel-3 mask register + (OTGFS_HCINTMSK3) + 0x16C + 0x20 + read-write + 0x00000000 + + + XFERCMSK + Transfer completed mask + 0 + 1 + + + CHHLTDMSK + Channel halted mask + 1 + 1 + + + STALLMSK + STALL response received interrupt + mask + 3 + 1 + + + NAKMSK + NAK response received interrupt + mask + 4 + 1 + + + ACKMSK + ACK response received/transmitted + interrupt mask + 5 + 1 + + + XACTERRMSK + Transaction error mask + 7 + 1 + + + BBLERRMSK + Babble error mask + 8 + 1 + + + FRMOVRUNMSK + Frame overrun mask + 9 + 1 + + + DTGLERRMSK + Data toggle error mask + 10 + 1 + + + + + HCINTMSK4 + HCINTMSK4 + OTGFS host channel-4 mask register + (OTGFS_HCINTMSK4) + 0x18C + 0x20 + read-write + 0x00000000 + + + XFERCMSK + Transfer completed mask + 0 + 1 + + + CHHLTDMSK + Channel halted mask + 1 + 1 + + + STALLMSK + STALL response received interrupt + mask + 3 + 1 + + + NAKMSK + NAK response received interrupt + mask + 4 + 1 + + + ACKMSK + ACK response received/transmitted + interrupt mask + 5 + 1 + + + XACTERRMSK + Transaction error mask + 7 + 1 + + + BBLERRMSK + Babble error mask + 8 + 1 + + + FRMOVRUNMSK + Frame overrun mask + 9 + 1 + + + DTGLERRMSK + Data toggle error mask + 10 + 1 + + + + + HCINTMSK5 + HCINTMSK5 + OTGFS host channel-5 mask register + (OTGFS_HCINTMSK5) + 0x1AC + 0x20 + read-write + 0x00000000 + + + XFERCMSK + Transfer completed mask + 0 + 1 + + + CHHLTDMSK + Channel halted mask + 1 + 1 + + + STALLMSK + STALL response received interrupt + mask + 3 + 1 + + + NAKMSK + NAK response received interrupt + mask + 4 + 1 + + + ACKMSK + ACK response received/transmitted + interrupt mask + 5 + 1 + + + XACTERRMSK + Transaction error mask + 7 + 1 + + + BBLERRMSK + Babble error mask + 8 + 1 + + + FRMOVRUNMSK + Frame overrun mask + 9 + 1 + + + DTGLERRMSK + Data toggle error mask + 10 + 1 + + + + + HCINTMSK6 + HCINTMSK6 + OTGFS host channel-6 mask register + (OTGFS_HCINTMSK6) + 0x1CC + 0x20 + read-write + 0x00000000 + + + XFERCMSK + Transfer completed mask + 0 + 1 + + + CHHLTDMSK + Channel halted mask + 1 + 1 + + + STALLMSK + STALL response received interrupt + mask + 3 + 1 + + + NAKMSK + NAK response received interrupt + mask + 4 + 1 + + + ACKMSK + ACK response received/transmitted + interrupt mask + 5 + 1 + + + XACTERRMSK + Transaction error mask + 7 + 1 + + + BBLERRMSK + Babble error mask + 8 + 1 + + + FRMOVRUNMSK + Frame overrun mask + 9 + 1 + + + DTGLERRMSK + Data toggle error mask + 10 + 1 + + + + + HCINTMSK7 + HCINTMSK7 + OTGFS host channel-7 mask register + (OTGFS_HCINTMSK7) + 0x1EC + 0x20 + read-write + 0x00000000 + + + XFERCMSK + Transfer completed mask + 0 + 1 + + + CHHLTDMSK + Channel halted mask + 1 + 1 + + + STALLMSK + STALL response received interrupt + mask + 3 + 1 + + + NAKMSK + NAK response received interrupt + mask + 4 + 1 + + + ACKMSK + ACK response received/transmitted + interrupt mask + 5 + 1 + + + XACTERRMSK + Transaction error mask + 7 + 1 + + + BBLERRMSK + Babble error mask + 8 + 1 + + + FRMOVRUNMSK + Frame overrun mask + 9 + 1 + + + DTGLERRMSK + Data toggle error mask + 10 + 1 + + + + + HCINTMSK8 + HCINTMSK8 + OTGFS host channel-8 mask register + (OTGFS_HCINTMSK8) + 0x20C + 0x20 + read-write + 0x00000000 + + + XFERCMSK + Transfer completed mask + 0 + 1 + + + CHHLTDMSK + Channel halted mask + 1 + 1 + + + STALLMSK + STALL response received interrupt + mask + 3 + 1 + + + NAKMSK + NAK response received interrupt + mask + 4 + 1 + + + ACKMSK + ACK response received/transmitted + interrupt mask + 5 + 1 + + + XACTERRMSK + Transaction error mask + 7 + 1 + + + BBLERRMSK + Babble error mask + 8 + 1 + + + FRMOVRUNMSK + Frame overrun mask + 9 + 1 + + + DTGLERRMSK + Data toggle error mask + 10 + 1 + + + + + HCINTMSK9 + HCINTMSK9 + OTGFS host channel-9 mask register + (OTGFS_HCINTMSK9) + 0x22C + 0x20 + read-write + 0x00000000 + + + XFERCMSK + Transfer completed mask + 0 + 1 + + + CHHLTDMSK + Channel halted mask + 1 + 1 + + + STALLMSK + STALL response received interrupt + mask + 3 + 1 + + + NAKMSK + NAK response received interrupt + mask + 4 + 1 + + + ACKMSK + ACK response received/transmitted + interrupt mask + 5 + 1 + + + XACTERRMSK + Transaction error mask + 7 + 1 + + + BBLERRMSK + Babble error mask + 8 + 1 + + + FRMOVRUNMSK + Frame overrun mask + 9 + 1 + + + DTGLERRMSK + Data toggle error mask + 10 + 1 + + + + + HCINTMSK10 + HCINTMSK10 + OTGFS host channel-10 mask register + (OTGFS_HCINTMSK10) + 0x24C + 0x20 + read-write + 0x00000000 + + + XFERCMSK + Transfer completed mask + 0 + 1 + + + CHHLTDMSK + Channel halted mask + 1 + 1 + + + STALLMSK + STALL response received interrupt + mask + 3 + 1 + + + NAKMSK + NAK response received interrupt + mask + 4 + 1 + + + ACKMSK + ACK response received/transmitted + interrupt mask + 5 + 1 + + + XACTERRMSK + Transaction error mask + 7 + 1 + + + BBLERRMSK + Babble error mask + 8 + 1 + + + FRMOVRUNMSK + Frame overrun mask + 9 + 1 + + + DTGLERRMSK + Data toggle error mask + 10 + 1 + + + + + HCINTMSK11 + HCINTMSK11 + OTGFS host channel-11 mask register + (OTGFS_HCINTMSK11) + 0x26C + 0x20 + read-write + 0x00000000 + + + XFERCMSK + Transfer completed mask + 0 + 1 + + + CHHLTDMSK + Channel halted mask + 1 + 1 + + + STALLMSK + STALL response received interrupt + mask + 3 + 1 + + + NAKMSK + NAK response received interrupt + mask + 4 + 1 + + + ACKMSK + ACK response received/transmitted + interrupt mask + 5 + 1 + + + XACTERRMSK + Transaction error mask + 7 + 1 + + + BBLERRMSK + Babble error mask + 8 + 1 + + + FRMOVRUNMSK + Frame overrun mask + 9 + 1 + + + DTGLERRMSK + Data toggle error mask + 10 + 1 + + + + + HCINTMSK12 + HCINTMSK12 + OTGFS host channel-12 mask register + (OTGFS_HCINTMSK12) + 0x28C + 0x20 + read-write + 0x00000000 + + + XFERCMSK + Transfer completed mask + 0 + 1 + + + CHHLTDMSK + Channel halted mask + 1 + 1 + + + STALLMSK + STALL response received interrupt + mask + 3 + 1 + + + NAKMSK + NAK response received interrupt + mask + 4 + 1 + + + ACKMSK + ACK response received/transmitted + interrupt mask + 5 + 1 + + + XACTERRMSK + Transaction error mask + 7 + 1 + + + BBLERRMSK + Babble error mask + 8 + 1 + + + FRMOVRUNMSK + Frame overrun mask + 9 + 1 + + + DTGLERRMSK + Data toggle error mask + 10 + 1 + + + + + HCINTMSK13 + HCINTMSK13 + OTGFS host channel-13 mask register + (OTGFS_HCINTMSK13) + 0x2AC + 0x20 + read-write + 0x00000000 + + + XFERCMSK + Transfer completed mask + 0 + 1 + + + CHHLTDMSK + Channel halted mask + 1 + 1 + + + STALLMSK + STALL response received interrupt + mask + 3 + 1 + + + NAKMSK + NAK response received interrupt + mask + 4 + 1 + + + ACKMSK + ACK response received/transmitted + interrupt mask + 5 + 1 + + + XACTERRMSK + Transaction error mask + 7 + 1 + + + BBLERRMSK + Babble error mask + 8 + 1 + + + FRMOVRUNMSK + Frame overrun mask + 9 + 1 + + + DTGLERRMSK + Data toggle error mask + 10 + 1 + + + + + HCINTMSK14 + HCINTMSK14 + OTGFS host channel-14 mask register + (OTGFS_HCINTMSK14) + 0x2CC + 0x20 + read-write + 0x00000000 + + + XFERCMSK + Transfer completed mask + 0 + 1 + + + CHHLTDMSK + Channel halted mask + 1 + 1 + + + STALLMSK + STALL response received interrupt + mask + 3 + 1 + + + NAKMSK + NAK response received interrupt + mask + 4 + 1 + + + ACKMSK + ACK response received/transmitted + interrupt mask + 5 + 1 + + + XACTERRMSK + Transaction error mask + 7 + 1 + + + BBLERRMSK + Babble error mask + 8 + 1 + + + FRMOVRUNMSK + Frame overrun mask + 9 + 1 + + + DTGLERRMSK + Data toggle error mask + 10 + 1 + + + + + HCINTMSK15 + HCINTMSK15 + OTGFS host channel-15 mask register + (OTGFS_HCINTMSK15) + 0x2EC + 0x20 + read-write + 0x00000000 + + + XFERCMSK + Transfer completed mask + 0 + 1 + + + CHHLTDMSK + Channel halted mask + 1 + 1 + + + STALLMSK + STALL response received interrupt + mask + 3 + 1 + + + NAKMSK + NAK response received interrupt + mask + 4 + 1 + + + ACKMSK + ACK response received/transmitted + interrupt mask + 5 + 1 + + + XACTERRMSK + Transaction error mask + 7 + 1 + + + BBLERRMSK + Babble error mask + 8 + 1 + + + FRMOVRUNMSK + Frame overrun mask + 9 + 1 + + + DTGLERRMSK + Data toggle error mask + 10 + 1 + + + + + HCTSIZ0 + HCTSIZ0 + OTGFS host channel-0 transfer size + register + 0x110 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + PID + PID + 29 + 2 + + + + + HCTSIZ1 + HCTSIZ1 + OTGFS host channel-1 transfer size + register + 0x130 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + PID + PID + 29 + 2 + + + + + HCTSIZ2 + HCTSIZ2 + OTGFS host channel-2 transfer size + register + 0x150 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + PID + PID + 29 + 2 + + + + + HCTSIZ3 + HCTSIZ3 + OTGFS host channel-3 transfer size + register + 0x170 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + PID + PID + 29 + 2 + + + + + HCTSIZ4 + HCTSIZ4 + OTGFS host channel-4 transfer size + register + 0x190 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + PID + PID + 29 + 2 + + + + + HCTSIZ5 + HCTSIZ5 + OTGFS host channel-5 transfer size + register + 0x1B0 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + PID + PID + 29 + 2 + + + + + HCTSIZ6 + HCTSIZ6 + OTGFS host channel-6 transfer size + register + 0x1D0 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + PID + PID + 29 + 2 + + + + + HCTSIZ7 + HCTSIZ7 + OTGFS host channel-7 transfer size + register + 0x1F0 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + PID + PID + 29 + 2 + + + + + HCTSIZ8 + HCTSIZ8 + OTGFS host channel-8 transfer size + register + 0x210 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + PID + PID + 29 + 2 + + + + + HCTSIZ9 + HCTSIZ9 + OTGFS host channel-9 transfer size + register + 0x230 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + PID + PID + 29 + 2 + + + + + HCTSIZ10 + HCTSIZ10 + OTGFS host channel-10 transfer size + register + 0x250 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + PID + PID + 29 + 2 + + + + + HCTSIZ11 + HCTSIZ11 + OTGFS host channel-11 transfer size + register + 0x270 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + PID + PID + 29 + 2 + + + + + HCTSIZ12 + HCTSIZ12 + OTGFS host channel-12 transfer size + register + 0x290 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + PID + PID + 29 + 2 + + + + + HCTSIZ13 + HCTSIZ13 + OTGFS host channel-13 transfer size + register + 0x2B0 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + PID + PID + 29 + 2 + + + + + HCTSIZ14 + HCTSIZ14 + OTGFS host channel-14 transfer size + register + 0x2D0 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + PID + PID + 29 + 2 + + + + + HCTSIZ15 + HCTSIZ15 + OTGFS host channel-15 transfer size + register + 0x2F0 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + PID + PID + 29 + 2 + + + + + + + USB_OTG2_DEVICE + USB on the go full speed + USB_OTG2 + 0x40040800 + + 0x0 + 0x400 + registers + + + + DCFG + DCFG + OTGFS device configuration register + (OTGFS_DCFG) + 0x0 + 0x20 + read-write + 0x02200000 + + + DEVSPD + Device speed + 0 + 2 + + + NZSTSOUTHSHK + Non-zero-length status OUT + handshake + 2 + 1 + + + DEVADDR + Device address + 4 + 7 + + + PERFRINT + Periodic frame interval + 11 + 2 + + + + + DCTL + DCTL + OTGFS device control register + (OTGFS_DCTL) + 0x4 + 0x20 + 0x00000000 + + + RWKUPSIG + Remote wakeup signaling + 0 + 1 + read-write + + + SFTDISCON + Soft disconnect + 1 + 1 + read-write + + + GNPINNAKSTS + Global IN NAK status + 2 + 1 + read-only + + + GOUTNAKSTS + Global OUT NAK status + 3 + 1 + read-only + + + TSTCTL + Test control + 4 + 3 + read-write + + + SGNPINNAK + Set global IN NAK + 7 + 1 + read-write + + + CGNPINNAK + Clear global IN NAK + 8 + 1 + read-write + + + SGOUTNAK + Set global OUT NAK + 9 + 1 + read-write + + + CGOUTNAK + Clear global OUT NAK + 10 + 1 + read-write + + + PWROPRGDNE + Power-on programming done + 11 + 1 + read-write + + + + + DSTS + DSTS + OTGFS device status register + (OTGFS_DSTS) + 0x8 + 0x20 + read-only + 0x00000010 + + + SUSPSTS + Suspend status + 0 + 1 + + + ENUMSPD + Enumerated speed + 1 + 2 + + + ETICERR + Erratic error + 3 + 1 + + + SOFFN + Frame number of the received + SOF + 8 + 14 + + + + + DIEPMSK + DIEPMSK + OTGFS device IN endpoint common interrupt + mask register (OTGFS_DIEPMSK) + 0x10 + 0x20 + read-write + 0x00000000 + + + XFERCMSK + Transfer completed interrupt + mask + 0 + 1 + + + EPTDISMSK + Endpoint disabled interrupt + mask + 1 + 1 + + + TIMEOUTMSK + Timeout condition mask (Non-isochronous + endpoints) + 3 + 1 + + + INTKNTXFEMPMSK + IN token received when TxFIFO empty + mask + 4 + 1 + + + INTKNEPTMISMSK + IN token received with EP mismatch + mask + 5 + 1 + + + INEPTNAKMSK + IN endpoint NAK effective + mask + 6 + 1 + + + TXFIFOUDRMSK + FIFO underrun + mask + 8 + 1 + + + BNAINMSK + BNA interrupt + mask + 9 + 1 + + + + + DOEPMSK + DOEPMSK + OTGFS device OUT endpoint common interrupt + mask register (OTGFS_DOEPMSK) + 0x14 + 0x20 + read-write + 0x00000000 + + + XFERCMSK + Transfer completed interrupt + mask + 0 + 1 + + + EPTDISMSK + Endpoint disabled interrupt + mask + 1 + 1 + + + SETUPMSK + SETUP phase done mask + 3 + 1 + + + OUTTEPDMSK + OUT token received when endpoint + disabled mask + 4 + 1 + + + B2BSETUPMSK + Back-to-back SETUP packets + received mask + 6 + 1 + + + OUTPERRMSK + OUT packet error + mask + 8 + 1 + + + BNAOUTMSK + BNA interrupt + mask + 9 + 1 + + + + + DAINT + DAINT + OTGFS device all endpoints interrupt + register (OTGFS_DAINT) + 0x18 + 0x20 + read-only + 0x00000000 + + + INEPTINT + IN endpoint interrupt bits + 0 + 16 + + + OUTEPTINT + OUT endpoint interrupt + bits + 16 + 16 + + + + + DAINTMSK + DAINTMSK + OTGFS all endpoints interrupt mask register + (OTGFS_DAINTMSK) + 0x1C + 0x20 + read-write + 0x00000000 + + + INEPTMSK + IN EP interrupt mask bits + 0 + 16 + + + OUTEPTMSK + OUT endpoint interrupt + bits + 16 + 16 + + + + + DIEPEMPMSK + DIEPEMPMSK + OTGFS device IN endpoint FIFO empty + interrupt mask register + 0x34 + 0x20 + read-write + 0x00000000 + + + INEPTXFEMSK + IN EP Tx FIFO empty interrupt mask + bits + 0 + 16 + + + + + DIEPCTL0 + DIEPCTL0 + OTGFS device control IN endpoint 0 control + register (OTGFS_DIEPCTL0) + 0x100 + 0x20 + 0x00000000 + + + MPS + Maximum packet size + 0 + 2 + read-write + + + USBACEPT + USB active endpoint + 15 + 1 + read-only + + + NAKSTS + NAK status + 17 + 1 + read-only + + + EPTYPE + Endpoint type + 18 + 2 + read-only + + + STALL + STALL handshake + 21 + 1 + read-write + + + TXFNUM + TxFIFO number + 22 + 4 + read-write + + + CNAK + Clear NAK + 26 + 1 + write-only + + + SNAK + Set NAK + 27 + 1 + write-only + + + EPTDIS + Endpoint disable + 30 + 1 + read-only + + + EPTENA + Endpoint enable + 31 + 1 + read-only + + + + + DIEPCTL1 + DIEPCTL1 + OTGFS device IN endpoint-1 control + register + 0x120 + 0x20 + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + read-write + + + USBACEPT + USB active endpoint + 15 + 1 + read-write + + + DPID + Endpoint Data PID + 16 + 1 + read-only + + + NAKSTS + NAK status + 17 + 1 + read-only + + + EPTYPE + Endpoint type + 18 + 2 + read-write + + + STALL + STALL handshake + 21 + 1 + read-write + + + TXFNUM + TxFIFO number + 22 + 4 + read-write + + + CNAK + Clear NAK + 26 + 1 + write-only + + + SNAK + Set NAK + 27 + 1 + write-only + + + SETD0PID + Set DATA0 PID + 28 + 1 + write-only + + + SETD1PID + Set DATA1 PID + 29 + 1 + write-only + + + EPTDIS + Endpoint disable + 30 + 1 + read-write + + + EPTENA + Endpoint enable + 31 + 1 + read-write + + + + + DIEPCTL2 + DIEPCTL2 + OTGFS device IN endpoint-2 control + register + 0x140 + 0x20 + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + read-write + + + USBACEPT + USB active endpoint + 15 + 1 + read-write + + + DPID + Endpoint Data PID + 16 + 1 + read-only + + + NAKSTS + NAK status + 17 + 1 + read-only + + + EPTYPE + Endpoint type + 18 + 2 + read-write + + + STALL + STALL handshake + 21 + 1 + read-write + + + TXFNUM + TxFIFO number + 22 + 4 + read-write + + + CNAK + Clear NAK + 26 + 1 + write-only + + + SNAK + Set NAK + 27 + 1 + write-only + + + SETD0PID + Set DATA0 PID + 28 + 1 + write-only + + + SETD1PID + Set DATA1 PID + 29 + 1 + write-only + + + EPTDIS + Endpoint disable + 30 + 1 + read-write + + + EPTENA + Endpoint enable + 31 + 1 + read-write + + + + + DIEPCTL3 + DIEPCTL3 + OTGFS device IN endpoint-3 control + register + 0x160 + 0x20 + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + read-write + + + USBACEPT + USB active endpoint + 15 + 1 + read-write + + + DPID + Endpoint Data PID + 16 + 1 + read-only + + + NAKSTS + NAK status + 17 + 1 + read-only + + + EPTYPE + Endpoint type + 18 + 2 + read-write + + + STALL + STALL handshake + 21 + 1 + read-write + + + TXFNUM + TxFIFO number + 22 + 4 + read-write + + + CNAK + Clear NAK + 26 + 1 + write-only + + + SNAK + Set NAK + 27 + 1 + write-only + + + SETD0PID + Set DATA0 PID + 28 + 1 + write-only + + + SETD1PID + Set DATA1 PID + 29 + 1 + write-only + + + EPTDIS + Endpoint disable + 30 + 1 + read-write + + + EPTENA + Endpoint enable + 31 + 1 + read-write + + + + + DIEPCTL4 + DIEPCTL4 + OTGFS device IN endpoint-4 control + register + 0x180 + 0x20 + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + read-write + + + USBACEPT + USB active endpoint + 15 + 1 + read-write + + + DPID + Endpoint Data PID + 16 + 1 + read-only + + + NAKSTS + NAK status + 17 + 1 + read-only + + + EPTYPE + Endpoint type + 18 + 2 + read-write + + + STALL + STALL handshake + 21 + 1 + read-write + + + TXFNUM + TxFIFO number + 22 + 4 + read-write + + + CNAK + Clear NAK + 26 + 1 + write-only + + + SNAK + Set NAK + 27 + 1 + write-only + + + SETD0PID + Set DATA0 PID + 28 + 1 + write-only + + + SETD1PID + Set DATA1 PID + 29 + 1 + write-only + + + EPTDIS + Endpoint disable + 30 + 1 + read-write + + + EPTENA + Endpoint enable + 31 + 1 + read-write + + + + + DIEPCTL5 + DIEPCTL5 + OTGFS device IN endpoint-5 control + register + 0x1A0 + 0x20 + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + read-write + + + USBACEPT + USB active endpoint + 15 + 1 + read-write + + + DPID + Endpoint Data PID + 16 + 1 + read-only + + + NAKSTS + NAK status + 17 + 1 + read-only + + + EPTYPE + Endpoint type + 18 + 2 + read-write + + + STALL + STALL handshake + 21 + 1 + read-write + + + TXFNUM + TxFIFO number + 22 + 4 + read-write + + + CNAK + Clear NAK + 26 + 1 + write-only + + + SNAK + Set NAK + 27 + 1 + write-only + + + SETD0PID + Set DATA0 PID + 28 + 1 + write-only + + + SETD1PID + Set DATA1 PID + 29 + 1 + write-only + + + EPTDIS + Endpoint disable + 30 + 1 + read-write + + + EPTENA + Endpoint enable + 31 + 1 + read-write + + + + + DIEPCTL6 + DIEPCTL6 + OTGFS device IN endpoint-6 control + register + 0x1C0 + 0x20 + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + read-write + + + USBACEPT + USB active endpoint + 15 + 1 + read-write + + + DPID + Endpoint Data PID + 16 + 1 + read-only + + + NAKSTS + NAK status + 17 + 1 + read-only + + + EPTYPE + Endpoint type + 18 + 2 + read-write + + + STALL + STALL handshake + 21 + 1 + read-write + + + TXFNUM + TxFIFO number + 22 + 4 + read-write + + + CNAK + Clear NAK + 26 + 1 + write-only + + + SNAK + Set NAK + 27 + 1 + write-only + + + SETD0PID + Set DATA0 PID + 28 + 1 + write-only + + + SETD1PID + Set DATA1 PID + 29 + 1 + write-only + + + EPTDIS + Endpoint disable + 30 + 1 + read-write + + + EPTENA + Endpoint enable + 31 + 1 + read-write + + + + + DIEPCTL7 + DIEPCTL7 + OTGFS device IN endpoint-7 control + register + 0x1E0 + 0x20 + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + read-write + + + USBACEPT + USB active endpoint + 15 + 1 + read-write + + + DPID + Endpoint Data PID + 16 + 1 + read-only + + + NAKSTS + NAK status + 17 + 1 + read-only + + + EPTYPE + Endpoint type + 18 + 2 + read-write + + + STALL + STALL handshake + 21 + 1 + read-write + + + TXFNUM + TxFIFO number + 22 + 4 + read-write + + + CNAK + Clear NAK + 26 + 1 + write-only + + + SNAK + Set NAK + 27 + 1 + write-only + + + SETD0PID + Set DATA0 PID + 28 + 1 + write-only + + + SETD1PID + Set DATA1 PID + 29 + 1 + write-only + + + EPTDIS + Endpoint disable + 30 + 1 + read-write + + + EPTENA + Endpoint enable + 31 + 1 + read-write + + + + + DOEPCTL0 + DOEPCTL0 + OTGFS device OUT endpoint-0 control + register + 0x300 + 0x20 + 0x00008000 + + + MPS + Maximum packet size + 0 + 2 + read-only + + + USBACEPT + USB active endpoint + 15 + 1 + read-only + + + NAKSTS + NAK status + 17 + 1 + read-only + + + EPTYPE + Endpoint type + 18 + 2 + read-only + + + SNP + Snoop mode + 20 + 1 + read-write + + + STALL + STALL handshake + 21 + 1 + read-write + + + CNAK + Clear NAK + 26 + 1 + write-only + + + SNAK + Set NAK + 27 + 1 + write-only + + + EPTDIS + Endpoint disable + 30 + 1 + read-write + + + EPTENA + Endpoint enable + 31 + 1 + read-write + + + + + DOEPCTL1 + DOEPCTL1 + OTGFS device OUT endpoint-1 control + register + 0x320 + 0x20 + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + read-write + + + USBACEPT + USB active endpoint + 15 + 1 + read-only + + + DPID + Endpoint data PID + 16 + 1 + read-only + + + NAKSTS + NAK status + 17 + 1 + read-only + + + EPTYPE + Endpoint type + 18 + 2 + read-only + + + SNP + Snoop mode + 20 + 1 + read-write + + + STALL + STALL handshake + 21 + 1 + read-write + + + CNAK + Clear NAK + 26 + 1 + write-only + + + SNAK + Set NAK + 27 + 1 + write-only + + + EPTDIS + Endpoint disable + 30 + 1 + read-write + + + EPTENA + Endpoint enable + 31 + 1 + read-write + + + + + DOEPCTL2 + DOEPCTL2 + OTGFS device OUT endpoint-2 control + register + 0x340 + 0x20 + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + read-write + + + USBACEPT + USB active endpoint + 15 + 1 + read-only + + + DPID + Endpoint data PID + 16 + 1 + read-only + + + NAKSTS + NAK status + 17 + 1 + read-only + + + EPTYPE + Endpoint type + 18 + 2 + read-only + + + SNP + Snoop mode + 20 + 1 + read-write + + + STALL + STALL handshake + 21 + 1 + read-write + + + CNAK + Clear NAK + 26 + 1 + write-only + + + SNAK + Set NAK + 27 + 1 + write-only + + + EPTDIS + Endpoint disable + 30 + 1 + read-write + + + EPTENA + Endpoint enable + 31 + 1 + read-write + + + + + DOEPCTL3 + DOEPCTL3 + OTGFS device OUT endpoint-3 control + register + 0x360 + 0x20 + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + read-write + + + USBACEPT + USB active endpoint + 15 + 1 + read-only + + + DPID + Endpoint data PID + 16 + 1 + read-only + + + NAKSTS + NAK status + 17 + 1 + read-only + + + EPTYPE + Endpoint type + 18 + 2 + read-only + + + SNP + Snoop mode + 20 + 1 + read-write + + + STALL + STALL handshake + 21 + 1 + read-write + + + CNAK + Clear NAK + 26 + 1 + write-only + + + SNAK + Set NAK + 27 + 1 + write-only + + + EPTDIS + Endpoint disable + 30 + 1 + read-write + + + EPTENA + Endpoint enable + 31 + 1 + read-write + + + + + DOEPCTL4 + DOEPCTL4 + OTGFS device OUT endpoint-4 control + register + 0x380 + 0x20 + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + read-write + + + USBACEPT + USB active endpoint + 15 + 1 + read-only + + + DPID + Endpoint data PID + 16 + 1 + read-only + + + NAKSTS + NAK status + 17 + 1 + read-only + + + EPTYPE + Endpoint type + 18 + 2 + read-only + + + SNP + Snoop mode + 20 + 1 + read-write + + + STALL + STALL handshake + 21 + 1 + read-write + + + CNAK + Clear NAK + 26 + 1 + write-only + + + SNAK + Set NAK + 27 + 1 + write-only + + + EPTDIS + Endpoint disable + 30 + 1 + read-write + + + EPTENA + Endpoint enable + 31 + 1 + read-write + + + + + DOEPCTL5 + DOEPCTL5 + OTGFS device OUT endpoint-5 control + register + 0x3A0 + 0x20 + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + read-write + + + USBACEPT + USB active endpoint + 15 + 1 + read-only + + + DPID + Endpoint data PID + 16 + 1 + read-only + + + NAKSTS + NAK status + 17 + 1 + read-only + + + EPTYPE + Endpoint type + 18 + 2 + read-only + + + SNP + Snoop mode + 20 + 1 + read-write + + + STALL + STALL handshake + 21 + 1 + read-write + + + CNAK + Clear NAK + 26 + 1 + write-only + + + SNAK + Set NAK + 27 + 1 + write-only + + + EPTDIS + Endpoint disable + 30 + 1 + read-write + + + EPTENA + Endpoint enable + 31 + 1 + read-write + + + + + DOEPCTL6 + DOEPCTL6 + OTGFS device OUT endpoint-6 control + register + 0x3C0 + 0x20 + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + read-write + + + USBACEPT + USB active endpoint + 15 + 1 + read-only + + + DPID + Endpoint data PID + 16 + 1 + read-only + + + NAKSTS + NAK status + 17 + 1 + read-only + + + EPTYPE + Endpoint type + 18 + 2 + read-only + + + SNP + Snoop mode + 20 + 1 + read-write + + + STALL + STALL handshake + 21 + 1 + read-write + + + CNAK + Clear NAK + 26 + 1 + write-only + + + SNAK + Set NAK + 27 + 1 + write-only + + + EPTDIS + Endpoint disable + 30 + 1 + read-write + + + EPTENA + Endpoint enable + 31 + 1 + read-write + + + + + DOEPCTL7 + DOEPCTL7 + OTGFS device OUT endpoint-7 control + register + 0x3E0 + 0x20 + 0x00000000 + + + MPS + Maximum packet size + 0 + 11 + read-write + + + USBACEPT + USB active endpoint + 15 + 1 + read-only + + + DPID + Endpoint data PID + 16 + 1 + read-only + + + NAKSTS + NAK status + 17 + 1 + read-only + + + EPTYPE + Endpoint type + 18 + 2 + read-only + + + SNP + Snoop mode + 20 + 1 + read-write + + + STALL + STALL handshake + 21 + 1 + read-write + + + CNAK + Clear NAK + 26 + 1 + write-only + + + SNAK + Set NAK + 27 + 1 + write-only + + + EPTDIS + Endpoint disable + 30 + 1 + read-write + + + EPTENA + Endpoint enable + 31 + 1 + read-write + + + + + DIEPINT0 + DIEPINT0 + OTGFS device IN endpoint-0 interrupt + register + 0x108 + 0x20 + 0x00000080 + + + XFERC + Transfer completed + interrupt + 0 + 1 + read-write + + + EPTDISD + Endpoint disabled + interrupt + 1 + 1 + read-write + + + TIMEOUT + Timeout condition + 3 + 1 + read-write + + + INTKNTXFEMP + IN token received when + TxFIFO is empty + 4 + 1 + read-write + + + INEPTNAK + IN endpoint NAK + effective + 6 + 1 + read-write + + + TXFEMP + Transmit FIFO + empty + 7 + 1 + read-only + + + + + DIEPINT1 + DIEPINT1 + OTGFS device IN endpoint-1 interrupt + register + 0x128 + 0x20 + 0x00000080 + + + XFERC + Transfer completed + interrupt + 0 + 1 + read-write + + + EPTDISD + Endpoint disabled + interrupt + 1 + 1 + read-write + + + TIMEOUT + Timeout condition + 3 + 1 + read-write + + + INTKNTXFEMP + IN token received when + TxFIFO is empty + 4 + 1 + read-write + + + INEPTNAK + IN endpoint NAK + effective + 6 + 1 + read-write + + + TXFEMP + Transmit FIFO + empty + 7 + 1 + read-only + + + + + DIEPINT2 + DIEPINT2 + OTGFS device IN endpoint-2 interrupt + register + 0x148 + 0x20 + 0x00000080 + + + XFERC + Transfer completed + interrupt + 0 + 1 + read-write + + + EPTDISD + Endpoint disabled + interrupt + 1 + 1 + read-write + + + TIMEOUT + Timeout condition + 3 + 1 + read-write + + + INTKNTXFEMP + IN token received when + TxFIFO is empty + 4 + 1 + read-write + + + INEPTNAK + IN endpoint NAK + effective + 6 + 1 + read-write + + + TXFEMP + Transmit FIFO + empty + 7 + 1 + read-only + + + + + DIEPINT3 + DIEPINT3 + OTGFS device IN endpoint-3 interrupt + register + 0x168 + 0x20 + 0x00000080 + + + XFERC + Transfer completed + interrupt + 0 + 1 + read-write + + + EPTDISD + Endpoint disabled + interrupt + 1 + 1 + read-write + + + TIMEOUT + Timeout condition + 3 + 1 + read-write + + + INTKNTXFEMP + IN token received when + TxFIFO is empty + 4 + 1 + read-write + + + INEPTNAK + IN endpoint NAK + effective + 6 + 1 + read-write + + + TXFEMP + Transmit FIFO + empty + 7 + 1 + read-only + + + + + DIEPINT4 + DIEPINT4 + OTGFS device IN endpoint-4 interrupt + register + 0x188 + 0x20 + 0x00000080 + + + XFERC + Transfer completed + interrupt + 0 + 1 + read-write + + + EPTDISD + Endpoint disabled + interrupt + 1 + 1 + read-write + + + TIMEOUT + Timeout condition + 3 + 1 + read-write + + + INTKNTXFEMP + IN token received when + TxFIFO is empty + 4 + 1 + read-write + + + INEPTNAK + IN endpoint NAK + effective + 6 + 1 + read-write + + + TXFEMP + Transmit FIFO + empty + 7 + 1 + read-only + + + + + DIEPINT5 + DIEPINT5 + OTGFS device IN endpoint-5 interrupt + register + 0x1A8 + 0x20 + 0x00000080 + + + XFERC + Transfer completed + interrupt + 0 + 1 + read-write + + + EPTDISD + Endpoint disabled + interrupt + 1 + 1 + read-write + + + TIMEOUT + Timeout condition + 3 + 1 + read-write + + + INTKNTXFEMP + IN token received when + TxFIFO is empty + 4 + 1 + read-write + + + INEPTNAK + IN endpoint NAK + effective + 6 + 1 + read-write + + + TXFEMP + Transmit FIFO + empty + 7 + 1 + read-only + + + + + DIEPINT6 + DIEPINT6 + OTGFS device IN endpoint-6 interrupt + register + 0x1C8 + 0x20 + 0x00000080 + + + XFERC + Transfer completed + interrupt + 0 + 1 + read-write + + + EPTDISD + Endpoint disabled + interrupt + 1 + 1 + read-write + + + TIMEOUT + Timeout condition + 3 + 1 + read-write + + + INTKNTXFEMP + IN token received when + TxFIFO is empty + 4 + 1 + read-write + + + INEPTNAK + IN endpoint NAK + effective + 6 + 1 + read-write + + + TXFEMP + Transmit FIFO + empty + 7 + 1 + read-only + + + + + DIEPINT7 + DIEPINT7 + OTGFS device IN endpoint-7 interrupt + register + 0x1E8 + 0x20 + 0x00000080 + + + XFERC + Transfer completed + interrupt + 0 + 1 + read-write + + + EPTDISD + Endpoint disabled + interrupt + 1 + 1 + read-write + + + TIMEOUT + Timeout condition + 3 + 1 + read-write + + + INTKNTXFEMP + IN token received when + TxFIFO is empty + 4 + 1 + read-write + + + INEPTNAK + IN endpoint NAK + effective + 6 + 1 + read-write + + + TXFEMP + Transmit FIFO + empty + 7 + 1 + read-only + + + + + DOEPINT0 + DOEPINT0 + OTGFS device OUT endpoint-0 interrupt + register + 0x308 + 0x20 + read-write + 0x00000080 + + + XFERC + Transfer completed interrupt + 0 + 1 + + + EPTDISD + Endpoint disabled interrupt + 1 + 1 + + + SETUP + SETUP phase done + 3 + 1 + + + OUTTEPD + OUT token received when + endpoint disabled + 4 + 1 + + + B2BSTUP + Back-to-back SETUP + packets received + 6 + 1 + + + + + DOEPINT1 + DOEPINT1 + OTGFS device OUT endpoint-1 interrupt + register + 0x328 + 0x20 + read-write + 0x00000080 + + + XFERC + Transfer completed interrupt + 0 + 1 + + + EPTDISD + Endpoint disabled interrupt + 1 + 1 + + + SETUP + SETUP phase done + 3 + 1 + + + OUTTEPD + OUT token received when + endpoint disabled + 4 + 1 + + + B2BSTUP + Back-to-back SETUP + packets received + 6 + 1 + + + + + DOEPINT2 + DOEPINT2 + OTGFS device OUT endpoint-2 interrupt + register + 0x348 + 0x20 + read-write + 0x00000080 + + + XFERC + Transfer completed interrupt + 0 + 1 + + + EPTDISD + Endpoint disabled interrupt + 1 + 1 + + + SETUP + SETUP phase done + 3 + 1 + + + OUTTEPD + OUT token received when + endpoint disabled + 4 + 1 + + + B2BSTUP + Back-to-back SETUP + packets received + 6 + 1 + + + + + DOEPINT3 + DOEPINT3 + OTGFS device OUT endpoint-3 interrupt + register + 0x368 + 0x20 + read-write + 0x00000080 + + + XFERC + Transfer completed interrupt + 0 + 1 + + + EPTDISD + Endpoint disabled interrupt + 1 + 1 + + + SETUP + SETUP phase done + 3 + 1 + + + OUTTEPD + OUT token received when + endpoint disabled + 4 + 1 + + + B2BSTUP + Back-to-back SETUP + packets received + 6 + 1 + + + + + DOEPINT4 + DOEPINT4 + OTGFS device OUT endpoint-4 interrupt + register + 0x388 + 0x20 + read-write + 0x00000080 + + + XFERC + Transfer completed interrupt + 0 + 1 + + + EPTDISD + Endpoint disabled interrupt + 1 + 1 + + + SETUP + SETUP phase done + 3 + 1 + + + OUTTEPD + OUT token received when + endpoint disabled + 4 + 1 + + + B2BSTUP + Back-to-back SETUP + packets received + 6 + 1 + + + + + DOEPINT5 + DOEPINT5 + OTGFS device OUT endpoint-5 interrupt + register + 0x3A8 + 0x20 + read-write + 0x00000080 + + + XFERC + Transfer completed interrupt + 0 + 1 + + + EPTDISD + Endpoint disabled interrupt + 1 + 1 + + + SETUP + SETUP phase done + 3 + 1 + + + OUTTEPD + OUT token received when + endpoint disabled + 4 + 1 + + + B2BSTUP + Back-to-back SETUP + packets received + 6 + 1 + + + + + DOEPINT6 + DOEPINT6 + OTGFS device OUT endpoint-6 interrupt + register + 0x3C8 + 0x20 + read-write + 0x00000080 + + + XFERC + Transfer completed interrupt + 0 + 1 + + + EPTDISD + Endpoint disabled interrupt + 1 + 1 + + + SETUP + SETUP phase done + 3 + 1 + + + OUTTEPD + OUT token received when + endpoint disabled + 4 + 1 + + + B2BSTUP + Back-to-back SETUP + packets received + 6 + 1 + + + + + DOEPINT7 + DOEPINT7 + OTGFS device OUT endpoint-7 interrupt + register + 0x3E8 + 0x20 + read-write + 0x00000080 + + + XFERC + Transfer completed interrupt + 0 + 1 + + + EPTDISD + Endpoint disabled interrupt + 1 + 1 + + + SETUP + SETUP phase done + 3 + 1 + + + OUTTEPD + OUT token received when + endpoint disabled + 4 + 1 + + + B2BSTUP + Back-to-back SETUP + packets received + 6 + 1 + + + + + DIEPTSIZ0 + DIEPTSIZ0 + OTGFS device IN endpoint-0 transfer size + register + 0x110 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 7 + + + PKTCNT + Packet count + 19 + 2 + + + + + DOEPTSIZ0 + DOEPTSIZ0 + OTGFS device OUT endpoint-0 transfer size + register + 0x310 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 7 + + + PKTCNT + Packet count + 19 + 1 + + + SETUPCNT + SETUP packet count + 29 + 2 + + + + + DIEPTSIZ1 + DIEPTSIZ1 + OTGFS device IN endpoint-1 transfer size + register + 0x130 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + MC + Multi count + 29 + 2 + + + + + DIEPTSIZ2 + DIEPTSIZ2 + OTGFS device IN endpoint-2 transfer size + register + 0x150 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + MC + Multi count + 29 + 2 + + + + + DIEPTSIZ3 + DIEPTSIZ3 + OTG device IN endpoint-3 transfer size + register + 0x170 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + MC + Multi count + 29 + 2 + + + + + DIEPTSIZ4 + DIEPTSIZ4 + OTG device IN endpoint-4 transfer size + register + 0x190 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + MC + Multi count + 29 + 2 + + + + + DIEPTSIZ5 + DIEPTSIZ5 + OTG device IN endpoint-5 transfer size + register + 0x1B0 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + MC + Multi count + 29 + 2 + + + + + DIEPTSIZ6 + DIEPTSIZ6 + OTG device IN endpoint-6 transfer size + register + 0x1D0 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + MC + Multi count + 29 + 2 + + + + + DIEPTSIZ7 + DIEPTSIZ7 + OTG device IN endpoint-7 transfer size + register + 0x1F0 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + MC + Multi count + 29 + 2 + + + + + DTXFSTS0 + DTXFSTS0 + OTGFS device IN endpoint-0 transmit FIFO + status register + 0x118 + 0x20 + read-only + 0x00000000 + + + INEPTXFSAV + IN endpoint TxFIFO space + available + 0 + 16 + + + + + DTXFSTS1 + DTXFSTS1 + OTGFS device IN endpoint-1 transmit FIFO + status register + 0x138 + 0x20 + read-only + 0x00000000 + + + INEPTXFSAV + IN endpoint TxFIFO space + available + 0 + 16 + + + + + DTXFSTS2 + DTXFSTS2 + OTGFS device IN endpoint-2 transmit FIFO + status register + 0x158 + 0x20 + read-only + 0x00000000 + + + INEPTXFSAV + IN endpoint TxFIFO space + available + 0 + 16 + + + + + DTXFSTS3 + DTXFSTS3 + OTGFS device IN endpoint-3 transmit FIFO + status register + 0x178 + 0x20 + read-only + 0x00000000 + + + INEPTXFSAV + IN endpoint TxFIFO space + available + 0 + 16 + + + + + DTXFSTS4 + DTXFSTS4 + OTGFS device IN endpoint-4 transmit FIFO + status register + 0x198 + 0x20 + read-only + 0x00000000 + + + INEPTXFSAV + IN endpoint TxFIFO space + available + 0 + 16 + + + + + DTXFSTS5 + DTXFSTS5 + OTGFS device IN endpoint-5 transmit FIFO + status register + 0x1B8 + 0x20 + read-only + 0x00000000 + + + INEPTXFSAV + IN endpoint TxFIFO space + available + 0 + 16 + + + + + DTXFSTS6 + DTXFSTS6 + OTGFS device IN endpoint-6 transmit FIFO + status register + 0x1D8 + 0x20 + read-only + 0x00000000 + + + INEPTXFSAV + IN endpoint TxFIFO space + available + 0 + 16 + + + + + DTXFSTS7 + DTXFSTS7 + OTGFS device IN endpoint-7 transmit FIFO + status register + 0x1F8 + 0x20 + read-only + 0x00000000 + + + INEPTXFSAV + IN endpoint TxFIFO space + available + 0 + 16 + + + + + DOEPTSIZ1 + DOEPTSIZ1 + OTGFS device OUT endpoint-1 transfer size + register + 0x330 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + RXDPID + Received data PID + 29 + 2 + + + + + DOEPTSIZ2 + DOEPTSIZ2 + OTGFS device OUT endpoint-2 transfer size + register + 0x350 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + RXDPID + Received data PID + 29 + 2 + + + + + DOEPTSIZ3 + DOEPTSIZ3 + OTGFS device OUT endpoint-3 transfer size + register + 0x370 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + RXDPID + Received data PID + 29 + 2 + + + + + DOEPTSIZ4 + DOEPTSIZ4 + OTGFS device OUT endpoint-4 transfer size + register + 0x390 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + RXDPID + Received data PID + 29 + 2 + + + + + DOEPTSIZ5 + DOEPTSIZ5 + OTGFS device OUT endpoint-5 transfer size + register + 0x3B0 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + RXDPID + Received data PID + 29 + 2 + + + + + DOEPTSIZ6 + DOEPTSIZ6 + OTGFS device OUT endpoint-6 transfer size + register + 0x3D0 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + RXDPID + Received data PID + 29 + 2 + + + + + DOEPTSIZ7 + DOEPTSIZ7 + OTGFS device OUT endpoint-7 transfer size + register + 0x3F0 + 0x20 + read-write + 0x00000000 + + + XFERSIZE + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + RXDPID + Received data PID + 29 + 2 + + + + + + + USB_OTG2_PWRCLK + USB on the go full speed + USB_OTG2 + 0x40040E00 + + 0x0 + 0x400 + registers + + + + PCGCCTL + PCGCCTL + OTGFS power and clock gating control + register (OTGFS_PCGCCTL) + 0x0 + 0x20 + 0x00000000 + + + STOPPCLK + Stop PHY clock + 0 + 1 + read-write + + + SUSPENDM + PHY Suspended + 4 + 1 + read-only + + + + + + + SCFG + System configuration controller + SCFG + 0x40013800 + + 0x0 + 0x400 + registers + + + + CFG1 + CFG1 + configuration register 1 + 0x0 + 0x20 + read-write + 0x00000000 + + + MEM_MAP_SEL + Memory address mapping selection bits + 0 + 3 + + + IR_POL + IR output polarity selection + 5 + 1 + + + IR_SRC_SEL + IR signal source selection + 6 + 2 + + + SWAP_XMC + XMC address mapping swap + 10 + 2 + + + + + CFG2 + CFG2 + configuration register 2 + 0x4 + 0x20 + read-write + 0x00000000 + + + MII_RMII_SEL + MII or RMII selection + bits + 23 + 1 + + + + + EXINTC1 + EXINTC1 + external interrupt configuration register 1 + 0x8 + 0x20 + read-write + 0x0000 + + + EXINT3 + EXINT 3 configuration bits + 12 + 4 + + + EXINT2 + EXINT 2 configuration bits + 8 + 4 + + + EXINT1 + EXINT 1 configuration bits + 4 + 4 + + + EXINT0 + EXINT 0 configuration bits + 0 + 4 + + + + + EXINTC2 + EXINTC2 + external interrupt configuration register 2 + 0xC + 0x20 + read-write + 0x0000 + + + EXINT7 + EXINT 7 configuration bits + 12 + 4 + + + EXINT6 + EXINT 6 configuration bits + 8 + 4 + + + EXINT5 + EXINT 5 configuration bits + 4 + 4 + + + EXINT4 + EXINT 4 configuration bits + 0 + 4 + + + + + EXINTC3 + EXINTC3 + external interrupt configuration register 3 + 0x10 + 0x20 + read-write + 0x0000 + + + EXINT11 + EXINT 11 configuration bits + 12 + 4 + + + EXINT10 + EXINT 10 configuration bits + 8 + 4 + + + EXINT9 + EXINT 9 configuration bits + 4 + 4 + + + EXINT8 + EXINT 8 configuration bits + 0 + 4 + + + + + EXINTC4 + EXINTC4 + external interrupt configuration register + 4 + 0x14 + 0x20 + read-write + 0x0000 + + + EXINT15 + EXINT 15 configuration bits + 12 + 4 + + + EXINT14 + EXINT 14 configuration bits + 8 + 4 + + + EXINT13 + EXINT 13 configuration bits + 4 + 4 + + + EXINT12 + EXINT 12 configuration bits + 0 + 4 + + + + + UHDRV + UHDRV + Ultra high drive register + 0x2C + 0x20 + read-write + 0x0000 + + + PF15_UH + PF15 ultra high sourcing/sinking strength + 10 + 1 + + + PF14_UH + PF14 ultra high sourcing/sinking strength + 9 + 1 + + + PD15_UH + PD15 ultra high sourcing/sinking strength + 8 + 1 + + + PD14_UH + PD14 ultra high sourcing/sinking strength + 7 + 1 + + + PD13_UH + PD13 ultra high sourcing/sinking strength + 6 + 1 + + + PD12_UH + PD12 ultra high sourcing/sinking strength + 5 + 1 + + + PB10_UH + PB10 ultra high sourcing/sinking strength + 2 + 1 + + + PB9_UH + PB9 ultra high sourcing/sinking strength + 1 + 1 + + + PB3_UH + PB3 ultra high sourcing/sinking strength + 0 + 1 + + + + + + + QSPI1 + Quad SPI Controller + QSPI + 0xA0001000 + + 0x0 + 0x400 + registers + + + QSPI1 + QSPI1 global interrupt + 92 + + + + CMD_W0 + CMD_W0 + Command word 0 + 0x0 + 0x20 + read-write + 0x00000000 + + + SPIADR + SPI flash address + 0 + 32 + + + + + CMD_W1 + CMD_W1 + Command word 1 + 0x4 + 0x20 + read-write + 0x01000003 + + + ADRLEN + SPI address length + 0 + 3 + + + DUM2 + Second dummy state cycle + 16 + 8 + + + INSLEN + Instruction code length + 24 + 2 + + + PEMEN + Perfrmance enhance mode enable + 28 + 1 + + + + + CMD_W2 + CMD_W2 + Command word 2 + 0x8 + 0x20 + read-write + 0x01000003 + + + DCNT + Read write data counter + 0 + 32 + + + + + CMD_W3 + CMD_W3 + Command word 3 + 0xC + 0x20 + read-write + 0x00000000 + + + WEN + Write data enable + 1 + 1 + + + RSTSEN + Read spi status enable + 2 + 1 + + + RSTSC + Read spi status configure + 3 + 1 + + + OPMODE + SPI operate mode + 5 + 3 + + + PEMOPC + Performance enhance mode operate code + 16 + 8 + + + INSC + Instruction code + 24 + 8 + + + + + CTRL + CTRL + Control register + 0x10 + 0x20 + read-write + 0x00000000 + + + CLKDIV + SPI clock divider + 0 + 3 + + + SCKMODE + Sckout mode + 4 + 1 + + + XIPIDLE + XIP port idle status + 7 + 1 + + + ABORT + Abort instruction + 8 + 1 + + + BUSY + Busy bit of spi status + 16 + 3 + + + XIPRCMDF + XIP read command flush + 19 + 1 + + + XIPSEL + XIP port selection + 20 + 1 + + + KEYEN + encryption key enable + 21 + 1 + + + + + ACTR + ACTR + AC timing control register + 0x14 + 0x20 + read-write + 0x0000000F + + + CSDLY + CS delay + 0 + 4 + + + + + FIFOSTS + FIFOSTS + FIFO Status register + 0x18 + 0x20 + read-only + 0x00000001 + + + TXFIFORDY + TxFIFO ready status + 0 + 1 + + + RXFIFORDY + RxFIFO ready status + 1 + 1 + + + + + CTRL2 + CTRL2 + control register 2 + 0x20 + 0x20 + read-write + 0x00000001 + + + DMAEN + DMA handshake enable + 0 + 1 + + + CMDIE + Command complete interrupt enable + 1 + 1 + + + TXFIFOTHOD + TxFIFO thod + 8 + 2 + + + RXFIFOTHOD + RxFIFO thod + 12 + 2 + + + + + CMDSTS + CMDSTS + CMD status register + 0x24 + 0x20 + read-only + 0x00000000 + + + CMDSTS + Command complete status + 0 + 1 + + + + + RSTS + RSTS + SPI read status register + 0x28 + 0x20 + read-only + 0x00000000 + + + SPISTS + SPI read status + 0 + 8 + + + + + FSIZE + FSIZE + SPI flash size + 0x2C + 0x20 + read-write + 0x00000000 + + + SPIFSIZE + SPI flash size + 0 + 32 + + + + + XIP_CMD_W0 + XIP_CMD_W0 + XIP command word 0 + 0x30 + 0x20 + read-write + 0x00000000 + + + XIPR_DUM2 + XIP read second dummy cycle + 0 + 8 + + + XIPR_OPMODE + XIP read operate mode + 8 + 3 + + + XIPR_ADRLEN + XIP read address length + 11 + 1 + + + XIPR_INSC + XIP read instruction code + 12 + 8 + + + + + XIP_CMD_W1 + XIP_CMD_W1 + XIP command word 1 + 0x34 + 0x20 + read-write + 0x00000000 + + + XIPW_DUM2 + XIP write second dummy cycle + 0 + 8 + + + XIPW_OPMODE + XIP write operate mode + 8 + 3 + + + XIPW_ADRLEN + XIP write address length + 11 + 1 + + + XIPW_INSC + XIP write instruction code + 12 + 8 + + + + + XIP_CMD_W2 + XIP_CMD_W2 + XIP command word 2 + 0x38 + 0x20 + read-write + 0x00000000 + + + XIPR_DCNT + XIP read data counter + 0 + 6 + + + XIPR_TCNT + XIP continue read cycle counter + 8 + 7 + + + XIPR_SEL + XIP read continue mode select + 15 + 1 + + + XIPW_DCNT + XIP write data counter + 16 + 6 + + + XIPW_TCNT + XIP continue write cycle counter + 24 + 7 + + + XIPW_SEL + XIP write continue mode select + 31 + 1 + + + + + XIP_CMD_W3 + XIP_CMD_W3 + XIP command word 3 + 0x3C + 0x20 + read-write + 0x00000000 + + + BYPASSC + Bypass cache function + 0 + 1 + + + CSTS + Cache status + 3 + 1 + + + + + REV + REV + Revision + 0x50 + 0x20 + read-write + 0x00010500 + + + REVISION + Revision number + 0 + 31 + + + + + DT + DT + 32/16/8 bit data port register + 0x100 + 0x20 + read-write + 0x00000000 + + + + + QSPI2 + 0xA0002000 + + QSPI2 + QSPI2 global interrupt + 91 + + + + ETHERNET_MAC + Ethernet: media access control + ETHERNET + 0x40028000 + + 0x0 + 0x100 + registers + + + EMAC + Ethernet mac global interrupt + 61 + + + + MACCTRL + MACCTRL + Ethernet MAC configuration register + 0x0 + 0x20 + read-write + 0x00008000 + + + RE + Receiver enable + 2 + 1 + + + TE + Transmitter enable + 3 + 1 + + + DC + Deferral check + 4 + 1 + + + BL + Back-off limit + 5 + 2 + + + ACS + Automatic pad/CRC + stripping + 7 + 1 + + + DR + Disable retry + 9 + 1 + + + IPC + IPv4 checksum offload + 10 + 1 + + + DM + Duplex mode + 11 + 1 + + + LM + Loopback mode + 12 + 1 + + + DRO + Disable receive own + 13 + 1 + + + FES + Fast EMAC speed + 14 + 1 + + + DCS + Disable carrier sense + 16 + 1 + + + IFG + Interframe gap + 17 + 3 + + + JD + Jabber disable + 22 + 1 + + + WD + Watchdog disable + 23 + 1 + + + + + MACFRMF + MACFRMF + Ethernet MAC frame filter register + 0x4 + 0x20 + read-write + 0x00000000 + + + PR + Promiscuous mode + 0 + 1 + + + HUC + Hash unicast + 1 + 1 + + + HMC + Hash multicast + 2 + 1 + + + DAIF + Destination address inverse + filtering + 3 + 1 + + + PMC + Pass multicast + 4 + 1 + + + DBF + Disable broadcast frames + 5 + 1 + + + PCF + Pass control frames + 6 + 2 + + + SAIF + Source address inverse + filtering + 8 + 1 + + + SAF + Source address filter + 9 + 1 + + + HPF + Hash or perfect filter + 10 + 1 + + + RA + Receive all + 31 + 1 + + + + + MACHTH + MACHTH + Ethernet MAC hash table high register + 0x8 + 0x20 + read-write + 0x00000000 + + + HTH + Hash table high + 0 + 32 + + + + + MACHTL + MACHTL + Ethernet MAC hash table low register + 0xC + 0x20 + read-write + 0x00000000 + + + HTL + Hash table low + 0 + 32 + + + + + MACMIIADDR + MACMIIADDR + Ethernet MAC MII address register + 0x10 + 0x20 + read-write + 0x00000000 + + + MB + MII busy + 0 + 1 + + + MW + MII write + 1 + 1 + + + CR + Clock range + 2 + 3 + + + MII + MII register + 6 + 5 + + + PA + PHY address + 11 + 5 + + + + + MACMIIDT + MACMIIDT + Ethernet MAC MII data register + 0x14 + 0x20 + read-write + 0x00000000 + + + MD + MII data + 0 + 16 + + + + + MACFCTRL + MACFCTRL + Ethernet MAC flow control register + 0x18 + 0x20 + read-write + 0x00000000 + + + FCB_BPA + Flow control busy/back pressure + activate + 0 + 1 + + + ETF + Enable transmit flow control + + 1 + 1 + + + ERF + Enable receive flow control + + 2 + 1 + + + DUP + Detect unicast pause frame + 3 + 1 + + + PLT + Pause low threshold + 4 + 2 + + + DZQP + Disable zero-quanta pause + 7 + 1 + + + PT + Pass time + 16 + 16 + + + + + MACVLT + MACVLT + Ethernet MAC VLAN tag register + 0x1C + 0x20 + read-write + 0x00000000 + + + VTI + VLAN tag identifier (for receive + frames) + 0 + 16 + + + ETV + Enable 12-bit VLAN tag comparison + 16 + 1 + + + + + MACRWFF + MACRWFF + Ethernet MAC remote wakeup frame filter register + 0x28 + 0x20 + read-write + 0x00000000 + + + MACPMTCTRLSTS + MACPMTCTRLSTS + Ethernet MAC PMT control and status register + 0x2C + 0x20 + read-write + 0x00000000 + + + PD + Power down + 0 + 1 + + + EMP + Enable magic packet + 1 + 1 + + + ERWF + Enable remote wakeup frame + 2 + 1 + + + RMP + Received magic packet + 5 + 1 + + + RRWF + Recevied remote wakeup frame + 6 + 1 + + + GUC + Global unicast + 9 + 1 + + + RWFFPR + Remote wakeup frame filter register pointer + reset + 31 + 1 + + + + + MACISTS + MACISTS + Ethernet MAC interrupt status register + 0x38 + 0x20 + read-write + 0x00000000 + + + PIS + PMT interrupt status + 3 + 1 + + + MIS + MMC interrupt status + 4 + 1 + + + MRIS + MMC receive interrupt status + 5 + 1 + + + MTIS + MMC transmit interrupt status + 6 + 1 + + + TIS + Timestamp interrupt status + 9 + 1 + + + + + MACIMR + MACIMR + Ethernet MAC interrupt mask register + 0x3C + 0x20 + read-write + 0x00000000 + + + PIM + PMT interrupt mask + 3 + 1 + + + TIM + Timestamp interrupt mask + 9 + 1 + + + + + MACA0H + MACA0H + Ethernet MAC address 0 high register + 0x40 + 0x20 + 0x0010FFFF + + + MA0H + MAC address0 high + 0 + 16 + read-write + + + AE + Address enable + 31 + 1 + read-only + + + + + MACA0L + MACA0L + Ethernet MAC address 0 low register + 0x44 + 0x20 + read-write + 0xFFFFFFFF + + + MA0L + MAC address0 low + 0 + 32 + + + + + MACA1H + MACA1H + Ethernet MAC address 1 high register + 0x48 + 0x20 + read-write + 0x0000FFFF + + + MA1H + MAC address1 high + 0 + 16 + + + MBC + Mask byte control + 24 + 6 + + + SA + Source address + 30 + 1 + + + AE + Address enable + 31 + 1 + + + + + MACA1L + MACA1L + Ethernet MAC address1 low register + 0x4C + 0x20 + read-write + 0xFFFFFFFF + + + MA1L + MAC address1 low + 0 + 32 + + + + + MACA2H + MACA2H + Ethernet MAC address 2 high register + 0x50 + 0x20 + read-write + 0x0050 + + + MA2H + MAC address 2 high + 0 + 16 + + + MBC + Mask byte control + 24 + 6 + + + SA + Source address + 30 + 1 + + + AE + Address enable + 31 + 1 + + + + + MACA2L + MACA2L + Ethernet MAC address 2 low register + 0x54 + 0x20 + read-write + 0xFFFFFFFF + + + MA2L + MAC address2 low + 0 + 31 + + + + + MACA3H + MACA3H + Ethernet MAC address 3 high register + 0x58 + 0x20 + read-write + 0x0000FFFF + + + MA3H + MAC address3 high + 0 + 16 + + + MBC + Mask byte control + 24 + 6 + + + SA + Source address + 30 + 1 + + + AE + Address enable + 31 + 1 + + + + + MACA3L + MACA3L + Ethernet MAC address 3 low register + 0x5C + 0x20 + read-write + 0xFFFFFFFF + + + MA3L + MAC address3 low + 0 + 32 + + + + + + + ETHERNET_MMC + Ethernet: MAC management counters + ETHERNET + 0x40028100 + + 0x0 + 0x100 + registers + + + + MMCCTRL + MMCCTRL + Ethernet MMC control register + 0x0 + 0x20 + read-write + 0x00000000 + + + RC + Reset counter + 0 + 1 + + + SCR + Stop counter rollover + 1 + 1 + + + RR + Reset on read + 2 + 1 + + + FMC + Freeze MMC counter + 31 + 1 + + + + + MMCRI + MMCRI + Ethernet MMC receive interrupt register + 0x4 + 0x20 + read-write + 0x00000000 + + + RFCE + Received frames CRC error + 5 + 1 + + + RFAE + Received frames alignment error + 6 + 1 + + + RGUF + Received good unicast frames + 17 + 1 + + + + + MMCTI + MMCTI + Ethernet MMC transmit interrupt register + 0x8 + 0x20 + read-write + 0x00000000 + + + TSCGFCI + Transmit single collision good frame + counter interrupt + 14 + 1 + + + TGFMSC + Transmit good frames more single + collision + 15 + 1 + + + TGF + Transmitted good frames + 21 + 1 + + + + + MMCRIM + MMCRIM + Ethernet MMC receive interrupt mask register + 0xC + 0x20 + read-write + 0x00000000 + + + RCEFCIM + Received CRC error frame counter interrupt + mask + 5 + 1 + + + RAEFACIM + Received alignment error frame alignment + counter interrupt mask + 6 + 1 + + + RUGFCIM + Received unicast good frame counter + interrupt mask + 17 + 1 + + + + + MMCTIM + MMCTIM + Ethernet MMC transmit interrupt mask register + 0x10 + 0x20 + read-write + 0x00000000 + + + TSCGFCIM + Transmit single collision good frame + counter interrupt mask + 14 + 1 + + + TMCGFCIM + Transmit multiple collision good frame + counter interrupt mask + 15 + 1 + + + TGFCIM + Transmitted good frame counter interrupt + mask + 21 + 1 + + + + + MMCTFSCC + MMCTFSCC + Ethernet MMC transmitted good frames after a single collision counter + 0x4C + 0x20 + read-only + 0x00000000 + + + TGFSCC + Transmitted good frames single + collision counter + 0 + 32 + + + + + MMCTFMSCC + MMCTFMSCC + Ethernet MMC transmitted good frames after more than a single collision + 0x50 + 0x20 + read-only + 0x00000000 + + + TGFMSCC + Transmitted good frame more single + collision counter + 0 + 32 + + + + + MMCTFCNT + MMCTFCNT + Ethernet MMC transmitted good frames counter register + 0x68 + 0x20 + read-only + 0x00000000 + + + TGFC + Transmitted good frames + counter + 0 + 32 + + + + + MMCRFCECNT + MMCRFCECNT + Ethernet MMC received frames with CRC error counter register + 0x94 + 0x20 + read-only + 0x00000000 + + + RFCEC + Received frames CRC error counter + 0 + 32 + + + + + MMCRFAECNT + MMCRFAECNT + Ethernet MMC received frames with alignment error counter register + 0x98 + 0x20 + read-only + 0x00000000 + + + RFAEC + Received frames alignment error counter + 0 + 32 + + + + + MMCRGUFCNT + MMCRGUFCNT + MMC received good unicast frames counter register + 0xC4 + 0x20 + read-only + 0x00000000 + + + RGUFC + Received good unicast frames + counter + 0 + 32 + + + + + + + ETHERNET_PTP + Ethernet: Precision time protocol + ETHERNET + 0x40028700 + + 0x0 + 0x100 + registers + + + + PTPTSCTRL + PTPTSCTRL + Ethernet PTP time stamp control register + 0x0 + 0x20 + read-write + 0x2000 + + + TE + Timestamp enable + 0 + 1 + + + TFCU + Timestamp fine or coarse + update + 1 + 1 + + + TI + Timestamp initialize + 2 + 1 + + + TU + Timestamp update + 3 + 1 + + + TITE + Timestamp interrupt trigger + enable + 4 + 1 + + + ARU + Addend register update + 5 + 1 + + + ETAF + Enable timestamp for all frames + 8 + 1 + + + TDBRC + Timestamp digital or binary + rollover control + 9 + 1 + + + EPPV2F + Enable PTP packet processing for + version2 format + 10 + 1 + + + EPPEF + Enable processing of PTP + over EMAC frames + 11 + 1 + + + EPPFSIP6U + Enable processing of PTP frames + sent over IPv6-UDP + 12 + 1 + + + EPPFSIP4U + Enable processing of PTP frames + sent over IPv4-UDP + 13 + 1 + + + ETSFEM + Enable timestamp snapshot for + event message + 14 + 1 + + + ESFMRTM + Enable snapshot for message + relevant to master + 15 + 1 + + + SPPFTS + Select PTP packet for taking snapshot + 16 + 2 + + + EMAFPFF + Enable MAC address for PTP frame filtering + 18 + 1 + + + + + PTPSSINC + PTPSSINC + Ethernet PTP subsecond increment register + 0x4 + 0x20 + read-write + 0x00000000 + + + SSIV + Sub-second increment value + 0 + 8 + + + + + PTPTSH + PTPTSH + Ethernet PTP time stamp high register + 0x8 + 0x20 + read-only + 0x00000000 + + + TS + Timestamp second + 0 + 32 + + + + + PTPTSL + PTPTSL + Ethernet PTP time stamp low register + 0xC + 0x20 + read-only + 0x00000000 + + + TSS + Timestamp subseconds + 0 + 31 + + + AST + Add or subtract time + 31 + 1 + + + + + PTPTSHUD + PTPTSHUD + Ethernet PTP time stamp high update register + 0x10 + 0x20 + read-write + 0x00000000 + + + TS + Timestamp second + 0 + 32 + + + + + PTPTSLUD + PTPTSLUD + Ethernet PTP time stamp low update register + 0x14 + 0x20 + read-write + 0x00000000 + + + TSS + Timestamp subseconds + 0 + 31 + + + AST + Add or subtract time + 31 + 1 + + + + + PTPTSAD + PTPTSAD + Ethernet PTP time stamp addend register + 0x18 + 0x20 + read-write + 0x00000000 + + + TAR + Timestamp addend register + 0 + 32 + + + + + PTPTTH + PTPTTH + Ethernet PTP target time high register + 0x1C + 0x20 + read-write + 0x00000000 + + + TTSR + Target time seconds register + 0 + 32 + + + + + PTPTTL + PTPTTL + Ethernet PTP target time low register + 0x20 + 0x20 + read-write + 0x00000000 + + + TTLR + Target timestamp low register + 0 + 32 + + + + + PTPTSSR + PTPTSSR + Ethernet PTP time stamp status register + 0x28 + 0x20 + read-only + 0x00000000 + + + TSO + Timestamp second overflow + 0 + 1 + + + TTTR + Timestamp target time reached + 1 + 1 + + + + + PTPPPSCR + PTPPPSCR + Ethernet PTP PPS control register + 0x2C + 0x20 + read-only + 0x00000000 + + + POFC + PPS Output frequency control + 0 + 4 + + + + + + + ETHERNET_DMA + Ethernet: DMA controller operation + ETHERNET + 0x40029000 + + 0x0 + 0x100 + registers + + + + DMABM + DMABM + Ethernet DMA bus mode register + 0x0 + 0x20 + read-write + 0x20101 + + + SWR + Software reset + 0 + 1 + + + DA + DMA Arbitration + 1 + 1 + + + DSL + Descriptor skip length + 2 + 5 + + + PBL + Programmable burst length + 8 + 6 + + + PR + Priority ratio + 14 + 2 + + + FB + Fixed burst + 16 + 1 + + + RDP + Rx DMA PBL + 17 + 6 + + + USP + Use separate PBL + 23 + 1 + + + PBLx8 + PNLx8 mode + 24 + 1 + + + AAB + Address-aligned beats + 25 + 1 + + + + + DMATPD + DMATPD + Ethernet DMA transmit poll demand register + 0x4 + 0x20 + read-write + 0x00000000 + + + TPD + Transmit poll demand + 0 + 32 + + + + + DMARPD + DMARPD + EHERNET DMA receive poll demand register + 0x8 + 0x20 + read-write + 0x00000000 + + + RPD + Receive poll demand + 0 + 32 + + + + + DMARDLADDR + DMARDLADDR + Ethernet DMA receive descriptor list address register + 0xC + 0x20 + read-write + 0x00000000 + + + SRL + Start of receive list + 0 + 32 + + + + + DMATDLADDR + DMATDLADDR + Ethernet DMA transmit descriptor list address register + 0x10 + 0x20 + read-write + 0x00000000 + + + STL + Start of transmit list + 0 + 32 + + + + + DMASTS + DMASTS + Ethernet DMA status register + 0x14 + 0x20 + 0x00000000 + + + TI + Transmit interrupt + 0 + 1 + read-write + + + TPS + Transmit process stopped + 1 + 1 + read-write + + + TBU + Transmit buffer unavailable + 2 + 1 + read-write + + + TJT + Transmit jabber timeout + 3 + 1 + read-write + + + OVF + Receive overflow + 4 + 1 + read-write + + + UNF + Transmit underflow + 5 + 1 + read-write + + + RI + Receive interrupt + 6 + 1 + read-write + + + RBU + Receive buffer unavailable + 7 + 1 + read-write + + + RPS + Receive process stopped + 8 + 1 + read-write + + + RWT + Receive watchdog timeout + 9 + 1 + read-write + + + ETI + Early transmit interrupt + 10 + 1 + read-write + + + FBEI + Fatal bus error interrupt + 13 + 1 + read-write + + + ERI + Early receive interrupt + 14 + 1 + read-write + + + AIS + Abnormal interrupt summary + 15 + 1 + read-write + + + NIS + Normal interrupt summary + 16 + 1 + read-write + + + RS + Receive process state + 17 + 3 + read-only + + + TS + Transmit process state + 20 + 3 + read-only + + + EB + Error bits + 23 + 3 + read-only + + + MMI + MAC MMC interrupt + 27 + 1 + read-only + + + MPI + MAC PMT interrupt + 28 + 1 + read-only + + + TTI + Timestamp trigger interrupt + 29 + 1 + read-only + + + + + DMAOPM + DMAOPM + Ethernet DMA operation mode register + 0x18 + 0x20 + read-write + 0x00000000 + + + SSR + Start or stop receive + 1 + 1 + + + OSF + Operate on second frame + 2 + 1 + + + RTC + Receive threshold control + 3 + 2 + + + FUGF + Forward undersized good frames + 6 + 1 + + + FEF + Forward error frames + 7 + 1 + + + SSTC + Start of stop transmission command + 13 + 1 + + + TTC + Transmit threshold control + 14 + 3 + + + FTF + Flush transmit FIFO + 20 + 1 + + + TSF + Transmit store and forward + 21 + 1 + + + DFRF + Disable flushing of received + frames + 24 + 1 + + + RSF + Receive store and forward + 25 + 1 + + + DT + Disable dropping of TCP/IP + checksum error frames + 26 + 1 + + + + + DMAIE + DMAIE + Ethernet DMA interrupt enable register + 0x1C + 0x20 + read-write + 0x00000000 + + + TIE + Transmit interrupt enable + 0 + 1 + + + TSE + Transmit stopped enable + 1 + 1 + + + TUE + Transmit buffer unavailable enable + 2 + 1 + + + TJE + Transmit jabber timeout enable + 3 + 1 + + + OVE + Overflow interrupt enable + 4 + 1 + + + UNE + Underflow interrupt enable + 5 + 1 + + + RIE + Receive interrupt enable + 6 + 1 + + + RBUE + Receive buffer unavailable enable + 7 + 1 + + + RSE + Receive stopped enable + 8 + 1 + + + RWTE + receive watchdog timeout enable + 9 + 1 + + + EIE + Early transmit interrupt enable + 10 + 1 + + + FBEE + Fatal bus error enable + 13 + 1 + + + ERE + Early receive interrupt + enable + 14 + 1 + + + AIE + Abnormal interrupt enable + 15 + 1 + + + NIE + Normal interrupt enable + 16 + 1 + + + + + DMAMFBOCNT + DMAMFBOCNT + Ethernet DMA missed frame and buffer overflow counter register + 0x20 + 0x20 + read-only + 0x00000000 + + + MFC + Missed frames control + 0 + 16 + + + OBMFC + Overflow bit for missed frame + counter + 16 + 1 + + + OFC + Overflow frame counter + 17 + 11 + + + OBFOC + Overflow bit for FIFO overflow + counter + 28 + 1 + + + + + DMACTD + DMACTD + Ethernet DMA current host transmit descriptor register + 0x48 + 0x20 + read-only + 0x00000000 + + + HTDAP + Host transmit descriptor address pointer + 0 + 32 + + + + + DMACRD + DMACRD + Ethernet DMA current host receive descriptor register + 0x4C + 0x20 + read-only + 0x00000000 + + + HRDAP + Host receive descriptor address pointer + 0 + 32 + + + + + DMACTBADDR + DMACTBADDR + Ethernet DMA current host transmit buffer address register + 0x50 + 0x20 + read-only + 0x00000000 + + + HTBAP + Host transmit buffer address pointer + 0 + 32 + + + + + DMACRBADDR + DMACRBADDR + Ethernet DMA current host receive buffer address register + 0x54 + 0x20 + read-only + 0x00000000 + + + HRBAP + Host receive buffer address pointer + 0 + 32 + + + + + + + diff --git a/project/at_start_f437/templates/at32_ide/ldscripts/AT32F437xM_FLASH.ld b/project/at_start_f437/templates/at32_ide/ldscripts/AT32F437xM_FLASH.ld new file mode 100644 index 00000000..e361d900 --- /dev/null +++ b/project/at_start_f437/templates/at32_ide/ldscripts/AT32F437xM_FLASH.ld @@ -0,0 +1,154 @@ +/* +***************************************************************************** +** +** File : AT32F437xM_FLASH.ld +** +** Abstract : Linker script for AT32F437xM Device with +** 4096KByte FLASH, 384KByte RAM +** +** Set heap size, stack size and stack location according +** to application requirements. +** +** Set memory bank area and size if external memory is used. +** +** Target : Artery Tek AT32 +** +** Environment : Arm gcc toolchain +** +***************************************************************************** +*/ + +/* Entry Point */ +ENTRY(Reset_Handler) + +/* Highest address of the user mode stack */ +_estack = 0x20060000; /* end of RAM */ + +/* Generate a link error if heap and stack don't fit into RAM */ +_Min_Heap_Size = 0x200; /* required amount of heap */ +_Min_Stack_Size = 0x400; /* required amount of stack */ + +/* Specify the memory areas */ +MEMORY +{ +FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 4032K +RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 384K +} + +/* Define output sections */ +SECTIONS +{ + /* The startup code goes first into FLASH */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } >FLASH + + /* The program code and other data goes into FLASH */ + .text : + { + . = ALIGN(4); + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + *(.eh_frame) + + KEEP (*(.init)) + KEEP (*(.fini)) + + . = ALIGN(4); + _etext = .; /* define a global symbols at end of code */ + } >FLASH + + /* Constant data goes into FLASH */ + .rodata : + { + . = ALIGN(4); + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + . = ALIGN(4); + } >FLASH + + .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH + .ARM : { + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + } >FLASH + + .preinit_array : + { + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + } >FLASH + .init_array : + { + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + } >FLASH + .fini_array : + { + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(SORT(.fini_array.*))) + KEEP (*(.fini_array*)) + PROVIDE_HIDDEN (__fini_array_end = .); + } >FLASH + + /* used by the startup to initialize data */ + _sidata = LOADADDR(.data); + + /* Initialized data sections goes into RAM, load LMA copy after code */ + .data : + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end */ + } >RAM AT> FLASH + + /* Uninitialized data section */ + . = ALIGN(4); + .bss : + { + /* This is used by the startup in order to initialize the .bss secion */ + _sbss = .; /* define a global symbol at bss start */ + __bss_start__ = _sbss; + *(.bss) + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end */ + __bss_end__ = _ebss; + } >RAM + + /* User_heap_stack section, used to check that there is enough RAM left */ + ._user_heap_stack : + { + . = ALIGN(8); + PROVIDE ( end = . ); + PROVIDE ( _end = . ); + . = . + _Min_Heap_Size; + . = . + _Min_Stack_Size; + . = ALIGN(8); + } >RAM + + /* Remove information from the standard libraries */ + /DISCARD/ : + { + libc.a ( * ) + libm.a ( * ) + libgcc.a ( * ) + } + + .ARM.attributes 0 : { *(.ARM.attributes) } +} diff --git a/project/at_start_f437/templates/at32_ide/preferences.ini b/project/at_start_f437/templates/at32_ide/preferences.ini new file mode 100644 index 00000000..55ac7568 --- /dev/null +++ b/project/at_start_f437/templates/at32_ide/preferences.ini @@ -0,0 +1,4 @@ +[debugger] +chipSeries=AT32F437 +chipTarget=AT32F437ZMT7 +chipSizeType=M diff --git a/project/at_start_f437/templates/inc/at32f435_437_clock.h b/project/at_start_f437/templates/inc/at32f435_437_clock.h index 98d52da8..86a4b828 100644 --- a/project/at_start_f437/templates/inc/at32f435_437_clock.h +++ b/project/at_start_f437/templates/inc/at32f435_437_clock.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of clock program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/templates/inc/at32f435_437_conf.h b/project/at_start_f437/templates/inc/at32f435_437_conf.h index 7024a483..87f5d299 100644 --- a/project/at_start_f437/templates/inc/at32f435_437_conf.h +++ b/project/at_start_f437/templates/inc/at32f435_437_conf.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_conf.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief at32f435_437 config header file ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/templates/inc/at32f435_437_int.h b/project/at_start_f437/templates/inc/at32f435_437_int.h index f5a04afd..80aec042 100644 --- a/project/at_start_f437/templates/inc/at32f435_437_int.h +++ b/project/at_start_f437/templates/inc/at32f435_437_int.h @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.h - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief header file of main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/templates/readme.txt b/project/at_start_f437/templates/readme.txt index c1308556..d4918342 100644 --- a/project/at_start_f437/templates/readme.txt +++ b/project/at_start_f437/templates/readme.txt @@ -1,8 +1,8 @@ /** ************************************************************************** * @file templates/readme.txt - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief readme ************************************************************************** */ diff --git a/project/at_start_f437/templates/src/at32f435_437_clock.c b/project/at_start_f437/templates/src/at32f435_437_clock.c index 8c761527..5c7c0c3a 100644 --- a/project/at_start_f437/templates/src/at32f435_437_clock.c +++ b/project/at_start_f437/templates/src/at32f435_437_clock.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_clock.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief system clock config program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/templates/src/at32f435_437_int.c b/project/at_start_f437/templates/src/at32f435_437_int.c index b3a053b0..9e61c6d3 100644 --- a/project/at_start_f437/templates/src/at32f435_437_int.c +++ b/project/at_start_f437/templates/src/at32f435_437_int.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file at32f435_437_int.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main interrupt service routines. ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437/templates/src/main.c b/project/at_start_f437/templates/src/main.c index d01c23c9..214bd2c5 100644 --- a/project/at_start_f437/templates/src/main.c +++ b/project/at_start_f437/templates/src/main.c @@ -1,8 +1,8 @@ /** ************************************************************************** * @file main.c - * @version v2.0.8 - * @date 2022-04-25 + * @version v2.0.9 + * @date 2022-06-28 * @brief main program ************************************************************************** * Copyright notice & Disclaimer diff --git a/project/at_start_f437_Example_list.htm b/project/at_start_f437_Example_list.htm index 310d0985..e5305e4a 100644 --- a/project/at_start_f437_Example_list.htm +++ b/project/at_start_f437_Example_list.htm @@ -34,29 +34,6 @@ text-justify:inter-ideograph; font-size:10.5pt; font-family:;} -p.MsoHeader, li.MsoHeader, div.MsoHeader - {mso-style-link:"ҳü ַ"; - margin:0cm; - margin-bottom:.0001pt; - text-align:center; - layout-grid-mode:char; - border:none; - padding:0cm; - font-size:9.0pt; - font-family:;} -p.MsoFooter, li.MsoFooter, div.MsoFooter - {mso-style-link:"ҳ ַ"; - margin:0cm; - margin-bottom:.0001pt; - layout-grid-mode:char; - font-size:9.0pt; - font-family:;} -span.a - {mso-style-name:"ҳü ַ"; - mso-style-link:ҳü;} -span.a0 - {mso-style-name:"ҳ ַ"; - mso-style-link:ҳ;} .MsoChpDefault {font-family:;} /* Page Definitions */ @@ -1170,7 +1147,7 @@ div.WordSection1

51

-

mqtt_client

+ + +

mqttͻ

+ + + + +

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+ + +

tcp_client

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fap_enable

+ + +

flashʱʹ

+ + + + +

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flash_write_read

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io_toggle

+ + +

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+ + + + +

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rs485

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AT32-Comm-EV BoardRS485ͨ

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composite_vcp_msc

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ʵ⴮ںmass storage豸

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